From e586efb29d34865b749fd4da94039b189c06a982 Mon Sep 17 00:00:00 2001 From: Raghavendra Dinavahi Date: Thu, 1 Aug 2024 17:49:09 +0200 Subject: [PATCH 1/3] enable HARQ32, Changes common to gNB and UE - MAX HARQ PROCESSES set to 32 - for PDSCH - default setting in OAI is 16, according to 3GPP rel17 38.331 these are the possible configs - if no IES are defined then 8 - if nrofHARQ-ProcessesForPDSCH is defined then these values- {n2, n4, n6, n10, n12, n16} - if nrofHARQ-ProcessesForPDSCH-v1700 is defined then 32 - for harq bits in DCI - DCI 1_0 - 4 bits spec 38.212, section 7.3.1.2.1 - DCI 1_1 - 4/5 bits according to IE harq-ProcessNumberSizeDCI-1-1, spec 38.212, section 7.3.1.2.2 - for PUSCH - default setting in OAI is 16, according to 3GPP rel17 38.331 these are possible configs - if no IES are defined then 16 - if nrofHARQ-ProcessesForPUSCH-v1700 is defined then 32 - for harq bits in DCI - DCI 0_0 - 4 bits spec 38.212, section 7.3.1.1.1 - DCI 0_1 - 4/5 bits according to IE harq-ProcessNumberSizeDCI-0-1, spec 38.212, section 7.3.1.1.2 - FOR HARQ32 , DCI 1_1, DCI 0_1 should be configured in UE dedicated search space. In OAI it is set. --- common/utils/nr/nr_common.h | 2 +- openair2/LAYER2/NR_MAC_COMMON/nr_mac.h | 4 +- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 75 ++++++++++++++++++- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h | 4 + 4 files changed, 79 insertions(+), 6 deletions(-) diff --git a/common/utils/nr/nr_common.h b/common/utils/nr/nr_common.h index d65344b27d..31048f6ae8 100644 --- a/common/utils/nr/nr_common.h +++ b/common/utils/nr/nr_common.h @@ -40,7 +40,7 @@ #define MAX_BWP_SIZE 275 #define NR_MAX_NUM_BWP 4 -#define NR_MAX_HARQ_PROCESSES 16 +#define NR_MAX_HARQ_PROCESSES 32 #define NR_NB_REG_PER_CCE 6 #define NR_NB_SC_PER_RB 12 #define NR_MAX_NUM_LCID 32 diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h index fa98a7ecac..f3a272330b 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h @@ -308,7 +308,7 @@ typedef struct { uint8_t mcs; //5 bits uint8_t ndi; //1 bit uint8_t rv; //2 bits - uint8_t harq_pid; //4 bits + dci_field_t harq_pid; // 4/5 bits uint8_t tpc; //2 bits uint8_t short_messages_indicator; //2 bits uint8_t short_messages; //8 bits @@ -604,6 +604,8 @@ typedef struct { int ul_bw_tbslbrm; NR_NTN_Config_r17_t *ntn_Config_r17; NR_DownlinkHARQ_FeedbackDisabled_r17_t *downlinkHARQ_FeedbackDisabled_r17; + long *nrofHARQ_ProcessesForPDSCH_v1700; + long *nrofHARQ_ProcessesForPUSCH_r17; } NR_UE_ServingCell_Info_t; typedef enum { diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index acbc1ff1ca..d84fbc61a9 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -3113,6 +3113,58 @@ uint16_t get_rb_bwp_dci(nr_dci_format_t format, return N_RB; } +// 32 HARQ processes supported in rel17, default is 8 +int get_nrofHARQ_ProcessesForPDSCH(const NR_UE_ServingCell_Info_t *sc_info) +{ + if (sc_info && sc_info->nrofHARQ_ProcessesForPDSCH_v1700) + return 32; + + if (!sc_info || !sc_info->nrofHARQ_ProcessesForPDSCH) + return 8; + + int IEvalues[] = {2, 4, 6, 10, 12, 16}; + return IEvalues[*sc_info->nrofHARQ_ProcessesForPDSCH]; +} + +// 32 HARQ processes supported in rel17, default is 16 +int get_nrofHARQ_ProcessesForPUSCH(const NR_UE_ServingCell_Info_t *sc_info) +{ + if (sc_info && sc_info->nrofHARQ_ProcessesForPUSCH_r17) + return 32; + + return 16; +} + +static int get_nrofHARQ_bits_PDSCH(int dci_format, int num_dl_harq, NR_PDSCH_Config_t *dl_cfg) +{ + // IF DCI Format 1_0 - then use 4 bits. Refer to Spec 38.212 section 7.3.1.2.1 + int harqbits = 4; + if (dl_cfg && dl_cfg->ext3) { + // 5 bits if higher layer parameter harq-ProcessNumberSizeDCI-1-1 is configured, otherwise 4 bits + // Refer to Spec 38.212 section 7.3.1.2.2 + if (dci_format == NR_DL_DCI_FORMAT_1_1 && dl_cfg->ext3->harq_ProcessNumberSizeDCI_1_1_r17) { + harqbits = 5; + AssertFatal(num_dl_harq == 32, "Incorrect configuration of DL HARQ processes %d\n",num_dl_harq); + } + } + return harqbits; +} + +static int get_nrofHARQ_bits_PUSCH(int dci_format, int num_ul_harq, NR_PUSCH_Config_t *ul_cfg) +{ + // IF DCI Format 0_0 - then use 4 bits. Refer to Spec 38.212 section 7.3.1.1.1 + int harqbits = 4; + if (ul_cfg && ul_cfg->ext2) { + // 5 bits if higher layer parameter harq-ProcessNumberSizeDCI-0-1 is configured, otherwise 4 bits + // Refer to Spec 38.212 section 7.3.1.1.2 + if (dci_format == NR_UL_DCI_FORMAT_0_1 && ul_cfg->ext2->harq_ProcessNumberSizeDCI_0_1_r17) { + harqbits = 5; + AssertFatal(num_ul_harq == 32, "Incorrect configuration of UL HARQ processes %d\n",num_ul_harq); + } + } + return harqbits; +} + uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP, const NR_UE_UL_BWP_t *UL_BWP, const NR_UE_ServingCell_Info_t *sc_info, @@ -3146,10 +3198,17 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP, sc_info->initial_ul_BWPSize, sc_info->initial_dl_BWPSize); + const int num_dl_harq = get_nrofHARQ_ProcessesForPDSCH(sc_info); + const int num_ul_harq = get_nrofHARQ_ProcessesForPUSCH(sc_info); + const int num_dlharqbits = get_nrofHARQ_bits_PDSCH(format, num_dl_harq, pdsch_Config); + const int num_ulharqbits = get_nrofHARQ_bits_PUSCH(format, num_ul_harq, pusch_Config); + switch(format) { case NR_UL_DCI_FORMAT_0_0: /// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20 size += 20; + // HARQ pid - 4bits , Spec 38.212 section 7.3.1.1.1 + dci_pdu->harq_pid.nbits = 4; dci_pdu->frequency_domain_assignment.nbits = (uint8_t)ceil(log2((N_RB * (N_RB + 1)) >>1)); // Freq domain assignment -- hopping scenario to be updated size += dci_pdu->frequency_domain_assignment.nbits; if(alt_size >= size) @@ -3166,8 +3225,12 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP, LOG_E(NR_MAC, "Error! Not possible to configure DCI format 01 without UL BWP.\n"); return 0; } - /// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2, ULSCH indicator 1 --16 - size += 16; + /// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, PUSCH TPC 2, ULSCH indicator 1 --12 + size += 12; + // HARQ PID - 4/5 bits Spec 38.212 section 7.3.1.1.2 + // 5 bits if higher layer parameter harq-ProcessNumberSizeDCI-0-1 is configured;otherwise 4 bits + dci_pdu->harq_pid.nbits = num_ulharqbits; + size += dci_pdu->harq_pid.nbits; // Carrier indicator if (sc_info->crossCarrierSchedulingConfig) { dci_pdu->carrier_indicator.nbits = 3; @@ -3309,6 +3372,8 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP, // Size of DCI format 1_0 is given by the size of CORESET 0 if CORESET 0 is configured for the cell and the size // of initial DL bandwidth part if CORESET 0 is not configured for the cell size = 28; + // HARQ pid - 4 bits. Spec 38.212 section 7.3.1.2.1 + dci_pdu->harq_pid.nbits = 4; dci_pdu->frequency_domain_assignment.nbits = (uint8_t)ceil(log2((N_RB * (N_RB + 1)) >> 1)); // Freq domain assignment size += dci_pdu->frequency_domain_assignment.nbits; if(ss_type == NR_SearchSpace__searchSpaceType_PR_ue_Specific && alt_size >= size) @@ -3391,8 +3456,10 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP, if ((maxCWperDCI != NULL) && (*maxCWperDCI == 2)) { size += 8; } - // HARQ PID - size += 4; + // HARQ process number – 5 bits if higher layer parameter harq-ProcessNumberSizeDCI-1-1 is configured; + // otherwise 4 bits. Spec 38.212 Section 7.3.1.2.2 + dci_pdu->harq_pid.nbits = num_dlharqbits; + size += dci_pdu->harq_pid.nbits; // DAI if (pdsch_HARQ_ACK_Codebook == NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic) { // FIXME in case of more than one serving cell dci_pdu->dai[0].nbits = 2; diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h index 72872a7e1f..b2fd085285 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h @@ -319,4 +319,8 @@ bool supported_bw_comparison(int bw_mhz, NR_SupportedBandwidth_t *supported_BW, int get_FeedbackDisabled(NR_DownlinkHARQ_FeedbackDisabled_r17_t *downlinkHARQ_FeedbackDisabled_r17, int harq_pid); +int get_nrofHARQ_ProcessesForPDSCH(const NR_UE_ServingCell_Info_t *sc_info); + +int get_nrofHARQ_ProcessesForPUSCH(const NR_UE_ServingCell_Info_t *sc_info); + #endif From 9726a47fbb91960cdded1467012ddbc8d3947f79 Mon Sep 17 00:00:00 2001 From: Raghavendra Dinavahi Date: Thu, 1 Aug 2024 17:52:05 +0200 Subject: [PATCH 2/3] enable HARQ32, Changes in gNB - Enabled configuration for number of dl, ul harq processes in conf file - set "num_dlharq = 32; num_ulharq = 32;" under "gNBs" section in the conf file - default values when not configured is 16 for DL, UL harq processes - IEs in the RRC messages set according to the number of DL, UL harq processes configured. - If value 32 is configured , then IEs related to num harq processes and dci bits also configured in Bandwidth parts. --- doc/RUNMODEM.md | 8 + openair2/GNB_APP/gnb_config.c | 15 +- openair2/GNB_APP/gnb_paramdef.h | 13 ++ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 2 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 114 +++++++------- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 4 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 2 + openair2/RRC/NR/nr_rrc_config.c | 147 +++++++++++++++--- 10 files changed, 230 insertions(+), 79 deletions(-) diff --git a/doc/RUNMODEM.md b/doc/RUNMODEM.md index 4d181158a9..dcd6154187 100644 --- a/doc/RUNMODEM.md +++ b/doc/RUNMODEM.md @@ -205,6 +205,14 @@ cd cmake_targets sudo ./ran_build/build/nr-softmodem -O ../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.25PRB.usrpx300.conf --sa --rfsim --rfsimulator.prop_delay 238.74 ``` +To configure NTN gNB with 32 HARQ processes in downlink and uplink, add these settings in conf files under section `gNBs.[0]` +``` +... + num_dlharq = 32; + num_ulharq = 32; +... +``` + ### NR UE At UE side, there are two main parameters to cope with the large NTN propagation delay, cellSpecificKoffset and ta-Common. diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 9d9de98f8b..c571b253e1 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -675,6 +675,9 @@ void RCconfig_verify(configmodule_interface_t *cfg, ngran_node_t node_type) verify_gnb_param_notset(gnbp, GNB_DO_SRS_IDX, GNB_CONFIG_STRING_DOSRS); verify_gnb_param_notset(gnbp, GNB_FORCE256QAMOFF_IDX, GNB_CONFIG_STRING_FORCE256QAMOFF); verify_gnb_param_notset(gnbp, GNB_MAXMIMOLAYERS_IDX, GNB_CONFIG_STRING_MAXMIMOLAYERS); + verify_gnb_param_notset(gnbp, GNB_DISABLE_HARQ_IDX, GNB_CONFIG_STRING_DISABLE_HARQ); + verify_gnb_param_notset(gnbp, GNB_NUM_DL_HARQ_IDX, GNB_CONFIG_STRING_NUM_DL_HARQPROCESSES); + verify_gnb_param_notset(gnbp, GNB_NUM_UL_HARQ_IDX, GNB_CONFIG_STRING_NUM_UL_HARQPROCESSES); // check for some general sections verify_section_notset(cfg, NULL, CONFIG_STRING_L1_LIST); @@ -1213,6 +1216,10 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg) GNB_CONFIG_STRING_ACTIVE_GNBS, num_gnbs); paramdef_t GNBParams[] = GNBPARAMS_DESC; + /* map parameter checking array instances to parameter definition array instances */ + checkedparam_t config_check_GNBParams[] = GNBPARAMS_CHECK; + for (int i = 0; i < sizeofArray(GNBParams); ++i) + GNBParams[i].chkPptr = &(config_check_GNBParams[i]); config_getlist(cfg, &GNBParamList, GNBParams, sizeofArray(GNBParams), NULL); if (NFAPI_MODE != NFAPI_MODE_PNF) { @@ -1261,16 +1268,20 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg) config.use_deltaMCS = *GNBParamList.paramarray[0][GNB_USE_DELTA_MCS_IDX].iptr != 0; config.maxMIMO_layers = *GNBParamList.paramarray[0][GNB_MAXMIMOLAYERS_IDX].iptr; config.disable_harq = *GNBParamList.paramarray[0][GNB_DISABLE_HARQ_IDX].iptr; + config.num_dlharq = *GNBParamList.paramarray[0][GNB_NUM_DL_HARQ_IDX].iptr; + config.num_ulharq = *GNBParamList.paramarray[0][GNB_NUM_UL_HARQ_IDX].iptr; if (config.disable_harq) LOG_W(GNB_APP, "\"disable_harq\" is a REL17 feature and is incompatible with REL15 and REL16 UEs!\n"); LOG_I(GNB_APP, - "CSI-RS %d, SRS %d, 256 QAM %s, delta_MCS %s, maxMIMO_Layers %d, HARQ feedback %s\n", + "CSI-RS %d, SRS %d, 256 QAM %s, delta_MCS %s, maxMIMO_Layers %d, HARQ feedback %s, num DLHARQ:%d, num ULHARQ:%d\n", config.do_CSIRS, config.do_SRS, config.force_256qam_off ? "force off" : "may be on", config.use_deltaMCS ? "on" : "off", config.maxMIMO_layers, - config.disable_harq ? "disabled" : "enabled"); + config.disable_harq ? "disabled" : "enabled", + config.num_dlharq, + config.num_ulharq); int tot_ant = config.pdsch_AntennaPorts.N1 * config.pdsch_AntennaPorts.N2 * config.pdsch_AntennaPorts.XP; AssertFatal(config.maxMIMO_layers != 0 && config.maxMIMO_layers <= tot_ant, "Invalid maxMIMO_layers %d\n", config.maxMIMO_layers); diff --git a/openair2/GNB_APP/gnb_paramdef.h b/openair2/GNB_APP/gnb_paramdef.h index 339ea75714..c632bf1b3e 100644 --- a/openair2/GNB_APP/gnb_paramdef.h +++ b/openair2/GNB_APP/gnb_paramdef.h @@ -135,6 +135,8 @@ typedef enum { #define GNB_CONFIG_STRING_FORCEUL256QAMOFF "force_UL256qam_off" #define GNB_CONFIG_STRING_GNB_DU_ID "gNB_DU_ID" #define GNB_CONFIG_STRING_GNB_CU_UP_ID "gNB_CU_UP_ID" +#define GNB_CONFIG_STRING_NUM_DL_HARQPROCESSES "num_dlharq" +#define GNB_CONFIG_STRING_NUM_UL_HARQPROCESSES "num_ulharq" #define GNB_CONFIG_HLP_STRING_ENABLE_SDAP "enable the SDAP layer\n" #define GNB_CONFIG_HLP_FORCE256QAMOFF "suppress activation of 256 QAM despite UE support" @@ -143,6 +145,8 @@ typedef enum { #define GNB_CONFIG_HLP_STRING_DRBS "Number of total DRBs to establish, including the mandatory for PDU SEssion (default=1)\n" #define GNB_CONFIG_HLP_GNB_DU_ID "defines the gNB-DU ID (only applicable for DU)" #define GNB_CONFIG_HLP_GNB_CU_UP_ID "defines the gNB-CU-UP ID (only applicable for CU-UP)" +#define GNB_CONFIG_HLP_NUM_DL_HARQ "Set Num DL harq processes. Valid values 2,4,6,8,10,12,16,32. Default 16" +#define GNB_CONFIG_HLP_NUM_UL_HARQ "Set Num UL harq processes. Valid values 16,32. Default 16" /*-----------------------------------------------------------------------------------------------------------------------------------------*/ /* cell configuration parameters */ @@ -183,6 +187,8 @@ typedef enum { {GNB_CONFIG_STRING_FORCEUL256QAMOFF, GNB_CONFIG_HLP_FORCEUL256QAMOFF, 0,.iptr=NULL, .defintval=0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_MAXMIMOLAYERS, GNB_CONFIG_HLP_MAXMIMOLAYERS, 0, .iptr=NULL, .defintval=-1, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_DISABLE_HARQ, GNB_CONFIG_HLP_DISABLE_HARQ, PARAMFLAG_BOOL, .iptr=NULL, .defintval=0, TYPE_INT, 0}, \ +{GNB_CONFIG_STRING_NUM_DL_HARQPROCESSES, GNB_CONFIG_HLP_NUM_DL_HARQ, 0, .iptr=NULL, .defintval=16, TYPE_INT, 0}, \ +{GNB_CONFIG_STRING_NUM_UL_HARQPROCESSES, GNB_CONFIG_HLP_NUM_UL_HARQ, 0, .iptr=NULL, .defintval=16, TYPE_INT, 0}, \ } // clang-format on @@ -220,8 +226,13 @@ typedef enum { #define GNB_FORCEUL256QAMOFF_IDX 30 #define GNB_MAXMIMOLAYERS_IDX 31 #define GNB_DISABLE_HARQ_IDX 32 +#define GNB_NUM_DL_HARQ_IDX 33 +#define GNB_NUM_UL_HARQ_IDX 34 #define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD} +#define NUM_DL_HARQ_OKVALUES {2,4,6,8,10,12,16,32} +#define NUM_UL_HARQ_OKVALUES {16,32} + #define GNBPARAMS_CHECK { \ { .s5 = { NULL } }, \ { .s5 = { NULL } }, \ @@ -256,6 +267,8 @@ typedef enum { { .s5 = { NULL } }, \ { .s5 = { NULL } }, \ { .s5 = { NULL } }, \ + { .s1 = { config_check_intval, NUM_DL_HARQ_OKVALUES,8 } }, \ + { .s1 = { config_check_intval, NUM_UL_HARQ_OKVALUES,2 } }, \ } /*-------------------------------------------------------------------------------------------------------------------------------------------------*/ diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 495eb30eef..d1a0bae0dc 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -1651,7 +1651,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac, dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0]; dci_payload.tb_scaling = tb_scaling; dci_payload.rv = pdsch_pdu_rel15->rvIndex[0]; - dci_payload.harq_pid = current_harq_pid; + dci_payload.harq_pid.val = current_harq_pid; dci_payload.ndi = ndi; dci_payload.dai[0].val = pucch ? (pucch->dai_c-1) & 3 : 0; dci_payload.tpc = tpc; // TPC for PUCCH: table 7.2.1-1 in 38.213 diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 3d531315ea..970118a643 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -500,7 +500,7 @@ static void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, dci_payload.time_domain_assignment.val = gNB_mac->sched_ctrlCommon->sched_pdsch.time_domain_allocation; dci_payload.mcs = pdsch->mcs; dci_payload.rv = pdsch_pdu_rel15->rvIndex[0]; - dci_payload.harq_pid = 0; + dci_payload.harq_pid.val = 0; dci_payload.ndi = 0; dci_payload.dai[0].val = 0; dci_payload.tpc = 0; // table 7.2.1-1 in 38.213 diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index cd4fc9b197..dc412cdf78 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -1211,7 +1211,7 @@ void nr_schedule_ue_spec(module_id_t module_id, dci_payload.time_domain_assignment.val = sched_pdsch->time_domain_allocation; dci_payload.mcs = sched_pdsch->mcs; dci_payload.rv = pdsch_pdu->rvIndex[0]; - dci_payload.harq_pid = current_harq_pid; + dci_payload.harq_pid.val = current_harq_pid; dci_payload.ndi = harq->ndi; dci_payload.dai[0].val = pucch ? (pucch->dai_c-1)&3 : 0; dci_payload.tpc = sched_ctrl->tpc1; // TPC for PUCCH: table 7.2.1-1 in 38.213 diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 5728f6bb3f..5769efe4f2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -791,7 +791,7 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info, dci_pdu_rel15->mcs = pusch_pdu->mcs_index; dci_pdu_rel15->ndi = ndi; dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index; - dci_pdu_rel15->harq_pid = pusch_pdu->pusch_data.harq_process_id; + dci_pdu_rel15->harq_pid.val = pusch_pdu->pusch_data.harq_process_id; dci_pdu_rel15->tpc = tpc; NR_PUSCH_Config_t *pusch_Config = ul_bwp->pusch_Config; @@ -1432,10 +1432,11 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, pos += 2; *dci_pdu |= (dci_pdu_rel15->rv & 0x3) << (dci_size - pos); LOG_D(NR_MAC, "RV %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->rv, 2, dci_size - pos, *dci_pdu); - // HARQ process number 4bit - pos += 4; - *dci_pdu |= ((dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos)); - LOG_D(NR_MAC, "HARQ_PID %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->harq_pid, 4, dci_size - pos, *dci_pdu); + // HARQ process number 4bit/5bit + fsize = dci_pdu_rel15->harq_pid.nbits; + pos += fsize; + *dci_pdu |= ((dci_pdu_rel15->harq_pid.val & ((1 << fsize) - 1)) << (dci_size - pos)); + LOG_D(NR_MAC, "HARQ_PID %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->harq_pid.val, fsize, dci_size - pos, *dci_pdu); // Downlink assignment index 2bit pos += 2; *dci_pdu |= ((dci_pdu_rel15->dai[0].val & 3) << (dci_size - pos)); @@ -1538,9 +1539,10 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, // Redundancy version 2bit for (int i = 0; i < 2; i++) *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv >> (1 - i)) & 1) << (dci_size - pos++); - // HARQ process number 4bit - for (int i = 0; i < 4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid >> (3 - i)) & 1) << (dci_size - pos++); + // HARQ process number 4bit/5bit + fsize = dci_pdu_rel15->harq_pid.nbits; + for (int i = 0; i < fsize; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid.val >> (fsize - i - 1)) & 1) << (dci_size - pos++); // Downlink assignment index – 2 bits for (int i = 0; i < 2; i++) *dci_pdu |= (((uint64_t)dci_pdu_rel15->dai[0].val >> (1 - i)) & 1) << (dci_size - pos++); @@ -1563,7 +1565,7 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, LOG_D(NR_MAC, "dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); LOG_D(NR_MAC, "dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); LOG_D(NR_MAC, "dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(NR_MAC, "dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC, "dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid.val); LOG_D(NR_MAC, "dci_pdu_rel15->dai[0].val = %i\n", dci_pdu_rel15->dai[0].val); LOG_D(NR_MAC, "dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); LOG_D(NR_MAC, @@ -1603,9 +1605,10 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, // Redundancy version 2bit pos += 2; *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos); - // HARQ process number 4bit - pos += 4; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); + // HARQ process number 4bit/5bit + fsize = dci_pdu_rel15->harq_pid.nbits; + pos += fsize; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid.val & ((1 << fsize) - 1)) << (dci_size - pos); // TPC command for scheduled PUSCH – 2 bits pos += 2; *dci_pdu |= ((uint64_t)dci_pdu_rel15->tpc & 0x3) << (dci_size - pos); @@ -1628,7 +1631,7 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, LOG_D(NR_MAC, "dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); LOG_D(NR_MAC, "dci_pdu_rel15->ndi = %i\n", dci_pdu_rel15->ndi); LOG_D(NR_MAC, "dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(NR_MAC, "dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC, "dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid.val); LOG_D(NR_MAC, "dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); LOG_D(NR_MAC, "dci_pdu_rel15->padding = %i\n", dci_pdu_rel15->padding); break; @@ -1656,9 +1659,10 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, // Redundancy version 2bit pos += 2; *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos); - // HARQ process number 4bit - pos += 4; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); + // HARQ process number 4bit/5bit + fsize = dci_pdu_rel15->harq_pid.nbits; + pos += fsize; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid.val & ((1 << fsize) - 1)) << (dci_size - pos); // Padding bits for (int a = pos; a < dci_size; a++) *dci_pdu |= ((uint64_t)dci_pdu_rel15->padding & 1) << (dci_size - pos++); @@ -1677,7 +1681,7 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, LOG_D(NR_MAC, "dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); LOG_D(NR_MAC, "dci_pdu_rel15->ndi = %i\n", dci_pdu_rel15->ndi); LOG_D(NR_MAC, "dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(NR_MAC, "dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC, "dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid.val); LOG_D(NR_MAC, "dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); LOG_D(NR_MAC, "dci_pdu_rel15->padding = %i\n", dci_pdu_rel15->padding); @@ -1726,9 +1730,10 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, // Redundancy version 2bit pos += 2; *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos); - // HARQ process number 4bit - pos += 4; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); + // HARQ process number 4bit/5bit + fsize = dci_pdu_rel15->harq_pid.nbits; + pos += fsize; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid.val & ((1 << fsize) - 1)) << (dci_size - pos); // 1st Downlink assignment index pos += dci_pdu_rel15->dai[0].nbits; *dci_pdu |= ((uint64_t)dci_pdu_rel15->dai[0].val & ((1 << dci_pdu_rel15->dai[0].nbits) - 1)) << (dci_size - pos); @@ -1858,9 +1863,10 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, // Redundancy version 2bit pos += dci_pdu_rel15->rv2.nbits; *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv2.val & ((1 << dci_pdu_rel15->rv2.nbits) - 1)) << (dci_size - pos); - // HARQ process number 4bit - pos += 4; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); + // HARQ process number 4bit/5bit + fsize = dci_pdu_rel15->harq_pid.nbits; + pos += fsize; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid.val & ((1 << fsize) - 1)) << (dci_size - pos); // Downlink assignment index pos += dci_pdu_rel15->dai[0].nbits; *dci_pdu |= ((uint64_t)dci_pdu_rel15->dai[0].val & ((1 << dci_pdu_rel15->dai[0].nbits) - 1)) << (dci_size - pos); @@ -2073,26 +2079,6 @@ NR_UE_info_t *find_nr_UE(NR_UEs_t *UEs, rnti_t rntiP) return NULL; } -int get_nrofHARQ_ProcessesForPDSCH(e_NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH n) -{ - switch (n) { - case NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n2: - return 2; - case NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n4: - return 4; - case NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n6: - return 6; - case NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n10: - return 10; - case NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n12: - return 12; - case NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n16: - return 16; - default: - return 8; - } -} - void delete_nr_ue_data(NR_UE_info_t *UE, NR_COMMON_channels_t *ccPtr, uid_allocator_t *uia) { ASN_STRUCT_FREE(asn_DEF_NR_CellGroupConfig, UE->CellGroup); @@ -2351,6 +2337,8 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, if (pdsch_servingcellconfig->codeBlockGroupTransmission && pdsch_servingcellconfig->codeBlockGroupTransmission->choice.setup) sc_info->pdsch_CGB_Transmission = pdsch_servingcellconfig->codeBlockGroupTransmission->choice.setup; + if (pdsch_servingcellconfig->ext3) + sc_info->nrofHARQ_ProcessesForPDSCH_v1700 = pdsch_servingcellconfig->ext3->nrofHARQ_ProcessesForPDSCH_v1700; } sc_info->crossCarrierSchedulingConfig = servingCellConfig->crossCarrierSchedulingConfig; sc_info->supplementaryUplink = servingCellConfig->supplementaryUplink; @@ -2367,6 +2355,8 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, if (pusch_servingcellconfig->codeBlockGroupTransmission && pusch_servingcellconfig->codeBlockGroupTransmission->choice.setup) sc_info->pusch_CGB_Transmission = pusch_servingcellconfig->codeBlockGroupTransmission->choice.setup; + if (pusch_servingcellconfig->ext3) + sc_info->nrofHARQ_ProcessesForPUSCH_r17 = pusch_servingcellconfig->ext3->nrofHARQ_ProcessesForPUSCH_r17; } } } @@ -2516,13 +2506,7 @@ NR_UE_info_t *add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConf /* get Number of HARQ processes for this UE */ // pdsch_servingcellconfig == NULL in SA -> will create default (8) number of HARQ processes create_dl_harq_list(sched_ctrl, &UE->sc_info); - // add all available UL HARQ processes for this UE - // nb of ul harq processes not configurable - create_nr_list(&sched_ctrl->available_ul_harq, 16); - for (int harq = 0; harq < 16; harq++) - add_tail_nr_list(&sched_ctrl->available_ul_harq, harq); - create_nr_list(&sched_ctrl->feedback_ul_harq, 16); - create_nr_list(&sched_ctrl->retrans_ul_harq, 16); + create_ul_harq_list(sched_ctrl, &UE->sc_info); reset_srs_stats(UE); @@ -2580,8 +2564,7 @@ void free_sched_pucch_list(NR_UE_sched_ctrl_t *sched_ctrl) void create_dl_harq_list(NR_UE_sched_ctrl_t *sched_ctrl, const NR_UE_ServingCell_Info_t *sc_info) { - const int nrofHARQ = - sc_info && sc_info->nrofHARQ_ProcessesForPDSCH ? get_nrofHARQ_ProcessesForPDSCH(*sc_info->nrofHARQ_ProcessesForPDSCH) : 8; + const int nrofHARQ = get_nrofHARQ_ProcessesForPDSCH(sc_info); // add all available DL HARQ processes for this UE AssertFatal(sched_ctrl->available_dl_harq.len == sched_ctrl->feedback_dl_harq.len && sched_ctrl->available_dl_harq.len == sched_ctrl->retrans_dl_harq.len, @@ -2610,6 +2593,30 @@ void create_dl_harq_list(NR_UE_sched_ctrl_t *sched_ctrl, const NR_UE_ServingCell } } +void create_ul_harq_list(NR_UE_sched_ctrl_t *sched_ctrl, const NR_UE_ServingCell_Info_t *sc_info) +{ + int nrofHARQ = get_nrofHARQ_ProcessesForPUSCH(sc_info); + if (sched_ctrl->available_ul_harq.len == 0) { + create_nr_list(&sched_ctrl->available_ul_harq, nrofHARQ); + for (int harq = 0; harq < nrofHARQ; harq++) + add_tail_nr_list(&sched_ctrl->available_ul_harq, harq); + create_nr_list(&sched_ctrl->feedback_ul_harq, nrofHARQ); + create_nr_list(&sched_ctrl->retrans_ul_harq, nrofHARQ); + } else if (sched_ctrl->available_ul_harq.len == nrofHARQ) { + LOG_D(NR_MAC, "nrofHARQ %d already configured\n", nrofHARQ); + } else { + const int old_nrofHARQ = sched_ctrl->available_ul_harq.len; + AssertFatal(nrofHARQ > old_nrofHARQ, + "cannot resize HARQ list to be smaller (nrofHARQ %d, old_nrofHARQ %d)\n", + nrofHARQ, old_nrofHARQ); + resize_nr_list(&sched_ctrl->available_ul_harq, nrofHARQ); + for (int harq = old_nrofHARQ; harq < nrofHARQ; harq++) + add_tail_nr_list(&sched_ctrl->available_ul_harq, harq); + resize_nr_list(&sched_ctrl->feedback_ul_harq, nrofHARQ); + resize_nr_list(&sched_ctrl->retrans_ul_harq, nrofHARQ); + } +} + void reset_dl_harq_list(NR_UE_sched_ctrl_t *sched_ctrl) { int harq; while ((harq = sched_ctrl->feedback_dl_harq.head) >= 0) { @@ -2980,8 +2987,9 @@ static void nr_mac_apply_cellgroup(gNB_MAC_INST *mac, NR_UE_info_t *UE, frame_t reset_srs_stats(UE); if (get_softmodem_params()->sa) { - // add all available DL HARQ processes for this UE in SA + // add all available DL,UL HARQ processes for this UE in SA create_dl_harq_list(sched_ctrl, &UE->sc_info); + create_ul_harq_list(sched_ctrl, &UE->sc_info); } } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 938d5cf27b..82fc2ceee1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -281,8 +281,6 @@ int get_spf(nfapi_nr_config_request_scf_t *cfg); int to_absslot(nfapi_nr_config_request_scf_t *cfg,int frame,int slot); -int get_nrofHARQ_ProcessesForPDSCH(e_NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH n); - void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu, int x_overhead, uint8_t numdmrscdmgroupnodata, @@ -351,6 +349,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, void create_dl_harq_list(NR_UE_sched_ctrl_t *sched_ctrl, const NR_UE_ServingCell_Info_t *sc_info); +void create_ul_harq_list(NR_UE_sched_ctrl_t *sched_ctrl, const NR_UE_ServingCell_Info_t *sc_info); + void reset_dl_harq_list(NR_UE_sched_ctrl_t *sched_ctrl); void reset_ul_harq_list(NR_UE_sched_ctrl_t *sched_ctrl); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 8362a61205..7792b70f6d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -156,6 +156,8 @@ typedef struct nr_mac_config_t { //int pusch_TargetSNRx10; //int pucch_TargetSNRx10; nr_mac_timers_t timer_config; + int num_dlharq; + int num_ulharq; } nr_mac_config_t; typedef struct NR_preamble_ue { diff --git a/openair2/RRC/NR/nr_rrc_config.c b/openair2/RRC/NR/nr_rrc_config.c index dd3b3db216..e5f0c295b5 100644 --- a/openair2/RRC/NR/nr_rrc_config.c +++ b/openair2/RRC/NR/nr_rrc_config.c @@ -2599,6 +2599,107 @@ static NR_MAC_CellGroupConfig_t *configure_mac_cellgroup(const nr_mac_timers_t * return mac_CellGroupConfig; } +// Set HARQ related IEs according to the number of DL, UL harqprocesses configured +static void fill_harq_IEs(NR_ServingCellConfig_t *scc, int num_dlharq, int num_ulharq) +{ + + AssertFatal(scc && scc->pdsch_ServingCellConfig && + scc->pdsch_ServingCellConfig->present == NR_SetupRelease_PDSCH_ServingCellConfig_PR_setup, + "PDSCH_Servingcellconfig IEs NOT present\n"); + + NR_PDSCH_ServingCellConfig_t *pdsch_scc = scc->pdsch_ServingCellConfig->choice.setup; + + switch (num_dlharq) { + case 2: + *pdsch_scc->nrofHARQ_ProcessesForPDSCH = NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n2; + break; + case 4: + *pdsch_scc->nrofHARQ_ProcessesForPDSCH = NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n4; + break; + case 6: + *pdsch_scc->nrofHARQ_ProcessesForPDSCH = NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n6; + break; + case 8: + // 8 if IEs nrofHARQ_ProcessesForPDSCH and nrofHARQ_ProcessesForPDSCH_v1700 are not present + free_and_zero(pdsch_scc->nrofHARQ_ProcessesForPDSCH); + break; + case 10: + *pdsch_scc->nrofHARQ_ProcessesForPDSCH = NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n10; + break; + case 12: + *pdsch_scc->nrofHARQ_ProcessesForPDSCH = NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n12; + break; + case 16: + *pdsch_scc->nrofHARQ_ProcessesForPDSCH = NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n16; + break; + case 32: + if (!pdsch_scc->ext3) + pdsch_scc->ext3 = calloc(1, sizeof(*pdsch_scc->ext3)); + asn1cCallocOne(pdsch_scc->ext3->nrofHARQ_ProcessesForPDSCH_v1700, + NR_PDSCH_ServingCellConfig__ext3__nrofHARQ_ProcessesForPDSCH_v1700_n32); + NR_BWP_DownlinkDedicated_t *dlbwp = scc->initialDownlinkBWP; + if (dlbwp && dlbwp->pdsch_Config && + dlbwp->pdsch_Config->present == NR_SetupRelease_PDSCH_Config_PR_setup) { + NR_PDSCH_Config_t *dlcfg = scc->initialDownlinkBWP->pdsch_Config->choice.setup; + if (!dlcfg->ext3) + dlcfg->ext3 = calloc(1, sizeof(*dlcfg->ext3)); + asn1cCallocOne(dlcfg->ext3->harq_ProcessNumberSizeDCI_1_1_r17, 5); + } + int num_dl_bwp = 0; + if (scc->downlinkBWP_ToAddModList) + num_dl_bwp = scc->downlinkBWP_ToAddModList->list.count; + for (int i = 0;i < num_dl_bwp; i++) { + dlbwp = scc->downlinkBWP_ToAddModList->list.array[i]->bwp_Dedicated; + if (dlbwp && dlbwp->pdsch_Config && + dlbwp->pdsch_Config->present == NR_SetupRelease_PDSCH_Config_PR_setup) { + NR_PDSCH_Config_t *dlcfg = dlbwp->pdsch_Config->choice.setup; + if (!dlcfg->ext3) + dlcfg->ext3 = calloc(1, sizeof(*dlcfg->ext3)); + asn1cCallocOne(dlcfg->ext3->harq_ProcessNumberSizeDCI_1_1_r17, 5); + } + } + break; + default: // Already IE should have been set to 16 harq processes + break; + } + + + AssertFatal(scc->uplinkConfig,"uplinkConfig IE NOT present\n"); + + if (num_ulharq == 32) { + if (!scc->uplinkConfig->pusch_ServingCellConfig) + scc->uplinkConfig->pusch_ServingCellConfig = calloc(1, sizeof(*scc->uplinkConfig->pusch_ServingCellConfig)); + scc->uplinkConfig->pusch_ServingCellConfig->present = NR_SetupRelease_PUSCH_ServingCellConfig_PR_setup; + if (!scc->uplinkConfig->pusch_ServingCellConfig->choice.setup) + scc->uplinkConfig->pusch_ServingCellConfig->choice.setup = calloc(1, sizeof(NR_PUSCH_ServingCellConfig_t)); + NR_PUSCH_ServingCellConfig_t *pusch_scc = scc->uplinkConfig->pusch_ServingCellConfig->choice.setup; + if (!pusch_scc->ext3) + pusch_scc->ext3 = calloc(1, sizeof(*pusch_scc->ext3)); + asn1cCallocOne(pusch_scc->ext3->nrofHARQ_ProcessesForPUSCH_r17, + NR_PUSCH_ServingCellConfig__ext3__nrofHARQ_ProcessesForPUSCH_r17_n32); + NR_BWP_UplinkDedicated_t *ulbwp = scc->uplinkConfig->initialUplinkBWP; + if (ulbwp && ulbwp->pusch_Config && + ulbwp->pusch_Config->present == NR_SetupRelease_PUSCH_Config_PR_setup) { + NR_PUSCH_Config_t *ulcfg = ulbwp->pusch_Config->choice.setup; + if (!ulcfg->ext2) + ulcfg->ext2 = calloc(1, sizeof(*ulcfg->ext2)); + asn1cCallocOne(ulcfg->ext2->harq_ProcessNumberSizeDCI_0_1_r17, 5); + } + int num_ul_bwp = 0; + if (scc->uplinkConfig->uplinkBWP_ToAddModList) + num_ul_bwp = scc->uplinkConfig->uplinkBWP_ToAddModList->list.count; + for (int i = 0;i < num_ul_bwp; i++) { + ulbwp = scc->uplinkConfig->uplinkBWP_ToAddModList->list.array[i]->bwp_Dedicated; + if (ulbwp && ulbwp->pusch_Config && + ulbwp->pusch_Config->present == NR_SetupRelease_PUSCH_Config_PR_setup) { + NR_PUSCH_Config_t *ulcfg = ulbwp->pusch_Config->choice.setup; + if (!ulcfg->ext2) + ulcfg->ext2 = calloc(1, sizeof(*ulcfg->ext2)); + asn1cCallocOne(ulcfg->ext2->harq_ProcessNumberSizeDCI_0_1_r17, 5); + } + } + } +} static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid, const NR_ServingCellConfigCommon_t *scc, @@ -2681,12 +2782,12 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid, pdsch_servingcellconfig->codeBlockGroupTransmission = NULL; pdsch_servingcellconfig->xOverhead = NULL; - pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH = calloc(1, sizeof(*pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH)); - *pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH = NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n16; + asn1cCallocOne(pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH, NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n16); pdsch_servingcellconfig->pucch_Cell = NULL; set_dl_maxmimolayers(pdsch_servingcellconfig, scc, NULL, configuration->maxMIMO_layers); if (configuration->disable_harq) { - pdsch_servingcellconfig->ext3 = calloc(1, sizeof(*pdsch_servingcellconfig->ext3)); + if (!pdsch_servingcellconfig->ext3) + pdsch_servingcellconfig->ext3 = calloc(1, sizeof(*pdsch_servingcellconfig->ext3)); pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17 = calloc(1, sizeof(*pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17)); pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17->present = NR_SetupRelease_DownlinkHARQ_FeedbackDisabled_r17_PR_setup; pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17->choice.setup.buf = calloc(4, sizeof(uint8_t)); @@ -2848,6 +2949,8 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid, config_rsrp_meas_report(csi_MeasConfig, scc, pucchrsrp, configuration->do_CSIRS, bwp_id + 10, uid, pdsch_AntennaPorts); } + fill_harq_IEs(SpCellConfig->spCellConfigDedicated, configuration->num_dlharq, configuration->num_ulharq); + if (LOG_DEBUGFLAG(DEBUG_ASN1)) { xer_fprint(stdout, &asn_DEF_NR_SpCellConfig, SpCellConfig); } @@ -2936,16 +3039,15 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, } *pusch_Config->maxRank = ul_max_layers; } - if (uplinkConfig->pusch_ServingCellConfig == NULL) { + if (!uplinkConfig->pusch_ServingCellConfig) uplinkConfig->pusch_ServingCellConfig = calloc(1, sizeof(*uplinkConfig->pusch_ServingCellConfig)); - uplinkConfig->pusch_ServingCellConfig->present = NR_SetupRelease_PUSCH_ServingCellConfig_PR_setup; + uplinkConfig->pusch_ServingCellConfig->present = NR_SetupRelease_PUSCH_ServingCellConfig_PR_setup; + if (!uplinkConfig->pusch_ServingCellConfig->choice.setup) uplinkConfig->pusch_ServingCellConfig->choice.setup = calloc(1, sizeof(*uplinkConfig->pusch_ServingCellConfig->choice.setup)); + if (!uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1) uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1 = calloc(1, sizeof(*uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1)); - uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers = - calloc(1, sizeof(*uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers)); - } - *uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers = ul_max_layers; + asn1cCallocOne(uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers, ul_max_layers); } long maxMIMO_Layers = uplinkConfig && uplinkConfig->pusch_ServingCellConfig @@ -3249,18 +3351,23 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToReleaseList = NULL; secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToReleaseList = NULL; - secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig = - calloc(1, sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig)); - NR_PUSCH_ServingCellConfig_t *pusch_scc = calloc(1, sizeof(*pusch_scc)); + if (!secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig) + secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig = + calloc(1, sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig)); secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->present = NR_SetupRelease_PUSCH_ServingCellConfig_PR_setup; - secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup = pusch_scc; + if (!secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup) + secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup = calloc( + 1, + sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup)); + NR_PUSCH_ServingCellConfig_t *pusch_scc = + secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup; pusch_scc->codeBlockGroupTransmission = NULL; pusch_scc->rateMatching = NULL; pusch_scc->xOverhead = NULL; - pusch_scc->ext1 = calloc(1, sizeof(*pusch_scc->ext1)); - pusch_scc->ext1->maxMIMO_Layers = calloc(1, sizeof(*pusch_scc->ext1->maxMIMO_Layers)); - *pusch_scc->ext1->maxMIMO_Layers = 1; + if (!pusch_scc->ext1) + pusch_scc->ext1 = calloc(1, sizeof(*pusch_scc->ext1)); + asn1cCallocOne(pusch_scc->ext1->maxMIMO_Layers, 1); pusch_scc->ext1->processingType2Enabled = NULL; secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->carrierSwitching = NULL; @@ -3275,13 +3382,13 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC secondaryCellGroup->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup = pdsch_servingcellconfig; pdsch_servingcellconfig->codeBlockGroupTransmission = NULL; pdsch_servingcellconfig->xOverhead = NULL; - pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH = calloc(1, sizeof(*pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH)); - *pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH = NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n16; + asn1cCallocOne(pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH, NR_PDSCH_ServingCellConfig__nrofHARQ_ProcessesForPDSCH_n16); pdsch_servingcellconfig->pucch_Cell = NULL; set_dl_maxmimolayers(pdsch_servingcellconfig, servingcellconfigcommon, uecap, configuration->maxMIMO_layers); pdsch_servingcellconfig->ext1->processingType2Enabled = NULL; if (configuration->disable_harq) { - pdsch_servingcellconfig->ext3 = calloc(1, sizeof(*pdsch_servingcellconfig->ext3)); + if (!pdsch_servingcellconfig->ext3) + pdsch_servingcellconfig->ext3 = calloc(1, sizeof(*pdsch_servingcellconfig->ext3)); pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17 = calloc(1, sizeof(*pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17)); pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17->present = NR_SetupRelease_DownlinkHARQ_FeedbackDisabled_r17_PR_setup; pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17->choice.setup.buf = calloc(4, sizeof(uint8_t)); @@ -3385,6 +3492,8 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC secondaryCellGroup->spCellConfig->spCellConfigDedicated->pathlossReferenceLinking = NULL; secondaryCellGroup->spCellConfig->spCellConfigDedicated->servingCellMO = NULL; + fill_harq_IEs(secondaryCellGroup->spCellConfig->spCellConfigDedicated, configuration->num_dlharq, configuration->num_ulharq); + if (LOG_DEBUGFLAG(DEBUG_ASN1)) { xer_fprint(stdout, &asn_DEF_NR_SpCellConfig, (void *)secondaryCellGroup->spCellConfig); } From dafaea7ddad9e28d9ccd8f1915ff50c5cc50a199 Mon Sep 17 00:00:00 2001 From: Raghavendra Dinavahi Date: Thu, 1 Aug 2024 17:54:47 +0200 Subject: [PATCH 3/3] enable HARQ32, Changes in UE - num DL/UL harq processes, bits for harq id in DCIs, set according to IEs configured in RRC messages - removed going through all the harq processes before triggering nr_ue_ulsch_procedures in phy_procedures_nr_ue.c - did not remove usage of MAX_HARQ_PROCESSES in init phase --- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 9 +-- openair2/LAYER2/NR_MAC_UE/config_ue.c | 75 ++++++++++--------- openair2/LAYER2/NR_MAC_UE/main_ue_nr.c | 2 + .../LAYER2/NR_MAC_UE/nr_ue_power_procedures.c | 4 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 38 +++++----- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 4 +- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 2 +- 7 files changed, 71 insertions(+), 63 deletions(-) diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index 0653947bec..2f2e71dcee 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -276,11 +276,10 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, n LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx); start_meas_nr_ue_phy(ue, PHY_PROC_TX); - for (uint8_t harq_pid = 0; harq_pid < NR_MAX_ULSCH_HARQ_PROCESSES; harq_pid++) { - if (ue->ul_harq_processes[harq_pid].ULstatus == ACTIVE) { - nr_ue_ulsch_procedures(ue, harq_pid, frame_tx, slot_tx, gNB_id, phy_data, (c16_t **)&txdataF); - } - } + + int harq_pid = phy_data->ulsch.pusch_pdu.pusch_data.harq_process_id; + if (ue->ul_harq_processes[harq_pid].ULstatus == ACTIVE) + nr_ue_ulsch_procedures(ue, harq_pid, frame_tx, slot_tx, gNB_id, phy_data, (c16_t **)&txdataF); ue_srs_procedures_nr(ue, proc, (c16_t **)&txdataF); diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 1baaba8221..728307d3b8 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -984,6 +984,13 @@ static void setup_puschconfig(NR_UE_MAC_INST_t *mac, NR_PUSCH_Config_t *source, struct NR_UCI_OnPUSCH__betaOffsets); } } + if (source->ext2) { + if (!target->ext2) + target->ext2 = calloc(1, sizeof(*target->ext2)); + UPDATE_IE(target->ext2->harq_ProcessNumberSizeDCI_0_1_r17, source->ext2->harq_ProcessNumberSizeDCI_0_1_r17, long); + } else if (target->ext2) { + free_and_zero(target->ext2->harq_ProcessNumberSizeDCI_0_1_r17); + } } static void configure_csi_resourcemapping(NR_CSI_RS_ResourceMapping_t *target, NR_CSI_RS_ResourceMapping_t *source) @@ -1131,6 +1138,13 @@ static void setup_pdschconfig(NR_PDSCH_Config_t *source, NR_PDSCH_Config_t *targ asn_DEF_NR_ZP_CSI_RS_ResourceSet); AssertFatal(source->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList == NULL, "Not handled\n"); AssertFatal(source->sp_ZP_CSI_RS_ResourceSetsToAddModList == NULL, "Not handled\n"); + if (source->ext3) { + if (!target->ext3) + target->ext3 = calloc(1, sizeof(*target->ext3)); + UPDATE_IE(target->ext3->harq_ProcessNumberSizeDCI_1_1_r17, source->ext3->harq_ProcessNumberSizeDCI_1_1_r17, long); + } else if (target->ext3) { + free_and_zero(target->ext3->harq_ProcessNumberSizeDCI_1_1_r17); + } } static void setup_sr_resource(NR_SchedulingRequestResourceConfig_t *target, NR_SchedulingRequestResourceConfig_t *source) @@ -1524,10 +1538,8 @@ static void configure_common_BWP_ul(NR_UE_MAC_INST_t *mac, int bwp_id, NR_BWP_Up } if (ul_common->pusch_ConfigCommon->present == NR_SetupRelease_PUSCH_ConfigCommon_PR_release) { asn1cFreeStruc(asn_DEF_NR_PUSCH_TimeDomainResourceAllocationList, bwp->tdaList_Common); - free(bwp->msg3_DeltaPreamble); - bwp->msg3_DeltaPreamble = NULL; - free(bwp->p0_NominalWithGrant); - bwp->p0_NominalWithGrant = NULL; + free_and_zero(bwp->msg3_DeltaPreamble); + free_and_zero(bwp->p0_NominalWithGrant); } } } @@ -2150,18 +2162,12 @@ static void configure_servingcell_info(NR_UE_MAC_INST_t *mac, NR_ServingCellConf break; case NR_SetupRelease_PDSCH_ServingCellConfig_PR_release: // release all configurations - if (sc_info->pdsch_CGB_Transmission) - asn1cFreeStruc(asn_DEF_NR_PDSCH_CodeBlockGroupTransmission, sc_info->pdsch_CGB_Transmission); - if (sc_info->xOverhead_PDSCH) { - free(sc_info->xOverhead_PDSCH); - sc_info->xOverhead_PDSCH = NULL; - } - if (sc_info->maxMIMO_Layers_PDSCH) { - free(sc_info->maxMIMO_Layers_PDSCH); - sc_info->maxMIMO_Layers_PDSCH = NULL; - } - if (sc_info->downlinkHARQ_FeedbackDisabled_r17) - asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc_info->downlinkHARQ_FeedbackDisabled_r17); + asn1cFreeStruc(asn_DEF_NR_PDSCH_CodeBlockGroupTransmission, sc_info->pdsch_CGB_Transmission); + free_and_zero(sc_info->xOverhead_PDSCH); + free_and_zero(sc_info->maxMIMO_Layers_PDSCH); + free_and_zero(sc_info->nrofHARQ_ProcessesForPDSCH); + free_and_zero(sc_info->nrofHARQ_ProcessesForPDSCH_v1700); + asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc_info->downlinkHARQ_FeedbackDisabled_r17); break; case NR_SetupRelease_PDSCH_ServingCellConfig_PR_setup: { NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig = scd->pdsch_ServingCellConfig->choice.setup; @@ -2173,13 +2179,17 @@ static void configure_servingcell_info(NR_UE_MAC_INST_t *mac, NR_ServingCellConf UPDATE_IE(sc_info->xOverhead_PDSCH, pdsch_servingcellconfig->xOverhead, long); if (pdsch_servingcellconfig->ext1 && pdsch_servingcellconfig->ext1->maxMIMO_Layers) UPDATE_IE(sc_info->maxMIMO_Layers_PDSCH, pdsch_servingcellconfig->ext1->maxMIMO_Layers, long); + UPDATE_IE(sc_info->nrofHARQ_ProcessesForPDSCH, pdsch_servingcellconfig->nrofHARQ_ProcessesForPDSCH, long); + if (pdsch_servingcellconfig->ext3) + UPDATE_IE(sc_info->nrofHARQ_ProcessesForPDSCH_v1700, pdsch_servingcellconfig->ext3->nrofHARQ_ProcessesForPDSCH_v1700, long); + else + free_and_zero(sc_info->nrofHARQ_ProcessesForPDSCH_v1700); if (pdsch_servingcellconfig->ext3 && pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17) { switch (pdsch_servingcellconfig->ext3->downlinkHARQ_FeedbackDisabled_r17->present) { case NR_SetupRelease_DownlinkHARQ_FeedbackDisabled_r17_PR_NOTHING: break; case NR_SetupRelease_DownlinkHARQ_FeedbackDisabled_r17_PR_release: - if (sc_info->downlinkHARQ_FeedbackDisabled_r17) - asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc_info->downlinkHARQ_FeedbackDisabled_r17); + asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc_info->downlinkHARQ_FeedbackDisabled_r17); break; case NR_SetupRelease_DownlinkHARQ_FeedbackDisabled_r17_PR_setup: if (sc_info->downlinkHARQ_FeedbackDisabled_r17 == NULL) { @@ -2207,20 +2217,11 @@ static void configure_servingcell_info(NR_UE_MAC_INST_t *mac, NR_ServingCellConf break; case NR_SetupRelease_PUSCH_ServingCellConfig_PR_release: // release all configurations - if (sc_info->pusch_CGB_Transmission) - asn1cFreeStruc(asn_DEF_NR_PUSCH_CodeBlockGroupTransmission, sc_info->pusch_CGB_Transmission); - if (sc_info->rateMatching_PUSCH) { - free(sc_info->rateMatching_PUSCH); - sc_info->rateMatching_PUSCH = NULL; - } - if (sc_info->xOverhead_PUSCH) { - free(sc_info->xOverhead_PUSCH); - sc_info->xOverhead_PUSCH = NULL; - } - if (sc_info->maxMIMO_Layers_PUSCH) { - free(sc_info->maxMIMO_Layers_PUSCH); - sc_info->maxMIMO_Layers_PUSCH = NULL; - } + asn1cFreeStruc(asn_DEF_NR_PUSCH_CodeBlockGroupTransmission, sc_info->pusch_CGB_Transmission); + free_and_zero(sc_info->rateMatching_PUSCH); + free_and_zero(sc_info->xOverhead_PUSCH); + free_and_zero(sc_info->maxMIMO_Layers_PUSCH); + free_and_zero(sc_info->nrofHARQ_ProcessesForPUSCH_r17); break; case NR_SetupRelease_PUSCH_ServingCellConfig_PR_setup: { NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig = scd->uplinkConfig->pusch_ServingCellConfig->choice.setup; @@ -2233,6 +2234,10 @@ static void configure_servingcell_info(NR_UE_MAC_INST_t *mac, NR_ServingCellConf pusch_servingcellconfig->codeBlockGroupTransmission, NR_PUSCH_CodeBlockGroupTransmission_t, asn_DEF_NR_PUSCH_CodeBlockGroupTransmission); + if (pusch_servingcellconfig->ext3) + UPDATE_IE(sc_info->nrofHARQ_ProcessesForPUSCH_r17, pusch_servingcellconfig->ext3->nrofHARQ_ProcessesForPUSCH_r17, long); + else + free_and_zero(sc_info->nrofHARQ_ProcessesForPUSCH_r17); break; } default: @@ -2316,10 +2321,8 @@ void release_ul_BWP(NR_UE_MAC_INST_t *mac, int index) asn1cFreeStruc(asn_DEF_NR_PUCCH_Config, bwp->pucch_Config); asn1cFreeStruc(asn_DEF_NR_PUCCH_ConfigCommon, bwp->pucch_ConfigCommon); asn1cFreeStruc(asn_DEF_NR_SRS_Config, bwp->srs_Config); - free(bwp->msg3_DeltaPreamble); - bwp->msg3_DeltaPreamble = NULL; - free(bwp->p0_NominalWithGrant); - bwp->p0_NominalWithGrant = NULL; + free_and_zero(bwp->msg3_DeltaPreamble); + free_and_zero(bwp->p0_NominalWithGrant); free(bwp); } diff --git a/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c b/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c index d2034893bc..fc4212d604 100644 --- a/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c +++ b/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c @@ -276,6 +276,8 @@ void release_mac_configuration(NR_UE_MAC_INST_t *mac, NR_UE_MAC_reset_cause_t ca asn1cFreeStruc(asn_DEF_NR_DownlinkHARQ_FeedbackDisabled_r17, sc->downlinkHARQ_FeedbackDisabled_r17); free(sc->xOverhead_PDSCH); free(sc->nrofHARQ_ProcessesForPDSCH); + free(sc->nrofHARQ_ProcessesForPDSCH_v1700); + free(sc->nrofHARQ_ProcessesForPUSCH_r17); free(sc->rateMatching_PUSCH); free(sc->xOverhead_PUSCH); free(sc->maxMIMO_Layers_PDSCH); diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_power_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_power_procedures.c index de16ba3d6a..36fbf3a527 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_power_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_power_procedures.c @@ -245,7 +245,9 @@ float nr_get_Pcmin(int bandwidth_index) { int get_sum_delta_pucch(NR_UE_MAC_INST_t *mac, int slot, frame_t frame) { int delta_tpc_sum = 0; - for (int i = 0; i < NR_MAX_HARQ_PROCESSES; i++) { + const int num_dl_harq = get_nrofHARQ_ProcessesForPDSCH(&mac->sc_info); + + for (int i = 0; i < num_dl_harq; i++) { if (mac->dl_harq_info[i].active && mac->dl_harq_info[i].ul_slot == slot && mac->dl_harq_info[i].ul_frame == frame) { delta_tpc_sum += mac->dl_harq_info[i].delta_pucch; mac->dl_harq_info[i].delta_pucch = 0; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 36c04447f1..4bc8470d04 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -805,7 +805,7 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac, /* MCS */ dlsch_pdu->mcs = dci->mcs; - NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dci->harq_pid]; + NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dci->harq_pid.val]; /* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ if (dl_conf_req->pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH || dl_conf_req->pdu_type == FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH || @@ -873,7 +873,7 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac, /* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ dlsch_pdu->rv = dci->rv; /* HARQ_PROCESS_NUMBER (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_pdu->harq_process_nbr = dci->harq_pid; + dlsch_pdu->harq_process_nbr = dci->harq_pid.val; /* TB_SCALING (only if CRC scrambled by P-RNTI or RA-RNTI) */ // according to TS 38.214 Table 5.1.3.2-3 if (dci->tb_scaling > 3) { @@ -926,7 +926,7 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac, const int tpc[] = {-1, 0, 1, 3}; set_harq_status(mac, dci->pucch_resource_indicator, - dci->harq_pid, + dci->harq_pid.val, tpc[dci->tpc], feedback_ti, dci->dai[0].val, @@ -1125,7 +1125,7 @@ static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac, /* MCS (for transport block 1)*/ dlsch_pdu->mcs = dci->mcs; /* NDI (for transport block 1)*/ - NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dci->harq_pid]; + NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dci->harq_pid.val]; if (dci->ndi != current_harq->last_ndi) { // new data dlsch_pdu->new_data_indicator = true; @@ -1145,7 +1145,7 @@ static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac, /* RV (for transport block 2)*/ dlsch_pdu->tb2_rv = dci->rv2.val; /* HARQ_PROCESS_NUMBER */ - dlsch_pdu->harq_process_nbr = dci->harq_pid; + dlsch_pdu->harq_process_nbr = dci->harq_pid.val; /* TPC_PUCCH */ // according to TS 38.213 Table 7.2.1-1 if (dci->tpc > 3) { @@ -1266,7 +1266,7 @@ static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac, const int tpc[] = {-1, 0, 1, 3}; set_harq_status(mac, dci->pucch_resource_indicator, - dci->harq_pid, + dci->harq_pid.val, tpc[dci->tpc], feedback_ti, dci->dai[0].val, @@ -1480,7 +1480,8 @@ void set_harq_status(NR_UE_MAC_INST_t *mac, // we need to keep track of how many DAI we received in a slot (dai_cumul) despite the modulo operation int highest_dai = -1; int temp_dai = dai; - for (int i = 0; i < NR_MAX_HARQ_PROCESSES; i++) { + const int num_dl_harq = get_nrofHARQ_ProcessesForPDSCH(&mac->sc_info); + for (int i = 0; i < num_dl_harq; i++) { // looking for other active HARQ processes with feedback in the same frame/slot if (i == harq_id) continue; @@ -2317,12 +2318,13 @@ bool get_downlink_ack(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, PUCCH_sche number_of_code_word = 2; } + const int num_dl_harq = get_nrofHARQ_ProcessesForPDSCH(&mac->sc_info); int res_ind = -1; /* look for dl acknowledgment which should be done on current uplink slot */ for (int code_word = 0; code_word < number_of_code_word; code_word++) { - for (int dl_harq_pid = 0; dl_harq_pid < NR_MAX_HARQ_PROCESSES; dl_harq_pid++) { + for (int dl_harq_pid = 0; dl_harq_pid < num_dl_harq; dl_harq_pid++) { NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[dl_harq_pid]; @@ -3058,8 +3060,8 @@ static void extract_10_c_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci EXTRACT_DCI_ITEM(dci_pdu_rel15->ndi, 1); // Redundancy version 2bit EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2); - // HARQ process number 4bit - EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4); + // HARQ process number 4/5 bit + EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, dci_pdu_rel15->harq_pid.nbits); // Downlink assignment index 2bit EXTRACT_DCI_ITEM(dci_pdu_rel15->dai[0].val, 2); // TPC command for scheduled PUCCH 2bit @@ -3088,7 +3090,7 @@ static void extract_00_c_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci // Redundancy version 2bit EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2); // HARQ process number 4bit - EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4); + EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, 4); // TPC command for scheduled PUSCH  E2 bits EXTRACT_DCI_ITEM(dci_pdu_rel15->tpc, 2); // UL/SUL indicator  E1 bit @@ -3115,7 +3117,7 @@ static void extract_10_tc_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dc // Redundancy version - 2 bits EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2); // HARQ process number - 4 bits - EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4); + EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, 4); // Downlink assignment index - 2 bits EXTRACT_DCI_ITEM(dci_pdu_rel15->dai[0].val, 2); // TPC command for scheduled PUCCH - 2 bits @@ -3128,7 +3130,7 @@ static void extract_10_tc_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dc static void extract_00_tc_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci_pdu, int pos) { - LOG_D(NR_MAC_DCI, "Received dci 1_0 TC rnti\n"); + LOG_D(NR_MAC_DCI, "Received dci 0_0 TC rnti\n"); // Frequency domain assignment EXTRACT_DCI_ITEM(dci_pdu_rel15->frequency_domain_assignment.val, dci_pdu_rel15->frequency_domain_assignment.nbits); @@ -3143,7 +3145,7 @@ static void extract_00_tc_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dc // Redundancy version 2bit EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2); // HARQ process number 4bit - EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4); + EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, 4); // TPC command for scheduled PUSCH  E2 bits EXTRACT_DCI_ITEM(dci_pdu_rel15->tpc, 2); } @@ -3182,8 +3184,8 @@ static void extract_11_c_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci EXTRACT_DCI_ITEM(dci_pdu_rel15->ndi2.val, dci_pdu_rel15->ndi2.nbits); // Redundancy version 2bit EXTRACT_DCI_ITEM(dci_pdu_rel15->rv2.val, dci_pdu_rel15->rv2.nbits); - // HARQ process number 4bit - EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4); + // HARQ process number 4/5 bit + EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, dci_pdu_rel15->harq_pid.nbits); // Downlink assignment index EXTRACT_DCI_ITEM(dci_pdu_rel15->dai[0].val, dci_pdu_rel15->dai[0].nbits); // TPC command for scheduled PUCCH 2bit @@ -3231,8 +3233,8 @@ static void extract_01_c_rnti(dci_pdu_rel15_t *dci_pdu_rel15, const uint8_t *dci EXTRACT_DCI_ITEM(dci_pdu_rel15->ndi, 1); // Redundancy version 2bit EXTRACT_DCI_ITEM(dci_pdu_rel15->rv, 2); - // HARQ process number 4bit - EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid, 4); + // HARQ process number 4/5 bit + EXTRACT_DCI_ITEM(dci_pdu_rel15->harq_pid.val, dci_pdu_rel15->harq_pid.nbits); // 1st Downlink assignment index EXTRACT_DCI_ITEM(dci_pdu_rel15->dai[0].val, dci_pdu_rel15->dai[0].nbits); // 2nd Downlink assignment index diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index c1d7238d41..64b6c3bf11 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -814,7 +814,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, pusch_config_pdu->mcs_table = get_pusch_mcs_table(mcs_table_config, tp_enabled, dci_format, rnti_type, ss_type, false); /* NDI */ - NR_UL_HARQ_INFO_t *harq = &mac->ul_harq_info[dci->harq_pid]; + NR_UL_HARQ_INFO_t *harq = &mac->ul_harq_info[dci->harq_pid.val]; pusch_config_pdu->pusch_data.new_data_indicator = false; if (dci->ndi != harq->last_ndi) { pusch_config_pdu->pusch_data.new_data_indicator = true; @@ -825,7 +825,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, /* RV */ pusch_config_pdu->pusch_data.rv_index = dci->rv; /* HARQ_PROCESS_NUMBER */ - pusch_config_pdu->pusch_data.harq_process_id = dci->harq_pid; + pusch_config_pdu->pusch_data.harq_process_id = dci->harq_pid.val; if (NR_DMRS_ulconfig != NULL) add_pos = (NR_DMRS_ulconfig->dmrs_AdditionalPosition == NULL) ? 2 : *NR_DMRS_ulconfig->dmrs_AdditionalPosition; diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 6dc6172ef7..510640788d 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -1179,7 +1179,7 @@ static uint32_t nr_ue_dl_processing(nr_downlink_indication_t *dl_info) continue; } dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dl_info->slot][dci_format]; - g_harq_pid = def_dci_pdu_rel15->harq_pid; + g_harq_pid = def_dci_pdu_rel15->harq_pid.val; LOG_T(NR_MAC, "Setting harq_pid = %d and dci_index = %d (based on format)\n", g_harq_pid, dci_format); ret_mask |= (1 << FAPI_NR_DCI_IND);