UL is now being scheduled but not decoded ok yet
This commit is contained in:
committed by
Florian Kaltenberger
parent
2605e3f18a
commit
00f0e0ccb8
+3
-4
@@ -356,7 +356,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
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nr_scheduled_response_t scheduled_response;
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// program PUSCH. this should actually be done by the MAC upon reception of an UL DCI
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if (proc->nr_tti_tx == NR_UPLINK_SLOT || UE->frame_parms.frame_type == FDD){
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if (proc->nr_tti_tx == 8 || UE->frame_parms.frame_type == FDD){
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dcireq.module_id = UE->Mod_id;
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dcireq.gNB_index = 0;
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@@ -383,7 +383,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
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rvidx = 0;
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//------------------------------------------------------------------------------//
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scheduled_response.ul_config->sfn_slot = NR_UPLINK_SLOT;
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scheduled_response.ul_config->sfn_slot = 8;
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scheduled_response.ul_config->number_pdus = 1;
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scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
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@@ -735,7 +735,6 @@ void *UE_thread(void *arg) {
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readBlockSize,
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UE->frame_parms.nb_antennas_rx),"");
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if (slot_nr==18)
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AssertFatal( writeBlockSize ==
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UE->rfdevice.trx_write_func(&UE->rfdevice,
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timestamp+
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@@ -745,7 +744,7 @@ if (slot_nr==18)
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txp,
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writeBlockSize,
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UE->frame_parms.nb_antennas_tx,
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4),"");
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1),"");
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if( slot_nr==(nb_slot_frame-1)) {
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// read in first symbol of next frame and adjust for timing drift
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