From b2765ac23a3b07dfd3555f9f1d66cd04614eadf9 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Tue, 28 Jan 2020 13:41:59 +0100 Subject: [PATCH 01/24] some changes in pucchsim --- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c | 13 ++--- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h | 4 +- openair1/SIMULATION/NR_PHY/pucchsim.c | 67 ++++++++++++++----------- openair2/GNB_APP/RRC_nr_paramsvalues.h | 24 ++++----- 4 files changed, 55 insertions(+), 53 deletions(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c index 351c4ea22a..d68b3ea1a4 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c @@ -46,6 +46,7 @@ #define DEBUG_PUCCH_TX #define DEBUG_NR_PUCCH_TX #endif + //#define ONE_OVER_SQRT2 23170 // 32767/sqrt(2) = 23170 (ONE_OVER_SQRT2) void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, @@ -74,10 +75,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, // Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2) BIT STRING (SIZE (10)) //uint16_t n_id = ue->pucch_config_common_nr->hoppingId; // from higher layers FIXME!!! #ifdef DEBUG_NR_PUCCH_TX - // initialization to be removed - PUCCH_GroupHopping=neither; - n_id=10; - printf("\t\t [nr_group_sequence_hopping] initialization PUCCH_GroupHopping=%u, n_id=%u -> variable initializations TO BE REMOVED\n",PUCCH_GroupHopping,n_id); + printf("\t\t [nr_group_sequence_hopping] PUCCH_GroupHopping=%u, n_id=%u \n",PUCCH_GroupHopping,n_id); #endif uint8_t f_ss=0,f_gh=0; *u=0; @@ -156,11 +154,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id, // alpha_init initialized to 2*PI/12=0.5235987756 double alpha = 0.5235987756; uint32_t c_init = n_id; // we initialize c_init again to calculate n_cs -#ifdef DEBUG_NR_PUCCH_TX - // initialization to be remo.ved - c_init=10; - printf("\t\t [nr_cyclic_shift_hopping] initialization c_init=%u -> variable initialization TO BE REMOVED\n",c_init); -#endif + uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1 uint8_t n_cs=0; int l = 32, minShift = (14*8*nr_tti_tx )+ 8*(lnormal+lprime); @@ -188,6 +182,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id, #endif return(alpha); } + void nr_generate_pucch0(PHY_VARS_NR_UE *ue, int32_t **txdataF, NR_DL_FRAME_PARMS *frame_parms, diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h index e8cd147526..fbc193e7b1 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h @@ -139,8 +139,8 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, uint8_t occ_index_format4); // tables for mcs values for different payloads - static const uint8_t table1_mcs[]={0,3,6,9}; - static const uint8_t table2_mcs[]={0,1,3,4,6,7,9,10}; + static const uint8_t table1_mcs[]={0,6,3,9}; + static const uint8_t table2_mcs[]={0,3,9,6,1,4,10,7}; /* * The following tables implement TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (rows->u {0,1,..,29} / columns->n {0,1,...,M_ZC-1) diff --git a/openair1/SIMULATION/NR_PHY/pucchsim.c b/openair1/SIMULATION/NR_PHY/pucchsim.c index 6af2837901..a9dcdca754 100644 --- a/openair1/SIMULATION/NR_PHY/pucchsim.c +++ b/openair1/SIMULATION/NR_PHY/pucchsim.c @@ -87,12 +87,13 @@ int main(int argc, char **argv) uint8_t nacktoack_flag=0; int16_t amp=0x7FFF; int nr_tti_tx=0; - uint64_t actual_payload=0,payload_received;//payload bits b7b6...b2b1b0 where b7..b3=0 b2b1=HARQ b0 is SR. payload maximum value is 7 for pucch format 0 + uint64_t actual_payload=0,payload_received; int nr_bit=1; // maximum value possible is 2 uint8_t m0=0;// higher layer paramater initial cyclic shift uint8_t nrofSymbols=1; //number of OFDM symbols can be 1-2 for format 1 uint8_t startingSymbolIndex=0; // resource allocated see 9.2.1, 38.213 for more info.should be actually present in the resource set provided uint16_t startingPRB=0,startingPRB_intraSlotHopping=0; //PRB number not sure see 9.2.1, 38.213 for more info. Should be actually present in the resource set provided + uint32_t hoppingId=40; uint8_t timeDomainOCC=0; SCM_t channel_model=AWGN;//Rayleigh1_anticorr; @@ -114,7 +115,7 @@ int main(int argc, char **argv) logInit(); set_glog(loglvl); - while ((c = getopt (argc, argv, "f:hA:f:g:i:P:b:T:n:o:s:S:x:y:z:N:F:GR:IL")) != -1) { + while ((c = getopt (argc, argv, "f:hA:f:g:i:I:P:B:b:T:m:n:r:o:s:S:x:y:z:N:F:GR:IL")) != -1) { switch (c) { case 'f': //write_output_file=1; @@ -257,12 +258,24 @@ int main(int argc, char **argv) case 'i': nrofSymbols=(uint8_t)atoi(optarg); break; + case 'I': + startingSymbolIndex=(uint8_t)atoi(optarg); + break; + case 'r': + startingPRB=atoi(optarg); + break; case 'P': format=atoi(optarg); break; + case 'm': + m0=atoi(optarg); + break; case 'b': nr_bit=atoi(optarg); break; + case 'B': + actual_payload=atoi(optarg); + break; case 'T': nacktoack_flag=(uint8_t)atoi(optarg); target_error_rate=0.001; @@ -292,8 +305,11 @@ int main(int argc, char **argv) printf("-f Output filename (.txt format) for Pe/SNR results\n"); printf("-F Input filename (.txt format) for RX conformance testing\n"); printf("-i Enter number of ofdm symbols for pucch\n"); + printf("-r PUCCCH starting PRB\n"); printf("-P Enter the format of PUCCH\n"); printf("-b number of HARQ bits (1-2)\n"); + printf("-B payload to be transmitted on PUCCH\n"); + printf("-m initial cyclic shift m0\n"); printf("-T to check nacktoack miss for format 1"); exit (-1); break; @@ -304,6 +320,16 @@ int main(int argc, char **argv) printf("Initializing gNodeB for mu %d, N_RB_DL %d\n",mu,N_RB_DL); + if((format!=0) && (format!=1)){ + printf("PUCCH format %d not supported\n",format); + exit(0); + } + + AssertFatal((nr_bit<3)&&(actual_payload<4),"Only format 0 and 1 currently supported. 2 bits max supported"); + + if (nr_bit==1) actual_payload = actual_payload&1; + + printf("Transmitted payload is %ld\n",actual_payload); RC.gNB = (PHY_VARS_gNB**) malloc(sizeof(PHY_VARS_gNB *)); RC.gNB[0] = malloc(sizeof(PHY_VARS_gNB)); @@ -398,6 +424,7 @@ int main(int argc, char **argv) //configure UE UE = malloc(sizeof(PHY_VARS_NR_UE)); memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS)); + UE->pucch_config_common_nr->hoppingId = hoppingId; //phy_init_nr_top(UE); //called from init_nr_ue_signal UE->perfect_ce = 0; @@ -414,35 +441,15 @@ int main(int argc, char **argv) startingPRB_intraSlotHopping=N_RB_DL-1; pucch_GroupHopping_t PUCCH_GroupHopping=UE->pucch_config_common_nr->pucch_GroupHopping; uint32_t n_id=UE->pucch_config_common_nr->hoppingId; - if((format!=0) && (format!=1)){ - printf("format not supported\n"); - exit(0); + + if(format==0){ + // for now we are not considering SR just HARQ-ACK + if(nr_bit==1) + mcs=table1_mcs[actual_payload]; + else if(nr_bit==2) + mcs=table2_mcs[actual_payload]; } - if(nacktoack_flag==0){ - if(format==0){ - if(nr_bit==1){ - actual_payload=2; - mcs=table1_mcs[actual_payload]; - } - else if(nr_bit==2){ - actual_payload=6; - mcs=table2_mcs[actual_payload]; - } - else{ - printf("Number of HARQ bits possible is 1-2\n"); - exit(0); - } - } - else { - if(nr_bit==1) - actual_payload=1; - else if(nr_bit==2) - actual_payload=3; - else{ - printf("number of bits carried by PUCCH format1 is 1-2\n"); - } - } - } + for(SNR=snr0;SNR<=snr1;SNR=SNR+1){ ack_nack_errors=0; n_errors = 0; diff --git a/openair2/GNB_APP/RRC_nr_paramsvalues.h b/openair2/GNB_APP/RRC_nr_paramsvalues.h index 0b54b62e4a..847936179e 100644 --- a/openair2/GNB_APP/RRC_nr_paramsvalues.h +++ b/openair2/GNB_APP/RRC_nr_paramsvalues.h @@ -128,18 +128,18 @@ #define GNB_CONFIG_STRING_RARESPONSEWINDOW "ra_ResponseWindow" #define GNB_CONFIG_STRING_SSBPERRACHOCCASIONANDCBPREAMBLESPERSSBPR "ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR" #define GNB_CONFIG_STRING_SSBPERRACHOCCASIONANDCBPREAMBLESPERSSB "ssb_perRACH_OccasionAndCB_PreamblesPerSSB" -#define GNB_CONFIG_STRING_RACONTENTIONRESOLUTIONTIMER "ra_ContentionResolutionTimer" -#define GNB_CONFIG_STRING_RSRPTHRESHOLDSSB "rsrp_ThresholdSSB" -#define GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEXPR "prach_RootSequenceIndex_PR" -#define GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEX "prach_RootSequenceIndex" -#define GNB_CONFIG_STRING_MSG1SUBCARRIERSPACING "msg1_SubcarrierSpacing" -#define GNB_CONFIG_STRING_RESTRICTEDSETCONFIG "restrictedSetConfig" -#define GNB_CONFIG_STRING_PUSCHTIMEDOMAINALLOCATIONLIST "puschTimeDomainAllocationList" -#define GNB_CONFIG_STRING_MSG3DELTAPREABMLE "msg3_DeltaPreamble" -#define GNB_CONFIG_STRING_P0NOMINALWITHGRANT "p0_NominalWithGrant" -#define GNB_CONFIG_STRING_PUCCHGROUPHOPPING "pucchGroupHopping" -#define GNB_CONFIG_STRING_HOPPINGID "hoppingId" -#define GNB_CONFIG_STRING_P0NOMINAL "p0_nominal" +#define GNB_CONFIG_STRING_RACONTENTIONRESOLUTIONTIMER "ra_ContentionResolutionTimer" +#define GNB_CONFIG_STRING_RSRPTHRESHOLDSSB "rsrp_ThresholdSSB" +#define GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEXPR "prach_RootSequenceIndex_PR" +#define GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEX "prach_RootSequenceIndex" +#define GNB_CONFIG_STRING_MSG1SUBCARRIERSPACING "msg1_SubcarrierSpacing" +#define GNB_CONFIG_STRING_RESTRICTEDSETCONFIG "restrictedSetConfig" +#define GNB_CONFIG_STRING_PUSCHTIMEDOMAINALLOCATIONLIST "puschTimeDomainAllocationList" +#define GNB_CONFIG_STRING_MSG3DELTAPREABMLE "msg3_DeltaPreamble" +#define GNB_CONFIG_STRING_P0NOMINALWITHGRANT "p0_NominalWithGrant" +#define GNB_CONFIG_STRING_PUCCHGROUPHOPPING "pucchGroupHopping" +#define GNB_CONFIG_STRING_HOPPINGID "hoppingId" +#define GNB_CONFIG_STRING_P0NOMINAL "p0_nominal" #define GNB_CONFIG_STRING_INITIALULBWPK2_0 "initialULBWPk2_0" #define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_0 "initialULBWPmappingType_0" #define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_0 "initialULBWPstartSymbolAndLength_0" From 0e550ff2f592c0145f8996aa5c66cdc3920e7e1e Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Tue, 28 Jan 2020 16:13:46 +0100 Subject: [PATCH 02/24] fix for pucch0 resource allocation --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 27 ++++++++----------------- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c | 27 +++++-------------------- openair1/SIMULATION/NR_PHY/pucchsim.c | 1 + 3 files changed, 14 insertions(+), 41 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index b74b078dfd..d6dc708042 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -107,26 +107,13 @@ void nr_decode_pucch0( int32_t **rxdataF, */ uint32_t re_offset=0; for (l=0; lN_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is lower band - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; - } - if ((startingPRB >= (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is upper band - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*(startingPRB-(frame_parms->N_RB_DL>>1))); - } - if ((startingPRB < (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB is lower band - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; - } - if ((startingPRB > (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB is upper band - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*(startingPRB-(frame_parms->N_RB_DL>>1))) + 6; - } - if ((startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB contains DC - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; - } + + re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; + if (re_offset>= frame_parms->ofdm_symbol_size) + re_offset-=frame_parms->ofdm_symbol_size; + for (n=0; n<12; n++){ - if ((n==6) && (startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { - // if number RBs in bandwidth is odd and current PRB contains DC, we need to recalculate the offset when n=6 (for second half PRB) - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size); - } + r_re[(12*l)+n]=((int16_t *)&rxdataF[0][re_offset])[0]; r_im[(12*l)+n]=((int16_t *)&rxdataF[0][re_offset])[1]; #ifdef DEBUG_NR_PUCCH_RX @@ -135,6 +122,8 @@ void nr_decode_pucch0( int32_t **rxdataF, l,n,((int16_t *)&rxdataF[0][re_offset])[0],((int16_t *)&rxdataF[0][re_offset])[1]); #endif re_offset++; + if (re_offset>= frame_parms->ofdm_symbol_size) + re_offset-=frame_parms->ofdm_symbol_size; } } double corr[nr_sequences],corr_re[nr_sequences],corr_im[nr_sequences]; diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c index d68b3ea1a4..5d2640cd74 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c @@ -268,32 +268,13 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue, uint32_t re_offset=0; for (int l=0; lN_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is lower band - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; - } - if ((startingPRB >= (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is upper band - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*(startingPRB-(frame_parms->N_RB_DL>>1))); - } - - if ((startingPRB < (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB is lower band - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; - } - - if ((startingPRB > (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB is upper band - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*(startingPRB-(frame_parms->N_RB_DL>>1))) + 6; - } - - if ((startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB contains DC - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; - } + re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; + if (re_offset>= frame_parms->ofdm_symbol_size) + re_offset-=frame_parms->ofdm_symbol_size; //txptr = &txdataF[0][re_offset]; for (int n=0; n<12; n++) { - if ((n==6) && (startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { - // if number RBs in bandwidth is odd and current PRB contains DC, we need to recalculate the offset when n=6 (for second half PRB) - re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size); - } ((int16_t *)&txdataF[0][re_offset])[0] = (int16_t)(((int32_t)(amp) * x_n_re[(12*l)+n])>>15); ((int16_t *)&txdataF[0][re_offset])[1] = (int16_t)(((int32_t)(amp) * x_n_im[(12*l)+n])>>15); @@ -306,6 +287,8 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue, l,n,((int16_t *)&txdataF[0][re_offset])[0],((int16_t *)&txdataF[0][re_offset])[1]); #endif re_offset++; + if (re_offset>= frame_parms->ofdm_symbol_size) + re_offset-=frame_parms->ofdm_symbol_size; } } } diff --git a/openair1/SIMULATION/NR_PHY/pucchsim.c b/openair1/SIMULATION/NR_PHY/pucchsim.c index a9dcdca754..32bbbfc7dd 100644 --- a/openair1/SIMULATION/NR_PHY/pucchsim.c +++ b/openair1/SIMULATION/NR_PHY/pucchsim.c @@ -495,6 +495,7 @@ int main(int argc, char **argv) } n_errors=((actual_payload^payload_received)&1)+(((actual_payload^payload_received)&2)>>1)+(((actual_payload^payload_received)&4)>>2)+n_errors; } + printf("Decoded payload is %ld\n",payload_received); printf("SNR=%f, n_trials=%d, n_bit_errors=%d\n",SNR,n_trials,n_errors); if((float)ack_nack_errors/(float)(nr_bit*n_trials)<=target_error_rate){ printf("PUCCH test OK\n"); From cdde88302c388efeab122ebfbfad97e1972dcc07 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Tue, 28 Jan 2020 16:38:02 +0100 Subject: [PATCH 03/24] completing previous fix --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 14 +++++++++----- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c | 14 ++++++++------ openair1/SIMULATION/NR_PHY/pucchsim.c | 1 + 3 files changed, 18 insertions(+), 11 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index d6dc708042..940f3aee71 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -106,20 +106,24 @@ void nr_decode_pucch0( int32_t **rxdataF, * Implementing TS 38.211 Subclause 6.3.2.3.2 Mapping to physical resources FIXME! */ uint32_t re_offset=0; + uint8_t l2; + for (l=0; lofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; + l2 = l+startingSymbolIndex; + re_offset = (12*startingPRB) + frame_parms->first_carrier_offset; if (re_offset>= frame_parms->ofdm_symbol_size) re_offset-=frame_parms->ofdm_symbol_size; for (n=0; n<12; n++){ - r_re[(12*l)+n]=((int16_t *)&rxdataF[0][re_offset])[0]; - r_im[(12*l)+n]=((int16_t *)&rxdataF[0][re_offset])[1]; + r_re[(12*l)+n]=((int16_t *)&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset])[0]; + r_im[(12*l)+n]=((int16_t *)&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset])[1]; #ifdef DEBUG_NR_PUCCH_RX printf("\t [nr_generate_pucch0] mapping to RE \t amp=%d \tofdm_symbol_size=%d \tN_RB_DL=%d \tfirst_carrier_offset=%d \ttxptr(%d)=(x_n(l=%d,n=%d)=(%d,%d))\n", - amp,frame_parms->ofdm_symbol_size,frame_parms->N_RB_DL,frame_parms->first_carrier_offset,re_offset, - l,n,((int16_t *)&rxdataF[0][re_offset])[0],((int16_t *)&rxdataF[0][re_offset])[1]); + amp,frame_parms->ofdm_symbol_size,frame_parms->N_RB_DL,frame_parms->first_carrier_offset,(l2*frame_parms->ofdm_symbol_size)+re_offset, + l,n,((int16_t *)&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset])[0], + ((int16_t *)&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset])[1]); #endif re_offset++; if (re_offset>= frame_parms->ofdm_symbol_size) diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c index 5d2640cd74..148ee51a69 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c @@ -266,25 +266,27 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue, */ //int32_t *txptr; uint32_t re_offset=0; + uint8_t l2; for (int l=0; lofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; + l2=l+startingSymbolIndex; + re_offset = (12*startingPRB) + frame_parms->first_carrier_offset; if (re_offset>= frame_parms->ofdm_symbol_size) re_offset-=frame_parms->ofdm_symbol_size; //txptr = &txdataF[0][re_offset]; for (int n=0; n<12; n++) { - ((int16_t *)&txdataF[0][re_offset])[0] = (int16_t)(((int32_t)(amp) * x_n_re[(12*l)+n])>>15); - ((int16_t *)&txdataF[0][re_offset])[1] = (int16_t)(((int32_t)(amp) * x_n_im[(12*l)+n])>>15); + ((int16_t *)&txdataF[0][(l2*frame_parms->ofdm_symbol_size) + re_offset])[0] = (int16_t)(((int32_t)(amp) * x_n_re[(12*l)+n])>>15); + ((int16_t *)&txdataF[0][(l2*frame_parms->ofdm_symbol_size) + re_offset])[1] = (int16_t)(((int32_t)(amp) * x_n_im[(12*l)+n])>>15); //((int16_t *)txptr[0][re_offset])[0] = (int16_t)((int32_t)amp * x_n_re[(12*l)+n])>>15; //((int16_t *)txptr[0][re_offset])[1] = (int16_t)((int32_t)amp * x_n_im[(12*l)+n])>>15; //txptr[re_offset] = (x_n_re[(12*l)+n]<<16) + x_n_im[(12*l)+n]; #ifdef DEBUG_NR_PUCCH_TX printf("\t [nr_generate_pucch0] mapping to RE \t amp=%d \tofdm_symbol_size=%d \tN_RB_DL=%d \tfirst_carrier_offset=%d \ttxptr(%u)=(x_n(l=%d,n=%d)=(%d,%d))\n", - amp,frame_parms->ofdm_symbol_size,frame_parms->N_RB_DL,frame_parms->first_carrier_offset,re_offset, - l,n,((int16_t *)&txdataF[0][re_offset])[0],((int16_t *)&txdataF[0][re_offset])[1]); + amp,frame_parms->ofdm_symbol_size,frame_parms->N_RB_DL,frame_parms->first_carrier_offset,(l2*frame_parms->ofdm_symbol_size) + re_offset, + l2,n,((int16_t *)&txdataF[0][(l2*frame_parms->ofdm_symbol_size) + re_offset])[0], + ((int16_t *)&txdataF[0][(l2*frame_parms->ofdm_symbol_size) + re_offset])[1]); #endif re_offset++; if (re_offset>= frame_parms->ofdm_symbol_size) diff --git a/openair1/SIMULATION/NR_PHY/pucchsim.c b/openair1/SIMULATION/NR_PHY/pucchsim.c index 32bbbfc7dd..35e9713b27 100644 --- a/openair1/SIMULATION/NR_PHY/pucchsim.c +++ b/openair1/SIMULATION/NR_PHY/pucchsim.c @@ -305,6 +305,7 @@ int main(int argc, char **argv) printf("-f Output filename (.txt format) for Pe/SNR results\n"); printf("-F Input filename (.txt format) for RX conformance testing\n"); printf("-i Enter number of ofdm symbols for pucch\n"); + printf("-I Starting symbol index for pucch\n"); printf("-r PUCCCH starting PRB\n"); printf("-P Enter the format of PUCCH\n"); printf("-b number of HARQ bits (1-2)\n"); From 84bed899cb7f8130f0fb0064edbd49a0200eb5f6 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Thu, 30 Jan 2020 16:49:13 +0100 Subject: [PATCH 04/24] bitmap for scheduling dlsch and ulsch in phytest and a bugfix in dlsch coding --- openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c | 4 +- openair2/GNB_APP/RRC_nr_paramsvalues.h | 2 +- openair2/LAYER2/NR_MAC_gNB/config.c | 3 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 96 +++++++++++++-------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 5 ++ 5 files changed, 71 insertions(+), 39 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c index 7f52443fce..20d995f69c 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c @@ -273,7 +273,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, LOG_D(PHY,"new_gNB_dlsch exit flag %d, size of %ld\n", exit_flag, sizeof(NR_gNB_DLSCH_t)); - free_gNB_dlsch(dlsch,N_RB); + free_gNB_dlsch(&dlsch,N_RB); return(NULL); @@ -323,7 +323,7 @@ int nr_dlsch_encoding(unsigned char *a, unsigned int G; unsigned int crc=1; - uint8_t harq_pid = dlsch->harq_ids[frame&2][slot]; + uint8_t harq_pid = dlsch->harq_ids[frame%2][slot]; AssertFatal(harq_pid<8 && harq_pid>=0,"illegal harq_pid %d\b",harq_pid); nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->pdsch_pdu.pdsch_pdu_rel15; uint16_t nb_rb = rel15->rbSize; diff --git a/openair2/GNB_APP/RRC_nr_paramsvalues.h b/openair2/GNB_APP/RRC_nr_paramsvalues.h index 847936179e..4c5da80764 100644 --- a/openair2/GNB_APP/RRC_nr_paramsvalues.h +++ b/openair2/GNB_APP/RRC_nr_paramsvalues.h @@ -301,7 +301,7 @@ {GNB_CONFIG_STRING_PRACHMSG1FDM,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM,defint64val:NR_RACH_ConfigGeneric__msg1_FDM_one,TYPE_INT64,0/*72*/},\ {GNB_CONFIG_STRING_PRACHMSG1FREQUENCYSTART,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart,defint64val:0,TYPE_INT64,0/*73*/},\ {GNB_CONFIG_STRING_ZEROCORRELATIONZONECONFIG,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig,defint64val:13,TYPE_INT64,0/*74*/},\ -{GNB_CONFIG_STRING_PREAMBLERECEIVEDTARGETPOWER,NULL,0,iptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower,defintval:-118,TYPE_INT32,0/*75*/},\ +{GNB_CONFIG_STRING_PREAMBLERECEIVEDTARGETPOWER,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower,defintval:-118,TYPE_INT64,0/*75*/},\ {GNB_CONFIG_STRING_PREAMBLETRANSMAX,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax,defint64val:NR_RACH_ConfigGeneric__preambleTransMax_n10,TYPE_INT64,0/*76*/},\ {GNB_CONFIG_STRING_POWERRAMPINGSTEP,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep,defint64val:NR_RACH_ConfigGeneric__powerRampingStep_dB2,TYPE_INT64,0/*77*/},\ {GNB_CONFIG_STRING_RARESPONSEWINDOW,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow,defint64val:NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20,TYPE_INT64,0/*78*/},\ diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 44a3f11711..d7d72fb6fd 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -50,7 +50,7 @@ extern RAN_CONTEXT_t RC; //extern int l2_init_gNB(void); extern void mac_top_init_gNB(void); extern uint8_t nfapi_mode; - +uint8_t nr_slots_per_frame[5] = {10, 20, 40, 80, 160}; void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) { @@ -281,6 +281,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm else LOG_I(PHY,"TDD has been properly configurated\n"); } + RC.nrmac[Mod_idP]->common_channels[0].num_slots_per_tdd = (nr_slots_per_frame[*scc->ssbSubcarrierSpacing])>>(7-cfg->tdd_table.tdd_period.value); /* // PDCCH-ConfigCommon diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index ce5b8754e4..b561a44d28 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -308,6 +308,14 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) } */ +bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot){ + + if((bitmap>>slot)&0x01) + return true; + else + return false; +} + void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame_rxP, sub_frame_t slot_rxP, @@ -318,8 +326,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, protocol_ctxt_t ctxt; int CC_id; - + NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels; + //nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config = NULL; start_meas(&RC.nrmac[module_idP]->eNB_scheduler); @@ -328,62 +337,79 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, pdcp_run(&ctxt); //rrc_rx_tx(&ctxt, CC_id); - RC.nrmac[module_idP]->frame = frame_rxP; RC.nrmac[module_idP]->slot = slot_rxP; + uint64_t *dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch + uint64_t *ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch + + // hardcoding dlsch to be in slot 1 + if (phy_test && !(slot_txP%cc->num_slots_per_tdd)) { + if(slot_txP==0) + *dlsch_in_slot_bitmap = 0x02; + else + *dlsch_in_slot_bitmap = 0x00; + } + + // hardcoding ulsch to be in slot 8 + if (phy_test && !(slot_rxP%cc->num_slots_per_tdd)) { + if(slot_rxP==0) + *ulsch_in_slot_bitmap = 0x100; + else + *ulsch_in_slot_bitmap = 0x00; + } // Check if there are downlink symbols in the slot, if (is_nr_DL_slot(cc->ServingCellConfigCommon,slot_txP)) { - memset(RC.nrmac[module_idP]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int)); - for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { - //mbsfn_status[CC_id] = 0; + memset(RC.nrmac[module_idP]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int)); + for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { + //mbsfn_status[CC_id] = 0; - // clear vrb_maps - memset(cc[CC_id].vrb_map, 0, 100); - memset(cc[CC_id].vrb_map_UL, 0, 100); + // clear vrb_maps + memset(cc[CC_id].vrb_map, 0, 100); + memset(cc[CC_id].vrb_map_UL, 0, 100); - clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame_txP, slot_txP); - } + clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame_txP, slot_txP); + } - // refresh UE list based on UEs dropped by PHY in previous subframe - /* - for (i = 0; i < MAX_MOBILES_PER_GNB; i++) { - if (UE_list->active[i]) { + // refresh UE list based on UEs dropped by PHY in previous subframe + /* + for (i = 0; i < MAX_MOBILES_PER_GNB; i++) { + if (UE_list->active[i]) { - nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id]; + nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id]; - rnti = 0;//UE_RNTI(module_idP, i); - CC_id = 0;//UE_PCCID(module_idP, i); + rnti = 0;//UE_RNTI(module_idP, i); + CC_id = 0;//UE_PCCID(module_idP, i); - } //END if (UE_list->active[i]) - } //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++) - */ - PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frame_txP, slot_txP,module_idP); + } //END if (UE_list->active[i]) + } //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++) + */ + PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frame_txP, slot_txP,module_idP); - // This schedules MIB - if((slot_txP == 0) && (frame_txP & 7) == 0){ - schedule_nr_mib(module_idP, frame_txP, slot_txP); - } + // This schedules MIB + if((slot_txP == 0) && (frame_txP & 7) == 0){ + schedule_nr_mib(module_idP, frame_txP, slot_txP); + } - // Phytest scheduling - if (phy_test && slot_txP==1){ - nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL); - } + // Phytest scheduling + if (phy_test && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%cc->num_slots_per_tdd))) { + nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL); + } - /* - // Allocate CCEs for good after scheduling is done - for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) - allocate_CCEs(module_idP, CC_id, subframeP, 0); - */ + /* + // Allocate CCEs for good after scheduling is done + for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) + allocate_CCEs(module_idP, CC_id, subframeP, 0); + */ } //is_nr_DL_slot if (is_nr_UL_slot(cc->ServingCellConfigCommon,slot_rxP)) { - if (phy_test && slot_rxP==8){ + if (phy_test && (is_xlsch_in_slot(*ulsch_in_slot_bitmap,slot_rxP%cc->num_slots_per_tdd))){ nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP); } } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 18bc034ae4..77501a0487 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -98,6 +98,8 @@ typedef struct { uint8_t vrb_map_UL[100]; /// number of subframe allocation pattern available for MBSFN sync area uint8_t num_sf_allocation_pattern; + /// number of slots per TDD period + uint8_t num_slots_per_tdd; } NR_COMMON_channels_t; /*! \brief scheduling control information set through an API (not used)*/ @@ -153,6 +155,9 @@ typedef struct gNB_MAC_INST_s { nfapi_nr_tx_data_request_t TX_req[NFAPI_CC_MAX]; NR_UE_list_t UE_list; + uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch + uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch + /// UL handle uint32_t ul_handle; From 06e700a048e47137eb68bee8d2741fd2f45788ff Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Fri, 31 Jan 2020 16:32:49 +0100 Subject: [PATCH 05/24] bitmap for scheduling dlsch and ulsch in UE list --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 37 +++++++++++++--------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 7 ++-- 2 files changed, 25 insertions(+), 19 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index b561a44d28..c9b63fe25c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -326,6 +326,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, protocol_ctxt_t ctxt; int CC_id; + int UE_id; + uint64_t *dlsch_in_slot_bitmap=NULL; + uint64_t *ulsch_in_slot_bitmap=NULL; + + if (phy_test) UE_id=0; NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels; @@ -340,23 +345,25 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, RC.nrmac[module_idP]->frame = frame_rxP; RC.nrmac[module_idP]->slot = slot_rxP; - uint64_t *dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch - uint64_t *ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch + if (phy_test) { + dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.dlsch_in_slot_bitmap[UE_id]; // static bitmap signaling which slot in a tdd period contains dlsch + ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.ulsch_in_slot_bitmap[UE_id]; // static bitmap signaling which slot in a tdd period contains ulsch - // hardcoding dlsch to be in slot 1 - if (phy_test && !(slot_txP%cc->num_slots_per_tdd)) { - if(slot_txP==0) - *dlsch_in_slot_bitmap = 0x02; - else - *dlsch_in_slot_bitmap = 0x00; - } + // hardcoding dlsch to be in slot 1 + if (!(slot_txP%cc->num_slots_per_tdd)) { + if(slot_txP==0) + *dlsch_in_slot_bitmap = 0x02; + else + *dlsch_in_slot_bitmap = 0x00; + } - // hardcoding ulsch to be in slot 8 - if (phy_test && !(slot_rxP%cc->num_slots_per_tdd)) { - if(slot_rxP==0) - *ulsch_in_slot_bitmap = 0x100; - else - *ulsch_in_slot_bitmap = 0x00; + // hardcoding ulsch to be in slot 8 + if (!(slot_rxP%cc->num_slots_per_tdd)) { + if(slot_rxP==0) + *ulsch_in_slot_bitmap = 0x100; + else + *ulsch_in_slot_bitmap = 0x00; + } } // Check if there are downlink symbols in the slot, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 77501a0487..b9df20d4c2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -122,9 +122,11 @@ typedef struct { boolean_t active[MAX_MOBILES_PER_GNB]; rnti_t rnti[MAX_MOBILES_PER_GNB]; NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB]; + uint64_t dlsch_in_slot_bitmap[MAX_MOBILES_PER_GNB]; // static bitmap signaling which slot in a tdd period contains dlsch + uint64_t ulsch_in_slot_bitmap[MAX_MOBILES_PER_GNB]; // static bitmap signaling which slot in a tdd period contains ulsch } NR_UE_list_t; -/*! \brief top level eNB MAC structure */ +/*! \brief top level gNB MAC structure */ typedef struct gNB_MAC_INST_s { /// Ethernet parameters for northbound midhaul interface eth_params_t eth_params_n; @@ -155,9 +157,6 @@ typedef struct gNB_MAC_INST_s { nfapi_nr_tx_data_request_t TX_req[NFAPI_CC_MAX]; NR_UE_list_t UE_list; - uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch - uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch - /// UL handle uint32_t ul_handle; From c36636be9597c0aea2caa82ac9103d643fe7d6ac Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Mon, 3 Feb 2020 11:53:05 +0100 Subject: [PATCH 06/24] function to configure scf fapi for pucch (not yet called) --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 16 +-- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 135 ++++++++++++++++++ openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 4 + 3 files changed, 144 insertions(+), 11 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 32e8aedc06..2fe553a055 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -262,14 +262,10 @@ int configure_fapi_dl_Tx(int Mod_idP, nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu; nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu; int TBS; - - int bwp_id=1; - int UE_id = 0; NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list; - NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id]; AssertFatal(secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1, "downlinkBWP_ToAddModList has %d BWP!\n", @@ -422,7 +418,6 @@ int configure_fapi_dl_Tx(int Mod_idP, TBS); dl_req->nPDUs+=2; - TX_req->PDU_length = pdsch_pdu_rel15->TBSize[0]; TX_req->PDU_index = nr_mac->pdu_index[0]++; @@ -740,12 +735,12 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP, UL_tti_req->SFN = frameP; UL_tti_req->Slot = slotP; - UL_tti_req->n_pdus = 1; - UL_tti_req->pdus_list[0].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; - UL_tti_req->pdus_list[0].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); - nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu; + UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; + UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); + nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pusch_pdu; memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t)); - + UL_tti_req->n_pdus+=1; + LOG_D(MAC, "Scheduling UE specific PUSCH\n"); //UL_tti_req = &nr_mac->UL_tti_req[CC_id]; /* @@ -842,7 +837,6 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP, 1, // ue-specific, scc, bwp); - dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index df9c37f687..273c09e246 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -547,6 +547,141 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, } +// This function configures pucch_pdu according to pucch_ResourceId value +void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, + NR_PUCCH_ResourceId_t pucch_ResourceId, + NR_ServingCellConfigCommon_t *scc, + NR_BWP_Uplink_t *bwp){ + + NR_PUCCH_Config_t *pucch_Config; + NR_PUCCH_Resource_t *pucchres; + NR_PUCCH_FormatConfig_t *pucchfmt; + NR_PUSCH_Config_t *pusch_Config = bwp->bwp_Dedicated->pusch_Config->choice.setup; + long *pusch_id = pusch_Config->dataScramblingIdentityPUSCH; + long *id0 = NULL; + int n_list; + if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) + id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0; + if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) + id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->transformPrecodingDisabled->scramblingID0; + + // hop flags and hopping id are valid for any BWP + switch (scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping){ + case 0 : + // if neither, both disabled + pucch_pdu->group_hop_flag = 0; + pucch_pdu->sequence_hop_flag = 0; + break; + case 1 : + // if enable, group enabled + pucch_pdu->group_hop_flag = 1; + pucch_pdu->sequence_hop_flag = 0; + break; + case 2 : + // if disable, sequence disabled + pucch_pdu->group_hop_flag = 0; + pucch_pdu->sequence_hop_flag = 1; + break; + default: + AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM); + } + + if (scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId != NULL) + pucch_pdu->hopping_id = *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId; + else + pucch_pdu->hopping_id = *scc->physCellId; + + if (bwp) { // This is not the InitialBWP + + pucch_pdu->bwp_size = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pucch_pdu->bwp_start = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275); + pucch_pdu->subcarrier_spacing = bwp->bwp_Common->genericParameters.subcarrierSpacing; + pucch_pdu->cyclic_prefix = (bwp->bwp_Common->genericParameters.cyclicPrefix==NULL) ? 0 : *bwp->bwp_Common->genericParameters.cyclicPrefix; + + pucch_Config = bwp->bwp_Dedicated->pucch_Config->choice.setup; + + AssertFatal(pucch_Config->resourceToAddModList!=NULL, + "PUCCH resourceToAddModList is null\n"); + + n_list = pucch_Config->resourceToAddModList->list.count; + AssertFatal(n_list>0,"PUCCH resourceToAddModList is empty\n"); + + for (int i=0; iresourceToAddModList->list.array[i]; + if (pucchres->pucch_ResourceId == pucch_ResourceId) { + pucch_pdu->prb_start = pucchres->startingPRB; + pucch_pdu->freq_hop_flag = pucchres->intraSlotFrequencyHopping!= NULL ? 1 : 0; + pucch_pdu->second_hop_prb = pucchres->secondHopPRB!= NULL ? *pucchres->secondHopPRB : 0; + + switch(pucchres->format.present) { + case NR_PUCCH_Resource__format_PR_format0 : + pucch_pdu->format_type = 0; + pucch_pdu->initial_cyclic_shift = pucchres->format.choice.format0->initialCyclicShift; + pucch_pdu->nr_of_symbols = pucchres->format.choice.format0->nrofSymbols; + pucch_pdu->start_symbol_index = pucchres->format.choice.format0->startingSymbolIndex; + break; + case NR_PUCCH_Resource__format_PR_format1 : + pucch_pdu->format_type = 1; + pucch_pdu->initial_cyclic_shift = pucchres->format.choice.format1->initialCyclicShift; + pucch_pdu->nr_of_symbols = pucchres->format.choice.format1->nrofSymbols; + pucch_pdu->start_symbol_index = pucchres->format.choice.format1->startingSymbolIndex; + pucch_pdu->time_domain_occ_idx = pucchres->format.choice.format1->timeDomainOCC; + break; + case NR_PUCCH_Resource__format_PR_format2 : + pucch_pdu->format_type = 2; + pucch_pdu->nr_of_symbols = pucchres->format.choice.format2->nrofSymbols; + pucch_pdu->start_symbol_index = pucchres->format.choice.format2->startingSymbolIndex; + pucch_pdu->prb_size = pucchres->format.choice.format2->nrofPRBs; + pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : *scc->physCellId; + pucch_pdu->dmrs_scrambling_id = id0!= NULL ? *id0 : *scc->physCellId; + break; + case NR_PUCCH_Resource__format_PR_format3 : + pucch_pdu->format_type = 3; + pucch_pdu->nr_of_symbols = pucchres->format.choice.format3->nrofSymbols; + pucch_pdu->start_symbol_index = pucchres->format.choice.format3->startingSymbolIndex; + pucch_pdu->prb_size = pucchres->format.choice.format3->nrofPRBs; + pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : *scc->physCellId; + if (pucch_Config->format3 == NULL) { + pucch_pdu->pi_2bpsk = 0; + pucch_pdu->add_dmrs_flag = 0; + } + else { + pucchfmt = pucch_Config->format3->choice.setup; + pucch_pdu->pi_2bpsk = pucchfmt->pi2BPSK!= NULL ? 1 : 0; + pucch_pdu->add_dmrs_flag = pucchfmt->additionalDMRS!= NULL ? 1 : 0; + } + break; + case NR_PUCCH_Resource__format_PR_format4 : + pucch_pdu->format_type = 4; + pucch_pdu->nr_of_symbols = pucchres->format.choice.format4->nrofSymbols; + pucch_pdu->start_symbol_index = pucchres->format.choice.format4->startingSymbolIndex; + pucch_pdu->pre_dft_occ_len = pucchres->format.choice.format4->occ_Length; + pucch_pdu->pre_dft_occ_idx = pucchres->format.choice.format4->occ_Index; + pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : *scc->physCellId; + if (pucch_Config->format3 == NULL) { + pucch_pdu->pi_2bpsk = 0; + pucch_pdu->add_dmrs_flag = 0; + } + else { + pucchfmt = pucch_Config->format3->choice.setup; + pucch_pdu->pi_2bpsk = pucchfmt->pi2BPSK!= NULL ? 1 : 0; + pucch_pdu->add_dmrs_flag = pucchfmt->additionalDMRS!= NULL ? 1 : 0; + } + break; + default : + AssertFatal(1==0,"Undefined PUCCH format \n"); + } + } + } + + } + else { // this is for InitialBWP + AssertFatal(1==0,"Fill in InitialBWP PUCCH configuration\n"); + } + +} + + void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 3c95d076c0..694473c16b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -103,6 +103,10 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space, uint16_t slot, nfapi_nr_config_request_scf_t cfg); */ +void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, + NR_PUCCH_ResourceId_t pucch_ResourceId, + NR_ServingCellConfigCommon_t *scc, + NR_BWP_Uplink_t *bwp); void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, int ss_type, NR_ServingCellConfigCommon_t *scc, From 59fc607c4e14b890630c681ea4eb7889b7db5e96 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Tue, 4 Feb 2020 12:33:54 +0100 Subject: [PATCH 07/24] mac function to configure fapi for pucch updated (not yet called) --- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 60 ++++++++++++++++--- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 7 ++- 2 files changed, 58 insertions(+), 9 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 273c09e246..93b525a308 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -547,19 +547,29 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, } -// This function configures pucch_pdu according to pucch_ResourceId value +// This function configures pucch pdu fapi structure void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, - NR_PUCCH_ResourceId_t pucch_ResourceId, NR_ServingCellConfigCommon_t *scc, - NR_BWP_Uplink_t *bwp){ + NR_BWP_Uplink_t *bwp, + uint8_t pucch_resource, + uint16_t O_uci, + uint16_t O_ack, + uint8_t SR_flag) { NR_PUCCH_Config_t *pucch_Config; NR_PUCCH_Resource_t *pucchres; + NR_PUCCH_ResourceSet_t *pucchresset; NR_PUCCH_FormatConfig_t *pucchfmt; + NR_PUCCH_ResourceId_t *resource_id = NULL; NR_PUSCH_Config_t *pusch_Config = bwp->bwp_Dedicated->pusch_Config->choice.setup; long *pusch_id = pusch_Config->dataScramblingIdentityPUSCH; long *id0 = NULL; - int n_list; + int n_list, n_set; + uint16_t N2,N3; + int res_found = 0; + + pucch_pdu->bit_len_harq = O_ack; + if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0; if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) @@ -600,25 +610,60 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, pucch_Config = bwp->bwp_Dedicated->pucch_Config->choice.setup; + AssertFatal(pucch_Config->resourceSetToAddModList!=NULL, + "PUCCH resourceSetToAddModList is null\n"); + + n_set = pucch_Config->resourceSetToAddModList->list.count; + AssertFatal(n_set>0,"PUCCH resourceSetToAddModList is empty\n"); + + N2 = 2; + // procedure to select pucch resource id from resource sets according to + // number of uci bits and pucch resource indicator pucch_resource + // ( see table 9.2.3.2 in 38.213) + for (int i=0; iresourceSetToAddModList->list.array[i]; + n_list = pucchresset->resourceList.list.count; + if (pucchresset->pucch_ResourceSetId == 0 && O_uci<3) { + if (pucch_resource < n_list) + resource_id = pucchresset->resourceList.list.array[pucch_resource]; + else + AssertFatal(1==0,"Couldn't fine pucch resource indicator %d in PUCCH resource set %d for %d UCI bits",pucch_resource,i,O_uci); + } + else { + N3 = pucchresset->maxPayloadMinus1!= NULL ? *pucchresset->maxPayloadMinus1 : 1706; + if (N2O_uci) { + if (pucch_resource < n_list) + resource_id = pucchresset->resourceList.list.array[pucch_resource]; + else + AssertFatal(1==0,"Couldn't fine pucch resource indicator %d in PUCCH resource set %d for %d UCI bits",pucch_resource,i,O_uci); + } + else N2 = N3; + } + } + + AssertFatal(resource_id!=NULL,"Couldn-t find any matching PUCCH resource in the PUCCH resource sets"); + AssertFatal(pucch_Config->resourceToAddModList!=NULL, "PUCCH resourceToAddModList is null\n"); n_list = pucch_Config->resourceToAddModList->list.count; AssertFatal(n_list>0,"PUCCH resourceToAddModList is empty\n"); + // going through the list of PUCCH resources to find the one indexed by resource_id for (int i=0; iresourceToAddModList->list.array[i]; - if (pucchres->pucch_ResourceId == pucch_ResourceId) { + if (pucchres->pucch_ResourceId == *resource_id) { + res_found = 1; pucch_pdu->prb_start = pucchres->startingPRB; pucch_pdu->freq_hop_flag = pucchres->intraSlotFrequencyHopping!= NULL ? 1 : 0; pucch_pdu->second_hop_prb = pucchres->secondHopPRB!= NULL ? *pucchres->secondHopPRB : 0; - switch(pucchres->format.present) { case NR_PUCCH_Resource__format_PR_format0 : pucch_pdu->format_type = 0; pucch_pdu->initial_cyclic_shift = pucchres->format.choice.format0->initialCyclicShift; pucch_pdu->nr_of_symbols = pucchres->format.choice.format0->nrofSymbols; pucch_pdu->start_symbol_index = pucchres->format.choice.format0->startingSymbolIndex; + pucch_pdu->sr_flag = SR_flag; break; case NR_PUCCH_Resource__format_PR_format1 : pucch_pdu->format_type = 1; @@ -626,6 +671,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, pucch_pdu->nr_of_symbols = pucchres->format.choice.format1->nrofSymbols; pucch_pdu->start_symbol_index = pucchres->format.choice.format1->startingSymbolIndex; pucch_pdu->time_domain_occ_idx = pucchres->format.choice.format1->timeDomainOCC; + pucch_pdu->sr_flag = SR_flag; break; case NR_PUCCH_Resource__format_PR_format2 : pucch_pdu->format_type = 2; @@ -673,7 +719,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, } } } - + AssertFatal(res_found==1,"No PUCCH resource found corresponding to id %ld\n",*resource_id); } else { // this is for InitialBWP AssertFatal(1==0,"Fill in InitialBWP PUCCH configuration\n"); diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 694473c16b..aa705cedf9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -104,9 +104,12 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space, nfapi_nr_config_request_scf_t cfg); */ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, - NR_PUCCH_ResourceId_t pucch_ResourceId, NR_ServingCellConfigCommon_t *scc, - NR_BWP_Uplink_t *bwp); + NR_BWP_Uplink_t *bwp, + uint8_t pucch_resource, + uint16_t O_uci, + uint16_t O_ack, + uint8_t SR_flag); void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, int ss_type, NR_ServingCellConfigCommon_t *scc, From b1d259663ed0446042020e2f9984948433a3a3df Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Tue, 4 Feb 2020 15:36:47 +0100 Subject: [PATCH 08/24] configuration of pucch0 rx from fapi structure --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 50 +++++++++++-------------- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h | 18 +++------ 2 files changed, 28 insertions(+), 40 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 940f3aee71..e89c6739da 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -18,27 +18,25 @@ #include "T.h" -void nr_decode_pucch0( int32_t **rxdataF, - pucch_GroupHopping_t pucch_GroupHopping, - uint32_t n_id, // hoppingID higher layer parameter - uint64_t *payload, - NR_DL_FRAME_PARMS *frame_parms, - int16_t amp, - int nr_tti_tx, - uint8_t m0, // should come from resource set - uint8_t nrofSymbols, // should come from resource set - uint8_t startingSymbolIndex, // should come from resource set - uint16_t startingPRB, // should come from resource set - uint8_t nr_bit) { // is number of UCI bits to be decoded +void nr_decode_pucch0(int32_t **rxdataF, + uint64_t *payload, + NR_DL_FRAME_PARMS *frame_parms, + int slot, + int16_t amp, + nfapi_nr_pucch_pdu_t* pucch_pdu) { + int nr_sequences; const uint8_t *mcs; - if(nr_bit==1){ + + pucch_GroupHopping_t pucch_GroupHopping = pucch_pdu->group_hop_flag + (pucch_pdu->sequence_hop_flag<<1); + + if(pucch_pdu->bit_len_harq==1){ mcs=table1_mcs; - nr_sequences=4; + nr_sequences=4>>(1-pucch_pdu->sr_flag); } else{ mcs=table2_mcs; - nr_sequences=8; + nr_sequences=8>>(1-pucch_pdu->sr_flag); } /* * Implement TS 38.211 Subclause 6.3.2.3.1 Sequence generation @@ -53,8 +51,6 @@ void nr_decode_pucch0( int32_t **rxdataF, //uint8_t lnormal; // lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213] //uint8_t lprime; - // mcs is provided by TC 38.213 subclauses 9.2.3, 9.2.4, 9.2.5 FIXME! - //uint8_t mcs; /* * in TS 38.213 Subclause 9.2.1 it is said that: @@ -73,19 +69,17 @@ void nr_decode_pucch0( int32_t **rxdataF, // if frequency hopping is enabled by the higher-layer parameter PUCCH-frequency-hopping // n_hop = 0 for first hop // n_hop = 1 for second hop - uint8_t n_hop = 0; - //uint8_t PUCCH_Frequency_Hopping; // from higher layers FIXME!! + uint8_t n_hop = 0; // Frequnecy hopping not implemented FIXME!! // x_n contains the sequence r_u_v_alpha_delta(n) int16_t x_n_re[nr_sequences][24],x_n_im[nr_sequences][24]; int n,i,l; for(i=0;inr_of_symbols; l++){ + + nr_group_sequence_hopping(pucch_GroupHopping,pucch_pdu->hopping_id,n_hop,slot,&u,&v); // calculating u and v value + alpha = nr_cyclic_shift_hopping(pucch_pdu->hopping_id,pucch_pdu->initial_cyclic_shift,mcs[i],l,pucch_pdu->start_symbol_index,slot); #ifdef DEBUG_NR_PUCCH_RX printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u,v,alpha,l); #endif @@ -108,10 +102,10 @@ void nr_decode_pucch0( int32_t **rxdataF, uint32_t re_offset=0; uint8_t l2; - for (l=0; lnr_of_symbols; l++) { - l2 = l+startingSymbolIndex; - re_offset = (12*startingPRB) + frame_parms->first_carrier_offset; + l2 = l+pucch_pdu->start_symbol_index; + re_offset = (12*pucch_pdu->prb_start) + frame_parms->first_carrier_offset; if (re_offset>= frame_parms->ofdm_symbol_size) re_offset-=frame_parms->ofdm_symbol_size; @@ -135,7 +129,7 @@ void nr_decode_pucch0( int32_t **rxdataF, memset(corr_re,0,nr_sequences*sizeof(double)); memset(corr_im,0,nr_sequences*sizeof(double)); for(i=0;inr_of_symbols;l++){ for(n=0;n<12;n++){ corr_re[i]+= (double)(r_re[12*l+n])/32767*(double)(x_n_re[i][12*l+n])/32767+(double)(r_im[12*l+n])/32767*(double)(x_n_im[i][12*l+n])/32767; corr_im[i]+= (double)(r_re[12*l+n])/32767*(double)(x_n_im[i][12*l+n])/32767-(double)(r_im[12*l+n])/32767*(double)(x_n_re[i][12*l+n])/32767; diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h index fbc193e7b1..a33972aaa7 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h @@ -57,18 +57,12 @@ void nr_decode_pucch1( int32_t **rxdataF, uint8_t timeDomainOCC, uint8_t nr_bit); -void nr_decode_pucch0( int32_t **rxdataF, - pucch_GroupHopping_t PUCCH_GroupHopping, - uint32_t n_id, //PHY_VARS_gNB *gNB, generally rxdataf is in gNB->common_vars - uint64_t *payload, - NR_DL_FRAME_PARMS *frame_parms, - int16_t amp, - int nr_tti_tx, - uint8_t m0, // should come from resource set - uint8_t nrofSymbols, // should come from resource set - uint8_t startingSymbolIndex, // should come from resource set - uint16_t startingPRB, // should come from resource set - uint8_t nr_bit); +void nr_decode_pucch0(int32_t **rxdataF, + uint64_t *payload, + NR_DL_FRAME_PARMS *frame_parms, + int slot, + int16_t amp, + nfapi_nr_pucch_pdu_t* pucch_pdu); void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, uint32_t n_id, From 5320469402fc9e344895e20a024b1199cd0d7185 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Wed, 5 Feb 2020 18:05:18 +0100 Subject: [PATCH 09/24] scheduling of PUCCH on MAC, passing PUCCH FAPI down to PHY (to be finished), filling DCI structures according to PUCCH (to be finished) --- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 15 ++-- openair2/LAYER2/NR_MAC_gNB/config.c | 3 - openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 82 +++++++++++++++++-- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 22 ++--- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 62 +++++++++++++- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 13 ++- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 18 ++-- 7 files changed, 176 insertions(+), 39 deletions(-) diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 910e60b36e..da80fa4640 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -347,15 +347,13 @@ void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) { nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req; - int num_pusch_pdu = UL_tti_req->n_pdus; + int num_pdus = UL_tti_req->n_pdus; - LOG_D(PHY,"phy_procedures_gNB_uespec_RX frame %d, slot %d, num_pusch_pdu %d\n",frame_rx,slot_rx,num_pusch_pdu); + LOG_D(PHY,"phy_procedures_gNB_uespec_RX frame %d, slot %d, num_pdus %d\n",frame_rx,slot_rx,num_pdus); - for (int i = 0; i < num_pusch_pdu; i++) { - + for (int i = 0; i < num_pdus; i++) { switch (UL_tti_req->pdus_list[i].pdu_type) { - case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE: - { + case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE: LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE\n",frame_rx,slot_rx); nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu; @@ -373,7 +371,10 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) //LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[0]->rxdataF_ext[0],6900,1,1); nr_ulsch_procedures(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid); nr_fill_rx_indication(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid); // indicate SDU to MAC - } + break; + case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE: + LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE\n",frame_rx,slot_rx); + break; } } } diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index d7d72fb6fd..2201e4f991 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -50,7 +50,6 @@ extern RAN_CONTEXT_t RC; //extern int l2_init_gNB(void); extern void mac_top_init_gNB(void); extern uint8_t nfapi_mode; -uint8_t nr_slots_per_frame[5] = {10, 20, 40, 80, 160}; void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) { @@ -281,8 +280,6 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm else LOG_I(PHY,"TDD has been properly configurated\n"); } - RC.nrmac[Mod_idP]->common_channels[0].num_slots_per_tdd = (nr_slots_per_frame[*scc->ssbSubcarrierSpacing])>>(7-cfg->tdd_table.tdd_period.value); - /* // PDCCH-ConfigCommon cfg->pdcch_config.controlResourceSetZero.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index c9b63fe25c..6f3f7a7f65 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -70,6 +70,8 @@ extern uint8_t nfapi_mode; uint16_t nr_pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 }; +uint8_t nr_slots_per_frame[5] = {10, 20, 40, 80, 160}; + void clear_nr_nfapi_information(gNB_MAC_INST * gNB, int CC_idP, frame_t frameP, @@ -308,6 +310,61 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) } */ +void nr_schedule_pucch(int Mod_idP, + int UE_id, + frame_t frameP, + sub_frame_t slotP) { + + uint16_t O_uci; + uint16_t O_ack; + uint8_t SR_flag = 0; // no SR in PUCCH implemented for now + uint8_t pucch_resource = 0; // in PHY test only one UE -> only one PUCCH resource used + NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon; + NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list; + AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id); + + NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id]; + int bwp_id=1; + NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]; + nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0]; + + NR_sched_pucch *curr_pucch = UE_list->UE_sched_ctrl[UE_id].sched_pucch; + NR_sched_pucch *temp_pucch; + int release_pucch = 0; + + if (curr_pucch != NULL) { + if ((frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) { + UL_tti_req->SFN = frameP; + UL_tti_req->Slot = slotP; + UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE; + UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t); + nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu; + memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t)); + UL_tti_req->n_pdus+=1; + + O_ack = curr_pucch->dai_c; + O_uci = O_ack; // for now we are just sending acknacks in pucch + + nr_configure_pucch(pucch_pdu, + scc, + ubwp, + pucch_resource, + O_uci, + O_ack, + SR_flag); + + release_pucch = 1; + } + } + + if (release_pucch) { + temp_pucch = UE_list->UE_sched_ctrl[UE_id].sched_pucch; + UE_list->UE_sched_ctrl[UE_id].sched_pucch = UE_list->UE_sched_ctrl[UE_id].sched_pucch->next_sched_pucch; + free(temp_pucch); + } + +} + bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot){ if((bitmap>>slot)&0x01) @@ -329,10 +386,13 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, int UE_id; uint64_t *dlsch_in_slot_bitmap=NULL; uint64_t *ulsch_in_slot_bitmap=NULL; - + NR_sched_pucch *pucch_sched = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch)); + if (phy_test) UE_id=0; NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + int num_slots_per_tdd = (nr_slots_per_frame[*scc->ssbSubcarrierSpacing])>>(7-scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); //nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config = NULL; @@ -346,11 +406,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, RC.nrmac[module_idP]->slot = slot_rxP; if (phy_test) { - dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.dlsch_in_slot_bitmap[UE_id]; // static bitmap signaling which slot in a tdd period contains dlsch - ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.ulsch_in_slot_bitmap[UE_id]; // static bitmap signaling which slot in a tdd period contains ulsch + dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[UE_id].dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch + ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[UE_id].ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch // hardcoding dlsch to be in slot 1 - if (!(slot_txP%cc->num_slots_per_tdd)) { + if (!(slot_txP%num_slots_per_tdd)) { if(slot_txP==0) *dlsch_in_slot_bitmap = 0x02; else @@ -358,7 +418,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, } // hardcoding ulsch to be in slot 8 - if (!(slot_rxP%cc->num_slots_per_tdd)) { + if (!(slot_rxP%num_slots_per_tdd)) { if(slot_rxP==0) *ulsch_in_slot_bitmap = 0x100; else @@ -403,8 +463,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, } // Phytest scheduling - if (phy_test && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%cc->num_slots_per_tdd))) { - nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL); + if (phy_test && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%num_slots_per_tdd))) { + nr_update_pucch_scheduling(module_idP, UE_id, frame_txP, slot_txP, num_slots_per_tdd,pucch_sched); + nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, pucch_sched, NULL); } /* @@ -416,8 +477,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, } //is_nr_DL_slot if (is_nr_UL_slot(cc->ServingCellConfigCommon,slot_rxP)) { - if (phy_test && (is_xlsch_in_slot(*ulsch_in_slot_bitmap,slot_rxP%cc->num_slots_per_tdd))){ - nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP); + if (phy_test) { + nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP); + if (is_xlsch_in_slot(*ulsch_in_slot_bitmap,slot_rxP%num_slots_per_tdd)){ + nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP); + } } } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 2fe553a055..1d286742de 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -247,9 +247,11 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, } int configure_fapi_dl_Tx(int Mod_idP, + sub_frame_t slotP, int *CCEIndex, nfapi_nr_dl_tti_request_body_t *dl_req, nfapi_nr_pdu_t *TX_req, + NR_sched_pucch *pucch_sched, uint8_t *mcsIndex, uint16_t *rbSize, uint16_t *rbStart) { @@ -350,10 +352,10 @@ int configure_fapi_dl_Tx(int Mod_idP, dci_pdu_rel15[0].ndi = 1; dci_pdu_rel15[0].rv = 0; dci_pdu_rel15[0].harq_pid = 0; - dci_pdu_rel15[0].dai = 2; + dci_pdu_rel15[0].dai = (pucch_sched->dai_c)&3; dci_pdu_rel15[0].tpc = 2; - dci_pdu_rel15[0].pucch_resource_indicator = 7; - dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = 7; + dci_pdu_rel15[0].pucch_resource_indicator = 7; //FIXME + dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_sched->ul_slot - slotP; //FIXME put check on validity of indicator depending on type of DCI LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n", dci_pdu_rel15[0].frequency_domain_assignment, @@ -373,9 +375,6 @@ int configure_fapi_dl_Tx(int Mod_idP, scc, bwp); - - - pdcch_pdu_rel15->numDlDci = 1; pdcch_pdu_rel15->AggregationLevel[0] = 4; pdcch_pdu_rel15->RNTI[0]=UE_list->rnti[0]; @@ -466,15 +465,16 @@ void config_uldci(NR_BWP_Uplink_t *ubwp,nfapi_nr_pusch_pdu_t *pusch_pdu,nfapi_nr void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, + NR_sched_pucch *pucch_sched, nfapi_nr_dl_tti_pdsch_pdu_rel15_t *dlsch_config) { LOG_D(MAC, "In nr_schedule_uss_dlsch_phytest \n"); - - gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; + + gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; //NR_COMMON_channels_t *cc = nr_mac->common_channels; //NR_ServingCellConfigCommon_t *scc=cc->ServingCellConfigCommon; nfapi_nr_dl_tti_request_body_t *dl_req; - nfapi_nr_pdu_t *TX_req; + nfapi_nr_pdu_t *TX_req; int TBS; int TBS_bytes; @@ -630,9 +630,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, CCEIndices[0] = CCEIndex; TBS_bytes = configure_fapi_dl_Tx(module_idP, + slotP, CCEIndices, dl_req, TX_req, + pucch_sched, dlsch_config!=NULL ? dlsch_config->mcsIndex : NULL, dlsch_config!=NULL ? &dlsch_config->rbSize : NULL, dlsch_config!=NULL ? &dlsch_config->rbStart : NULL); @@ -670,7 +672,7 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, int CCEIndices[2]; CCEIndices[0] = CCEIndex; LOG_D(MAC,"Configuring DL_TX in %d.%d\n",frameP,slotP); - TBS_bytes = configure_fapi_dl_Tx(module_idP,CCEIndices,dl_req, TX_req, + TBS_bytes = configure_fapi_dl_Tx(module_idP,slotP,CCEIndices,dl_req, TX_req, pucch_sched, dlsch_config!=NULL ? dlsch_config->mcsIndex : NULL, dlsch_config!=NULL ? &dlsch_config->rbSize : NULL, dlsch_config!=NULL ? &dlsch_config->rbStart : NULL); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 93b525a308..61e1e42250 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -655,6 +655,8 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, if (pucchres->pucch_ResourceId == *resource_id) { res_found = 1; pucch_pdu->prb_start = pucchres->startingPRB; + // FIXME why there is only one frequency hopping flag + // what about inter slot frequency hopping? pucch_pdu->freq_hop_flag = pucchres->intraSlotFrequencyHopping!= NULL ? 1 : 0; pucch_pdu->second_hop_prb = pucchres->secondHopPRB!= NULL ? *pucchres->secondHopPRB : 0; switch(pucchres->format.present) { @@ -732,8 +734,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, int *dci_formats, - int *rnti_types - ) { + int *rnti_types) { uint16_t N_RB = pdcch_pdu_rel15->BWPSize; uint8_t fsize=0, pos=0; @@ -1245,6 +1246,63 @@ int add_new_nr_ue(module_id_t mod_idP, return -1; } +// function to update pucch scheduling parameters in UE list when a USS DL is scheduled +void nr_update_pucch_scheduling(int Mod_idP, + int UE_id, + frame_t frameP, + sub_frame_t slotP, + int slots_per_tdd, + NR_sched_pucch *sched_pucch) { + + NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon; + NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list; + int first_ul_slot_tdd,next_slot; + NR_sched_pucch *curr_pucch; + + // if the list of pucch to be scheduled is empty + if (UE_list->UE_sched_ctrl[UE_id].sched_pucch == NULL) { + sched_pucch->frame = frameP; + sched_pucch->next_sched_pucch = NULL; + sched_pucch->dai_c = 1; + if ( (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots!=0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)) { + // first pucch occasion in first UL or MIXED slot + first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots; + // computing slot in which pucch is scheduled + sched_pucch->ul_slot = first_ul_slot_tdd + slotP - (slotP % slots_per_tdd); + } + else + AssertFatal(1==0,"No Uplink Slots in this Frame\n"); + + UE_list->UE_sched_ctrl[UE_id].sched_pucch = sched_pucch; + } + else { + curr_pucch = UE_list->UE_sched_ctrl[UE_id].sched_pucch; + while (curr_pucch->next_sched_pucch != NULL) + curr_pucch = curr_pucch->next_sched_pucch; + // we are scheduling at most 11 ack nacks in the same pucch + if (curr_pucch->dai_c==11) { + next_slot = curr_pucch->ul_slot + 1; + if (next_slot == slots_per_tdd) + AssertFatal(1==0,"No more slots in this TDD period\n"); + else { + // generating a new item in the list + sched_pucch->frame = frameP; + sched_pucch->next_sched_pucch = NULL; + sched_pucch->dai_c = 1; + sched_pucch->ul_slot = next_slot; + curr_pucch->next_sched_pucch = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch)); + curr_pucch->next_sched_pucch = sched_pucch; + } + } + else { + sched_pucch = curr_pucch; + sched_pucch->dai_c = 1 + sched_pucch->dai_c; + } + } + +} + + /*void fill_nfapi_coresets_and_searchspaces(NR_CellGroupConfig_t *cg, nfapi_nr_coreset_t *coreset, nfapi_nr_search_space_t *search_space) { diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index aa705cedf9..ca3b19107d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -68,9 +68,11 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, sub_frame_t subframeP); int configure_fapi_dl_Tx(int Mod_id, + sub_frame_t slotP, int *CCEIndeces, nfapi_nr_dl_tti_request_body_t *dl_req, nfapi_nr_pdu_t *TX_req, + NR_sched_pucch *pucch_sched, uint8_t *mcsIndex, uint16_t *rbSize, uint16_t *rbStart); @@ -79,11 +81,19 @@ void config_uldci(NR_BWP_Uplink_t *ubwp,nfapi_nr_pusch_pdu_t *pusch_pdu,nfapi_nr void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, + NR_sched_pucch *pucch_sched, nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_config); void nr_schedule_uss_ulsch_phytest(int Mod_idP, frame_t frameP, sub_frame_t slotP); + +void nr_update_pucch_scheduling(int Mod_idP, + int UE_id, + frame_t frameP, + sub_frame_t slotP, + int slots_per_tdd, + NR_sched_pucch *sched_pucch); void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, nr_scs_e scs_common, @@ -117,8 +127,7 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, int *dci_formats, - int *rnti_types - ); + int *rnti_types); int get_spf(nfapi_nr_config_request_scf_t *cfg); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index b9df20d4c2..10b5e49d36 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -98,13 +98,21 @@ typedef struct { uint8_t vrb_map_UL[100]; /// number of subframe allocation pattern available for MBSFN sync area uint8_t num_sf_allocation_pattern; - /// number of slots per TDD period - uint8_t num_slots_per_tdd; } NR_COMMON_channels_t; -/*! \brief scheduling control information set through an API (not used)*/ +typedef struct NR_sched_pucch { + int frame; + int ul_slot; + uint8_t dai_c; + uint8_t dai_t; + struct NR_sched_pucch *next_sched_pucch; +} NR_sched_pucch; + +/*! \brief scheduling control information set through an API */ typedef struct { - int dummy; + uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch + uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch + NR_sched_pucch *sched_pucch; } NR_UE_sched_ctrl_t; /*! \brief UE list used by eNB to order UEs/CC for scheduling*/ @@ -122,8 +130,6 @@ typedef struct { boolean_t active[MAX_MOBILES_PER_GNB]; rnti_t rnti[MAX_MOBILES_PER_GNB]; NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB]; - uint64_t dlsch_in_slot_bitmap[MAX_MOBILES_PER_GNB]; // static bitmap signaling which slot in a tdd period contains dlsch - uint64_t ulsch_in_slot_bitmap[MAX_MOBILES_PER_GNB]; // static bitmap signaling which slot in a tdd period contains ulsch } NR_UE_list_t; /*! \brief top level gNB MAC structure */ From 3e5682d8bb261db1fcb19894ac5aa20b98c0ff99 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Mon, 10 Feb 2020 10:11:45 +0100 Subject: [PATCH 10/24] including uci indication --- cmake_targets/CMakeLists.txt | 4 +- executables/nr-gnb.c | 4 +- .../nfapi/public_inc/nfapi_nr_interface_scf.h | 37 ++-- openair1/PHY/NR_TRANSPORT/nr_transport.h | 22 +++ .../NR_TRANSPORT/nr_transport_common_proto.h | 12 ++ .../PHY/NR_TRANSPORT/nr_uci_tools_common.c | 167 ++++++++++++++++++ openair1/PHY/NR_TRANSPORT/pucch_rx.c | 42 +++-- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c | 136 +------------- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h | 33 ---- openair1/PHY/defs_gNB.h | 15 +- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 33 +++- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 6 +- 12 files changed, 289 insertions(+), 222 deletions(-) create mode 100644 openair1/PHY/NR_TRANSPORT/nr_uci_tools_common.c diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 808efee345..f5e23f7383 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1361,7 +1361,8 @@ set(PHY_SRC_UE ${PHY_POLARSRC} ${PHY_SMALLBLOCKSRC} ${PHY_LDPCSRC} - ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/pucch_rx.c + ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/pucch_rx.c + ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_uci_tools_common.c ) set(PHY_NR_UE_SRC @@ -1387,6 +1388,7 @@ set(PHY_SRC_UE ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dci_nr.c ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dci_tools_nr.c ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/pucch_nr.c + ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_uci_tools_common.c ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/ul_ref_seq_nr.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c diff --git a/executables/nr-gnb.c b/executables/nr-gnb.c index c6f71024aa..318ec73621 100644 --- a/executables/nr-gnb.c +++ b/executables/nr-gnb.c @@ -966,12 +966,12 @@ void init_gNB(int single_thread_flag,int wait_for_sync) { gNB->if_inst->NR_PHY_config_req = nr_phy_config_request; memset((void *)&gNB->UL_INFO,0,sizeof(gNB->UL_INFO)); LOG_I(PHY,"Setting indication lists\n"); - gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list = gNB->rx_pdu_list; + /*gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list = gNB->rx_pdu_list; gNB->UL_INFO.crc_ind.crc_indication_body.crc_pdu_list = gNB->crc_pdu_list; gNB->UL_INFO.sr_ind.sr_indication_body.sr_pdu_list = gNB->sr_pdu_list; gNB->UL_INFO.harq_ind.harq_indication_body.harq_pdu_list = gNB->harq_pdu_list; gNB->UL_INFO.cqi_ind.cqi_pdu_list = gNB->cqi_pdu_list; - gNB->UL_INFO.cqi_ind.cqi_raw_pdu_list = gNB->cqi_raw_pdu_list; + gNB->UL_INFO.cqi_ind.cqi_raw_pdu_list = gNB->cqi_raw_pdu_list;*/ gNB->prach_energy_counter = 0; } diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index ee1550a5bb..941150be4d 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -19,6 +19,7 @@ #define NFAPI_MAX_NUM_UL_UE_PER_GROUP 6 #define NFAPI_MAX_NUM_UL_PDU 8 +#define NFAPI_MAX_NUM_UCI_INDICATION 8 #define NFAPI_MAX_NUM_GROUPS 8 #define NFAPI_MAX_NUM_CB 8 @@ -1519,8 +1520,8 @@ typedef struct uint8_t ul_cqi; uint16_t timing_advance; uint16_t rssi; - nfapi_nr_sr_pdu_0_1_t sr;//67 - nfapi_nr_harq_pdu_0_1_t harq;//68 + nfapi_nr_sr_pdu_0_1_t *sr;//67 + nfapi_nr_harq_pdu_0_1_t *harq;//68 }nfapi_nr_uci_pucch_pdu_format_0_1_t; @@ -1542,28 +1543,22 @@ typedef struct }nfapi_nr_uci_pucch_pdu_format_2_3_4_t; -//for SR, HARQ and CSI Part 1/ 2 PDUs +typedef enum { + NFAPI_NR_UCI_PDCCH_PDU_TYPE = 0, + NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE = 1, + NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE = 2, +} nfapi_nr_uci_pdu_type_e; typedef struct { - nfapi_nr_uci_pusch_pdu_t* pusch_pdu; - nfapi_nr_uci_pucch_pdu_format_0_1_t* pucch_pdu_format_0_1; - nfapi_nr_uci_pucch_pdu_format_2_3_4_t* pucch_pdu_format_2_3_4; - nfapi_nr_sr_pdu_0_1_t* sr_pdu_0_1; - nfapi_nr_sr_pdu_2_3_4_t* sr_pdu_2_3_4; - nfapi_nr_harq_pdu_0_1_t* harq_pdu_0_1; - nfapi_nr_harq_pdu_2_3_4_t* harq_pdu_2_3_4; - nfapi_nr_csi_part1_pdu_t* csi_part1_pdu; - nfapi_nr_csi_part2_pdu_t* csi_part2_pdu; - -} nfapi_nr_uci_pdu_information_t; - -typedef struct -{ - uint16_t pdu_type; + uint16_t pdu_type; // 0 for PDU on PUSCH, 1 for PUCCH format 0 or 1, 2 for PUCCH format 2 to 4 uint16_t pdu_size; - nfapi_nr_uci_pdu_information_t uci_pdu; - + union + { + nfapi_nr_uci_pusch_pdu_t pusch_pdu; + nfapi_nr_uci_pucch_pdu_format_0_1_t pucch_pdu_format_0_1; + nfapi_nr_uci_pucch_pdu_format_2_3_4_t pucch_pdu_format_2_3_4; + }; } nfapi_nr_uci_t; typedef struct @@ -1571,7 +1566,7 @@ typedef struct uint16_t sfn; uint16_t slot; uint16_t num_ucis; - nfapi_nr_uci_t* uci_list; + nfapi_nr_uci_t uci_list[NFAPI_MAX_NUM_UCI_INDICATION]; } nfapi_nr_uci_indication_t; diff --git a/openair1/PHY/NR_TRANSPORT/nr_transport.h b/openair1/PHY/NR_TRANSPORT/nr_transport.h index be73875058..ba0791d33a 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_transport.h +++ b/openair1/PHY/NR_TRANSPORT/nr_transport.h @@ -123,4 +123,26 @@ void rx_nr_prach_ru(RU_t *ru, int frame, int subframe); +void nr_decode_pucch1(int32_t **rxdataF, + pucch_GroupHopping_t pucch_GroupHopping, + uint32_t n_id, // hoppingID higher layer parameter + uint64_t *payload, + NR_DL_FRAME_PARMS *frame_parms, + int16_t amp, + int nr_tti_tx, + uint8_t m0, + uint8_t nrofSymbols, + uint8_t startingSymbolIndex, + uint16_t startingPRB, + uint16_t startingPRB_intraSlotHopping, + uint8_t timeDomainOCC, + uint8_t nr_bit); + +void nr_decode_pucch0(int32_t **rxdataF, + NR_DL_FRAME_PARMS *frame_parms, + int slot, + nfapi_nr_uci_pucch_pdu_format_0_1_t* uci_pdu, + nfapi_nr_pucch_pdu_t* pucch_pdu); + + #endif /*__NR_TRANSPORT__H__*/ diff --git a/openair1/PHY/NR_TRANSPORT/nr_transport_common_proto.h b/openair1/PHY/NR_TRANSPORT/nr_transport_common_proto.h index 762346048f..85f3c00b90 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_transport_common_proto.h +++ b/openair1/PHY/NR_TRANSPORT/nr_transport_common_proto.h @@ -41,7 +41,19 @@ #define NR_PUSCH_y 3 // UCI placeholder bit +void nr_group_sequence_hopping(pucch_GroupHopping_t PUCCH_GroupHopping, + uint32_t n_id, + uint8_t n_hop, + int nr_tti_tx, + uint8_t *u, + uint8_t *v); +double nr_cyclic_shift_hopping(uint32_t n_id, + uint8_t m0, + uint8_t mcs, + uint8_t lnormal, + uint8_t lprime, + int nr_tti_tx); /** \brief Computes available bits G. */ diff --git a/openair1/PHY/NR_TRANSPORT/nr_uci_tools_common.c b/openair1/PHY/NR_TRANSPORT/nr_uci_tools_common.c new file mode 100644 index 0000000000..2b0cbe72b3 --- /dev/null +++ b/openair1/PHY/NR_TRANSPORT/nr_uci_tools_common.c @@ -0,0 +1,167 @@ +/* + * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The OpenAirInterface Software Alliance licenses this file to You under + * the OAI Public License, Version 1.1 (the "License"); you may not use this file + * except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.openairinterface.org/?page_id=698 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + *------------------------------------------------------------------------------- + * For more information about the OpenAirInterface (OAI) Software Alliance: + * contact@openairinterface.org + */ + +/*! \file PHY/NR_TRANSPORT/nr_dci_tools_common.c + * \brief + * \author + * \date 2020 + * \version 0.1 + * \company Eurecom + * \email: + * \note + * \warning + */ + +#include "nr_dci.h" + +void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, + uint32_t n_id, + uint8_t n_hop, + int nr_tti_tx, + uint8_t *u, + uint8_t *v) { + /* + * Implements TS 38.211 subclause 6.3.2.2.1 Group and sequence hopping + * The following variables are set by higher layers: + * - PUCCH_GroupHopping: + * - n_id: higher-layer parameter hoppingId + * - n_hop: frequency hopping index + * if intra-slot frequency hopping is disabled by the higher-layer parameter PUCCH-frequency-hopping + * n_hop=0 + * if frequency hopping is enabled by the higher-layer parameter PUCCH-frequency-hopping + * n_hop=0 for the first hop + * n_hop=1 for the second hop + */ + // depending on the value of the PUCCH_GroupHopping, we will obtain different values for u,v + //pucch_GroupHopping_t PUCCH_GroupHopping = ue->pucch_config_common_nr->pucch_GroupHopping; // from higher layers FIXME!!! + // n_id defined as per TS 38.211 subclause 6.3.2.2.1 (is given by the higher-layer parameter hoppingId) + // it is hoppingId from PUCCH-ConfigCommon: + // Cell-Specific scrambling ID for group hoppping and sequence hopping if enabled + // Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2) BIT STRING (SIZE (10)) + //uint16_t n_id = ue->pucch_config_common_nr->hoppingId; // from higher layers FIXME!!! +#ifdef DEBUG_NR_PUCCH_TX + printf("\t\t [nr_group_sequence_hopping] PUCCH_GroupHopping=%u, n_id=%u \n",PUCCH_GroupHopping,n_id); +#endif + uint8_t f_ss=0,f_gh=0; + *u=0; + *v=0; + uint32_t c_init = 0; + uint32_t x1,s; // TS 38.211 Subclause 5.2.1 + int l = 32, minShift = ((2*nr_tti_tx+n_hop)<<3); + int tmpShift =0; +#ifdef DEBUG_NR_PUCCH_TX + printf("\t\t [nr_group_sequence_hopping] calculating u,v -> "); +#endif + + if (PUCCH_GroupHopping == neither) { // PUCCH_GroupHopping 'neither' + f_ss = n_id%30; + } + + if (PUCCH_GroupHopping == enable) { // PUCCH_GroupHopping 'enabled' + c_init = floor(n_id/30); // we initialize c_init to calculate u,v according to 6.3.2.2.1 of 38.211 + s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1 + for (int m=0; m<8; m++) { + while(minShift >= l) { + s = lte_gold_generic(&x1, &c_init, 0); + l = l+32; + } + + tmpShift = (minShift&((1<<5)-1)); //minShift%32; + f_gh = f_gh + ((1<>tmpShift)&1))); + minShift ++; + } + + f_gh = f_gh%30; + f_ss = n_id%30; + /* for (int m=0; m<8; m++){ + f_gh = f_gh + ((1<>(8*(2*nr_tti_tx+n_hop)+m))&1))); // Not sure we have to use nr_tti_tx FIXME!!! + } + f_gh = f_gh%30; + f_ss = n_id%30;*/ + } + + if (PUCCH_GroupHopping == disable) { // PUCCH_GroupHopping 'disabled' + c_init = (1<<5)*floor(n_id/30)+(n_id%30); // we initialize c_init to calculate u,v + s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1 + f_ss = n_id%30; + l = 32, minShift = (2*nr_tti_tx+n_hop); + + while(minShift >= l) { + s = lte_gold_generic(&x1, &c_init, 0); + l = l+32; + } + + tmpShift = (minShift&((1<<5)-1)); //minShift%32; + *v = (uint8_t)((s>>tmpShift)&1); + // *v = (uint8_t)((s>>(2*nr_tti_tx+n_hop))&1); // Not sure we have to use nr_tti_tx FIXME!!! + } + + *u = (f_gh+f_ss)%30; +#ifdef DEBUG_NR_PUCCH_TX + printf("%d,%d\n",*u,*v); +#endif +} + +double nr_cyclic_shift_hopping(uint32_t n_id, + uint8_t m0, + uint8_t mcs, + uint8_t lnormal, + uint8_t lprime, + int nr_tti_tx) { + /* + * Implements TS 38.211 subclause 6.3.2.2.2 Cyclic shift hopping + * - n_id: higher-layer parameter hoppingId + * - m0: provided by higher layer parameter PUCCH-F0-F1-initial-cyclic-shift of PUCCH-F0-resource-config + * - mcs: mcs=0 except for PUCCH format 0 when it depends on information to be transmitted according to TS 38.213 subclause 9.2 + * - lnormal: lnormal is the OFDM symbol number in the PUCCH transmission where l=0 corresponds to the first OFDM symbol of the PUCCH transmission + * - lprime: lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213] + */ + // alpha_init initialized to 2*PI/12=0.5235987756 + double alpha = 0.5235987756; + uint32_t c_init = n_id; // we initialize c_init again to calculate n_cs + + uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1 + uint8_t n_cs=0; + int l = 32, minShift = (14*8*nr_tti_tx )+ 8*(lnormal+lprime); + int tmpShift =0; +#ifdef DEBUG_NR_PUCCH_TX + printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%u -> \n",c_init); +#endif + + for (int m=0; m<8; m++) { + while(minShift >= l) { + s = lte_gold_generic(&x1, &c_init, 0); + l = l+32; + } + + tmpShift = (minShift&((1<<5)-1)); //minShift%32; + minShift ++; + n_cs = n_cs+((1<>tmpShift)&1))); + // calculating n_cs (Not sure we have to use nr_tti_tx FIXME!!!) + // n_cs = n_cs+((1<>((14*8*nr_tti_tx) + 8*(lnormal+lprime) + m))&1))); + } + + alpha = (alpha * (double)((m0+mcs+n_cs)%12)); +#ifdef DEBUG_NR_PUCCH_TX + printf("n_cs=%d -> %lf\n",n_cs,alpha); +#endif + return(alpha); +} diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index e89c6739da..c1e202994b 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -10,8 +10,8 @@ #include "PHY/defs_nr_common.h" #include "PHY/defs_nr_UE.h" #include "PHY/NR_UE_TRANSPORT/pucch_nr.h" -#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h" - +#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h" +#include "PHY/NR_TRANSPORT/nr_transport.h" #include "common/utils/LOG/log.h" #include "common/utils/LOG/vcd_signal_dumper.h" @@ -19,10 +19,9 @@ void nr_decode_pucch0(int32_t **rxdataF, - uint64_t *payload, NR_DL_FRAME_PARMS *frame_parms, int slot, - int16_t amp, + nfapi_nr_uci_pucch_pdu_format_0_1_t* uci_pdu, nfapi_nr_pucch_pdu_t* pucch_pdu) { int nr_sequences; @@ -84,9 +83,9 @@ void nr_decode_pucch0(int32_t **rxdataF, printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u,v,alpha,l); #endif for (n=0; n<12; n++){ - x_n_re[i][(12*l)+n] = (int16_t)((int32_t)(amp)*(int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15) + x_n_re[i][(12*l)+n] = (int16_t)((int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15) - (((int32_t)(round(32767*sin(alpha*n))) * table_5_2_2_2_2_Im[u][n])>>15)))>>15); // Re part of base sequence shifted by alpha - x_n_im[i][(12*l)+n] =(int16_t)((int32_t)(amp)* (int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Im[u][n])>>15) + x_n_im[i][(12*l)+n] =(int16_t)((int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Im[u][n])>>15) + (((int32_t)(round(32767*sin(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15)))>>15); // Im part of base sequence shifted by alpha #ifdef DEBUG_NR_PUCCH_RX printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \tx_n(l=%d,n=%d)=(%d,%d)\n", @@ -97,7 +96,7 @@ void nr_decode_pucch0(int32_t **rxdataF, } int16_t r_re[24],r_im[24]; /* - * Implementing TS 38.211 Subclause 6.3.2.3.2 Mapping to physical resources FIXME! + * Implementing TS 38.211 Subclause 6.3.2.3.2 Mapping to physical resources */ uint32_t re_offset=0; uint8_t l2; @@ -114,8 +113,8 @@ void nr_decode_pucch0(int32_t **rxdataF, r_re[(12*l)+n]=((int16_t *)&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset])[0]; r_im[(12*l)+n]=((int16_t *)&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset])[1]; #ifdef DEBUG_NR_PUCCH_RX - printf("\t [nr_generate_pucch0] mapping to RE \t amp=%d \tofdm_symbol_size=%d \tN_RB_DL=%d \tfirst_carrier_offset=%d \ttxptr(%d)=(x_n(l=%d,n=%d)=(%d,%d))\n", - amp,frame_parms->ofdm_symbol_size,frame_parms->N_RB_DL,frame_parms->first_carrier_offset,(l2*frame_parms->ofdm_symbol_size)+re_offset, + printf("\t [nr_generate_pucch0] mapping to RE \tofdm_symbol_size=%d \tN_RB_DL=%d \tfirst_carrier_offset=%d \ttxptr(%d)=(x_n(l=%d,n=%d)=(%d,%d))\n", + frame_parms->ofdm_symbol_size,frame_parms->N_RB_DL,frame_parms->first_carrier_offset,(l2*frame_parms->ofdm_symbol_size)+re_offset, l,n,((int16_t *)&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset])[0], ((int16_t *)&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset])[1]); #endif @@ -138,14 +137,35 @@ void nr_decode_pucch0(int32_t **rxdataF, corr[i]=corr_re[i]*corr_re[i]+corr_im[i]*corr_im[i]; } float max_corr=corr[0]; - int index=0; + uint8_t index=0; for(i=1;imax_corr){ index= i; max_corr=corr[i]; } } - *payload=(uint64_t)index; // payload bits 00..b3b2b0, b0 is the SR bit and b3b2 are HARQ bits + + // first bit of bitmap for sr presence and second bit for acknack presence + uci_pdu->pdu_bit_map = pucch_pdu->sr_flag | ((pucch_pdu->bit_len_harq>0)<<1); + uci_pdu->pucch_format = 0; // format 0 + uci_pdu->ul_cqi = 0xff; // currently not valid + uci_pdu->timing_advance = 0xffff; // currently not valid + uci_pdu->rssi = 0xffff; // currently not valid + if (pucch_pdu->sr_flag) { + //currently not supported + } + else + uci_pdu->sr = NULL; + if (pucch_pdu->bit_len_harq>0) { + uci_pdu->harq = calloc(1,sizeof(*uci_pdu->harq)); + uci_pdu->harq->num_harq = pucch_pdu->bit_len_harq; + uci_pdu->harq->harq_confidence_level = 0xff; // currently not valid + uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(uci_pdu->harq->num_harq); + for (i=0; iharq->num_harq; i++) // FIXME for non present + uci_pdu->harq->harq_list[i].harq_value = (index>>i)&0x01; + } + else + uci_pdu->harq = NULL; } diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c index 148ee51a69..d63cef5085 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c @@ -37,7 +37,7 @@ //#include "LAYER2/MAC/extern.h" #include "PHY/NR_UE_TRANSPORT/pucch_nr.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h" - +#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h" #include "common/utils/LOG/log.h" #include "common/utils/LOG/vcd_signal_dumper.h" @@ -49,140 +49,6 @@ //#define ONE_OVER_SQRT2 23170 // 32767/sqrt(2) = 23170 (ONE_OVER_SQRT2) -void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, - uint32_t n_id, - uint8_t n_hop, - int nr_tti_tx, - uint8_t *u, - uint8_t *v) { - /* - * Implements TS 38.211 subclause 6.3.2.2.1 Group and sequence hopping - * The following variables are set by higher layers: - * - PUCCH_GroupHopping: - * - n_id: higher-layer parameter hoppingId - * - n_hop: frequency hopping index - * if intra-slot frequency hopping is disabled by the higher-layer parameter PUCCH-frequency-hopping - * n_hop=0 - * if frequency hopping is enabled by the higher-layer parameter PUCCH-frequency-hopping - * n_hop=0 for the first hop - * n_hop=1 for the second hop - */ - // depending on the value of the PUCCH_GroupHopping, we will obtain different values for u,v - //pucch_GroupHopping_t PUCCH_GroupHopping = ue->pucch_config_common_nr->pucch_GroupHopping; // from higher layers FIXME!!! - // n_id defined as per TS 38.211 subclause 6.3.2.2.1 (is given by the higher-layer parameter hoppingId) - // it is hoppingId from PUCCH-ConfigCommon: - // Cell-Specific scrambling ID for group hoppping and sequence hopping if enabled - // Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2) BIT STRING (SIZE (10)) - //uint16_t n_id = ue->pucch_config_common_nr->hoppingId; // from higher layers FIXME!!! -#ifdef DEBUG_NR_PUCCH_TX - printf("\t\t [nr_group_sequence_hopping] PUCCH_GroupHopping=%u, n_id=%u \n",PUCCH_GroupHopping,n_id); -#endif - uint8_t f_ss=0,f_gh=0; - *u=0; - *v=0; - uint32_t c_init = 0; - uint32_t x1,s; // TS 38.211 Subclause 5.2.1 - int l = 32, minShift = ((2*nr_tti_tx+n_hop)<<3); - int tmpShift =0; -#ifdef DEBUG_NR_PUCCH_TX - printf("\t\t [nr_group_sequence_hopping] calculating u,v -> "); -#endif - - if (PUCCH_GroupHopping == neither) { // PUCCH_GroupHopping 'neither' - f_ss = n_id%30; - } - - if (PUCCH_GroupHopping == enable) { // PUCCH_GroupHopping 'enabled' - c_init = floor(n_id/30); // we initialize c_init to calculate u,v according to 6.3.2.2.1 of 38.211 - s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1 - for (int m=0; m<8; m++) { - while(minShift >= l) { - s = lte_gold_generic(&x1, &c_init, 0); - l = l+32; - } - - tmpShift = (minShift&((1<<5)-1)); //minShift%32; - f_gh = f_gh + ((1<>tmpShift)&1))); - minShift ++; - } - - f_gh = f_gh%30; - f_ss = n_id%30; - /* for (int m=0; m<8; m++){ - f_gh = f_gh + ((1<>(8*(2*nr_tti_tx+n_hop)+m))&1))); // Not sure we have to use nr_tti_tx FIXME!!! - } - f_gh = f_gh%30; - f_ss = n_id%30;*/ - } - - if (PUCCH_GroupHopping == disable) { // PUCCH_GroupHopping 'disabled' - c_init = (1<<5)*floor(n_id/30)+(n_id%30); // we initialize c_init to calculate u,v - s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1 - f_ss = n_id%30; - l = 32, minShift = (2*nr_tti_tx+n_hop); - - while(minShift >= l) { - s = lte_gold_generic(&x1, &c_init, 0); - l = l+32; - } - - tmpShift = (minShift&((1<<5)-1)); //minShift%32; - *v = (uint8_t)((s>>tmpShift)&1); - // *v = (uint8_t)((s>>(2*nr_tti_tx+n_hop))&1); // Not sure we have to use nr_tti_tx FIXME!!! - } - - *u = (f_gh+f_ss)%30; -#ifdef DEBUG_NR_PUCCH_TX - printf("%d,%d\n",*u,*v); -#endif -} - -double nr_cyclic_shift_hopping(uint32_t n_id, - uint8_t m0, - uint8_t mcs, - uint8_t lnormal, - uint8_t lprime, - int nr_tti_tx) { - /* - * Implements TS 38.211 subclause 6.3.2.2.2 Cyclic shift hopping - * - n_id: higher-layer parameter hoppingId - * - m0: provided by higher layer parameter PUCCH-F0-F1-initial-cyclic-shift of PUCCH-F0-resource-config - * - mcs: mcs=0 except for PUCCH format 0 when it depends on information to be transmitted according to TS 38.213 subclause 9.2 - * - lnormal: lnormal is the OFDM symbol number in the PUCCH transmission where l=0 corresponds to the first OFDM symbol of the PUCCH transmission - * - lprime: lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213] - */ - // alpha_init initialized to 2*PI/12=0.5235987756 - double alpha = 0.5235987756; - uint32_t c_init = n_id; // we initialize c_init again to calculate n_cs - - uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1 - uint8_t n_cs=0; - int l = 32, minShift = (14*8*nr_tti_tx )+ 8*(lnormal+lprime); - int tmpShift =0; -#ifdef DEBUG_NR_PUCCH_TX - printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%u -> \n",c_init); -#endif - - for (int m=0; m<8; m++) { - while(minShift >= l) { - s = lte_gold_generic(&x1, &c_init, 0); - l = l+32; - } - - tmpShift = (minShift&((1<<5)-1)); //minShift%32; - minShift ++; - n_cs = n_cs+((1<>tmpShift)&1))); - // calculating n_cs (Not sure we have to use nr_tti_tx FIXME!!!) - // n_cs = n_cs+((1<>((14*8*nr_tti_tx) + 8*(lnormal+lprime) + m))&1))); - } - - alpha = (alpha * (double)((m0+mcs+n_cs)%12)); -#ifdef DEBUG_NR_PUCCH_TX - printf("n_cs=%d -> %lf\n",n_cs,alpha); -#endif - return(alpha); -} - void nr_generate_pucch0(PHY_VARS_NR_UE *ue, int32_t **txdataF, NR_DL_FRAME_PARMS *frame_parms, diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h index a33972aaa7..4c4847d7de 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h @@ -42,40 +42,7 @@ #include "T.h" #define ONE_OVER_SQRT2 23170 // 32767/sqrt(2) = 23170 (ONE_OVER_SQRT2) -void nr_decode_pucch1( int32_t **rxdataF, - pucch_GroupHopping_t pucch_GroupHopping, - uint32_t n_id, // hoppingID higher layer parameter - uint64_t *payload, - NR_DL_FRAME_PARMS *frame_parms, - int16_t amp, - int nr_tti_tx, - uint8_t m0, - uint8_t nrofSymbols, - uint8_t startingSymbolIndex, - uint16_t startingPRB, - uint16_t startingPRB_intraSlotHopping, - uint8_t timeDomainOCC, - uint8_t nr_bit); -void nr_decode_pucch0(int32_t **rxdataF, - uint64_t *payload, - NR_DL_FRAME_PARMS *frame_parms, - int slot, - int16_t amp, - nfapi_nr_pucch_pdu_t* pucch_pdu); - -void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, - uint32_t n_id, - uint8_t n_hop, - int nr_tti_tx, - uint8_t *u, - uint8_t *v); -double nr_cyclic_shift_hopping(uint32_t n_id, - uint8_t m0, - uint8_t mcs, - uint8_t lnormal, - uint8_t lprime, - int nr_tti_tx); void nr_generate_pucch0(PHY_VARS_NR_UE *ue, int32_t **txdataF, NR_DL_FRAME_PARMS *frame_parms, diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h index 52aade312a..f5e41e00e8 100644 --- a/openair1/PHY/defs_gNB.h +++ b/openair1/PHY/defs_gNB.h @@ -605,23 +605,12 @@ typedef struct PHY_VARS_gNB_s { NR_UL_IND_t UL_INFO; pthread_mutex_t UL_INFO_mutex; - /// NFAPI RX ULSCH information - nfapi_rx_indication_pdu_t rx_pdu_list[NFAPI_RX_IND_MAX_PDU]; - /// NFAPI RX ULSCH CRC information - nfapi_crc_indication_pdu_t crc_pdu_list[NFAPI_CRC_IND_MAX_PDU]; - /// NFAPI HARQ information - nfapi_harq_indication_pdu_t harq_pdu_list[NFAPI_HARQ_IND_MAX_PDU]; - /// NFAPI SR information - nfapi_sr_indication_pdu_t sr_pdu_list[NFAPI_SR_IND_MAX_PDU]; - /// NFAPI CQI information - nfapi_cqi_indication_pdu_t cqi_pdu_list[NFAPI_CQI_IND_MAX_PDU]; - /// NFAPI CQI information (raw component) - nfapi_cqi_indication_raw_pdu_t cqi_raw_pdu_list[NFAPI_CQI_IND_MAX_PDU]; - /// NFAPI PRACH information + /// NFAPI PRACH information (to be removed) nfapi_preamble_pdu_t preamble_list[MAX_NUM_RX_PRACH_PREAMBLES]; //Sched_Rsp_t Sched_INFO; nfapi_nr_ul_tti_request_t UL_tti_req; + nfapi_nr_uci_indication_t uci_indication; nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu; nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu; diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index da80fa4640..461da165f7 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -27,6 +27,7 @@ #include "PHY/NR_TRANSPORT/nr_dlsch.h" #include "PHY/NR_TRANSPORT/nr_ulsch.h" #include "PHY/NR_ESTIMATION/nr_ul_estimation.h" +#include "PHY/NR_UE_TRANSPORT/pucch_nr.h" #include "SCHED/sched_eNB.h" #include "sched_nr.h" #include "SCHED/sched_common_extern.h" @@ -260,7 +261,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_ // -------------------- // [hna] TO BE CLEANED // -------------------- - + // [FM] This structure is not SCF fapi structure and shouldn't be used // nfapi_rx_indication_pdu_t *pdu; int timing_advance_update; @@ -346,9 +347,14 @@ void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) { - nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req; + nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req; int num_pdus = UL_tti_req->n_pdus; + nfapi_nr_uci_indication_t *uci_indication = &gNB->uci_indication; + uci_indication->sfn = frame_rx; + uci_indication->slot = slot_rx; + uci_indication->num_ucis = 0; + LOG_D(PHY,"phy_procedures_gNB_uespec_RX frame %d, slot %d, num_pdus %d\n",frame_rx,slot_rx,num_pdus); for (int i = 0; i < num_pdus; i++) { @@ -356,7 +362,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE: LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE\n",frame_rx,slot_rx); - nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu; + nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[i].pusch_pdu; nr_fill_ulsch(gNB,frame_rx,slot_rx,pusch_pdu); uint8_t ULSCH_id = find_nr_ulsch(pusch_pdu->rnti,gNB,SEARCH_EXIST); @@ -374,6 +380,27 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) break; case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE: LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE\n",frame_rx,slot_rx); + + nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[i].pucch_pdu; + switch (pucch_pdu->format_type) { + case 0: + uci_indication->uci_list[uci_indication->num_ucis].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE; + uci_indication->uci_list[uci_indication->num_ucis].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t); + nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu_format0 = &uci_indication->uci_list[uci_indication->num_ucis].pucch_pdu_format_0_1; + + nr_decode_pucch0(gNB->common_vars.rxdataF, + &gNB->frame_parms, + slot_rx, + uci_pdu_format0, + pucch_pdu); + + uci_indication->num_ucis += 1; + break; + case 1: + break; + default: + AssertFatal(1==0,"Only PUCCH format 0 and 1 are currently supported\n"); + } break; } } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 1d286742de..6f299fa3d3 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -352,10 +352,10 @@ int configure_fapi_dl_Tx(int Mod_idP, dci_pdu_rel15[0].ndi = 1; dci_pdu_rel15[0].rv = 0; dci_pdu_rel15[0].harq_pid = 0; - dci_pdu_rel15[0].dai = (pucch_sched->dai_c)&3; + dci_pdu_rel15[0].dai = (pucch_sched->dai_c-1)&3; dci_pdu_rel15[0].tpc = 2; - dci_pdu_rel15[0].pucch_resource_indicator = 7; //FIXME - dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_sched->ul_slot - slotP; //FIXME put check on validity of indicator depending on type of DCI + dci_pdu_rel15[0].pucch_resource_indicator = 0; //FIXME this is fixed to 0 in phy test with only one user + dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_sched->ul_slot - slotP; //FIXME check on validity of indicator depending on type of DCI LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n", dci_pdu_rel15[0].frequency_domain_assignment, From 795ed9a814cd23e130a6dad60a5ebfed61d5c825 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Mon, 10 Feb 2020 16:39:50 +0100 Subject: [PATCH 11/24] fix in pucch configuration --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 6 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 68 ++++++++++--------- 2 files changed, 39 insertions(+), 35 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 6f299fa3d3..7641d25483 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -260,7 +260,9 @@ int configure_fapi_dl_Tx(int Mod_idP, gNB_MAC_INST *nr_mac = RC.nrmac[Mod_idP]; NR_COMMON_channels_t *cc = nr_mac->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - + + int pucch_fb_timing = pucch_sched->ul_slot - slotP; + nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu; nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu; int TBS; @@ -355,7 +357,7 @@ int configure_fapi_dl_Tx(int Mod_idP, dci_pdu_rel15[0].dai = (pucch_sched->dai_c-1)&3; dci_pdu_rel15[0].tpc = 2; dci_pdu_rel15[0].pucch_resource_indicator = 0; //FIXME this is fixed to 0 in phy test with only one user - dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_sched->ul_slot - slotP; //FIXME check on validity of indicator depending on type of DCI + dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_fb_timing-1; //FIXME valid only for format 1_0 LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n", dci_pdu_rel15[0].frequency_domain_assignment, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 61e1e42250..adc366f35f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -561,8 +561,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, NR_PUCCH_ResourceSet_t *pucchresset; NR_PUCCH_FormatConfig_t *pucchfmt; NR_PUCCH_ResourceId_t *resource_id = NULL; - NR_PUSCH_Config_t *pusch_Config = bwp->bwp_Dedicated->pusch_Config->choice.setup; - long *pusch_id = pusch_Config->dataScramblingIdentityPUSCH; + long *id0 = NULL; int n_list, n_set; uint16_t N2,N3; @@ -570,39 +569,42 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, pucch_pdu->bit_len_harq = O_ack; - if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) - id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0; - if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) - id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->transformPrecodingDisabled->scramblingID0; - - // hop flags and hopping id are valid for any BWP - switch (scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping){ - case 0 : - // if neither, both disabled - pucch_pdu->group_hop_flag = 0; - pucch_pdu->sequence_hop_flag = 0; - break; - case 1 : - // if enable, group enabled - pucch_pdu->group_hop_flag = 1; - pucch_pdu->sequence_hop_flag = 0; - break; - case 2 : - // if disable, sequence disabled - pucch_pdu->group_hop_flag = 0; - pucch_pdu->sequence_hop_flag = 1; - break; - default: - AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM); - } - - if (scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId != NULL) - pucch_pdu->hopping_id = *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId; - else - pucch_pdu->hopping_id = *scc->physCellId; - if (bwp) { // This is not the InitialBWP + NR_PUSCH_Config_t *pusch_Config = bwp->bwp_Dedicated->pusch_Config->choice.setup; + long *pusch_id = pusch_Config->dataScramblingIdentityPUSCH; + + if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) + id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0; + if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) + id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->transformPrecodingDisabled->scramblingID0; + + // hop flags and hopping id are valid for any BWP + switch (bwp->bwp_Common->pucch_ConfigCommon->choice.setup->pucch_GroupHopping){ + case 0 : + // if neither, both disabled + pucch_pdu->group_hop_flag = 0; + pucch_pdu->sequence_hop_flag = 0; + break; + case 1 : + // if enable, group enabled + pucch_pdu->group_hop_flag = 1; + pucch_pdu->sequence_hop_flag = 0; + break; + case 2 : + // if disable, sequence disabled + pucch_pdu->group_hop_flag = 0; + pucch_pdu->sequence_hop_flag = 1; + break; + default: + AssertFatal(1==0,"Group hopping flag %ld undefined (0,1,2) \n", bwp->bwp_Common->pucch_ConfigCommon->choice.setup->pucch_GroupHopping); + } + + if (bwp->bwp_Common->pucch_ConfigCommon->choice.setup->hoppingId != NULL) + pucch_pdu->hopping_id = *bwp->bwp_Common->pucch_ConfigCommon->choice.setup->hoppingId; + else + pucch_pdu->hopping_id = *scc->physCellId; + pucch_pdu->bwp_size = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275); pucch_pdu->bwp_start = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275); pucch_pdu->subcarrier_spacing = bwp->bwp_Common->genericParameters.subcarrierSpacing; From 57a612c52de1a9ed4170a69f6eb5a2135848fa11 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Wed, 12 Feb 2020 09:34:07 +0100 Subject: [PATCH 12/24] update of pucch scheduler --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 6 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 6 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 156 +++++++++++++++--- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 5 + openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 3 +- 5 files changed, 143 insertions(+), 33 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 6f3f7a7f65..978e6cfe1b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -318,7 +318,6 @@ void nr_schedule_pucch(int Mod_idP, uint16_t O_uci; uint16_t O_ack; uint8_t SR_flag = 0; // no SR in PUCCH implemented for now - uint8_t pucch_resource = 0; // in PHY test only one UE -> only one PUCCH resource used NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon; NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list; AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id); @@ -340,15 +339,14 @@ void nr_schedule_pucch(int Mod_idP, UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t); nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu; memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t)); - UL_tti_req->n_pdus+=1; - + UL_tti_req->n_pdus+=1; O_ack = curr_pucch->dai_c; O_uci = O_ack; // for now we are just sending acknacks in pucch nr_configure_pucch(pucch_pdu, scc, ubwp, - pucch_resource, + curr_pucch->resource_indicator, O_uci, O_ack, SR_flag); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 7641d25483..4c0f529d4c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -261,8 +261,6 @@ int configure_fapi_dl_Tx(int Mod_idP, NR_COMMON_channels_t *cc = nr_mac->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - int pucch_fb_timing = pucch_sched->ul_slot - slotP; - nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu; nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu; int TBS; @@ -356,8 +354,8 @@ int configure_fapi_dl_Tx(int Mod_idP, dci_pdu_rel15[0].harq_pid = 0; dci_pdu_rel15[0].dai = (pucch_sched->dai_c-1)&3; dci_pdu_rel15[0].tpc = 2; - dci_pdu_rel15[0].pucch_resource_indicator = 0; //FIXME this is fixed to 0 in phy test with only one user - dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_fb_timing-1; //FIXME valid only for format 1_0 + dci_pdu_rel15[0].pucch_resource_indicator = pucch_sched->resource_indicator; + dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_sched->timing_indicator; LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n", dci_pdu_rel15[0].frequency_domain_assignment, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index adc366f35f..4f675fecc4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1248,6 +1248,53 @@ int add_new_nr_ue(module_id_t mod_idP, return -1; } + +void get_pdsch_to_harq_feedback(int Mod_idP, + int UE_id, + NR_SearchSpace__searchSpaceType_PR ss_type, + uint8_t *pdsch_to_harq_feedback) { + + int bwp_id=1; + NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list; + NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id]; + NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; + NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]; + + NR_SearchSpace_t *ss; + + // common search type uses DCI format 1_0 + if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) { + for (int i=0; i<8; i++) + pdsch_to_harq_feedback[i] = i+1; + } + else { + // searching for a ue specific search space + int found=0; + + for (int i=0;ibwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count;i++) { + ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[i]; + AssertFatal(ss->controlResourceSetId != NULL,"ss->controlResourceSetId is null\n"); + AssertFatal(ss->searchSpaceType != NULL,"ss->searchSpaceType is null\n"); + if (ss->searchSpaceType->present == ss_type) { + found=1; + break; + } + } + AssertFatal(found==1,"Couldn't find a ue specific searchspace\n"); + if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) { + for (int i=0; i<8; i++) + pdsch_to_harq_feedback[i] = i+1; + } + else { + if(ubwp->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK != NULL) + pdsch_to_harq_feedback = (uint8_t *)ubwp->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK; + else + AssertFatal(found==1,"There is no allocated dl_DataToUL_ACK for pdsch to harq feedback\n"); + } + } +} + + // function to update pucch scheduling parameters in UE list when a USS DL is scheduled void nr_update_pucch_scheduling(int Mod_idP, int UE_id, @@ -1258,50 +1305,111 @@ void nr_update_pucch_scheduling(int Mod_idP, NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon; NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list; - int first_ul_slot_tdd,next_slot; + int first_ul_slot_tdd,k; NR_sched_pucch *curr_pucch; + uint8_t pdsch_to_harq_feedback[8]; + int found = 0; + int i = 0; + int nr_ulmix_slots = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; + if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0) + nr_ulmix_slots++; + + // this is hardcoded for now as ue specific + NR_SearchSpace__searchSpaceType_PR ss_type = NR_SearchSpace__searchSpaceType_PR_ue_Specific; + get_pdsch_to_harq_feedback(Mod_idP,UE_id,ss_type,pdsch_to_harq_feedback); // if the list of pucch to be scheduled is empty if (UE_list->UE_sched_ctrl[UE_id].sched_pucch == NULL) { sched_pucch->frame = frameP; sched_pucch->next_sched_pucch = NULL; sched_pucch->dai_c = 1; - if ( (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots!=0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)) { + sched_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource + if ( nr_ulmix_slots > 0 ) { // first pucch occasion in first UL or MIXED slot first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots; - // computing slot in which pucch is scheduled - sched_pucch->ul_slot = first_ul_slot_tdd + slotP - (slotP % slots_per_tdd); + for (k=0; kul_slot = first_ul_slot_tdd + k + (slotP - (slotP % slots_per_tdd)); + sched_pucch->timing_indicator = pdsch_to_harq_feedback[i]; + } + else + AssertFatal(1==0,"No Uplink slot available in accordance to allowed timing indicator\n"); } else AssertFatal(1==0,"No Uplink Slots in this Frame\n"); UE_list->UE_sched_ctrl[UE_id].sched_pucch = sched_pucch; } - else { + else { // to be tested curr_pucch = UE_list->UE_sched_ctrl[UE_id].sched_pucch; - while (curr_pucch->next_sched_pucch != NULL) - curr_pucch = curr_pucch->next_sched_pucch; - // we are scheduling at most 11 ack nacks in the same pucch - if (curr_pucch->dai_c==11) { - next_slot = curr_pucch->ul_slot + 1; - if (next_slot == slots_per_tdd) - AssertFatal(1==0,"No more slots in this TDD period\n"); - else { - // generating a new item in the list - sched_pucch->frame = frameP; - sched_pucch->next_sched_pucch = NULL; - sched_pucch->dai_c = 1; - sched_pucch->ul_slot = next_slot; - curr_pucch->next_sched_pucch = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch)); - curr_pucch->next_sched_pucch = sched_pucch; + if (curr_pucch->dai_c<11) { // we are scheduling at most 11 harq-ack in the same pucch + while (i<8 && found == 0) { // look if timing indicator is among allowed values for current pucch + if (pdsch_to_harq_feedback[i]==(curr_pucch->ul_slot % slots_per_tdd)-(slotP % slots_per_tdd)) + found = 1; + if (found == 0) i++; + } + if (found == 1) { // scheduling this harq-ack in current pucch + sched_pucch = curr_pucch; + sched_pucch->dai_c = 1 + sched_pucch->dai_c; + sched_pucch->timing_indicator = pdsch_to_harq_feedback[i]; } } - else { - sched_pucch = curr_pucch; - sched_pucch->dai_c = 1 + sched_pucch->dai_c; + if (curr_pucch->dai_c==11 || found == 0) { // if current pucch is full or no timing indicator allowed + // look for pucch occasions in other UL of mixed slots + for (k=scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots; kul_slot % slots_per_tdd)) { // skip current scheduled slot (already checked) + i = 0; + while (i<8 && found == 0) { // look if timing indicator is among allowed values + if (pdsch_to_harq_feedback[i]==k-(slotP % slots_per_tdd)) + found = 1; + if (found == 0) i++; + } + if (found == 1) { + if (k<(curr_pucch->ul_slot % slots_per_tdd)) { // we need to add a pucch occasion before current pucch + sched_pucch->frame = frameP; + sched_pucch->ul_slot = k + (slotP - (slotP % slots_per_tdd)); + sched_pucch->next_sched_pucch = curr_pucch; + sched_pucch->dai_c = 1; + sched_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource + sched_pucch->timing_indicator = pdsch_to_harq_feedback[i]; + UE_list->UE_sched_ctrl[UE_id].sched_pucch = sched_pucch; + } + else { + while (curr_pucch->next_sched_pucch != NULL && k!=(curr_pucch->ul_slot % slots_per_tdd)) + curr_pucch = curr_pucch->next_sched_pucch; + if (curr_pucch == NULL) { // creating a new item in the list + sched_pucch->frame = frameP; + sched_pucch->next_sched_pucch = NULL; + sched_pucch->dai_c = 1; + sched_pucch->timing_indicator = pdsch_to_harq_feedback[i]; + sched_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource + sched_pucch->ul_slot = k + (slotP - (slotP % slots_per_tdd)); + curr_pucch->next_sched_pucch = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch)); + curr_pucch->next_sched_pucch = sched_pucch; + } + else { + if (curr_pucch->dai_c==11) + found = 0; // if pucch at index k is already full we have to find a new one in a following occasion + else { // scheduling this harq-ack in current pucch + sched_pucch = curr_pucch; + sched_pucch->dai_c = 1 + sched_pucch->dai_c; + sched_pucch->timing_indicator = pdsch_to_harq_feedback[i]; + } + } + } + } + } + } } } - } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index ca3b19107d..cbbac3a55a 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -94,6 +94,11 @@ void nr_update_pucch_scheduling(int Mod_idP, sub_frame_t slotP, int slots_per_tdd, NR_sched_pucch *sched_pucch); + +void get_pdsch_to_harq_feedback(int Mod_idP, + int UE_id, + NR_SearchSpace__searchSpaceType_PR ss_type, + uint8_t *pdsch_to_harq_feedback); void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, nr_scs_e scs_common, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 10b5e49d36..90cd09c021 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -104,7 +104,8 @@ typedef struct NR_sched_pucch { int frame; int ul_slot; uint8_t dai_c; - uint8_t dai_t; + uint8_t timing_indicator; + uint8_t resource_indicator; struct NR_sched_pucch *next_sched_pucch; } NR_sched_pucch; From 0a2e033253d8c5035931245db27f5794404ce491 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Thu, 13 Feb 2020 17:18:20 +0100 Subject: [PATCH 13/24] max ack bits in mac_proto.h --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c | 6 +++--- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 2 ++ 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 4f675fecc4..9d0365d5ff 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1350,7 +1350,7 @@ void nr_update_pucch_scheduling(int Mod_idP, } else { // to be tested curr_pucch = UE_list->UE_sched_ctrl[UE_id].sched_pucch; - if (curr_pucch->dai_c<11) { // we are scheduling at most 11 harq-ack in the same pucch + if (curr_pucch->dai_cul_slot % slots_per_tdd)-(slotP % slots_per_tdd)) found = 1; @@ -1362,7 +1362,7 @@ void nr_update_pucch_scheduling(int Mod_idP, sched_pucch->timing_indicator = pdsch_to_harq_feedback[i]; } } - if (curr_pucch->dai_c==11 || found == 0) { // if current pucch is full or no timing indicator allowed + if (curr_pucch->dai_c==MAX_ACK_BITS || found == 0) { // if current pucch is full or no timing indicator allowed // look for pucch occasions in other UL of mixed slots for (k=scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots; kul_slot % slots_per_tdd)) { // skip current scheduled slot (already checked) @@ -1396,7 +1396,7 @@ void nr_update_pucch_scheduling(int Mod_idP, curr_pucch->next_sched_pucch = sched_pucch; } else { - if (curr_pucch->dai_c==11) + if (curr_pucch->dai_c==MAX_ACK_BITS) found = 0; // if pucch at index k is already full we have to find a new one in a following occasion else { // scheduling this harq-ack in current pucch sched_pucch = curr_pucch; diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index cbbac3a55a..657de416a9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -34,6 +34,8 @@ #include "nr_mac_gNB.h" #include "PHY/defs_gNB.h" +#define MAX_ACK_BITS 2 //only format 0 is available for now + void set_cset_offset(uint16_t); void mac_top_init_gNB(void); From 72d76c75856307d7b45d7bc6efa82d40ea3390cc Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Wed, 1 Apr 2020 16:52:56 +0200 Subject: [PATCH 14/24] dft-based pucch0 receiver --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 88 +++++++++++++++++++++------ openair1/PHY/TOOLS/lte_dfts.c | 4 ++ openair1/PHY/TOOLS/tools_defs.h | 2 + openair1/SIMULATION/NR_PHY/pucchsim.c | 30 ++++++--- 4 files changed, 98 insertions(+), 26 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index c1e202994b..3cd5f251af 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -17,6 +17,7 @@ #include "T.h" +#define DEBUG_NR_PUCCH_RX 1 void nr_decode_pucch0(int32_t **rxdataF, NR_DL_FRAME_PARMS *frame_parms, @@ -79,28 +80,32 @@ void nr_decode_pucch0(int32_t **rxdataF, nr_group_sequence_hopping(pucch_GroupHopping,pucch_pdu->hopping_id,n_hop,slot,&u,&v); // calculating u and v value alpha = nr_cyclic_shift_hopping(pucch_pdu->hopping_id,pucch_pdu->initial_cyclic_shift,mcs[i],l,pucch_pdu->start_symbol_index,slot); - #ifdef DEBUG_NR_PUCCH_RX - printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u,v,alpha,l); - #endif +#ifdef DEBUG_NR_PUCCH_RX + printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d/%d,mcs %d)\n",u,v,alpha,l,l+pucch_pdu->start_symbol_index,mcs[i]); +#endif for (n=0; n<12; n++){ x_n_re[i][(12*l)+n] = (int16_t)((int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15) - - (((int32_t)(round(32767*sin(alpha*n))) * table_5_2_2_2_2_Im[u][n])>>15)))>>15); // Re part of base sequence shifted by alpha + - (((int32_t)(round(32767*sin(alpha*n))) * table_5_2_2_2_2_Im[u][n])>>15)))); // Re part of base sequence shifted by alpha x_n_im[i][(12*l)+n] =(int16_t)((int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Im[u][n])>>15) - + (((int32_t)(round(32767*sin(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15)))>>15); // Im part of base sequence shifted by alpha - #ifdef DEBUG_NR_PUCCH_RX - printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \tx_n(l=%d,n=%d)=(%d,%d)\n", - u,v,alpha,l,n,x_n_re[(12*l)+n],x_n_im[(12*l)+n]); - #endif + + (((int32_t)(round(32767*sin(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15)))); // Im part of base sequence shifted by alpha +#ifdef DEBUG_NR_PUCCH_RX + printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \tx_n(l=%d,n=%d)=(%d,%d) %d,%d\n", + u,v,alpha,l,n,x_n_re[i][(12*l)+n],x_n_im[i][(12*l)+n], + (int32_t)(round(32767*cos(alpha*n))), + (int32_t)(round(32767*sin(alpha*n)))); +#endif } } } - int16_t r_re[24],r_im[24]; /* * Implementing TS 38.211 Subclause 6.3.2.3.2 Mapping to physical resources */ uint32_t re_offset=0; uint8_t l2; +#ifdef OLD_IMPL + int16_t r_re[24],r_im[24]; + for (l=0; lnr_of_symbols; l++) { l2 = l+pucch_pdu->start_symbol_index; @@ -122,7 +127,7 @@ void nr_decode_pucch0(int32_t **rxdataF, if (re_offset>= frame_parms->ofdm_symbol_size) re_offset-=frame_parms->ofdm_symbol_size; } - } + } double corr[nr_sequences],corr_re[nr_sequences],corr_im[nr_sequences]; memset(corr,0,nr_sequences*sizeof(double)); memset(corr_re,0,nr_sequences*sizeof(double)); @@ -144,7 +149,55 @@ void nr_decode_pucch0(int32_t **rxdataF, max_corr=corr[i]; } } +#else + int16_t *x_re = x_n_re[0],*x_im = x_n_im[0]; + int16_t xr[32] __attribute__((aligned(32))); + int16_t xrt[32] __attribute__((aligned(32))); + int32_t xrtmag=0; + int maxpos=0; + int n2=0; + uint8_t index=0; + memset((void*)xr,0,32*sizeof(int16_t)); + + for (l=0; lnr_of_symbols; l++) { + + l2 = l+pucch_pdu->start_symbol_index; + re_offset = (12*pucch_pdu->prb_start) + frame_parms->first_carrier_offset; + if (re_offset>= frame_parms->ofdm_symbol_size) + re_offset-=frame_parms->ofdm_symbol_size; + + AssertFatal(re_offset+12 < frame_parms->ofdm_symbol_size,"pucch straddles DC carrier, handle this!\n"); + + n2=0; + int16_t *r=(int16_t*)&rxdataF[0][(l2*frame_parms->ofdm_symbol_size+re_offset)]; + if (l==0) for (n=0;n<12;n++,n2+=2) { + xr[n2] =((int32_t)x_re[n]*r[n2]+(int32_t)x_im[n]*r[n2+1])>>15; + xr[n2+1]=((int32_t)x_re[n]*r[n2+1]-(int32_t)x_im[n]*r[n2])>>15; + printf("x (%d,%d), r (%d,%d), xr (%d,%d)\n", + x_re[n],x_im[n],r[n2],r[n2+1],xr[n2],xr[n2+1]); + } + else for (n=0;n<12;n++,n2+=2) { + xr[n2] +=((int32_t)x_re[n]*r[n2]+(int32_t)x_im[n]*r[n2+1])>>15; + xr[n2+1]+=((int32_t)x_re[n]*r[n2+1]-(int32_t)x_im[n]*r[n2])>>15; + } + x_re+=12; + x_im+=12; + } + idft16f(xr,xrt); + n2=0; + int32_t temp; + for (n=0;n<16;n++,n2+=2) { +#ifdef DEBUG_NR_PUCCH_RX + printf("PUCCH IDFT[%d] = (%d,%d)\n",n,xrt[n2],xrt[n2+1]); +#endif + if ((temp=(int32_t)xrt[n2]*xrt[n2]+(int32_t)xrt[n2+1]*xrt[n2+1])pdu_bit_map = pucch_pdu->sr_flag | ((pucch_pdu->bit_len_harq>0)<<1); uci_pdu->pucch_format = 0; // format 0 @@ -281,7 +334,6 @@ void nr_decode_pucch1( int32_t **rxdataF, re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset; } - //txptr = &txdataF[0][re_offset]; for (int n=0; n<12; n++) { if ((n==6) && (startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB contains DC, we need to recalculate the offset when n=6 (for second half PRB) @@ -294,7 +346,7 @@ void nr_decode_pucch1( int32_t **rxdataF, #ifdef DEBUG_NR_PUCCH_RX printf("\t [nr_generate_pucch1] mapping PUCCH to RE \t amp=%d \tofdm_symbol_size=%d \tN_RB_DL=%d \tfirst_carrier_offset=%d \tz_pucch[%d]=txptr(%d)=(x_n(l=%d,n=%d)=(%d,%d))\n", amp,frame_parms->ofdm_symbol_size,frame_parms->N_RB_DL,frame_parms->first_carrier_offset,i+n,re_offset, - l,n,((int16_t *)&txdataF[0][re_offset])[0],((int16_t *)&txdataF[0][re_offset])[1]); + l,n,((int16_t *)&rxdataF[0][re_offset])[0],((int16_t *)&rxdataF[0][re_offset])[1]); #endif } @@ -305,7 +357,7 @@ void nr_decode_pucch1( int32_t **rxdataF, #ifdef DEBUG_NR_PUCCH_RX printf("\t [nr_generate_pucch1] mapping DM-RS to RE \t amp=%d \tofdm_symbol_size=%d \tN_RB_DL=%d \tfirst_carrier_offset=%d \tz_dm-rs[%d]=txptr(%d)=(x_n(l=%d,n=%d)=(%d,%d))\n", amp,frame_parms->ofdm_symbol_size,frame_parms->N_RB_DL,frame_parms->first_carrier_offset,i+n,re_offset, - l,n,((int16_t *)&txdataF[0][re_offset])[0],((int16_t *)&txdataF[0][re_offset])[1]); + l,n,((int16_t *)&rxdataF[0][re_offset])[0],((int16_t *)&rxdataF[0][re_offset])[1]); #endif // printf("l=%d\ti=%d\tre_offset=%d\treceived dmrs re=%d\tim=%d\n",l,i,re_offset,z_dmrs_re_rx[i+n],z_dmrs_im_rx[i+n]); } @@ -416,7 +468,7 @@ void nr_decode_pucch1( int32_t **rxdataF, mprime, m, n, (mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n, table_6_3_2_4_1_2_Wi_Re[N_SF_mprime_PUCCH_1][w_index][m],y_n_re[n],table_6_3_2_4_1_2_Wi_Im[N_SF_mprime_PUCCH_1][w_index][m],y_n_im[n], table_6_3_2_4_1_2_Wi_Re[N_SF_mprime_PUCCH_1][w_index][m],y_n_im[n],table_6_3_2_4_1_2_Wi_Im[N_SF_mprime_PUCCH_1][w_index][m],y_n_re[n], - z_re[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n],z_im[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n]); + z_re_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n],z_im_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n]); #endif // multiplying with conjugate of low papr sequence z_re_temp = (int16_t)(((((int32_t)(r_u_v_alpha_delta_re[n])*z_re_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n])>>15) @@ -450,7 +502,7 @@ void nr_decode_pucch1( int32_t **rxdataF, mprime, m, n, (mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n, table_6_3_2_4_1_2_Wi_Re[N_SF_mprime_PUCCH_1][w_index][m],r_u_v_alpha_delta_dmrs_re[n],table_6_3_2_4_1_2_Wi_Im[N_SF_mprime_PUCCH_1][w_index][m],r_u_v_alpha_delta_dmrs_im[n], table_6_3_2_4_1_2_Wi_Re[N_SF_mprime_PUCCH_1][w_index][m],r_u_v_alpha_delta_dmrs_im[n],table_6_3_2_4_1_2_Wi_Im[N_SF_mprime_PUCCH_1][w_index][m],r_u_v_alpha_delta_dmrs_re[n], - z_dmrs_re[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n],z_dmrs_im[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n]); + z_dmrs_re_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n],z_dmrs_im_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n]); #endif //finding channel coeffcients by dividing received dmrs with actual dmrs and storing them in z_dmrs_re_rx and z_dmrs_im_rx arrays z_dmrs_re_temp = (int16_t)(((((int32_t)(r_u_v_alpha_delta_dmrs_re[n])*z_dmrs_re_rx[(mprime*12*N_SF_mprime0_PUCCH_DMRS_1)+(m*12)+n])>>15) @@ -501,7 +553,7 @@ void nr_decode_pucch1( int32_t **rxdataF, mprime, m, n, (mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n, table_6_3_2_4_1_2_Wi_Re[N_SF_mprime_PUCCH_1][w_index][m],y_n_re[n],table_6_3_2_4_1_2_Wi_Im[N_SF_mprime_PUCCH_1][w_index][m],y_n_im[n], table_6_3_2_4_1_2_Wi_Re[N_SF_mprime_PUCCH_1][w_index][m],y_n_im[n],table_6_3_2_4_1_2_Wi_Im[N_SF_mprime_PUCCH_1][w_index][m],y_n_re[n], - z_re[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n],z_im[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n]); + z_re_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n],z_im_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n]); #endif z_re_temp = (int16_t)(((((int32_t)(r_u_v_alpha_delta_re[n])*z_re_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n])>>15) + (((int32_t)(r_u_v_alpha_delta_im[n])*z_im_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n])>>15))>>1); @@ -529,7 +581,7 @@ void nr_decode_pucch1( int32_t **rxdataF, mprime, m, n, (mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n, table_6_3_2_4_1_2_Wi_Re[N_SF_mprime_PUCCH_1][w_index][m],r_u_v_alpha_delta_dmrs_re[n],table_6_3_2_4_1_2_Wi_Im[N_SF_mprime_PUCCH_1][w_index][m],r_u_v_alpha_delta_dmrs_im[n], table_6_3_2_4_1_2_Wi_Re[N_SF_mprime_PUCCH_1][w_index][m],r_u_v_alpha_delta_dmrs_im[n],table_6_3_2_4_1_2_Wi_Im[N_SF_mprime_PUCCH_1][w_index][m],r_u_v_alpha_delta_dmrs_re[n], - z_dmrs_re[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n],z_dmrs_im[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n]); + z_dmrs_re_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n],z_dmrs_im_rx[(mprime*12*N_SF_mprime0_PUCCH_1)+(m*12)+n]); #endif //finding channel coeffcients by dividing received dmrs with actual dmrs and storing them in z_dmrs_re_rx and z_dmrs_im_rx arrays z_dmrs_re_temp = (int16_t)(((((int32_t)(r_u_v_alpha_delta_dmrs_re[n])*z_dmrs_re_rx[(mprime*12*N_SF_mprime0_PUCCH_DMRS_1)+(m*12)+n])>>15) diff --git a/openair1/PHY/TOOLS/lte_dfts.c b/openair1/PHY/TOOLS/lte_dfts.c index 2de8653ab3..4147ba6dc6 100644 --- a/openair1/PHY/TOOLS/lte_dfts.c +++ b/openair1/PHY/TOOLS/lte_dfts.c @@ -2437,6 +2437,10 @@ static inline void idft16(int16_t *x,int16_t *y) #endif } +void idft16f(int16_t *x,int16_t *y) { + idft16(x,y); +} + #if defined(__x86_64__) || defined(__i386__) #ifdef __AVX2__ // Does two 16-point IDFTS (x[0 .. 15] is 128 LSBs of input vector, x[16..31] is in 128 MSBs) diff --git a/openair1/PHY/TOOLS/tools_defs.h b/openair1/PHY/TOOLS/tools_defs.h index 4253eb28d3..8a2310378e 100644 --- a/openair1/PHY/TOOLS/tools_defs.h +++ b/openair1/PHY/TOOLS/tools_defs.h @@ -171,6 +171,8 @@ This function performs optimized fixed-point radix-2 FFT/IFFT. ); */ +void idft16f(int16_t *x,int16_t *y); + void idft1536(int16_t *sigF,int16_t *sig,int scale); void idft6144(int16_t *sigF,int16_t *sig,int scale); diff --git a/openair1/SIMULATION/NR_PHY/pucchsim.c b/openair1/SIMULATION/NR_PHY/pucchsim.c index 35e9713b27..33023eaeeb 100644 --- a/openair1/SIMULATION/NR_PHY/pucchsim.c +++ b/openair1/SIMULATION/NR_PHY/pucchsim.c @@ -454,8 +454,6 @@ int main(int argc, char **argv) for(SNR=snr0;SNR<=snr1;SNR=SNR+1){ ack_nack_errors=0; n_errors = 0; - sigma2_dB = 20*log10((double)amp/32767)-SNR; - sigma2 = pow(10,sigma2_dB/10); for (trial=0; trialpucch_config_dedicated,actual_payload,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit); } - for(i=0; isamples_per_slot; i<(nr_tti_tx+1)*frame_parms->samples_per_slot; i++) { r_re[aa][i]=((double)(((int16_t *)txdata[0])[(i<<1)])/32767 + sqrt(sigma2/2)*gaussdouble(0.0,1.0)); r_im[aa][i]=((double)(((int16_t *)txdata[0])[(i<<1)+1])/32767+ sqrt(sigma2/2)*gaussdouble(0.0,1.0)); r_re[aa][i]=r_re[0][i]/(sqrt(sigma2/2)+1); @@ -481,13 +483,26 @@ int main(int argc, char **argv) ((int16_t *)txdata[aa])[(i<<1)+1] =(int16_t)round(r_im[aa][i]*32767); } if(format==0){ - nr_decode_pucch0(txdata,PUCCH_GroupHopping,n_id,&(payload_received),frame_parms,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,nr_bit); + nfapi_nr_uci_pucch_pdu_format_0_1_t uci_pdu; + nfapi_nr_pucch_pdu_t pucch_pdu; + pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1; + pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1; + pucch_pdu.bit_len_harq = nr_bit; + pucch_pdu.sr_flag = 0; + pucch_pdu.nr_of_symbols = nrofSymbols; + pucch_pdu.hopping_id = n_id; + pucch_pdu.initial_cyclic_shift = 0; + pucch_pdu.start_symbol_index = startingSymbolIndex; + pucch_pdu.prb_start = startingPRB; + nr_decode_pucch0(txdata,frame_parms,nr_tti_tx,&uci_pdu,&pucch_pdu); if(nr_bit==1) - ack_nack_errors+=(((actual_payload^payload_received)&2)>>1); + ack_nack_errors+=(actual_payload^uci_pdu.harq->harq_list[0].harq_value); else - ack_nack_errors+=(((actual_payload^payload_received)&2)>>1) + (((actual_payload^payload_received)&4)>>2); + ack_nack_errors+=((actual_payload^uci_pdu.harq->harq_list[0].harq_value)+((actual_payload>>1)^uci_pdu.harq->harq_list[1].harq_value)); + free(uci_pdu.harq->harq_list); } else{ + nr_decode_pucch1(txdata,PUCCH_GroupHopping,n_id,&(payload_received),frame_parms,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit); if(nr_bit==1) ack_nack_errors+=((actual_payload^payload_received)&1); @@ -496,8 +511,7 @@ int main(int argc, char **argv) } n_errors=((actual_payload^payload_received)&1)+(((actual_payload^payload_received)&2)>>1)+(((actual_payload^payload_received)&4)>>2)+n_errors; } - printf("Decoded payload is %ld\n",payload_received); - printf("SNR=%f, n_trials=%d, n_bit_errors=%d\n",SNR,n_trials,n_errors); + printf("SNR=%f, n_trials=%d, n_bit_errors=%d\n",SNR,n_trials,ack_nack_errors); if((float)ack_nack_errors/(float)(nr_bit*n_trials)<=target_error_rate){ printf("PUCCH test OK\n"); break; From 1c16705355ac2450fdb282d5e10e685346ff7978 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Wed, 8 Apr 2020 00:03:44 +0200 Subject: [PATCH 15/24] pucch receiver for format 0 reworked without floating point and no generation of sequences for each decoding attempt, SR detection integrated --- cmake_targets/autotests/test_case_list.xml | 16 +++--- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 64 +++++++++++++++++----- openair1/PHY/defs_gNB.h | 17 +++--- 3 files changed, 67 insertions(+), 30 deletions(-) diff --git a/cmake_targets/autotests/test_case_list.xml b/cmake_targets/autotests/test_case_list.xml index b3954db1fd..b7222d0330 100644 --- a/cmake_targets/autotests/test_case_list.xml +++ b/cmake_targets/autotests/test_case_list.xml @@ -1177,21 +1177,23 @@ execution - nr_pucchsim Test cases. (Test1: Format 0 ACK miss 106 PRB), - (Test2: Format 1 ACK miss 106 PRB), - (Test3: Format 1 ACK miss 273 PRB), - (Test4: Format 1 NACKtoACK 106 PRB) + nr_pucchsim Test cases. (Test1: Format 0 1-bit ACK miss 106 PRB), + (Test2: Format 0 2-bit ACK miss 106 PRB), + (Test3: Format 1 ACK miss 106 PRB), + (Test4: Format 1 ACK miss 273 PRB), + (Test5: Format 1 NACKtoACK 106 PRB) $OPENAIR_DIR/cmake_targets/build_oai --phy_simulators -c $OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash $OPENAIR_DIR/targets/bin/nr_pucchsim.Rel15 - -R 106 -i 1 -P 0 -b 1 -s3 -n100 - -R 106 -i 14 -P 1 -b 1 -s-6 -n100 + -R 106 -i 1 -P 0 -b 1 -s-7 -n1000 + -R 106 -i 1 -P 0 -b 2 -s-7 -n1000 + -R 106 -i 14 -P 1 -b 1 -s-6 -n100 -R 273 -i 14 -P 1 -b 1 -s-6 -n100 -R 106 -i 14 -P 1 -b 1 -s-6 -T 0.001 -n1000 - nr_pucchsim.test1 nr_pucchsim.test2 nr_pucchsim.test3 nr_pucchsim.test4 + nr_pucchsim.test1 nr_pucchsim.test2 PUCCH test OK segmentation fault|assertion|exiting|fatal 3 diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index bb087aad0d..ee3e247cb0 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -94,7 +94,15 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, pucch_GroupHopping_t pucch_GroupHopping = pucch_pdu->group_hop_flag + (pucch_pdu->sequence_hop_flag<<1); - if(pucch_pdu->bit_len_harq==1){ + AssertFatal(pucch_pdu->bit_len_harq > 0 || pucch_pdu->sr_flag > 0, + "Either bit_len_harq (%d) or sr_flag (%d) must be > 0\n", + pucch_pdu->bit_len_harq,pucch_pdu->sr_flag); + + if(pucch_pdu->bit_len_harq==0){ + mcs=table1_mcs; + nr_sequences=1; + } + else if(pucch_pdu->bit_len_harq==1){ mcs=table1_mcs; nr_sequences=4>>(1-pucch_pdu->sr_flag); } @@ -275,6 +283,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, maxpos=i; } } + + uint8_t xrtmag_dB = dB_fixed(xrtmag); #ifdef DEBUG_NR_PUCCH_RX printf("PUCCH 0 : maxpos %d\n",maxpos); @@ -288,21 +298,45 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->ul_cqi = 0xff; // currently not valid uci_pdu->timing_advance = 0xffff; // currently not valid uci_pdu->rssi = 0xffff; // currently not valid - if (pucch_pdu->sr_flag) { - //currently not supported - } - else - uci_pdu->sr = NULL; - if (pucch_pdu->bit_len_harq>0) { - uci_pdu->harq = calloc(1,sizeof(*uci_pdu->harq)); - uci_pdu->harq->num_harq = pucch_pdu->bit_len_harq; - uci_pdu->harq->harq_confidence_level = 0xff; // currently not valid - uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(uci_pdu->harq->num_harq); - for (i=0; iharq->num_harq; i++) // FIXME for non present - uci_pdu->harq->harq_list[i].harq_value = (index>>i)&0x01; - } - else + + if (pucch_pdu->bit_len_harq==0) { uci_pdu->harq = NULL; + uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); + if (xrtmag_dB>(gNB->measurements.n0_subband_power_tot_dB[pucch_pdu->prb_start]+gNB->pucch0_thres)) { + uci_pdu->sr->sr_indication = 1; + uci_pdu->sr->sr_confidence_level = xrtmag_dB-(gNB->measurements.n0_subband_power_tot_dB[pucch_pdu->prb_start]+gNB->pucch0_thres); + } else { + uci_pdu->sr->sr_indication = 0; + uci_pdu->sr->sr_confidence_level = (gNB->measurements.n0_subband_power_tot_dB[pucch_pdu->prb_start]+gNB->pucch0_thres)-xrtmag_dB; + } + } + else if (pucch_pdu->bit_len_harq==1) { + uci_pdu->harq = calloc(1,sizeof(*uci_pdu->harq)); + uci_pdu->harq->num_harq = 1; + uci_pdu->harq->harq_confidence_level = xrtmag_dB-(gNB->measurements.n0_subband_power_tot_dB[pucch_pdu->prb_start]+gNB->pucch0_thres); + uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(1); + uci_pdu->harq->harq_list[0].harq_value = index&0x01; + if (pucch_pdu->sr_flag == 1) { + uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); + uci_pdu->sr->sr_indication = (index>1) ? 1 : 0; + uci_pdu->sr->sr_confidence_level = xrtmag_dB-(gNB->measurements.n0_subband_power_tot_dB[pucch_pdu->prb_start]+gNB->pucch0_thres); + } + } + else { + uci_pdu->harq = calloc(1,sizeof(*uci_pdu->harq)); + uci_pdu->harq->num_harq = 2; + uci_pdu->harq->harq_confidence_level = xrtmag_dB-(gNB->measurements.n0_subband_power_tot_dB[pucch_pdu->prb_start]+gNB->pucch0_thres); + uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2); + + uci_pdu->harq->harq_list[0].harq_value = index&0x01; + uci_pdu->harq->harq_list[1].harq_value = (index>>1)&0x01; + + if (pucch_pdu->sr_flag == 1) { + uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); + uci_pdu->sr->sr_indication = (index>3) ? 1 : 0; + uci_pdu->sr->sr_confidence_level = xrtmag_dB-(gNB->measurements.n0_subband_power_tot_dB[pucch_pdu->prb_start]+gNB->pucch0_thres); + } + } } diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h index d64153414f..d39f0d4e0b 100644 --- a/openair1/PHY/defs_gNB.h +++ b/openair1/PHY/defs_gNB.h @@ -568,13 +568,13 @@ typedef struct { //! estimated avg noise power (dB) short n0_power_tot_dBm; //! estimated avg noise power per RB per RX ant (lin) - unsigned short n0_subband_power[MAX_NUM_RU_PER_gNB][100]; + unsigned short n0_subband_power[MAX_NUM_RU_PER_gNB][275]; //! estimated avg noise power per RB per RX ant (dB) - unsigned short n0_subband_power_dB[MAX_NUM_RU_PER_gNB][100]; + unsigned short n0_subband_power_dB[MAX_NUM_RU_PER_gNB][275]; //! estimated avg noise power per RB (dB) - short n0_subband_power_tot_dB[100]; + short n0_subband_power_tot_dB[275]; //! estimated avg noise power per RB (dBm) - short n0_subband_power_tot_dBm[100]; + short n0_subband_power_tot_dBm[275]; // gNB measurements (per user) //! estimated received spatial signal power (linear) unsigned int rx_spatial_power[NUMBER_OF_NR_DLSCH_MAX][2][2]; @@ -594,13 +594,13 @@ typedef struct { /// Wideband CQI (sum of all RX antennas, in dB) char wideband_cqi_tot[NUMBER_OF_NR_DLSCH_MAX]; /// Subband CQI per RX antenna and RB (= SINR) - int subband_cqi[NUMBER_OF_NR_DLSCH_MAX][MAX_NUM_RU_PER_gNB][100]; + int subband_cqi[NUMBER_OF_NR_DLSCH_MAX][MAX_NUM_RU_PER_gNB][275]; /// Total Subband CQI and RB (= SINR) - int subband_cqi_tot[NUMBER_OF_NR_DLSCH_MAX][100]; + int subband_cqi_tot[NUMBER_OF_NR_DLSCH_MAX][275]; /// Subband CQI in dB and RB (= SINR dB) - int subband_cqi_dB[NUMBER_OF_NR_DLSCH_MAX][MAX_NUM_RU_PER_gNB][100]; + int subband_cqi_dB[NUMBER_OF_NR_DLSCH_MAX][MAX_NUM_RU_PER_gNB][275]; /// Total Subband CQI and RB - int subband_cqi_tot_dB[NUMBER_OF_NR_DLSCH_MAX][100]; + int subband_cqi_tot_dB[NUMBER_OF_NR_DLSCH_MAX][275]; /// PRACH background noise level int prach_I0; } PHY_MEASUREMENTS_gNB; @@ -707,6 +707,7 @@ typedef struct PHY_VARS_gNB_s { /// counter to average prach energh over first 100 prach opportunities int prach_energy_counter; + int pucch0_thres; /* time_stats_t phy_proc; */ From c8ac5d56bf49d7f6edc3eb2c7c5166d5b13f921d Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Wed, 8 Apr 2020 12:47:34 +0200 Subject: [PATCH 16/24] compilation of NR executables with MAC --- openair1/SIMULATION/NR_PHY/dlsim.c | 3 ++- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 3 ++- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 2 +- 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index ebcedbaeb0..1927f16d60 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -171,6 +171,7 @@ int main(int argc, char **argv) //int pbch_tx_ant; int N_RB_DL=106,mu=1; nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config; + NR_sched_pucch pucch_sched; //unsigned char frame_type = 0; @@ -706,7 +707,7 @@ int main(int argc, char **argv) memset(RC.nrmac[0]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int)); clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot); - if (css_flag == 0) nr_schedule_uss_dlsch_phytest(0,frame,slot,&dlsch_config); + if (css_flag == 0) nr_schedule_uss_dlsch_phytest(0,frame,slot,&pucch_sched,&dlsch_config); else nr_schedule_css_dlsch_phytest(0,frame,slot); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 304004ff8c..1665a9f612 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -541,7 +541,8 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, TBS_bytes = configure_fapi_dl_pdu(module_idP, CCEIndices, - dl_req, + dl_req, + pucch_sched, dlsch_config!=NULL ? dlsch_config->mcsIndex : NULL, dlsch_config!=NULL ? &dlsch_config->rbSize : NULL, dlsch_config!=NULL ? &dlsch_config->rbStart : NULL); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 75d2385412..86dac1e11f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -123,7 +123,7 @@ typedef struct { DLSCH_PDU DLSCH_pdu[4][MAX_MOBILES_PER_GNB]; /// scheduling control info - UE_sched_ctrl_t UE_sched_ctrl[MAX_MOBILES_PER_GNB]; + NR_UE_sched_ctrl_t UE_sched_ctrl[MAX_MOBILES_PER_GNB]; int next[MAX_MOBILES_PER_GNB]; int head; int next_ul[MAX_MOBILES_PER_GNB]; From 786be88101ebd2d6ca0a57c29921a691c11411d4 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Thu, 9 Apr 2020 15:52:19 +0200 Subject: [PATCH 17/24] fixed unitary simulation issue for nr_ulsim and removed broken pucch1 tests --- cmake_targets/autotests/test_case_list.xml | 9 ++------- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 1 + 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/cmake_targets/autotests/test_case_list.xml b/cmake_targets/autotests/test_case_list.xml index b7222d0330..7908772bb6 100644 --- a/cmake_targets/autotests/test_case_list.xml +++ b/cmake_targets/autotests/test_case_list.xml @@ -1178,10 +1178,7 @@ execution nr_pucchsim Test cases. (Test1: Format 0 1-bit ACK miss 106 PRB), - (Test2: Format 0 2-bit ACK miss 106 PRB), - (Test3: Format 1 ACK miss 106 PRB), - (Test4: Format 1 ACK miss 273 PRB), - (Test5: Format 1 NACKtoACK 106 PRB) + (Test2: Format 0 2-bit ACK miss 106 PRB) $OPENAIR_DIR/cmake_targets/build_oai --phy_simulators -c @@ -1190,9 +1187,7 @@ $OPENAIR_DIR/targets/bin/nr_pucchsim.Rel15 -R 106 -i 1 -P 0 -b 1 -s-7 -n1000 -R 106 -i 1 -P 0 -b 2 -s-7 -n1000 - -R 106 -i 14 -P 1 -b 1 -s-6 -n100 - -R 273 -i 14 -P 1 -b 1 -s-6 -n100 - -R 106 -i 14 -P 1 -b 1 -s-6 -T 0.001 -n1000 + nr_pucchsim.test1 nr_pucchsim.test2 PUCCH test OK segmentation fault|assertion|exiting|fatal diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 46f9a79460..76d35f7ae7 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -428,6 +428,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) nr_fill_rx_indication(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid); // indicate SDU to MAC nr_fill_crc_indication(gNB, frame_rx, slot_rx, ULSCH_id, 0); } + break; case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE:{ LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE\n",frame_rx,slot_rx); From b568d5b01af488908a200c9d1c45d58278f6faba Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Thu, 9 Apr 2020 22:25:02 +0200 Subject: [PATCH 18/24] removed faulty entries in ci unitary simulators and SNR starting point for nr_ulsim tests --- cmake_targets/autotests/test_case_list.xml | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/cmake_targets/autotests/test_case_list.xml b/cmake_targets/autotests/test_case_list.xml index 7908772bb6..085e5fb07b 100644 --- a/cmake_targets/autotests/test_case_list.xml +++ b/cmake_targets/autotests/test_case_list.xml @@ -1104,8 +1104,7 @@ -n100 -R217 -a80 -s5 -n100 -R217 -a110 -s5 -b100 -n100 -e27 -s30 - -n100 -e16 -s10 - + -n100 -e16 -s10 nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 PDSCH test OK segmentation fault|assertion|exiting|fatal @@ -1245,11 +1244,11 @@ $OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash $OPENAIR_DIR/targets/bin/nr_ulsim.Rel15 - -n100 -m9 -r106 -s0 + -n100 -m9 -r106 -s5 -n100 -m16 -s10 -n100 -m28 -s20 - -n100 -m9 -R217 -r217 -s0 - -n100 -m9 -R273 -r273 -s0 + -n100 -m9 -R217 -r217 -s5 + -n100 -m9 -R273 -r273 -s5 nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 PUSCH test OK segmentation fault|assertion|exiting|fatal From 93ba34b027ed78dbf626ddede7f79455c23948fb Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Tue, 21 Apr 2020 23:44:06 +0200 Subject: [PATCH 19/24] testing for pucch format 2, 3-11 bits. Configuration works for 2 PRBs, 1 symbol only. Assertion in gNB RX otherwise. --- cmake_targets/CMakeLists.txt | 1 + openair1/PHY/INIT/nr_init.c | 3 +- openair1/PHY/NR_REFSIG/nr_refsig.h | 8 +- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 530 +++++++++++++++++++++++- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c | 14 +- openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h | 4 +- openair1/SIMULATION/NR_PHY/pucchsim.c | 73 +++- 7 files changed, 607 insertions(+), 26 deletions(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index f6fcabf82e..d07694725d 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1495,6 +1495,7 @@ set(PHY_SRC_UE ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c + ${OPENAIR1_DIR}/PHY/NR_REFSIG/scrambling_luts.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/dmrs_nr.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/ptrs_nr.c ${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/filt16a_32.c diff --git a/openair1/PHY/INIT/nr_init.c b/openair1/PHY/INIT/nr_init.c index 1c0d5a6aca..46fd9fb5fd 100644 --- a/openair1/PHY/INIT/nr_init.c +++ b/openair1/PHY/INIT/nr_init.c @@ -96,7 +96,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, while(gNB->configured == 0) usleep(10000); - init_dfts(); /* LOG_I(PHY,"[gNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d nb_antennas_tx:%u nb_antennas_rx:%u PRACH[rootSequenceIndex:%u prach_Config_enabled:%u configIndex:%u highSpeed:%u zeroCorrelationZoneConfig:%u freqOffset:%u]\n", gNB->Mod_id, @@ -113,6 +112,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_gNB][MOD %02"PRIu8"][]\n", gNB->Mod_id); crcTableInit(); init_dfts(); + init_scrambling_luts(); + init_pucch2_luts(); load_nrLDPClib(); // PBCH DMRS gold sequences generation nr_init_pbch_dmrs(gNB); diff --git a/openair1/PHY/NR_REFSIG/nr_refsig.h b/openair1/PHY/NR_REFSIG/nr_refsig.h index 5af0e88099..d18f6405d7 100644 --- a/openair1/PHY/NR_REFSIG/nr_refsig.h +++ b/openair1/PHY/NR_REFSIG/nr_refsig.h @@ -26,7 +26,7 @@ #include "PHY/defs_gNB.h" #include "PHY/LTE_REFSIG/lte_refsig.h" - +#include "PHY/sse_intrin.h" /*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS. @param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables @@ -49,4 +49,10 @@ int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB, unsigned char lp, unsigned short nb_pusch_rb, uint8_t dmrs_type); + +void init_scrambling_luts(void); + +extern __m64 byte2m64_re[256]; +extern __m64 byte2m64_im[256]; + #endif diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index ee3e247cb0..62ced5af9d 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -1,3 +1,34 @@ +/* + * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The OpenAirInterface Software Alliance licenses this file to You under + * the OAI Public License, Version 1.1 (the "License"); you may not use this file + * except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.openairinterface.org/?page_id=698 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + *------------------------------------------------------------------------------- + * For more information about the OpenAirInterface (OAI) Software Alliance: + * contact@openairinterface.org + */ + +/*! \file PHY/NR_TRANSPORT/pucch_rx.c +* \brief Top-level routines for decoding the PUCCH physical channel +* \author A. Mico Pereperez, Padarthi Naga Prasanth, Francesco Mani, Raymond Knopp +* \date 2020 +* \version 0.2 +* \company Eurecom +* \email: +* \note +* \warning +*/ #include #include #include @@ -8,10 +39,12 @@ #include "PHY/impl_defs_nr.h" #include "PHY/defs_nr_common.h" -#include "PHY/defs_nr_UE.h" +#include "PHY/defs_gNB.h" +#include "PHY/sse_intrin.h" #include "PHY/NR_UE_TRANSPORT/pucch_nr.h" #include "PHY/NR_TRANSPORT/nr_transport_common_proto.h" #include "PHY/NR_TRANSPORT/nr_transport.h" +#include "PHY/NR_REFSIG/nr_refsig.h" #include "common/utils/LOG/log.h" #include "common/utils/LOG/vcd_signal_dumper.h" @@ -188,7 +221,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, for (l=0; lnr_of_symbols; l++) { l2 = l+pucch_pdu->start_symbol_index; - re_offset = (12*pucch_pdu->prb_start) + frame_parms->first_carrier_offset; + re_offset = (12*pucch_pdu->prb_start) + (12*pucch_pdu->bwp_start) + frame_parms->first_carrier_offset; if (re_offset>= frame_parms->ofdm_symbol_size) re_offset-=frame_parms->ofdm_symbol_size; @@ -818,3 +851,496 @@ void nr_decode_pucch1( int32_t **rxdataF, } } +__m256i pucch2_3bit[8*2]; +__m256i pucch2_4bit[16*2]; +__m256i pucch2_5bit[32*2]; +__m256i pucch2_6bit[64*2]; +__m256i pucch2_7bit[128*2]; +__m256i pucch2_8bit[256*2]; +__m256i pucch2_9bit[512*2]; +__m256i pucch2_10bit[1024*2]; +__m256i pucch2_11bit[2048*2]; + +__m256i *pucch2_lut[9]={pucch2_3bit, + pucch2_4bit, + pucch2_5bit, + pucch2_6bit, + pucch2_7bit, + pucch2_8bit, + pucch2_9bit, + pucch2_10bit, + pucch2_11bit}; + +void init_pucch2_luts() { + + uint32_t out; + int8_t bit; + + for (int b=3;b<12;b++) { + for (uint16_t i=0;i<(1< 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,0); + bit = (out&0x2) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,0); + bit = (out&0x4) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,1); + bit = (out&0x8) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,1); + bit = (out&0x10) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,2); + bit = (out&0x20) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,2); + bit = (out&0x40) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,3); + bit = (out&0x80) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,3); + bit = (out&0x100) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,4); + bit = (out&0x200) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,4); + bit = (out&0x400) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,5); + bit = (out&0x800) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,5); + bit = (out&0x1000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,6); + bit = (out&0x2000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,6); + bit = (out&0x4000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,7); + bit = (out&0x8000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,7); + bit = (out&0x10000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,8); + bit = (out&0x20000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,8); + bit = (out&0x40000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,9); + bit = (out&0x80000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,9); + bit = (out&0x100000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,10); + bit = (out&0x200000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,10); + bit = (out&0x400000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,11); + bit = (out&0x800000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,11); + bit = (out&0x1000000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,12); + bit = (out&0x2000000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,12); + bit = (out&0x4000000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,13); + bit = (out&0x8000000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,13); + bit = (out&0x10000000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,14); + bit = (out&0x20000000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,14); + bit = (out&0x40000000) > 0 ? -1 : 1; + *lut_i = _mm256_insert_epi16(*lut_i,bit,15); + bit = (out&0x80000000) > 0 ? -1 : 1; + *lut_ip1 = _mm256_insert_epi16(*lut_ip1,bit,15); + } + } +} + + +void nr_decode_pucch2(PHY_VARS_gNB *gNB, + int slot, + nfapi_nr_uci_pucch_pdu_format_2_3_4_t* uci_pdu, + nfapi_nr_pucch_pdu_t* pucch_pdu) { + + int32_t **rxdataF = gNB->common_vars.rxdataF; + NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms; + pucch_GroupHopping_t pucch_GroupHopping = pucch_pdu->group_hop_flag + (pucch_pdu->sequence_hop_flag<<1); + + AssertFatal(pucch_pdu->nr_of_symbols==1 || pucch_pdu->nr_of_symbols==2, + "Illegal number of symbols for PUCCH 2 %d\n",pucch_pdu->nr_of_symbols); + + + //extract pucch and dmrs first + + int l2; + int re_offset = (12*pucch_pdu->prb_start) + (12*pucch_pdu->bwp_start) + frame_parms->first_carrier_offset; + if (re_offset>= frame_parms->ofdm_symbol_size) + re_offset-=frame_parms->ofdm_symbol_size; + + AssertFatal(pucch_pdu->prb_size*pucch_pdu->nr_of_symbols > 1,"number of PRB*SYMB (%d,%d)< 2", + pucch_pdu->prb_size,pucch_pdu->nr_of_symbols); + + int Prx = gNB->gNB_config.carrier_config.num_rx_ant.value; + int Prx2 = (Prx==1)?2:Prx; + // use 2 for Nb antennas in case of single antenna to allow the following allocations + int16_t r_re_ext[Prx2][8*pucch_pdu->nr_of_symbols*pucch_pdu->prb_size] __attribute__((aligned(32))); + int16_t r_im_ext[Prx2][8*pucch_pdu->nr_of_symbols*pucch_pdu->prb_size] __attribute__((aligned(32))); + int16_t r_re_ext2[Prx2][8*pucch_pdu->nr_of_symbols*pucch_pdu->prb_size] __attribute__((aligned(32))); + int16_t r_im_ext2[Prx2][8*pucch_pdu->nr_of_symbols*pucch_pdu->prb_size] __attribute__((aligned(32))); + int16_t rd_re_ext[Prx2][4*pucch_pdu->nr_of_symbols*pucch_pdu->prb_size] __attribute__((aligned(32))); + int16_t rd_im_ext[Prx2][4*pucch_pdu->nr_of_symbols*pucch_pdu->prb_size] __attribute__((aligned(32))); + + int16_t *rp[Prx2]; + __m64 dmrs_re,dmrs_im; + + for (int aa=0;aaofdm_symbol_size)+re_offset]); + +#ifdef DEBUG_NR_PUCCH_RX + printf("Decoding pucch2 for %d symbols, %d PRB\n",pucch_pdu->nr_of_symbols,pucch_pdu->prb_size); +#endif + + int nc_group_size=1; // 2 PRB + int ngroup = pucch_pdu->prb_size/nc_group_size/2; + int32_t corr32_re[ngroup][Prx2],corr32_im[ngroup][Prx2]; + for (int aa=0;aanr_of_symbols == 1) { + AssertFatal((pucch_pdu->prb_size&1) == 0,"prb_size %d is not a multiple of 2\n",pucch_pdu->prb_size); + // 24 PRBs contains 48x16-bit, so 6x8x16-bit + for (int prb=0;prbprb_size;prb+=2) { + for (int aa=0;aa (%d,%d)\n",aa,prb+(i>>2),i,rd_re_ext[aa][i],rd_im_ext[aa],i); +#endif + } // aa + } // prb + + + // first compute DMRS component + uint32_t x1, x2, s=0; + x2 = (((1<<17)*((14*slot) + (pucch_pdu->start_symbol_index) + 1)*((2*pucch_pdu->dmrs_scrambling_id) + 1)) + (2*pucch_pdu->dmrs_scrambling_id))%(1U<<31); // c_init calculation according to TS38.211 subclause +#ifdef DEBUG_NR_PUCCH_RX + printf("slot %d, start_symbol_index %d, dmrs_scrambling_id %d\n", + slot,pucch_pdu->start_symbol_index,pucch_pdu->dmrs_scrambling_id); +#endif + s = lte_gold_generic(&x1, &x2, 1); + + + for (int group=0;group>=5; + corr32_im[group][aa]>>=5; +#ifdef DEBUG_NR_PUCCH_RX + printf("Group %d: corr32 (%d,%d)\n",group,corr32_re[group][aa],corr32_im[group][aa]); +#endif + } //aa + + if ((group&3) == 3) s = lte_gold_generic(&x1, &x2, 0); + } // group + } + else { // 2 symbol case + AssertFatal(1==0, "Fill in 2 symbol PUCCH2 case\n"); + } + + uint32_t x1, x2, s=0; + // unscrambling + x2 = ((pucch_pdu->rnti)<<15)+pucch_pdu->data_scrambling_id; + s = lte_gold_generic(&x1, &x2, 1); +#ifdef DEBUG_NR_PUCCH_RX + printf("x2 %x, s %x\n",x2,s); +#endif + __m64 c_re0,c_im0,c_re1,c_im1,c_re2,c_im2,c_re3,c_im3; + re_offset=0; + for (int prb=0;prbprb_size;prb+=2,re_offset+=16) { + c_re0 = byte2m64_re[((uint8_t*)&s)[0]]; + c_im0 = byte2m64_im[((uint8_t*)&s)[0]]; + c_re1 = byte2m64_re[((uint8_t*)&s)[1]]; + c_im1 = byte2m64_im[((uint8_t*)&s)[1]]; + c_re2 = byte2m64_re[((uint8_t*)&s)[2]]; + c_im2 = byte2m64_im[((uint8_t*)&s)[2]]; + c_re3 = byte2m64_re[((uint8_t*)&s)[3]]; + c_im3 = byte2m64_im[((uint8_t*)&s)[3]]; + + for (int aa=0;aabit_len_csi_part1 + pucch_pdu->bit_len_csi_part2 == 0,"no csi for now\n"); + AssertFatal((pucch_pdu->bit_len_harq+pucch_pdu->sr_flag > 2 ) && (pucch_pdu->bit_len_harq+pucch_pdu->sr_flag < 12),"illegal length (%d,%d)\n",pucch_pdu->bit_len_harq,pucch_pdu->sr_flag); + int nb_bit = pucch_pdu->bit_len_harq+pucch_pdu->sr_flag; + __m256i *rp_re[Prx2]; + __m256i *rp2_re[Prx2]; + __m256i *rp_im[Prx2]; + __m256i *rp2_im[Prx2]; + for (int aa=0;aa>1], + ((int16_t*)&pucch2_lut[nb_bit-3][cw<<1])[1+(i>>1)]); + } + printf("\n"); +#endif + // do complex correlation + for (int aa=0;aa corr) { + corr = corr_tmp; + cw_ML=cw; + } + } + uint8_t corr_dB = dB_fixed64((uint64_t)corr); + LOG_D(PHY,"cw_ML %d, metric %d dB\n",cw_ML,corr_dB); + uci_pdu->harq.harq_bit_len = pucch_pdu->bit_len_harq; + + + int harq_bytes=pucch_pdu->bit_len_harq>>3; + if ((pucch_pdu->bit_len_harq&7) > 0) harq_bytes++; + uci_pdu->harq.harq_payload = (nfapi_nr_harq_t*)malloc(harq_bytes); + uci_pdu->harq.harq_crc = 2; + for (int i=0;iharq.harq_payload[i] = cw_ML & 255; + cw_ML>>=8; + } + + if (pucch_pdu->sr_flag == 1) { + uci_pdu->sr.sr_bit_len = 1; + uci_pdu->sr.sr_payload = malloc(1); + uci_pdu->sr.sr_payload[0] = cw_ML; + } +} + diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c index d63cef5085..2a08d54c5a 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c @@ -42,6 +42,7 @@ #include "common/utils/LOG/vcd_signal_dumper.h" #include "T.h" +//#define NR_UNIT_TEST 1 #ifdef NR_UNIT_TEST #define DEBUG_PUCCH_TX #define DEBUG_NR_PUCCH_TX @@ -905,7 +906,9 @@ void nr_uci_encoding(uint64_t payload, if (A<=11) { // procedure in subclause 6.3.1.2.2 (UCI encoded by channel coding of small block lengths -> subclause 6.3.1.3.2) // CRC bits are not attached, and coding small block lengths (subclause 5.3.3) + b[0] = encodeSmallBlock((uint16_t*)&payload,A); } else if (A>=12) { + AssertFatal(1==0,"Polar encoding not supported yet for UCI\n"); // procedure in subclause 6.3.1.2.1 (UCI encoded by Polar code -> subclause 6.3.1.3.1) /*if ((A>=360 && E>=1088)||(A>=1013)) { I_seg = 1; @@ -924,10 +927,13 @@ void nr_uci_encoding(uint64_t payload, // code block segmentation and CRC attachment is performed according to subclause 5.2.1 // polar coding subclause 5.3.1 } + } //#if 0 void nr_generate_pucch2(PHY_VARS_NR_UE *ue, uint16_t crnti, + uint32_t dmrs_scrambling_id, + uint32_t data_scrambling_id, int32_t **txdataF, NR_DL_FRAME_PARMS *frame_parms, PUCCH_CONFIG_DEDICATED *pucch_config_dedicated, @@ -961,14 +967,14 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue, */ uint8_t *btilde = malloc(sizeof(int8_t)*M_bit); // rnti is given by the C-RNTI - uint16_t rnti=crnti, n_id=0; + uint16_t rnti=crnti; #ifdef DEBUG_NR_PUCCH_TX printf("\t [nr_generate_pucch2] rnti = %d ,\n",rnti); #endif /* * Implementing TS 38.211 Subclause 6.3.2.5.1 scrambling format 2 */ - nr_pucch2_3_4_scrambling(M_bit,rnti,n_id,b,btilde); + nr_pucch2_3_4_scrambling(M_bit,rnti,data_scrambling_id,b,btilde); /* * Implementing TS 38.211 Subclause 6.3.2.5.2 modulation format 2 * btilde shall be modulated as described in subclause 5.1 using QPSK @@ -1016,10 +1022,10 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue, int m=0; for (int l=0; lN_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is lower band diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h index 4c4847d7de..510abb8373 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h @@ -20,7 +20,7 @@ */ /*! \file PHY/NR_UE_TRANSPORT/pucch_nr.c -* \brief Top-level routines for generating and decoding the PUCCH physical channel +* \brief Top-level routines for generating the PUCCH physical channel * \author A. Mico Pereperez * \date 2018 * \version 0.1 @@ -70,6 +70,8 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue, uint8_t nr_bit); void nr_generate_pucch2(PHY_VARS_NR_UE *ue, uint16_t crnti, + uint32_t dmrs_scrambling_id, + uint32_t data_scrambling_id, int32_t **txdataF, NR_DL_FRAME_PARMS *frame_parms, PUCCH_CONFIG_DEDICATED *pucch_config_dedicated, diff --git a/openair1/SIMULATION/NR_PHY/pucchsim.c b/openair1/SIMULATION/NR_PHY/pucchsim.c index 3b7305bf9b..9e1609c3b4 100644 --- a/openair1/SIMULATION/NR_PHY/pucchsim.c +++ b/openair1/SIMULATION/NR_PHY/pucchsim.c @@ -93,11 +93,12 @@ int main(int argc, char **argv) uint8_t nrofSymbols=1; //number of OFDM symbols can be 1-2 for format 1 uint8_t startingSymbolIndex=0; // resource allocated see 9.2.1, 38.213 for more info.should be actually present in the resource set provided uint16_t startingPRB=0,startingPRB_intraSlotHopping=0; //PRB number not sure see 9.2.1, 38.213 for more info. Should be actually present in the resource set provided + uint16_t nrofPRB=2; uint8_t timeDomainOCC=0; SCM_t channel_model=AWGN;//Rayleigh1_anticorr; int N_RB_DL=273,mu=1; - float target_error_rate=0.01; + float target_error_rate=0.001; int frame_length_complex_samples; //int frame_length_complex_samples_no_prefix; NR_DL_FRAME_PARMS *frame_parms; @@ -112,9 +113,8 @@ int main(int argc, char **argv) randominit(0); logInit(); - set_glog(loglvl); - while ((c = getopt (argc, argv, "f:hA:f:g:i:I:P:B:b:T:m:n:r:o:s:S:x:y:z:N:F:GR:IL")) != -1) { + while ((c = getopt (argc, argv, "f:hA:f:g:i:I:P:B:b:T:m:n:r:o:s:S:x:y:z:N:F:GR:IL:q:")) != -1) { switch (c) { case 'f': //write_output_file=1; @@ -263,6 +263,9 @@ int main(int argc, char **argv) case 'r': startingPRB=atoi(optarg); break; + case 'q': + nrofPRB=atoi(optarg); + break; case 'P': format=atoi(optarg); break; @@ -305,7 +308,8 @@ int main(int argc, char **argv) printf("-F Input filename (.txt format) for RX conformance testing\n"); printf("-i Enter number of ofdm symbols for pucch\n"); printf("-I Starting symbol index for pucch\n"); - printf("-r PUCCCH starting PRB\n"); + printf("-r PUCCH starting PRB\n"); + printf("-q PUCCH number of PRB\n"); printf("-P Enter the format of PUCCH\n"); printf("-b number of HARQ bits (1-2)\n"); printf("-B payload to be transmitted on PUCCH\n"); @@ -316,18 +320,22 @@ int main(int argc, char **argv) } } + set_glog(loglvl); + if (snr1set==0) snr1 = snr0+10; printf("Initializing gNodeB for mu %d, N_RB_DL %d\n",mu,N_RB_DL); - if((format!=0) && (format!=1)){ + if((format!=0) && (format!=1) && (format!=2)){ printf("PUCCH format %d not supported\n",format); exit(0); } - AssertFatal((nr_bit<3)&&(actual_payload<4),"Only format 0 and 1 currently supported. 2 bits max supported"); + AssertFatal(((format < 2)&&(nr_bit<3)&&(actual_payload<4)) || + ((format == 2)&&(nr_bit>2)&&(nr_bit<12)),"illegal combination format %d, nr_bit %d\n", + format,nr_bit); - if (nr_bit==1) actual_payload = actual_payload&1; + actual_payload &= ((1<ofdm_symbol_size); - txdataF[i] = malloc(14*frame_parms->ofdm_symbol_size*sizeof(int)); + txdataF[i] = memalign(32,14*frame_parms->ofdm_symbol_size*sizeof(int)); bzero(txdataF[i],14*frame_parms->ofdm_symbol_size*sizeof(int)); - rxdataF[i] = malloc(14*frame_parms->ofdm_symbol_size*sizeof(int)); + rxdataF[i] = memalign(32,14*frame_parms->ofdm_symbol_size*sizeof(int)); bzero(rxdataF[i],14*frame_parms->ofdm_symbol_size*sizeof(int)); } @@ -443,8 +451,8 @@ int main(int argc, char **argv) uint8_t mcs=0; startingPRB_intraSlotHopping=N_RB_DL-1; pucch_GroupHopping_t PUCCH_GroupHopping=UE->pucch_config_common_nr->pucch_GroupHopping; - uint32_t n_id=UE->pucch_config_common_nr->hoppingId; - + uint32_t hopping_id=UE->pucch_config_common_nr->hoppingId; + uint32_t dmrs_scrambling_id = 0, data_scrambling_id=0; if(format==0){ // for now we are not considering SR just HARQ-ACK if(nr_bit==1) @@ -461,9 +469,12 @@ int main(int argc, char **argv) if(format==0){ nr_generate_pucch0(UE,txdataF,frame_parms,UE->pucch_config_dedicated,amp,nr_tti_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB); } - else{ + else if (format == 1){ nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit); } + else { + nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit); + } int txlev = signal_energy(&txdataF[aa][startingSymbolIndex*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size); @@ -489,7 +500,7 @@ int main(int argc, char **argv) pucch_pdu.bit_len_harq = nr_bit; pucch_pdu.sr_flag = 0; pucch_pdu.nr_of_symbols = nrofSymbols; - pucch_pdu.hopping_id = n_id; + pucch_pdu.hopping_id = hopping_id; pucch_pdu.initial_cyclic_shift = 0; pucch_pdu.start_symbol_index = startingSymbolIndex; pucch_pdu.prb_start = startingPRB; @@ -497,21 +508,49 @@ int main(int argc, char **argv) if(nr_bit==1) ack_nack_errors+=(actual_payload^uci_pdu.harq->harq_list[0].harq_value); else - ack_nack_errors+=((actual_payload^uci_pdu.harq->harq_list[0].harq_value)+((actual_payload>>1)^uci_pdu.harq->harq_list[1].harq_value)); + ack_nack_errors+=(((actual_payload&1)^uci_pdu.harq->harq_list[0].harq_value)+((actual_payload>>1)^uci_pdu.harq->harq_list[1].harq_value)); free(uci_pdu.harq->harq_list); } - else{ + else if (format==1) { - nr_decode_pucch1(rxdataF,PUCCH_GroupHopping,n_id,&(payload_received),frame_parms,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit); + nr_decode_pucch1(rxdataF,PUCCH_GroupHopping,hopping_id,&(payload_received),frame_parms,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit); if(nr_bit==1) ack_nack_errors+=((actual_payload^payload_received)&1); else ack_nack_errors+=((actual_payload^payload_received)&1) + (((actual_payload^payload_received)&2)>>1); } + else if (format==2) { + nfapi_nr_uci_pucch_pdu_format_2_3_4_t uci_pdu; + nfapi_nr_pucch_pdu_t pucch_pdu; + pucch_pdu.rnti = 0x1234; + pucch_pdu.subcarrier_spacing = 1; + pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1; + pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1; + pucch_pdu.bit_len_harq = nr_bit; + pucch_pdu.sr_flag = 0; + pucch_pdu.nr_of_symbols = nrofSymbols; + pucch_pdu.hopping_id = hopping_id; + pucch_pdu.initial_cyclic_shift = 0; + pucch_pdu.start_symbol_index = startingSymbolIndex; + pucch_pdu.prb_size = nrofPRB; + pucch_pdu.prb_start = startingPRB; + pucch_pdu.dmrs_scrambling_id = dmrs_scrambling_id; + pucch_pdu.data_scrambling_id = data_scrambling_id; + nr_decode_pucch2(gNB,nr_tti_tx,&uci_pdu,&pucch_pdu); + int harq_bytes=pucch_pdu.bit_len_harq>>3; + if ((pucch_pdu.bit_len_harq&7) > 0) harq_bytes++; + for (int i=0;i>1)+(((actual_payload^payload_received)&4)>>2)+n_errors; } printf("SNR=%f, n_trials=%d, n_bit_errors=%d\n",SNR,n_trials,ack_nack_errors); - if((float)ack_nack_errors/(float)(nr_bit*n_trials)<=target_error_rate){ + if((float)ack_nack_errors/(float)(n_trials)<=target_error_rate){ printf("PUCCH test OK\n"); break; } From 6d8aa8d6b92b6a0d89f03e81bf49f3e350757c7b Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Thu, 23 Apr 2020 01:17:11 +0200 Subject: [PATCH 20/24] added 3-bit payload for pucch0 to nr_pucchsim, fixed SNR scaling for pucch2 --- openair1/SIMULATION/NR_PHY/pucchsim.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/pucchsim.c b/openair1/SIMULATION/NR_PHY/pucchsim.c index 9e1609c3b4..d36f42f6c6 100644 --- a/openair1/SIMULATION/NR_PHY/pucchsim.c +++ b/openair1/SIMULATION/NR_PHY/pucchsim.c @@ -104,6 +104,7 @@ int main(int argc, char **argv) NR_DL_FRAME_PARMS *frame_parms; //unsigned char frame_type = 0; int loglvl=OAILOG_WARNING; + int sr_flag = 0; cpuf = get_cpu_freq_GHz(); @@ -114,7 +115,7 @@ int main(int argc, char **argv) randominit(0); logInit(); - while ((c = getopt (argc, argv, "f:hA:f:g:i:I:P:B:b:T:m:n:r:o:s:S:x:y:z:N:F:GR:IL:q:")) != -1) { + while ((c = getopt (argc, argv, "f:hA:f:g:i:I:P:B:b:T:m:n:r:o:s:S:x:y:z:N:F:GR:IL:q:c")) != -1) { switch (c) { case 'f': //write_output_file=1; @@ -275,6 +276,9 @@ int main(int argc, char **argv) case 'b': nr_bit=atoi(optarg); break; + case 'c': + sr_flag=1; + break; case 'B': actual_payload=atoi(optarg); break; @@ -455,10 +459,13 @@ int main(int argc, char **argv) uint32_t dmrs_scrambling_id = 0, data_scrambling_id=0; if(format==0){ // for now we are not considering SR just HARQ-ACK - if(nr_bit==1) + if (nr_bit ==0) + mcs=table1_mcs[0]; + else if(nr_bit==1) mcs=table1_mcs[actual_payload]; else if(nr_bit==2) mcs=table2_mcs[actual_payload]; + else AssertFatal(1==0,"Either nr_bit %d or sr_flag %d must be non-zero\n"); } for(SNR=snr0;SNR<=snr1;SNR=SNR+1){ @@ -480,8 +487,9 @@ int main(int argc, char **argv) frame_parms->ofdm_symbol_size); // printf("txlev %d (%d dB), offset %d\n",txlev,dB_fixed(txlev),startingSymbolIndex*frame_parms->ofdm_symbol_size); - // note : this scaling is for 1 PRB, to be updated for PUCCH 2 - sigma2_dB = 10*log10((double)txlev*UE->frame_parms.ofdm_symbol_size/12)-SNR; + // note : this scaling + int nb_re = (format == 0 || format == 1)? 12 : 12*nrofPRB; + sigma2_dB = 10*log10((double)txlev*UE->frame_parms.ofdm_symbol_size/nb_re)-SNR; sigma2 = pow(10,sigma2_dB/10); for(i=startingSymbolIndex*frame_parms->ofdm_symbol_size; i<(startingSymbolIndex+1)*frame_parms->ofdm_symbol_size; i++) { @@ -498,7 +506,7 @@ int main(int argc, char **argv) pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1; pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1; pucch_pdu.bit_len_harq = nr_bit; - pucch_pdu.sr_flag = 0; + pucch_pdu.sr_flag = sr_flag; pucch_pdu.nr_of_symbols = nrofSymbols; pucch_pdu.hopping_id = hopping_id; pucch_pdu.initial_cyclic_shift = 0; From d7d196c280af839100d9fa66ef6d5db6389f1f51 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Thu, 23 Apr 2020 22:27:28 +0200 Subject: [PATCH 21/24] CI tests for nr_pucchsim : added PUCCH format 2 tests --- cmake_targets/autotests/test_case_list.xml | 28 ++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/cmake_targets/autotests/test_case_list.xml b/cmake_targets/autotests/test_case_list.xml index 085e5fb07b..7eed0ae8a1 100644 --- a/cmake_targets/autotests/test_case_list.xml +++ b/cmake_targets/autotests/test_case_list.xml @@ -1177,17 +1177,37 @@ execution nr_pucchsim Test cases. (Test1: Format 0 1-bit ACK miss 106 PRB), - (Test2: Format 0 2-bit ACK miss 106 PRB) + (Test2: Format 0 2-bit ACK miss 106 PRB), + (Test3: Format 0 2-bit ACK miss, 1-bit SR 106 PRB), + (Test4: Format 2 3-bit 106 PRB), + (Test5: Format 2 4-bit 106 PRB), + (Test6: Format 2 5-bit 106 PRB), + (Test7: Format 2 6-bit 106 PRB), + (Test8: Format 2 7-bit 106 PRB), + (Test9: Format 2 8-bit 106 PRB), + (Test10: Format 2 9-bit 106 PRB), + (Test11: Format 2 10-bit 106 PRB), + (Test12: Format 2 11-bit 106 PRB) $OPENAIR_DIR/cmake_targets/build_oai --phy_simulators -c $OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash $OPENAIR_DIR/targets/bin/nr_pucchsim.Rel15 - -R 106 -i 1 -P 0 -b 1 -s-7 -n1000 - -R 106 -i 1 -P 0 -b 2 -s-7 -n1000 + -R 106 -i 1 -P 0 -b 1 -s-2 -n1000 + -R 106 -i 1 -P 0 -b 2 -s-2 -n1000 + -R 106 -i 1 -P 0 -b 2 -s-2 -c -n1000 + -R 106 -i 1 -P 2 -b 3 -s0 -n1000 + -R 106 -i 1 -P 2 -b 4 -s0 -n1000 + -R 106 -i 1 -P 2 -b 5 -s1 -n1000 + -R 106 -i 1 -P 2 -b 6 -s2 -n1000 + -R 106 -i 1 -P 2 -b 7 -s3 -n1000 + -R 106 -i 1 -P 2 -b 8 -s4 -n1000 + -R 106 -i 1 -P 2 -b 9 -s5 -n1000 + -R 106 -i 1 -P 2 -b 10 -s6 -n1000 + -R 106 -i 1 -P 2 -b 11 -s6 -n1000 - nr_pucchsim.test1 nr_pucchsim.test2 + nr_pucchsim.test1 nr_pucchsim.test2 nr_pucchsim.test3 nr_pucchsim.test4 nr_pucchsim.test5 nr_pucchsim.test6 nr_pucchsim.test7 nr_pucchsim.test8 nr_pucchsim.test9 nr_pucchsim.test10 nr_pucchsim.test11 nr_pucchsim.test12 PUCCH test OK segmentation fault|assertion|exiting|fatal 3 From 7689b9394ac88d6130a9fe280bf84770174875b5 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Thu, 23 Apr 2020 22:49:33 +0200 Subject: [PATCH 22/24] added missing file --- openair1/PHY/NR_REFSIG/scrambling_luts.c | 62 ++++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 openair1/PHY/NR_REFSIG/scrambling_luts.c diff --git a/openair1/PHY/NR_REFSIG/scrambling_luts.c b/openair1/PHY/NR_REFSIG/scrambling_luts.c new file mode 100644 index 0000000000..eae54f94fb --- /dev/null +++ b/openair1/PHY/NR_REFSIG/scrambling_luts.c @@ -0,0 +1,62 @@ +/* + * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The OpenAirInterface Software Alliance licenses this file to You under + * the OAI Public License, Version 1.1 (the "License"); you may not use this file + * except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.openairinterface.org/?page_id=698 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + *------------------------------------------------------------------------------- + * For more information about the OpenAirInterface (OAI) Software Alliance: + * contact@openairinterface.org + */ + +/* Lookup tables for 3GPP scrambling/unscrambling */ + +/* Author R. Knopp / EURECOM / OpenAirInterface.org */ +#ifndef __SCRAMBLING_LUTS__C__ +#define __SCRAMBLING_LUTS__C__ + +#include "PHY/impl_defs_nr.h" +#include "PHY/sse_intrin.h" + +__m64 byte2m64_re[256]; +__m64 byte2m64_im[256]; + +void init_byte2m64() { + + for (int s=0;s<256;s++) { + byte2m64_re[s] = _mm_insert_pi16(byte2m64_re[s],(1-2*(s&1)),0); + byte2m64_im[s] = _mm_insert_pi16(byte2m64_im[s],(1-2*((s>>1)&1)),0); + byte2m64_re[s] = _mm_insert_pi16(byte2m64_re[s],(1-2*((s>>2)&1)),1); + byte2m64_im[s] = _mm_insert_pi16(byte2m64_im[s],(1-2*((s>>3)&1)),1); + byte2m64_re[s] = _mm_insert_pi16(byte2m64_re[s],(1-2*((s>>4)&1)),2); + byte2m64_im[s] = _mm_insert_pi16(byte2m64_im[s],(1-2*((s>>5)&1)),2); + byte2m64_re[s] = _mm_insert_pi16(byte2m64_re[s],(1-2*((s>>6)&1)),3); + byte2m64_im[s] = _mm_insert_pi16(byte2m64_im[s],(1-2*((s>>7)&1)),3); + printf("init_scrambling_luts: s %x (%d) ((%d,%d),(%d,%d),(%d,%d),(%d,%d))\n", + ((uint16_t*)&s)[0], + (1-2*(s&1)), + ((int16_t*)&byte2m64_re[s])[0],((int16_t*)&byte2m64_im[s])[0], + ((int16_t*)&byte2m64_re[s])[1],((int16_t*)&byte2m64_im[s])[1], + ((int16_t*)&byte2m64_re[s])[2],((int16_t*)&byte2m64_im[s])[2], + ((int16_t*)&byte2m64_re[s])[3],((int16_t*)&byte2m64_im[s])[3]); + + } +} + +void init_scrambling_luts() { + + init_byte2m64(); + +} + +#endif From cd3f5ad001d936e36e3b7e47eaf23f3b1ca7c29b Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Thu, 30 Apr 2020 09:18:54 +0200 Subject: [PATCH 23/24] added parameters to generate_pucch2 in ue pucch procedures --- openair1/SCHED_NR_UE/pucch_uci_ue_nr.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/openair1/SCHED_NR_UE/pucch_uci_ue_nr.c b/openair1/SCHED_NR_UE/pucch_uci_ue_nr.c index 326c617dfb..1b62ff81bf 100644 --- a/openair1/SCHED_NR_UE/pucch_uci_ue_nr.c +++ b/openair1/SCHED_NR_UE/pucch_uci_ue_nr.c @@ -186,6 +186,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ int pucch_resource_id = MAX_NB_OF_PUCCH_RESOURCES; int pucch_resource_indicator = MAX_PUCCH_RESOURCE_INDICATOR; int n_HARQ_ACK; + uint16_t crnti=0x1234; + int dmrs_scrambling_id=0,data_scrambling_id=0; /* update current context */ @@ -591,7 +593,9 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ case pucch_format2_nr: { nr_generate_pucch2(ue, - 0,//ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti, + crnti, + dmrs_scrambling_id, + data_scrambling_id, ue->common_vars.txdataF, &ue->frame_parms, &ue->pucch_config_dedicated[gNB_id], From 4210c41179f1fae72fd92f22d4ad1188eb7051f4 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Thu, 30 Apr 2020 15:48:37 +0200 Subject: [PATCH 24/24] removal of a massive number of warnings --- .../PHY/CODING/nrLDPC_decoder/nrLDPC_mPass.h | 236 +++++++++--------- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 4 +- 2 files changed, 120 insertions(+), 120 deletions(-) diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_mPass.h b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_mPass.h index 10b45ac0e7..b76750459d 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_mPass.h +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_mPass.h @@ -135,25 +135,25 @@ static inline void nrLDPC_llr2llrProcBuf(t_nrLDPC_lut* p_lut, int8_t* llr, t_nrL */ static inline void nrLDPC_llr2CnProcBuf_BG1(t_nrLDPC_lut* p_lut, int8_t* llr, t_nrLDPC_procBuf* p_procBuf, uint16_t Z) { - const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG1_R13[0]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[0]]) p_lut->circShift[0]; - const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG1_R13[1]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[1]]) p_lut->circShift[1]; - const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG1_R13[2]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[2]]) p_lut->circShift[2]; - const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG1_R13[3]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[3]]) p_lut->circShift[3]; - const uint16_t (*lut_circShift_CNG7) [lut_numCnInCnGroups_BG1_R13[4]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[4]]) p_lut->circShift[4]; - const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG1_R13[5]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[5]]) p_lut->circShift[5]; - const uint16_t (*lut_circShift_CNG9) [lut_numCnInCnGroups_BG1_R13[6]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[6]]) p_lut->circShift[6]; - const uint16_t (*lut_circShift_CNG10)[lut_numCnInCnGroups_BG1_R13[7]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[7]]) p_lut->circShift[7]; - const uint16_t (*lut_circShift_CNG19)[lut_numCnInCnGroups_BG1_R13[8]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[8]]) p_lut->circShift[8]; + const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG1_R13[0]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[0]]) p_lut->circShift[0]; + const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG1_R13[1]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[1]]) p_lut->circShift[1]; + const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG1_R13[2]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[2]]) p_lut->circShift[2]; + const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG1_R13[3]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[3]]) p_lut->circShift[3]; + const uint16_t (*lut_circShift_CNG7) [lut_numCnInCnGroups_BG1_R13[4]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[4]]) p_lut->circShift[4]; + const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG1_R13[5]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[5]]) p_lut->circShift[5]; + const uint16_t (*lut_circShift_CNG9) [lut_numCnInCnGroups_BG1_R13[6]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[6]]) p_lut->circShift[6]; + const uint16_t (*lut_circShift_CNG10)[lut_numCnInCnGroups_BG1_R13[7]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[7]]) p_lut->circShift[7]; + const uint16_t (*lut_circShift_CNG19)[lut_numCnInCnGroups_BG1_R13[8]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[8]]) p_lut->circShift[8]; - const uint8_t (*lut_posBnInCnProcBuf_CNG3) [lut_numCnInCnGroups_BG1_R13[0]] = (uint8_t(*)[lut_numCnInCnGroups_BG1_R13[0]]) p_lut->posBnInCnProcBuf[0]; - const uint8_t (*lut_posBnInCnProcBuf_CNG4) [lut_numCnInCnGroups_BG1_R13[1]] = (uint8_t(*)[lut_numCnInCnGroups_BG1_R13[1]]) p_lut->posBnInCnProcBuf[1]; - const uint8_t (*lut_posBnInCnProcBuf_CNG5) [lut_numCnInCnGroups_BG1_R13[2]] = (uint8_t(*)[lut_numCnInCnGroups_BG1_R13[2]]) p_lut->posBnInCnProcBuf[2]; - const uint8_t (*lut_posBnInCnProcBuf_CNG6) [lut_numCnInCnGroups_BG1_R13[3]] = (uint8_t(*)[lut_numCnInCnGroups_BG1_R13[3]]) p_lut->posBnInCnProcBuf[3]; - const uint8_t (*lut_posBnInCnProcBuf_CNG7) [lut_numCnInCnGroups_BG1_R13[4]] = (uint8_t(*)[lut_numCnInCnGroups_BG1_R13[4]]) p_lut->posBnInCnProcBuf[4]; - const uint8_t (*lut_posBnInCnProcBuf_CNG8) [lut_numCnInCnGroups_BG1_R13[5]] = (uint8_t(*)[lut_numCnInCnGroups_BG1_R13[5]]) p_lut->posBnInCnProcBuf[5]; - const uint8_t (*lut_posBnInCnProcBuf_CNG9) [lut_numCnInCnGroups_BG1_R13[6]] = (uint8_t(*)[lut_numCnInCnGroups_BG1_R13[6]]) p_lut->posBnInCnProcBuf[6]; - const uint8_t (*lut_posBnInCnProcBuf_CNG10)[lut_numCnInCnGroups_BG1_R13[7]] = (uint8_t(*)[lut_numCnInCnGroups_BG1_R13[7]]) p_lut->posBnInCnProcBuf[7]; - const uint8_t (*lut_posBnInCnProcBuf_CNG19)[lut_numCnInCnGroups_BG1_R13[8]] = (uint8_t(*)[lut_numCnInCnGroups_BG1_R13[8]]) p_lut->posBnInCnProcBuf[8]; + const uint8_t (*lut_posBnInCnProcBuf_CNG3) [lut_numCnInCnGroups_BG1_R13[0]] = (const uint8_t(*)[lut_numCnInCnGroups_BG1_R13[0]]) p_lut->posBnInCnProcBuf[0]; + const uint8_t (*lut_posBnInCnProcBuf_CNG4) [lut_numCnInCnGroups_BG1_R13[1]] = (const uint8_t(*)[lut_numCnInCnGroups_BG1_R13[1]]) p_lut->posBnInCnProcBuf[1]; + const uint8_t (*lut_posBnInCnProcBuf_CNG5) [lut_numCnInCnGroups_BG1_R13[2]] = (const uint8_t(*)[lut_numCnInCnGroups_BG1_R13[2]]) p_lut->posBnInCnProcBuf[2]; + const uint8_t (*lut_posBnInCnProcBuf_CNG6) [lut_numCnInCnGroups_BG1_R13[3]] = (const uint8_t(*)[lut_numCnInCnGroups_BG1_R13[3]]) p_lut->posBnInCnProcBuf[3]; + const uint8_t (*lut_posBnInCnProcBuf_CNG7) [lut_numCnInCnGroups_BG1_R13[4]] = (const uint8_t(*)[lut_numCnInCnGroups_BG1_R13[4]]) p_lut->posBnInCnProcBuf[4]; + const uint8_t (*lut_posBnInCnProcBuf_CNG8) [lut_numCnInCnGroups_BG1_R13[5]] = (const uint8_t(*)[lut_numCnInCnGroups_BG1_R13[5]]) p_lut->posBnInCnProcBuf[5]; + const uint8_t (*lut_posBnInCnProcBuf_CNG9) [lut_numCnInCnGroups_BG1_R13[6]] = (const uint8_t(*)[lut_numCnInCnGroups_BG1_R13[6]]) p_lut->posBnInCnProcBuf[6]; + const uint8_t (*lut_posBnInCnProcBuf_CNG10)[lut_numCnInCnGroups_BG1_R13[7]] = (const uint8_t(*)[lut_numCnInCnGroups_BG1_R13[7]]) p_lut->posBnInCnProcBuf[7]; + const uint8_t (*lut_posBnInCnProcBuf_CNG19)[lut_numCnInCnGroups_BG1_R13[8]] = (const uint8_t(*)[lut_numCnInCnGroups_BG1_R13[8]]) p_lut->posBnInCnProcBuf[8]; const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups; const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups; @@ -344,19 +344,19 @@ static inline void nrLDPC_llr2CnProcBuf_BG1(t_nrLDPC_lut* p_lut, int8_t* llr, t_ */ static inline void nrLDPC_llr2CnProcBuf_BG2(t_nrLDPC_lut* p_lut, int8_t* llr, t_nrLDPC_procBuf* p_procBuf, uint16_t Z) { - const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG2_R15[0]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[0]]) p_lut->circShift[0]; - const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG2_R15[1]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[1]]) p_lut->circShift[1]; - const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG2_R15[2]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[2]]) p_lut->circShift[2]; - const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG2_R15[3]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[3]]) p_lut->circShift[3]; - const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG2_R15[4]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[4]]) p_lut->circShift[4]; - const uint16_t (*lut_circShift_CNG10) [lut_numCnInCnGroups_BG2_R15[5]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[5]]) p_lut->circShift[5]; + const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG2_R15[0]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[0]]) p_lut->circShift[0]; + const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG2_R15[1]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[1]]) p_lut->circShift[1]; + const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG2_R15[2]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[2]]) p_lut->circShift[2]; + const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG2_R15[3]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[3]]) p_lut->circShift[3]; + const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG2_R15[4]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[4]]) p_lut->circShift[4]; + const uint16_t (*lut_circShift_CNG10) [lut_numCnInCnGroups_BG2_R15[5]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[5]]) p_lut->circShift[5]; - const uint8_t (*lut_posBnInCnProcBuf_CNG3) [lut_numCnInCnGroups_BG2_R15[0]] = (uint8_t(*)[lut_numCnInCnGroups_BG2_R15[0]]) p_lut->posBnInCnProcBuf[0]; - const uint8_t (*lut_posBnInCnProcBuf_CNG4) [lut_numCnInCnGroups_BG2_R15[1]] = (uint8_t(*)[lut_numCnInCnGroups_BG2_R15[1]]) p_lut->posBnInCnProcBuf[1]; - const uint8_t (*lut_posBnInCnProcBuf_CNG5) [lut_numCnInCnGroups_BG2_R15[2]] = (uint8_t(*)[lut_numCnInCnGroups_BG2_R15[2]]) p_lut->posBnInCnProcBuf[2]; - const uint8_t (*lut_posBnInCnProcBuf_CNG6) [lut_numCnInCnGroups_BG2_R15[3]] = (uint8_t(*)[lut_numCnInCnGroups_BG2_R15[3]]) p_lut->posBnInCnProcBuf[3]; - const uint8_t (*lut_posBnInCnProcBuf_CNG8) [lut_numCnInCnGroups_BG2_R15[4]] = (uint8_t(*)[lut_numCnInCnGroups_BG2_R15[4]]) p_lut->posBnInCnProcBuf[4]; - const uint8_t (*lut_posBnInCnProcBuf_CNG10) [lut_numCnInCnGroups_BG2_R15[5]] = (uint8_t(*)[lut_numCnInCnGroups_BG2_R15[5]]) p_lut->posBnInCnProcBuf[5]; + const uint8_t (*lut_posBnInCnProcBuf_CNG3) [lut_numCnInCnGroups_BG2_R15[0]] = (const uint8_t(*)[lut_numCnInCnGroups_BG2_R15[0]]) p_lut->posBnInCnProcBuf[0]; + const uint8_t (*lut_posBnInCnProcBuf_CNG4) [lut_numCnInCnGroups_BG2_R15[1]] = (const uint8_t(*)[lut_numCnInCnGroups_BG2_R15[1]]) p_lut->posBnInCnProcBuf[1]; + const uint8_t (*lut_posBnInCnProcBuf_CNG5) [lut_numCnInCnGroups_BG2_R15[2]] = (const uint8_t(*)[lut_numCnInCnGroups_BG2_R15[2]]) p_lut->posBnInCnProcBuf[2]; + const uint8_t (*lut_posBnInCnProcBuf_CNG6) [lut_numCnInCnGroups_BG2_R15[3]] = (const uint8_t(*)[lut_numCnInCnGroups_BG2_R15[3]]) p_lut->posBnInCnProcBuf[3]; + const uint8_t (*lut_posBnInCnProcBuf_CNG8) [lut_numCnInCnGroups_BG2_R15[4]] = (const uint8_t(*)[lut_numCnInCnGroups_BG2_R15[4]]) p_lut->posBnInCnProcBuf[4]; + const uint8_t (*lut_posBnInCnProcBuf_CNG10) [lut_numCnInCnGroups_BG2_R15[5]] = (const uint8_t(*)[lut_numCnInCnGroups_BG2_R15[5]]) p_lut->posBnInCnProcBuf[5]; const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups; const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups; @@ -483,26 +483,26 @@ static inline void nrLDPC_cn2bnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups; const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups; - const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG2_R15[0]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[0]]) p_lut->circShift[0]; - const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG2_R15[1]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[1]]) p_lut->circShift[1]; - const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG2_R15[2]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[2]]) p_lut->circShift[2]; - const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG2_R15[3]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[3]]) p_lut->circShift[3]; - const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG2_R15[4]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[4]]) p_lut->circShift[4]; - const uint16_t (*lut_circShift_CNG10) [lut_numCnInCnGroups_BG2_R15[5]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[5]]) p_lut->circShift[5]; + const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG2_R15[0]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[0]]) p_lut->circShift[0]; + const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG2_R15[1]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[1]]) p_lut->circShift[1]; + const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG2_R15[2]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[2]]) p_lut->circShift[2]; + const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG2_R15[3]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[3]]) p_lut->circShift[3]; + const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG2_R15[4]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[4]]) p_lut->circShift[4]; + const uint16_t (*lut_circShift_CNG10) [lut_numCnInCnGroups_BG2_R15[5]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[5]]) p_lut->circShift[5]; - const uint32_t (*lut_startAddrBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (uint32_t(*)[lut_numCnInCnGroups[0]]) p_lut->startAddrBnProcBuf[0]; - const uint32_t (*lut_startAddrBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (uint32_t(*)[lut_numCnInCnGroups[1]]) p_lut->startAddrBnProcBuf[1]; - const uint32_t (*lut_startAddrBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (uint32_t(*)[lut_numCnInCnGroups[2]]) p_lut->startAddrBnProcBuf[2]; - const uint32_t (*lut_startAddrBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (uint32_t(*)[lut_numCnInCnGroups[3]]) p_lut->startAddrBnProcBuf[3]; - const uint32_t (*lut_startAddrBnProcBuf_CNG8) [lut_numCnInCnGroups[4]] = (uint32_t(*)[lut_numCnInCnGroups[4]]) p_lut->startAddrBnProcBuf[4]; - const uint32_t (*lut_startAddrBnProcBuf_CNG10) [lut_numCnInCnGroups[5]] = (uint32_t(*)[lut_numCnInCnGroups[5]]) p_lut->startAddrBnProcBuf[5]; + const uint32_t (*lut_startAddrBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (const uint32_t(*)[lut_numCnInCnGroups[0]]) p_lut->startAddrBnProcBuf[0]; + const uint32_t (*lut_startAddrBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (const uint32_t(*)[lut_numCnInCnGroups[1]]) p_lut->startAddrBnProcBuf[1]; + const uint32_t (*lut_startAddrBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (const uint32_t(*)[lut_numCnInCnGroups[2]]) p_lut->startAddrBnProcBuf[2]; + const uint32_t (*lut_startAddrBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (const uint32_t(*)[lut_numCnInCnGroups[3]]) p_lut->startAddrBnProcBuf[3]; + const uint32_t (*lut_startAddrBnProcBuf_CNG8) [lut_numCnInCnGroups[4]] = (const uint32_t(*)[lut_numCnInCnGroups[4]]) p_lut->startAddrBnProcBuf[4]; + const uint32_t (*lut_startAddrBnProcBuf_CNG10) [lut_numCnInCnGroups[5]] = (const uint32_t(*)[lut_numCnInCnGroups[5]]) p_lut->startAddrBnProcBuf[5]; - const uint8_t (*lut_bnPosBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (uint8_t(*)[lut_numCnInCnGroups[0]]) p_lut->bnPosBnProcBuf[0]; - const uint8_t (*lut_bnPosBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (uint8_t(*)[lut_numCnInCnGroups[1]]) p_lut->bnPosBnProcBuf[1]; - const uint8_t (*lut_bnPosBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (uint8_t(*)[lut_numCnInCnGroups[2]]) p_lut->bnPosBnProcBuf[2]; - const uint8_t (*lut_bnPosBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (uint8_t(*)[lut_numCnInCnGroups[3]]) p_lut->bnPosBnProcBuf[3]; - const uint8_t (*lut_bnPosBnProcBuf_CNG8) [lut_numCnInCnGroups[4]] = (uint8_t(*)[lut_numCnInCnGroups[4]]) p_lut->bnPosBnProcBuf[4]; - const uint8_t (*lut_bnPosBnProcBuf_CNG10) [lut_numCnInCnGroups[5]] = (uint8_t(*)[lut_numCnInCnGroups[5]]) p_lut->bnPosBnProcBuf[5]; + const uint8_t (*lut_bnPosBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (const uint8_t(*)[lut_numCnInCnGroups[0]]) p_lut->bnPosBnProcBuf[0]; + const uint8_t (*lut_bnPosBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (const uint8_t(*)[lut_numCnInCnGroups[1]]) p_lut->bnPosBnProcBuf[1]; + const uint8_t (*lut_bnPosBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (const uint8_t(*)[lut_numCnInCnGroups[2]]) p_lut->bnPosBnProcBuf[2]; + const uint8_t (*lut_bnPosBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (const uint8_t(*)[lut_numCnInCnGroups[3]]) p_lut->bnPosBnProcBuf[3]; + const uint8_t (*lut_bnPosBnProcBuf_CNG8) [lut_numCnInCnGroups[4]] = (const uint8_t(*)[lut_numCnInCnGroups[4]]) p_lut->bnPosBnProcBuf[4]; + const uint8_t (*lut_bnPosBnProcBuf_CNG10) [lut_numCnInCnGroups[5]] = (const uint8_t(*)[lut_numCnInCnGroups[5]]) p_lut->bnPosBnProcBuf[5]; int8_t* cnProcBufRes = p_procBuf->cnProcBufRes; int8_t* bnProcBuf = p_procBuf->bnProcBuf; @@ -626,34 +626,34 @@ static inline void nrLDPC_cn2bnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups; const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups; - const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG1_R13[0]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[0]]) p_lut->circShift[0]; - const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG1_R13[1]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[1]]) p_lut->circShift[1]; - const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG1_R13[2]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[2]]) p_lut->circShift[2]; - const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG1_R13[3]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[3]]) p_lut->circShift[3]; - const uint16_t (*lut_circShift_CNG7) [lut_numCnInCnGroups_BG1_R13[4]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[4]]) p_lut->circShift[4]; - const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG1_R13[5]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[5]]) p_lut->circShift[5]; - const uint16_t (*lut_circShift_CNG9) [lut_numCnInCnGroups_BG1_R13[6]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[6]]) p_lut->circShift[6]; - const uint16_t (*lut_circShift_CNG10)[lut_numCnInCnGroups_BG1_R13[7]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[7]]) p_lut->circShift[7]; - const uint16_t (*lut_circShift_CNG19)[lut_numCnInCnGroups_BG1_R13[8]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[8]]) p_lut->circShift[8]; + const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG1_R13[0]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[0]]) p_lut->circShift[0]; + const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG1_R13[1]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[1]]) p_lut->circShift[1]; + const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG1_R13[2]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[2]]) p_lut->circShift[2]; + const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG1_R13[3]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[3]]) p_lut->circShift[3]; + const uint16_t (*lut_circShift_CNG7) [lut_numCnInCnGroups_BG1_R13[4]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[4]]) p_lut->circShift[4]; + const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG1_R13[5]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[5]]) p_lut->circShift[5]; + const uint16_t (*lut_circShift_CNG9) [lut_numCnInCnGroups_BG1_R13[6]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[6]]) p_lut->circShift[6]; + const uint16_t (*lut_circShift_CNG10)[lut_numCnInCnGroups_BG1_R13[7]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[7]]) p_lut->circShift[7]; + const uint16_t (*lut_circShift_CNG19)[lut_numCnInCnGroups_BG1_R13[8]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[8]]) p_lut->circShift[8]; - const uint32_t (*lut_startAddrBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (uint32_t(*)[lut_numCnInCnGroups[0]]) p_lut->startAddrBnProcBuf[0]; - const uint32_t (*lut_startAddrBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (uint32_t(*)[lut_numCnInCnGroups[1]]) p_lut->startAddrBnProcBuf[1]; - const uint32_t (*lut_startAddrBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (uint32_t(*)[lut_numCnInCnGroups[2]]) p_lut->startAddrBnProcBuf[2]; - const uint32_t (*lut_startAddrBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (uint32_t(*)[lut_numCnInCnGroups[3]]) p_lut->startAddrBnProcBuf[3]; - const uint32_t (*lut_startAddrBnProcBuf_CNG7) [lut_numCnInCnGroups[4]] = (uint32_t(*)[lut_numCnInCnGroups[4]]) p_lut->startAddrBnProcBuf[4]; - const uint32_t (*lut_startAddrBnProcBuf_CNG8) [lut_numCnInCnGroups[5]] = (uint32_t(*)[lut_numCnInCnGroups[5]]) p_lut->startAddrBnProcBuf[5]; - const uint32_t (*lut_startAddrBnProcBuf_CNG9) [lut_numCnInCnGroups[6]] = (uint32_t(*)[lut_numCnInCnGroups[6]]) p_lut->startAddrBnProcBuf[6]; - const uint32_t (*lut_startAddrBnProcBuf_CNG10)[lut_numCnInCnGroups[7]] = (uint32_t(*)[lut_numCnInCnGroups[7]]) p_lut->startAddrBnProcBuf[7]; - const uint32_t (*lut_startAddrBnProcBuf_CNG19)[lut_numCnInCnGroups[8]] = (uint32_t(*)[lut_numCnInCnGroups[8]]) p_lut->startAddrBnProcBuf[8]; + const uint32_t (*lut_startAddrBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (const uint32_t(*)[lut_numCnInCnGroups[0]]) p_lut->startAddrBnProcBuf[0]; + const uint32_t (*lut_startAddrBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (const uint32_t(*)[lut_numCnInCnGroups[1]]) p_lut->startAddrBnProcBuf[1]; + const uint32_t (*lut_startAddrBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (const uint32_t(*)[lut_numCnInCnGroups[2]]) p_lut->startAddrBnProcBuf[2]; + const uint32_t (*lut_startAddrBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (const uint32_t(*)[lut_numCnInCnGroups[3]]) p_lut->startAddrBnProcBuf[3]; + const uint32_t (*lut_startAddrBnProcBuf_CNG7) [lut_numCnInCnGroups[4]] = (const uint32_t(*)[lut_numCnInCnGroups[4]]) p_lut->startAddrBnProcBuf[4]; + const uint32_t (*lut_startAddrBnProcBuf_CNG8) [lut_numCnInCnGroups[5]] = (const uint32_t(*)[lut_numCnInCnGroups[5]]) p_lut->startAddrBnProcBuf[5]; + const uint32_t (*lut_startAddrBnProcBuf_CNG9) [lut_numCnInCnGroups[6]] = (const uint32_t(*)[lut_numCnInCnGroups[6]]) p_lut->startAddrBnProcBuf[6]; + const uint32_t (*lut_startAddrBnProcBuf_CNG10)[lut_numCnInCnGroups[7]] = (const uint32_t(*)[lut_numCnInCnGroups[7]]) p_lut->startAddrBnProcBuf[7]; + const uint32_t (*lut_startAddrBnProcBuf_CNG19)[lut_numCnInCnGroups[8]] = (const uint32_t(*)[lut_numCnInCnGroups[8]]) p_lut->startAddrBnProcBuf[8]; - const uint8_t (*lut_bnPosBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (uint8_t(*)[lut_numCnInCnGroups[1]]) p_lut->bnPosBnProcBuf[1]; - const uint8_t (*lut_bnPosBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (uint8_t(*)[lut_numCnInCnGroups[2]]) p_lut->bnPosBnProcBuf[2]; - const uint8_t (*lut_bnPosBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (uint8_t(*)[lut_numCnInCnGroups[3]]) p_lut->bnPosBnProcBuf[3]; - const uint8_t (*lut_bnPosBnProcBuf_CNG7) [lut_numCnInCnGroups[4]] = (uint8_t(*)[lut_numCnInCnGroups[4]]) p_lut->bnPosBnProcBuf[4]; - const uint8_t (*lut_bnPosBnProcBuf_CNG8) [lut_numCnInCnGroups[5]] = (uint8_t(*)[lut_numCnInCnGroups[5]]) p_lut->bnPosBnProcBuf[5]; - const uint8_t (*lut_bnPosBnProcBuf_CNG9) [lut_numCnInCnGroups[6]] = (uint8_t(*)[lut_numCnInCnGroups[6]]) p_lut->bnPosBnProcBuf[6]; - const uint8_t (*lut_bnPosBnProcBuf_CNG10)[lut_numCnInCnGroups[7]] = (uint8_t(*)[lut_numCnInCnGroups[7]]) p_lut->bnPosBnProcBuf[7]; - const uint8_t (*lut_bnPosBnProcBuf_CNG19)[lut_numCnInCnGroups[8]] = (uint8_t(*)[lut_numCnInCnGroups[8]]) p_lut->bnPosBnProcBuf[8]; + const uint8_t (*lut_bnPosBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (const uint8_t(*)[lut_numCnInCnGroups[1]]) p_lut->bnPosBnProcBuf[1]; + const uint8_t (*lut_bnPosBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (const uint8_t(*)[lut_numCnInCnGroups[2]]) p_lut->bnPosBnProcBuf[2]; + const uint8_t (*lut_bnPosBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (const uint8_t(*)[lut_numCnInCnGroups[3]]) p_lut->bnPosBnProcBuf[3]; + const uint8_t (*lut_bnPosBnProcBuf_CNG7) [lut_numCnInCnGroups[4]] = (const uint8_t(*)[lut_numCnInCnGroups[4]]) p_lut->bnPosBnProcBuf[4]; + const uint8_t (*lut_bnPosBnProcBuf_CNG8) [lut_numCnInCnGroups[5]] = (const uint8_t(*)[lut_numCnInCnGroups[5]]) p_lut->bnPosBnProcBuf[5]; + const uint8_t (*lut_bnPosBnProcBuf_CNG9) [lut_numCnInCnGroups[6]] = (const uint8_t(*)[lut_numCnInCnGroups[6]]) p_lut->bnPosBnProcBuf[6]; + const uint8_t (*lut_bnPosBnProcBuf_CNG10)[lut_numCnInCnGroups[7]] = (const uint8_t(*)[lut_numCnInCnGroups[7]]) p_lut->bnPosBnProcBuf[7]; + const uint8_t (*lut_bnPosBnProcBuf_CNG19)[lut_numCnInCnGroups[8]] = (const uint8_t(*)[lut_numCnInCnGroups[8]]) p_lut->bnPosBnProcBuf[8]; int8_t* cnProcBufRes = p_procBuf->cnProcBufRes; int8_t* bnProcBuf = p_procBuf->bnProcBuf; @@ -824,26 +824,26 @@ static inline void nrLDPC_bn2cnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups; const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups; - const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG2_R15[0]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[0]]) p_lut->circShift[0]; - const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG2_R15[1]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[1]]) p_lut->circShift[1]; - const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG2_R15[2]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[2]]) p_lut->circShift[2]; - const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG2_R15[3]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[3]]) p_lut->circShift[3]; - const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG2_R15[4]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[4]]) p_lut->circShift[4]; - const uint16_t (*lut_circShift_CNG10) [lut_numCnInCnGroups_BG2_R15[5]] = (uint16_t(*)[lut_numCnInCnGroups_BG2_R15[5]]) p_lut->circShift[5]; + const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG2_R15[0]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[0]]) p_lut->circShift[0]; + const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG2_R15[1]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[1]]) p_lut->circShift[1]; + const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG2_R15[2]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[2]]) p_lut->circShift[2]; + const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG2_R15[3]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[3]]) p_lut->circShift[3]; + const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG2_R15[4]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[4]]) p_lut->circShift[4]; + const uint16_t (*lut_circShift_CNG10) [lut_numCnInCnGroups_BG2_R15[5]] = (const uint16_t(*)[lut_numCnInCnGroups_BG2_R15[5]]) p_lut->circShift[5]; - const uint32_t (*lut_startAddrBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (uint32_t(*)[lut_numCnInCnGroups[0]]) p_lut->startAddrBnProcBuf[0]; - const uint32_t (*lut_startAddrBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (uint32_t(*)[lut_numCnInCnGroups[1]]) p_lut->startAddrBnProcBuf[1]; - const uint32_t (*lut_startAddrBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (uint32_t(*)[lut_numCnInCnGroups[2]]) p_lut->startAddrBnProcBuf[2]; - const uint32_t (*lut_startAddrBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (uint32_t(*)[lut_numCnInCnGroups[3]]) p_lut->startAddrBnProcBuf[3]; - const uint32_t (*lut_startAddrBnProcBuf_CNG8) [lut_numCnInCnGroups[4]] = (uint32_t(*)[lut_numCnInCnGroups[4]]) p_lut->startAddrBnProcBuf[4]; - const uint32_t (*lut_startAddrBnProcBuf_CNG10) [lut_numCnInCnGroups[5]] = (uint32_t(*)[lut_numCnInCnGroups[5]]) p_lut->startAddrBnProcBuf[5]; + const uint32_t (*lut_startAddrBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (const uint32_t(*)[lut_numCnInCnGroups[0]]) p_lut->startAddrBnProcBuf[0]; + const uint32_t (*lut_startAddrBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (const uint32_t(*)[lut_numCnInCnGroups[1]]) p_lut->startAddrBnProcBuf[1]; + const uint32_t (*lut_startAddrBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (const uint32_t(*)[lut_numCnInCnGroups[2]]) p_lut->startAddrBnProcBuf[2]; + const uint32_t (*lut_startAddrBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (const uint32_t(*)[lut_numCnInCnGroups[3]]) p_lut->startAddrBnProcBuf[3]; + const uint32_t (*lut_startAddrBnProcBuf_CNG8) [lut_numCnInCnGroups[4]] = (const uint32_t(*)[lut_numCnInCnGroups[4]]) p_lut->startAddrBnProcBuf[4]; + const uint32_t (*lut_startAddrBnProcBuf_CNG10) [lut_numCnInCnGroups[5]] = (const uint32_t(*)[lut_numCnInCnGroups[5]]) p_lut->startAddrBnProcBuf[5]; - const uint8_t (*lut_bnPosBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (uint8_t(*)[lut_numCnInCnGroups[0]]) p_lut->bnPosBnProcBuf[0]; - const uint8_t (*lut_bnPosBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (uint8_t(*)[lut_numCnInCnGroups[1]]) p_lut->bnPosBnProcBuf[1]; - const uint8_t (*lut_bnPosBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (uint8_t(*)[lut_numCnInCnGroups[2]]) p_lut->bnPosBnProcBuf[2]; - const uint8_t (*lut_bnPosBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (uint8_t(*)[lut_numCnInCnGroups[3]]) p_lut->bnPosBnProcBuf[3]; - const uint8_t (*lut_bnPosBnProcBuf_CNG8) [lut_numCnInCnGroups[4]] = (uint8_t(*)[lut_numCnInCnGroups[4]]) p_lut->bnPosBnProcBuf[4]; - const uint8_t (*lut_bnPosBnProcBuf_CNG10) [lut_numCnInCnGroups[5]] = (uint8_t(*)[lut_numCnInCnGroups[5]]) p_lut->bnPosBnProcBuf[5]; + const uint8_t (*lut_bnPosBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (const uint8_t(*)[lut_numCnInCnGroups[0]]) p_lut->bnPosBnProcBuf[0]; + const uint8_t (*lut_bnPosBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (const uint8_t(*)[lut_numCnInCnGroups[1]]) p_lut->bnPosBnProcBuf[1]; + const uint8_t (*lut_bnPosBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (const uint8_t(*)[lut_numCnInCnGroups[2]]) p_lut->bnPosBnProcBuf[2]; + const uint8_t (*lut_bnPosBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (const uint8_t(*)[lut_numCnInCnGroups[3]]) p_lut->bnPosBnProcBuf[3]; + const uint8_t (*lut_bnPosBnProcBuf_CNG8) [lut_numCnInCnGroups[4]] = (const uint8_t(*)[lut_numCnInCnGroups[4]]) p_lut->bnPosBnProcBuf[4]; + const uint8_t (*lut_bnPosBnProcBuf_CNG10) [lut_numCnInCnGroups[5]] = (const uint8_t(*)[lut_numCnInCnGroups[5]]) p_lut->bnPosBnProcBuf[5]; int8_t* cnProcBuf = p_procBuf->cnProcBuf; int8_t* bnProcBufRes = p_procBuf->bnProcBufRes; @@ -966,34 +966,34 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups; const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups; - const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG1_R13[0]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[0]]) p_lut->circShift[0]; - const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG1_R13[1]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[1]]) p_lut->circShift[1]; - const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG1_R13[2]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[2]]) p_lut->circShift[2]; - const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG1_R13[3]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[3]]) p_lut->circShift[3]; - const uint16_t (*lut_circShift_CNG7) [lut_numCnInCnGroups_BG1_R13[4]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[4]]) p_lut->circShift[4]; - const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG1_R13[5]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[5]]) p_lut->circShift[5]; - const uint16_t (*lut_circShift_CNG9) [lut_numCnInCnGroups_BG1_R13[6]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[6]]) p_lut->circShift[6]; - const uint16_t (*lut_circShift_CNG10)[lut_numCnInCnGroups_BG1_R13[7]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[7]]) p_lut->circShift[7]; - const uint16_t (*lut_circShift_CNG19)[lut_numCnInCnGroups_BG1_R13[8]] = (uint16_t(*)[lut_numCnInCnGroups_BG1_R13[8]]) p_lut->circShift[8]; + const uint16_t (*lut_circShift_CNG3) [lut_numCnInCnGroups_BG1_R13[0]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[0]]) p_lut->circShift[0]; + const uint16_t (*lut_circShift_CNG4) [lut_numCnInCnGroups_BG1_R13[1]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[1]]) p_lut->circShift[1]; + const uint16_t (*lut_circShift_CNG5) [lut_numCnInCnGroups_BG1_R13[2]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[2]]) p_lut->circShift[2]; + const uint16_t (*lut_circShift_CNG6) [lut_numCnInCnGroups_BG1_R13[3]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[3]]) p_lut->circShift[3]; + const uint16_t (*lut_circShift_CNG7) [lut_numCnInCnGroups_BG1_R13[4]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[4]]) p_lut->circShift[4]; + const uint16_t (*lut_circShift_CNG8) [lut_numCnInCnGroups_BG1_R13[5]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[5]]) p_lut->circShift[5]; + const uint16_t (*lut_circShift_CNG9) [lut_numCnInCnGroups_BG1_R13[6]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[6]]) p_lut->circShift[6]; + const uint16_t (*lut_circShift_CNG10)[lut_numCnInCnGroups_BG1_R13[7]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[7]]) p_lut->circShift[7]; + const uint16_t (*lut_circShift_CNG19)[lut_numCnInCnGroups_BG1_R13[8]] = (const uint16_t(*)[lut_numCnInCnGroups_BG1_R13[8]]) p_lut->circShift[8]; - const uint32_t (*lut_startAddrBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (uint32_t(*)[lut_numCnInCnGroups[0]]) p_lut->startAddrBnProcBuf[0]; - const uint32_t (*lut_startAddrBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (uint32_t(*)[lut_numCnInCnGroups[1]]) p_lut->startAddrBnProcBuf[1]; - const uint32_t (*lut_startAddrBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (uint32_t(*)[lut_numCnInCnGroups[2]]) p_lut->startAddrBnProcBuf[2]; - const uint32_t (*lut_startAddrBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (uint32_t(*)[lut_numCnInCnGroups[3]]) p_lut->startAddrBnProcBuf[3]; - const uint32_t (*lut_startAddrBnProcBuf_CNG7) [lut_numCnInCnGroups[4]] = (uint32_t(*)[lut_numCnInCnGroups[4]]) p_lut->startAddrBnProcBuf[4]; - const uint32_t (*lut_startAddrBnProcBuf_CNG8) [lut_numCnInCnGroups[5]] = (uint32_t(*)[lut_numCnInCnGroups[5]]) p_lut->startAddrBnProcBuf[5]; - const uint32_t (*lut_startAddrBnProcBuf_CNG9) [lut_numCnInCnGroups[6]] = (uint32_t(*)[lut_numCnInCnGroups[6]]) p_lut->startAddrBnProcBuf[6]; - const uint32_t (*lut_startAddrBnProcBuf_CNG10)[lut_numCnInCnGroups[7]] = (uint32_t(*)[lut_numCnInCnGroups[7]]) p_lut->startAddrBnProcBuf[7]; - const uint32_t (*lut_startAddrBnProcBuf_CNG19)[lut_numCnInCnGroups[8]] = (uint32_t(*)[lut_numCnInCnGroups[8]]) p_lut->startAddrBnProcBuf[8]; + const uint32_t (*lut_startAddrBnProcBuf_CNG3) [lut_numCnInCnGroups[0]] = (const uint32_t(*)[lut_numCnInCnGroups[0]]) p_lut->startAddrBnProcBuf[0]; + const uint32_t (*lut_startAddrBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (const uint32_t(*)[lut_numCnInCnGroups[1]]) p_lut->startAddrBnProcBuf[1]; + const uint32_t (*lut_startAddrBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (const uint32_t(*)[lut_numCnInCnGroups[2]]) p_lut->startAddrBnProcBuf[2]; + const uint32_t (*lut_startAddrBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (const uint32_t(*)[lut_numCnInCnGroups[3]]) p_lut->startAddrBnProcBuf[3]; + const uint32_t (*lut_startAddrBnProcBuf_CNG7) [lut_numCnInCnGroups[4]] = (const uint32_t(*)[lut_numCnInCnGroups[4]]) p_lut->startAddrBnProcBuf[4]; + const uint32_t (*lut_startAddrBnProcBuf_CNG8) [lut_numCnInCnGroups[5]] = (const uint32_t(*)[lut_numCnInCnGroups[5]]) p_lut->startAddrBnProcBuf[5]; + const uint32_t (*lut_startAddrBnProcBuf_CNG9) [lut_numCnInCnGroups[6]] = (const uint32_t(*)[lut_numCnInCnGroups[6]]) p_lut->startAddrBnProcBuf[6]; + const uint32_t (*lut_startAddrBnProcBuf_CNG10)[lut_numCnInCnGroups[7]] = (const uint32_t(*)[lut_numCnInCnGroups[7]]) p_lut->startAddrBnProcBuf[7]; + const uint32_t (*lut_startAddrBnProcBuf_CNG19)[lut_numCnInCnGroups[8]] = (const uint32_t(*)[lut_numCnInCnGroups[8]]) p_lut->startAddrBnProcBuf[8]; - const uint8_t (*lut_bnPosBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (uint8_t(*)[lut_numCnInCnGroups[1]]) p_lut->bnPosBnProcBuf[1]; - const uint8_t (*lut_bnPosBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (uint8_t(*)[lut_numCnInCnGroups[2]]) p_lut->bnPosBnProcBuf[2]; - const uint8_t (*lut_bnPosBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (uint8_t(*)[lut_numCnInCnGroups[3]]) p_lut->bnPosBnProcBuf[3]; - const uint8_t (*lut_bnPosBnProcBuf_CNG7) [lut_numCnInCnGroups[4]] = (uint8_t(*)[lut_numCnInCnGroups[4]]) p_lut->bnPosBnProcBuf[4]; - const uint8_t (*lut_bnPosBnProcBuf_CNG8) [lut_numCnInCnGroups[5]] = (uint8_t(*)[lut_numCnInCnGroups[5]]) p_lut->bnPosBnProcBuf[5]; - const uint8_t (*lut_bnPosBnProcBuf_CNG9) [lut_numCnInCnGroups[6]] = (uint8_t(*)[lut_numCnInCnGroups[6]]) p_lut->bnPosBnProcBuf[6]; - const uint8_t (*lut_bnPosBnProcBuf_CNG10)[lut_numCnInCnGroups[7]] = (uint8_t(*)[lut_numCnInCnGroups[7]]) p_lut->bnPosBnProcBuf[7]; - const uint8_t (*lut_bnPosBnProcBuf_CNG19)[lut_numCnInCnGroups[8]] = (uint8_t(*)[lut_numCnInCnGroups[8]]) p_lut->bnPosBnProcBuf[8]; + const uint8_t (*lut_bnPosBnProcBuf_CNG4) [lut_numCnInCnGroups[1]] = (const uint8_t(*)[lut_numCnInCnGroups[1]]) p_lut->bnPosBnProcBuf[1]; + const uint8_t (*lut_bnPosBnProcBuf_CNG5) [lut_numCnInCnGroups[2]] = (const uint8_t(*)[lut_numCnInCnGroups[2]]) p_lut->bnPosBnProcBuf[2]; + const uint8_t (*lut_bnPosBnProcBuf_CNG6) [lut_numCnInCnGroups[3]] = (const uint8_t(*)[lut_numCnInCnGroups[3]]) p_lut->bnPosBnProcBuf[3]; + const uint8_t (*lut_bnPosBnProcBuf_CNG7) [lut_numCnInCnGroups[4]] = (const uint8_t(*)[lut_numCnInCnGroups[4]]) p_lut->bnPosBnProcBuf[4]; + const uint8_t (*lut_bnPosBnProcBuf_CNG8) [lut_numCnInCnGroups[5]] = (const uint8_t(*)[lut_numCnInCnGroups[5]]) p_lut->bnPosBnProcBuf[5]; + const uint8_t (*lut_bnPosBnProcBuf_CNG9) [lut_numCnInCnGroups[6]] = (const uint8_t(*)[lut_numCnInCnGroups[6]]) p_lut->bnPosBnProcBuf[6]; + const uint8_t (*lut_bnPosBnProcBuf_CNG10)[lut_numCnInCnGroups[7]] = (const uint8_t(*)[lut_numCnInCnGroups[7]]) p_lut->bnPosBnProcBuf[7]; + const uint8_t (*lut_bnPosBnProcBuf_CNG19)[lut_numCnInCnGroups[8]] = (const uint8_t(*)[lut_numCnInCnGroups[8]]) p_lut->bnPosBnProcBuf[8]; int8_t* cnProcBuf = p_procBuf->cnProcBuf; int8_t* bnProcBufRes = p_procBuf->bnProcBufRes; diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index a2f4b57121..60f9d4747a 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -439,8 +439,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) case 2: break; default: - AssertFatal(1==0,"Only PUCCH format 0,1 and 2 are currently supported\n") - } + AssertFatal(1==0,"Only PUCCH format 0,1 and 2 are currently supported\n"); + } } } }