merge develop, some tests in 5g: no regression
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@@ -1194,6 +1194,8 @@ void phy_procedures_eNB_TX_tosplit(uint8_t *bufferZone, PHY_VARS_eNB *eNB, L1_rx
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for (int i=0; i<NUMBER_OF_UE_MAX; i++) {
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int harq_pid;
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LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[i];
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if (ulsch == NULL)
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continue;
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if (ulsch->ue_type > NOCE)
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harq_pid = 0;
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@@ -1209,9 +1211,10 @@ void phy_procedures_eNB_TX_tosplit(uint8_t *bufferZone, PHY_VARS_eNB *eNB, L1_rx
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for (int k=0; k<8; k++) {
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ulsch_harq = ulsch->harq_processes[k];
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if (ulsch_harq == NULL)
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continue;
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if (ulsch &&
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(ulsch->rnti>0) &&
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if ((ulsch->rnti>0) &&
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(ulsch_harq->status == ACTIVE) &&
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(ulsch_harq->frame == frame) &&
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(ulsch_harq->subframe == subframe) &&
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@@ -734,9 +734,7 @@ void init_gNB_proc(int inst) {
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gNB_L1_rxtx_proc_t *L1_proc,*L1_proc_tx;
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// LOG_I(PHY,"%s(inst:%d) RC.nb_nr_CC[inst]:%d \n",__FUNCTION__,inst,RC.nb_nr_CC[inst]);
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gNB = RC.gNB[inst];
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#ifndef OCP_FRAMEWORK
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LOG_I(PHY,"Initializing gNB processes instance:%d CC_id %d \n",inst,CC_id);
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#endif
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proc = &gNB->proc;
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L1_proc = &proc->L1_proc;
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@@ -950,9 +948,7 @@ void init_gNB(int single_thread_flag,int wait_for_sync) {
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NR_POLAR_PBCH_PAYLOAD_BITS,
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NR_POLAR_PBCH_AGGREGATION_LEVEL);*/
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LOG_I(PHY,"Initializing gNB %d single_thread_flag:%d\n",inst,gNB->single_thread_flag);
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#ifndef OCP_FRAMEWORK
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LOG_I(PHY,"Initializing gNB %d\n",inst);
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#endif
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LOG_I(PHY,"Registering with MAC interface module (before %p)\n",gNB->if_inst);
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AssertFatal((gNB->if_inst = NR_IF_Module_init(inst))!=NULL,"Cannot register interface");
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+17
-3
@@ -773,7 +773,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
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LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, slot %d\n",ru->idx,
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(long long unsigned int)timestamp,frame,proc->frame_tx_unwrap,slot);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
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AssertFatal(txs == siglen+sf_extension,"TX : Timeout (sent %u/%d)\n", txs, siglen);
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//AssertFatal(txs == 0,"trx write function error %d\n", txs);
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}
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}
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@@ -1463,6 +1463,16 @@ void *ru_thread( void *param ) {
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// if this is a slave RRU, try to synchronize on the DL frequency
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if ((ru->is_slave) && (ru->if_south == LOCAL_RF)) do_ru_synch(ru);
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// start trx write thread
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if (ru->start_write_thread){
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if(ru->start_write_thread(ru) != 0){
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LOG_E(HW,"Could not start tx write thread\n");
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}
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else{
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LOG_I(PHY,"tx write thread ready\n");
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}
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}
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}
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pthread_mutex_lock(&proc->mutex_FH1);
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@@ -1672,14 +1682,15 @@ int stop_rf(RU_t *ru) {
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return 0;
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}
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int start_write_thread(RU_t *ru) {
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return(ru->rfdevice.trx_write_init(&ru->rfdevice));
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}
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void init_RU_proc(RU_t *ru) {
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int i=0;
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RU_proc_t *proc;
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char name[100];
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#ifndef OCP_FRAMEWORK
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LOG_I(PHY,"Initializing RU proc %d (%s,%s),\n",ru->idx,NB_functions[ru->function],NB_timing[ru->if_timing]);
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#endif
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proc = &ru->proc;
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memset((void *)proc,0,sizeof(RU_proc_t));
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proc->ru = ru;
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@@ -2067,6 +2078,7 @@ void set_function_spec_param(RU_t *ru) {
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ru->fh_south_out = tx_rf; // local synchronous RF TX
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ru->start_rf = start_rf; // need to start the local RF interface
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ru->stop_rf = stop_rf;
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ru->start_write_thread = start_write_thread; // starting RF TX in different thread
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printf("configuring ru_id %u (start_rf %p)\n", ru->idx, start_rf);
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/*
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if (ru->function == gNodeB_3GPP) { // configure RF parameters only for 3GPP eNodeB, we need to get them from RAU otherwise
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@@ -2092,6 +2104,7 @@ void set_function_spec_param(RU_t *ru) {
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ru->fh_south_asynch_in = NULL; // no asynchronous UL
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ru->start_rf = NULL; // no local RF
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ru->stop_rf = NULL;
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ru->start_write_thread = NULL;
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ru->nr_start_if = nr_start_if; // need to start if interface for IF5
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ru->ifdevice.host_type = RAU_HOST;
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ru->ifdevice.eth_params = &ru->eth_params;
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@@ -2118,6 +2131,7 @@ void set_function_spec_param(RU_t *ru) {
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ru->fh_north_asynch_in = NULL;
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ru->start_rf = NULL; // no local RF
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ru->stop_rf = NULL;
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ru->start_write_thread = NULL;
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ru->nr_start_if = nr_start_if; // need to start if interface for IF4p5
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ru->ifdevice.host_type = RAU_HOST;
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ru->ifdevice.eth_params = &ru->eth_params;
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+51
-29
@@ -146,7 +146,7 @@ void init_nr_ue_vars(PHY_VARS_NR_UE *ue,
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ue->Mod_id = UE_id;
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ue->mac_enabled = 1;
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// initialize all signal buffers
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// initialize all signal buffers
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init_nr_ue_signal(ue,1,abstraction_flag);
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// intialize transport
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@@ -357,10 +357,11 @@ static void UE_synch(void *arg) {
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}
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void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
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uint32_t nb_rb, start_rb;
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uint8_t nb_symb_sch, start_symbol, mcs, precod_nbr_layers, harq_pid, rvidx;
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uint16_t n_rnti;
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uint32_t rb_size, rb_start;
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uint16_t rnti, l_prime_mask, n_rb0, n_rb1, pdu_bit_map;
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uint8_t nr_of_symbols, start_symbol_index, mcs_index, mcs_table, nrOfLayers, harq_process_id, rv_index, dmrs_config_type;
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uint8_t ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, ptrs_time_density, ptrs_freq_density;
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nr_dcireq_t dcireq;
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nr_scheduled_response_t scheduled_response;
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@@ -381,30 +382,53 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
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scheduled_response.frame = proc->frame_rx;
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scheduled_response.slot = proc->nr_tti_rx;
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//--------------------------Temporary configuration-----------------------------//
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n_rnti = 0x1234;
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nb_rb = 50;
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start_rb = 0;
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nb_symb_sch = 12;
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start_symbol = 2;
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precod_nbr_layers = 1;
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mcs = 9;
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harq_pid = 0;
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rvidx = 0;
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rnti = 0x1234;
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rb_size = 50;
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rb_start = 0;
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nr_of_symbols = 12;
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start_symbol_index = 2;
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nrOfLayers = 1;
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mcs_index = 9;
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mcs_table = 0;
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harq_process_id = 0;
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rv_index = 0;
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l_prime_mask = get_l_prime(nr_of_symbols, typeB, pusch_dmrs_pos0, pusch_len1);
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dmrs_config_type = 0;
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ptrs_mcs1 = 2;
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ptrs_mcs2 = 4;
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ptrs_mcs3 = 10;
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n_rb0 = 25;
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n_rb1 = 75;
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pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
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ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, mcs_index, mcs_table);
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ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, rb_size);
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//------------------------------------------------------------------------------//
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scheduled_response.ul_config->slot = 8;
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scheduled_response.ul_config->number_pdus = 1;
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scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = nb_rb;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = start_rb;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = nb_symb_sch;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = start_symbol;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.mcs = mcs;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.rv = rvidx;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.rnti = rnti;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.rb_size = rb_size;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.rb_start = rb_start;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.nr_of_symbols = nr_of_symbols;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol_index;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = l_prime_mask << start_symbol_index;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.dmrs_config_type = dmrs_config_type;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_index = mcs_index;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = rv_index;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.nrOfLayers = nrOfLayers;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.harq_process_id = harq_process_id;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pdu_bit_map = pdu_bit_map;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_time_density = ptrs_time_density;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_freq_density = ptrs_freq_density;
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_ports_list = (nfapi_nr_ue_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ue_ptrs_ports_t));
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0;
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if (1 << ptrs_time_density >= nr_of_symbols) {
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scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
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}
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nr_ue_scheduled_response(&scheduled_response);
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@@ -471,7 +495,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
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}
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}
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// no UL for now
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// no UL for now
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/*
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if (UE->mac_enabled==1) {
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@@ -508,7 +531,7 @@ void UE_processing(void *arg) {
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PHY_VARS_NR_UE *UE = rxtxD->UE;
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uint8_t gNB_id = 0;
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// params for UL time alignment procedure
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// params for UL time alignment procedure
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NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
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uint8_t numerology = UE->frame_parms.numerology_index;
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@@ -523,7 +546,7 @@ void UE_processing(void *arg) {
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if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
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LOG_D(PHY,"Applying timing advance -- frame %d -- slot %d\n", frame_tx, slot_tx);
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//if (nfapi_mode!=3){
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//if (nfapi_mode!=3){
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nr_process_timing_advance(UE->Mod_id, UE->CC_id, ul_time_alignment->ta_command, numerology, bwp_ul_NB_RB);
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ul_time_alignment->ta_frame = -1;
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@@ -590,8 +613,7 @@ void readFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp, bool toTrash)
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void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
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LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
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void *dummy_tx[UE->frame_parms.nb_antennas_tx];
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LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
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*timestamp += UE->frame_parms.get_samples_per_slot(1,&UE->frame_parms);
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for ( int size=UE->rx_offset ; size > 0 ; size -= UE->frame_parms.samples_per_subframe ) {
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@@ -753,7 +775,7 @@ void *UE_thread(void *arg) {
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#ifdef OAI_ADRV9371_ZC706
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/*uint32_t total_gain_dB_prev = 0;
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if (total_gain_dB_prev != UE->rx_total_gain_dB) {
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total_gain_dB_prev = UE->rx_total_gain_dB;
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total_gain_dB_prev = UE->rx_total_gain_dB;
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openair0_cfg[0].rx_gain[0] = UE->rx_total_gain_dB;
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UE->rfdevice.trx_set_gains_func(&UE->rfdevice,&openair0_cfg[0]);
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}*/
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