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configured LDPC on CPU and GPU

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This commit is contained in:
NCTU OpinConnect Terng-Yin Hsu/WEI-YING,LIN
2020-05-13 22:27:36 +08:00
parent da62b92f6e
commit 02dc4ba8ce
230 changed files with 18984 additions and 21450 deletions
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openair1/PHY/CODING/TESTBENCH/ldpctest.c
+33 -9
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@@ -18,6 +18,17 @@
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
// add GPU mode (-G 1)
/*! \file PHY/CODING/TESTBENCH/ldpctest.c
* \brief Merge remote-tracking branch 'origin/develop' into NCTU_OpinConnect_LDPC
* \author NCTU OpinConnect Terng-Yin Hsu,WEI-YING,LIN
* \email tyhsu@cs.nctu.edu.tw
* \date 13-05-2020
* \version
* \note
* \warning
*/
#include <stdlib.h>
#include <math.h>
@@ -104,7 +115,8 @@ int test_ldpc(short No_iteration,
unsigned int *crc_misses,
time_stats_t *time_optim,
time_stats_t *time_decoder,
n_iter_stats_t *dec_iter)
n_iter_stats_t *dec_iter,
short run_cuda)
{
//clock initiate
//time_stats_t time,time_optim,tinput,tprep,tparity,toutput, time_decoder;
@@ -401,15 +413,21 @@ int test_ldpc(short No_iteration,
// decoder supports BG2, Z=128 & 256
//esimated_output=ldpc_decoder(channel_output_fixed, block_length, No_iteration, (double)((float)nom_rate/(float)denom_rate));
///nrLDPC_decoder(&decParams, channel_output_fixed, estimated_output, NULL);
#ifdef __NR_LDPC_DECODER_LYC__H__
//#ifdef __NR_LDPC_DECODER_LYC__H__RUN__
if(run_cuda){
printf("run ldpc by cuda\n");
start_meas(time_decoder);
n_iter = nrLDPC_decoder_LYC(&decParams, (int8_t*)channel_output_fixed[j], (int8_t*)estimated_output[j], block_length, time_decoder);
stop_meas(time_decoder);
#else
}
//#else
else{
printf("run ldpc by cpu\n");
start_meas(time_decoder);
n_iter = nrLDPC_decoder(&decParams, (int8_t*)channel_output_fixed[j], (int8_t*)estimated_output[j], p_nrLDPC_procBuf, p_decoder_profiler);
stop_meas(time_decoder);
#endif
}
//#endif
}
//for (i=(Kb+nrows) * Zc-5;i<(Kb+nrows) * Zc;i++)
@@ -512,7 +530,7 @@ int main(int argc, char *argv[])
unsigned int errors, errors_bit, crc_misses;
double errors_bit_uncoded;
short block_length=8448; // decoder supports length: 1201 -> 1280, 2401 -> 2560
short run_cuda = 0;
short No_iteration=5;
int n_segments=1;
//double rate=0.333;
@@ -534,7 +552,7 @@ int main(int argc, char *argv[])
short BG=0,Zc,Kb;
while ((c = getopt (argc, argv, "q:r:s:S:l:n:d:i:t:u:h")) != -1)
while ((c = getopt (argc, argv, "q:r:s:S:l:n:d:i:t:u:h:G:")) != -1)
switch (c)
{
case 'q':
@@ -544,7 +562,10 @@ int main(int argc, char *argv[])
case 'r':
nom_rate = atoi(optarg);
break;
case 'G':
run_cuda = atoi(optarg);
break;
case 'd':
denom_rate = atoi(optarg);
break;
@@ -576,6 +597,7 @@ int main(int argc, char *argv[])
case 'u':
test_uncoded = atoi(optarg);
break;
case 'h':
default:
@@ -594,6 +616,7 @@ int main(int argc, char *argv[])
printf("-t SNR simulation step, Default: 0.1\n");
printf("-i Max decoder iterations, Default: 5\n");
printf("-u Set SNR per coded bit, Default: 0\n");
printf("-G set 1 to run cuda for ldpc \n");
exit(1);
break;
}
@@ -603,7 +626,7 @@ int main(int argc, char *argv[])
printf("block length %d: \n", block_length);
printf("n_trials %d: \n", n_trials);
printf("SNR0 %f: \n", SNR0);
@@ -677,7 +700,8 @@ int main(int argc, char *argv[])
&crc_misses,
time_optim,
time_decoder,
dec_iter);
dec_iter,
run_cuda);
printf("SNR %f, BLER %f (%u/%d)\n", SNR, (float)decoded_errors[i]/(float)n_trials, decoded_errors[i], n_trials);
printf("SNR %f, BER %f (%u/%d)\n", SNR, (float)errors_bit/(float)n_trials/(float)block_length/(double)n_segments, decoded_errors[i], n_trials);
openair1/PHY/CODING/TESTBENCH/polartest.c
+1 -1
View File
@@ -175,7 +175,7 @@ if (logFlag){
double channelOutput[coderLength]; //add noise
int16_t channelOutput_int16[coderLength];
t_nrPolar_params *currentPtr = nr_polar_params(polarMessageType, testLength, aggregation_level);
t_nrPolar_params *currentPtr = nr_polar_params(polarMessageType, testLength, aggregation_level, 1, NULL);
#ifdef DEBUG_DCI_POLAR_PARAMS
uint32_t dci_pdu[4];
openair1/PHY/CODING/coding_defs.h
+5 -1
View File
@@ -481,6 +481,8 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm,
uint8_t *w,
uint8_t *e,
uint8_t C,
uint32_t F,
uint32_t Foffset,
uint8_t rvidx,
uint32_t E);
@@ -493,7 +495,9 @@ int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
uint8_t C,
uint8_t rvidx,
uint8_t clear,
uint32_t E);
uint32_t E,
uint32_t F,
uint32_t Foffset);
decoder_if_t phy_threegpplte_turbo_decoder;
decoder_if_t phy_threegpplte_turbo_decoder8;
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_cnProc.h
+10 -4
View File
@@ -88,23 +88,29 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_pr
// Set of results pointer to correct BN address
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
__m256i *pj0 = &p_cnProcBuf[lut_idxCnProcG3[j][0]];
__m256i *pj1 = &p_cnProcBuf[lut_idxCnProcG3[j][1]];
// Loop over CNs
for (i=0; i<M; i++)
{
// Abs and sign of 32 CNs (first BN)
ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
// ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
ymm0 = pj0[i];
sgn = _mm256_sign_epi8(*p_ones, ymm0);
min = _mm256_abs_epi8(ymm0);
// 32 CNs of second BN
ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][1] + i];
// ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][1] + i];
ymm0 = pj1[i];
min = _mm256_min_epu8(min, _mm256_abs_epi8(ymm0));
sgn = _mm256_sign_epi8(sgn, ymm0);
// Store result
min = _mm256_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
*p_cnProcBufResBit = _mm256_sign_epi8(min, sgn);
p_cnProcBufResBit++;
//*p_cnProcBufResBit = _mm256_sign_epi8(min, sgn);
//p_cnProcBufResBit++;
p_cnProcBufResBit[i]=_mm256_sign_epi8(min, sgn);
}
}
}
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c
+3 -3
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@@ -31,7 +31,7 @@
#include <stdint.h>
#include <immintrin.h>
#include "nrLDPC_defs.h"
#include "nrLDPCdecoder_defs.h"
#include "nrLDPC_types.h"
#include "nrLDPC_init.h"
#include "nrLDPC_mPass.h"
@@ -39,7 +39,7 @@
#include "nrLDPC_bnProc.h"
#define NR_LDPC_ENABLE_PARITY_CHECK
//#define NR_LDPC_PROFILER_DETAIL
#define NR_LDPC_PROFILER_DETAIL
#ifdef NR_LDPC_DEBUG_MODE
#include "nrLDPC_tools/nrLDPC_debug.h"
@@ -47,7 +47,7 @@
static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, t_nrLDPC_procBuf* p_procBuf, uint32_t numLLR, t_nrLDPC_lut* p_lut, t_nrLDPC_dec_params* p_decParams, t_nrLDPC_time_stats* p_profiler);
int32_t nrLDPC_decoder(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out, t_nrLDPC_procBuf* p_procBuf, t_nrLDPC_time_stats* p_profiler)
int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out, t_nrLDPC_procBuf* p_procBuf, t_nrLDPC_time_stats* p_profiler)
{
uint32_t numLLR;
uint32_t numIter = 0;
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.h
-46
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@@ -1,46 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*!\file nrLDPC_decoder.h
* \brief Defines the LDPC decoder core prototypes
* \author Sebastian Wagner (TCL Communications) Email: <mailto:sebastian.wagner@tcl.com>
* \date 27-03-2018
* \version 1.0
* \note
* \warning
*/
#ifndef __NR_LDPC_DECODER__H__
#define __NR_LDPC_DECODER__H__
#include "nrLDPC_types.h"
#include "nrLDPC_init_mem.h"
/**
\brief LDPC decoder
\param p_decParams LDPC decoder parameters
\param p_llr Input LLRs
\param p_llrOut Output vector
\param p_profiler LDPC profiler statistics
*/
int32_t nrLDPC_decoder(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_llrOut, t_nrLDPC_procBuf* p_procBuf, t_nrLDPC_time_stats* p_profiler);
#endif
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_defs.h
-201
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@@ -1,201 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*!\file nrLDPC_defs.h
* \brief Defines all constants and buffers for the LDPC decoder
* \author Sebastian Wagner (TCL Communications) Email: <mailto:sebastian.wagner@tcl.com>
* \date 27-03-2018
* \version 1.0
* \note
* \warning
*/
#ifndef __NR_LDPC_DEFS__H__
#define __NR_LDPC_DEFS__H__
// ==============================================================================
// DEFINES
/** Maximum lifting size */
#define NR_LDPC_ZMAX 384
/** Number of columns in BG1 */
#define NR_LDPC_NCOL_BG1 68
/** Number of rows in BG1 */
#define NR_LDPC_NROW_BG1 46
/** Number of edges/entries in BG1 */
#define NR_LDPC_NUM_EDGE_BG1 316
/** Number of check node (CN) groups in BG1
A CN group is defined by its number of connected bit nodes. */
#define NR_LDPC_NUM_CN_GROUPS_BG1 9
/** First column in BG1 that is connected to only a single CN */
#define NR_LDPC_START_COL_PARITY_BG1 26
/** Number of columns in BG1 for rate 1/3 = 22/(68-2) */
#define NR_LDPC_NCOL_BG1_R13 NR_LDPC_NCOL_BG1
/** Number of columns in BG1 for rate 2/3 = 22/(35-2) */
#define NR_LDPC_NCOL_BG1_R23 35
/** Number of columns in BG1 for rate 8/9 ~ 22/(27-2) */
#define NR_LDPC_NCOL_BG1_R89 27
/** Number of bit node (BN) groups in BG1 for rate 1/3
A BN group is defined by its number of connected CNs. */
#define NR_LDPC_NUM_BN_GROUPS_BG1_R13 30
/** Number of bit node (BN) groups in BG1 for rate 2/3 */
#define NR_LDPC_NUM_BN_GROUPS_BG1_R23 8
/** Number of bit node (BN) groups in BG1 for rate 8/9 */
#define NR_LDPC_NUM_BN_GROUPS_BG1_R89 5
/** Number of columns in BG2 */
#define NR_LDPC_NCOL_BG2 52
/** Number of rows in BG2 */
#define NR_LDPC_NROW_BG2 42
/** Number of edges/entries in BG2 */
#define NR_LDPC_NUM_EDGE_BG2 197
/** Number of check node (CN) groups in BG2
A CN group is defined by its number of connected bit nodes. */
#define NR_LDPC_NUM_CN_GROUPS_BG2 6
/** First column in BG2 that is connected to only a single CN */
#define NR_LDPC_START_COL_PARITY_BG2 14
/** Number of columns in BG2 for rate 1/5 = 10/(52-2) */
#define NR_LDPC_NCOL_BG2_R15 NR_LDPC_NCOL_BG2
/** Number of columns in BG2 for rate 1/3 = 10/(32-2) */
#define NR_LDPC_NCOL_BG2_R13 32
/** Number of columns in BG2 for rate 2/3 = 10/(17-2) */
#define NR_LDPC_NCOL_BG2_R23 17
/** Number of bit node (BN) groups in BG2 for rate 1/5
A BN group is defined by its number of connected CNs. */
#define NR_LDPC_NUM_BN_GROUPS_BG2_R15 23
/** Number of bit node (BN) groups in BG2 for rate 1/3 */
#define NR_LDPC_NUM_BN_GROUPS_BG2_R13 10
/** Number of bit node (BN) groups in BG2 for rate 2/3 */
#define NR_LDPC_NUM_BN_GROUPS_BG2_R23 6
/** Worst case size of the CN processing buffer */
#define NR_LDPC_SIZE_CN_PROC_BUF NR_LDPC_NUM_EDGE_BG1*NR_LDPC_ZMAX
/** Worst case size of the BN processing buffer */
#define NR_LDPC_SIZE_BN_PROC_BUF NR_LDPC_NUM_EDGE_BG1*NR_LDPC_ZMAX
/** Maximum number of possible input LLR = NR_LDPC_NCOL_BG1*NR_LDPC_ZMAX */
#define NR_LDPC_MAX_NUM_LLR 26112
// ==============================================================================
// GLOBAL CONSTANT VARIABLES
/** Start addresses for the cnProcBuf for each CN group in BG1*/
static const uint32_t lut_startAddrCnGroups_BG1[NR_LDPC_NUM_CN_GROUPS_BG1] = {0, 1152, 8832, 43392, 61824, 75264, 81408, 88320, 92160};
/** Start addresses for the cnProcBuf for each CN group in BG2*/
static const uint32_t lut_startAddrCnGroups_BG2[NR_LDPC_NUM_CN_GROUPS_BG2] = {0, 6912, 37632, 54912, 61824, 67968};
/** Number of BNs of CN group for BG1.
E.g. 10 means that there is a CN group where every CN is connected to 10 BNs */
static const uint8_t lut_numBnInCnGroups_BG1_R13[NR_LDPC_NUM_CN_GROUPS_BG1] = {3, 4, 5, 6, 7, 8, 9, 10, 19};
/** Number of rows/CNs in every CN group for rate = 1/3 BG1, e.g. 5 rows of CNs connected to 4 BNs */
static const uint8_t lut_numCnInCnGroups_BG1_R13[NR_LDPC_NUM_CN_GROUPS_BG1] = {1, 5, 18, 8, 5, 2, 2, 1, 4};
/** Number of rows/CNs in every CN group for rate = 2/3 BG1, e.g. 3 rows of CNs connected to 7 BNs */
static const uint8_t lut_numCnInCnGroups_BG1_R23[NR_LDPC_NUM_CN_GROUPS_BG1] = {1, 0, 0, 0, 3, 2, 2, 1, 4};
/** Number of rows/CNs in every CN group for rate = 8/9 BG1, e.g. 4 rows of CNs connected to 19 BNs */
static const uint8_t lut_numCnInCnGroups_BG1_R89[NR_LDPC_NUM_CN_GROUPS_BG1] = {1, 0, 0, 0, 0, 0, 0, 0, 4};
/** Number of connected BNs for every column in BG1 rate = 1/3, e.g. in first column all BNs are connected to 30 CNs */
static const uint8_t lut_numEdgesPerBn_BG1_R13[NR_LDPC_START_COL_PARITY_BG1] = {30, 28, 7, 11, 9, 4, 8, 12, 8, 7, 12, 10, 12, 11, 10, 7, 10, 10, 13, 7, 8, 11, 12, 5, 6, 6};
/** Number of connected BNs for every column in BG1 rate = 2/3, e.g. in first column all BNs are connected to 12 CNs */
static const uint8_t lut_numEdgesPerBn_BG1_R23[NR_LDPC_START_COL_PARITY_BG1] = {12, 11, 4, 5, 5, 3, 4, 5, 5, 3, 6, 6, 6, 6, 5, 3, 6, 5, 6, 4, 5, 6, 6, 3, 3, 2};
/** Number of connected BNs for every column in BG1 rate = 8/9, e.g. in first column all BNs are connected to 5 CNs */
static const uint8_t lut_numEdgesPerBn_BG1_R89[NR_LDPC_START_COL_PARITY_BG1] = {5, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2};
/** Number of BNs of CN group for BG2.
E.g. 3 means that there is a CN group where every CN is connected to 3 BNs */
static const uint8_t lut_numBnInCnGroups_BG2_R15[NR_LDPC_NUM_CN_GROUPS_BG2] = {3, 4, 5, 6, 8, 10};
/** Number of rows/CNs in every CN group for rate = 1/5 BG2, e.g. 6 rows of CNs connected to 3 BNs */
static const uint8_t lut_numCnInCnGroups_BG2_R15[NR_LDPC_NUM_CN_GROUPS_BG2] = {6, 20, 9, 3, 2, 2};
/** Number of rows/CNs in every CN group for rate = 1/3 BG2, e.g. 8 rows of CNs connected to 4 BNs */
static const uint8_t lut_numCnInCnGroups_BG2_R13[NR_LDPC_NUM_CN_GROUPS_BG2] = {0, 8, 7, 3, 2, 2};
/** Number of rows/CNs in every CN group for rate = 2/3 BG2, e.g. 1 row of CNs connected to 4 BNs */
static const uint8_t lut_numCnInCnGroups_BG2_R23[NR_LDPC_NUM_CN_GROUPS_BG2] = {0, 1, 0, 2, 2, 2};
/** Number of connected BNs for every column in BG2 rate = 1/5, e.g. in first column all BNs are connected to 22 CNs */
static const uint8_t lut_numEdgesPerBn_BG2_R15[NR_LDPC_START_COL_PARITY_BG2] = {22, 23, 10, 5, 5, 14, 7, 13, 6, 8, 9, 16, 9, 12};
/** Number of connected BNs for every column in BG2 rate = 1/3, e.g. in first column all BNs are connected to 14 CNs */
static const uint8_t lut_numEdgesPerBn_BG2_R13[NR_LDPC_START_COL_PARITY_BG2] = {14, 16, 2, 4, 4, 6, 6, 8, 6, 6, 6, 13, 5, 7};
/** Number of connected BNs for every column in BG2 rate = 2/3, e.g. in first column all BNs are connected to 6 CNs */
static const uint8_t lut_numEdgesPerBn_BG2_R23[NR_LDPC_START_COL_PARITY_BG2] = { 6, 5, 2, 3, 3, 4, 3, 4, 3, 4, 3, 5, 2, 2};
// Number of groups for bit node processing
/** Number of connected CNs for every column/BN in BG1 for rate = 1/3, Worst case is BG1 with up to 30 CNs connected to one BN
E.g. 42 parity BNs connected to single CN */
// BG1: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
static const uint8_t lut_numBnInBnGroups_BG1_R13[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {42, 0, 0, 1, 1, 2, 4, 3, 1, 4, 3, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1};
/** Number of connected CNs for every column/BN in BG1 for rate = 2/3 */
static const uint8_t lut_numBnInBnGroups_BG1_R23[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = { 9, 1, 5, 3, 7, 8, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
/** Number of connected CNs for every column/BN in BG1 for rate = 8/9 */
static const uint8_t lut_numBnInBnGroups_BG1_R89[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = { 1, 3,21, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
/** Number of connected CNs for every column/BN in BG2 for rate = 1/5, Worst case is BG1 with up to 30 CNs connected to one BN
E.g. 38 parity BNs connected to single CN */
// BG2: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
static const uint8_t lut_numBnInBnGroups_BG2_R15[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {38, 0, 0, 0, 2, 1, 1, 1, 2, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0};
/** Number of connected CNs for every column/BN in BG2 for rate = 1/3 */
static const uint8_t lut_numBnInBnGroups_BG2_R13[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {18, 1, 0, 2, 1, 5, 1, 1, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
/** Number of connected CNs for every column/BN in BG2 for rate = 2/3 */
static const uint8_t lut_numBnInBnGroups_BG2_R23[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = { 3, 3, 5, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
// Start addresses for the bnProcBuf for each BN group
// BG1
/** Start address for every BN group within the BN processing buffer for BG1 rate = 1/3 */
static const uint32_t lut_startAddrBnGroups_BG1_R13[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {0, 16128, 17664, 19584, 24192, 34944, 44160, 47616, 62976, 75648, 94080, 99072, 109824};
/** Start address for every BN group within the BN processing buffer for BG1 rate = 2/3 */
static const uint32_t lut_startAddrBnGroups_BG1_R23[NR_LDPC_NUM_BN_GROUPS_BG1_R23] = {0, 3456, 4224, 9984, 14592, 28032, 46464, 50688};
/** Start address for every BN group within the BN processing buffer for BG1 rate = 8/9 */
static const uint32_t lut_startAddrBnGroups_BG1_R89[NR_LDPC_NUM_BN_GROUPS_BG1_R89] = {0, 384, 2688, 26880, 28416};
/** Start address for every BN group within the LLR processing buffer for BG1 rate = 1/3 */
static const uint16_t lut_startAddrBnGroupsLlr_BG1_R13[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {0, 16128, 16512, 16896, 17664, 19200, 20352, 20736, 22272, 23424, 24960, 25344, 25728};
/** Start address for every BN group within the LLR processing buffer for BG1 rate = 2/3 */
static const uint16_t lut_startAddrBnGroupsLlr_BG1_R23[NR_LDPC_NUM_BN_GROUPS_BG1_R23] = {0, 3456, 3840, 5760, 6912, 9600, 12672, 13056};
/** Start address for every BN group within the LLR processing buffer for BG1 rate = 8/9 */
static const uint16_t lut_startAddrBnGroupsLlr_BG1_R89[NR_LDPC_NUM_BN_GROUPS_BG1_R89] = {0, 384, 1536, 9600, 9984};
// BG2
/** Start address for every BN group within the BN processing buffer for BG2 rate = 1/5 */
static const uint32_t lut_startAddrBnGroups_BG2_R15[NR_LDPC_NUM_BN_GROUPS_BG2_R15] = {0, 14592, 18432, 20736, 23424, 26496, 33408, 37248, 41856, 46848, 52224, 58368, 66816};
/** Start address for every BN group within the BN processing buffer for BG2 rate = 1/3 */
static const uint32_t lut_startAddrBnGroups_BG2_R13[NR_LDPC_NUM_BN_GROUPS_BG2_R13] = {0, 6912, 7680, 10752, 12672, 24192, 26880, 29952, 34944, 40320};
/** Start address for every BN group within the BN processing buffer for BG2 rate = 2/3 */
static const uint32_t lut_startAddrBnGroups_BG2_R23[NR_LDPC_NUM_BN_GROUPS_BG2_R23] = {0, 1152, 3456, 9216, 13824, 17664};
/** Start address for every BN group within the LLR processing buffer for BG2 rate = 1/5 */
static const uint16_t lut_startAddrBnGroupsLlr_BG2_R15[NR_LDPC_NUM_BN_GROUPS_BG2_R15] = {0, 14592, 15360, 15744, 16128, 16512, 17280, 17664, 18048, 18432, 18816, 19200, 19584};
/** Start address for every BN group within the LLR processing buffer for BG2 rate = 1/3 */
static const uint16_t lut_startAddrBnGroupsLlr_BG2_R13[NR_LDPC_NUM_BN_GROUPS_BG2_R13] = {0, 6912, 7296, 8064, 8448, 10368, 10752, 11136, 11520, 11904};
/** Start address for every BN group within the LLR processing buffer for BG2 rate = 2/3 */
static const uint16_t lut_startAddrBnGroupsLlr_BG2_R23[NR_LDPC_NUM_BN_GROUPS_BG2_R23] = {0, 1152, 2304, 4224, 5376, 6144};
/** Vector of 32 '1' in int8 for application with AVX2 */
static const int8_t ones256_epi8[32] __attribute__ ((aligned(32))) = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};
/** Vector of 32 '0' in int8 for application with AVX2 */
static const int8_t zeros256_epi8[32] __attribute__ ((aligned(32))) = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
/** Vector of 32 '127' in int8 for application with AVX2 */
static const int8_t maxLLR256_epi8[32] __attribute__ ((aligned(32))) = {127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127};
#endif
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_init.h
+1 -1
View File
@@ -32,7 +32,7 @@
#define __NR_LDPC_INIT__H__
#include "nrLDPC_lut.h"
#include "nrLDPC_defs.h"
#include "nrLDPCdecoder_defs.h"
/**
\brief Initializes the decoder and sets correct LUTs
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_init_mem.h
-1
View File
@@ -32,7 +32,6 @@
#define __NR_LDPC_INIT_MEM__H__
#include <stdlib.h>
#include "nrLDPC_defs.h"
#include "nrLDPC_types.h"
#ifndef malloc32_clear
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_mPass.h
+3 -18
View File
@@ -32,7 +32,7 @@
#define __NR_LDPC_MPASS__H__
#include <string.h>
#include "nrLDPC_defs.h"
#include "nrLDPCdecoder_defs.h"
/**
\brief Circular memcpy
@@ -521,7 +521,6 @@ static inline void nrLDPC_cn2bnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<3; j++)
{
p_cnProcBufRes = &cnProcBufRes[lut_startAddrCnGroups[0] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[0]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG3[j][i] + lut_bnPosBnProcBuf_CNG3[j][i]*Z;
@@ -673,7 +672,6 @@ static inline void nrLDPC_cn2bnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<3; j++)
{
p_cnProcBufRes = &cnProcBufRes[lut_startAddrCnGroups[0] + j*bitOffsetInGroup];
nrLDPC_inv_circ_memcpy(&bnProcBuf[lut_startAddrBnProcBuf_CNG3[j][0]],p_cnProcBufRes,Z,lut_circShift_CNG3[j][0]);
}
@@ -867,7 +865,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<2; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[0] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[0]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG3[j][i] + lut_bnPosBnProcBuf_CNG3[j][i]*Z;
@@ -884,7 +881,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<3; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[1] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[1]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG4[j][i] + lut_bnPosBnProcBuf_CNG4[j][i]*Z;
@@ -901,7 +897,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<4; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[2] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[2]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG5[j][i] + lut_bnPosBnProcBuf_CNG5[j][i]*Z;
@@ -918,7 +913,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<5; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[3] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[3]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG6[j][i] + lut_bnPosBnProcBuf_CNG6[j][i]*Z;
@@ -931,7 +925,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
// CN group with 8 BNs
bitOffsetInGroup = lut_numCnInCnGroups_BG2_R15[4]*NR_LDPC_ZMAX;
for (j=0; j<8; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[4] + j*bitOffsetInGroup];
@@ -952,7 +945,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<10; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[5] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[5]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG10[j][i] + lut_bnPosBnProcBuf_CNG10[j][i]*Z;
@@ -962,6 +954,7 @@ static inline void nrLDPC_bn2cnProcBuf_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
}
}
/**
\brief Copies the values in the BN processing results buffer to their corresponding place in the CN processing buffer for BG1.
\param p_lut Pointer to decoder LUTs
@@ -1019,10 +1012,9 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
bitOffsetInGroup = lut_numCnInCnGroups_BG1_R13[0]*NR_LDPC_ZMAX;
for (j=0; j<2; j++)
for (j=0;j<2; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[0] + j*bitOffsetInGroup];
nrLDPC_circ_memcpy(p_cnProcBuf, &bnProcBufRes[lut_startAddrBnProcBuf_CNG3[j][0]], Z, lut_circShift_CNG3[j][0]);
}
@@ -1034,7 +1026,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<3; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[1] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[1]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG4[j][i] + lut_bnPosBnProcBuf_CNG4[j][i]*Z;
@@ -1051,7 +1042,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<4; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[2] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[2]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG5[j][i] + lut_bnPosBnProcBuf_CNG5[j][i]*Z;
@@ -1068,7 +1058,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<5; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[3] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[3]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG6[j][i] + lut_bnPosBnProcBuf_CNG6[j][i]*Z;
@@ -1102,7 +1091,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<7; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[5] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[5]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG8[j][i] + lut_bnPosBnProcBuf_CNG8[j][i]*Z;
@@ -1119,7 +1107,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<8; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[6] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[6]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG9[j][i] + lut_bnPosBnProcBuf_CNG9[j][i]*Z;
@@ -1136,7 +1123,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<9; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[7] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[7]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG10[j][i] + lut_bnPosBnProcBuf_CNG10[j][i]*Z;
@@ -1153,7 +1139,6 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf
for (j=0; j<19; j++)
{
p_cnProcBuf = &cnProcBuf[lut_startAddrCnGroups[8] + j*bitOffsetInGroup];
for (i=0; i<lut_numCnInCnGroups[8]; i++)
{
idxBn = lut_startAddrBnProcBuf_CNG19[j][i] + lut_bnPosBnProcBuf_CNG19[j][i]*Z;
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h
+3 -2
View File
@@ -32,8 +32,7 @@
#define __NR_LDPC_TYPES__H__
#include "PHY/TOOLS/time_meas.h"
#include "nrLDPC_defs.h"
#include "nrLDPCdecoder_defs.h"
// ==============================================================================
// TYPES
@@ -103,4 +102,6 @@ typedef struct nrLDPC_procBuf {
int8_t* llrProcBuf; /**< LLR processing buffer */
} t_nrLDPC_procBuf;
#endif
openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu
-10
View File
@@ -1,13 +1,3 @@
/*! \file PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu
* \brief LDPC implementation on Quadro p5000 by NCTU OpinCommect
* \author NCTU OpinConnect Terng-Yin Hsu/Yu-Chi Liang/Kai-Tai Yang/Yan-Bo Lin
* \email tyhsu@cs.nctu.edu.tw
* \date 13-05-2020
* \version
* \note
* \warning
*/
#include <stdio.h>
#include <unistd.h>
#include <cuda_runtime.h>
openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.h
+2 -12
View File
@@ -4,23 +4,13 @@
#include "nrLDPC_types.h"
#include "nrLDPC_init_mem.h"
/*! \file PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.h
* \brief LDPC implementation on Quadro p5000 by NCTU OpinCommect
* \author NCTU OpinConnect Terng-Yin Hsu/Yu-Chi Liang/Kai-Tai Yang/Yan-Bo Lin
* \email tyhsu@cs.nctu.edu.tw
* \date 13-05-2020
* \version
* \note
* \warning
*/
/**
/***
\brief LDPC decoder
\param p_decParams LDPC decoder parameters
\param p_llr Input LLRs
\param p_llrOut Output vector
\param p_profiler LDPC profiler statistics
*/
****/
int32_t nrLDPC_decoder_LYC(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out, int block_length, time_stats_t *time_decoder);
openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_defs.h
+1 -11
View File
@@ -19,16 +19,6 @@
* contact@openairinterface.org
*/
/*! \file PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_defs.h
* \brief LDPC implementation on Quadro p5000 by NCTU OpinCommect
* \author NCTU OpinConnect Terng-Yin Hsu/Yu-Chi Liang/Kai-Tai Yang/Yan-Bo Lin
* \email tyhsu@cs.nctu.edu.tw
* \date 13-05-2020
* \version
* \note
* \warning
*/
/*!\file nrLDPC_defs.h
* \brief Defines all constants and buffers for the LDPC decoder
* \author Sebastian Wagner (TCL Communications) Email: <mailto:sebastian.wagner@tcl.com>
@@ -36,7 +26,7 @@
* \version 1.0
* \note
* \warning
*/
* */
#ifndef __NR_LDPC_DEFS__H__
#define __NR_LDPC_DEFS__H__
openair1/PHY/CODING/nrLDPC_encoder/defs.h
-54
View File
@@ -1,54 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*!\file defs.h
* \brief LDPC encoder forward declarations
* \author Florian Kaltenberger, Raymond Knopp, Kien le Trung (Eurecom)
* \email openair_tech@eurecom.fr
* \date 27-03-2018
* \version 1.0
* \note
* \warning
*/
#include "PHY/TOOLS/time_meas.h"
/*ldpc_encoder.c*/
int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb,short block_length);
/*ldpc_encoder2.c*/
void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,short Kb);
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,int Zc,int Kb,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,int Zc,int Kb,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **channel_input,int Zc,int Kb,short block_length, short BG, int n_segments,unsigned int macro_num, time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
/*ldpc_generate_coefficient.c*/
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,int Zc,int Kb,short block_length,short BG,unsigned char gen_code);
/*
int encode_parity_check_part(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb);
int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb,short block_length);
int ldpc_encoder(unsigned char *test_input,unsigned char *channel_input,short block_length, double rate);
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,int nom_rate,int denom_rate,unsigned char gen_code);
int ldpc_encoder_multi_segment(unsigned char **test_input,unsigned char **channel_input,short block_length,double rate,uint8_t n_segments);
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,int nom_rate,int denom_rate,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,int nom_rate,int denom_rate,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
*/
openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder.c
+211 -41
View File
@@ -37,77 +37,247 @@
#include <string.h>
#include <types.h>
#include "defs.h"
#include "assertions.h"
#include "openair1/PHY/CODING/nrLDPC_defs.h"
#include "ldpc_generate_coefficient.c"
short *choose_generator_matrix(short BG,short Zc);
extern short no_shift_values_BG1[1012],pointer_shift_values_BG1[1012],no_shift_values_BG2[2109],pointer_shift_values_BG2[2019];
int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb,short block_length)
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,int Zc,int Kb,short block_length, short BG,unsigned char gen_code)
{
short *Gen_shift_values=choose_generator_matrix(BG,Zc);
short *no_shift_values, *pointer_shift_values;
int no_punctured_columns;
short nrows,ncols,rate=3;
int i1,i2,i3,i4,i5,temp_prime;
unsigned char c[22*384]; //padded input, unpacked, max size
unsigned char d[68*384]; //coded output, unpacked, max size
unsigned char channel_temp,temp;
short *Gen_shift_values, *no_shift_values, *pointer_shift_values;
short nrows = 46;//parity check bits
short ncols = 22;//info bits
int i,i1,i2,i3,i4,i5,temp_prime,var;
int no_punctured_columns,removed_bit,rate=3;
int nind=0;
int indlist[1000];
int indlist2[1000];
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
{
nrows=46; //parity check bits
ncols=22; //info bits
rate=3;
}
//else if (block_length<=3840)
else if (BG==2)
{
//BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
rate=5;
}
Gen_shift_values=choose_generator_matrix(BG,Zc);
if (Gen_shift_values==NULL) {
printf("ldpc_encoder_orig: could not find generator matrix\n");
return(-1);
}
//printf("ldpc_encoder_orig: BG %d, Zc %d, Kb %d\n",BG, Zc, Kb);
// load base graph of generator matrix
if (BG==1)
{
no_shift_values=(short *) no_shift_values_BG1;
pointer_shift_values=(short *) pointer_shift_values_BG1;
nrows=46; //parity check bits
ncols=22; //info bits
rate=3;
}
else if (BG==2)
{
no_shift_values=(short *) no_shift_values_BG2;
pointer_shift_values=(short *) pointer_shift_values_BG2;
nrows=42; //parity check bits
ncols=10; //info bits
rate=5;
}
else {
printf("problem with BG\n");
return(-1);
AssertFatal(0,"BG %d is not supported yet\n",BG);
}
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*rate);
//printf("%d\n",no_punctured_columns);
//printf("%d\n",removed_bit);
// unpack input
memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc);
//printf("no_punctured_columns = %d\n",no_punctured_columns);
for (i2=0; i2 < Zc; i2++)
for (i=0; i<block_length; i++)
{
//t=Kb*Zc+i2;
//c[i] = test_input[i/8]<<(i%8);
//c[i]=c[i]>>7&1;
c[i]=(test_input[i/8]&(128>>(i&7)))>>(7-(i&7));
}
//rotate matrix here
for (i5=0; i5 < Kb; i5++)
{
temp = c[i5*Zc];
memmove(&c[i5*Zc], &c[i5*Zc+1], (Zc-1)*sizeof(unsigned char));
c[i5*Zc+Zc-1] = temp;
// parity check part
if (gen_code==1)
{
char fname[100];
sprintf(fname,"ldpc_BG%d_Zc%d_byte.c",BG,Zc);
FILE *fd=fopen(fname,"w");
AssertFatal(fd!=NULL,"cannot open %s\n",fname);
sprintf(fname,"ldpc_BG%d_Zc%d_16bit.c",BG,Zc);
FILE *fd2=fopen(fname,"w");
AssertFatal(fd2!=NULL,"cannot open %s\n",fname);
int shift;
char data_type[100];
char xor_command[100];
int mask;
fprintf(fd,"#include \"PHY/sse_intrin.h\"\n");
fprintf(fd2,"#include \"PHY/sse_intrin.h\"\n");
if ((Zc&31)==0) {
shift=5; // AVX2 - 256-bit SIMD
mask=31;
strcpy(data_type,"__m256i");
strcpy(xor_command,"_mm256_xor_si256");
}
else if ((Zc&15)==0) {
shift=4; // SSE4 - 128-bit SIMD
mask=15;
strcpy(data_type,"__m128i");
strcpy(xor_command,"_mm_xor_si128");
// calculate each row in base graph
for (i1=0; i1 < nrows-no_punctured_columns; i1++)
}
else if ((Zc&7)==0) {
shift=3; // MMX - 64-bit SIMD
mask=7;
strcpy(data_type,"__m64");
strcpy(xor_command,"_mm_xor_si64");
}
else {
shift=0; // no SIMD
mask=0;
strcpy(data_type,"uint8_t");
strcpy(xor_command,"scalar_xor");
fprintf(fd,"#define scalar_xor(a,b) ((a)^(b))\n");
fprintf(fd2,"#define scalar_xor(a,b) ((a)^(b))\n");
}
fprintf(fd,"// generated code for Zc=%d, byte encoding\n",Zc);
fprintf(fd2,"// generated code for Zc=%d, 16bit encoding\n",Zc);
fprintf(fd,"static inline void ldpc_BG%d_Zc%d_byte(uint8_t *c,uint8_t *d) {\n",BG,Zc);
fprintf(fd2,"static inline void ldpc_BG%d_Zc%d_16bit(uint16_t *c,uint16_t *d) {\n",BG,Zc);
fprintf(fd," %s *csimd=(%s *)c,*dsimd=(%s *)d;\n\n",data_type,data_type,data_type);
fprintf(fd2," %s *csimd=(%s *)c,*dsimd=(%s *)d;\n\n",data_type,data_type,data_type);
fprintf(fd," %s *c2,*d2;\n\n",data_type);
fprintf(fd2," %s *c2,*d2;\n\n",data_type);
fprintf(fd," int i2;\n");
fprintf(fd2," int i2;\n");
fprintf(fd," for (i2=0; i2<%d; i2++) {\n",Zc>>shift);
if (shift > 0)
fprintf(fd2," for (i2=0; i2<%d; i2++) {\n",Zc>>(shift-1));
for (i2=0; i2 < 1; i2++)
{
channel_temp=0;
for (i3=0; i3 < Kb; i3++)
{
temp_prime=i1 * ncols + i3;
//t=Kb*Zc+i2;
// calculate each row in base graph
for (i4=0; i4 < no_shift_values[temp_prime]; i4++)
fprintf(fd," c2=&csimd[i2];\n");
fprintf(fd," d2=&dsimd[i2];\n");
fprintf(fd2," c2=&csimd[i2];\n");
fprintf(fd2," d2=&dsimd[i2];\n");
for (i1=0; i1 < nrows; i1++)
{
channel_temp=0;
fprintf(fd,"\n//row: %d\n",i1);
fprintf(fd2,"\n//row: %d\n",i1);
fprintf(fd," d2[%d]=",(Zc*i1)>>shift);
fprintf(fd2," d2[%d]=",(Zc*i1)>>(shift-1));
nind=0;
for (i3=0; i3 < ncols; i3++)
{
channel_temp = channel_temp ^ c[ i3*Zc + Gen_shift_values[ pointer_shift_values[temp_prime]+i4 ] ];
temp_prime=i1 * ncols + i3;
for (i4=0; i4 < no_shift_values[temp_prime]; i4++)
{
var=(int)((i3*Zc + (Gen_shift_values[ pointer_shift_values[temp_prime]+i4 ]+1)%Zc)/Zc);
int index =var*2*Zc + (i3*Zc + (Gen_shift_values[ pointer_shift_values[temp_prime]+i4 ]+1)%Zc) % Zc;
indlist[nind] = ((index&mask)*((2*Zc)>>shift)*Kb)+(index>>shift);
indlist2[nind++] = ((index&(mask>>1))*((2*Zc)>>(shift-1))*Kb)+(index>>(shift-1));
}
}
for (i4=0;i4<nind-1;i4++) {
fprintf(fd,"%s(c2[%d],",xor_command,indlist[i4]);
fprintf(fd2,"%s(c2[%d],",xor_command,indlist2[i4]);
}
fprintf(fd,"c2[%d]",indlist[i4]);
fprintf(fd2,"c2[%d]",indlist2[i4]);
for (i4=0;i4<nind-1;i4++) { fprintf(fd,")"); fprintf(fd2,")"); }
fprintf(fd,";\n");
fprintf(fd2,";\n");
}
fprintf(fd," }\n}\n");
fprintf(fd2," }\n}\n");
}
fclose(fd);
fclose(fd2);
}
else if(gen_code==0)
{
for (i2=0; i2 < Zc; i2++)
{
//t=Kb*Zc+i2;
//rotate matrix here
for (i5=0; i5 < Kb; i5++)
{
temp = c[i5*Zc];
memmove(&c[i5*Zc], &c[i5*Zc+1], (Zc-1)*sizeof(unsigned char));
c[i5*Zc+Zc-1] = temp;
}
// calculate each row in base graph
for (i1=0; i1 < nrows-no_punctured_columns; i1++)
{
channel_temp=0;
for (i3=0; i3 < Kb; i3++)
{
temp_prime=i1 * ncols + i3;
for (i4=0; i4 < no_shift_values[temp_prime]; i4++)
{
channel_temp = channel_temp ^ c[ i3*Zc + Gen_shift_values[ pointer_shift_values[temp_prime]+i4 ] ];
}
}
d[i2+i1*Zc]=channel_temp;
//channel_input[t+i1*Zc]=channel_temp;
}
d[i2+i1*Zc]=channel_temp;
//channel_input[t+i1*Zc]=channel_temp;
}
}
return(0);
// information part and puncture columns
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char));
//memcpy(channel_input,c,Kb*Zc*sizeof(unsigned char));
return 0;
}
int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc,int Kb,short block_length, short BG, encoder_implemparams_t *impp) {
return ldpc_encoder_orig(test_input[0],channel_input[0],Zc,Kb,block_length,BG,impp->gen_code);
}
openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
+5 -5
View File
@@ -487,10 +487,10 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
macro_segment = 8*macro_num;
// macro_segment_end = (n_segments > 8*(macro_num+1)) ? 8*(macro_num+1) : n_segments;
macro_segment_end = macro_segment + (n_segments > 8 ? 8 : n_segments);
///printf("macro_segment: %d\n", macro_segment);
///printf("macro_segment_end: %d\n", macro_segment_end );
macro_segment_end = (n_segments > 8*(macro_num+1)) ? 8*(macro_num+1) : n_segments;
//macro_segment_end = macro_segment + (n_segments > 8 ? 8 : n_segments);
//printf("macro_segment: %d\n", macro_segment);
//printf("macro_segment_end: %d\n", macro_segment_end );
#ifdef __AVX2__
__m256i shufmask = _mm256_set_epi64x(0x0303030303030303, 0x0202020202020202,0x0101010101010101, 0x0000000000000000);
@@ -564,7 +564,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
for (i=0; i<block_length>>5; i++) {
c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]);
//for (j=1; j<n_segments; j++) {
for (j=macro_segment+1; j < macro_segment_end; j++) {
for (j=macro_segment+1; j < macro_segment_end; j++) {
c256 = _mm256_or_si256(_mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[j])[i]), shufmask),andmask),zero256),masks[j-macro_segment]),c256);
}
((__m256i *)c)[i] = c256;
openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
+38 -206
View File
@@ -35,9 +35,8 @@
#include <string.h>
#include "Gen_shift_value.h"
#include "assertions.h"
#include "defs.h"
short *choose_generator_matrix(short BG,short Zc)
static inline short *choose_generator_matrix(short BG,short Zc)
{
short *Gen_shift_values = NULL;
@@ -361,237 +360,70 @@ short *choose_generator_matrix(short BG,short Zc)
return Gen_shift_values;
}
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,int Zc,int Kb,short block_length, short BG,unsigned char gen_code)
static inline int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb,short block_length)
{
unsigned char c[22*384]; //padded input, unpacked, max size
unsigned char d[68*384]; //coded output, unpacked, max size
short *Gen_shift_values=choose_generator_matrix(BG,Zc);
short *no_shift_values, *pointer_shift_values;
int no_punctured_columns;
short nrows,ncols,rate=3;
int i1,i2,i3,i4,i5,temp_prime;
unsigned char channel_temp,temp;
short *Gen_shift_values, *no_shift_values, *pointer_shift_values;
short nrows = 46;//parity check bits
short ncols = 22;//info bits
int i,i1,i2,i3,i4,i5,temp_prime,var;
int no_punctured_columns,removed_bit,rate=3;
int nind=0;
int indlist[1000];
int indlist2[1000];
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
{
nrows=46; //parity check bits
ncols=22; //info bits
rate=3;
}
//else if (block_length<=3840)
else if (BG==2)
{
//BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
rate=5;
}
Gen_shift_values=choose_generator_matrix(BG,Zc);
if (Gen_shift_values==NULL) {
printf("ldpc_encoder_orig: could not find generator matrix\n");
return(-1);
}
//printf("ldpc_encoder_orig: BG %d, Zc %d, Kb %d\n",BG, Zc, Kb);
// load base graph of generator matrix
if (BG==1)
{
no_shift_values=(short *) no_shift_values_BG1;
pointer_shift_values=(short *) pointer_shift_values_BG1;
nrows=46; //parity check bits
ncols=22; //info bits
rate=3;
}
else if (BG==2)
{
no_shift_values=(short *) no_shift_values_BG2;
pointer_shift_values=(short *) pointer_shift_values_BG2;
nrows=42; //parity check bits
ncols=10; //info bits
rate=5;
}
else {
AssertFatal(0,"BG %d is not supported yet\n",BG);
printf("problem with BG\n");
return(-1);
}
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*rate);
//printf("%d\n",no_punctured_columns);
//printf("%d\n",removed_bit);
// unpack input
memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc);
for (i=0; i<block_length; i++)
//printf("no_punctured_columns = %d\n",no_punctured_columns);
for (i2=0; i2 < Zc; i2++)
{
//c[i] = test_input[i/8]<<(i%8);
//c[i]=c[i]>>7&1;
c[i]=(test_input[i/8]&(128>>(i&7)))>>(7-(i&7));
}
//t=Kb*Zc+i2;
// parity check part
if (gen_code==1)
{
char fname[100];
sprintf(fname,"ldpc_BG%d_Zc%d_byte.c",BG,Zc);
FILE *fd=fopen(fname,"w");
AssertFatal(fd!=NULL,"cannot open %s\n",fname);
sprintf(fname,"ldpc_BG%d_Zc%d_16bit.c",BG,Zc);
FILE *fd2=fopen(fname,"w");
AssertFatal(fd2!=NULL,"cannot open %s\n",fname);
int shift;
char data_type[100];
char xor_command[100];
int mask;
fprintf(fd,"#include \"PHY/sse_intrin.h\"\n");
fprintf(fd2,"#include \"PHY/sse_intrin.h\"\n");
if ((Zc&31)==0) {
shift=5; // AVX2 - 256-bit SIMD
mask=31;
strcpy(data_type,"__m256i");
strcpy(xor_command,"_mm256_xor_si256");
}
else if ((Zc&15)==0) {
shift=4; // SSE4 - 128-bit SIMD
mask=15;
strcpy(data_type,"__m128i");
strcpy(xor_command,"_mm_xor_si128");
}
else if ((Zc&7)==0) {
shift=3; // MMX - 64-bit SIMD
mask=7;
strcpy(data_type,"__m64");
strcpy(xor_command,"_mm_xor_si64");
}
else {
shift=0; // no SIMD
mask=0;
strcpy(data_type,"uint8_t");
strcpy(xor_command,"scalar_xor");
fprintf(fd,"#define scalar_xor(a,b) ((a)^(b))\n");
fprintf(fd2,"#define scalar_xor(a,b) ((a)^(b))\n");
}
fprintf(fd,"// generated code for Zc=%d, byte encoding\n",Zc);
fprintf(fd2,"// generated code for Zc=%d, 16bit encoding\n",Zc);
fprintf(fd,"static inline void ldpc_BG%d_Zc%d_byte(uint8_t *c,uint8_t *d) {\n",BG,Zc);
fprintf(fd2,"static inline void ldpc_BG%d_Zc%d_16bit(uint16_t *c,uint16_t *d) {\n",BG,Zc);
fprintf(fd," %s *csimd=(%s *)c,*dsimd=(%s *)d;\n\n",data_type,data_type,data_type);
fprintf(fd2," %s *csimd=(%s *)c,*dsimd=(%s *)d;\n\n",data_type,data_type,data_type);
fprintf(fd," %s *c2,*d2;\n\n",data_type);
fprintf(fd2," %s *c2,*d2;\n\n",data_type);
fprintf(fd," int i2;\n");
fprintf(fd2," int i2;\n");
fprintf(fd," for (i2=0; i2<%d; i2++) {\n",Zc>>shift);
if (shift > 0)
fprintf(fd2," for (i2=0; i2<%d; i2++) {\n",Zc>>(shift-1));
for (i2=0; i2 < 1; i2++)
//rotate matrix here
for (i5=0; i5 < Kb; i5++)
{
//t=Kb*Zc+i2;
// calculate each row in base graph
fprintf(fd," c2=&csimd[i2];\n");
fprintf(fd," d2=&dsimd[i2];\n");
fprintf(fd2," c2=&csimd[i2];\n");
fprintf(fd2," d2=&dsimd[i2];\n");
for (i1=0; i1 < nrows; i1++)
{
channel_temp=0;
fprintf(fd,"\n//row: %d\n",i1);
fprintf(fd2,"\n//row: %d\n",i1);
fprintf(fd," d2[%d]=",(Zc*i1)>>shift);
fprintf(fd2," d2[%d]=",(Zc*i1)>>(shift-1));
nind=0;
for (i3=0; i3 < ncols; i3++)
{
temp_prime=i1 * ncols + i3;
for (i4=0; i4 < no_shift_values[temp_prime]; i4++)
{
var=(int)((i3*Zc + (Gen_shift_values[ pointer_shift_values[temp_prime]+i4 ]+1)%Zc)/Zc);
int index =var*2*Zc + (i3*Zc + (Gen_shift_values[ pointer_shift_values[temp_prime]+i4 ]+1)%Zc) % Zc;
indlist[nind] = ((index&mask)*((2*Zc)>>shift)*Kb)+(index>>shift);
indlist2[nind++] = ((index&(mask>>1))*((2*Zc)>>(shift-1))*Kb)+(index>>(shift-1));
}
}
for (i4=0;i4<nind-1;i4++) {
fprintf(fd,"%s(c2[%d],",xor_command,indlist[i4]);
fprintf(fd2,"%s(c2[%d],",xor_command,indlist2[i4]);
}
fprintf(fd,"c2[%d]",indlist[i4]);
fprintf(fd2,"c2[%d]",indlist2[i4]);
for (i4=0;i4<nind-1;i4++) { fprintf(fd,")"); fprintf(fd2,")"); }
fprintf(fd,";\n");
fprintf(fd2,";\n");
}
fprintf(fd," }\n}\n");
fprintf(fd2," }\n}\n");
temp = c[i5*Zc];
memmove(&c[i5*Zc], &c[i5*Zc+1], (Zc-1)*sizeof(unsigned char));
c[i5*Zc+Zc-1] = temp;
}
fclose(fd);
fclose(fd2);
}
else if(gen_code==0)
{
for (i2=0; i2 < Zc; i2++)
// calculate each row in base graph
for (i1=0; i1 < nrows-no_punctured_columns; i1++)
{
//t=Kb*Zc+i2;
//rotate matrix here
for (i5=0; i5 < Kb; i5++)
channel_temp=0;
for (i3=0; i3 < Kb; i3++)
{
temp = c[i5*Zc];
memmove(&c[i5*Zc], &c[i5*Zc+1], (Zc-1)*sizeof(unsigned char));
c[i5*Zc+Zc-1] = temp;
}
temp_prime=i1 * ncols + i3;
// calculate each row in base graph
for (i1=0; i1 < nrows-no_punctured_columns; i1++)
{
channel_temp=0;
for (i3=0; i3 < Kb; i3++)
for (i4=0; i4 < no_shift_values[temp_prime]; i4++)
{
temp_prime=i1 * ncols + i3;
for (i4=0; i4 < no_shift_values[temp_prime]; i4++)
{
channel_temp = channel_temp ^ c[ i3*Zc + Gen_shift_values[ pointer_shift_values[temp_prime]+i4 ] ];
}
channel_temp = channel_temp ^ c[ i3*Zc + Gen_shift_values[ pointer_shift_values[temp_prime]+i4 ] ];
}
d[i2+i1*Zc]=channel_temp;
//channel_input[t+i1*Zc]=channel_temp;
}
d[i2+i1*Zc]=channel_temp;
//channel_input[t+i1*Zc]=channel_temp;
}
}
// information part and puncture columns
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char));
//memcpy(channel_input,c,Kb*Zc*sizeof(unsigned char));
return 0;
return(0);
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
+3 -1
View File
@@ -187,7 +187,9 @@ void nr_polar_print_polarParams(t_nrPolar_params *polarParams);
t_nrPolar_params *nr_polar_params (int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level);
uint8_t aggregation_level,
int decoder_flag,
t_nrPolar_params **polarList_ext);
uint16_t nr_polar_aggregation_prime (uint8_t aggregation_level);
openair1/PHY/CODING/nr_compute_tbs.c
-151
View File
@@ -1,151 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* file: nr_compute_tbs.c
purpose: Compute NR TBS
author: Hongzhi WANG (TCL)
*/
#include "PHY/defs_nr_UE.h"
#define INDEX_MAX_TBS_TABLE (93)
//Table 5.1.2.2-2
uint16_t Tbstable_nr[INDEX_MAX_TBS_TABLE] = {24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,208,224,240,256,272,288,304,320,336,352,368,384,408,432,456,480,504,528,552,576,608,640,672,704,736,768,808,848,888,928,984,1032,1064,1128,1160,1192,1224,1256,1288,1320,1352,1416,1480,1544,1608,1672,1736,1800,1864,1928,2024,2088,2152,2216,2280,2408,2472,2536,2600,2664,2728,2792,2856,2976,3104,3240,3368,3496,3624,3752,3824};
uint16_t NPRB_LBRM[7] = {32,66,107,135,162,217,273};
uint32_t nr_compute_tbs(uint16_t Qm,
uint16_t R,
uint16_t nb_rb,
uint16_t nb_symb_sch,
uint16_t nb_dmrs_prb,
uint16_t nb_rb_oh,
uint8_t Nl)
{
uint16_t nbp_re, nb_re;
uint32_t nr_tbs=0;
uint32_t Ninfo, Np_info, C;
uint8_t n, scale;
nbp_re = NR_NB_SC_PER_RB * nb_symb_sch - nb_dmrs_prb - nb_rb_oh;
nb_re = min(156, nbp_re) * nb_rb;
scale = (R>1024)?11:10;
// Intermediate number of information bits
Ninfo = (nb_re * R * Qm * Nl)>>scale;
if (Ninfo <=3824) {
n = max(3, floor(log2(Ninfo)) - 6);
Np_info = max(24, (Ninfo>>n)<<n);
for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
if (Tbstable_nr[i] >= Np_info){
nr_tbs = Tbstable_nr[i];
break;
}
}
}
else {
n = log2(Ninfo-24)-5;
Np_info = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
if (R <= 256) {
C = CEILIDIV((Np_info+24),3816);
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
}
else {
if (Np_info > 8424){
C = CEILIDIV((Np_info+24),8424);
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
}
else {
nr_tbs = ((CEILIDIV((Np_info+24),8))<<3) - 24;
}
}
}
//printf("Ninfo %d nbp_re %d nb_re %d Qm %d, R %d, tbs %d\n", Ninfo, nbp_re, nb_re, Qm, R, nr_tbs);
return nr_tbs;
}
//tbslbrm calculation according to 5.4.2.1 of 38.212
uint32_t nr_compute_tbslbrm(uint16_t table,
uint16_t nb_rb,
uint8_t Nl,
uint8_t C)
{
uint16_t R, nb_re;
uint16_t nb_rb_lbrm=0;
uint8_t Qm;
int i;
uint32_t nr_tbs=0;
uint32_t Ninfo, Np_info;
uint8_t n;
for (i=0; i<7; i++) {
if (NPRB_LBRM[i] >= nb_rb){
nb_rb_lbrm = NPRB_LBRM[i];
break;
}
}
Qm = ((table == 1)? 8 : 6);
R = 948;
nb_re = 156 * nb_rb_lbrm;
// Intermediate number of information bits
Ninfo = (nb_re * R * Qm * Nl)>>10;
if (Ninfo <=3824) {
n = max(3, floor(log2(Ninfo)) - 6);
Np_info = max(24, (Ninfo>>n)<<n);
for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
if (Tbstable_nr[i] >= Np_info){
nr_tbs = Tbstable_nr[i];
break;
}
}
}
else {
n = log2(Ninfo-24)-5;
Np_info = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
if (R <= 256) {
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
}
else {
if (Np_info > 8424){
nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
}
else {
nr_tbs = ((CEILIDIV((Np_info+24),8))<<3) - 24;
}
}
}
return nr_tbs;
}
openair1/PHY/CODING/nr_polar_init.c
+9 -5
View File
@@ -40,7 +40,8 @@ static int intcmp(const void *p1,const void *p2) {
static void nr_polar_init(t_nrPolar_params * *polarParams,
int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level) {
uint8_t aggregation_level,
int decoder_flag) {
t_nrPolar_params *currentPtr = *polarParams;
uint16_t aggregation_prime = nr_polar_aggregation_prime(aggregation_level);
@@ -150,7 +151,7 @@ static void nr_polar_init(t_nrPolar_params * *polarParams,
newPolarInitNode->i_bil,
newPolarInitNode->encoderLength);
free(J);
build_decoder_tree(newPolarInitNode);
if (decoder_flag == 1) build_decoder_tree(newPolarInitNode);
build_polar_tables(newPolarInitNode);
init_polar_deinterleaver_table(newPolarInitNode);
//printf("decoder tree nodes %d\n",newPolarInitNode->tree.num_nodes);
@@ -183,10 +184,13 @@ void nr_polar_print_polarParams(t_nrPolar_params *polarParams) {
t_nrPolar_params *nr_polar_params (int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level) {
uint8_t aggregation_level,
int decoding_flag,
t_nrPolar_params **polarList_ext) {
static t_nrPolar_params *polarList = NULL;
nr_polar_init(&polarList, messageType,messageLength,aggregation_level);
t_nrPolar_params *polarParams=polarList;
nr_polar_init(polarList_ext != NULL ? polarList_ext : &polarList,
messageType,messageLength,aggregation_level,decoding_flag);
t_nrPolar_params *polarParams=polarList_ext != NULL ? *polarList_ext : polarList;
const int tag=messageType * messageLength * nr_polar_aggregation_prime(aggregation_level);
while (polarParams != NULL) {
openair1/PHY/CODING/nr_rate_matching.c
+325 -41
View File
@@ -32,23 +32,281 @@
uint8_t index_k0[2][4] = {{0,17,33,56},{0,13,25,43}};
void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f)
{
uint32_t EQm;
EQm = E/Qm;
memset(f,0,E*sizeof(uint8_t));
uint8_t *e0,*e1,*e2,*e3,*e4,*e5,*e6,*e7;
uint8_t *fp;
#if 0 //def __AVX2__
__m256i tmp0,tmp1,tmp2,tmp0b,tmp1b,tmp3,tmp4,tmp5;
__m256i *e0_256,*e1_256,*e2_256,*e3_256,*e4_256,*e5_256,*e6_256,*e7_256;
for (int j = 0; j< EQm; j++){
for (int i = 0; i< Qm; i++){
f[(i+j*Qm)] = e[(i*EQm + j)];
}
__m256i *f_256=(__m256i *)f;
uint8_t *fp2;
switch(Qm) {
case 2:
e0=e;
e1=e0+EQm;
e0_256=(__m256i *)e0;
e1_256=(__m256i *)e1;
for (int k=0,j=0;j<EQm>>5;j++,k+=2) {
f_256[k] = _mm256_unpacklo_epi8(e0_256[j],e1_256[j]);
f_256[k+1] = _mm256_unpackhi_epi8(e0_256[j],e1_256[j]);
}
break;
case 4:
e0=e;
e1=e0+EQm;
e2=e1+EQm;
e3=e2+EQm;
e0_256=(__m256i *)e0;
e1_256=(__m256i *)e1;
e2_256=(__m256i *)e2;
e3_256=(__m256i *)e3;
for (int k=0,j=0;j<EQm>>5;j++,k+=4) {
tmp0 = _mm256_unpacklo_epi8(e0_256[j],e1_256[j]); // e0(i) e1(i) e0(i+1) e1(i+1) .... e0(i+15) e1(i+15)
tmp1 = _mm256_unpacklo_epi8(e2_256[j],e3_256[j]); // e2(i) e3(i) e2(i+1) e3(i+1) .... e2(i+15) e3(i+15)
f_256[k] = _mm256_unpacklo_epi8(tmp0,tmp1); // e0(i) e1(i) e2(i) e3(i) ... e0(i+7) e1(i+7) e2(i+7) e3(i+7)
f_256[k+1] = _mm256_unpackhi_epi8(tmp0,tmp1); // e0(i+8) e1(i+8) e2(i+8) e3(i+8) ... e0(i+15) e1(i+15) e2(i+15) e3(i+15)
tmp0 = _mm256_unpackhi_epi8(e0_256[j],e1_256[j]); // e0(i+16) e1(i+16) e0(i+17) e1(i+17) .... e0(i+31) e1(i+31)
tmp1 = _mm256_unpackhi_epi8(e2_256[j],e3_256[j]); // e2(i+16) e3(i+16) e2(i+17) e3(i+17) .... e2(i+31) e3(i+31)
f_256[k+2] = _mm256_unpacklo_epi8(tmp0,tmp1);
f_256[k+3] = _mm256_unpackhi_epi8(tmp0,tmp1);
}
break;
case 6:
e0=e;
e1=e0+EQm;
e2=e1+EQm;
e3=e2+EQm;
e4=e3+EQm;
e5=e4+EQm;
e0_256=(__m256i *)e0;
e1_256=(__m256i *)e1;
e2_256=(__m256i *)e2;
e3_256=(__m256i *)e3;
e4_256=(__m256i *)e4;
e5_256=(__m256i *)e5;
for (int j=0,k=0;j<EQm>>5;j++,k+=192) {
fp = f+k;
fp2 = fp+96;
tmp0 = _mm256_unpacklo_epi8(e0_256[j],e1_256[j]); // e0(i) e1(i) e0(i+1) e1(i+1) .... e0(i+15) e1(i+15)
tmp1 = _mm256_unpacklo_epi8(e2_256[j],e3_256[j]); // e2(i) e3(i) e2(i+1) e3(i+1) .... e2(i+15) e3(i+15)
tmp0b = _mm256_unpacklo_epi16(tmp0,tmp1); // e0(i) e1(i) e2(i) e3(i) ... e0(i+7) e1(i+7) e2(i+7) e3(i+7)
tmp1b = _mm256_unpackhi_epi16(tmp0,tmp1); // e0(i+8) e1(i+8) e2(i+8) e3(i+8) ... e0(i+15) e1(i+15) e2(i+15) e3(i+15)
tmp0 = _mm256_unpacklo_epi8(e4_256[j],e5_256[j]); // e4(i) e5(i) e4(i+1) e5(i+1) .... e4(i+15) e5(i+15)
*((uint32_t*)fp) = _mm256_extract_epi32(tmp0b,0);
*((uint16_t*)(fp+4)) = _mm256_extract_epi16(tmp0,0);
*((uint32_t*)(fp+6)) = _mm256_extract_epi32(tmp0b,1);
*((uint16_t*)(fp+10)) = _mm256_extract_epi16(tmp0,1);
*((uint32_t*)(fp+12)) = _mm256_extract_epi32(tmp0b,2);
*((uint16_t*)(fp+16)) = _mm256_extract_epi16(tmp0,2);
*((uint32_t*)(fp+18)) = _mm256_extract_epi32(tmp0b,3);
*((uint16_t*)(fp+22)) = _mm256_extract_epi16(tmp0,3);
*((uint32_t*)(fp+24)) = _mm256_extract_epi32(tmp0b,4);
*((uint16_t*)(fp+26)) = _mm256_extract_epi16(tmp0,4);
*((uint32_t*)(fp+30)) = _mm256_extract_epi32(tmp0b,5);
*((uint16_t*)(fp+34)) = _mm256_extract_epi16(tmp0,5);
*((uint32_t*)(fp+36)) = _mm256_extract_epi32(tmp0,6);
*((uint16_t*)(fp+40)) = _mm256_extract_epi16(tmp0,6);
*((uint32_t*)(fp+42)) = _mm256_extract_epi32(tmp0b,7);
*((uint16_t*)(fp+46)) = _mm256_extract_epi16(tmp0,7);
*((uint32_t*)(fp+48)) = _mm256_extract_epi32(tmp1b,0);
*((uint16_t*)(fp+52)) = _mm256_extract_epi16(tmp0,8);
*((uint32_t*)(fp+56)) = _mm256_extract_epi32(tmp1b,1);
*((uint16_t*)(fp+60)) = _mm256_extract_epi16(tmp0,9);
*((uint32_t*)(fp+62)) = _mm256_extract_epi32(tmp1b,2);
*((uint16_t*)(fp+66)) = _mm256_extract_epi16(tmp0,10);
*((uint32_t*)(fp+68)) = _mm256_extract_epi32(tmp1b,3);
*((uint16_t*)(fp+72)) = _mm256_extract_epi16(tmp0,11);
*((uint32_t*)(fp+74)) = _mm256_extract_epi32(tmp1b,4);
*((uint16_t*)(fp+76)) = _mm256_extract_epi16(tmp0,12);
*((uint32_t*)(fp+80)) = _mm256_extract_epi32(tmp1b,5);
*((uint16_t*)(fp+82)) = _mm256_extract_epi16(tmp0,13);
*((uint32_t*)(fp+86)) = _mm256_extract_epi32(tmp1b,6);
*((uint16_t*)(fp+90)) = _mm256_extract_epi16(tmp0,14);
*((uint32_t*)(fp+92)) = _mm256_extract_epi32(tmp1b,7);
*((uint16_t*)(fp+94)) = _mm256_extract_epi16(tmp0,15);
tmp0 = _mm256_unpackhi_epi8(e0_256[j],e1_256[j]); // e0(i+16) e1(i+16) e0(i+17) e1(i+17) .... e0(i+31) e1(i+31)
tmp1 = _mm256_unpackhi_epi8(e2_256[j],e3_256[j]); // e2(i+16) e3(i+16) e2(i+17) e3(i+17) .... e2(i+31) e3(i+31)
tmp0b = _mm256_unpacklo_epi16(tmp0,tmp1); // e0(i+16) e1(i+16) e2(i+16) e3(i+16) ... e0(i+23) e1(i+23) e2(i+23) e3(i+23)
tmp1b = _mm256_unpackhi_epi16(tmp0,tmp1); // e0(i+24) e1(i+24) e2(i+24) e3(i+24) ... e0(i+31) e1(i+31) e2(i+31) e3(i+31)
tmp0 = _mm256_unpackhi_epi8(e4_256[j],e5_256[j]); // e4(i+16) e5(i+16) e4(i+17) e5(i+17) .... e4(i+31) e5(i+31)
*((uint32_t*)fp2) = _mm256_extract_epi32(tmp0b,0);
*((uint16_t*)(fp2+4)) = _mm256_extract_epi16(tmp0,0);
*((uint32_t*)(fp2+6)) = _mm256_extract_epi32(tmp0b,1);
*((uint16_t*)(fp2+10)) = _mm256_extract_epi16(tmp0,1);
*((uint32_t*)(fp2+12)) = _mm256_extract_epi32(tmp0b,2);
*((uint16_t*)(fp2+16)) = _mm256_extract_epi16(tmp0,2);
*((uint32_t*)(fp2+18)) = _mm256_extract_epi32(tmp0b,3);
*((uint16_t*)(fp2+22)) = _mm256_extract_epi16(tmp0,3);
*((uint32_t*)(fp2+24)) = _mm256_extract_epi32(tmp0b,4);
*((uint16_t*)(fp2+26)) = _mm256_extract_epi16(tmp0,4);
*((uint32_t*)(fp2+30)) = _mm256_extract_epi32(tmp0b,5);
*((uint16_t*)(fp2+34)) = _mm256_extract_epi16(tmp0,5);
*((uint32_t*)(fp2+36)) = _mm256_extract_epi32(tmp0,6);
*((uint16_t*)(fp2+40)) = _mm256_extract_epi16(tmp0,6);
*((uint32_t*)(fp2+42)) = _mm256_extract_epi32(tmp0b,7);
*((uint16_t*)(fp2+46)) = _mm256_extract_epi16(tmp0,7);
*((uint32_t*)(fp2+48)) = _mm256_extract_epi32(tmp1b,0);
*((uint16_t*)(fp2+52)) = _mm256_extract_epi16(tmp0,8);
*((uint32_t*)(fp2+56)) = _mm256_extract_epi32(tmp1b,1);
*((uint16_t*)(fp2+60)) = _mm256_extract_epi16(tmp0,9);
*((uint32_t*)(fp2+62)) = _mm256_extract_epi32(tmp1b,2);
*((uint16_t*)(fp2+66)) = _mm256_extract_epi16(tmp0,10);
*((uint32_t*)(fp2+68)) = _mm256_extract_epi32(tmp1b,3);
*((uint16_t*)(fp2+72)) = _mm256_extract_epi16(tmp0,11);
*((uint32_t*)(fp2+74)) = _mm256_extract_epi32(tmp1b,4);
*((uint16_t*)(fp2+76)) = _mm256_extract_epi16(tmp0,12);
*((uint32_t*)(fp2+80)) = _mm256_extract_epi32(tmp1b,5);
*((uint16_t*)(fp2+82)) = _mm256_extract_epi16(tmp0,13);
*((uint32_t*)(fp2+86)) = _mm256_extract_epi32(tmp1b,6);
*((uint16_t*)(fp2+90)) = _mm256_extract_epi16(tmp0,14);
*((uint32_t*)(fp2+92)) = _mm256_extract_epi32(tmp1b,7);
*((uint16_t*)(fp2+94)) = _mm256_extract_epi16(tmp0,15);
}
break;
case 8:
e0=e;
e1=e0+EQm;
e2=e1+EQm;
e3=e2+EQm;
e4=e3+EQm;
e5=e4+EQm;
e6=e5+EQm;
e7=e6+EQm;
e0_256=(__m256i *)e0;
e1_256=(__m256i *)e1;
e2_256=(__m256i *)e2;
e3_256=(__m256i *)e3;
e4_256=(__m256i *)e4;
e5_256=(__m256i *)e5;
e6_256=(__m256i *)e6;
e7_256=(__m256i *)e7;
for (int k=0,j=0;j<EQm>>5;j++,k+=8) {
tmp0 = _mm256_unpacklo_epi8(e0_256[j],e1_256[j]); // e0(i) e1(i) e0(i+1) e1(i+1) .... e0(i+15) e1(i+15)
tmp1 = _mm256_unpacklo_epi8(e2_256[j],e3_256[j]); // e2(i) e3(i) e2(i+1) e3(i+1) .... e2(i+15) e3(i+15)
tmp2 = _mm256_unpacklo_epi8(e4_256[j],e5_256[j]); // e4(i) e5(i) e4(i+1) e5(i+1) .... e4(i+15) e5(i+15)
tmp3 = _mm256_unpacklo_epi8(e6_256[j],e7_256[j]); // e6(i) e7(i) e6(i+1) e7(i+1) .... e6(i+15) e7(i+15)
tmp4 = _mm256_unpacklo_epi16(tmp0,tmp1); // e0(i) e1(i) e2(i) e3(i) ... e0(i+7) e1(i+7) e2(i+7) e3(i+7)
tmp5 = _mm256_unpacklo_epi16(tmp2,tmp3); // e4(i) e5(i) e6(i) e7(i) ... e4(i+7) e5(i+7) e6(i+7) e7(i+7)
f_256[k] = _mm256_unpacklo_epi16(tmp4,tmp5); // e0(i) e1(i) e2(i) e3(i) e4(i) e5(i) e6(i) e7(i)... e0(i+3) e1(i+3) e2(i+3) e3(i+3) e4(i+3) e5(i+3) e6(i+3) e7(i+3))
f_256[k+1] = _mm256_unpackhi_epi16(tmp4,tmp5); // e0(i+4) e1(i+4) e2(i+4) e3(i+4) e4(i+4) e5(i+4) e6(i+4) e7(i+4)... e0(i+7) e1(i+7) e2(i+7) e3(i+7) e4(i+7) e5(i+7) e6(i+7) e7(i+7))
tmp4 = _mm256_unpackhi_epi16(tmp0,tmp1); // e0(i+8) e1(i+8) e2(i+8) e3(i+8) ... e0(i+15) e1(i+15) e2(i+15) e3(i+15)
tmp5 = _mm256_unpackhi_epi16(tmp2,tmp3); // e4(i+8) e5(i+8) e6(i+8) e7(i+8) ... e4(i+15) e5(i+15) e6(i+15) e7(i+15)
f_256[k+2] = _mm256_unpacklo_epi16(tmp4,tmp5); // e0(i+8) e1(i+8) e2(i+8) e3(i+8) e4(i+8) e5(i+8) e6(i+8) e7(i+8)... e0(i+11) e1(i+11) e2(i+11) e3(i+11) e4(i+11) e5(i+11) e6(i+11) e7(i+11))
f_256[k+3] = _mm256_unpackhi_epi16(tmp4,tmp5); // e0(i+12) e1(i+12) e2(i+12) e3(i+12) e4(i+12) e5(i+12) e6(i+12) e7(i+12)... e0(i+15) e1(i+15) e2(i+15) e3(i+15) e4(i+15) e5(i+15) e6(i+15) e7(i+15))
tmp0 = _mm256_unpackhi_epi8(e0_256[j],e1_256[j]); // e0(i+16) e1(i+16) e0(i+17) e1(i+17) .... e0(i+31) e1(i+31)
tmp1 = _mm256_unpackhi_epi8(e2_256[j],e3_256[j]); // e2(i+16) e3(i+16) e2(i+17) e3(i+17) .... e2(i+31) e3(i+31)
tmp2 = _mm256_unpackhi_epi8(e4_256[j],e5_256[j]); // e4(i+16) e5(i+16) e4(i+17) e5(i+17) .... e4(i+31) e5(i+31)
tmp3 = _mm256_unpackhi_epi8(e6_256[j],e7_256[j]); // e6(i+16) e7(i+16) e6(i+17) e7(i+17) .... e6(i+31) e7(i+31)
tmp4 = _mm256_unpacklo_epi16(tmp0,tmp1); // e0(i+!6) e1(i+16) e2(i+16) e3(i+16) ... e0(i+23) e1(i+23) e2(i+23) e3(i+23)
tmp5 = _mm256_unpacklo_epi16(tmp2,tmp3); // e4(i+16) e5(i+16) e6(i+16) e7(i+16) ... e4(i+23) e5(i+23) e6(i+23) e7(i+23)
f_256[k+4] = _mm256_unpacklo_epi16(tmp4,tmp5); // e0(i+16) e1(i+16) e2(i+16) e3(i+16) e4(i+16) e5(i+16) e6(i+16) e7(i+16)... e0(i+19) e1(i+19) e2(i+19) e3(i+19) e4(i+19) e5(i+19) e6(i+19) e7(i+19))
f_256[k+5] = _mm256_unpackhi_epi16(tmp4,tmp5); // e0(i+20) e1(i+20) e2(i+20) e3(i+20) e4(i+20) e5(i+20) e6(i+20) e7(i+20)... e0(i+23) e1(i+23) e2(i+23) e3(i+23) e4(i+23) e5(i+23) e6(i+23) e7(i+23))
tmp4 = _mm256_unpackhi_epi16(tmp0,tmp1); // e0(i+24) e1(i+24) e2(i+24) e3(i+24) ... e0(i+31) e1(i+31) e2(i+31) e3(i+31)
tmp5 = _mm256_unpackhi_epi16(tmp2,tmp3); // e4(i+24) e5(i+24) e6(i+24) e7(i+24) ... e4(i+31) e5(i+31) e6(i+31) e7(i+31)
f_256[k+6] = _mm256_unpacklo_epi16(tmp4,tmp5); // e0(i+24) e1(i+24) e2(i+24) e3(i+24) e4(i+24) e5(i+24) e6(i+24) e7(i+24)... e0(i+27) e1(i+27) e2(i+27) e3(i+27) e4(i+27) e5(i+27) e6(i+27) e7(i+27))
f_256[k+7] = _mm256_unpackhi_epi16(tmp4,tmp5); // e0(i+28) e1(i+28) e2(i+28) e3(i+28) e4(i+28) e5(i+28) e6(i+28) e7(i+28)... e0(i+31) e1(i+31) e2(i+31) e3(i+31) e4(i+31) e5(i+31) e6(i+31) e7(i+31))
}
break;
default: AssertFatal(1==0,"Should be here!\n");
}
#else
//original unoptimized loops
/*
for (int j = 0; j< EQm; j++,j2+=2){
for (int i = 0; i< Qm; i++){
f[(i+j*Qm)] = e[(i*EQm + j)];
}
}
*/
int j2=0;
fp=f;
switch (Qm) {
case 2:
e0=e;
e1=e0+EQm;
for (int j = 0; j< EQm; j++,j2+=2){
fp=&f[j2];
fp[0] = e0[j];
fp[1] = e1[j];
}
break;
case 4:
e0=e;
e1=e0+EQm;
e2=e1+EQm;
e3=e2+EQm;
for (int j = 0; j< EQm; j++,j2+=4){
fp=&f[j2];
fp[0] = e0[j];
fp[1] = e1[j];
fp[2] = e2[j];
fp[3] = e3[j];
}
break;
case 6:
e0=e;
e1=e0+EQm;
e2=e1+EQm;
e3=e2+EQm;
e4=e3+EQm;
e5=e4+EQm;
fp = f;
for (int j = 0; j< EQm; j++){
*fp++ = e0[j];
*fp++ = e1[j];
*fp++ = e2[j];
*fp++ = e3[j];
*fp++ = e4[j];
*fp++ = e5[j];
}
break;
case 8:
e0=e;
e1=e0+EQm;
e2=e1+EQm;
e3=e2+EQm;
e4=e3+EQm;
e5=e4+EQm;
e6=e5+EQm;
e7=e6+EQm;
for (int j = 0; j< EQm; j++,j2+=8){
fp=&f[j2];
fp[0] = e0[j];
fp[1] = e1[j];
fp[2] = e2[j];
fp[3] = e3[j];
fp[4] = e4[j];
fp[5] = e5[j];
fp[6] = e6[j];
fp[7] = e7[j];
}
break;
default: AssertFatal(1==0,"Should never be here!\n");
}
#endif
}
void nr_deinterleaving_ldpc(uint32_t E, uint8_t Qm, int16_t *e,int16_t *f)
{
@@ -71,10 +329,12 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm,
uint8_t *w,
uint8_t *e,
uint8_t C,
uint32_t F,
uint32_t Foffset,
uint8_t rvidx,
uint32_t E)
{
uint32_t Ncb,ind,k,Nref,N;
uint32_t Ncb,ind,k=0,Nref,N;
if (C==0) {
printf("nr_rate_matching: invalid parameters (C %d\n",C);
@@ -94,21 +354,36 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm,
ind = (index_k0[BG-1][rvidx]*Ncb/N)*Z;
#ifdef RM_DEBUG
printf("nr_rate_matching_ldpc: E %d, k0 %d, Ncb %d, rvidx %d\n", E, ind, Ncb, rvidx);
printf("nr_rate_matching_ldpc: E %d, F %d, Foffset %d, k0 %d, Ncb %d, rvidx %d\n", E, F, Foffset,ind, Ncb, rvidx);
#endif
AssertFatal(Foffset <= E,"Foffset %d > E %d\n",Foffset,E);
AssertFatal(Foffset <= Ncb,"Foffset %d > Ncb %d\n",Foffset,Ncb);
k=0;
if (ind >= Foffset && ind < (F+Foffset)) ind = F+Foffset;
for (; (ind<Ncb)&&(k<E); ind++) {
if (ind < Foffset) { // case where we have some bits before the filler and the rest after
memcpy((void*)e,(void*)(w+ind),Foffset-ind);
#ifdef RM_DEBUG
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
if (E + F <= Ncb) { // E+F doesn't contain all coded bits
memcpy((void*)(e+Foffset-ind),(void*)(w+Foffset+F-ind),E-Foffset+ind);
k=E;
}
else {
memcpy((void*)(e+Foffset-ind),(void*)(w+Foffset+F),Ncb-Foffset-F);
k=Ncb-F-ind;
}
}
else {
if (E + F <= Ncb-ind) { //E+F doesn't contain all coded bits
memcpy((void*)(e+Foffset-ind),(void*)(w+Foffset+F-ind),E-Foffset+ind);
k=E;
}
else {
if (w[ind] != NR_NULL) e[k++]=w[ind];
}
}
while(k<E) {
while(k<E) { // case where we do repetitions (low mcs)
for (ind=0; (ind<Ncb)&&(k<E); ind++) {
#ifdef RM_DEBUG
@@ -132,7 +407,9 @@ int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
uint8_t C,
uint8_t rvidx,
uint8_t clear,
uint32_t E)
uint32_t E,
uint32_t F,
uint32_t Foffset)
{
uint32_t Ncb,ind,k,Nref,N;
@@ -156,53 +433,60 @@ int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
}
ind = (index_k0[BG-1][rvidx]*Ncb/N)*Z;
AssertFatal(Foffset <= E,"Foffset %d > E %d\n",Foffset,E);
AssertFatal(Foffset <= Ncb,"Foffset %d > Ncb %d\n",Foffset,Ncb);
#ifdef RM_DEBUG
printf("nr_rate_matching_ldpc_rx: Clear %d, E %d, k0 %d, Ncb %d, rvidx %d\n", clear, E, ind, Ncb, rvidx);
#endif
if (clear==1)
memset(w,0,Ncb*sizeof(int16_t));
if (clear==1) memset(w,0,Ncb*sizeof(int16_t));
k=0;
if (ind < Foffset)
for (; (ind<Foffset)&&(k<E); ind++) {
#ifdef RM_DEBUG
printf("RM_RX k%d Ind %d(before filler): %d (%d)=>",k,ind,w[ind],soft_input[k]);
#endif
w[ind]+=soft_input[k++];
#ifdef RM_DEBUG
printf("%d\n",w[ind]);
#endif
}
if (ind >= Foffset && ind < Foffset+F) ind=Foffset+F;
for (; (ind<Ncb)&&(k<E); ind++) {
if (soft_input[ind] != NR_NULL) {
#ifdef RM_DEBUG
printf("RM_RX k%d Ind %d(after filler) %d (%d)=>",k,ind,w[ind],soft_input[k]);
#endif
w[ind] += soft_input[k++];
#ifdef RM_DEBUG
printf("RM_RX k%d Ind: %d (%d)\n",k-1,ind,w[ind]);
#endif
}
#ifdef RM_DEBUG
else {
printf("RM_RX Ind: %d NULL %d\n",ind,nulled);
nulled++;
}
printf("%d\n",w[ind]);
#endif
}
if (rvidx !=0){
while(k<E) {
for (ind=0; (ind<Ncb)&&(k<E); ind++) {
if (soft_input[ind] != NR_NULL) {
w[ind] += soft_input[k++];
for (ind=0; (ind<Foffset)&&(k<E); ind++) {
#ifdef RM_DEBUG
printf("RM_RX k%d Ind: %d (%d)(soft in %d)\n",k-1,ind,w[ind],soft_input[k-1]);
printf("RM_RX k%d Ind %d(before filler) %d(%d)=>",k,ind,w[ind],soft_input[k]);
#endif
}
w[ind]+=soft_input[k++];
#ifdef RM_DEBUG
else {
printf("RM_RX Ind: %d NULL %d\n",ind,nulled);
nulled++;
}
printf("%d\n",w[ind]);
#endif
}
for (ind=Foffset+F; (ind<Ncb)&&(k<E); ind++) {
#ifdef RM_DEBUG
printf("RM_RX (after filler) k%d Ind: %d (%d)(soft in %d)=>",k,ind,w[ind],soft_input[k]);
#endif
w[ind] += soft_input[k++];
#ifdef RM_DEBUG
printf("%d\n",w[ind]);
#endif
}
}
}
return 0;
}
openair1/PHY/CODING/nr_segmentation.c
+8 -8
View File
@@ -30,13 +30,13 @@
//#define DEBUG_SEGMENTATION
int32_t nr_segmentation(unsigned char *input_buffer,
unsigned char **output_buffers,
unsigned int B,
unsigned int *C,
unsigned int *K,
unsigned int *Zout, // [hna] Zout is Zc
unsigned int *F,
uint8_t BG)
unsigned char **output_buffers,
unsigned int B,
unsigned int *C,
unsigned int *K,
unsigned int *Zout, // [hna] Zout is Zc
unsigned int *F,
uint8_t BG)
{
unsigned int L,Bprime,Z,r,Kcb,Kb,k,s,crc,Kprime;
@@ -63,7 +63,7 @@ int32_t nr_segmentation(unsigned char *input_buffer,
#endif
}
if ((*C)>MAX_NUM_DLSCH_SEGMENTS) {
if ((*C)>MAX_NUM_NR_DLSCH_SEGMENTS) {
LOG_E(PHY,"nr_segmentation.c: too many segments %d, B %d, L %d, Bprime %d\n",*C,B,L,Bprime);
return(-1);
}
openair1/PHY/INIT/lte_parms.c
+2
View File
@@ -161,6 +161,8 @@ int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,
if (frame_parms->frame_type == TDD) set_S_config(frame_parms);
frame_parms->samples_per_subframe=frame_parms->samples_per_tti;
frame_parms->samples_per_slot=frame_parms->samples_per_tti>>1;
// frame_parms->tdd_config=3;
return(0);
}
openair1/PHY/INIT/nr_init.c
+224 -229
View File
@@ -31,6 +31,7 @@
#include "TDD-Config.h"
#include "MBSFN-SubframeConfigList.h"*/
#include "openair1/PHY/defs_RU.h"
#include "openair1/PHY/CODING/nrLDPC_extern.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#include "assertions.h"
#include <math.h>
@@ -43,34 +44,30 @@
/*
extern uint32_t from_nrarfcn(int nr_bandP,uint32_t dl_nrarfcn);
extern int32_t get_nr_uldl_offset(int nr_bandP);*/
extern openair0_config_t openair0_cfg[MAX_CARDS];
int l1_north_init_gNB()
{
if (RC.nb_nr_L1_inst > 0 && RC.nb_nr_L1_CC != NULL && RC.gNB != NULL) {
extern int32_t get_nr_uldl_offset(int nr_bandP);
extern openair0_config_t openair0_cfg[MAX_CARDS];
*/
int l1_north_init_gNB() {
if (RC.nb_nr_L1_inst > 0 && RC.gNB != NULL) {
AssertFatal(RC.nb_nr_L1_inst>0,"nb_nr_L1_inst=%d\n",RC.nb_nr_L1_inst);
AssertFatal(RC.nb_nr_L1_CC!=NULL,"nb_nr_L1_CC is null\n");
AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");
LOG_I(PHY,"%s() RC.nb_nr_L1_inst:%d\n", __FUNCTION__, RC.nb_nr_L1_inst);
for (int i=0; i<RC.nb_nr_L1_inst; i++) {
AssertFatal(RC.gNB[i]!=NULL,"RC.gNB[%d] is null\n",i);
AssertFatal(RC.nb_nr_L1_CC[i]>0,"RC.nb_nr_L1_CC[%d]=%d\n",i,RC.nb_nr_L1_CC[i]);
LOG_I(PHY,"%s() RC.nb_nr_L1_CC[%d]:%d\n", __FUNCTION__, i, RC.nb_nr_L1_CC[i]);
for (int j=0; j<RC.nb_nr_L1_CC[i]; j++) {
AssertFatal(RC.gNB[i][j]!=NULL,"RC.gNB[%d][%d] is null\n",i,j);
if ((RC.gNB[i][j]->if_inst = NR_IF_Module_init(i))<0) return(-1);
LOG_I(PHY,"%s() RC.gNB[%d][%d] installing callbacks\n", __FUNCTION__, i, j);
RC.gNB[i][j]->if_inst->NR_PHY_config_req = nr_phy_config_request;
RC.gNB[i][j]->if_inst->NR_Schedule_response = nr_schedule_response;
}
if ((RC.gNB[i]->if_inst = NR_IF_Module_init(i))<0) return(-1);
LOG_I(PHY,"%s() RC.gNB[%d] installing callbacks\n", __FUNCTION__, i);
RC.gNB[i]->if_inst->NR_PHY_config_req = nr_phy_config_request;
RC.gNB[i]->if_inst->NR_Schedule_response = nr_schedule_response;
}
} else {
LOG_I(PHY,"%s() Not installing PHY callbacks - RC.nb_nr_L1_inst:%d RC.nb_nr_L1_CC:%p RC.gNB:%p\n", __FUNCTION__, RC.nb_nr_L1_inst, RC.nb_nr_L1_CC, RC.gNB);
LOG_I(PHY,"%s() Not installing PHY callbacks - RC.nb_nr_L1_inst:%d RC.gNB:%p\n", __FUNCTION__, RC.nb_nr_L1_inst, RC.gNB);
}
return(0);
@@ -82,19 +79,20 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
unsigned char abstraction_flag) {
// shortcuts
NR_DL_FRAME_PARMS *const fp = &gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PRACH *const prach_vars = &gNB->prach_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;*/
int i;
int Ptx=cfg->carrier_config.num_tx_ant.value;
int Prx=cfg->carrier_config.num_rx_ant.value;
AssertFatal(Ptx>0 && Ptx<9,"Ptx %d is not supported\n",Ptx);
AssertFatal(Prx>0 && Prx<9,"Prx %d is not supported\n",Prx);
LOG_I(PHY,"[gNB %d] %s() About to wait for gNB to be configured\n", gNB->Mod_id, __FUNCTION__);
gNB->total_dlsch_bitrate = 0;
gNB->total_transmitted_bits = 0;
gNB->total_system_throughput = 0;
gNB->check_for_MUMIMO_transmissions=0;
while(gNB->configured == 0) usleep(10000);
@@ -115,6 +113,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_gNB][MOD %02"PRIu8"][]\n", gNB->Mod_id);
crcTableInit();
init_dfts();
load_nrLDPClib();
// PBCH DMRS gold sequences generation
nr_init_pbch_dmrs(gNB);
//PDCCH DMRS init
@@ -132,7 +131,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
}
nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
//PDSCH DMRS init
gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
@@ -153,38 +152,52 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
}
//------------- config PUSCH DMRS parameters(to be updated from RRC)--------------//
gNB->dmrs_UplinkConfig.pusch_dmrs_type = pusch_dmrs_type1;
gNB->dmrs_UplinkConfig.pusch_dmrs_AdditionalPosition = pusch_dmrs_pos0;
gNB->dmrs_UplinkConfig.pusch_maxLength = pusch_len1;
//--------------------------------------------------------------------------------//
nr_init_pdsch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
nr_init_pdsch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
// default values until overwritten by RRCConnectionReconfiguration
//PUSCH DMRS init
gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(2*sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
for (i=0;i<MAX_NR_OF_UL_ALLOCATIONS;i++){
gNB->pusch_config.pusch_TimeDomainResourceAllocation[i] = (PUSCH_TimeDomainResourceAllocation_t *)malloc16(sizeof(PUSCH_TimeDomainResourceAllocation_t));
gNB->pusch_config.pusch_TimeDomainResourceAllocation[i]->mappingType = typeB;
for(int nscid=0; nscid<2; nscid++) {
pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[nscid][slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pusch_dmrs[nscid][slot]!=NULL, "NR init: pusch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[nscid][slot][symb] = (uint32_t *)malloc16(NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
AssertFatal(pusch_dmrs[nscid][slot][symb]!=NULL, "NR init: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
}
uint32_t Nid_pusch[2] = {cfg->cell_config.phy_cell_id.value,cfg->cell_config.phy_cell_id.value};
nr_gold_pusch(gNB, &Nid_pusch[0]);
/// Transport init necessary for NR synchro
init_nr_transport(gNB);
gNB->first_run_I0_measurements = 1; ///This flag used to be static. With multiple gNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here.
common_vars->rxdata = (int32_t **)malloc16(15*sizeof(int32_t*));
common_vars->txdataF = (int32_t **)malloc16(15*sizeof(int32_t*));
common_vars->rxdataF = (int32_t **)malloc16(15*sizeof(int32_t*));
gNB->first_run_I0_measurements = 1;
for (i=0;i<15;i++){
common_vars->rxdata = (int32_t **)malloc16(Prx*sizeof(int32_t*));
common_vars->txdataF = (int32_t **)malloc16(Ptx*sizeof(int32_t*));
common_vars->rxdataF = (int32_t **)malloc16(Prx*sizeof(int32_t*));
for (i=0;i<Ptx;i++){
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t));
common_vars->rxdata[i] = (int32_t*)malloc16_clear(fp->samples_per_frame*sizeof(int32_t));
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t));
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t));
}
for (i=0;i<Prx;i++){
common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t));
common_vars->rxdata[i] = (int32_t*)malloc16_clear(fp->samples_per_frame*sizeof(int32_t));
}
// Channel estimates for SRS
/*
@@ -207,112 +220,76 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
srs_vars[UE_id].srs = (int32_t *)malloc16_clear(2*fp->ofdm_symbol_size*sizeof(int32_t));
}
*/
// PRACH
prach_vars->prachF = (int16_t *)malloc16_clear( 1024*2*sizeof(int16_t) );
// assume maximum of 64 RX antennas for PRACH receiver
prach_vars->prach_ifft[0] = (int32_t **)malloc16_clear(64*sizeof(int32_t *));
prach_vars->rxsigF = (int16_t **)malloc16_clear(Prx*sizeof(int16_t*));
/*
for (i=0;i<Prx;i++){
prach_vars->rxsigF[i] = (int16_t *)malloc16_clear( 1024*2*sizeof(int16_t) );
}
*/
prach_vars->prach_ifft = (int32_t *)malloc16_clear(1024*2*sizeof(int32_t));
for (i=0; i<64; i++) prach_vars->prach_ifft[0][i] = (int32_t *)malloc16_clear(1024*2*sizeof(int32_t));
int N_RB_UL = cfg->carrier_config.ul_grid_size[cfg->ssb_config.scs_common.value].value;
prach_vars->rxsigF[0] = (int16_t **)malloc16_clear(64*sizeof(int16_t *));
*/
printf("Before ULSCH init : %p\n",gNB->dlsch[0][0]->harq_processes[0]);
for (int ULSCH_id=0; ULSCH_id<NUMBER_OF_NR_ULSCH_MAX; ULSCH_id++) {
printf("ULSCH_id %d : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
pusch_vars[ULSCH_id] = (NR_gNB_PUSCH *)malloc16_clear( sizeof(NR_gNB_PUSCH) );
pusch_vars[ULSCH_id]->rxdataF_ext = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_ext2 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_ext = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_time = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_comp = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag0 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb0 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rho = (int32_t **)malloc16_clear(Prx*sizeof(int32_t*) );
for (int UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
//FIXME
pusch_vars[UE_id] = (NR_gNB_PUSCH *)malloc16_clear( sizeof(NR_gNB_PUSCH) );
pusch_vars[UE_id]->rxdataF_ext = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->rxdataF_ext2 = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->ul_ch_estimates = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->ul_ch_estimates_ext = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->ul_ch_estimates_time = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->rxdataF_comp = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->ul_ch_mag0 = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->ul_ch_magb0 = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->ul_ch_mag = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->ul_ch_magb = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[UE_id]->rho = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) );
for (i=0; i<fp->nb_antennas_rx; i++) {
// RK 2 times because of output format of FFT!
// FIXME We should get rid of this
pusch_vars[UE_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
pusch_vars[UE_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
pusch_vars[UE_id]->ul_ch_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
pusch_vars[UE_id]->ul_ch_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
pusch_vars[UE_id]->ul_ch_estimates_time[i] = (int32_t *)malloc16_clear( 2*sizeof(int32_t)*fp->ofdm_symbol_size );
pusch_vars[UE_id]->rxdataF_comp[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
pusch_vars[UE_id]->ul_ch_mag0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
pusch_vars[UE_id]->ul_ch_magb0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
pusch_vars[UE_id]->ul_ch_mag[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
pusch_vars[UE_id]->ul_ch_magb[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
pusch_vars[UE_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_UL*12*7*2) );
printf("ULSCH_id %d (before rx antenna alloc) : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
for (i=0; i<Prx; i++) {
pusch_vars[ULSCH_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates_time[i] = (int32_t *)malloc16_clear( 2*sizeof(int32_t)*fp->ofdm_symbol_size );
pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2*fp->symbols_per_slot ); // max intensity in freq is 1 sc every 2 RBs
pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->rxdataF_comp[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_mag0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->ul_ch_magb0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->ul_ch_mag[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->ul_ch_magb[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_UL*12*7*2) );
}
pusch_vars[UE_id]->llr = (int16_t *)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
} //UE_id
printf("ULSCH_id %d (before llr alloc) : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
pusch_vars[ULSCH_id]->llr = (int16_t *)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
printf("ULSCH_id %d (after llr alloc) : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
} //ulsch_id
/*
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++)
gNB->UE_stats_ptr[UE_id] = &gNB->UE_stats[UE_id];
for (ulsch_id=0; ulsch_id<NUMBER_OF_UE_MAX; ulsch_id++)
gNB->UE_stats_ptr[ulsch_id] = &gNB->UE_stats[ulsch_id];
*/
gNB->pdsch_config_dedicated->p_a = dB0; //defaul value until overwritten by RRCConnectionReconfiguration
printf("After ULSCH init : %p\n",gNB->dlsch[0][0]->harq_processes[0]);
return (0);
}
/*
void phy_config_request(PHY_Config_t *phy_config) {
uint8_t Mod_id = phy_config->Mod_id;
int CC_id = phy_config->CC_id;
nfapi_nr_config_request_t *cfg = phy_config->cfg;
NR_DL_FRAME_PARMS *fp;
PHICH_RESOURCE_t phich_resource_table[4]={oneSixth,half,one,two};
int eutra_band = cfg->nfapi_config.rf_bands.rf_band[0];
int dl_Bandwidth = cfg->rf_config.dl_carrier_bandwidth.value;
int ul_Bandwidth = cfg->rf_config.ul_carrier_bandwidth.value;
int Nid_cell = cfg->sch_config.physical_cell_id.value;
int Ncp = cfg->subframe_config.dl_cyclic_prefix_type.value;
int p_eNB = cfg->rf_config.tx_antenna_ports.value;
uint32_t dl_CarrierFreq = cfg->nfapi_config.earfcn.value;
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,gNB_tx_antenna_ports %d,Ncp %d,DL freq %u)\n",
Mod_id, CC_id, eutra_band, dl_Bandwidth, ul_Bandwidth, Nid_cell, p_eNB,Ncp,dl_CarrierFreq );
AssertFatal(RC.gNB != NULL, "PHY instance pointer doesn't exist\n");
AssertFatal(RC.gNB[Mod_id] != NULL, "PHY instance %d doesn't exist\n",Mod_id);
AssertFatal(RC.gNB[Mod_id][CC_id] != NULL, "PHY instance %d, CCid %d doesn't exist\n",Mod_id,CC_id);
if (RC.gNB[Mod_id][CC_id]->configured == 1)
{
LOG_E(PHY,"Already eNB already configured, do nothing\n");
return;
}
RC.gNB[Mod_id][CC_id]->mac_enabled = 1;
fp = &RC.gNB[Mod_id][CC_id]->frame_parms;
fp->threequarter_fs = 0;
nr_init_frame_parms(fp,1);
RC.gNB[Mod_id][CC_id]->configured = 1;
LOG_I(PHY,"gNB %d/%d configured\n",Mod_id,CC_id);
}*/
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
//NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
//nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;*/
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
int Ptx=gNB->gNB_config.carrier_config.num_tx_ant.value;
for (int i = 0; i < 15; i++) {
for (int i = 0; i < Ptx; i++) {
free_and_zero(common_vars->txdataF[i]);
/* rxdataF[i] is not allocated -> don't free */
}
@@ -344,36 +321,40 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(prach_vars->prach_ifft[0]);
free_and_zero(prach_vars->rxsigF[0]);
*/
for (int UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
for (int ULSCH_id=0; ULSCH_id<NUMBER_OF_NR_ULSCH_MAX; ULSCH_id++) {
for (int i = 0; i < 2; i++) {
free_and_zero(pusch_vars[UE_id]->rxdataF_ext[i]);
free_and_zero(pusch_vars[UE_id]->rxdataF_ext2[i]);
free_and_zero(pusch_vars[UE_id]->ul_ch_estimates[i]);
free_and_zero(pusch_vars[UE_id]->ul_ch_estimates_ext[i]);
free_and_zero(pusch_vars[UE_id]->ul_ch_estimates_time[i]);
free_and_zero(pusch_vars[UE_id]->rxdataF_comp[i]);
free_and_zero(pusch_vars[UE_id]->ul_ch_mag0[i]);
free_and_zero(pusch_vars[UE_id]->ul_ch_magb0[i]);
free_and_zero(pusch_vars[UE_id]->ul_ch_mag[i]);
free_and_zero(pusch_vars[UE_id]->ul_ch_magb[i]);
free_and_zero(pusch_vars[UE_id]->rho[i]);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext[i]);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_time[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext[i]);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_comp[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_mag0[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_magb0[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_mag[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_magb[i]);
free_and_zero(pusch_vars[ULSCH_id]->rho[i]);
}
free_and_zero(pusch_vars[UE_id]->rxdataF_ext);
free_and_zero(pusch_vars[UE_id]->rxdataF_ext2);
free_and_zero(pusch_vars[UE_id]->ul_ch_estimates);
free_and_zero(pusch_vars[UE_id]->ul_ch_estimates_ext);
free_and_zero(pusch_vars[UE_id]->ul_ch_estimates_time);
free_and_zero(pusch_vars[UE_id]->rxdataF_comp);
free_and_zero(pusch_vars[UE_id]->ul_ch_mag0);
free_and_zero(pusch_vars[UE_id]->ul_ch_magb0);
free_and_zero(pusch_vars[UE_id]->ul_ch_mag);
free_and_zero(pusch_vars[UE_id]->ul_ch_magb);
free_and_zero(pusch_vars[UE_id]->rho);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_ext);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_time);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_comp);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_mag0);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_magb0);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_mag);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_magb);
free_and_zero(pusch_vars[ULSCH_id]->rho);
free_and_zero(pusch_vars[UE_id]->llr);
free_and_zero(pusch_vars[UE_id]);
} //UE_id
free_and_zero(pusch_vars[ULSCH_id]->llr);
free_and_zero(pusch_vars[ULSCH_id]);
} //ULSCH_id
/*
for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) gNB->UE_stats_ptr[UE_id] = NULL;
*/
@@ -396,103 +377,127 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,
uint64_t position_in_burst)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config;
nfapi_nr_config_request_scf_t *gNB_config = &gNB->gNB_config;
//overwrite for new NR parameters
gNB_config->nfapi_config.rf_bands.rf_band[0] = 78;
gNB_config->nfapi_config.nrarfcn.value = 620000;
gNB_config->subframe_config.numerology_index_mu.value = mu;
gNB_config->subframe_config.duplex_mode.value = TDD;
gNB_config->rf_config.dl_carrier_bandwidth.value = N_RB_DL;
gNB_config->rf_config.ul_carrier_bandwidth.value = N_RB_UL;
gNB_config->sch_config.half_frame_index.value = 0;
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
gNB_config->sch_config.n_ssb_crb.value = (N_RB_DL-20);
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
gNB_config->sch_config.physical_cell_id.value = Nid_cell;
gNB_config->sch_config.ssb_scg_position_in_burst.value = position_in_burst;
gNB_config->subframe_config.dl_cyclic_prefix_type.value = (fp->Ncp == NORMAL) ? NFAPI_CP_NORMAL : NFAPI_CP_EXTENDED;
uint64_t rev_burst=0;
for (int i=0; i<64; i++)
rev_burst |= (((position_in_burst>>(63-i))&0x01)<<i);
gNB_config->cell_config.phy_cell_id.value = Nid_cell;
gNB_config->ssb_config.scs_common.value = mu;
gNB_config->ssb_table.ssb_subcarrier_offset.value = 0;
gNB_config->ssb_table.ssb_offset_point_a.value = (N_RB_DL-20)>>1;
gNB_config->ssb_table.ssb_mask_list[1].ssb_mask.value = (rev_burst)&(0xFFFFFFFF);
gNB_config->ssb_table.ssb_mask_list[0].ssb_mask.value = (rev_burst>>32)&(0xFFFFFFFF);
gNB_config->cell_config.frame_duplex_type.value = TDD;
gNB_config->ssb_table.ssb_period.value = 1; //10ms
gNB_config->carrier_config.dl_grid_size[mu].value = N_RB_DL;
gNB_config->carrier_config.ul_grid_size[mu].value = N_RB_UL;
gNB_config->carrier_config.num_tx_ant.value = fp->nb_antennas_tx;
gNB_config->carrier_config.num_rx_ant.value = fp->nb_antennas_rx;
gNB_config->tdd_table.tdd_period.value = 0;
//gNB_config->subframe_config.dl_cyclic_prefix_type.value = (fp->Ncp == NORMAL) ? NFAPI_CP_NORMAL : NFAPI_CP_EXTENDED;
gNB->mac_enabled = 1;
fp->dl_CarrierFreq = 3500000000;//from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
fp->ul_CarrierFreq = 3500000000;//fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->nr_band = 78;
fp->threequarter_fs= 0;
gNB_config->carrier_config.dl_bandwidth.value = config_bandwidth(mu, N_RB_DL, fp->nr_band);
nr_init_frame_parms(gNB_config, fp);
gNB->configured = 1;
LOG_I(PHY,"gNB configured\n");
}
void nr_phy_config_request(NR_PHY_Config_t *phy_config)
{
uint8_t Mod_id = phy_config->Mod_id;
int CC_id = phy_config->CC_id;
NR_DL_FRAME_PARMS *fp = &RC.gNB[Mod_id][CC_id]->frame_parms;
nfapi_nr_config_request_t *gNB_config = &RC.gNB[Mod_id][CC_id]->gNB_config;
gNB_config->nfapi_config.rf_bands.rf_band[0] = phy_config->cfg->nfapi_config.rf_bands.rf_band[0]; //22
gNB_config->nfapi_config.nrarfcn.value = phy_config->cfg->nfapi_config.nrarfcn.value; //6600
gNB_config->subframe_config.numerology_index_mu.value = phy_config->cfg->subframe_config.numerology_index_mu.value;//1
gNB_config->rf_config.dl_carrier_bandwidth.value = phy_config->cfg->rf_config.dl_carrier_bandwidth.value;//106;
gNB_config->rf_config.ul_carrier_bandwidth.value = phy_config->cfg->rf_config.ul_carrier_bandwidth.value;//106;
gNB_config->sch_config.half_frame_index.value = 0;
gNB_config->sch_config.ssb_subcarrier_offset.value = phy_config->cfg->sch_config.ssb_subcarrier_offset.value;//0;
gNB_config->sch_config.n_ssb_crb.value = (phy_config->cfg->rf_config.dl_carrier_bandwidth.value-20);
gNB_config->sch_config.physical_cell_id.value = phy_config->cfg->sch_config.physical_cell_id.value;
gNB_config->sch_config.ssb_scg_position_in_burst.value= phy_config->cfg->sch_config.ssb_scg_position_in_burst.value;
gNB_config->sch_config.ssb_periodicity.value = phy_config->cfg->sch_config.ssb_periodicity.value;
void nr_phy_config_request(NR_PHY_Config_t *phy_config) {
uint8_t Mod_id = phy_config->Mod_id;
NR_DL_FRAME_PARMS *fp = &RC.gNB[Mod_id]->frame_parms;
nfapi_nr_config_request_scf_t *gNB_config = &RC.gNB[Mod_id]->gNB_config;
if (phy_config->cfg->subframe_config.duplex_mode.value == 0) {
gNB_config->subframe_config.duplex_mode.value = FDD;
} else {
gNB_config->subframe_config.duplex_mode.value = TDD;
/*
gNB_config->cell_config.phy_cell_id.value = phy_config->cfg->cell_config.phy_cell_id.value;
gNB_config->carrier_config.dl_frequency.value = phy_config->cfg->carrier_config.dl_frequency.value;
gNB_config->carrier_config.uplink_frequency.value = phy_config->cfg->carrier_config.uplink_frequency.value;
gNB_config->ssb_config.scs_common.value = phy_config->cfg->ssb_config.scs_common.value;
gNB_config->carrier_config.dl_bandwidth.value = phy_config->cfg->carrier_config.dl_bandwidth.value;
gNB_config->carrier_config.uplink_bandwidth.value = phy_config->cfg->carrier_config.uplink_bandwidth.value;
gNB_config->ssb_table.ssb_subcarrier_offset.value = phy_config->cfg->ssb_table.ssb_subcarrier_offset.value;
gNB_config->ssb_table.ssb_offset_point_a.value = phy_config->cfg->ssb_table.ssb_offset_point_a.value;
gNB_config->ssb_table.ssb_mask_list[0].ssb_mask.value = phy_config->cfg->ssb_table.ssb_mask_list[0].ssb_mask.value;
gNB_config->ssb_table.ssb_mask_list[1].ssb_mask.value = phy_config->cfg->ssb_table.ssb_mask_list[1].ssb_mask.value;
gNB_config->ssb_table.ssb_period.value = phy_config->cfg->ssb_table.ssb_period.value;
for (int i=0; i<5; i++) {
gNB_config->carrier_config.dl_grid_size[i].value = phy_config->cfg->carrier_config.dl_grid_size[i].value;
gNB_config->carrier_config.ul_grid_size[i].value = phy_config->cfg->carrier_config.ul_grid_size[i].value;
gNB_config->carrier_config.dl_k0[i].value = phy_config->cfg->carrier_config.dl_k0[i].value;
gNB_config->carrier_config.ul_k0[i].value = phy_config->cfg->carrier_config.ul_k0[i].value;
}
RC.gNB[Mod_id][CC_id]->mac_enabled = 1;
fp->dl_CarrierFreq = from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
get_band(fp->dl_CarrierFreq, &gNB_config->nfapi_config.rf_bands.rf_band[0], &uplink_frequency_offset[CC_id][0], &fp->frame_type);
fp->ul_CarrierFreq = fp->dl_CarrierFreq + uplink_frequency_offset[CC_id][0];
fp->threequarter_fs = openair0_cfg[0].threequarter_fs;
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,DL freq %u, UL freq %u)\n",
if (phy_config->cfg->cell_config.frame_duplex_type.value == 0) {
gNB_config->cell_config.frame_duplex_type.value = FDD;
} else {
gNB_config->cell_config.frame_duplex_type.value = TDD;
}
memcpy((void*)&gNB_config->prach_config,(void*)&phy_config->cfg->prach_config,sizeof(phy_config->cfg->prach_config));
memcpy((void*)&gNB_config->tdd_table,(void*)&phy_config->cfg->tdd_table,sizeof(phy_config->cfg->tdd_table));
*/
memcpy((void*)gNB_config,phy_config->cfg,sizeof(*phy_config->cfg));
RC.gNB[Mod_id]->mac_enabled = 1;
uint64_t dl_bw_khz = (12*gNB_config->carrier_config.dl_grid_size[gNB_config->ssb_config.scs_common.value].value)*(15<<gNB_config->ssb_config.scs_common.value);
fp->dl_CarrierFreq = ((dl_bw_khz>>1) + gNB_config->carrier_config.dl_frequency.value)*1000 ;
int32_t dlul_offset = 0;
lte_frame_type_t frame_type = 0;
get_band(fp->dl_CarrierFreq,&fp->nr_band,&dlul_offset,&frame_type);
uint64_t ul_bw_khz = (12*gNB_config->carrier_config.ul_grid_size[gNB_config->ssb_config.scs_common.value].value)*(15<<gNB_config->ssb_config.scs_common.value);
fp->ul_CarrierFreq = ((ul_bw_khz>>1) + gNB_config->carrier_config.uplink_frequency.value)*1000 ;
AssertFatal(fp->ul_CarrierFreq==(fp->dl_CarrierFreq+dlul_offset), "Disagreement in uplink frequency for band %d\n", fp->nr_band);
fp->threequarter_fs = openair0_cfg[0].threequarter_fs;
LOG_I(PHY,"Configuring MIB for instance %d, : (Nid_cell %d,DL freq %llu, UL freq %llu)\n",
Mod_id,
CC_id,
gNB_config->nfapi_config.rf_bands.rf_band[0],
gNB_config->rf_config.dl_carrier_bandwidth.value,
gNB_config->rf_config.ul_carrier_bandwidth.value,
gNB_config->sch_config.physical_cell_id.value,
fp->dl_CarrierFreq,
fp->ul_CarrierFreq);
gNB_config->cell_config.phy_cell_id.value,
(unsigned long long)fp->dl_CarrierFreq,
(unsigned long long)fp->ul_CarrierFreq);
nr_init_frame_parms(gNB_config, fp);
if (RC.gNB[Mod_id][CC_id]->configured == 1) {
if (RC.gNB[Mod_id]->configured == 1) {
LOG_E(PHY,"Already gNB already configured, do nothing\n");
return;
}
RC.gNB[Mod_id][CC_id]->configured = 1;
LOG_I(PHY,"gNB %d/%d configured\n",Mod_id,CC_id);
RC.gNB[Mod_id]->configured = 1;
LOG_I(PHY,"gNB %d configured\n",Mod_id);
}
void init_nr_transport(PHY_VARS_gNB *gNB) {
int i;
int j;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
LOG_I(PHY, "Initialise nr transport\n");
uint16_t grid_size = cfg->carrier_config.dl_grid_size[fp->numerology_index].value;
for (i=0; i<NUMBER_OF_NR_DLSCH_MAX; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffers for DLSCH %d/%d\n",i,NUMBER_OF_NR_DLSCH_MAX);
for (j=0; j<2; j++) {
gNB->dlsch[i][j] = new_gNB_dlsch(1,16,NSOFT,0,fp,cfg);
if (!gNB->dlsch[i][j]) {
LOG_E(PHY,"Can't get gNB dlsch structures for UE %d \n", i);
exit(-1);
}/* else {
gNB->dlsch[i][j]->rnti=0;
LOG_D(PHY,"dlsch[%d][%d] => %p rnti:%d\n",i,j,gNB->dlsch[i][j], gNB->dlsch[i][j]->rnti);
}*/
gNB->dlsch[i][j] = new_gNB_dlsch(fp,1,16,NSOFT,0,grid_size);
AssertFatal(gNB->dlsch[i][j]!=NULL,"Can't initialize dlsch %d \n", i);
}
}
@@ -519,8 +524,8 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
rel15_ul->rnti = 0x1234;
rel15_ul->ulsch_pdu_rel15.start_rb = 0;
rel15_ul->ulsch_pdu_rel15.number_rbs = 50;
rel15_ul->ulsch_pdu_rel15.start_symbol = 0;
rel15_ul->ulsch_pdu_rel15.number_symbols = 14;
rel15_ul->ulsch_pdu_rel15.start_symbol = 2;
rel15_ul->ulsch_pdu_rel15.number_symbols = 12;
rel15_ul->ulsch_pdu_rel15.length_dmrs = gNB->dmrs_UplinkConfig.pusch_maxLength;
rel15_ul->ulsch_pdu_rel15.Qm = 2;
rel15_ul->ulsch_pdu_rel15.R = 679;
@@ -534,18 +539,8 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
}
gNB->dlsch_SI = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
LOG_D(PHY,"gNB %d.%d : SI %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_SI);
gNB->dlsch_ra = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
LOG_D(PHY,"gNB %d.%d : RA %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_ra);
gNB->rx_total_gain_dB=130;
for(i=0; i<NUMBER_OF_NR_UE_MAX; i++)
gNB->mu_mimo_mode[i].dl_pow_off = 2;
gNB->check_for_total_transmissions = 0;
gNB->check_for_MUMIMO_transmissions = 0;
gNB->FULL_MUMIMO_transmissions = 0;
gNB->check_for_SUMIMO_transmissions = 0;
//fp->pucch_config_common.deltaPUCCH_Shift = 1;
}
openair1/PHY/INIT/nr_init_ru.c
+12 -9
View File
@@ -41,6 +41,13 @@ int nr_phy_init_RU(RU_t *ru) {
LOG_I(PHY,"Initializing RU signal buffers (if_south %s) nb_tx %d\n",ru_if_types[ru->if_south],ru->nb_tx);
nfapi_nr_config_request_scf_t *cfg;
ru->nb_log_antennas=0;
for (int n=0;n<RC.nb_nr_L1_inst;n++) {
cfg = &RC.gNB[n]->gNB_config;
if (cfg->carrier_config.num_tx_ant.value > ru->nb_log_antennas) ru->nb_log_antennas = cfg->carrier_config.num_tx_ant.value;
}
AssertFatal(ru->nb_log_antennas > 0 && ru->nb_log_antennas < 13, "ru->nb_log_antennas %d ! \n",ru->nb_log_antennas);
if (ru->if_south <= REMOTE_IF5) { // this means REMOTE_IF5 or LOCAL_RF, so allocate memory for time-domain signals
// Time-domain signals
ru->common.txdata = (int32_t**)malloc16(ru->nb_tx*sizeof(int32_t*));
@@ -75,8 +82,8 @@ int nr_phy_init_RU(RU_t *ru) {
// allocate precoding input buffers (TX)
ru->common.txdataF = (int32_t **)malloc16(15*sizeof(int32_t*));
for(i=0; i< 15; ++i) ru->common.txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
ru->common.txdataF = (int32_t **)malloc16(ru->nb_tx*sizeof(int32_t*));
for(i=0; i< ru->nb_tx; ++i) ru->common.txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
// allocate IFFT input buffers (TX)
ru->common.txdataF_BF = (int32_t **)malloc16(ru->nb_tx*sizeof(int32_t*));
@@ -98,7 +105,6 @@ int nr_phy_init_RU(RU_t *ru) {
// AssertFatal(ru->nb_rx <= sizeof(ru->prach_rxsigF) / sizeof(ru->prach_rxsigF[0]),
// "nb_antennas_rx too large");
ru->prach_rxsigF = (int16_t**)malloc(ru->nb_rx * sizeof(int16_t*));
for (j=0;j<4;j++) ru->prach_rxsigF_br[j] = (int16_t**)malloc(ru->nb_rx * sizeof(int16_t*));
for (i=0; i<ru->nb_rx; i++) {
ru->prach_rxsigF[i] = (int16_t*)malloc16_clear( fp->ofdm_symbol_size*12*2*sizeof(int16_t) );
@@ -111,8 +117,8 @@ int nr_phy_init_RU(RU_t *ru) {
LOG_E(PHY,"[INIT] %s() RC.nb_nr_L1_inst:%d \n", __FUNCTION__, RC.nb_nr_L1_inst);
int beam_count = 0;
if (ru->nb_tx>1) {
for (p=0;p<fp->Lmax;p++) {
if (ru->nb_log_antennas>1) {
for (p=0;p<ru->nb_log_antennas;p++) {
if ((fp->L_ssb >> p) & 0x01)
beam_count++;
}
@@ -120,7 +126,7 @@ int nr_phy_init_RU(RU_t *ru) {
int l_ind = 0;
for (i=0; i<RC.nb_nr_L1_inst; i++) {
for (p=0;p<fp->Lmax;p++) {
for (p=0;p<ru->nb_log_antennas;p++) {
if ((fp->L_ssb >> p) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
@@ -177,9 +183,6 @@ void nr_phy_free_RU(RU_t *ru)
for (i = 0; i < ru->nb_rx; i++) {
free_and_zero(ru->prach_rxsigF[i]);
}
for (j = 0; j < 4; j++) free_and_zero(ru->prach_rxsigF_br[j]);
free_and_zero(ru->prach_rxsigF);
/* ru->prach_rxsigF_br is not allocated -> don't free */
for (i = 0; i < RC.nb_nr_L1_inst; i++) {
for (p = 0; p < 15; p++) {
openair1/PHY/INIT/nr_init_ue.c
+56 -38
View File
@@ -651,17 +651,16 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
int i,j,k,l,slot,symb,q;
int eNB_id;
int th_id;
int n_ssb_crb=(fp->N_RB_DL-20);
int k_ssb=0;
uint32_t ****pusch_dmrs;
uint16_t N_n_scid[2] = {0,1}; // [HOTFIX] This is a temporary implementation of scramblingID0 and scramblingID1 which are given by DMRS-UplinkConfig
int n_scid;
abstraction_flag = 0;
fp->nb_antennas_tx = 1;
fp->nb_antennas_rx=1;
dmrs_UplinkConfig_t *dmrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig;
ptrs_UplinkConfig_t *ptrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig;
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,fp->N_RB_DL,n_ssb_crb,k_ssb);
phy_init_nr_top(ue);
// many memory allocation sizes are hard coded
AssertFatal( fp->nb_antennas_rx <= 2, "hard coded allocation for ue_common_vars->dl_ch_estimates[eNB_id]" );
@@ -711,9 +710,9 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
}
//------------- config DMRS parameters--------------//
ue->dmrs_UplinkConfig.pusch_dmrs_type = pusch_dmrs_type1;
ue->dmrs_UplinkConfig.pusch_dmrs_AdditionalPosition = pusch_dmrs_pos0;
ue->dmrs_UplinkConfig.pusch_maxLength = pusch_len1;
dmrs_Uplink_Config->pusch_dmrs_type = pusch_dmrs_type1;
dmrs_Uplink_Config->pusch_dmrs_AdditionalPosition = pusch_dmrs_pos0;
dmrs_Uplink_Config->pusch_maxLength = pusch_len1;
//-------------------------------------------------//
ue->dmrs_DownlinkConfig.pdsch_dmrs_type = pdsch_dmrs_type1;
ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition = pdsch_dmrs_pos0;
@@ -743,6 +742,23 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
///////////
////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////PUSCH PTRS init/////////////////////////
///////////
ue->ptrs_configured = 0; // flag to be toggled by RCC
//------------- config PTRS parameters--------------//
ptrs_Uplink_Config->timeDensity.ptrs_mcs1 = 0; // setting MCS values to 0 indicate abscence of time_density field in the configuration
ptrs_Uplink_Config->timeDensity.ptrs_mcs2 = 0;
ptrs_Uplink_Config->timeDensity.ptrs_mcs3 = 0;
ptrs_Uplink_Config->frequencyDensity.n_rb0 = 0; // setting N_RB values to 0 indicate abscence of frequency_density field in the configuration
ptrs_Uplink_Config->frequencyDensity.n_rb1 = 0;
ptrs_Uplink_Config->resourceElementOffset = 0;
//-------------------------------------------------//
///////////
////////////////////////////////////////////////////////////////////////////////////////////
for (i=0; i<10; i++)
ue->tx_power_dBm[i]=-127;
@@ -933,7 +949,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
ue->init_averaging = 1;
// default value until overwritten by RRCConnectionReconfiguration
if (fp->nb_antenna_ports_eNB==2)
if (fp->nb_antenna_ports_gNB==2)
ue->pdsch_config_dedicated->p_a = dBm3;
else
ue->pdsch_config_dedicated->p_a = dB0;
@@ -944,7 +960,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
// enable MIB/SIB decoding by default
ue->decode_MIB = 1;
ue->decode_SIB = 1;
ue->ssb_periodicity = 5; // initialization of ssb periodicity to 5ms according to TS38.213 section 4.1
init_prach_tables(839);
return 0;
}
@@ -963,7 +978,7 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue,
ue->dlsch_SI[i] = new_nr_ue_dlsch(1,1,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag);
ue->dlsch_ra[i] = new_nr_ue_dlsch(1,1,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag);
ue->transmission_mode[i] = ue->frame_parms.nb_antenna_ports_eNB==1 ? 1 : 2;
ue->transmission_mode[i] = ue->frame_parms.nb_antenna_ports_gNB==1 ? 1 : 2;
}
//ue->frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
@@ -990,51 +1005,54 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue) {
void set_default_frame_parms_single(nfapi_nr_config_request_t *config,
NR_DL_FRAME_PARMS *frame_parms) {
//int CC_id;
//for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
/* Set some default values that may be overwritten while reading options */
frame_parms = (NR_DL_FRAME_PARMS *) malloc(sizeof(NR_DL_FRAME_PARMS));
config = (nfapi_nr_config_request_t *) malloc(sizeof(nfapi_nr_config_request_t));
/* Set some default values that may be overwritten while reading options */
frame_parms = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
config = (nfapi_nr_config_request_t*) malloc(sizeof(nfapi_nr_config_request_t));
config->subframe_config.numerology_index_mu.value =1;
config->subframe_config.duplex_mode.value = 1; //FDD
config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config->rf_config.dl_carrier_bandwidth.value = 106;
config->rf_config.ul_carrier_bandwidth.value = 106;
config->rf_config.dl_carrier_bandwidth.value = 100;
config->rf_config.ul_carrier_bandwidth.value = 100;
config->sch_config.physical_cell_id.value = 0;
frame_parms->frame_type = FDD;
frame_parms->tdd_config = 3;
//frame_parms[CC_id]->tdd_config_S = 0;
frame_parms->N_RB_DL = 100;
frame_parms->N_RB_UL = 100;
frame_parms->N_RB_DL = 106;
frame_parms->N_RB_UL = 106;
frame_parms->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms->Nid_cell = 0;
//frame_parms[CC_id]->num_MBSFN_config = 0;
frame_parms->nb_antenna_ports_eNB = 1;
frame_parms->nb_antenna_ports_gNB = 1;
frame_parms->nb_antennas_tx = 1;
frame_parms->nb_antennas_rx = 1;
//frame_parms[CC_id]->nushift = 0;
///frame_parms[CC_id]->phich_config_common.phich_resource = oneSixth;
//frame_parms[CC_id]->phich_config_common.phich_duration = normal;
// UL RS Config
/*frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = 1;//n_DMRS1 set to 0
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
frame_parms[CC_id]->pusch_config_common.n_SB = 1;
frame_parms[CC_id]->pusch_config_common.hoppingMode = 0;
frame_parms[CC_id]->pusch_config_common.pusch_HoppingOffset = 0;
frame_parms[CC_id]->pusch_config_common.enable64QAM = 0;
frame_parms[CC_id]->prach_config_common.rootSequenceIndex=22;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
frame_parms[CC_id]->pusch_config_common.n_SB = 1;
frame_parms[CC_id]->pusch_config_common.hoppingMode = 0;
frame_parms[CC_id]->pusch_config_common.pusch_HoppingOffset = 0;
frame_parms[CC_id]->pusch_config_common.enable64QAM = 0;
frame_parms[CC_id]->prach_config_common.rootSequenceIndex=22;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
// NR: Init to legacy LTE 20Mhz params
frame_parms->numerology_index = 0;
frame_parms->ttis_per_subframe = 1;
frame_parms->slots_per_tti = 2;
//}
frame_parms->numerology_index = 0;
frame_parms->ttis_per_subframe = 1;
frame_parms->slots_per_tti = 2;
}
openair1/PHY/INIT/nr_parms.c
+200 -121
View File
@@ -21,16 +21,20 @@
#include "phy_init.h"
#include "common/utils/LOG/log.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
/// Subcarrier spacings in Hz indexed by numerology index
uint32_t nr_subcarrier_spacing[MAX_NUM_SUBCARRIER_SPACING] = {15e3, 30e3, 60e3, 120e3, 240e3};
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 16, 32};
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 8, 16};
int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_frame_index)
int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp)
{
int mu = fp->numerology_index;
uint8_t half_frame_index = fp->half_frame_bit;
uint8_t i_ssb = fp->ssb_index;
int symbol = 0;
uint8_t n, n_temp;
nr_ssb_type_e type = fp->ssb_type;
@@ -79,62 +83,8 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_f
return symbol;
}
int nr_is_ssb_slot(nfapi_nr_config_request_t *cfg, int slot, int frame)
void set_scs_parameters (NR_DL_FRAME_PARMS *fp, int mu, uint16_t bw)
{
uint8_t n_hf;
uint16_t p,mu,hf_slots;
uint64_t ssb_map;
int rel_slot;
mu = cfg->subframe_config.numerology_index_mu.value;
ssb_map = cfg->sch_config.ssb_scg_position_in_burst.value;
p = cfg->sch_config.ssb_periodicity.value;
n_hf = cfg->sch_config.half_frame_index.value;
// if SSB periodicity is 5ms, they are transmitted in both half frames
if ( (p>10) && (frame%(p/10)) )
return 0;
else {
hf_slots = (10<<mu)>>1; // number of slots per half frame
// if SSB periodicity is 5ms, they are transmitted in both half frames
if ( p == 5) {
if (slot<hf_slots)
n_hf=0;
else
n_hf=1;
}
// to set a effective slot number between 0 to 9 in the half frame where the SSB is supposed to be
rel_slot = (n_hf)? (slot-hf_slots) : slot;
return ( ((ssb_map >> rel_slot*2) & 0x01) || ((ssb_map >> (1+rel_slot*2)) & 0x01) );
}
}
int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
int mu,
int Ncp,
int N_RB_DL)
{
#if DISABLE_LOG_X
printf("Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB_DL, Ncp);
#else
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB_DL, Ncp);
#endif
if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
fp->numerology_index = mu;
fp->Ncp = Ncp;
fp->N_RB_DL = N_RB_DL;
switch(mu) {
case NR_MU_0: //15kHz scs
@@ -148,24 +98,22 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_1];
// selection of SS block pattern according to TS 38101-1 Table 5.4.3.3-1 for SCS 30kHz
if (fp->eutra_band == 5 || fp->eutra_band == 66)
fp->ssb_type = nr_ssb_type_B;
if (fp->nr_band == 5 || fp->nr_band == 66)
fp->ssb_type = nr_ssb_type_B;
else{
if (fp->eutra_band == 41 || ( fp->eutra_band > 76 && fp->eutra_band < 80) )
fp->ssb_type = nr_ssb_type_C;
if (fp->nr_band == 41 || ( fp->nr_band > 76 && fp->nr_band < 80) )
fp->ssb_type = nr_ssb_type_C;
else
AssertFatal(1==0,"NR Operating Band n%d not available for SS block SCS with mu=%d\n", fp->eutra_band, mu);
AssertFatal(1==0,"NR Operating Band n%d not available for SS block SCS with mu=%d\n", fp->nr_band, mu);
}
switch(N_RB_DL){
case 11:
case 24:
case 38:
case 78:
case 51:
case 65:
case 106: //40 MHz
switch(bw){
case 5:
case 15:
case 20:
case 25:
case 30:
case 40: //40 MHz
if (fp->threequarter_fs) {
fp->ofdm_symbol_size = 1536;
fp->first_carrier_offset = 900; //1536 - ( (106*12) / 2 )
@@ -180,11 +128,11 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
}
break;
case 133:
case 162:
case 189:
case 50:
case 60:
case 70:
case 217: //80 MHz
case 80: //80 MHz
if (fp->threequarter_fs) {
fp->ofdm_symbol_size = 3072;
fp->first_carrier_offset = 1770; //3072 - ( (217*12) / 2 )
@@ -199,22 +147,22 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
}
break;
case 245:
AssertFatal(fp->threequarter_fs==0,"3/4 sampling impossible for N_RB %d and MU %d\n",N_RB_DL,mu);
case 90:
AssertFatal(fp->threequarter_fs==0,"3/4 sampling impossible for %d MHz band and MU %d\n",bw,mu);
fp->ofdm_symbol_size = 4096;
fp->first_carrier_offset = 2626; //4096 - ( (245*12) / 2 )
fp->nb_prefix_samples0 = 352;
fp->nb_prefix_samples = 288;
break;
case 273:
AssertFatal(fp->threequarter_fs==0,"3/4 sampling impossible for N_RB %d and MU %d\n",N_RB_DL,mu);
case 100:
AssertFatal(fp->threequarter_fs==0,"3/4 sampling impossible for %d MHz band and MU %d\n",bw,mu);
fp->ofdm_symbol_size = 4096;
fp->first_carrier_offset = 2458; //4096 - ( (273*12) / 2 )
fp->nb_prefix_samples0 = 352;
fp->nb_prefix_samples = 288;
break;
default:
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", N_RB_DL, mu, fp);
AssertFatal(1==0,"%d MHz band undefined for mu %d, frame parms = %p\n", bw, mu, fp);
}
break;
@@ -222,21 +170,21 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_2];
fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_2];
switch(N_RB_DL){ //FR1 bands only
case 11:
case 18:
case 38:
case 24:
case 31:
case 51:
case 65:
case 79:
case 93:
case 107:
case 121:
case 135:
switch(bw){ //FR1 bands only
case 10:
case 15:
case 20:
case 25:
case 30:
case 40:
case 50:
case 60:
case 70:
case 80:
case 90:
case 100:
default:
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", N_RB_DL, mu, fp);
AssertFatal(1==0,"%d MHz band undefined for mu %d, frame parms = %p\n", bw, mu, fp);
}
break;
@@ -244,6 +192,22 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_3];
fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_3];
fp->ssb_type = nr_ssb_type_D;
switch(bw){
case 100:
fp->ofdm_symbol_size = 1024;
fp->first_carrier_offset = 628; //1024 - ( (66*12) / 2 )
fp->nb_prefix_samples0 = 136;
fp->nb_prefix_samples = 72;
break;
case 50:
fp->ofdm_symbol_size = 512;
fp->first_carrier_offset = 320; //1024 - ( (66*12) / 2 )
fp->nb_prefix_samples0 = 68;
fp->nb_prefix_samples = 36;
break;
default:
AssertFatal(1==0,"%d MHz band undefined for mu %d, frame parms = %p\n", bw, mu, fp);
}
break;
case NR_MU_4:
@@ -255,10 +219,63 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
default:
AssertFatal(1==0,"Invalid numerology index %d", mu);
}
}
uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp)
{
uint32_t samp_count;
if(fp->numerology_index == 0)
samp_count = fp->samples_per_subframe;
else
samp_count = (slot%(fp->slots_per_subframe/2)) ? fp->samples_per_slotN0 : fp->samples_per_slot0;
return samp_count;
}
uint32_t get_samples_slot_timestamp(int slot, NR_DL_FRAME_PARMS* fp, uint8_t sl_ahead)
{
uint32_t samp_count = 0;
if(!sl_ahead) {
for(uint8_t idx_slot = 0; idx_slot < slot; idx_slot++)
samp_count += fp->get_samples_per_slot(idx_slot, fp);
} else {
for(uint8_t idx_slot = slot; idx_slot < slot+sl_ahead; idx_slot++)
samp_count += fp->get_samples_per_slot(idx_slot, fp);
}
return samp_count;
}
int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg,
NR_DL_FRAME_PARMS *fp)
{
fp->frame_type = cfg->cell_config.frame_duplex_type.value;
fp->L_ssb = (((uint64_t) cfg->ssb_table.ssb_mask_list[0].ssb_mask.value)<<32) | cfg->ssb_table.ssb_mask_list[1].ssb_mask.value ;
fp->N_RB_DL = cfg->carrier_config.dl_grid_size[cfg->ssb_config.scs_common.value].value;
fp->N_RB_UL = cfg->carrier_config.ul_grid_size[cfg->ssb_config.scs_common.value].value;
int Ncp = NFAPI_CP_NORMAL;
int mu = cfg!= NULL ? cfg->ssb_config.scs_common.value : 0;
#if DISABLE_LOG_X
printf("Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, fp->N_RB_DL, Ncp);
#else
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, fp->N_RB_DL, Ncp);
#endif
if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
fp->half_frame_bit = 0; // half frame bit initialized to 0 here
fp->numerology_index = mu;
set_scs_parameters(fp, mu, cfg->carrier_config.dl_bandwidth.value);
fp->slots_per_frame = 10* fp->slots_per_subframe;
fp->nb_antenna_ports_eNB = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antenna_ports_gNB = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_rx = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_tx = 1; // default value until overwritten by RRCConnectionReconfiguration
@@ -266,12 +283,17 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
fp->samples_per_subframe_wCP = fp->ofdm_symbol_size * fp->symbols_per_slot * fp->slots_per_subframe;
fp->samples_per_frame_wCP = 10 * fp->samples_per_subframe_wCP;
fp->samples_per_slot_wCP = fp->symbols_per_slot*fp->ofdm_symbol_size;
fp->samples_per_slot = fp->nb_prefix_samples0 + ((fp->symbols_per_slot-1)*fp->nb_prefix_samples) + (fp->symbols_per_slot*fp->ofdm_symbol_size);
fp->samples_per_subframe = (fp->samples_per_subframe_wCP + (fp->nb_prefix_samples0 * fp->slots_per_subframe) +
(fp->nb_prefix_samples * fp->slots_per_subframe * (fp->symbols_per_slot - 1)));
fp->samples_per_slotN0 = (fp->nb_prefix_samples + fp->ofdm_symbol_size) * fp->symbols_per_slot;
fp->samples_per_slot0 = fp->nb_prefix_samples0 + ((fp->symbols_per_slot-1)*fp->nb_prefix_samples) + (fp->symbols_per_slot*fp->ofdm_symbol_size);
fp->samples_per_subframe = (fp->nb_prefix_samples0 + fp->ofdm_symbol_size) * 2 +
(fp->nb_prefix_samples + fp->ofdm_symbol_size) * (fp->symbols_per_slot * fp->slots_per_subframe - 2);
fp->get_samples_per_slot = &get_samples_per_slot;
fp->get_samples_slot_timestamp = &get_samples_slot_timestamp;
fp->samples_per_frame = 10 * fp->samples_per_subframe;
fp->freq_range = (fp->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2;
fp->Ncp = Ncp;
// definition of Lmax according to ts 38.213 section 4.1
if (fp->dl_CarrierFreq < 6e9) {
if(fp->frame_type && (fp->ssb_type==2))
@@ -283,35 +305,92 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
}
fp->N_ssb = 0;
for (int p=0; p<fp->Lmax; p++)
int num_tx_ant = (cfg == NULL) ? fp->Lmax : cfg->carrier_config.num_tx_ant.value;
for (int p=0; p<num_tx_ant; p++)
fp->N_ssb += ((fp->L_ssb >> p) & 0x01);
return 0;
}
int nr_init_frame_parms(nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *fp)
{
fp->eutra_band = config->nfapi_config.rf_bands.rf_band[0];
fp->frame_type = config->subframe_config.duplex_mode.value;
fp->L_ssb = config->sch_config.ssb_scg_position_in_burst.value;
return nr_init_frame_parms0(fp,
config->subframe_config.numerology_index_mu.value,
config->subframe_config.dl_cyclic_prefix_type.value,
config->rf_config.dl_carrier_bandwidth.value);
}
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp,
int mu,
int Ncp,
int N_RB_DL,
int n_ssb_crb,
int ssb_subcarrier_offset)
fapi_nr_config_request_t* config,
int Ncp)
{
/*n_ssb_crb and ssb_subcarrier_offset are given in 15kHz SCS*/
nr_init_frame_parms0(fp,mu,Ncp,N_RB_DL);
fp->ssb_start_subcarrier = (12 * n_ssb_crb + ssb_subcarrier_offset)/(1<<mu);
uint64_t dl_bw_khz = (12*config->carrier_config.dl_grid_size[config->ssb_config.scs_common])*(15<<config->ssb_config.scs_common);
fp->dl_CarrierFreq = ((dl_bw_khz>>1) + config->carrier_config.dl_frequency)*1000 ;
uint64_t ul_bw_khz = (12*config->carrier_config.ul_grid_size[config->ssb_config.scs_common])*(15<<config->ssb_config.scs_common);
fp->ul_CarrierFreq = ((ul_bw_khz>>1) + config->carrier_config.uplink_frequency)*1000 ;
fp->numerology_index = config->ssb_config.scs_common;
fp->N_RB_UL = config->carrier_config.ul_grid_size[fp->numerology_index];
fp->N_RB_DL = config->carrier_config.dl_grid_size[fp->numerology_index];
int32_t uplink_frequency_offset = 0;
get_band(fp->dl_CarrierFreq, &fp->nr_band, &uplink_frequency_offset, &fp->frame_type);
AssertFatal(fp->frame_type==config->cell_config.frame_duplex_type, "Invalid duplex type in config request file for band %d\n", fp->nr_band);
AssertFatal(fp->ul_CarrierFreq==(fp->dl_CarrierFreq+uplink_frequency_offset), "Disagreement in uplink frequency for band %d\n", fp->nr_band);
#if DISABLE_LOG_X
printf("Initializing UE frame parms for mu %d, N_RB %d, Ncp %d\n",fp->numerology_index, fp->N_RB_DL, Ncp);
#else
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",fp->numerology_index, fp->N_RB_DL, Ncp);
#endif
if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(fp->numerology_index == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, fp->numerology_index);
fp->Ncp = Ncp;
set_scs_parameters(fp,fp->numerology_index,config->carrier_config.dl_bandwidth);
fp->slots_per_frame = 10* fp->slots_per_subframe;
fp->nb_antenna_ports_gNB = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_rx = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_tx = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
fp->samples_per_subframe_wCP = fp->ofdm_symbol_size * fp->symbols_per_slot * fp->slots_per_subframe;
fp->samples_per_frame_wCP = 10 * fp->samples_per_subframe_wCP;
fp->samples_per_slot_wCP = fp->symbols_per_slot*fp->ofdm_symbol_size;
fp->samples_per_slotN0 = (fp->nb_prefix_samples + fp->ofdm_symbol_size) * fp->symbols_per_slot;
fp->samples_per_slot0 = fp->nb_prefix_samples0 + ((fp->symbols_per_slot-1)*fp->nb_prefix_samples) + (fp->symbols_per_slot*fp->ofdm_symbol_size);
fp->samples_per_subframe = (fp->nb_prefix_samples0 + fp->ofdm_symbol_size) * 2 +
(fp->nb_prefix_samples + fp->ofdm_symbol_size) * (fp->symbols_per_slot * fp->slots_per_subframe - 2);
fp->get_samples_per_slot = &get_samples_per_slot;
fp->get_samples_slot_timestamp = &get_samples_slot_timestamp;
fp->samples_per_frame = 10 * fp->samples_per_subframe;
fp->freq_range = (fp->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2;
uint8_t sco = 0;
if (((fp->freq_range == nr_FR1) && (config->ssb_table.ssb_subcarrier_offset<24)) ||
((fp->freq_range == nr_FR2) && (config->ssb_table.ssb_subcarrier_offset<12)) )
sco = config->ssb_table.ssb_subcarrier_offset;
fp->ssb_start_subcarrier = (12 * config->ssb_table.ssb_offset_point_a + sco);
// definition of Lmax according to ts 38.213 section 4.1
if (fp->dl_CarrierFreq < 6e9) {
if(fp->frame_type && (fp->ssb_type==2))
fp->Lmax = (fp->dl_CarrierFreq < 2.4e9)? 4 : 8;
else
fp->Lmax = (fp->dl_CarrierFreq < 3e9)? 4 : 8;
} else {
fp->Lmax = 64;
}
fp->L_ssb = (((uint64_t) config->ssb_table.ssb_mask_list[1].ssb_mask)<<32) | config->ssb_table.ssb_mask_list[1].ssb_mask;
fp->N_ssb = 0;
for (int p=0; p<fp->Lmax; p++)
fp->N_ssb += ((fp->L_ssb >> p) & 0x01);
return 0;
}
@@ -326,8 +405,8 @@ void nr_dump_frame_parms(NR_DL_FRAME_PARMS *fp)
LOG_I(PHY,"fp->samples_per_frame_wCP=%d\n",fp->samples_per_frame_wCP);
LOG_I(PHY,"fp->samples_per_subframe=%d\n",fp->samples_per_subframe);
LOG_I(PHY,"fp->samples_per_frame=%d\n",fp->samples_per_frame);
LOG_I(PHY,"fp->dl_CarrierFreq=%u\n",fp->dl_CarrierFreq);
LOG_I(PHY,"fp->ul_CarrierFreq=%u\n",fp->ul_CarrierFreq);
LOG_I(PHY,"fp->dl_CarrierFreq=%lu\n",fp->dl_CarrierFreq);
LOG_I(PHY,"fp->ul_CarrierFreq=%lu\n",fp->ul_CarrierFreq);
}
openair1/PHY/INIT/phy_init.h
+3 -4
View File
@@ -392,10 +392,9 @@ void phy_config_update_sib13_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_frame_index);
int nr_is_ssb_slot(nfapi_nr_config_request_t *cfg, int slot, int frame);
int nr_init_frame_parms(nfapi_nr_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,int mu,int Ncp,int N_RB_DL,int n_ssb_crb,int ssb_subcarrier_offset);
int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp);
int nr_init_frame_parms(nfapi_nr_config_request_scf_t *config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,fapi_nr_config_request_t *config,int Ncp);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
openair1/PHY/MODULATION/modulation_UE.h
+6
View File
@@ -54,6 +54,12 @@ int nr_slot_fep(PHY_VARS_NR_UE *phy_vars_ue,
int sample_offset,
int no_prefix);
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
int no_prefix);
int slot_fep_mbsfn(PHY_VARS_UE *phy_vars_ue,
unsigned char l,
int subframe,
openair1/PHY/MODULATION/nr_modulation.c
+4 -3
View File
@@ -51,9 +51,10 @@ void nr_modulation(uint32_t *in,
}
void nr_layer_mapping(int16_t **mod_symbs,
uint8_t n_layers,
uint16_t n_symbs,
int16_t **tx_layers) {
uint8_t n_layers,
uint16_t n_symbs,
int16_t **tx_layers) {
LOG_D(PHY,"Doing layer mapping for %d layers, %d symbols\n",n_layers,n_symbs);
switch (n_layers) {
openair1/PHY/MODULATION/slot_fep_nr.c
+191 -9
View File
@@ -46,6 +46,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
unsigned char aa;
unsigned int nb_prefix_samples;
unsigned int nb_prefix_samples0;
unsigned int abs_symbol;
if (ue->is_synchronized) {
nb_prefix_samples = (no_prefix ? 0 : frame_parms->nb_prefix_samples);
nb_prefix_samples0 = (no_prefix ? 0 : frame_parms->nb_prefix_samples0);
@@ -109,7 +110,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
if (no_prefix) {
slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_slot) * (Ns);
} else {
slot_offset = (frame_parms->samples_per_slot) * (Ns);
slot_offset = frame_parms->get_samples_slot_timestamp(Ns,frame_parms,0);
}
/*if (l<0 || l>=7-frame_parms->Ncp) {
@@ -117,15 +118,15 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
return(-1);
}*/
if (Ns<0 || Ns>=20) {
printf("slot_fep: Ns must be between 0 and 19\n");
if (Ns<0 || Ns>(frame_parms->slots_per_frame-1)) {
printf("slot_fep: Ns must be between 0 and %d\n",frame_parms->slots_per_frame-1);
return(-1);
}
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset + nb_prefix_samples0 - SOFFSET;
rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit
// rx_offset = rx_offset&0xfffffff8;
@@ -135,8 +136,16 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
ue->proc.proc_rxtx[(Ns)&1].frame_rx, Ns, symbol, nb_prefix_samples, nb_prefix_samples0, slot_offset, sample_offset, rx_offset, frame_length_samples);
#endif
if (symbol==0) {
abs_symbol = Ns * frame_parms->symbols_per_slot + symbol;
for (int idx_symb = Ns*frame_parms->symbols_per_slot; idx_symb < abs_symbol; idx_symb++)
rx_offset += (idx_symb%(0x7<<frame_parms->numerology_index)) ? nb_prefix_samples : nb_prefix_samples0;
rx_offset += frame_parms->ofdm_symbol_size * symbol;
if (abs_symbol%(0x7<<frame_parms->numerology_index)) {
rx_offset += nb_prefix_samples;
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((short*) &common_vars->rxdata[aa][frame_length_samples],
(short*) &common_vars->rxdata[aa][0],
@@ -161,9 +170,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
} else {
rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*symbol;
// + (frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1);
rx_offset += nb_prefix_samples0;
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((void *) &common_vars->rxdata[aa][frame_length_samples],
(void *) &common_vars->rxdata[aa][0],
@@ -197,6 +204,181 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
#ifdef DEBUG_FEP
printf("slot_fep: done\n");
#endif
return(0);
}
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
int no_prefix)
{
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_COMMON *common_vars = &ue->common_vars;
unsigned char aa;
unsigned int nb_prefix_samples;
unsigned int nb_prefix_samples0;
unsigned int abs_symbol;
if (ue->is_synchronized) {
nb_prefix_samples = (no_prefix ? 0 : frame_parms->nb_prefix_samples);
nb_prefix_samples0 = (no_prefix ? 0 : frame_parms->nb_prefix_samples0);
}
else {
nb_prefix_samples = (no_prefix ? 0 : frame_parms->nb_prefix_samples);
nb_prefix_samples0 = (no_prefix ? 0 : frame_parms->nb_prefix_samples);
}
//unsigned int subframe_offset;//,subframe_offset_F;
unsigned int slot_offset;
//int i;
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
unsigned int rx_offset;
void (*dft)(int16_t *,int16_t *, int);
int tmp_dft_in[8192] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
switch (frame_parms->ofdm_symbol_size) {
case 128:
dft = dft128;
break;
case 256:
dft = dft256;
break;
case 512:
dft = dft512;
break;
case 1024:
dft = dft1024;
break;
case 1536:
dft = dft1536;
break;
case 2048:
dft = dft2048;
break;
case 3072:
dft = dft3072;
break;
case 4096:
dft = dft4096;
break;
case 8192:
dft = dft8192;
break;
default:
printf("unsupported ofdm symbol size \n");
assert(0);
}
if (no_prefix) {
slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_slot) * (Ns);
} else {
slot_offset = frame_parms->get_samples_slot_timestamp(Ns,frame_parms,0);
}
/*if (l<0 || l>=7-frame_parms->Ncp) {
printf("slot_fep: l must be between 0 and %d\n",7-frame_parms->Ncp);
return(-1);
}*/
if (Ns<0 || Ns>(frame_parms->slots_per_frame-1)) {
printf("slot_fep: Ns must be between 0 and %d\n",frame_parms->slots_per_frame-1);
return(-1);
}
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit
// rx_offset = rx_offset&0xfffffff8;
#ifdef DEBUG_FEP
// if (ue->frame <100)
/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %u, nb_prefix_samples0 %u, slot_offset %u, sample_offset %d,rx_offset %u, frame_length_samples %u\n",
ue->proc.proc_rxtx[(Ns)&1].frame_rx, Ns, symbol, nb_prefix_samples, nb_prefix_samples0, slot_offset, sample_offset, rx_offset, frame_length_samples);
#endif
abs_symbol = Ns * frame_parms->symbols_per_slot + symbol;
for (int idx_symb = Ns*frame_parms->symbols_per_slot; idx_symb < abs_symbol; idx_symb++)
rx_offset += (abs_symbol%(0x7<<frame_parms->numerology_index)) ? nb_prefix_samples : nb_prefix_samples0;
rx_offset += frame_parms->ofdm_symbol_size * symbol;
if (abs_symbol%(0x7<<frame_parms->numerology_index)) {
rx_offset += nb_prefix_samples;
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((short*) &common_vars->rxdata[aa][frame_length_samples],
(short*) &common_vars->rxdata[aa][0],
frame_parms->ofdm_symbol_size*sizeof(int));
if ((rx_offset&7)!=0) { // if input to dft is not 256-bit aligned, issue for size 6,15 and 25 PRBs
memcpy((void *)tmp_dft_in,
(void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int));
dft((int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
#endif
dft((int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
}
} else {
rx_offset += nb_prefix_samples0;
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((void *) &common_vars->rxdata[aa][frame_length_samples],
(void *) &common_vars->rxdata[aa][0],
frame_parms->ofdm_symbol_size*sizeof(int));
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
#endif
if ((rx_offset&7)!=0) { // if input to dft is not 128-bit aligned, issue for size 6 and 15 PRBs
memcpy((void *)tmp_dft_in,
(void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int));
dft((int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft((int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
}
#ifdef DEBUG_FEP
// if (ue->frame <100)
printf("slot_fep: frame %d: symbol %d rx_offset %u\n", ue->proc.proc_rxtx[(Ns)&1].frame_rx, symbol, rx_offset);
#endif
}
#ifdef DEBUG_FEP
printf("slot_fep: done\n");
#endif
@@ -258,7 +440,7 @@ int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms,
break;
}
slot_offset = Ns * frame_parms->samples_per_slot;
slot_offset = frame_parms->get_samples_slot_timestamp(Ns,frame_parms,0);
if(symbol == 0)
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
+14 -20
View File
@@ -31,22 +31,19 @@
int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
uint8_t gNB_offset,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pusch,
dmrs_UplinkConfig_t *dmrs_UplinkConfig)
{
nfapi_nr_pusch_pdu_t *pusch_pdu) {
int pilot[3280] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt,re_cnt;
int16_t ch[2],ch_r[2],ch_l[2],*pil,*rxF,*ul_ch;
int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh;
int ch_offset,symbol_offset, length_dmrs, UE_id = 0;
unsigned short n_idDMRS[2] = {0,1}; //to update from pusch config
int ch_offset,symbol_offset, UE_id = 0;
int32_t **ul_ch_estimates_time = gNB->pusch_vars[UE_id]->ul_ch_estimates_time;
__m128i *ul_ch_128;
@@ -71,9 +68,11 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
k = bwp_start_subcarrier;
int re_offset = k;
uint16_t nb_rb_pusch = pusch_pdu->rb_size;
/*
#ifdef DEBUG_CH
printf("PUSCH Channel Estimation : gNB_offset %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n", gNB_offset,ch_offset,symbol_offset,gNB->frame_parms.ofdm_symbol_size,
printf("PUSCH Channel Estimation : ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n", ,ch_offset,symbol_offset,gNB->frame_parms.ofdm_symbol_size,
gNB->frame_parms.Ncp,l,Ns,k, symbol);
#endif
*/
@@ -117,21 +116,17 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------//
length_dmrs = gNB->dmrs_UplinkConfig.pusch_maxLength;
nr_gold_pusch(gNB, symbol, n_idDMRS, length_dmrs);
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch[gNB_offset][Ns][0], &pilot[0], 1000, 0, nb_rb_pusch, dmrs_UplinkConfig->pusch_dmrs_type);
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch, pusch_pdu->dmrs_config_type);
//------------------------------------------------//
for (aarx=0; aarx<gNB->frame_parms.nb_antennas_rx; aarx++) {
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
memset(ul_ch,0,4*(gNB->frame_parms.ofdm_symbol_size));
memset(ul_ch,0,4*(gNB->frame_parms.ofdm_symbol_size));
#ifdef DEBUG_PUSCH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[0], gNB->frame_parms.N_RB_UL);
@@ -141,8 +136,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#endif
//if ((gNB->frame_parms.N_RB_UL&1)==0) {
if (dmrs_UplinkConfig->pusch_dmrs_type == pusch_dmrs_type1){
if (pusch_pdu->dmrs_config_type == pusch_dmrs_type1){
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -237,10 +231,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
}
// Treat first 2 pilots specially (right edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fm,
ch,
openair1/PHY/NR_ESTIMATION/nr_ul_estimation.h
+6 -8
View File
@@ -39,14 +39,12 @@
\param nb_rb_pusch, number of allocated RBs for this UE
*/
int32_t nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
uint8_t gNB_offset,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pusch,
dmrs_UplinkConfig_t *dmrs_UplinkConfig);
int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
nfapi_nr_pusch_pdu_t *pusch_pdu);
int nr_est_timing_advance_pusch(PHY_VARS_gNB* phy_vars_gNB, int UE_id);
openair1/PHY/NR_REFSIG/dmrs_nr.c
+7 -8
View File
@@ -128,22 +128,21 @@ uint8_t is_dmrs_symbol(uint8_t l,
uint16_t n,
uint8_t delta,
uint8_t duration_in_symbols,
dmrs_UplinkConfig_t *dmrs_UplinkConfig,
uint8_t mapping_type,
uint8_t dmrs_type,
uint16_t ofdm_symbol_size) {
uint8_t is_dmrs_freq, is_dmrs_time, dmrs_type, l0;
uint8_t is_dmrs_freq, is_dmrs_time, l0;
int32_t l_prime_mask;
pusch_dmrs_AdditionalPosition_t additional_pos;
pusch_dmrs_AdditionalPosition_t additional_pos = pusch_dmrs_pos0;
pusch_maxLength_t pusch_maxLength = pusch_len1;
uint8_t mapping_type = typeB;
is_dmrs_freq = 0;
is_dmrs_time = 0;
dmrs_type = dmrs_UplinkConfig->pusch_dmrs_type;
additional_pos = dmrs_UplinkConfig->pusch_dmrs_AdditionalPosition;
l0 = get_l0_ul(mapping_type, 2);
l_prime_mask = get_l_prime(duration_in_symbols, mapping_type, additional_pos, dmrs_UplinkConfig->pusch_maxLength);
l_prime_mask = get_l_prime(duration_in_symbols, mapping_type, additional_pos, pusch_maxLength);
if (k == ((start_sc+get_dmrs_freq_idx_ul(n, k_prime, delta, dmrs_type))%ofdm_symbol_size))
is_dmrs_freq = 1;
@@ -157,7 +156,7 @@ uint8_t is_dmrs_symbol(uint8_t l,
} else if ( (l==l0) || (((l_prime_mask>>l)&1) == 1 && l!=0) )
is_dmrs_time = 1;
if (dmrs_UplinkConfig->pusch_maxLength == pusch_len2){
if (pusch_maxLength == pusch_len2){
if (((l_prime_mask>>(l-1))&1) == 1 && l!=0 && l!=1)
is_dmrs_time = 1;
openair1/PHY/NR_REFSIG/dmrs_nr.h
+1 -2
View File
@@ -66,8 +66,7 @@ uint8_t is_dmrs_symbol(uint8_t l,
uint16_t n,
uint8_t delta,
uint8_t duration_in_symbols,
dmrs_UplinkConfig_t *dmrs_UplinkConfig,
uint8_t mapping_type,
uint8_t dmrs_type,
uint16_t ofdm_symbol_size);
#undef EXTERN
openair1/PHY/NR_REFSIG/nr_gold.c
+19 -47
View File
@@ -26,11 +26,11 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
unsigned int x1, x2;
uint16_t Nid, i_ssb, i_ssb2;
unsigned char Lmax, l, n_hf, N_hf;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint8_t reset;
Nid = cfg->sch_config.physical_cell_id.value;
Nid = cfg->cell_config.phy_cell_id.value;
Lmax = fp->Lmax;
N_hf = (Lmax == 4)? 2:1;
@@ -65,7 +65,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1));
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1)) + (Nid<<1);
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
@@ -91,6 +91,7 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",slot,symb,x2);
for (uint32_t n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdsch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
@@ -103,57 +104,28 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
}
void nr_gold_pusch(PHY_VARS_gNB* gNB, unsigned short lbar,unsigned short *n_idDMRS, unsigned short length_dmrs)
{
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
unsigned char ns,l;
unsigned int n,x1,x2,x2tmp0;
int nscid;
unsigned char ns;
unsigned int n,x1,x2;
int nscid, reset;
unsigned int nid;
/// to be updated from higher layer
//unsigned short lbar = 0;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
unsigned short l;
for (nscid=0; nscid<2; nscid++) {
if (n_idDMRS)
nid = n_idDMRS[nscid];
else
nid = gNB->frame_parms.Nid_cell;
//printf("gold pdsch nid %d lbar %d\n",nid,lbar);
for (ns=0; ns<20; ns++) {
for (l=0; l<length_dmrs; l++) {
x2tmp0 = ((14*ns+(lbar+l)+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit
//printf("ns %d gold pdsch x2 %d\n",ns,x2);
x1 = 1+ (1<<31);
x2=x2 ^ ((x2 ^ (x2>>1) ^ (x2>>2) ^ (x2>>3))<<31);
// skip first 50 double words (1600 bits)
for (n=1; n<50; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
nid = Nid[nscid];
for (ns=0; ns<fp->slots_per_frame; ns++) {
for (l=0; l<fp->symbols_per_slot; l++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
for (n=0; n<NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
gNB->nr_gold_pusch[nscid][ns][l][n] = x1^x2;
// if ((ns==2)&&(l==0))
//printf("n=%d : c %x\n",n,x1^x2);
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
}
}
openair1/PHY/NR_REFSIG/nr_gold_ue.c
+2 -2
View File
@@ -100,7 +100,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
ue->nr_gold_pdcch[0][ns][l][n] = x1^x2;
//printf("n=%d : c %x\n",n,x1^x2);
// if (ns==1 && l==0) printf("n=%d : c %x\n",n,x1^x2);
}
}
}
@@ -133,7 +133,7 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
x2tmp0 = ((14*ns+(lbar+l)+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, lbar %d, x2 %x, nscid %d\n",ns,l,lbar,x2,nscid);
//printf("ns %d gold pdsch x2 %d\n",ns,x2);
x1 = 1+ (1<<31);
openair1/PHY/NR_REFSIG/nr_refsig.h
+1 -1
View File
@@ -39,7 +39,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, unsigned short lbar,unsigned short *n_idDMRS, unsigned short length_dmrs);
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid);
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns,
openair1/PHY/NR_TRANSPORT/nr_dci.c
+149 -165
View File
@@ -42,8 +42,7 @@
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
uint16_t N_RB,
nfapi_nr_config_request_t *config) {
uint16_t N_RB) {
uint16_t size = 0;
switch(format) {
@@ -52,7 +51,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, config) - size; // Padding to match 1_0 size
size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB) - size; // Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
break;
@@ -138,7 +137,6 @@ void nr_pdcch_scrambling(uint32_t *in,
uint32_t x1, x2, s=0;
reset = 1;
x2 = (n_RNTI<<16) + Nid;
for (int i=0; i<size; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
@@ -151,193 +149,179 @@ void nr_pdcch_scrambling(uint32_t *in,
}
(*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f);
//printf("nr_pdcch_scrambling: in %d seq 0x%08x => out %d\n",((*in)>>(i&0x1f))&1,s,((*out)>>(i&0x1f))&1);
}
}
uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config) {
NR_DL_FRAME_PARMS frame_parms) {
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
uint16_t cset_start_sc;
uint8_t cset_start_symb, cset_nsymb;
int k,l,k_prime,dci_idx, dmrs_idx;
nr_cce_t cce;
nr_reg_t reg;
nr_reg_t reg_mapping_list[NR_MAX_PDCCH_AGG_LEVEL*NR_NB_REG_PER_CCE];
nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params = dci_alloc.pdcch_params;
/*First iteration: single DCI*/
/*The coreset is initialised
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
* or the rb_offset for other coresets
* in time: by its first slot and its first symbol*/
if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1) {
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15=NULL;
// find coreset descriptor
int rb_offset;
int n_rb;
AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n");
AssertFatal(pdcch_pdu==NULL || ul_dci_pdu==NULL,"Can't handle both DL and UL DCI in same slot\n");
if (pdcch_pdu) pdcch_pdu_rel15 = &pdcch_pdu->pdcch_pdu_rel15;
else if (ul_dci_pdu) pdcch_pdu_rel15 = &ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15;
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
// compute rb_offset and n_prb based on frequency allocation
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) {
cset_start_sc = frame_parms.first_carrier_offset + (frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB +
pdcch_params.rb_offset)*NR_NB_SC_PER_RB;
rb_offset)*NR_NB_SC_PER_RB;
} else
cset_start_sc = frame_parms.first_carrier_offset + pdcch_params.rb_offset*NR_NB_SC_PER_RB;
cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB;
cset_start_symb = pdcch_params.first_symbol;
cset_nsymb = pdcch_params.n_symb;
dci_idx = 0;
LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
// DMRS length is per OFDM symbol
uint32_t dmrs_length = (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS)?
(pdcch_params.n_rb*6) : (dci_alloc.L*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = dci_alloc.L*108; //2(QPSK)*9(per RB)*6(REG per CCE)
LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d\n", dmrs_length, encoded_length);
dmrs_length += pdcch_params.rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
/// DMRS QPSK modulation
for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_params.n_symb; symb++) {
nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); //Qm = 2 as DMRS is QPSK modulated
for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
/*The coreset is initialised
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
* or the rb_offset for other coresets
* in time: by its first slot and its first symbol*/
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
dci_idx = 0;
LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb);
LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
// DMRS length is per OFDM symbol
AssertFatal(pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED,
"Interleaved CCE REG MAPPING not supported\n");
uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)?
(n_rb*6) : (pdcch_pdu_rel15->AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = pdcch_pdu_rel15->AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE)
LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d)\n", dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType);
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
/// DMRS QPSK modulation
for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_pdu_rel15->DurationSymbols; symb++) {
nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); //Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_PDCCH_DMRS
for (int i=0; i<dmrs_length>>1; i++)
printf("symb %d i %d gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
for (int i=0; i<dmrs_length>>1; i++)
printf("symb %d i %d gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
#endif
}
/// DCI payload processing
// CRC attachment + Scrambling + Channel coding + Rate matching
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.rnti:0;
uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)?
pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
t_nrPolar_params *currentPtr = nr_polar_params(NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
polar_encoder_fast(dci_alloc.dci_pdu, encoder_output, pdcch_params.rnti, 1, currentPtr);
}
/// DCI payload processing
// CRC attachment + Scrambling + Channel coding + Rate matching
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
uint16_t n_RNTI = pdcch_pdu_rel15->RNTI[d];
uint16_t Nid = pdcch_pdu_rel15->ScramblingId[d];
t_nrPolar_params *currentPtr = nr_polar_params(NR_POLAR_DCI_MESSAGE_TYPE,
pdcch_pdu_rel15->PayloadSizeBits[d],
pdcch_pdu_rel15->AggregationLevel[d],
0,NULL);
polar_encoder_fast((uint64_t*)pdcch_pdu_rel15->Payload[d], encoder_output, n_RNTI,1,currentPtr);
#ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %d\n",pdcch_params.rnti);
printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1]);
printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
printf("polar rnti %x,length %d, L %d\n",n_RNTI, pdcch_pdu_rel15->PayloadSizeBits[d],pdcch_pdu_rel15->AggregationLevel[d]);
printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
((uint64_t*)pdcch_pdu_rel15->Payload[d])[0], ((uint64_t*)pdcch_pdu_rel15->Payload[d])[1]);
printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
for (int i=0; i<encoded_length>>5; i++)
printf("[%d]->0x%08x \t", i,encoder_output[i]);
for (int i=0; i<encoded_length>>5; i++)
printf("[%d]->0x%08x \t", i,encoder_output[i]);
printf("\n");
printf("\n");
#endif
/// Scrambling
uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD]= {0};
nr_pdcch_scrambling(encoder_output, encoded_length, Nid, n_RNTI, scrambled_output);
/// Scrambling
uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD]= {0};
nr_pdcch_scrambling(encoder_output, encoded_length, Nid, n_RNTI, scrambled_output);
#ifdef DEBUG_CHANNEL_CODING
printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\t [4]->0x%08x\t [5]->0x%08x\t \
printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\t [4]->0x%08x\t [5]->0x%08x\t \
[6]->0x%08x \t [7]->0x%08x \t [8]->0x%08x \t [9]->0x%08x\t [10]->0x%08x\t [11]->0x%08x\n",
scrambled_output[0], scrambled_output[1], scrambled_output[2], scrambled_output[3], scrambled_output[4],scrambled_output[5],
scrambled_output[6], scrambled_output[7], scrambled_output[8], scrambled_output[9], scrambled_output[10],scrambled_output[11] );
scrambled_output[0], scrambled_output[1], scrambled_output[2], scrambled_output[3], scrambled_output[4],scrambled_output[5],
scrambled_output[6], scrambled_output[7], scrambled_output[8], scrambled_output[9], scrambled_output[10],scrambled_output[11] );
#endif
/// QPSK modulation
int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
nr_modulation(scrambled_output, encoded_length, DMRS_MOD_ORDER, mod_dci); //Qm = 2 as DMRS is QPSK modulated
/// QPSK modulation
int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
nr_modulation(scrambled_output, encoded_length, DMRS_MOD_ORDER, mod_dci); //Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DCI
for (int i=0; i<encoded_length>>1; i++)
printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
for (int i=0; i<encoded_length>>1; i++)
printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
#endif
/// Resource mapping
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
/*Reorder REG list for a freq first mapping*/
uint8_t nb_regs = pdcch_pdu_rel15->AggregationLevel[d]*NR_NB_REG_PER_CCE;
uint8_t reg_idx0 = pdcch_pdu_rel15->CceIndex[d]*NR_NB_REG_PER_CCE;
/// Resource mapping
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
/*Reorder REG list for a freq first mapping*/
uint8_t nb_regs = dci_alloc.L*NR_NB_REG_PER_CCE;
for (int cce_idx=0; cce_idx<dci_alloc.L; cce_idx++) {
cce = dci_alloc.cce_list[cce_idx];
for (int reg_idx=0; reg_idx<NR_NB_REG_PER_CCE; reg_idx++) {
reg = cce.reg_list[reg_idx];
reg_mapping_list[reg_idx+cce_idx*NR_NB_REG_PER_CCE] = reg;
}
}
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS) {
/*in this case the DMRS are mapped on all the coreset*/
for (l=cset_start_symb; l<cset_start_symb+ cset_nsymb; l++) {
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = 0;
else
dmrs_idx = pdcch_params.rb_offset*3;
k = cset_start_sc + 1;
while (dmrs_idx<3*pdcch_params.n_rb) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = ((amp>>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
dmrs_idx++;
}
}
}
/*Now mapping the encoded DCI based on newly constructed REG list
* and the DMRS for the precoder granularity same as REG bundle*/
for (int reg_idx=0; reg_idx<nb_regs; reg_idx++) {
reg = reg_mapping_list[reg_idx];
k = cset_start_sc + reg.start_sc_idx;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + reg.symb_idx;
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = (reg.reg_idx/cset_nsymb)*3;
else
dmrs_idx = ((reg.reg_idx/cset_nsymb)+pdcch_params.rb_offset)*3;
k_prime = 0;
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = ((amp>>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dmrs_idx++;
}
k_prime++;
} else { // DCI payload
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DCI
printf("l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dci_idx++;
}
k++;
/*Mapping the encoded DCI along with the DMRS */
for (int reg_idx=reg_idx0; reg_idx<(nb_regs+reg_idx0); reg_idx++) {
k = cset_start_sc + (12*reg_idx/cset_nsymb);
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
}
}
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + ((reg_idx/cset_nsymb)%cset_nsymb);
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = (reg_idx/cset_nsymb)*3;
else
dmrs_idx = ((reg_idx/cset_nsymb)+rb_offset)*3;
k_prime = 0;
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (2*amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (2*amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dmrs_idx++;
}
k_prime++;
} else { // DCI payload
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DCI
printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dci_idx++;
}
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
} // m
} // reg_idx
} // for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
return 0;
}
openair1/PHY/NR_TRANSPORT/nr_dci.h
+11 -9
View File
@@ -27,15 +27,14 @@
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
uint16_t N_RB,
nfapi_nr_config_request_t *config);
uint16_t N_RB);
uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config);
NR_DL_FRAME_PARMS frame_parms);
void nr_pdcch_scrambling(uint32_t *in,
uint32_t size,
@@ -45,11 +44,14 @@ void nr_pdcch_scrambling(uint32_t *in,
void nr_fill_dci(PHY_VARS_gNB *gNB,
int frame,
int slot,
NR_gNB_DCI_ALLOC_t *dci_alloc,
nfapi_nr_dl_config_dci_dl_pdu *pdu);
int slot);
void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t *dci_alloc, uint16_t n_shift, uint8_t m);
void nr_fill_ul_dci(PHY_VARS_gNB *gNB,
int frame,
int slot);
void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m);
void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset);
#endif //__PHY_NR_TRANSPORT_DCI__H
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+129 -382
View File
@@ -36,11 +36,14 @@
#include "nr_dlsch.h"
void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m) {
/*
Original version to keep code for Y that needs to be moved to MAC
void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint16_t n_shift, uint8_t m) {
nr_cce_t* cce;
nr_reg_t* reg;
nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params = &dci_alloc->pdcch_params;
nfapi_nr_dl_config_pdcch_pdu_rel15_t* pdcch_pdu = gNB->pdcch_pdu.pdcch;
uint8_t L = dci_alloc->L;
uint8_t bsize = pdcch_params->reg_bundle_size;
@@ -54,7 +57,7 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
AssertFatal(L>=4, "Invalid aggregation level for SIB1 configured PDCCH %d\n", L);
N_cce = N_reg / NR_NB_REG_PER_CCE;
/*Max number of candidates per aggregation level -- SIB1 configured search space only*/
//Max number of candidates per aggregation level -- SIB1 configured search space only
M_s_max = (L==4)?4:(L==8)?2:1;
if (pdcch_params->search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_COMMON)
@@ -113,6 +116,84 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
}
}
*/
void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m) {
nr_cce_t* cce;
nr_reg_t* reg;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu_rel15 = &gNB->pdcch_pdu->pdcch_pdu_rel15;
int bsize = pdcch_pdu_rel15->RegBundleSize;
int R = pdcch_pdu_rel15->InterleaverSize;
int n_shift = pdcch_pdu_rel15->ShiftIndex;
//Max number of candidates per aggregation level -- SIB1 configured search space only
int n_rb,rb_offset;
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
int N_reg = n_rb * pdcch_pdu_rel15->DurationSymbols;
int C;
for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
int L = pdcch_pdu_rel15->AggregationLevel[d];
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1)
AssertFatal(L>=4, "Invalid aggregation level for SIB1 configured PDCCH %d\n", L);
if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
uint16_t assertFatalCond = (N_reg%(bsize*R));
AssertFatal(assertFatalCond == 0,"CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %us, bsize %d R %d)\n",N_reg, bsize, R);
C = N_reg/(bsize*R);
}
LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", m, bsize, R, pdcch_pdu_rel15->CceIndex[d]);
for (uint8_t cce_idx=0; cce_idx<L; cce_idx++) {
cce = &gNB->cce_list[d][cce_idx];
cce->cce_idx = pdcch_pdu_rel15->CceIndex[d] + cce_idx;
LOG_D(PHY, "cce_idx %d\n", cce->cce_idx);
if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
LOG_D(PHY, "Interleaved CCE to REG mapping\n");
uint8_t j = cce->cce_idx, j_prime;
uint8_t r,c,idx;
for (uint8_t bundle_idx=0; bundle_idx<NR_NB_REG_PER_CCE/bsize; bundle_idx++) {
j_prime = 6*j/bsize + bundle_idx;
r = j_prime%R;
c = (j_prime-r)/R;
idx = (r*C + c + n_shift)%(N_reg/bsize);
LOG_D(PHY, "bundle idx = %d \n j = %d \t j_prime = %d \t r = %d \t c = %d\n", idx, j , j_prime, r, c);
for (uint8_t reg_idx=0; reg_idx<bsize; reg_idx++) {
reg = &cce->reg_list[reg_idx];
reg->reg_idx = bsize*idx + reg_idx;
reg->start_sc_idx = (reg->reg_idx/pdcch_pdu_rel15->DurationSymbols) * NR_NB_SC_PER_RB;
reg->symb_idx = reg->reg_idx % pdcch_pdu_rel15->DurationSymbols;
LOG_D(PHY, "reg %d symbol %d start subcarrier %d\n", reg->reg_idx, reg->symb_idx, reg->start_sc_idx);
}
}
}
else { // NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED
LOG_D(PHY, "Non interleaved CCE to REG mapping\n");
for (uint8_t reg_idx=0; reg_idx<NR_NB_REG_PER_CCE; reg_idx++) {
reg = &cce->reg_list[reg_idx];
reg->reg_idx = cce->cce_idx*NR_NB_REG_PER_CCE + reg_idx;
reg->start_sc_idx = (reg->reg_idx/pdcch_pdu_rel15->DurationSymbols) * NR_NB_SC_PER_RB;
reg->symb_idx = reg->reg_idx % pdcch_pdu_rel15->DurationSymbols;
LOG_D(PHY, "reg %d symbol %d start subcarrier %d\n", reg->reg_idx, reg->symb_idx, reg->start_sc_idx);
}
}
}
}
}
/*static inline uint64_t dci_field(uint64_t field, uint8_t size) {
uint64_t ret = 0;
for (int i=0; i<size; i++)
@@ -122,394 +203,60 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
void nr_fill_dci(PHY_VARS_gNB *gNB,
int frame,
int slot,
NR_gNB_DCI_ALLOC_t *dci_alloc,
nfapi_nr_dl_config_dci_dl_pdu *pdcch_pdu) {
int slot) {
uint8_t n_shift;
uint64_t *dci_pdu = (uint64_t*)dci_alloc->dci_pdu;
memset((void*)dci_pdu,0,2*sizeof(uint64_t));
nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdcch_pdu->dci_dl_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &pdcch_pdu->pdcch_params_rel15;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &gNB->pdcch_pdu->pdcch_pdu_rel15;
NR_gNB_DLSCH_t *dlsch;
for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++) {
uint16_t N_RB = params_rel15->n_RB_BWP;
uint8_t fsize=0, pos=0, cand_idx=0;
uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->Payload[i];
int dlsch_id = find_nr_dlsch(params_rel15->rnti,gNB,SEARCH_EXIST_OR_FREE);
if( (dlsch_id<0) || (dlsch_id>=NUMBER_OF_NR_DLSCH_MAX) ){
LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",params_rel15->rnti,dlsch_id);
return;
}
dlsch = gNB->dlsch[dlsch_id][0];
dlsch->slot_tx[slot] = 1;
dlsch->harq_ids[frame%2][slot] = pdu_rel15->harq_pid;
AssertFatal(pdu_rel15->harq_pid < 8 && pdu_rel15->harq_pid >= 0,
"illegal harq_pid %d\n",pdu_rel15->harq_pid);
dlsch->harq_mask |= (1<<pdu_rel15->harq_pid);
dlsch->rnti = params_rel15->rnti;
dci_alloc->L = 8;
memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
dci_alloc->size = nr_get_dci_size(dci_alloc->pdcch_params.dci_format,
dci_alloc->pdcch_params.rnti_type,
N_RB,
cfg);
AssertFatal(dci_alloc->size<=64, "DCI sizes above 64 bits not yet supported");
n_shift = (dci_alloc->pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1)?
cfg->sch_config.physical_cell_id.value : dci_alloc->pdcch_params.shift_index;
nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
/// Payload generation
switch(params_rel15->dci_format) {
case NFAPI_NR_DL_DCI_FORMAT_1_0:
switch(params_rel15->rnti_type) {
case NFAPI_NR_RNTI_RA:
// Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos=fsize;
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("frequency-domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,*dci_pdu);
#endif
// Time domain assignment
pos+=4;
*dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("time-domain assignment %d (3 bits)=> %d (0x%lx)\n",pdu_rel15->time_domain_assignment,dci_alloc->size-pos,*dci_pdu);
#endif
// VRB to PRB mapping
pos++;
*dci_pdu |= ((uint64_t)pdu_rel15->vrb_to_prb_mapping&0x1)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",pdu_rel15->vrb_to_prb_mapping,dci_alloc->size-pos,*dci_pdu);
#endif
// MCS
pos+=5;
*dci_pdu |= ((uint64_t)pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("mcs %d (5 bits)=> %d (0x%lx)\n",pdu_rel15->mcs,dci_alloc->size-pos,*dci_pdu);
#endif
// TB scaling
pos+=2;
*dci_pdu |= ((uint64_t)pdu_rel15->tb_scaling&0x3)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("tb_scaling %d (2 bits)=> %d (0x%lx)\n",pdu_rel15->tb_scaling,dci_alloc->size-pos,*dci_pdu);
#endif
break;
case NFAPI_NR_RNTI_C:
// indicating a DL DCI format 1bit
pos++;
*dci_pdu |= ((uint64_t)pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("Format indicator %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->format_indicator,1,dci_alloc->size-pos,*dci_pdu);
#endif
// Freq domain assignment (275rb >> fsize = 16)
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos+=fsize;
*dci_pdu |= (((uint64_t)pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,*dci_pdu);
#endif
uint16_t is_ra = 1;
for (int i=0; i<fsize; i++)
if (!((pdu_rel15->frequency_domain_assignment>>i)&1)) {
is_ra = 0;
break;
int dlsch_id = find_nr_dlsch(pdcch_pdu_rel15->RNTI[i],gNB,SEARCH_EXIST_OR_FREE);
if( (dlsch_id<0) || (dlsch_id>=NUMBER_OF_NR_DLSCH_MAX) ){
LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",(unsigned int)pdcch_pdu_rel15->RNTI[i],dlsch_id);
return;
}
if (is_ra) //fsize are all 1 38.212 p86
{
// ra_preamble_index 6 bits
pos+=6;
*dci_pdu |= ((pdu_rel15->ra_preamble_index&0x3f)<<(dci_alloc->size-pos));
dlsch = gNB->dlsch[dlsch_id][0];
int harq_pid = 0;//extract_harq_pid(i,pdu_rel15);
// UL/SUL indicator 1 bit
pos++;
*dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos);
dlsch->slot_tx[slot] = 1;
dlsch->harq_ids[frame%2][slot] = harq_pid;
AssertFatal(harq_pid < 8 && harq_pid >= 0,
"illegal harq_pid %d\n",harq_pid);
dlsch->harq_mask |= (1<<harq_pid);
dlsch->rnti = pdcch_pdu_rel15->RNTI[i];
nr_fill_cce_list(gNB,0);
/*
LOG_D(PHY, "DCI PDU: [0]->0x%lx \t [1]->0x%lx \n",dci_pdu[0], dci_pdu[1]);
LOG_D(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
*/
}
}
void nr_fill_ul_dci(PHY_VARS_gNB *gNB,
int frame,
int slot) {
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &gNB->ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15;
for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++) {
uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->Payload[i];
// if there's no DL DCI then generate CCE list
if (gNB->pdcch_pdu) nr_fill_cce_list(gNB,0);
/*
LOG_D(PHY, "DCI PDU: [0]->0x%lx \t [1]->0x%lx \n",dci_pdu[0], dci_pdu[1]);
LOG_D(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
*/
// SS/PBCH index 6 bits
pos+=6;
*dci_pdu |= ((pdu_rel15->ss_pbch_index&0x3f)<<(dci_alloc->size-pos));
// prach_mask_index 4 bits
pos+=4;
*dci_pdu |= ((pdu_rel15->prach_mask_index&0xf)<<(dci_alloc->size-pos));
} //end if
else {
// Time domain assignment 4bit
pos+=4;
*dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("Time domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->time_domain_assignment,4,dci_alloc->size-pos,*dci_pdu);
#endif
// VRB to PRB mapping 1bit
pos++;
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("VRB to PRB %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->vrb_to_prb_mapping,1,dci_alloc->size-pos,*dci_pdu);
#endif
// MCS 5bit //bit over 32, so dci_pdu ++
pos+=5;
*dci_pdu |= (pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("MCS %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->mcs,5,dci_alloc->size-pos,*dci_pdu);
#endif
// New data indicator 1bit
pos++;
*dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("NDI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->ndi,1,dci_alloc->size-pos,*dci_pdu);
#endif
// Redundancy version 2bit
pos+=2;
*dci_pdu |= (pdu_rel15->rv&0x3)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("RV %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->rv,2,dci_alloc->size-pos,*dci_pdu);
#endif
// HARQ process number 4bit
pos+=4;
*dci_pdu |= ((pdu_rel15->harq_pid&0xf)<<(dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("HARQ_PID %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->harq_pid,4,dci_alloc->size-pos,*dci_pdu);
#endif
// Downlink assignment index 2bit
pos+=2;
*dci_pdu |= ((pdu_rel15->dai&3)<<(dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("DAI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->dai,2,dci_alloc->size-pos,*dci_pdu);
#endif
// TPC command for scheduled PUCCH 2bit
pos+=2;
*dci_pdu |= ((pdu_rel15->tpc&3)<<(dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("TPC %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->tpc,2,dci_alloc->size-pos,*dci_pdu);
#endif
// PUCCH resource indicator 3bit
pos+=3;
*dci_pdu |= ((pdu_rel15->pucch_resource_indicator&0x7)<<(dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("PUCCH RI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->pucch_resource_indicator,3,dci_alloc->size-pos,*dci_pdu);
#endif
// PDSCH-to-HARQ_feedback timing indicator 3bit
pos+=3;
*dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->pdsch_to_harq_feedback_timing_indicator,3,dci_alloc->size-pos,*dci_pdu);
#endif
} //end else
break;
case NFAPI_NR_RNTI_P:
// Short Messages Indicator – 2 bits
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_alloc->size-pos++);
// Short Messages – 8 bits
for (int i=0; i<8; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->short_messages>>(7-i))&1)<<(dci_alloc->size-pos++);
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// VRB to PRB mapping 1 bit
*dci_pdu |= ((uint64_t)pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
// MCS 5 bit
for (int i=0; i<5; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// TB scaling 2 bit
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_alloc->size-pos++);
break;
case NFAPI_NR_RNTI_SI:
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// VRB to PRB mapping 1 bit
*dci_pdu |= ((uint64_t)pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
// MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
break;
case NFAPI_NR_RNTI_TC:
// indicating a DL DCI format 1bit
*dci_pdu |= ((uint64_t)pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// VRB to PRB mapping 1 bit
*dci_pdu |= ((uint64_t)pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
// MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// New data indicator 1bit
*dci_pdu |= ((uint64_t)pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
// HARQ process number 4bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
// Downlink assignment index – 2 bits
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->dai>>(1-i))&1)<<(dci_alloc->size-pos++);
// TPC command for scheduled PUCCH – 2 bits
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
// LOG_D(PHY, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n",
// dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
// PDSCH-to-HARQ_feedback timing indicator – 3 bits
for (int i=0; i<3; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<(dci_alloc->size-pos++);
break;
}
break;
case NFAPI_NR_UL_DCI_FORMAT_0_0:
switch(params_rel15->rnti_type)
{
case NFAPI_NR_RNTI_C:
// indicating a DL DCI format 1bit
*dci_pdu |= ((uint64_t)pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
// Freq domain assignment max 16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// Frequency hopping flag – 1 bit
*dci_pdu |= ((uint64_t)pdu_rel15->frequency_hopping_flag&1)<<(dci_alloc->size-pos++);
// MCS 5 bit
for (int i=0; i<5; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// New data indicator 1bit
*dci_pdu |= ((uint64_t)pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
// HARQ process number 4bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
// TPC command for scheduled PUSCH – 2 bits
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
// Padding bits
for(int a = pos;a<32;a++)
*dci_pdu |= ((uint64_t)pdu_rel15->padding&1)<<(dci_alloc->size-pos++);
// UL/SUL indicator – 1 bit
if (cfg->pucch_config.pucch_GroupHopping.value)
*dci_pdu |= ((uint64_t)pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos++);
break;
case NFAPI_NR_RNTI_TC:
// indicating a DL DCI format 1bit
*dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
// Freq domain assignment max 16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// Frequency hopping flag – 1 bit
*dci_pdu |= ((uint64_t)pdu_rel15->frequency_hopping_flag&1)<<(dci_alloc->size-pos++);
// MCS 5 bit
for (int i=0; i<5; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// New data indicator 1bit
*dci_pdu |= ((uint64_t)pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
// HARQ process number 4bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
// TPC command for scheduled PUSCH – 2 bits
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
// Padding bits
for(int a = pos;a<32;a++)
*dci_pdu |= ((uint64_t)pdu_rel15->padding&1)<<(dci_alloc->size-pos++);
// UL/SUL indicator – 1 bit
if (cfg->pucch_config.pucch_GroupHopping.value)
*dci_pdu |= ((uint64_t)pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos++);
break;
}
break;
}
LOG_D(PHY, "DCI PDU: [0]->0x%lx \t [1]->0x%lx \n",dci_pdu[0], dci_pdu[1]);
LOG_D(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
}
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+156 -104
View File
@@ -65,178 +65,230 @@ void nr_pdsch_codeword_scrambling(uint8_t *in,
}
void nr_pdsch_codeword_scrambling_optim(uint8_t *in,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out) {
uint32_t x1, x2, s=0,in32;
x2 = (n_RNTI<<15) + (q<<14) + Nid;
s=lte_gold_generic(&x1, &x2, 1);
#if defined(__AVX2__)
for (int i=0; i<((size>>5)+((size&0x1f) > 0 ? 1 : 0)); i++) {
in32=_mm256_movemask_epi8(_mm256_slli_epi16(((__m256i*)in)[i],7));
out[i]=(in32^s);
// printf("in[%d] %x => %x\n",i,in32,out[i]);
s=lte_gold_generic(&x1, &x2, 0);
}
#elif defined(__SSE4__)
_m128i *in128;
for (int i=0; i<((size>>5)+((size&0x1f) > 0 ? 1 : 0)); i++) {
in128=&((__m128i*)in)[i<<1];
((uint16_t*)&in32)[0] = _mm128_movemask_epi8(_mm256_slli_epi16(in128[0],7));
((uint16_t*)&in32)[1] = _mm128_movemask_epi8(_mm256_slli_epi16(in128[1],7));
out[i]=(in32^s);
s=lte_gold_generic(&x1, &x2, 0);
}
//#elsif defined(__arm__) || defined(__aarch64)
#else
nr_pdsch_codeword_scrambling(in,
size,
q,
Nid,
n_RNTI,
out);
#endif
}
uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
NR_gNB_DCI_ALLOC_t *dci_alloc,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
int frame,
uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_config_request_t *config,
int xOverhead,
time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats) {
time_stats_t *dlsch_modulation_stats,
time_stats_t *tinput,
time_stats_t *tprep,
time_stats_t *tparity,
time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats) {
NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[dci_alloc->harq_pid];
nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &harq->dlsch_pdu.dlsch_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params = dci_alloc->pdcch_params;
int harq_pid = 0;
NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[harq_pid];
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15;
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **mod_symbs = (int16_t**)dlsch->mod_symbs;
int16_t **tx_layers = (int16_t**)dlsch->txdataF;
int8_t Wf[2], Wt[2], l0, l_prime[2], delta;
uint16_t nb_symbols = rel15->nb_mod_symbols;
uint8_t Qm = rel15->modulation_order;
uint32_t encoded_length = nb_symbols*Qm;
uint8_t dmrs_Type = rel15->dmrsConfigType;
int nb_re_dmrs = (dmrs_Type== NFAPI_NR_DMRS_TYPE1) ? 6:4;
uint16_t n_dmrs = ((rel15->rbSize+rel15->rbStart)*nb_re_dmrs)<<1;
int16_t mod_dmrs[n_dmrs<<1];
uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs-xOverhead)*rel15->rbSize*rel15->NrOfCodewords;
uint8_t Qm = rel15->qamModOrder[0];
uint32_t encoded_length = nb_re*Qm;
/// CRC, coding, interleaving and rate matching
AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n");
start_meas(dlsch_encoding_stats);
nr_dlsch_encoding(harq->pdu, frame, slot, dlsch, frame_parms);
nr_dlsch_encoding(harq->pdu, frame, slot, dlsch, frame_parms,tinput,tprep,tparity,toutput,
dlsch_rate_matching_stats,
dlsch_interleaving_stats,
dlsch_segmentation_stats);
stop_meas(dlsch_encoding_stats);
#ifdef DEBUG_DLSCH
printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<harq->B>>7; i++) {
for (int j=0; j<16; j++)
printf("0x%02x\t", harq->pdu[(i<<4)+j]);
printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<harq->B>>7; i++) {
for (int j=0; j<16; j++)
printf("0x%02x\t", harq->pdu[(i<<4)+j]);
printf("\n");
}
printf("\nEncoded payload:\n");
for (int i=0; i<encoded_length>>3; i++) {
for (int j=0; j<8; j++)
printf("%d", harq->f[(i<<3)+j]);
printf("\t");
}
printf("\n");
}
printf("\nEncoded payload:\n");
for (int i=0; i<encoded_length>>3; i++) {
for (int j=0; j<8; j++)
printf("%d", harq->f[(i<<3)+j]);
printf("\t");
}
printf("\n");
#endif
/// scrambling
start_meas(dlsch_scrambling_stats);
for (int q=0; q<rel15->nb_codewords; q++)
for (int q=0; q<rel15->NrOfCodewords; q++)
memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t));
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \
((pdcch_params.scrambling_id==0)?pdcch_params.rnti:0) : 0;
uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \
pdcch_params.scrambling_id : config->sch_config.physical_cell_id.value;
for (int q=0; q<rel15->nb_codewords; q++)
nr_pdsch_codeword_scrambling(harq->f,
encoded_length,
q,
Nid,
n_RNTI,
scrambled_output[q]);
for (int q=0; q<rel15->NrOfCodewords; q++)
nr_pdsch_codeword_scrambling_optim(harq->f,
encoded_length,
q,
rel15->dlDmrsScramblingId,
rel15->rnti,
scrambled_output[q]);
stop_meas(dlsch_scrambling_stats);
#ifdef DEBUG_DLSCH
printf("PDSCH scrambling:\n");
for (int i=0; i<encoded_length>>8; i++) {
for (int j=0; j<8; j++)
printf("0x%08x\t", scrambled_output[0][(i<<3)+j]);
printf("\n");
}
printf("PDSCH scrambling:\n");
for (int i=0; i<encoded_length>>8; i++) {
for (int j=0; j<8; j++)
printf("0x%08x\t", scrambled_output[0][(i<<3)+j]);
printf("\n");
}
#endif
/// Modulation
start_meas(dlsch_modulation_stats);
for (int q=0; q<rel15->nb_codewords; q++)
for (int q=0; q<rel15->NrOfCodewords; q++)
nr_modulation(scrambled_output[q],
encoded_length,
Qm,
mod_symbs[q]);
stop_meas(dlsch_modulation_stats);
#ifdef DEBUG_DLSCH
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_symbols);
for (int i=0; i<nb_symbols>>3; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_symbs[0][((i<<3)+j)<<1], mod_symbs[0][(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
/// Layer mapping
nr_layer_mapping(mod_symbs,
rel15->nb_layers,
nb_symbols,
tx_layers);
#ifdef DEBUG_DLSCH
printf("Layer mapping (%d layers):\n", rel15->nb_layers);
for (int l=0; l<rel15->nb_layers; l++)
for (int i=0; i<(nb_symbols/rel15->nb_layers)>>3; i++) {
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_re);
for (int i=0; i<nb_re>>3; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]);
printf("%d %d\t", mod_symbs[0][((i<<3)+j)<<1], mod_symbs[0][(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
/// Antenna port mapping
//to be moved to init phase potentially, for now tx_layers 1-8 are mapped on antenna ports 1000-1007
/// DMRS QPSK modulation
uint16_t n_dmrs = ((rel15->n_prb+rel15->start_prb)*rel15->nb_re_dmrs)<<1;
int16_t mod_dmrs[n_dmrs<<1];
uint8_t dmrs_type = config->pdsch_config.dmrs_type.value;
uint8_t mapping_type = config->pdsch_config.mapping_type.value;
l0 = get_l0(mapping_type, 2);//config->pdsch_config.dmrs_typeA_position.value);
nr_modulation(pdsch_dmrs[l0][0], n_dmrs, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
/// Layer mapping
nr_layer_mapping(mod_symbs,
rel15->nrOfLayers,
nb_re,
tx_layers);
#ifdef DEBUG_DLSCH
printf("DMRS modulation (single symbol %d, %d symbols, type %d):\n", l0, n_dmrs>>1, dmrs_type);
for (int i=0; i<n_dmrs>>4; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_dmrs[((i<<3)+j)<<1], mod_dmrs[(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
printf("Layer mapping (%d layers):\n", rel15->nrOfLayers);
for (int l=0; l<rel15->nrOfLayers; l++)
for (int i=0; i<(nb_re/rel15->nrOfLayers)>>3; i++) {
printf("layer %d, Re %d..%d : ",l,i<<3,(i<<3)+7);
for (int j=0; j<8; j++) {
printf("l%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
/// Antenna port mapping
//to be moved to init phase potentially, for now tx_layers 1-8 are mapped on antenna ports 1000-1007
/// DMRS QPSK modulation
l0 = get_l0(rel15->dlDmrsSymbPos);
nr_modulation(pdsch_dmrs[l0][0], n_dmrs, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DLSCH
printf("DMRS modulation (single symbol %d, %d symbols, type %d):\n", l0, n_dmrs>>1, dmrs_Type);
for (int i=0; i<n_dmrs>>4; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_dmrs[((i<<3)+j)<<1], mod_dmrs[(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
/// Resource mapping
// Non interleaved VRB to PRB mapping
uint16_t start_sc = frame_parms->first_carrier_offset + rel15->start_prb*NR_NB_SC_PER_RB;
uint16_t start_sc = frame_parms->first_carrier_offset + rel15->rbStart*NR_NB_SC_PER_RB;
if (start_sc >= frame_parms->ofdm_symbol_size)
start_sc -= frame_parms->ofdm_symbol_size;
#ifdef DEBUG_DLSCH_MAPPING
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_symbols %d)\n",
start_sc, rel15->start_symbol, rel15->n_prb, rel15->nb_symbols);
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n",
start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers);
#endif
for (int ap=0; ap<rel15->nb_layers; ap++) {
for (int ap=0; ap<rel15->nrOfLayers; ap++) {
// DMRS params for this ap
get_Wt(Wt, ap, dmrs_type);
get_Wf(Wf, ap, dmrs_type);
delta = get_delta(ap, dmrs_type);
get_Wt(Wt, ap, dmrs_Type);
get_Wf(Wf, ap, dmrs_Type);
delta = get_delta(ap, dmrs_Type);
l_prime[0] = 0; // single symbol ap 0
uint8_t dmrs_symbol = l0+l_prime[0];
#ifdef DEBUG_DLSCH_MAPPING
printf("DMRS params for ap %d: Wt %d %d \t Wf %d %d \t delta %d \t l_prime %d \t l0 %d\tDMRS symbol %d\n",
ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime[0], l0, dmrs_symbol);
printf("DMRS Type %d params for ap %d: Wt %d %d \t Wf %d %d \t delta %d \t l_prime %d \t l0 %d\tDMRS symbol %d\n",
1+dmrs_Type,ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime[0], l0, dmrs_symbol);
#endif
uint8_t k_prime=0;
uint16_t m=0, n=0, dmrs_idx=0, k=0;
int txdataF_offset = (slot%2)*frame_parms->samples_per_slot_wCP;
if (dmrs_type == NFAPI_NR_DMRS_TYPE1) // another if condition to be included to check pdsch config type (reference of k)
dmrs_idx = rel15->start_prb*6;
else
dmrs_idx = rel15->start_prb*4;
for (int l=rel15->start_symbol; l<rel15->start_symbol+rel15->nb_symbols; l++) {
int txdataF_offset = (slot%2)*frame_parms->samples_per_slot_wCP;
if (dmrs_Type == NFAPI_NR_DMRS_TYPE1) // another if condition to be included to check pdsch config type (reference of k)
dmrs_idx = rel15->rbStart*6;
else
dmrs_idx = rel15->rbStart*4;
for (int l=rel15->StartSymbolIndex; l<rel15->StartSymbolIndex+rel15->NrOfSymbols; l++) {
k = start_sc;
for (int i=0; i<rel15->n_prb*NR_NB_SC_PER_RB; i++) {
if ((l == dmrs_symbol) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_type))%(frame_parms->ofdm_symbol_size)))) {
for (int i=0; i<rel15->rbSize*NR_NB_SC_PER_RB; i++) {
if ((l == dmrs_symbol) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
#endif
dmrs_idx++;
k_prime++;
@@ -249,9 +301,9 @@ dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
#endif
m++;
}
openair1/PHY/NR_TRANSPORT/nr_dlsch.h
+29 -12
View File
@@ -36,10 +36,10 @@
#include "PHY/defs_gNB.h"
void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu);
nfapi_nr_dl_tti_pdcch_pdu dci_pdu,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu);
void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config);
void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15,nfapi_nr_config_request_t *cfg);
uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB);
@@ -51,7 +51,10 @@ void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type);
void nr_get_rbg_list(uint32_t bitmap, uint8_t n_rbg, uint8_t* rbg_list);
void nr_get_PRG_parms(NR_BWP_PARMS* bwp, NR_gNB_DCI_ALLOC_t dci_alloc, uint8_t prb_bundling_type);
uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx);
void nr_pdsch_codeword_scrambling(uint8_t *in,
uint32_t size,
@@ -63,24 +66,31 @@ void nr_pdsch_codeword_scrambling(uint8_t *in,
void nr_fill_dlsch(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
unsigned char *sdu);
uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
NR_gNB_DCI_ALLOC_t *dci_alloc,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
int frame,
uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_config_request_t *config,
int xOverhead,
time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats);
time_stats_t *dlsch_modulation_stats,
time_stats_t *tinput,
time_stats_t *tprep,
time_stats_t *tparity,
time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats);
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr);
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr,uint16_t N_RB);
void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
@@ -89,9 +99,16 @@ void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch);
int16_t find_nr_dlsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type);
int nr_dlsch_encoding(unsigned char *a,int frame,
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms);
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms,
time_stats_t *tinput,
time_stats_t *tprep,
time_stats_t *tparity,
time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats);
void nr_emulate_dlsch_payload(uint8_t* payload, uint16_t size);
openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
+150 -98
View File
@@ -35,12 +35,12 @@
#include "PHY/CODING/coding_extern.h"
#include "PHY/CODING/coding_defs.h"
#include "PHY/CODING/lte_interleaver_inline.h"
#include "PHY/CODING/nrLDPC_encoder/defs.h"
#include "PHY/CODING/nrLDPC_extern.h"
#include "PHY/NR_TRANSPORT/nr_transport.h"
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "openair2/LAYER2/NR_MAC_gNB/mac_proto.h"
#include "SCHED_NR/sched_nr.h"
#include "defs.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "common/utils/LOG/log.h"
#include <syscall.h>
@@ -48,43 +48,71 @@
//#define DEBUG_DLSCH_CODING
//#define DEBUG_DLSCH_FREE 1
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr)
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr,uint16_t N_RB)
{
int i;
int r;
NR_gNB_DLSCH_t *dlsch = *dlschptr;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
if (dlsch) {
if (N_RB != 273) {
a_segments = a_segments*N_RB;
a_segments = a_segments/273;
}
uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
#ifdef DEBUG_DLSCH_FREE
printf("Freeing dlsch %p\n",dlsch);
LOG_D(PHY,"Freeing dlsch %p\n",dlsch);
#endif
for (i=0; i<dlsch->Mdlharq; i++) {
#ifdef DEBUG_DLSCH_FREE
printf("Freeing dlsch process %d\n",i);
LOG_D(PHY,"Freeing dlsch process %d\n",i);
#endif
if (dlsch->harq_processes[i]) {
#ifdef DEBUG_DLSCH_FREE
printf("Freeing dlsch process %d (%p)\n",i,dlsch->harq_processes[i]);
LOG_D(PHY,"Freeing dlsch process %d (%p)\n",i,dlsch->harq_processes[i]);
#endif
if (dlsch->harq_processes[i]->b) {
free16(dlsch->harq_processes[i]->b,MAX_DLSCH_PAYLOAD_BYTES); //this should be MAX_NR_DLSCH_PAYLOAD_BYTES
free16(dlsch->harq_processes[i]->b,dlsch_bytes);
dlsch->harq_processes[i]->b = NULL;
#ifdef DEBUG_DLSCH_FREE
printf("Freeing dlsch process %d b (%p)\n",i,dlsch->harq_processes[i]->b);
LOG_D(PHY,"Freeing dlsch process %d b (%p)\n",i,dlsch->harq_processes[i]->b);
#endif
}
if (dlsch->harq_processes[i]->e) {
free16(dlsch->harq_processes[i]->e,14*N_RB*12*8);
dlsch->harq_processes[i]->e = NULL;
#ifdef DEBUG_DLSCH_FREE
printf("Freeing dlsch process %d e (%p)\n",i,dlsch->harq_processes[i]->e);
#endif
}
if (dlsch->harq_processes[i]->f) {
free16(dlsch->harq_processes[i]->f,14*N_RB*12*8);
dlsch->harq_processes[i]->f = NULL;
#ifdef DEBUG_DLSCH_FREE
printf("Freeing dlsch process %d f (%p)\n",i,dlsch->harq_processes[i]->f);
#endif
}
#ifdef DEBUG_DLSCH_FREE
printf("Freeing dlsch process %d c (%p)\n",i,dlsch->harq_processes[i]->c);
LOG_D(PHY,"Freeing dlsch process %d c (%p)\n",i,dlsch->harq_processes[i]->c);
#endif
for (r=0; r<MAX_NUM_DLSCH_SEGMENTS; r++) {
for (r=0; r<a_segments; r++) {
#ifdef DEBUG_DLSCH_FREE
printf("Freeing dlsch process %d c[%d] (%p)\n",i,r,dlsch->harq_processes[i]->c[r]);
LOG_D(PHY,"Freeing dlsch process %d c[%d] (%p)\n",i,r,dlsch->harq_processes[i]->c[r]);
#endif
if (dlsch->harq_processes[i]->c[r]) {
@@ -108,31 +136,27 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr)
}
NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
unsigned char Kmimo,
unsigned char Mdlharq,
uint32_t Nsoft,
uint8_t abstraction_flag,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_config_request_t *config)
uint8_t abstraction_flag,
uint16_t N_RB)
{
NR_gNB_DLSCH_t *dlsch;
unsigned char exit_flag = 0,i,r,aa,layer;
int re;
unsigned char bw_scaling =1;
uint16_t N_RB = config->rf_config.dl_carrier_bandwidth.value;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
switch (N_RB) {
if (N_RB != 273) {
a_segments = a_segments*N_RB;
a_segments = a_segments/273;
}
case 106:
bw_scaling =2;
break;
default:
bw_scaling =1;
break;
}
uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
dlsch = (NR_gNB_DLSCH_t *)malloc16(sizeof(NR_gNB_DLSCH_t));
if (dlsch) {
@@ -145,12 +169,12 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
for (layer=0; layer<NR_MAX_NB_LAYERS; layer++) {
dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*));
for (aa=0; aa<64; aa++) {
for (aa=0; aa<64; aa++) {
dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
for (re=0;re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) {
dlsch->ue_spec_bf_weights[layer][aa][re] = 0x00007fff;
}
}
}
dlsch->txdataF[layer] = (int32_t *)malloc16((NR_MAX_PDSCH_ENCODED_LENGTH/NR_MAX_NB_LAYERS)*sizeof(int32_t)); // NR_MAX_NB_LAYERS is already included in NR_MAX_PDSCH_ENCODED_LENGTH
}
@@ -171,31 +195,31 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
for (i=0; i<Mdlharq; i++) {
dlsch->harq_processes[i] = (NR_DL_gNB_HARQ_t *)malloc16(sizeof(NR_DL_gNB_HARQ_t));
LOG_T(PHY, "Required mem size %d (bw scaling %d), dlsch->harq_processes[%d] %p\n",
MAX_NR_DLSCH_PAYLOAD_BYTES/bw_scaling,bw_scaling, i,dlsch->harq_processes[i]);
LOG_T(PHY, "Required mem size %d dlsch->harq_processes[%d] %p\n",
dlsch_bytes, i,dlsch->harq_processes[i]);
if (dlsch->harq_processes[i]) {
bzero(dlsch->harq_processes[i],sizeof(NR_DL_gNB_HARQ_t));
// dlsch->harq_processes[i]->first_tx=1;
dlsch->harq_processes[i]->b = (unsigned char*)malloc16(MAX_NR_DLSCH_PAYLOAD_BYTES/bw_scaling);
dlsch->harq_processes[i]->pdu = (uint8_t*)malloc16(MAX_NR_DLSCH_PAYLOAD_BYTES/bw_scaling);
dlsch->harq_processes[i]->b = (unsigned char*)malloc16(dlsch_bytes);
dlsch->harq_processes[i]->pdu = (uint8_t*)malloc16(dlsch_bytes);
if (dlsch->harq_processes[i]->pdu) {
bzero(dlsch->harq_processes[i]->pdu,MAX_NR_DLSCH_PAYLOAD_BYTES/bw_scaling);
nr_emulate_dlsch_payload(dlsch->harq_processes[i]->pdu, (MAX_NR_DLSCH_PAYLOAD_BYTES/bw_scaling)>>3);
bzero(dlsch->harq_processes[i]->pdu,dlsch_bytes);
nr_emulate_dlsch_payload(dlsch->harq_processes[i]->pdu, (dlsch_bytes)>>3);
} else {
printf("Can't allocate PDU\n");
LOG_D(PHY,"Can't allocate PDU\n");
exit_flag=1;
}
if (dlsch->harq_processes[i]->b) {
bzero(dlsch->harq_processes[i]->b,MAX_NR_DLSCH_PAYLOAD_BYTES/bw_scaling);
bzero(dlsch->harq_processes[i]->b,dlsch_bytes);
} else {
printf("Can't get b\n");
LOG_D(PHY,"Can't get b\n");
exit_flag=1;
}
if (abstraction_flag==0) {
for (r=0; r<MAX_NUM_NR_DLSCH_SEGMENTS/bw_scaling; r++) {
for (r=0; r<a_segments; r++) {
// account for filler in first segment and CRCs for multiple segment case
// [hna] 8448 is the maximum CB size in NR
// 68*348 = 68*(maximum size of Zc)
@@ -205,19 +229,33 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
if (dlsch->harq_processes[i]->c[r]) {
bzero(dlsch->harq_processes[i]->c[r],8448);
} else {
printf("Can't get c\n");
LOG_D(PHY,"Can't get c\n");
exit_flag=2;
}
if (dlsch->harq_processes[i]->d[r]) {
bzero(dlsch->harq_processes[i]->d[r],(3*8448));
} else {
printf("Can't get d\n");
LOG_D(PHY,"Can't get d\n");
exit_flag=2;
}
}
dlsch->harq_processes[i]->e = (uint8_t*)malloc16(14*N_RB*12*8);
if (dlsch->harq_processes[i]->e) {
bzero(dlsch->harq_processes[i]->e,14*N_RB*12*8);
} else {
printf("Can't get e\n");
exit_flag=1;
}
dlsch->harq_processes[i]->f = (uint8_t*)malloc16(14*N_RB*12*8);
if (dlsch->harq_processes[i]->f) {
bzero(dlsch->harq_processes[i]->f,14*N_RB*12*8);
} else {
printf("Can't get f\n");
exit_flag=1;
}
}
} else {
printf("Can't get harq_p %d\n",i);
LOG_D(PHY,"Can't get harq_p %d\n",i);
exit_flag=3;
}
}
@@ -233,7 +271,9 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
LOG_D(PHY,"new_gNB_dlsch exit flag %d, size of %ld\n",
exit_flag, sizeof(NR_gNB_DLSCH_t));
free_gNB_dlsch(&dlsch);
free_gNB_dlsch(&dlsch,N_RB);
return(NULL);
@@ -261,7 +301,7 @@ void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
dlsch->harq_processes[i]->round = 0;
for (j=0; j<96; j++)
for (r=0; r<MAX_NUM_DLSCH_SEGMENTS; r++)
for (r=0; r<MAX_NUM_NR_DLSCH_SEGMENTS; r++)
if (dlsch->harq_processes[i]->d[r])
dlsch->harq_processes[i]->d[r][j] = NR_NULL;
@@ -274,59 +314,54 @@ int nr_dlsch_encoding(unsigned char *a,
int frame,
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms)
NR_DL_FRAME_PARMS* frame_parms,
time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats)
{
unsigned int G;
unsigned int crc=1;
uint8_t harq_pid = dlsch->harq_ids[frame&2][slot];
uint8_t harq_pid = dlsch->harq_ids[frame%2][slot];
AssertFatal(harq_pid<8 && harq_pid>=0,"illegal harq_pid %d\b",harq_pid);
nfapi_nr_dl_config_dlsch_pdu_rel15_t rel15 = dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15;
uint16_t nb_rb = rel15.n_prb;
uint8_t nb_symb_sch = rel15.nb_symbols;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->pdsch_pdu.pdsch_pdu_rel15;
uint16_t nb_rb = rel15->rbSize;
uint8_t nb_symb_sch = rel15->NrOfSymbols;
uint32_t A, Z, Kb, F=0;
uint32_t *Zc = &Z;
uint8_t mod_order = rel15.modulation_order;
uint8_t mod_order = rel15->qamModOrder[0];
uint16_t Kr=0,r;
uint32_t r_offset=0;
//uint8_t *d_tmp[MAX_NUM_DLSCH_SEGMENTS];
uint8_t BG=1;
uint32_t E;
uint8_t Ilbrm = 1;
uint32_t Tbslbrm = 950984; //max tbs
uint8_t nb_re_dmrs = rel15.nb_re_dmrs;
uint16_t R=rel15.coding_rate;
uint16_t length_dmrs = 1;
uint8_t nb_re_dmrs = rel15->dmrsConfigType==NFAPI_NR_DMRS_TYPE1 ? 6:4;
uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos);
uint16_t R=rel15->targetCodeRate[0];
float Coderate = 0.0;
uint8_t Nl = 4;
/*
uint8_t *channel_input[MAX_NUM_DLSCH_SEGMENTS]; //unsigned char
for(j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
channel_input[j] = (unsigned char *)malloc16(sizeof(unsigned char) * 68*384);
}
*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN);
A = rel15.transport_block_size;
A = rel15->TBSize[0]<<3;
G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs,mod_order,rel15.nb_layers);
G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs,mod_order,rel15->nrOfLayers);
LOG_D(PHY,"dlsch coding A %d G %d mod_order %d\n", A,G, mod_order);
// if (dlsch->harq_processes[harq_pid]->Ndi == 1) { // this is a new packet
if (dlsch->harq_processes[harq_pid]->round == 0) { // this is a new packet
#ifdef DEBUG_DLSCH_CODING
printf("encoding thinks this is a new packet \n");
LOG_D(PHY,"encoding thinks this is a new packet \n");
#endif
/*
/*
int i;
printf("dlsch (tx): \n");
LOG_D(PHY,"dlsch (tx): \n");
for (i=0;i<(A>>3);i++)
printf("%02x.",a[i]);
printf("\n");
*/
LOG_D(PHY,"%02x\n",a[i]);
LOG_D(PHY,"\n");
*/
if (A > 3824) {
// Add 24-bit crc (polynomial A) to payload
@@ -340,7 +375,7 @@ int nr_dlsch_encoding(unsigned char *a,
dlsch->harq_processes[harq_pid]->B = A+24;
// dlsch->harq_processes[harq_pid]->b = a;
AssertFatal((A/8)+4 <= MAX_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,MAX_DLSCH_PAYLOAD_BYTES);
AssertFatal((A/8)+4 <= MAX_NR_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,MAX_NR_DLSCH_PAYLOAD_BYTES);
memcpy(dlsch->harq_processes[harq_pid]->b,a,(A/8)+4); // why is this +4 if the CRC is only 3 bytes?
}
@@ -355,7 +390,7 @@ int nr_dlsch_encoding(unsigned char *a,
dlsch->harq_processes[harq_pid]->B = A+16;
// dlsch->harq_processes[harq_pid]->b = a;
AssertFatal((A/8)+3 <= MAX_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,MAX_DLSCH_PAYLOAD_BYTES);
AssertFatal((A/8)+3 <= MAX_NR_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,MAX_NR_DLSCH_PAYLOAD_BYTES);
memcpy(dlsch->harq_processes[harq_pid]->b,a,(A/8)+3); // using 3 bytes to mimic the case of 24 bit crc
}
@@ -369,6 +404,7 @@ int nr_dlsch_encoding(unsigned char *a,
else
BG = 1;
start_meas(dlsch_segmentation_stats);
Kb = nr_segmentation(dlsch->harq_processes[harq_pid]->b,
dlsch->harq_processes[harq_pid]->c,
dlsch->harq_processes[harq_pid]->B,
@@ -377,7 +413,7 @@ int nr_dlsch_encoding(unsigned char *a,
Zc,
&dlsch->harq_processes[harq_pid]->F,
BG);
stop_meas(dlsch_segmentation_stats);
F = dlsch->harq_processes[harq_pid]->F;
Kr = dlsch->harq_processes[harq_pid]->K;
@@ -392,21 +428,28 @@ int nr_dlsch_encoding(unsigned char *a,
//d_tmp[r] = &dlsch->harq_processes[harq_pid]->d[r][0];
//channel_input[r] = &dlsch->harq_processes[harq_pid]->d[r][0];
#ifdef DEBUG_DLSCH_CODING
printf("Encoder: B %d F %d \n",dlsch->harq_processes[harq_pid]->B, dlsch->harq_processes[harq_pid]->F);
printf("start ldpc encoder segment %d/%d\n",r,dlsch->harq_processes[harq_pid]->C);
printf("input %d %d %d %d %d \n", dlsch->harq_processes[harq_pid]->c[r][0], dlsch->harq_processes[harq_pid]->c[r][1], dlsch->harq_processes[harq_pid]->c[r][2],dlsch->harq_processes[harq_pid]->c[r][3], dlsch->harq_processes[harq_pid]->c[r][4]);
LOG_D(PHY,"Encoder: B %d F %d \n",dlsch->harq_processes[harq_pid]->B, dlsch->harq_processes[harq_pid]->F);
LOG_D(PHY,"start ldpc encoder segment %d/%d\n",r,dlsch->harq_processes[harq_pid]->C);
LOG_D(PHY,"input %d %d %d %d %d \n", dlsch->harq_processes[harq_pid]->c[r][0], dlsch->harq_processes[harq_pid]->c[r][1], dlsch->harq_processes[harq_pid]->c[r][2],dlsch->harq_processes[harq_pid]->c[r][3], dlsch->harq_processes[harq_pid]->c[r][4]);
for (int cnt =0 ; cnt < 22*(*Zc)/8; cnt ++){
printf("%d ", dlsch->harq_processes[harq_pid]->c[r][cnt]);
LOG_D(PHY,"%d ", dlsch->harq_processes[harq_pid]->c[r][cnt]);
}
printf("\n");
LOG_D(PHY,"\n");
#endif
//ldpc_encoder_orig((unsigned char*)dlsch->harq_processes[harq_pid]->c[r],dlsch->harq_processes[harq_pid]->d[r],*Zc,Kb,Kr,BG,0);
//ldpc_encoder_optim((unsigned char*)dlsch->harq_processes[harq_pid]->c[r],(unsigned char*)&dlsch->harq_processes[harq_pid]->d[r][0],*Zc,Kb,Kr,BG,NULL,NULL,NULL,NULL);
}
encoder_implemparams_t impp;
impp.n_segments=dlsch->harq_processes[harq_pid]->C;
impp.tprep = tprep;
impp.tinput = tinput;
impp.tparity = tparity;
impp.toutput = toutput;
for(int j=0;j<(dlsch->harq_processes[harq_pid]->C/8+1);j++) {
ldpc_encoder_optim_8seg_multi(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,*Zc,Kb,Kr,BG,dlsch->harq_processes[harq_pid]->C,j,NULL,NULL,NULL,NULL);
impp.macro_num=j;
nrLDPC_encoder(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,*Zc,Kb,Kr,BG,&impp);
}
@@ -419,34 +462,40 @@ int nr_dlsch_encoding(unsigned char *a,
for (r=0; r<dlsch->harq_processes[harq_pid]->C; r++) {
if (dlsch->harq_processes[harq_pid]->F>0) {
if (F>0) {
for (int k=(Kr-F-2*(*Zc)); k<Kr-2*(*Zc); k++) {
// writing into positions d[r][k-2Zc] as in clause 5.3.2 step 2) in 38.212
dlsch->harq_processes[harq_pid]->d[r][k] = NR_NULL;
//if (k<(Kr-F+8))
//printf("r %d filler bits [%d] = %d \n", r,k, dlsch->harq_processes[harq_pid]->d[r][k]);
}
}
#ifdef DEBUG_DLSCH_CODING
printf("Rate Matching, Code segment %d (coded bits (G) %u, unpunctured/repeated bits per code segment %d, mod_order %d, nb_rb %d)...\n",
r,
G,
Kr*3,
mod_order,nb_rb);
#endif
#ifdef DEBUG_DLSCH_CODING
printf("rvidx in encoding = %d\n", rel15.redundancy_version);
LOG_D(PHY,"rvidx in encoding = %d\n", rel15->rvIndex[0]);
#endif
E = nr_get_E(G, dlsch->harq_processes[harq_pid]->C, mod_order, rel15.nb_layers, r);
E = nr_get_E(G, dlsch->harq_processes[harq_pid]->C, mod_order, rel15->nrOfLayers, r);
//#ifdef DEBUG_DLSCH_CODING
LOG_D(PHY,"Rate Matching, Code segment %d/%d (coded bits (G) %u, E %d, Filler bits %d, Filler offset %d mod_order %d, nb_rb %d)...\n",
r,
dlsch->harq_processes[harq_pid]->C,
G,
E,
F,
Kr-F-2*(*Zc),
mod_order,nb_rb);
// for tbslbrm calculation according to 5.4.2.1 of 38.212
if (rel15.nb_layers < Nl)
Nl = rel15.nb_layers;
if (rel15->nrOfLayers < Nl)
Nl = rel15->nrOfLayers;
Tbslbrm = nr_compute_tbslbrm(rel15.mcs_table,nb_rb,Nl,dlsch->harq_processes[harq_pid]->C);
Tbslbrm = nr_compute_tbslbrm(rel15->mcsTable[0],nb_rb,Nl,dlsch->harq_processes[harq_pid]->C);
start_meas(dlsch_rate_matching_stats);
nr_rate_matching_ldpc(Ilbrm,
Tbslbrm,
BG,
@@ -454,19 +503,22 @@ int nr_dlsch_encoding(unsigned char *a,
dlsch->harq_processes[harq_pid]->d[r],
dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->C,
rel15.redundancy_version,
F,
Kr-F-2*(*Zc),
rel15->rvIndex[0],
E);
stop_meas(dlsch_rate_matching_stats);
#ifdef DEBUG_DLSCH_CODING
for (int i =0; i<16; i++)
printf("output ratematching e[%d]= %d r_offset %u\n", i,dlsch->harq_processes[harq_pid]->e[i+r_offset], r_offset);
#endif
nr_interleaving_ldpc(E,
mod_order,
dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->f+r_offset);
start_meas(dlsch_interleaving_stats);
nr_interleaving_ldpc(E,
mod_order,
dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->f+r_offset);
stop_meas(dlsch_interleaving_stats);
#ifdef DEBUG_DLSCH_CODING
for (int i =0; i<16; i++)
openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c
+26 -34
View File
@@ -27,6 +27,7 @@
* \company Eurecom
* \email: desouza@eurecom.fr
* \note
* \warning
*/
@@ -46,6 +47,7 @@ uint8_t nr_pdsch_default_time_alloc_C_L[15] = {2,2,2,2,2,4,4,4,4,4,7,12,11,6,6};
/// Time domain allocation routines
/*
void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu) {
@@ -73,9 +75,9 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
case NFAPI_NR_RNTI_RA:
case NFAPI_NR_RNTI_TC:
/*AssertFatal(dci_alloc.pdcch_params.common_search_space_type == NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_1,
"Invalid common search space type %d for RNTI %d, expected %d\n",dci_alloc.pdcch_params.common_search_space_type,
NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_1, dci_alloc.rnti_type);*/
//AssertFatal(dci_alloc.pdcch_params.common_search_space_type == NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_1,
//"Invalid common search space type %d for RNTI %d, expected %d\n",dci_alloc.pdcch_params.common_search_space_type,
//NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_1, dci_alloc.rnti_type);
*alloc_type = (alloc_list_flag) ? NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_ALLOC_LIST : NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A;
break;
@@ -94,6 +96,7 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
}
}
uint16_t get_SLIV(uint8_t S, uint8_t L) {
return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) );
}
@@ -104,26 +107,26 @@ static inline uint8_t get_K0(uint8_t row_idx, uint8_t time_alloc_type) {
((row_idx==6)||(row_idx==7)||(row_idx==15))? 1 : 0);
}
/*ideally combine the calculation of L in the same function once the right struct is defined*/
uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position) {
// ideally combine the calculation of L in the same function once the right struct is defined
uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_TypeA_Position) {
uint8_t idx;
//uint8_t S;
switch(time_alloc_type) {
case NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A:
idx = (row_idx>7)? (row_idx+6) : (((row_idx-1)<<1)-1+((dmrs_typeA_position==2)?0:1));
idx = (row_idx>7)? (row_idx+6) : (((row_idx-1)<<1)-1+((dmrs_TypeA_Position==2)?0:1));
return ((CP==NFAPI_CP_NORMAL)?nr_pdsch_default_time_alloc_A_S_nCP[idx] : nr_pdsch_default_time_alloc_A_S_eCP[idx]);
break;
case NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_B:
idx = (row_idx<14)? (row_idx-1) : (row_idx == 14)? row_idx-1+((dmrs_typeA_position==2)?0:1) : 15;
idx = (row_idx<14)? (row_idx-1) : (row_idx == 14)? row_idx-1+((dmrs_TypeA_Position==2)?0:1) : 15;
return (nr_pdsch_default_time_alloc_B_S[idx]);
break;
case NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C:
AssertFatal((row_idx!=6)&&(row_idx!=7)&&(row_idx<17), "Invalid row index %d in %s %s\n", row_idx, __FUNCTION__, __FILE__);
idx = (row_idx<6)? (row_idx-1) : (row_idx<14)? (row_idx-3) : (row_idx == 14)? row_idx-3+((dmrs_typeA_position==2)?0:1) : (row_idx-2);
idx = (row_idx<6)? (row_idx-1) : (row_idx<14)? (row_idx-3) : (row_idx == 14)? row_idx-3+((dmrs_TypeA_Position==2)?0:1) : (row_idx-2);
break;
default:
@@ -132,16 +135,17 @@ uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t d
return 0; // temp warning fix
}
void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config) {
switch (config.subframe_config.dl_cyclic_prefix_type.value) {
void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15,nfapi_nr_config_request_t *cfg) {
switch (cfg->subframe_config.dl_cyclic_prefix_type.value) {
case NFAPI_CP_NORMAL:
if (config.pdsch_config.mapping_type.value == NFAPI_NR_PDSCH_MAPPING_TYPE_A) {
if (rel15->mapping_type == NFAPI_NR_PDSCH_MAPPING_TYPE_A) {
AssertFatal(S<4, "Invalid value of S(%d) for mapping type A and normal CP\n", S);
if (S==3)
AssertFatal(config.pdsch_config.mapping_type.value == 3, "Invalid S %d for dmrs_typeA_position %d\n",
S, config.pdsch_config.dmrs_typeA_position.value);
AssertFatal(rel15->dmrs_TypeA_Position == 3, "Invalid S %d for dmrs_TypeA_Position %d\n",
S, rel15->dmrs_TypeA_Position);
AssertFatal((L>2)&&(L<15), "Invalid L %d for mapping type A and normal CP\n", L);
@@ -157,12 +161,12 @@ void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config)
break;
case NFAPI_CP_EXTENDED:
if (config.pdsch_config.mapping_type.value == NFAPI_NR_PDSCH_MAPPING_TYPE_A) {
if (rel15->mapping_type == NFAPI_NR_PDSCH_MAPPING_TYPE_A) {
AssertFatal(S<4, "Invalid value of S(%d) for mapping type A and extended CP\n", S);
if (S==3)
AssertFatal(config.pdsch_config.dmrs_typeA_position.value == 3, "Invalid S %d for dmrs_typeA_position %d\n",
S, config.pdsch_config.dmrs_typeA_position.value);
AssertFatal(rel15->dmrs_TypeA_Position == 3, "Invalid S %d for dmrs_TypeA_Position %d\n",
S, rel15->dmrs_TypeA_Position);
AssertFatal((L>2)&&(L<13), "Invalid L %d for mapping type A and extended CP\n", L);
@@ -241,6 +245,7 @@ void nr_get_PRG_parms(NR_BWP_PARMS* bwp, NR_gNB_DCI_ALLOC_t dci_alloc, uint8_t p
LOG_I(PHY, "PRG parameters for BWP %d location %d N_RB %d:\n", bwp->bwp_id, bwp->location, bwp->N_RB);
LOG_I(PHY, "P_prime %d\t start size %d\t endsize %d\t N_PRG %d\n", prg_parms->P_prime, prg_parms->start_size, prg_parms->end_size, prg_parms->N_PRG);
}
*/
/// Payload emulation
void nr_emulate_dlsch_payload(uint8_t* pdu, uint16_t size) {
@@ -292,10 +297,10 @@ int16_t find_nr_ulsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type) {
void nr_fill_dlsch(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu) {
nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &dlsch_pdu->dlsch_pdu_rel15;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &pdsch_pdu->pdsch_pdu_rel15;
int dlsch_id = find_nr_dlsch(rel15->rnti,gNB,SEARCH_EXIST);
AssertFatal( (dlsch_id>=0) && (dlsch_id<NUMBER_OF_NR_DLSCH_MAX),
@@ -303,7 +308,8 @@ void nr_fill_dlsch(PHY_VARS_gNB *gNB,
NR_gNB_DLSCH_t *dlsch = gNB->dlsch[dlsch_id][0];
NR_DL_gNB_HARQ_t **harq = dlsch->harq_processes;
/// DLSCH struct
memcpy((void*)&harq[dlsch->harq_ids[frame%2][slot]]->dlsch_pdu, (void*)dlsch_pdu, sizeof(nfapi_nr_dl_config_dlsch_pdu));
memcpy((void*)&harq[dlsch->harq_ids[frame%2][slot]]->pdsch_pdu, (void*)pdsch_pdu, sizeof(nfapi_nr_dl_tti_pdsch_pdu));
gNB->num_pdsch_rnti++;
AssertFatal(sdu!=NULL,"sdu is null\n");
harq[dlsch->harq_ids[frame%2][slot]]->pdu = sdu;
@@ -327,23 +333,9 @@ void nr_fill_ulsch(PHY_VARS_gNB *gNB,
ulsch->harq_mask |= 1<<harq_pid;
ulsch->harq_process_id[slot] = harq_pid;
nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch->harq_processes[harq_pid]->ulsch_pdu;
memcpy((void*)&ulsch->harq_processes[harq_pid]->ulsch_pdu, (void*)ulsch_pdu, sizeof(nfapi_nr_pusch_pdu_t));
LOG_D(PHY,"Initializing nFAPI for ULSCH, UE %d, harq_pid %d\n",ulsch_id,harq_pid);
//FK this is still a bad hack. We need to replace the L1 FAPI structures with the new scf ones as well.
rel15_ul->rnti = ulsch_pdu->rnti;
rel15_ul->ulsch_pdu_rel15.start_rb = ulsch_pdu->rb_start;
rel15_ul->ulsch_pdu_rel15.number_rbs = ulsch_pdu->rb_size;
rel15_ul->ulsch_pdu_rel15.start_symbol = ulsch_pdu->start_symbol_index;
rel15_ul->ulsch_pdu_rel15.number_symbols = ulsch_pdu->nr_of_symbols;
rel15_ul->ulsch_pdu_rel15.length_dmrs = gNB->dmrs_UplinkConfig.pusch_maxLength;
rel15_ul->ulsch_pdu_rel15.Qm = ulsch_pdu->qam_mod_order;
rel15_ul->ulsch_pdu_rel15.mcs = ulsch_pdu->mcs_index;
rel15_ul->ulsch_pdu_rel15.rv = ulsch_pdu->pusch_data.rv_index;
rel15_ul->ulsch_pdu_rel15.n_layers = ulsch_pdu->nrOfLayers;
rel15_ul->ulsch_pdu_rel15.R = ulsch_pdu->target_code_rate;
}
openair1/PHY/NR_TRANSPORT/nr_pbch.c
+15 -16
View File
@@ -50,13 +50,13 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t *config,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms) {
int k,l;
//int16_t a;
int16_t mod_dmrs[NR_PBCH_DMRS_LENGTH<<1];
uint8_t idx=0;
uint8_t nushift = config->sch_config.physical_cell_id.value &3;
uint8_t nushift = config->cell_config.phy_cell_id.value &3;
LOG_D(PHY, "PBCH DMRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift);
/// QPSK modulation
@@ -220,16 +220,14 @@ void nr_init_pbch_interleaver(uint8_t *interleaver) {
}
int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t *pbch_pdu,
nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
uint8_t *interleaver,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
uint8_t Lmax,
uint8_t ssb_index,
int sfn,
nfapi_nr_config_request_t *config,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms) {
int k,l,m;
//int16_t a;
@@ -243,17 +241,18 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
///Payload generation
memset((void *)pbch, 0, sizeof(NR_gNB_PBCH));
pbch->pbch_a=0;
uint8_t ssb_index = frame_parms->ssb_index;
uint8_t *pbch_pdu = (uint8_t*)&ssb_pdu->ssb_pdu_rel15.bchPayload;
uint8_t Lmax = frame_parms->Lmax;
for (int i=0; i<NR_PBCH_PDU_BITS; i++)
pbch->pbch_a |= ((pbch_pdu[2-(i>>3)]>>(7-(i&7)))&1)<<i;
#ifdef DEBUG_PBCH_ENCODING
pbch->pbch_a |= ((pbch_pdu[i>>3]>>(7-(i&7)))&1)<<i;
#ifdef DEBUG_PBCH_ENCODING
for (int i=0; i<3; i++)
printf("pbch_pdu[%d]: 0x%02x\n", i, pbch_pdu[i]);
printf("PBCH payload = 0x%08x\n",pbch->pbch_a);
#endif
#endif
// Extra byte generation
for (int i=0; i<4; i++)
@@ -265,7 +264,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
for (int i=0; i<3; i++)
pbch->pbch_a |= ((ssb_index>>(5-i))&1)<<(29+i); // resp. 6th, 5th and 4th bits of ssb_index
else
pbch->pbch_a |= ((config->sch_config.ssb_subcarrier_offset.value>>4)&1)<<29; //MSB of k_SSB (bit index 4)
pbch->pbch_a |= ((config->ssb_table.ssb_subcarrier_offset.value>>4)&1)<<29; //MSB of k_SSB (bit index 4)
LOG_D(PHY,"After extra byte: pbch_a = 0x%08x\n",pbch->pbch_a);
@@ -287,7 +286,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3);
nushift = (((sfn>>2)&1)<<1) ^ ((sfn>>1)&1);
pbch->pbch_a_prime = 0;
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 0, unscrambling_mask);
nr_pbch_scrambling(pbch, (uint32_t)config->cell_config.phy_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 0, unscrambling_mask);
#ifdef DEBUG_PBCH_ENCODING
printf("Payload scrambling: nushift %d M %d sfn3 %d sfn2 %d\n", nushift, M, (sfn>>2)&1, (sfn>>1)&1);
printf("pbch_a_prime: 0x%08x\n", pbch->pbch_a_prime);
@@ -299,7 +298,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
/// CRC, coding and rate matching
polar_encoder_fast (&a_reversed, (uint32_t *)pbch->pbch_e, 0, 0,
nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL)
nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL,0,NULL)
);
#ifdef DEBUG_PBCH_ENCODING
printf("Channel coding:\n");
@@ -312,7 +311,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
/// Scrambling
M = NR_POLAR_PBCH_E;
nushift = (Lmax==4)? ssb_index&3 : ssb_index&7;
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 1, 0);
nr_pbch_scrambling(pbch, (uint32_t)config->cell_config.phy_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 1, 0);
#ifdef DEBUG_PBCH_ENCODING
printf("Scrambling:\n");
@@ -333,7 +332,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
}
/// Resource mapping
nushift = config->sch_config.physical_cell_id.value &3;
nushift = config->cell_config.phy_cell_id.value &3;
// PBCH modulated symbols are mapped within the SSB block on symbols 1, 2, 3 excluding the subcarriers used for the PBCH DMRS
///symbol 1 [0:239] -- 180 mod symbols
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier;
openair1/PHY/NR_TRANSPORT/nr_pss.c
+2 -2
View File
@@ -28,7 +28,7 @@ int nr_generate_pss( int16_t *d_pss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int i,k,l,m;
@@ -36,7 +36,7 @@ int nr_generate_pss( int16_t *d_pss,
int16_t x[NR_PSS_LENGTH];
const int x_initial[7] = {0, 1, 1 , 0, 1, 1, 1};
uint8_t Nid2 = config->sch_config.physical_cell_id.value % 3;
uint8_t Nid2 = config->cell_config.phy_cell_id.value % 3;
/// Sequence generation
for (i=0; i < 7; i++)
openair1/PHY/NR_TRANSPORT/nr_sch_dmrs.c
+9 -3
View File
@@ -84,8 +84,14 @@ uint16_t get_dmrs_freq_idx(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_t d
return dmrs_idx;
}
uint8_t get_l0(uint8_t mapping_type, uint8_t dmrs_typeA_position) {
return ((mapping_type==NFAPI_NR_PDSCH_MAPPING_TYPE_A)?dmrs_typeA_position:0);
uint8_t get_l0(uint16_t dlDmrsSymbPos) {
uint16_t mask=dlDmrsSymbPos;
int l0;
for (l0=0;l0<14;l0++) {
if ((mask&1) == 1) break;
mask>>=1;
}
AssertFatal(l0 < 4,"impossible l0 %d\n",l0);
return (l0);
}
openair1/PHY/NR_TRANSPORT/nr_sch_dmrs.h
+2 -2
View File
@@ -48,6 +48,6 @@ uint8_t get_delta(uint8_t ap, uint8_t config);
uint16_t get_dmrs_freq_idx(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type);
uint8_t get_l0(uint8_t mapping_type, uint8_t dmrs_typeA_position);
uint8_t get_l0(uint16_t dlDmrsSymbPos);
#endif
#endif
openair1/PHY/NR_TRANSPORT/nr_sss.c
+2 -2
View File
@@ -27,7 +27,7 @@ int nr_generate_sss( int16_t *d_sss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int i,k,l;
@@ -39,7 +39,7 @@ int nr_generate_sss( int16_t *d_sss,
const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
/// Sequence generation
Nid = config->sch_config.physical_cell_id.value;
Nid = config->cell_config.phy_cell_id.value;
Nid2 = Nid % 3;
Nid1 = (Nid - Nid2)/3;
openair1/PHY/NR_TRANSPORT/nr_tbs_tools.c
+1 -182
View File
@@ -33,187 +33,6 @@
#include "nr_transport_common_proto.h"
#include "PHY/CODING/coding_defs.h"
//Table 5.1.3.1-1 of 38.214
uint16_t Table_51311[29][2] = {{2,120},{2,157},{2,193},{2,251},{2,308},{2,379},{2,449},{2,526},{2,602},{2,679},{4,340},{4,378},{4,434},{4,490},{4,553},{4,616},
{4,658},{6,438},{6,466},{6,517},{6,567},{6,616},{6,666},{6,719},{6,772},{6,822},{6,873}, {6,910}, {6,948}};
//Table 5.1.3.1-2 of 38.214
// Imcs values 20 and 26 have been multiplied by 2 to avoid the floating point
uint16_t Table_51312[28][2] = {{2,120},{2,193},{2,308},{2,449},{2,602},{4,378},{4,434},{4,490},{4,553},{4,616},{4,658},{6,466},{6,517},{6,567},{6,616},{6,666},
{6,719},{6,772},{6,822},{6,873},{8,1365},{8,711},{8,754},{8,797},{8,841},{8,885},{8,1833},{8,948}};
//Table 5.1.3.1-3 of 38.214
uint16_t Table_51313[29][2] = {{2,30},{2,40},{2,50},{2,64},{2,78},{2,99},{2,120},{2,157},{2,193},{2,251},{2,308},{2,379},{2,449},{2,526},{2,602},{4,340},
{4,378},{4,434},{4,490},{4,553},{4,616},{6,438},{6,466},{6,517},{6,567},{6,616},{6,666}, {6,719}, {6,772}};
//Table 6.1.4.1-1 of 38.214 TODO fix for tp-pi2BPSK
uint16_t Table_61411[28][2] = {{2,120},{2,157},{2,193},{2,251},{2,308},{2,379},{2,449},{2,526},{2,602},{2,679},{4,340},{4,378},{4,434},{4,490},{4,553},{4,616},
{4,658},{6,466},{6,517},{6,567},{6,616},{6,666},{6,719},{6,772},{6,822},{6,873}, {6,910}, {6,948}};
//Table 6.1.4.1-2 of 38.214 TODO fix for tp-pi2BPSK
uint16_t Table_61412[28][2] = {{2,30},{2,40},{2,50},{2,64},{2,78},{2,99},{2,120},{2,157},{2,193},{2,251},{2,308},{2,379},{2,449},{2,526},{2,602},{2,679},
{4,378},{4,434},{4,490},{4,553},{4,616},{4,658},{4,699},{4,772},{6,567},{6,616},{6,666}, {6,772}};
uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 0:
return (Table_51311[Imcs][0]);
break;
case 1:
return (Table_51312[Imcs][0]);
break;
case 2:
return (Table_51313[Imcs][0]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
}
}
uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 0:
return (Table_51311[Imcs][1]);
break;
case 1:
return (Table_51312[Imcs][1]);
break;
case 2:
return (Table_51313[Imcs][1]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
}
}
uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 0:
return (Table_51311[Imcs][0]);
break;
case 1:
return (Table_51312[Imcs][0]);
break;
case 2:
return (Table_51313[Imcs][0]);
break;
case 3:
return (Table_61411[Imcs][0]);
break;
case 4:
return (Table_61412[Imcs][0]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [1,2])\n", table_idx);
}
}
uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 0:
return (Table_51311[Imcs][1]);
break;
case 1:
return (Table_51312[Imcs][1]);
break;
case 2:
return (Table_51313[Imcs][1]);
break;
case 3:
return (Table_61411[Imcs][1]);
break;
case 4:
return (Table_61412[Imcs][1]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [1,2])\n", table_idx);
}
}
static inline uint8_t is_codeword_disabled(uint8_t format, uint8_t Imcs, uint8_t rv) {
return ((format==NFAPI_NR_DL_DCI_FORMAT_1_1)&&(Imcs==26)&&(rv==1));
}
static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8_t rnti_type, uint8_t ss_type) {
if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM256) && (dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1) && ((rnti_type==NFAPI_NR_RNTI_C)||(rnti_type==NFAPI_NR_RNTI_CS)))
return 2;
else if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM64_LOW_SE) && (rnti_type!=NFAPI_NR_RNTI_new) && (rnti_type==NFAPI_NR_RNTI_C) && (ss_type==NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC))
return 3;
else if (rnti_type==NFAPI_NR_RNTI_new)
return 3;
else if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM256) && (rnti_type==NFAPI_NR_RNTI_CS) && (dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1))
return 2; // Condition mcs_table not configured in sps_config necessary here but not yet implemented
/*else if((mcs_table == NFAPI_NR_MCS_TABLE_QAM64_LOW_SE) && (rnti_type==NFAPI_NR_RNTI_CS))
* table_idx = 3;
* Note: the commented block refers to the case where the mcs_table is from sps_config*/
else
return 1;
}
void nr_get_tbs_dl(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
nfapi_nr_config_request_t config) {
LOG_D(MAC, "TBS calculation\n");
nfapi_nr_dl_config_pdcch_parameters_rel15_t params_rel15 = dci_pdu.pdcch_params_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_rel15 = &dlsch_pdu->dlsch_pdu_rel15;
uint8_t rnti_type = params_rel15.rnti_type;
uint16_t N_PRB_oh = ((rnti_type==NFAPI_NR_RNTI_SI)||(rnti_type==NFAPI_NR_RNTI_RA)||(rnti_type==NFAPI_NR_RNTI_P))? 0 : \
(config.pdsch_config.x_overhead.value);
uint8_t N_PRB_DMRS = (config.pdsch_config.dmrs_type.value == NFAPI_NR_DMRS_TYPE1)?6:4; //This only works for antenna port 1000
uint8_t N_sh_symb = dlsch_rel15->nb_symbols;
uint8_t Imcs = dlsch_rel15->mcs_idx;
uint16_t N_RE_prime = NR_NB_SC_PER_RB*N_sh_symb - N_PRB_DMRS - N_PRB_oh;
LOG_D(MAC, "N_RE_prime %d for %d symbols %d DMRS per PRB and %d overhead\n", N_RE_prime, N_sh_symb, N_PRB_DMRS, N_PRB_oh);
uint16_t R;
uint32_t TBS=0;
uint8_t table_idx, Qm;
/*uint8_t mcs_table = config.pdsch_config.mcs_table.value;
uint8_t ss_type = params_rel15.search_space_type;
uint8_t dci_format = params_rel15.dci_format;
get_table_idx(mcs_table, dci_format, rnti_type, ss_type);*/
table_idx = 0;
R = nr_get_code_rate_dl(Imcs, table_idx);
Qm = nr_get_Qm_dl(Imcs, table_idx);
TBS = nr_compute_tbs(Qm,
R,
dlsch_rel15->n_prb,
N_sh_symb,
N_PRB_DMRS,
N_PRB_oh,
dlsch_rel15->nb_layers);
dlsch_rel15->coding_rate = R;
dlsch_rel15->modulation_order = Qm;
dlsch_rel15->transport_block_size = TBS;
dlsch_rel15->nb_re_dmrs = N_PRB_DMRS;
dlsch_rel15->nb_mod_symbols = N_RE_prime*dlsch_rel15->n_prb*dlsch_rel15->nb_codewords;
dlsch_rel15->mcs_table = table_idx;
LOG_D(MAC, "TBS %d : N_PRB_DMRS %d N_sh_symb %d N_PRB_oh %d R %d Qm %d table %d nb_symbols %d\n",
TBS, N_PRB_DMRS, N_sh_symb, N_PRB_oh, R, Qm, table_idx, dlsch_rel15->nb_mod_symbols);
}
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs, uint8_t Qm, uint8_t Nl) {
uint32_t G;
@@ -227,7 +46,7 @@ uint32_t nr_get_E(uint32_t G, uint8_t C, uint8_t Qm, uint8_t Nl, uint8_t r) {
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
LOG_D(PHY,"nr_get_E : (G %d, C %d, Qm %d, Nl %d, r %d)\n",G, C, Qm, Nl, r);
if (r <= Cprime - ((G/(Nl*Qm))%Cprime) - 1)
E = Nl*Qm*(G/(Nl*Qm*Cprime));
else
openair1/PHY/NR_TRANSPORT/nr_transport.h
+21 -10
View File
@@ -23,6 +23,7 @@
#define __NR_TRANSPORT__H__
#include "PHY/defs_gNB.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#define NR_PBCH_PDU_BITS 24
@@ -36,7 +37,7 @@ int nr_generate_pss( int16_t *d_pss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t *config,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -49,7 +50,7 @@ int nr_generate_sss( int16_t *d_sss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t *config,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -62,7 +63,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t *config,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -85,16 +86,14 @@ void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
@returns 0 on success
*/
int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t *pbch_pdu,
nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
uint8_t *interleaver,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
uint8_t Lmax,
uint8_t ssb_index,
int sfn,
nfapi_nr_config_request_t *config,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -105,11 +104,23 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
*/
void nr_init_pbch_interleaver(uint8_t *interleaver);
NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
unsigned char Kmimo,
unsigned char Mdlharq,
uint32_t Nsoft,
uint8_t abstraction_flag,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_config_request_t *config);
uint16_t N_RB);
void rx_nr_prach(PHY_VARS_gNB *gNB,
int frame,
int subframe,
uint16_t *max_preamble,
uint16_t *max_preamble_energy,
uint16_t *max_preamble_delay
);
void rx_nr_prach_ru(RU_t *ru,
int frame,
int subframe);
#endif /*__NR_TRANSPORT__H__*/
openair1/PHY/NR_TRANSPORT/nr_transport_common_proto.h
+2 -18
View File
@@ -23,7 +23,7 @@
/*! \file PHY/NR_TRANSPORT/nr_transport_common_proto.h
* \brief Some support routines
* \author
* \date 2018
* \date 2019
* \version 0.1
* \company Eurecom
* \email:
@@ -36,29 +36,13 @@
#include "PHY/defs_nr_common.h"
#define MAX_NUM_NR_DLSCH_SEGMENTS 16
#define MAX_NUM_NR_ULSCH_SEGMENTS MAX_NUM_NR_DLSCH_SEGMENTS
#define MAX_NR_DLSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056)
#define MAX_NR_ULSCH_PAYLOAD_BYTES (MAX_NUM_NR_ULSCH_SEGMENTS*1056)
#define MAX_NUM_NR_CHANNEL_BITS (14*273*12*6) // 14 symbols, 273 RB
#define MAX_NUM_NR_RE (14*273*12)
#define NR_PUSCH_x 2 // UCI placeholder bit TS 38.212 V15.4.0 subclause 5.3.3.1
#define NR_PUSCH_y 3 // UCI placeholder bit
/** \brief Computes Q based on I_MCS PDSCH and table_idx for downlink. Implements MCS Tables from 38.214. */
uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx);
/** \brief Computes Q based on I_MCS PDSCH and table_idx for uplink. Implements MCS Tables from 38.214. */
uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx);
void nr_get_tbs_dl(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
nfapi_nr_config_request_t config);
/** \brief Computes available bits G. */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint16_t length_dmrs, uint8_t Qm, uint8_t Nl);
openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
+13 -13
View File
@@ -65,20 +65,12 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
@param is_dmrs_symbol, flag to indicate wether this OFDM symbol contains DMRS symbols or not.
*/
void nr_ulsch_extract_rbs_single(int **rxdataF,
int **ul_ch_estimates,
int **rxdataF_ext,
int **ul_ch_estimates_ext,
uint32_t rxdataF_ext_offset,
// unsigned int *rb_alloc, [hna] Resource Allocation Type 1 is assumed only for the moment
void nr_ulsch_extract_rbs_single(int32_t **rxdataF,
NR_gNB_PUSCH *pusch_vars,
unsigned char symbol,
unsigned short start_rb,
unsigned short nb_rb_pusch,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t dmrs_symbol,
uint16_t number_symbols,
uint8_t mapping_type,
dmrs_UplinkConfig_t *dmrs_UplinkConfig);
uint8_t is_dmrs_symbol,
nfapi_nr_pusch_pdu_t *pusch_pdu,
NR_DL_FRAME_PARMS *frame_parms);
void nr_ulsch_scale_channel(int32_t **ul_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
@@ -212,3 +204,11 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx);
void rx_nr_prach(PHY_VARS_gNB *gNB,
int frame,
int subframe,
uint16_t *max_preamble,
uint16_t *max_preamble_energy,
uint16_t *max_preamble_delay
);
openair1/PHY/NR_TRANSPORT/nr_ulsch.h
+4 -5
View File
@@ -32,9 +32,9 @@
#include "PHY/defs_gNB.h"
void free_gNB_ulsch(NR_gNB_ULSCH_t **ulsch);
void free_gNB_ulsch(NR_gNB_ULSCH_t **ulsch,uint8_t N_RB_UL);
NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint8_t N_RB_UL, uint8_t abstraction_flag);
NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint16_t N_RB_UL, uint8_t abstraction_flag);
/*! \brief Perform PUSCH decoding. TS 38.212 V15.4.0 subclause 6.2
@@ -53,12 +53,11 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
uint8_t UE_id,
short *ulsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_pusch_pdu_t *pusch_pdu,
uint32_t frame,
uint16_t nb_symb_sch,
uint16_t nb_re_dmrs,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti);
uint32_t G);
/*! \brief Perform PUSCH unscrambling. TS 38.211 V15.4.0 subclause 6.3.1.1
openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
+114 -103
View File
@@ -37,8 +37,7 @@
#include "PHY/CODING/coding_extern.h"
#include "PHY/CODING/coding_defs.h"
#include "PHY/CODING/lte_interleaver_inline.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
#include "PHY/CODING/nrLDPC_extern.h"
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_TRANSPORT/nr_ulsch.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
@@ -58,29 +57,45 @@ static uint64_t nb_error_decod =0;
//extern double cpuf;
void free_gNB_ulsch(NR_gNB_ULSCH_t **ulschptr) {
void free_gNB_ulsch(NR_gNB_ULSCH_t **ulschptr,uint8_t N_RB_UL)
{
int i,r;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
NR_gNB_ULSCH_t *ulsch = *ulschptr;
if (ulsch) {
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273;
}
uint16_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
if (ulsch->harq_processes[i]) {
if (ulsch->harq_processes[i]->b) {
free16(ulsch->harq_processes[i]->b,MAX_NR_ULSCH_PAYLOAD_BYTES);
free16(ulsch->harq_processes[i]->b,ulsch_bytes);
ulsch->harq_processes[i]->b = NULL;
}
for (r=0; r<MAX_NUM_NR_ULSCH_SEGMENTS; r++) {
for (r=0; r<a_segments; r++) {
free16(ulsch->harq_processes[i]->c[r],(8448)*sizeof(uint8_t));
ulsch->harq_processes[i]->c[r] = NULL;
}
for (r=0; r<MAX_NUM_NR_ULSCH_SEGMENTS; r++) {
for (r=0; r<a_segments; r++) {
if (ulsch->harq_processes[i]->d[r]) {
free16(ulsch->harq_processes[i]->d[r],(68*384)*sizeof(int16_t));
ulsch->harq_processes[i]->d[r] = NULL;
}
}
for (r=0; r<(MAX_NUM_NR_ULSCH_SEGMENTS); r++) {
for (r=0; r<a_segments; r++) {
if (ulsch->harq_processes[i]->w[r]) {
free16(ulsch->harq_processes[i]->w[r],(3*(6144+64))*sizeof(int16_t));
ulsch->harq_processes[i]->w[r] = NULL;
}
}
for (r=0; r<a_segments; r++) {
if (ulsch->harq_processes[i]->p_nrLDPC_procBuf[r]){
nrLDPC_free_mem(ulsch->harq_processes[i]->p_nrLDPC_procBuf[r]);
ulsch->harq_processes[i]->p_nrLDPC_procBuf[r] = NULL;
@@ -96,23 +111,20 @@ void free_gNB_ulsch(NR_gNB_ULSCH_t **ulschptr) {
}
NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint8_t N_RB_UL, uint8_t abstraction_flag)
NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint16_t N_RB_UL, uint8_t abstraction_flag)
{
NR_gNB_ULSCH_t *ulsch;
uint8_t exit_flag = 0,i,r;
unsigned char bw_scaling =1;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
switch (N_RB_UL) {
case 106:
bw_scaling =2;
break;
default:
bw_scaling =1;
break;
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273;
}
uint16_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
ulsch = (NR_gNB_ULSCH_t *)malloc16(sizeof(NR_gNB_ULSCH_t));
if (ulsch) {
@@ -130,15 +142,15 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint8_t N_RB_UL, uint8
memset(ulsch->harq_processes[i],0,sizeof(NR_UL_gNB_HARQ_t));
ulsch->harq_processes[i]->b = (uint8_t*)malloc16(MAX_NR_ULSCH_PAYLOAD_BYTES/bw_scaling);
ulsch->harq_processes[i]->b = (uint8_t*)malloc16(ulsch_bytes);
if (ulsch->harq_processes[i]->b)
memset(ulsch->harq_processes[i]->b,0,MAX_NR_ULSCH_PAYLOAD_BYTES/bw_scaling);
memset(ulsch->harq_processes[i]->b,0,ulsch_bytes);
else
exit_flag=3;
if (abstraction_flag == 0) {
for (r=0; r<MAX_NUM_NR_ULSCH_SEGMENTS/bw_scaling; r++) {
for (r=0; r<a_segments; r++) {
ulsch->harq_processes[i]->p_nrLDPC_procBuf[r] = nrLDPC_init_mem();
@@ -155,6 +167,13 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint8_t N_RB_UL, uint8
memset(ulsch->harq_processes[i]->d[r],0,(68*384)*sizeof(int16_t));
else
exit_flag=2;
ulsch->harq_processes[i]->w[r] = (int16_t*)malloc16((3*(6144+64))*sizeof(int16_t));
if (ulsch->harq_processes[i]->w[r])
memset(ulsch->harq_processes[i]->w[r],0,(3*(6144+64))*sizeof(int16_t));
else
exit_flag=2;
}
}
} else {
@@ -165,9 +184,8 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint8_t N_RB_UL, uint8
if (exit_flag==0)
return(ulsch);
}
printf("new_gNB_ulsch with size %zu: exit_flag = %hhu\n",sizeof(NR_UL_gNB_HARQ_t), exit_flag);
free_gNB_ulsch(&ulsch);
free_gNB_ulsch(&ulsch,N_RB_UL);
return(NULL);
}
@@ -263,7 +281,7 @@ void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch)
/// Temporary h sequence to flag PUSCH_x/PUSCH_y symbols which are not scrambled
//uint8_t h[MAX_NUM_CHANNEL_BITS];
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
//int16_t w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
//int16_t w[MAX_NUM_NR_ULSCH_SEGMENTS][3*(6144+64)];
}
}
}
@@ -277,15 +295,13 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
uint8_t UE_id,
short *ulsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_pusch_pdu_t *pusch_pdu,
uint32_t frame,
uint16_t nb_symb_sch,
uint16_t nb_re_dmrs,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti)
{
uint32_t G) {
uint32_t A,E;
uint32_t G;
uint32_t ret, offset;
int32_t no_iteration_ldpc, length_dec;
uint32_t r,r_offset=0,Kr=8424,Kr_bytes,K_bytes_F,err_flag=0;
@@ -299,7 +315,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
NR_gNB_ULSCH_t *ulsch = phy_vars_gNB->ulsch[UE_id][0];
NR_UL_gNB_HARQ_t *harq_process = ulsch->harq_processes[harq_pid];
nfapi_nr_ul_config_ulsch_pdu_rel15_t *nfapi_ulsch_pdu_rel15 = &harq_process->ulsch_pdu.ulsch_pdu_rel15;
t_nrLDPC_dec_params decParams;
t_nrLDPC_dec_params* p_decParams = &decParams;
@@ -319,13 +334,11 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
double Coderate = 0.0;
// ------------------------------------------------------------------
uint16_t nb_rb = nfapi_ulsch_pdu_rel15->number_rbs;
uint16_t number_symbols = nfapi_ulsch_pdu_rel15->number_symbols;
uint8_t Qm = nfapi_ulsch_pdu_rel15->Qm;
uint16_t R = nfapi_ulsch_pdu_rel15->R;
uint8_t mcs = nfapi_ulsch_pdu_rel15->mcs;
uint8_t n_layers = nfapi_ulsch_pdu_rel15->n_layers;
uint8_t length_dmrs = nfapi_ulsch_pdu_rel15->length_dmrs;
uint16_t nb_rb = pusch_pdu->rb_size;
uint8_t Qm = pusch_pdu->qam_mod_order;
uint16_t R = pusch_pdu->target_code_rate;
uint8_t mcs = pusch_pdu->mcs_index;
uint8_t n_layers = pusch_pdu->nrOfLayers;
// ------------------------------------------------------------------
uint32_t i,j;
@@ -345,19 +358,20 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
}
// harq_process->trials[nfapi_ulsch_pdu_rel15->round]++;
harq_process->TBS = nr_compute_tbs(Qm, R, nb_rb, number_symbols, nb_re_dmrs*length_dmrs, 0, n_layers);
harq_process->TBS = pusch_pdu->pusch_data.tb_size;
A = harq_process->TBS;
A = (harq_process->TBS)<<3;
ret = ulsch->max_ldpc_iterations + 1;
G = nr_get_G(nb_rb, number_symbols, nb_re_dmrs, length_dmrs, Qm, n_layers);
LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_symb_sch %d nb_rb %d, nb_re_dmrs %d, Qm %d, n_layers %d\n",harq_pid,A,G, mcs, n_layers, nb_symb_sch,nb_rb, nb_re_dmrs, Qm, n_layers);
LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d\n",harq_pid,A,G, mcs, n_layers, nb_rb, Qm, n_layers);
if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
harq_process->B = A+24;
if (A > 3824)
harq_process->B = A+24;
else
harq_process->B = A+16;
if (R<1024)
Coderate = (float) R /(float) 1024;
@@ -394,20 +408,20 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
}
}
// [hna] Perform nr_segmenation with input and output set to NULL to calculate only (B, C, K, Z, F)
nr_segmentation(NULL,
NULL,
harq_process->B,
&harq_process->C,
&harq_process->K,
&harq_process->Z, // [hna] Z is Zc
&harq_process->F,
p_decParams->BG);
// [hna] Perform nr_segmenation with input and output set to NULL to calculate only (B, C, K, Z, F)
nr_segmentation(NULL,
NULL,
harq_process->B,
&harq_process->C,
&harq_process->K,
&harq_process->Z, // [hna] Z is Zc
&harq_process->F,
p_decParams->BG);
#ifdef DEBUG_ULSCH_DECODING
printf("ulsch decoding nr segmentation Z %d\n", harq_process->Z);
if (!frame%100)
printf("K %d C %d Z %d nl %d \n", harq_process->K, harq_process->C, harq_process->Z, harq_process->Nl);
printf("K %d C %d Z %d\n", harq_process->K, harq_process->C, harq_process->Z);
#endif
}
p_decParams->Z = harq_process->Z;
@@ -419,21 +433,15 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
err_flag = 0;
r_offset = 0;
unsigned char bw_scaling =1;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
switch (frame_parms->N_RB_UL) {
case 106:
bw_scaling =2;
break;
default:
bw_scaling =1;
break;
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
a_segments = a_segments/273;
}
if (harq_process->C > MAX_NUM_NR_ULSCH_SEGMENTS/bw_scaling) {
LOG_E(PHY,"Illegal harq_process->C %d > %d\n",harq_process->C,MAX_NUM_NR_ULSCH_SEGMENTS/bw_scaling);
if (harq_process->C > a_segments) {
LOG_E(PHY,"Illegal harq_process->C %d > %d\n",harq_process->C,a_segments);
return (ulsch->max_ldpc_iterations + 1);
}
#ifdef DEBUG_ULSCH_DECODING
@@ -448,7 +456,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
K_bytes_F = Kr_bytes-(harq_process->F>>3);
for (r=0; r<harq_process->C; r++) {
E = nr_get_E(G, harq_process->C, nfapi_ulsch_pdu_rel15->Qm, nfapi_ulsch_pdu_rel15->n_layers, r);
E = nr_get_E(G, harq_process->C, Qm, n_layers, r);
#if gNB_TIMING_TRACE
start_meas(ulsch_deinterleaving_stats);
@@ -461,7 +469,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
//////////////////////////// ulsch_llr =====> harq_process->e //////////////////////////////
nr_deinterleaving_ldpc(E,
nfapi_ulsch_pdu_rel15->Qm,
Qm,
harq_process->e[r],
ulsch_llr+r_offset);
@@ -481,10 +489,10 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
harq_pid,r, G,
Kr*3,
harq_process->TBS,
nfapi_ulsch_pdu_rel15->Qm,
nfapi_ulsch_pdu_rel15->number_rbs,
nfapi_ulsch_pdu_rel15->n_layers,
nfapi_ulsch_pdu_rel15->rv,
Qm,
nb_rb,
n_layers,
pusch_pdu->pusch_data.rv_index,
harq_process->round);
#endif
//////////////////////////////////////////////////////////////////////////////////////////
@@ -496,7 +504,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
///////////////////////// harq_process->e =====> harq_process->d /////////////////////////
Tbslbrm = nr_compute_tbslbrm(0,nb_rb,nfapi_ulsch_pdu_rel15->n_layers,harq_process->C);
Tbslbrm = nr_compute_tbslbrm(0,nb_rb,n_layers,harq_process->C);
if (nr_rate_matching_ldpc_rx(Ilbrm,
Tbslbrm,
@@ -505,9 +513,11 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
harq_process->d[r],
harq_process->e[r],
harq_process->C,
nfapi_ulsch_pdu_rel15->rv,
pusch_pdu->pusch_data.rv_index,
(harq_process->round==0)?1:0,
E)==-1) {
E,
harq_process->F,
Kr-harq_process->F-2*(p_decParams->Z))==-1) {
#if gNB_TIMING_TRACE
stop_meas(ulsch_rate_unmatching_stats);
#endif
@@ -540,7 +550,11 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
// printf("done\n");
if (harq_process->C == 1) {
crc_type = CRC24_A;
if (A > 3824)
crc_type = CRC24_A;
else
crc_type = CRC16;
length_dec = harq_process->B;
}
else {
@@ -565,7 +579,9 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
}
AssertFatal(kc!=255,"");
for (i=Kr_bytes,j=K_bytes_F-((2*p_decParams->Z)>>3); i < ((kc*p_decParams->Z)>>3); i++, j++) {
j+=(harq_process->F>>3);
// for (i=Kr_bytes,j=K_bytes_F-((2*p_decParams->Z)>>3); i < ((kc*p_decParams->Z)>>3); i++, j++) {
for (i=Kr_bytes; i < ((kc*p_decParams->Z)>>3); i++, j++) {
pv[i]= _mm_loadu_si128((__m128i*)(&harq_process->d[r][8*j]));
}
@@ -637,7 +653,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
int32_t tti_rx_prev = nr_tti_rx - 1;
if (tti_rx_prev < 0) {
frame_rx_prev--;
tti_rx_prev += 10*frame_parms->ttis_per_subframe;
tti_rx_prev += frame_parms->slots_per_frame;
}
frame_rx_prev = frame_rx_prev%1024;
@@ -661,13 +677,11 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
ulsch->harq_mask &= ~(1 << harq_pid);
}
if(is_crnti) {
LOG_D(PHY,"[gNB %d] ULSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,ulsch->Mlimit,harq_process->TBS);
}
// LOG_D(PHY,"[gNB %d] ULSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
// phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,ulsch->Mlimit,harq_process->TBS);
harq_process->handled = 1;
return (ulsch->max_ldpc_iterations + 1);
ret = ulsch->max_ldpc_iterations + 1;
} else {
@@ -684,31 +698,28 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
// harq_process->harq_ack.harq_id = harq_pid;
// harq_process->harq_ack.send_harq_status = 1;
if(is_crnti)
{
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
}
}
// Reassembly of Transport block here
offset = 0;
Kr = harq_process->K;
Kr_bytes = Kr>>3;
for (r=0; r<harq_process->C; r++) {
memcpy(harq_process->b+offset,
harq_process->c[r],
Kr_bytes- - (harq_process->F>>3) -((harq_process->C>1)?3:0));
offset += (Kr_bytes - (harq_process->F>>3) - ((harq_process->C>1)?3:0));
// LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
// Reassembly of Transport block here
offset = 0;
Kr = harq_process->K;
Kr_bytes = Kr>>3;
for (r=0; r<harq_process->C; r++) {
memcpy(harq_process->b+offset,
harq_process->c[r],
Kr_bytes- - (harq_process->F>>3) -((harq_process->C>1)?3:0));
offset += (Kr_bytes - (harq_process->F>>3) - ((harq_process->C>1)?3:0));
#ifdef DEBUG_ULSCH_DECODING
printf("Segment %u : Kr = %u bytes\n", r, Kr_bytes);
printf("copied %d bytes to b sequence (harq_pid %d)\n", (Kr_bytes - (harq_process->F>>3)-((harq_process->C>1)?3:0)), harq_pid);
printf("b[0] = %x, c[%d] = %x\n", harq_process->b[offset], harq_process->F>>3, harq_process->c[r]);
printf("Segment %u : Kr = %u bytes\n", r, Kr_bytes);
printf("copied %d bytes to b sequence (harq_pid %d)\n", (Kr_bytes - (harq_process->F>>3)-((harq_process->C>1)?3:0)), harq_pid);
printf("b[0] = %x, c[%d] = %x\n", harq_process->b[offset], harq_process->F>>3, harq_process->c[r]);
#endif
}
}
#ifdef DEBUG_ULSCH_DECODING
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+212 -176
View File
@@ -4,6 +4,7 @@
#include "PHY/impl_defs_top.h"
#include "PHY/NR_TRANSPORT/nr_sch_dmrs.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_ESTIMATION/nr_ul_estimation.h"
#include "PHY/defs_nr_common.h"
@@ -221,77 +222,97 @@ void nr_idft(uint32_t *z, uint32_t Msc_PUSCH)
}
void nr_ulsch_extract_rbs_single(int **rxdataF,
int **ul_ch_estimates,
int **rxdataF_ext,
int **ul_ch_estimates_ext,
uint32_t rxdataF_ext_offset,
// unsigned int *rb_alloc, [hna] Resource Allocation Type 1 is assumed only for the moment
void nr_ulsch_extract_rbs_single(int32_t **rxdataF,
NR_gNB_PUSCH *pusch_vars,
unsigned char symbol,
unsigned short start_rb,
unsigned short nb_rb_pusch,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t dmrs_symbol,
uint16_t number_symbols,
uint8_t mapping_type,
dmrs_UplinkConfig_t *dmrs_UplinkConfig)
uint8_t is_dmrs_symbol,
nfapi_nr_pusch_pdu_t *pusch_pdu,
NR_DL_FRAME_PARMS *frame_parms)
{
unsigned short start_re, re, nb_re_pusch;
unsigned char aarx;
uint8_t K_ptrs;
uint32_t rxF_ext_index = 0;
uint32_t ul_ch0_ext_index = 0;
uint32_t ul_ch0_index = 0;
uint8_t is_dmrs_symbol_flag, k_prime;
uint16_t n=0;
uint32_t ul_ch0_ptrs_ext_index = 0;
uint32_t ul_ch0_ptrs_index = 0;
uint8_t is_ptrs_symbol_flag,k_prime;
uint16_t n=0, num_ptrs_symbols;
int16_t *rxF,*rxF_ext;
int *ul_ch0,*ul_ch0_ext;
int *ul_ch0_ptrs,*ul_ch0_ptrs_ext;
uint16_t n_rnti = pusch_pdu->rnti;
uint8_t delta = 0;
#ifdef DEBUG_RB_EXT
printf("--------------------symbol = %d-----------------------\n", symbol);
printf("--------------------ch_ext_index = %d-----------------------\n", symbol*NR_NB_SC_PER_RB * nb_rb_pusch);
printf("--------------------ch_ext_index = %d-----------------------\n", symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size);
#endif
start_re = (frame_parms->first_carrier_offset + (start_rb * NR_NB_SC_PER_RB))%frame_parms->ofdm_symbol_size;
nb_re_pusch = NR_NB_SC_PER_RB * nb_rb_pusch;
is_dmrs_symbol_flag = 0;
uint8_t is_dmrs_re;
start_re = (frame_parms->first_carrier_offset + (pusch_pdu->rb_start * NR_NB_SC_PER_RB))%frame_parms->ofdm_symbol_size;
nb_re_pusch = NR_NB_SC_PER_RB * pusch_pdu->rb_size;
is_ptrs_symbol_flag = 0;
num_ptrs_symbols = 0;
K_ptrs = (pusch_pdu->pusch_ptrs.ptrs_freq_density)?4:2;
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
rxF = (int16_t *)&rxdataF[aarx][symbol * frame_parms->ofdm_symbol_size];
rxF_ext = (int16_t *)&rxdataF_ext[aarx][symbol * nb_re_pusch]; // [hna] rxdataF_ext isn't contiguous in order to solve an alignment problem ib llr computation in case of mod_order = 4, 6
rxF_ext = (int16_t *)&pusch_vars->rxdataF_ext[aarx][symbol * nb_re_pusch]; // [hna] rxdataF_ext isn't contiguous in order to solve an alignment problem ib llr computation in case of mod_order = 4, 6
ul_ch0 = &ul_ch_estimates[aarx][dmrs_symbol*frame_parms->ofdm_symbol_size]; // update channel estimates if new dmrs symbol are available
ul_ch0 = &pusch_vars->ul_ch_estimates[aarx][pusch_vars->dmrs_symbol*frame_parms->ofdm_symbol_size]; // update channel estimates if new dmrs symbol are available
ul_ch0_ext = &ul_ch_estimates_ext[aarx][symbol*nb_re_pusch];
ul_ch0_ext = &pusch_vars->ul_ch_estimates_ext[aarx][symbol*nb_re_pusch];
ul_ch0_ptrs = &pusch_vars->ul_ch_ptrs_estimates[aarx][pusch_vars->ptrs_symbol_index*frame_parms->ofdm_symbol_size]; // update channel estimates if new dmrs symbol are available
ul_ch0_ptrs_ext = &pusch_vars->ul_ch_ptrs_estimates_ext[aarx][symbol*nb_re_pusch];
n = 0;
k_prime = 0;
for (re = 0; re < nb_re_pusch; re++) {
is_dmrs_symbol_flag = is_dmrs_symbol(symbol,
(start_re + re)%frame_parms->ofdm_symbol_size,
start_re,
k_prime,
n,
0,
number_symbols,
dmrs_UplinkConfig,
mapping_type,
frame_parms->ofdm_symbol_size);
if (is_dmrs_symbol)
is_dmrs_re = (re == get_dmrs_freq_idx_ul(n, k_prime, delta, pusch_pdu->dmrs_config_type));
else
is_dmrs_re = 0;
if ( ((pusch_pdu->pdu_bit_map)>>2)& 0x01 ) {
is_ptrs_symbol_flag = is_ptrs_symbol(symbol,
(start_re + re)%frame_parms->ofdm_symbol_size,
n_rnti,
pusch_pdu->rb_size,
pusch_pdu->nr_of_symbols,
aarx,
K_ptrs,
pusch_vars->ptrs_symbols,
start_re,
frame_parms->ofdm_symbol_size,
pusch_pdu->dmrs_config_type,
pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset);
if (is_ptrs_symbol_flag == 1)
num_ptrs_symbols++;
}
#ifdef DEBUG_RB_EXT
printf("re = %d, is_dmrs_symbol_flag = %d, symbol = %d\n", re, is_dmrs_symbol_flag, symbol);
#endif
if ( is_dmrs_symbol_flag == 0 ) {
if ( is_dmrs_re == 0 && is_ptrs_symbol_flag == 0) {
rxF_ext[rxF_ext_index] = (rxF[ ((start_re + re)*2) % (frame_parms->ofdm_symbol_size*2)]);
rxF_ext[rxF_ext_index + 1] = (rxF[(((start_re + re)*2) + 1) % (frame_parms->ofdm_symbol_size*2)]);
ul_ch0_ext[ul_ch0_ext_index] = ul_ch0[ul_ch0_index];
ul_ch0_ptrs_ext[ul_ch0_ptrs_ext_index] = ul_ch0_ptrs[ul_ch0_ptrs_index];
#ifdef DEBUG_RB_EXT
printf("rxF_ext[%d] = %d\n", rxF_ext_index, rxF_ext[rxF_ext_index]);
@@ -299,6 +320,7 @@ void nr_ulsch_extract_rbs_single(int **rxdataF,
#endif
ul_ch0_ext_index++;
ul_ch0_ptrs_ext_index++;
rxF_ext_index +=2;
} else {
k_prime++;
@@ -306,8 +328,12 @@ void nr_ulsch_extract_rbs_single(int **rxdataF,
n+=(k_prime)?0:1;
}
ul_ch0_index++;
ul_ch0_ptrs_index++;
}
}
pusch_vars->ptrs_sc_per_ofdm_symbol = num_ptrs_symbols;
}
void nr_ulsch_scale_channel(int **ul_ch_estimates_ext,
@@ -334,7 +360,7 @@ void nr_ulsch_scale_channel(int **ul_ch_estimates_ext,
ch_amp128 = _mm_set1_epi16(ch_amp); // Q3.13
for (aatx=0; aatx < frame_parms->nb_antenna_ports_eNB; aatx++) {
for (aatx=0; aatx < frame_parms->nb_antenna_ports_gNB; aatx++) {
for (aarx=0; aarx < frame_parms->nb_antennas_rx; aarx++) {
ul_ch128 = (__m128i *)&ul_ch_estimates_ext[aarx][symbol*nb_rb*NR_NB_SC_PER_RB];
@@ -420,7 +446,7 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++)
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
avg128U = vdupq_n_s32(0);
@@ -436,7 +462,7 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
avg128U = vqaddq_s32(avg128U, vmull_s16(ul_ch128[2], ul_ch128[2]));
avg128U = vqaddq_s32(avg128U, vmull_s16(ul_ch128[3], ul_ch128[3]));
if (((symbol_mod == 0) || (symbol_mod == (frame_parms->Ncp-1)))&&(frame_parms->nb_antenna_ports_eNB!=1)) {
if (((symbol_mod == 0) || (symbol_mod == (frame_parms->Ncp-1)))&&(frame_parms->nb_antenna_ports_gNB!=1)) {
ul_ch128+=4;
} else {
avg128U = vqaddq_s32(avg128U, vmull_s16(ul_ch128[4], ul_ch128[4]));
@@ -469,18 +495,17 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
}
void nr_ulsch_channel_compensation(int **rxdataF_ext,
int **ul_ch_estimates_ext,
int **ul_ch_mag,
int **ul_ch_magb,
int **rxdataF_comp,
int **rho,
NR_DL_FRAME_PARMS *frame_parms,
unsigned char symbol,
uint8_t is_dmrs_symbol,
unsigned char mod_order,
unsigned short nb_rb,
unsigned char output_shift)
{
int **ul_ch_estimates_ext,
int **ul_ch_mag,
int **ul_ch_magb,
int **rxdataF_comp,
int **rho,
NR_DL_FRAME_PARMS *frame_parms,
unsigned char symbol,
uint8_t is_dmrs_symbol,
unsigned char mod_order,
unsigned short nb_rb,
unsigned char output_shift) {
#ifdef DEBUG_CH_COMP
int16_t *rxF, *ul_ch;
@@ -782,7 +807,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
if ((symbol_mod == 0) || (symbol_mod == (4-frame_parms->Ncp))) {
if (frame_parms->nb_antenna_ports_eNB==1) { // 10 out of 12 so don't reduce size
if (frame_parms->nb_antenna_ports_gNB==1) { // 10 out of 12 so don't reduce size
nb_rb=1+(5*nb_rb/6);
}
else {
@@ -790,7 +815,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
}
}
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
if (mod_order == 4) {
QAM_amp128 = vmovq_n_s16(QAM16_n1); // 2/sqrt(10)
QAM_amp128b = vmovq_n_s16(0);
@@ -1001,139 +1026,150 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
unsigned char harq_pid)
{
uint8_t first_symbol_flag, aarx, aatx, dmrs_symbol_flag; // dmrs_symbol_flag, a flag to indicate DMRS REs in current symbol
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_ul_config_ulsch_pdu_rel15_t *rel15_ul = &gNB->ulsch[UE_id][0]->harq_processes[harq_pid]->ulsch_pdu.ulsch_pdu_rel15;
uint8_t first_symbol_flag, aarx, aatx, dmrs_symbol_flag, ptrs_symbol_flag; // dmrs_symbol_flag, a flag to indicate DMRS REs in current symbol
uint32_t nb_re_pusch, bwp_start_subcarrier;
uint8_t mapping_type;
uint8_t L_ptrs = 0; // PTRS parameter
int avgs;
int avg[4];
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[UE_id][0]->harq_processes[harq_pid]->ulsch_pdu;
dmrs_symbol_flag = 0;
ptrs_symbol_flag = 0;
first_symbol_flag = 0;
mapping_type = gNB->pusch_config.pusch_TimeDomainResourceAllocation[0]->mappingType;
gNB->pusch_vars[UE_id]->ptrs_sc_per_ofdm_symbol = 0;
if (mapping_type == typeB) {
if(symbol == rel15_ul->start_symbol_index){
gNB->pusch_vars[UE_id]->rxdataF_ext_offset = 0;
gNB->pusch_vars[UE_id]->dmrs_symbol = 0;
gNB->pusch_vars[UE_id]->cl_done = 0;
gNB->pusch_vars[UE_id]->ptrs_symbols = 0;
first_symbol_flag = 1;
if(symbol == rel15_ul->start_symbol){
gNB->pusch_vars[UE_id]->rxdataF_ext_offset = 0;
gNB->pusch_vars[UE_id]->dmrs_symbol = 0;
first_symbol_flag = 1;
if ( ((rel15_ul->pdu_bit_map)>>2)& 0x01 ) { // if there is ptrs pdu
L_ptrs = 1<<(rel15_ul->pusch_ptrs.ptrs_time_density);
set_ptrs_symb_idx(&gNB->pusch_vars[UE_id]->ptrs_symbols,
rel15_ul->nr_of_symbols,
rel15_ul->start_symbol_index,
rel15_ul->dmrs_config_type,
L_ptrs,
1, // only dmrs of length 1 is currently supported
frame_parms->ofdm_symbol_size);
}
bwp_start_subcarrier = (rel15_ul->start_rb*NR_NB_SC_PER_RB + frame_parms->first_carrier_offset) % frame_parms->ofdm_symbol_size;
dmrs_symbol_flag = is_dmrs_symbol(symbol,
0,
0,
0,
0,
0,
rel15_ul->number_symbols,
&gNB->dmrs_UplinkConfig,
mapping_type,
frame_parms->ofdm_symbol_size);
if (dmrs_symbol_flag == 1){
nb_re_pusch = rel15_ul->number_rbs * ((gNB->dmrs_UplinkConfig.pusch_dmrs_type==pusch_dmrs_type1)?6:8);
gNB->pusch_vars[UE_id]->dmrs_symbol = symbol;
} else {
nb_re_pusch = rel15_ul->number_rbs * NR_NB_SC_PER_RB;
}
//----------------------------------------------------------
//--------------------- Channel estimation ---------------------
//----------------------------------------------------------
if (dmrs_symbol_flag == 1)
nr_pusch_channel_estimation(gNB,
0,
nr_tti_rx,
0, // p
symbol,
bwp_start_subcarrier,
rel15_ul->number_rbs,
&gNB->dmrs_UplinkConfig);
//----------------------------------------------------------
//--------------------- RBs extraction ---------------------
//----------------------------------------------------------
nr_ulsch_extract_rbs_single(gNB->common_vars.rxdataF,
gNB->pusch_vars[UE_id]->ul_ch_estimates,
gNB->pusch_vars[UE_id]->rxdataF_ext,
gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
gNB->pusch_vars[UE_id]->rxdataF_ext_offset,
// rb_alloc, [hna] Resource Allocation Type 1 is assumed only for the moment
symbol,
rel15_ul->start_rb,
rel15_ul->number_rbs,
frame_parms,
gNB->pusch_vars[UE_id]->dmrs_symbol,
rel15_ul->number_symbols,
mapping_type,
&gNB->dmrs_UplinkConfig);
nr_ulsch_scale_channel(gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
frame_parms,
gNB->ulsch[UE_id],
symbol,
dmrs_symbol_flag,
rel15_ul->number_rbs,
gNB->dmrs_UplinkConfig.pusch_dmrs_type);
if (first_symbol_flag==1) {
nr_ulsch_channel_level(gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
frame_parms,
avg,
symbol,
nb_re_pusch,
rel15_ul->number_rbs);
avgs = 0;
for (aatx=0;aatx<frame_parms->nb_antennas_tx;aatx++)
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++)
avgs = cmax(avgs,avg[(aatx<<1)+aarx]);
gNB->pusch_vars[UE_id]->log2_maxh = (log2_approx(avgs)/2)+1;
}
nr_ulsch_channel_compensation(gNB->pusch_vars[UE_id]->rxdataF_ext,
gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
gNB->pusch_vars[UE_id]->ul_ch_mag0,
gNB->pusch_vars[UE_id]->ul_ch_magb0,
gNB->pusch_vars[UE_id]->rxdataF_comp,
(frame_parms->nb_antennas_tx>1) ? gNB->pusch_vars[UE_id]->rho : NULL,
frame_parms,
symbol,
dmrs_symbol_flag,
rel15_ul->Qm,
rel15_ul->number_rbs,
gNB->pusch_vars[UE_id]->log2_maxh);
#ifdef NR_SC_FDMA
nr_idft(&((uint32_t*)gNB->pusch_vars[UE_id]->rxdataF_ext[0])[symbol * rel15_ul->number_rbs * NR_NB_SC_PER_RB], nb_re_pusch);
#endif
//----------------------------------------------------------
//-------------------- LLRs computation --------------------
//----------------------------------------------------------
nr_ulsch_compute_llr(&gNB->pusch_vars[UE_id]->rxdataF_comp[0][symbol * rel15_ul->number_rbs * NR_NB_SC_PER_RB],
gNB->pusch_vars[UE_id]->ul_ch_mag0,
gNB->pusch_vars[UE_id]->ul_ch_magb0,
&gNB->pusch_vars[UE_id]->llr[gNB->pusch_vars[UE_id]->rxdataF_ext_offset * rel15_ul->Qm],
rel15_ul->number_rbs,
nb_re_pusch,
symbol,
rel15_ul->Qm);
gNB->pusch_vars[UE_id]->rxdataF_ext_offset = gNB->pusch_vars[UE_id]->rxdataF_ext_offset + nb_re_pusch;
} else {
LOG_E(PHY, "PUSCH mapping type A is not supported \n");
}
bwp_start_subcarrier = (rel15_ul->rb_start*NR_NB_SC_PER_RB + frame_parms->first_carrier_offset) % frame_parms->ofdm_symbol_size;
dmrs_symbol_flag = ((rel15_ul->ul_dmrs_symb_pos)>>symbol)&0x01;
if (dmrs_symbol_flag == 1){
nb_re_pusch = rel15_ul->rb_size * ((rel15_ul->dmrs_config_type==pusch_dmrs_type1)?6:8);
gNB->pusch_vars[UE_id]->dmrs_symbol = symbol;
} else {
nb_re_pusch = rel15_ul->rb_size * NR_NB_SC_PER_RB;
}
if ( ((rel15_ul->pdu_bit_map)>>2)& 0x01 ) { // if there is ptrs pdu
ptrs_symbol_flag = is_ptrs_symbol(symbol,
0,
rel15_ul->rnti,
rel15_ul->rb_size,
rel15_ul->nr_of_symbols,
0,
(rel15_ul->pusch_ptrs.ptrs_freq_density)?4:2,
gNB->pusch_vars[UE_id]->ptrs_symbols,
0,
frame_parms->ofdm_symbol_size,
rel15_ul->dmrs_config_type,
rel15_ul->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset);
}
if (ptrs_symbol_flag == 1){
gNB->pusch_vars[UE_id]->ptrs_symbol_index = symbol;
}
//----------------------------------------------------------
//--------------------- Channel estimation ---------------------
//----------------------------------------------------------
if (dmrs_symbol_flag == 1)
nr_pusch_channel_estimation(gNB,
nr_tti_rx,
0, // p
symbol,
bwp_start_subcarrier,
rel15_ul);
//----------------------------------------------------------
//--------------------- RBs extraction ---------------------
//----------------------------------------------------------
nr_ulsch_extract_rbs_single(gNB->common_vars.rxdataF,
gNB->pusch_vars[UE_id],
symbol,
dmrs_symbol_flag,
rel15_ul,
frame_parms);
nr_ulsch_scale_channel(gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
frame_parms,
gNB->ulsch[UE_id],
symbol,
dmrs_symbol_flag,
rel15_ul->rb_size,
rel15_ul->dmrs_config_type);
if (first_symbol_flag==1) {
nr_ulsch_channel_level(gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
frame_parms,
avg,
symbol,
nb_re_pusch,
rel15_ul->rb_size);
avgs = 0;
for (aatx=0;aatx<frame_parms->nb_antennas_tx;aatx++)
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++)
avgs = cmax(avgs,avg[(aatx<<1)+aarx]);
gNB->pusch_vars[UE_id]->log2_maxh = (log2_approx(avgs)/2)+1;
}
nr_ulsch_channel_compensation(gNB->pusch_vars[UE_id]->rxdataF_ext,
gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
gNB->pusch_vars[UE_id]->ul_ch_mag0,
gNB->pusch_vars[UE_id]->ul_ch_magb0,
gNB->pusch_vars[UE_id]->rxdataF_comp,
(frame_parms->nb_antennas_tx>1) ? gNB->pusch_vars[UE_id]->rho : NULL,
frame_parms,
symbol,
dmrs_symbol_flag,
rel15_ul->qam_mod_order,
rel15_ul->rb_size,
gNB->pusch_vars[UE_id]->log2_maxh);
#ifdef NR_SC_FDMA
nr_idft(&((uint32_t*)gNB->pusch_vars[UE_id]->rxdataF_ext[0])[symbol * rel15_ul->rb_size * NR_NB_SC_PER_RB], nb_re_pusch);
#endif
//----------------------------------------------------------
//-------------------- LLRs computation --------------------
//----------------------------------------------------------
nr_ulsch_compute_llr(&gNB->pusch_vars[UE_id]->rxdataF_comp[0][symbol * rel15_ul->rb_size * NR_NB_SC_PER_RB],
gNB->pusch_vars[UE_id]->ul_ch_mag0,
gNB->pusch_vars[UE_id]->ul_ch_magb0,
&gNB->pusch_vars[UE_id]->llr[gNB->pusch_vars[UE_id]->rxdataF_ext_offset * rel15_ul->qam_mod_order],
rel15_ul->rb_size,
nb_re_pusch,
symbol,
rel15_ul->qam_mod_order);
gNB->pusch_vars[UE_id]->rxdataF_ext_offset = gNB->pusch_vars[UE_id]->rxdataF_ext_offset + nb_re_pusch - gNB->pusch_vars[UE_id]->ptrs_sc_per_ofdm_symbol;
}
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+7 -12
View File
@@ -206,9 +206,6 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*fr;
int ch_offset,symbol_offset;
//int slot_pbch;
//fapi_nr_pbch_config_t *pbch_config = &ue->nrUE_config.pbch_config;
// initialized to 5ms in nr_init_ue for scenarios where UE is not configured (otherwise acquired by cell configuration from gNB or LTE)
//uint8_t ssb_periodicity = 10;// ue->ssb_periodicity;
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
@@ -452,7 +449,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
{
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
for (p=0; p<ue->frame_parms.nb_antenna_ports_eNB; p++) {
for (p=0; p<ue->frame_parms.nb_antenna_ports_gNB; p++) {
if (ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx])
{
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d ch_offset %d\n", Ns, ue->current_thread_id[Ns], symbol, ch_offset);
@@ -475,7 +472,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset)
{
int pilot[200] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
@@ -484,12 +481,9 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->pdcch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
nushift = 1;
ue->frame_parms.nushift = nushift;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
ch_offset = ue->frame_parms.ofdm_symbol_size ;
@@ -510,14 +504,15 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fr = filt16a_r1;
// generate pilot
// generate pilot
int pilot[nb_rb_coreset * 3] __attribute__((aligned(16)));
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+1)];
dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
memset(dl_ch,0,4*(ue->frame_parms.ofdm_symbol_size));
@@ -588,7 +583,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
if (k >= ue->frame_parms.ofdm_symbol_size){
k-=ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];}
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+1)];}
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
@@ -622,7 +617,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PDCCH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+2,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fr,
openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h
+1 -6
View File
@@ -90,11 +90,6 @@ void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
uint32_t rx_power_fil_dB,
uint8_t eNB_id);
/*! \brief Function to return the path-loss based on the UE cell-specific reference signal strength and transmission power of eNB
@param Mod_id Module ID for UE
@param eNB_index Index of eNB on which to act
@returns Path loss in dB
*/
int16_t nr_get_PL(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
int16_t get_nr_PL(PHY_VARS_NR_UE *ue,uint8_t gNB_index);
#endif
openair1/PHY/NR_UE_ESTIMATION/nr_ue_measurements.c
+5 -628
View File
@@ -19,8 +19,6 @@
* contact@openairinterface.org
*/
// this function fills the PHY_vars->PHY_measurement structure
#include "PHY/defs_nr_UE.h"
#include "PHY/phy_extern_nr_ue.h"
#include "common/utils/LOG/log.h"
@@ -57,649 +55,28 @@ void print_ints(char *s,int *x)
}
#endif
int16_t nr_get_PL(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
int16_t get_nr_PL(PHY_VARS_NR_UE *ue,uint8_t gNB_index)
{
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
/*
int RSoffset;
if (ue->frame_parms.mode1_flag == 1)
RSoffset = 6;
else
RSoffset = 3;
*/
/* LOG_D(PHY,"nr_get_PL : rsrp %f dBm/RE (%f), eNB power %d dBm/RE\n",
/* LOG_D(PHY,"get_nr_PL : rsrp %f dBm/RE (%f), eNB power %d dBm/RE\n",
(1.0*dB_fixed_times10(ue->measurements.rsrp[eNB_index])-(10.0*ue->rx_total_gain_dB))/10.0,
10*log10((double)ue->measurements.rsrp[eNB_index]),
ue->frame_parms.pdsch_config_common.referenceSignalPower);*/
return((int16_t)(((10*ue->rx_total_gain_dB) -
dB_fixed_times10(ue->measurements.rsrp[eNB_index]))/10));
return((int16_t)(((10*ue->rx_total_gain_dB) - dB_fixed_times10(ue->measurements.rsrp[gNB_index]))/10));
// dB_fixed_times10(RSoffset*12*ue_g[Mod_id][CC_id]->frame_parms.N_RB_DL) +
//(ue->frame_parms.pdsch_config_common.referenceSignalPower*10))/10));
}
#if 0
uint8_t get_n_adj_cells (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue)
return ue->measurements.n_adj_cells;
else
return 0;
}
uint32_t get_rx_total_gain_dB (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue)
return ue->rx_total_gain_dB;
return 0xFFFFFFFF;
}
uint32_t get_RSSI (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue)
return ue->measurements.rssi;
return 0xFFFFFFFF;
}
double get_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
AssertFatal(PHY_vars_UE_g!=NULL,"PHY_vars_UE_g is null\n");
AssertFatal(PHY_vars_UE_g[Mod_id]!=NULL,"PHY_vars_UE_g[%d] is null\n",Mod_id);
AssertFatal(PHY_vars_UE_g[Mod_id][CC_id]!=NULL,"PHY_vars_UE_g[%d][%d] is null\n",Mod_id,CC_id);
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue)
return ((dB_fixed_times10(ue->measurements.rsrp[eNB_index]))/10.0-
get_rx_total_gain_dB(Mod_id,0) -
10*log10(ue->frame_parms.N_RB_DL*12));
return -140.0;
}
uint32_t get_RSRQ(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue)
return ue->measurements.rsrq[eNB_index];
return 0xFFFFFFFF;
}
int8_t set_RSRP_filtered(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrp)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue) {
ue->measurements.rsrp_filtered[eNB_index]=rsrp;
return 0;
}
LOG_W(PHY,"[UE%d] could not set the rsrp\n",Mod_id);
return -1;
}
int8_t set_RSRQ_filtered(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrq)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue) {
ue->measurements.rsrq_filtered[eNB_index]=rsrq;
return 0;
}
LOG_W(PHY,"[UE%d] could not set the rsrq\n",Mod_id);
return -1;
}
#endif
#if 0
void ue_rrc_measurements(PHY_VARS_UE *ue,
uint8_t slot,
uint8_t abstraction_flag)
{
uint8_t subframe = slot>>1;
int aarx,rb;
uint8_t pss_symb;
uint8_t sss_symb;
int32_t **rxdataF;
int16_t *rxF,*rxF_pss,*rxF_sss;
uint16_t Nid_cell = ue->frame_parms.Nid_cell;
uint8_t eNB_offset,nu,l,nushift,k;
uint16_t off;
uint8_t previous_thread_id = ue->current_thread_id[subframe]==0 ? (RX_NB_TH-1):(ue->current_thread_id[subframe]-1);
//uint8_t isPss; // indicate if this is a slot for extracting PSS
//uint8_t isSss; // indicate if this is a slot for extracting SSS
//int32_t pss_ext[4][72]; // contain the extracted 6*12 REs for mapping the PSS
//int32_t sss_ext[4][72]; // contain the extracted 6*12 REs for mapping the SSS
//int32_t (*xss_ext)[72]; // point to either pss_ext or sss_ext for common calculation
//int16_t *re,*im; // real and imag part of each 32-bit xss_ext[][] value
//LOG_I(PHY,"UE RRC MEAS Start Subframe %d Frame Type %d slot %d \n",subframe,ue->frame_parms.frame_type,slot);
for (eNB_offset = 0; eNB_offset<1+ue->measurements.n_adj_cells; eNB_offset++) {
if (eNB_offset==0) {
ue->measurements.rssi = 0;
//ue->measurements.n0_power_tot = 0;
if (abstraction_flag == 0) {
if ( ((ue->frame_parms.frame_type == FDD) && ((subframe == 0) || (subframe == 5))) ||
((ue->frame_parms.frame_type == TDD) && ((subframe == 1) || (subframe == 6)))
)
{ // FDD PSS/SSS, compute noise in DTX REs
if (ue->frame_parms.Ncp == NORMAL) {
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
if(ue->frame_parms.frame_type == FDD)
{
rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[aarx][(5*ue->frame_parms.ofdm_symbol_size)];
rxF_pss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[aarx][(6*ue->frame_parms.ofdm_symbol_size)];
}
else
{
rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[previous_thread_id].rxdataF[aarx][(13*ue->frame_parms.ofdm_symbol_size)];
rxF_pss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[aarx][(2*ue->frame_parms.ofdm_symbol_size)];
}
//-ve spectrum from SSS
//+ve spectrum from SSS
ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[2+70]*rxF_sss[2+70])+((int32_t)rxF_sss[2+69]*rxF_sss[2+69]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[2+68]*rxF_sss[2+68])+((int32_t)rxF_sss[2+67]*rxF_sss[2+67]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[2+66]*rxF_sss[2+66])+((int32_t)rxF_sss[2+65]*rxF_sss[2+65]));
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[2+64]*rxF_sss[2+64])+((int32_t)rxF_sss[2+63]*rxF_sss[2+63]));
// printf("sssp32 %d\n",ue->measurements.n0_power[aarx]);
//+ve spectrum from PSS
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[2+70]*rxF_pss[2+70])+((int32_t)rxF_pss[2+69]*rxF_pss[2+69]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[2+68]*rxF_pss[2+68])+((int32_t)rxF_pss[2+67]*rxF_pss[2+67]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[2+66]*rxF_pss[2+66])+((int32_t)rxF_pss[2+65]*rxF_pss[2+65]));
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[2+64]*rxF_pss[2+64])+((int32_t)rxF_pss[2+63]*rxF_pss[2+63]));
// printf("pss32 %d\n",ue->measurements.n0_power[aarx]); //-ve spectrum from PSS
if(ue->frame_parms.frame_type == FDD)
{
rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[aarx][(6*ue->frame_parms.ofdm_symbol_size)];
rxF_pss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[aarx][(7*ue->frame_parms.ofdm_symbol_size)];
}
else
{
rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[previous_thread_id].rxdataF[aarx][(14*ue->frame_parms.ofdm_symbol_size)];
rxF_pss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[aarx][(3*ue->frame_parms.ofdm_symbol_size)];
}
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-72]*rxF_pss[-72])+((int32_t)rxF_pss[-71]*rxF_pss[-71]));
// printf("pssm36 %d\n",ue->measurements.n0_power[aarx]);
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-70]*rxF_pss[-70])+((int32_t)rxF_pss[-69]*rxF_pss[-69]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-68]*rxF_pss[-68])+((int32_t)rxF_pss[-67]*rxF_pss[-67]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-66]*rxF_pss[-66])+((int32_t)rxF_pss[-65]*rxF_pss[-65]));
ue->measurements.n0_power[aarx] = (((int32_t)rxF_sss[-70]*rxF_sss[-70])+((int32_t)rxF_sss[-69]*rxF_sss[-69]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[-68]*rxF_sss[-68])+((int32_t)rxF_sss[-67]*rxF_sss[-67]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[-66]*rxF_sss[-66])+((int32_t)rxF_sss[-65]*rxF_sss[-65]));
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-64]*rxF_pss[-64])+((int32_t)rxF_pss[-63]*rxF_pss[-63]));
// printf("pssm32 %d\n",ue->measurements.n0_power[aarx]);
ue->measurements.n0_power_dB[aarx] = (unsigned short) dB_fixed(ue->measurements.n0_power[aarx]/12);
ue->measurements.n0_power_tot /*+=*/ = ue->measurements.n0_power[aarx];
}
//LOG_I(PHY,"Subframe %d RRC UE MEAS Noise Level %d \n", subframe, ue->measurements.n0_power_tot);
ue->measurements.n0_power_tot_dB = (unsigned short) dB_fixed(ue->measurements.n0_power_tot/(12*aarx));
ue->measurements.n0_power_tot_dBm = ue->measurements.n0_power_tot_dB - ue->rx_total_gain_dB - dB_fixed(ue->frame_parms.ofdm_symbol_size);
} else {
LOG_E(PHY, "Not yet implemented: noise power calculation when prefix length == EXTENDED\n");
}
}
else if ((ue->frame_parms.frame_type == TDD) &&
((subframe == 1) || (subframe == 6))) { // TDD PSS/SSS, compute noise in DTX REs // 2016-09-29 wilson fix incorrect noise power calculation
pss_symb = 2;
sss_symb = ue->frame_parms.symbols_per_tti-1;
if (ue->frame_parms.Ncp==NORMAL) {
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[(ue->current_thread_id[subframe])].rxdataF;
rxF_pss = (int16_t *) &rxdataF[aarx][((pss_symb*(ue->frame_parms.ofdm_symbol_size)))];
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[previous_thread_id].rxdataF;
rxF_sss = (int16_t *) &rxdataF[aarx][((sss_symb*(ue->frame_parms.ofdm_symbol_size)))];
//-ve spectrum from SSS
// printf("slot %d: SSS DTX: %d,%d, non-DTX %d,%d\n",slot,rxF_pss[-72],rxF_pss[-71],rxF_pss[-36],rxF_pss[-35]);
// ue->measurements.n0_power[aarx] = (((int32_t)rxF_pss[-72]*rxF_pss[-72])+((int32_t)rxF_pss[-71]*rxF_pss[-71]));
// printf("sssn36 %d\n",ue->measurements.n0_power[aarx]);
ue->measurements.n0_power[aarx] = (((int32_t)rxF_pss[-70]*rxF_pss[-70])+((int32_t)rxF_pss[-69]*rxF_pss[-69]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-68]*rxF_pss[-68])+((int32_t)rxF_pss[-67]*rxF_pss[-67]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-66]*rxF_pss[-66])+((int32_t)rxF_pss[-65]*rxF_pss[-65]));
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-64]*rxF_pss[-64])+((int32_t)rxF_pss[-63]*rxF_pss[-63]));
// printf("sssm32 %d\n",ue->measurements.n0_power[aarx]);
//+ve spectrum from SSS
ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[2+70]*rxF_sss[2+70])+((int32_t)rxF_sss[2+69]*rxF_sss[2+69]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[2+68]*rxF_sss[2+68])+((int32_t)rxF_sss[2+67]*rxF_sss[2+67]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[2+66]*rxF_sss[2+66])+((int32_t)rxF_sss[2+65]*rxF_sss[2+65]));
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_sss[2+64]*rxF_sss[2+64])+((int32_t)rxF_sss[2+63]*rxF_sss[2+63]));
// printf("sssp32 %d\n",ue->measurements.n0_power[aarx]);
//+ve spectrum from PSS
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[2+70]*rxF_pss[2+70])+((int32_t)rxF_pss[2+69]*rxF_pss[2+69]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[2+68]*rxF_pss[2+68])+((int32_t)rxF_pss[2+67]*rxF_pss[2+67]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[2+66]*rxF_pss[2+66])+((int32_t)rxF_pss[2+65]*rxF_pss[2+65]));
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[2+64]*rxF_pss[2+64])+((int32_t)rxF_pss[2+63]*rxF_pss[2+63]));
// printf("pss32 %d\n",ue->measurements.n0_power[aarx]); //-ve spectrum from PSS
rxF_pss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[aarx][(7*ue->frame_parms.ofdm_symbol_size)];
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-72]*rxF_pss[-72])+((int32_t)rxF_pss[-71]*rxF_pss[-71]));
// printf("pssm36 %d\n",ue->measurements.n0_power[aarx]);
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-70]*rxF_pss[-70])+((int32_t)rxF_pss[-69]*rxF_pss[-69]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-68]*rxF_pss[-68])+((int32_t)rxF_pss[-67]*rxF_pss[-67]));
ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-66]*rxF_pss[-66])+((int32_t)rxF_pss[-65]*rxF_pss[-65]));
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-64]*rxF_pss[-64])+((int32_t)rxF_pss[-63]*rxF_pss[-63]));
// printf("pssm32 %d\n",ue->measurements.n0_power[aarx]);
ue->measurements.n0_power_dB[aarx] = (unsigned short) dB_fixed(ue->measurements.n0_power[aarx]/12);
ue->measurements.n0_power_tot /*+=*/ = ue->measurements.n0_power[aarx];
}
ue->measurements.n0_power_tot_dB = (unsigned short) dB_fixed(ue->measurements.n0_power_tot/(12*aarx));
ue->measurements.n0_power_tot_dBm = ue->measurements.n0_power_tot_dB - ue->rx_total_gain_dB - dB_fixed(ue->frame_parms.ofdm_symbol_size);
//LOG_I(PHY,"Subframe %d RRC UE MEAS Noise Level %d \n", subframe, ue->measurements.n0_power_tot);
}
}
}
}
// recompute nushift with eNB_offset corresponding to adjacent eNB on which to perform channel estimation
// printf("[PHY][UE %d] Frame %d slot %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, Nid2 %d, nushift %d, eNB_offset %d)\n",ue->Mod_id,ue->frame,slot,Nid_cell,Nid2,nushift,eNB_offset);
if (eNB_offset > 0)
Nid_cell = ue->measurements.adj_cell_id[eNB_offset-1];
nushift = Nid_cell%6;
ue->measurements.rsrp[eNB_offset] = 0;
if (abstraction_flag == 0) {
// compute RSRP using symbols 0 and 4-frame_parms->Ncp
for (l=0,nu=0; l<=(4-ue->frame_parms.Ncp); l+=(4-ue->frame_parms.Ncp),nu=3) {
k = (nu + nushift)%6;
//#ifdef DEBUG_MEAS_RRC
LOG_D(PHY,"[UE %d] Frame %d subframe %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, nushift %d, eNB_offset %d, k %d, l %d)\n",ue->Mod_id,ue->proc.proc_rxtx[subframe&1].frame_rx,subframe,Nid_cell,nushift,
eNB_offset,k,l);
//#endif
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
rxF = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[aarx][(l*ue->frame_parms.ofdm_symbol_size)];
off = (ue->frame_parms.first_carrier_offset+k)<<1;
if (l==(4-ue->frame_parms.Ncp)) {
for (rb=0; rb<ue->frame_parms.N_RB_DL; rb++) {
// printf("rb %d, off %d, off2 %d\n",rb,off,off2);
ue->measurements.rsrp[eNB_offset] += (((int32_t)(rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1]));
// printf("rb %d, off %d : %d\n",rb,off,((((int32_t)rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1])));
// if ((ue->frame_rx&0x3ff) == 0)
// printf("rb %d, off %d : %d\n",rb,off,((rxF[off]*rxF[off])+(rxF[off+1]*rxF[off+1])));
off+=12;
if (off>=(ue->frame_parms.ofdm_symbol_size<<1))
off = (1+k)<<1;
ue->measurements.rsrp[eNB_offset] += (((int32_t)(rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1]));
// printf("rb %d, off %d : %d\n",rb,off,(((int32_t)(rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1])));
/*
if ((ue->frame_rx&0x3ff) == 0)
printf("rb %d, off %d : %d\n",rb,off,((rxF[off]*rxF[off])+(rxF[off+1]*rxF[off+1])));
*/
off+=12;
if (off>=(ue->frame_parms.ofdm_symbol_size<<1))
off = (1+k)<<1;
}
/*
if ((eNB_offset==0)&&(l==0)) {
for (i=0;i<6;i++,off2+=4)
ue->measurements.rssi += ((rxF[off2]*rxF[off2])+(rxF[off2+1]*rxF[off2+1]));
if (off2==(ue->frame_parms.ofdm_symbol_size<<2))
off2=4;
for (i=0;i<6;i++,off2+=4)
ue->measurements.rssi += ((rxF[off2]*rxF[off2])+(rxF[off2+1]*rxF[off2+1]));
}
*/
// printf("slot %d, rb %d => rsrp %d, rssi %d\n",slot,rb,ue->measurements.rsrp[eNB_offset],ue->measurements.rssi);
}
}
}
// 2 RE per PRB
// ue->measurements.rsrp[eNB_offset]/=(24*ue->frame_parms.N_RB_DL);
ue->measurements.rsrp[eNB_offset]/=(2*ue->frame_parms.N_RB_DL*ue->frame_parms.ofdm_symbol_size);
// LOG_I(PHY,"eNB: %d, RSRP: %d \n",eNB_offset,ue->measurements.rsrp[eNB_offset]);
if (eNB_offset == 0) {
// ue->measurements.rssi/=(24*ue->frame_parms.N_RB_DL);
// ue->measurements.rssi*=rx_power_correction;
// ue->measurements.rssi=ue->measurements.rsrp[0]*24/2;
ue->measurements.rssi=ue->measurements.rsrp[0]*(12*ue->frame_parms.N_RB_DL);
}
if (ue->measurements.rssi>0)
ue->measurements.rsrq[eNB_offset] = 100*ue->measurements.rsrp[eNB_offset]*ue->frame_parms.N_RB_DL/ue->measurements.rssi;
else
ue->measurements.rsrq[eNB_offset] = -12000;
//((200*ue->measurements.rsrq[eNB_offset]) + ((1024-200)*100*ue->measurements.rsrp[eNB_offset]*ue->frame_parms.N_RB_DL/ue->measurements.rssi))>>10;
} else { // Do abstraction of RSRP and RSRQ
ue->measurements.rssi = ue->measurements.rx_power_avg[0];
// dummay value for the moment
ue->measurements.rsrp[eNB_offset] = -93 ;
ue->measurements.rsrq[eNB_offset] = 3;
}
//#ifdef DEBUG_MEAS_RRC
// if (slot == 0) {
if (eNB_offset == 0)
LOG_D(PHY,"[UE %d] Frame %d, subframe %d RRC Measurements => rssi %3.1f dBm (digital: %3.1f dB, gain %d), N0 %d dBm\n",ue->Mod_id,
ue->proc.proc_rxtx[subframe&1].frame_rx,subframe,10*log10(ue->measurements.rssi)-ue->rx_total_gain_dB,
10*log10(ue->measurements.rssi),
ue->rx_total_gain_dB,
ue->measurements.n0_power_tot_dBm);
LOG_D(PHY,"[UE %d] Frame %d, subframe %d RRC Measurements (idx %d, Cell id %d) => rsrp: %3.1f dBm/RE (%d), rsrq: %3.1f dB\n",
ue->Mod_id,
ue->proc.proc_rxtx[subframe&1].frame_rx,subframe,eNB_offset,
(eNB_offset>0) ? ue->measurements.adj_cell_id[eNB_offset-1] : ue->frame_parms.Nid_cell,
10*log10(ue->measurements.rsrp[eNB_offset])-ue->rx_total_gain_dB,
ue->measurements.rsrp[eNB_offset],
(10*log10(ue->measurements.rsrq[eNB_offset])));
//LOG_D(PHY,"RSRP_total_dB: %3.2f \n",(dB_fixed_times10(ue->measurements.rsrp[eNB_offset])/10.0)-ue->rx_total_gain_dB-dB_fixed(ue->frame_parms.N_RB_DL*12));
//LOG_D(PHY,"RSRP_dB: %3.2f \n",(dB_fixed_times10(ue->measurements.rsrp[eNB_offset])/10.0));
//LOG_D(PHY,"gain_loss_dB: %d \n",ue->rx_total_gain_dB);
//LOG_D(PHY,"gain_fixed_dB: %d \n",dB_fixed(ue->frame_parms.N_RB_DL*12));
// }
//#endif
}
}
#endif
#if 0
void conjch0_mult_ch1(int *ch0,
int *ch1,
int32_t *ch0conj_ch1,
unsigned short nb_rb,
unsigned char output_shift0)
{
//This function is used to compute multiplications in Hhermitian * H matrix
unsigned short rb;
__m128i *dl_ch0_128,*dl_ch1_128, *ch0conj_ch1_128, mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3;
dl_ch0_128 = (__m128i *)ch0;
dl_ch1_128 = (__m128i *)ch1;
ch0conj_ch1_128 = (__m128i *)ch0conj_ch1;
for (rb=0; rb<3*nb_rb; rb++) {
mmtmpD0 = _mm_madd_epi16(dl_ch0_128[0],dl_ch1_128[0]);
mmtmpD1 = _mm_shufflelo_epi16(dl_ch0_128[0],_MM_SHUFFLE(2,3,0,1));
mmtmpD1 = _mm_shufflehi_epi16(mmtmpD1,_MM_SHUFFLE(2,3,0,1));
mmtmpD1 = _mm_sign_epi16(mmtmpD1,*(__m128i*)&conjugate[0]);
mmtmpD1 = _mm_madd_epi16(mmtmpD1,dl_ch1_128[0]);
mmtmpD0 = _mm_srai_epi32(mmtmpD0,output_shift0);
mmtmpD1 = _mm_srai_epi32(mmtmpD1,output_shift0);
mmtmpD2 = _mm_unpacklo_epi32(mmtmpD0,mmtmpD1);
mmtmpD3 = _mm_unpackhi_epi32(mmtmpD0,mmtmpD1);
ch0conj_ch1_128[0] = _mm_packs_epi32(mmtmpD2,mmtmpD3);
#ifdef DEBUG_RANK_EST
printf("\n Computing conjugates \n");
print_shorts("ch0:",(int16_t*)&dl_ch0_128[0]);
print_shorts("ch1:",(int16_t*)&dl_ch1_128[0]);
print_shorts("pack:",(int16_t*)&ch0conj_ch1_128[0]);
#endif
dl_ch0_128+=1;
dl_ch1_128+=1;
ch0conj_ch1_128+=1;
}
_mm_empty();
_m_empty();
}
void construct_HhH_elements(int *ch0conj_ch0, //00_00
int *ch1conj_ch1,//01_01
int *ch2conj_ch2,//11_11
int *ch3conj_ch3,//10_10
int *ch0conj_ch1,//00_01
int *ch1conj_ch0,//01_00
int *ch2conj_ch3,//10_11
int *ch3conj_ch2,//11_10
int32_t *after_mf_00,
int32_t *after_mf_01,
int32_t *after_mf_10,
int32_t *after_mf_11,
unsigned short nb_rb)
{
unsigned short rb;
__m128i *ch0conj_ch0_128, *ch1conj_ch1_128, *ch2conj_ch2_128, *ch3conj_ch3_128;
__m128i *ch0conj_ch1_128, *ch1conj_ch0_128, *ch2conj_ch3_128, *ch3conj_ch2_128;
__m128i *after_mf_00_128, *after_mf_01_128, *after_mf_10_128, *after_mf_11_128;
ch0conj_ch0_128 = (__m128i *)ch0conj_ch0;
ch1conj_ch1_128 = (__m128i *)ch1conj_ch1;
ch2conj_ch2_128 = (__m128i *)ch2conj_ch2;
ch3conj_ch3_128 = (__m128i *)ch3conj_ch3;
ch0conj_ch1_128 = (__m128i *)ch0conj_ch1;
ch1conj_ch0_128 = (__m128i *)ch1conj_ch0;
ch2conj_ch3_128 = (__m128i *)ch2conj_ch3;
ch3conj_ch2_128 = (__m128i *)ch3conj_ch2;
after_mf_00_128 = (__m128i *)after_mf_00;
after_mf_01_128 = (__m128i *)after_mf_01;
after_mf_10_128 = (__m128i *)after_mf_10;
after_mf_11_128 = (__m128i *)after_mf_11;
for (rb=0; rb<3*nb_rb; rb++) {
after_mf_00_128[0] =_mm_adds_epi16(ch0conj_ch0_128[0],ch3conj_ch3_128[0]);// _mm_adds_epi32(ch0conj_ch0_128[0], ch3conj_ch3_128[0]); //00_00 + 10_10
after_mf_11_128[0] =_mm_adds_epi16(ch1conj_ch1_128[0], ch2conj_ch2_128[0]); //01_01 + 11_11
after_mf_01_128[0] =_mm_adds_epi16(ch0conj_ch1_128[0], ch2conj_ch3_128[0]);//00_01 + 10_11
after_mf_10_128[0] =_mm_adds_epi16(ch1conj_ch0_128[0], ch3conj_ch2_128[0]);//01_00 + 11_10
#ifdef DEBUG_RANK_EST
printf(" \n construct_HhH_elements \n");
print_shorts("ch0conj_ch0_128:",(int16_t*)&ch0conj_ch0_128[0]);
print_shorts("ch1conj_ch1_128:",(int16_t*)&ch1conj_ch1_128[0]);
print_shorts("ch2conj_ch2_128:",(int16_t*)&ch2conj_ch2_128[0]);
print_shorts("ch3conj_ch3_128:",(int16_t*)&ch3conj_ch3_128[0]);
print_shorts("ch0conj_ch1_128:",(int16_t*)&ch0conj_ch1_128[0]);
print_shorts("ch1conj_ch0_128:",(int16_t*)&ch1conj_ch0_128[0]);
print_shorts("ch2conj_ch3_128:",(int16_t*)&ch2conj_ch3_128[0]);
print_shorts("ch3conj_ch2_128:",(int16_t*)&ch3conj_ch2_128[0]);
print_shorts("after_mf_00_128:",(int16_t*)&after_mf_00_128[0]);
print_shorts("after_mf_01_128:",(int16_t*)&after_mf_01_128[0]);
print_shorts("after_mf_10_128:",(int16_t*)&after_mf_10_128[0]);
print_shorts("after_mf_11_128:",(int16_t*)&after_mf_11_128[0]);
#endif
ch0conj_ch0_128+=1;
ch1conj_ch1_128+=1;
ch2conj_ch2_128+=1;
ch3conj_ch3_128+=1;
ch0conj_ch1_128+=1;
ch1conj_ch0_128+=1;
ch2conj_ch3_128+=1;
ch3conj_ch2_128+=1;
after_mf_00_128+=1;
after_mf_01_128+=1;
after_mf_10_128+=1;
after_mf_11_128+=1;
}
_mm_empty();
_m_empty();
}
void squared_matrix_element(int32_t *Hh_h_00,
int32_t *Hh_h_00_sq,
unsigned short nb_rb)
{
unsigned short rb;
__m128i *Hh_h_00_128,*Hh_h_00_sq_128;
Hh_h_00_128 = (__m128i *)Hh_h_00;
Hh_h_00_sq_128 = (__m128i *)Hh_h_00_sq;
for (rb=0; rb<3*nb_rb; rb++) {
Hh_h_00_sq_128[0] = _mm_madd_epi16(Hh_h_00_128[0],Hh_h_00_128[0]);
#ifdef DEBUG_RANK_EST
printf("\n Computing squared_matrix_element \n");
print_shorts("Hh_h_00_128:",(int16_t*)&Hh_h_00_128[0]);
print_ints("Hh_h_00_sq_128:",(int32_t*)&Hh_h_00_sq_128[0]);
#endif
Hh_h_00_sq_128+=1;
Hh_h_00_128+=1;
}
_mm_empty();
_m_empty();
}
void det_HhH(int32_t *after_mf_00,
int32_t *after_mf_01,
int32_t *after_mf_10,
int32_t *after_mf_11,
int32_t *det_fin,
unsigned short nb_rb)
{
unsigned short rb;
__m128i *after_mf_00_128,*after_mf_01_128, *after_mf_10_128, *after_mf_11_128, ad_re_128, bc_re_128;
__m128i *det_fin_128, det_128;
after_mf_00_128 = (__m128i *)after_mf_00;
after_mf_01_128 = (__m128i *)after_mf_01;
after_mf_10_128 = (__m128i *)after_mf_10;
after_mf_11_128 = (__m128i *)after_mf_11;
det_fin_128 = (__m128i *)det_fin;
for (rb=0; rb<3*nb_rb; rb++) {
ad_re_128 = _mm_madd_epi16(after_mf_00_128[0],after_mf_11_128[0]);
bc_re_128 = _mm_madd_epi16(after_mf_01_128[0],after_mf_01_128[0]);
det_128 = _mm_sub_epi32(ad_re_128, bc_re_128);
det_fin_128[0] = _mm_abs_epi32(det_128);
#ifdef DEBUG_RANK_EST
printf("\n Computing denominator \n");
print_shorts("after_mf_00_128:",(int16_t*)&after_mf_00_128[0]);
print_shorts("after_mf_01_128:",(int16_t*)&after_mf_01_128[0]);
print_shorts("after_mf_10_128:",(int16_t*)&after_mf_10_128[0]);
print_shorts("after_mf_11_128:",(int16_t*)&after_mf_11_128[0]);
print_ints("ad_re_128:",(int32_t*)&ad_re_128);
print_ints("bc_re_128:",(int32_t*)&bc_re_128);
print_ints("det_fin_128:",(int32_t*)&det_fin_128[0]);
#endif
det_fin_128+=1;
after_mf_00_128+=1;
after_mf_01_128+=1;
after_mf_10_128+=1;
after_mf_11_128+=1;
}
_mm_empty();
_m_empty();
}
void numer(int32_t *Hh_h_00_sq,
int32_t *Hh_h_01_sq,
int32_t *Hh_h_10_sq,
int32_t *Hh_h_11_sq,
int32_t *num_fin,
unsigned short nb_rb)
{
unsigned short rb;
__m128i *h_h_00_sq_128, *h_h_01_sq_128, *h_h_10_sq_128, *h_h_11_sq_128;
__m128i *num_fin_128, sq_a_plus_sq_d_128, sq_b_plus_sq_c_128;
h_h_00_sq_128 = (__m128i *)Hh_h_00_sq;
h_h_01_sq_128 = (__m128i *)Hh_h_01_sq;
h_h_10_sq_128 = (__m128i *)Hh_h_10_sq;
h_h_11_sq_128 = (__m128i *)Hh_h_11_sq;
num_fin_128 = (__m128i *)num_fin;
for (rb=0; rb<3*nb_rb; rb++) {
sq_a_plus_sq_d_128 = _mm_add_epi32(h_h_00_sq_128[0],h_h_11_sq_128[0]);
sq_b_plus_sq_c_128 = _mm_add_epi32(h_h_01_sq_128[0],h_h_10_sq_128[0]);
num_fin_128[0] = _mm_add_epi32(sq_a_plus_sq_d_128, sq_b_plus_sq_c_128);
#ifdef DEBUG_RANK_EST
printf("\n Computing numerator \n");
print_ints("h_h_00_sq_128:",(int32_t*)&h_h_00_sq_128[0]);
print_ints("h_h_01_sq_128:",(int32_t*)&h_h_01_sq_128[0]);
print_ints("h_h_10_sq_128:",(int32_t*)&h_h_10_sq_128[0]);
print_ints("h_h_11_sq_128:",(int32_t*)&h_h_11_sq_128[0]);
print_shorts("sq_a_plus_sq_d_128:",(int16_t*)&sq_a_plus_sq_d_128);
print_shorts("sq_b_plus_sq_c_128:",(int16_t*)&sq_b_plus_sq_c_128);
print_shorts("num_fin_128:",(int16_t*)&num_fin_128[0]);
#endif
num_fin_128+=1;
h_h_00_sq_128+=1;
h_h_01_sq_128+=1;
h_h_10_sq_128+=1;
h_h_11_sq_128+=1;
}
_mm_empty();
_m_empty();
}
#endif
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
unsigned int subframe_offset,
@@ -735,7 +112,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
for (eNB_id=0; eNB_id<ue->n_connected_eNB; eNB_id++) {
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
ue->measurements.rx_spatial_power[eNB_id][aatx][aarx] =
(signal_energy_nodc(&ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates[eNB_id][ch_offset],
(50*12)));
@@ -816,4 +193,4 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
_mm_empty();
_m_empty();
#endif
}
}
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+265 -1398
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
+4 -1014
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+149 -132
View File
@@ -41,12 +41,11 @@
#include "SCHED_NR_UE/defs.h"
#include "SIMULATION/TOOLS/sim.h"
#include "executables/nr-uesoftmodem.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
#include "PHY/CODING/nrLDPC_extern.h"
//#define DEBUG_DLSCH_DECODING
//#define ENABLE_PHY_PAYLOAD_DEBUG 1
#define OAI_LDPC_MAX_NUM_LLR 27000//26112 // NR_LDPC_NCOL_BG1*NR_LDPC_ZMAX
//#define OAI_LDPC_MAX_NUM_LLR 27000//26112 // NR_LDPC_NCOL_BG1*NR_LDPC_ZMAX
static uint64_t nb_total_decod =0;
static uint64_t nb_error_decod =0;
@@ -57,31 +56,46 @@ int nbDlProcessing =0;
//extern double cpuf;
void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlschptr)
void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlschptr,uint8_t N_RB_DL)
{
int i,r;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
NR_UE_DLSCH_t *dlsch=*dlschptr;
if (dlsch) {
if (N_RB_DL != 273) {
a_segments = a_segments*N_RB_DL;
a_segments = a_segments/273;
}
uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
for (i=0; i<dlsch->Mdlharq; i++) {
if (dlsch->harq_processes[i]) {
if (dlsch->harq_processes[i]->b) {
free16(dlsch->harq_processes[i]->b,MAX_DLSCH_PAYLOAD_BYTES);
free16(dlsch->harq_processes[i]->b,dlsch_bytes);
dlsch->harq_processes[i]->b = NULL;
}
for (r=0; r<MAX_NUM_NR_DLSCH_SEGMENTS; r++) {
for (r=0; r<a_segments; r++) {
free16(dlsch->harq_processes[i]->c[r],1056);
dlsch->harq_processes[i]->c[r] = NULL;
}
for (r=0; r<MAX_NUM_NR_DLSCH_SEGMENTS; r++)
for (r=0; r<a_segments; r++)
if (dlsch->harq_processes[i]->d[r]) {
free16(dlsch->harq_processes[i]->d[r],(3*8448)*sizeof(short));
free16(dlsch->harq_processes[i]->d[r],(5*8448)*sizeof(short));
dlsch->harq_processes[i]->d[r] = NULL;
}
for (r=0; r<(MAX_NUM_NR_DLSCH_SEGMENTS); r++) {
for (r=0; r<a_segments; r++)
if (dlsch->harq_processes[i]->w[r]) {
free16(dlsch->harq_processes[i]->w[r],(5*8448)*sizeof(short));
dlsch->harq_processes[i]->w[r] = NULL;
}
for (r=0; r<a_segments; r++) {
if (dlsch->harq_processes[i]->p_nrLDPC_procBuf[r]){
nrLDPC_free_mem(dlsch->harq_processes[i]->p_nrLDPC_procBuf[r]);
dlsch->harq_processes[i]->p_nrLDPC_procBuf[r] = NULL;
@@ -98,31 +112,20 @@ void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlschptr)
}
}
NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_ldpc_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag)
NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_ldpc_iterations,uint16_t N_RB_DL, uint8_t abstraction_flag)
{
NR_UE_DLSCH_t *dlsch;
uint8_t exit_flag = 0,i,r;
unsigned char bw_scaling =1;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
switch (N_RB_DL) {
case 6:
bw_scaling =16;
break;
if (N_RB_DL != 273) {
a_segments = a_segments*N_RB_DL;
a_segments = (a_segments/273)+1;
}
case 25:
bw_scaling =4;
break;
case 50:
bw_scaling =2;
break;
default:
bw_scaling =1;
break;
}
uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
@@ -141,15 +144,15 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
if (dlsch->harq_processes[i]) {
memset(dlsch->harq_processes[i],0,sizeof(NR_DL_UE_HARQ_t));
dlsch->harq_processes[i]->first_tx=1;
dlsch->harq_processes[i]->b = (uint8_t*)malloc16(MAX_DLSCH_PAYLOAD_BYTES/bw_scaling);
dlsch->harq_processes[i]->b = (uint8_t*)malloc16(dlsch_bytes);
if (dlsch->harq_processes[i]->b)
memset(dlsch->harq_processes[i]->b,0,MAX_DLSCH_PAYLOAD_BYTES/bw_scaling);
memset(dlsch->harq_processes[i]->b,0,dlsch_bytes);
else
exit_flag=3;
if (abstraction_flag == 0) {
for (r=0; r<MAX_NUM_NR_DLSCH_SEGMENTS/bw_scaling; r++) {
for (r=0; r<a_segments; r++) {
dlsch->harq_processes[i]->p_nrLDPC_procBuf[r] = nrLDPC_init_mem();
dlsch->harq_processes[i]->c[r] = (uint8_t*)malloc16(1056);
@@ -158,10 +161,17 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
else
exit_flag=2;
dlsch->harq_processes[i]->d[r] = (short*)malloc16((3*8448)*sizeof(short));
dlsch->harq_processes[i]->d[r] = (short*)malloc16((5*8448)*sizeof(short));
if (dlsch->harq_processes[i]->d[r])
memset(dlsch->harq_processes[i]->d[r],0,(3*8448)*sizeof(short));
memset(dlsch->harq_processes[i]->d[r],0,(5*8448)*sizeof(short));
else
exit_flag=2;
dlsch->harq_processes[i]->w[r] = (short*)malloc16((5*8448)*sizeof(short));
if (dlsch->harq_processes[i]->w[r])
memset(dlsch->harq_processes[i]->w[r],0,(5*8448)*sizeof(short));
else
exit_flag=2;
}
@@ -176,7 +186,7 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
}
printf("new_ue_dlsch with size %zu: exit_flag = %u\n",sizeof(NR_DL_UE_HARQ_t), exit_flag);
free_nr_ue_dlsch(&dlsch);
free_nr_ue_dlsch(&dlsch,N_RB_DL);
return(NULL);
}
@@ -228,7 +238,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
int32_t no_iteration_ldpc, length_dec;
uint32_t r,r_offset=0,Kr=8424,Kr_bytes,K_bytes_F,err_flag=0;
uint8_t crc_type;
int8_t llrProcBuf[OAI_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
int8_t llrProcBuf[NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
t_nrLDPC_dec_params decParams;
t_nrLDPC_dec_params* p_decParams = &decParams;
t_nrLDPC_time_stats procTime;
@@ -239,20 +249,24 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return(dlsch->max_ldpc_iterations + 1);
}
t_nrLDPC_procBuf** p_nrLDPC_procBuf = harq_process->p_nrLDPC_procBuf;
int16_t z [68*384];
int8_t l [68*384];
//__m128i l;
//int16_t inv_d [68*384];
uint8_t kc;
uint8_t Ilbrm = 1;
uint32_t Tbslbrm; //= 950984;
uint16_t nb_rb; //= 30;
double Coderate; //= 0.0;
//nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
//uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = 6; //(dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
uint8_t Ilbrm = 0;
uint32_t Tbslbrm;// = 950984;
uint16_t nb_rb;// = 30;
double Coderate;// = 0.0;
uint8_t dmrs_Type = harq_process->dmrsConfigType;
AssertFatal(dmrs_Type == 1 || dmrs_Type == 2,"Illegal dmrs_type %d\n",dmrs_Type);
uint8_t nb_re_dmrs = (dmrs_Type==1)?6:4;
uint16_t dmrs_length = get_num_dmrs(harq_process->dlDmrsSymbPos);
AssertFatal(dmrs_length == 1 || dmrs_length == 2,"Illegal dmrs_length %d\n",dmrs_length);
uint32_t i,j;
@@ -304,16 +318,16 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint16_t nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs
harq_process->TBS = nr_compute_tbs(harq_process->Qm,harq_process->R,nb_rb,nb_symb_sch,nb_re_dmrs*length_dmrs, nb_rb_oh, harq_process->Nl);
harq_process->TBS = nr_compute_tbs(harq_process->Qm,harq_process->R,nb_rb,nb_symb_sch,nb_re_dmrs*dmrs_length, nb_rb_oh, harq_process->Nl);
A = harq_process->TBS;
ret = dlsch->max_ldpc_iterations + 1;
dlsch->last_iteration_cnt = ret;
harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, harq_process->Qm,harq_process->Nl);
harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, dmrs_length, harq_process->Qm,harq_process->Nl);
G = harq_process->G;
LOG_I(PHY,"DLSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
LOG_D(PHY,"DLSCH Decoding, harq_pid %d TBS %d G %d nb_re_dmrs %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, nb_re_dmrs,harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
if ((harq_process->R)<1024)
Coderate = (float) (harq_process->R) /(float) 1024;
@@ -388,20 +402,15 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
err_flag = 0;
r_offset = 0;
unsigned char bw_scaling =1;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
switch (frame_parms->N_RB_DL) {
case 106:
bw_scaling =2;
break;
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
a_segments = a_segments/273;
}
default:
bw_scaling =1;
break;
}
if (harq_process->C > MAX_NUM_NR_DLSCH_SEGMENTS/bw_scaling) {
LOG_E(PHY,"Illegal harq_process->C %d > %d\n",harq_process->C,MAX_NUM_NR_DLSCH_SEGMENTS/bw_scaling);
if (harq_process->C > a_segments) {
LOG_E(PHY,"Illegal harq_process->C %d > %d\n",harq_process->C,a_segments);
return((1+dlsch->max_ldpc_iterations));
}
@@ -427,6 +436,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DEINTERLEAVING, VCD_FUNCTION_IN);
nr_deinterleaving_ldpc(E,
harq_process->Qm,
harq_process->w[r], // [hna] w is e
@@ -445,9 +455,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
start_meas(dlsch_rate_unmatching_stats);
#endif
#ifdef DEBUG_DLSCH_DECODING
LOG_D(PHY,"HARQ_PID %d Rate Matching Segment %d (coded bits %d,unpunctured/repeated bits %d, TBS %d, mod_order %d, nb_rb %d, Nl %d, rv %d, round %d)...\n",
harq_pid,r, G,
LOG_D(PHY,"HARQ_PID %d Rate Matching Segment %d (coded bits %d,E %d, F %d,unpunctured/repeated bits %d, TBS %d, mod_order %d, nb_rb %d, Nl %d, rv %d, round %d)...\n",
harq_pid,r, G,E,harq_process->F,
Kr*3,
harq_process->TBS,
harq_process->Qm,
@@ -455,7 +464,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->Nl,
harq_process->rvidx,
harq_process->round);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_RATE_MATCHING, VCD_FUNCTION_IN);
@@ -464,6 +473,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
else
Tbslbrm = nr_compute_tbslbrm(harq_process->mcs_table,nb_rb,4,harq_process->C);
if (nr_rate_matching_ldpc_rx(Ilbrm,
Tbslbrm,
p_decParams->BG,
@@ -473,7 +483,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->C,
harq_process->rvidx,
(harq_process->round==0)?1:0,
E)==-1) {
E,
harq_process->F,
Kr-harq_process->F-2*(p_decParams->Z))==-1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_RATE_MATCHING, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(dlsch_rate_unmatching_stats);
@@ -487,6 +499,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
#endif
}
//for (int i =0; i<16; i++)
// printf("rx output ratematching d[%d]= %d r_offset %d\n", i,harq_process->d[r][i], r_offset);
@@ -495,12 +508,12 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
#ifdef DEBUG_DLSCH_DECODING
if (r==0) {
write_output("decoder_llr.m","decllr",dlsch_llr,G,1,0);
write_output("decoder_in.m","dec",&harq_process->d[0][0],(3*8*Kr_bytes)+12,1,0);
write_output("decoder_in.m","dec",&harq_process->d[0][0],E,1,0);
}
printf("decoder input(segment %u) :",r);
int i;
for (i=0;i<(3*8*Kr_bytes)+12;i++)
for (i=0;i<E;i++)
printf("%d : %d\n",i,harq_process->d[r][i]);
printf("\n");
#endif
@@ -531,18 +544,21 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
//LOG_E(PHY,"AbsSubframe %d.%d Start LDPC segment %d/%d A %d ",frame%1024,nr_tti_rx,r,harq_process->C-1, A);
printf("harq process dr iteration %d\n", p_decParams->numMaxIter);
//printf("harq process dr iteration %d\n", p_decParams->numMaxIter);
memset(pv,0,2*harq_process->Z*sizeof(int16_t));
//memset(pl,0,2*p_decParams->Z*sizeof(int8_t));
memset((pv+K_bytes_F),127,harq_process->F*sizeof(int16_t));
for (i=((2*p_decParams->Z)>>3), j = 0; i < K_bytes_F; i++, j++)
{
pv[i]= _mm_loadu_si128((__m128i*)(&harq_process->d[r][8*j]));
}
for (i=Kr_bytes,j=K_bytes_F-((2*p_decParams->Z)>>3); i < ((kc*p_decParams->Z)>>3); i++, j++)
// Kbytes_F = Kr_bytes - F>>3
j+=(harq_process->F>>3);
// for (i=Kr_bytes,j=K_bytes_F-((2*p_decParams->Z)>>3); i < ((kc*p_decParams->Z)>>3); i++, j++)
for (i=Kr_bytes; i < ((kc*p_decParams->Z)>>3); i++,j++)
{
pv[i]= _mm_loadu_si128((__m128i*)(&harq_process->d[r][8*j]));
}
@@ -552,6 +568,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
pl[j] = _mm_packs_epi16(pv[i],pv[i+1]);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_LDPC, VCD_FUNCTION_IN);
no_iteration_ldpc = nrLDPC_decoder(p_decParams,
@@ -559,21 +576,21 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
llrProcBuf,
p_nrLDPC_procBuf[r],
p_procTime);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_LDPC, VCD_FUNCTION_OUT);
// Fixme: correct type is unsigned, but nrLDPC_decoder and all called behind use signed int
if (check_crc((uint8_t*)llrProcBuf,length_dec,harq_process->F,crc_type)) {
printf("\x1B[34m" "Segment %u CRC OK\n\033[0m",r);
LOG_D(PHY,"Segment %u CRC OK\n\033[0m",r);
//Temporary hack
no_iteration_ldpc = dlsch->max_ldpc_iterations;
ret = no_iteration_ldpc;
}
else {
printf("\x1B[33m" "Segment %d CRC NOK\n",r);
LOG_D(PHY,"CRC NOK\n\033[0m");
ret = 1 + dlsch->max_ldpc_iterations;
}
nb_total_decod++;
if (no_iteration_ldpc > dlsch->max_ldpc_iterations){
nb_error_decod++;
@@ -615,7 +632,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if ((err_flag == 0) && (ret>=(1+dlsch->max_ldpc_iterations))) {// a Code segment is in error so break;
LOG_I(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
err_flag = 1;
}
}
@@ -630,7 +647,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (err_flag == 1) {
//#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
//#endif
harq_process->harq_ack.ack = 0;
@@ -647,15 +664,15 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if(is_crnti)
{
LOG_I(PHY,"[UE %d] DLSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
}
return((1 + dlsch->max_ldpc_iterations));
} else {
//#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
//#endif
harq_process->status = SCH_IDLE;
@@ -664,12 +681,12 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
//LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
// phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs);
if(is_crnti)
{
LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
}
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
@@ -691,8 +708,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
for (r=0; r<harq_process->C; r++) {
memcpy(harq_process->b+offset,
harq_process->c[r],
Kr_bytes- - (harq_process->F>>3) -((harq_process->C>1)?3:0));
harq_process->c[r],
Kr_bytes- - (harq_process->F>>3) -((harq_process->C>1)?3:0));
offset += (Kr_bytes - (harq_process->F>>3) - ((harq_process->C>1)?3:0));
#ifdef DEBUG_DLSCH_DECODING
@@ -752,7 +769,6 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t A,E;
uint32_t G;
uint32_t ret,offset;
//short dummy_w[MAX_NUM_DLSCH_SEGMENTS][3*(8448+64)];
uint32_t r,r_offset=0,Kr=8424,Kr_bytes,err_flag=0,K_bytes_F;
uint8_t crc_type;
//UE_rxtx_proc_t *proc = &phy_vars_ue->proc;
@@ -765,7 +781,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
t_nrLDPC_dec_params* p_decParams = &decParams;
t_nrLDPC_time_stats procTime;
t_nrLDPC_time_stats* p_procTime =&procTime ;
int8_t llrProcBuf[OAI_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
int8_t llrProcBuf[NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
if (!harq_process) {
printf("dlsch_decoding.c: NULL harq_process pointer\n");
return(dlsch->max_ldpc_iterations);
@@ -782,10 +798,12 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t Tbslbrm = 950984;
uint16_t nb_rb = 30;
double Coderate = 0.0;
uint8_t dmrs_type = harq_process->dmrsConfigType;
//nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
//uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = 6; //(dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
uint8_t nb_re_dmrs = (dmrs_type==1)?6:4;
uint16_t length_dmrs = get_num_dmrs(harq_process->dlDmrsSymbPos);
uint32_t i,j;
// int nbDlProcessing =0;
@@ -841,14 +859,14 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
A = harq_process->TBS;
ret = dlsch->max_ldpc_iterations;
ret = dlsch->max_ldpc_iterations + 1;
dlsch->last_iteration_cnt = ret;
harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, harq_process->Qm,harq_process->Nl);
G = harq_process->G;
LOG_D(PHY,"DLSCH Decoding main, harq_pid %d TBS %d G %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
LOG_D(PHY,"DLSCH Decoding main, harq_pid %d TBS %d G %d, nb_re_dmrs %d, length_dmrs %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, nb_re_dmrs, length_dmrs, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
proc->decoder_main_available = 1;
proc->decoder_thread_available = 0;
@@ -910,9 +928,10 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
&harq_process->F,
p_decParams->BG);
p_decParams->Z = harq_process->Z;
}
p_decParams->Z = harq_process->Z;
//printf("coderate %f kc %d \n", Coderate, kc);
p_decParams->numMaxIter = dlsch->max_ldpc_iterations;
@@ -921,20 +940,15 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
err_flag = 0;
r_offset = 0;
unsigned char bw_scaling =1;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
switch (frame_parms->N_RB_DL) {
case 106:
bw_scaling =2;
break;
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
a_segments = a_segments/273;
}
default:
bw_scaling =1;
break;
}
if (harq_process->C > MAX_NUM_DLSCH_SEGMENTS/bw_scaling) {
LOG_E(PHY,"Illegal harq_process->C %d > %d\n",harq_process->C,MAX_NUM_DLSCH_SEGMENTS/bw_scaling);
if (harq_process->C > a_segments) {
LOG_E(PHY,"Illegal harq_process->C %d > %d\n",harq_process->C,a_segments);
return((1+dlsch->max_ldpc_iterations));
}
#ifdef DEBUG_DLSCH_DECODING
@@ -1050,7 +1064,9 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->C,
harq_process->rvidx,
(harq_process->round==0)?1:0,
E)==-1) {
E,
harq_process->F,
Kr-harq_process->F-2*(p_decParams->Z))==-1) {
#if UE_TIMING_TRACE
stop_meas(dlsch_rate_unmatching_stats);
#endif
@@ -1109,7 +1125,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if (err_flag == 0) {
/*
LOG_I(PHY, "LDPC algo Kr=%d cb_cnt=%d C=%d nbRB=%d crc_type %d TBSInput=%d TBSHarq=%d TBSplus24=%d mcs=%d Qm=%d RIV=%d round=%d maxIter %d\n",
LOG_D(PHY, "LDPC algo Kr=%d cb_cnt=%d C=%d nbRB=%d crc_type %d TBSInput=%d TBSHarq=%d TBSplus24=%d mcs=%d Qm=%d RIV=%d round=%d maxIter %d\n",
Kr,r,harq_process->C,harq_process->nb_rb,crc_type,A,harq_process->TBS,
harq_process->B,harq_process->mcs,harq_process->Qm,harq_process->rvidx,harq_process->round,dlsch->max_ldpc_iterations);
*/
@@ -1133,11 +1149,13 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
pv[i]= _mm_loadu_si128((__m128i*)(&harq_process->d[r][8*j]));
}
for (i=Kr_bytes,j=K_bytes_F-((2*p_decParams->Z)>>3); i < ((kc*p_decParams->Z)>>3); i++, j++)
j+=(harq_process->F>>3);
// for (i=Kr_bytes,j=K_bytes_F-((2*p_decParams->Z)>>3); i < ((kc*p_decParams->Z)>>3); i++, j++)
for (i=Kr_bytes; i < ((kc*p_decParams->Z)>>3); i++,j++)
{
pv[i]= _mm_loadu_si128((__m128i*)(&harq_process->d[r][8*j]));
}
for (i=0, j=0; j < ((kc*p_decParams->Z)>>4); i+=2, j++)
{
pl[j] = _mm_packs_epi16(pv[i],pv[i+1]);
@@ -1222,7 +1240,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if (err_flag == 1) {
#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
#endif
harq_process->harq_ack.ack = 0;
@@ -1246,7 +1264,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
return((1+dlsch->max_ldpc_iterations));
} else {
#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d\n",
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb);
#endif
@@ -1336,7 +1354,7 @@ void nr_dlsch_decoding_process(void *arg)
t_nrLDPC_dec_params* p_decParams = &decParams;
t_nrLDPC_time_stats procTime;
t_nrLDPC_time_stats* p_procTime =&procTime ;
int8_t llrProcBuf[OAI_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
int8_t llrProcBuf[NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
t_nrLDPC_procBuf* p_nrLDPC_procBuf;
int16_t z [68*384];
int8_t l [68*384];
@@ -1372,7 +1390,6 @@ void nr_dlsch_decoding_process(void *arg)
uint32_t A,E;
uint32_t G;
uint32_t ret,offset;
// short dummy_w[MAX_NUM_DLSCH_SEGMENTS][3*(8448+64)];
uint32_t r,r_offset=0,Kr,Kr_bytes,err_flag=0,K_bytes_F;
uint8_t crc_type;
uint8_t C,Cprime;
@@ -1425,7 +1442,7 @@ void nr_dlsch_decoding_process(void *arg)
harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, harq_process->Qm,harq_process->Nl);
G = harq_process->G;
LOG_I(PHY,"DLSCH Decoding process, harq_pid %d TBS %d G %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
LOG_D(PHY,"DLSCH Decoding process, harq_pid %d TBS %d G %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
if ((harq_process->R)<1024)
Coderate = (float) (harq_process->R) /(float) 1024;
@@ -1465,7 +1482,7 @@ void nr_dlsch_decoding_process(void *arg)
}
harq_process->round =0;
if (harq_process->round == 0) {
// if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
if (A > 3824)
harq_process->B = A+24;
@@ -1483,7 +1500,7 @@ void nr_dlsch_decoding_process(void *arg)
p_decParams->Z = harq_process->Z;
}
// }
//printf("round %d Z %d K %d BG %d\n", harq_process->round, p_decParams->Z, harq_process->K, p_decParams->BG);
@@ -1501,20 +1518,15 @@ void nr_dlsch_decoding_process(void *arg)
//r_offset = 0;
/*
unsigned char bw_scaling =1;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
switch (frame_parms->N_RB_DL) {
case 106:
bw_scaling =2;
break;
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
a_segments = a_segments/273;
}
default:
bw_scaling =1;
break;
}
if (harq_process->C > MAX_NUM_DLSCH_SEGMENTS/bw_scaling) {
LOG_E(PHY,"Illegal harq_process->C %d > %d\n",harq_process->C,MAX_NUM_DLSCH_SEGMENTS/bw_scaling);
if (harq_process->C > a_segments) {
LOG_E(PHY,"Illegal harq_process->C %d > %d\n",harq_process->C,a_segments);
return((1+dlsch->max_ldpc_iterations));
}*/
#ifdef DEBUG_DLSCH_DECODING
@@ -1595,7 +1607,9 @@ void nr_dlsch_decoding_process(void *arg)
harq_process->C,
harq_process->rvidx,
(harq_process->round==0)?1:0,
E)==-1) {
E,
harq_process->F,
Kr-harq_process->F-2*(p_decParams->Z))==-1) {
#if UE_TIMING_TRACE
stop_meas(dlsch_rate_unmatching_stats);
#endif
@@ -1644,7 +1658,7 @@ void nr_dlsch_decoding_process(void *arg)
if (err_flag == 0) {
/*
LOG_I(PHY, "turbo algo Kr=%d cb_cnt=%d C=%d nbRB=%d crc_type %d TBSInput=%d TBSHarq=%d TBSplus24=%d mcs=%d Qm=%d RIV=%d round=%d maxIter %d\n",
LOG_D(PHY, "turbo algo Kr=%d cb_cnt=%d C=%d nbRB=%d crc_type %d TBSInput=%d TBSHarq=%d TBSplus24=%d mcs=%d Qm=%d RIV=%d round=%d maxIter %d\n",
Kr,r,harq_process->C,harq_process->nb_rb,crc_type,A,harq_process->TBS,
harq_process->B,harq_process->mcs,harq_process->Qm,harq_process->rvidx,harq_process->round,dlsch->max_ldpc_iterations);
*/
@@ -1656,10 +1670,11 @@ void nr_dlsch_decoding_process(void *arg)
start_meas(dlsch_turbo_decoding_stats);
#endif
// LOG_D(PHY,"AbsSubframe %d.%d Start turbo segment %d/%d \n",frame%1024,subframe,r,harq_process->C-1);
/*for (int cnt =0; cnt < (kc-2)*p_decParams->Z; cnt++){
/*
for (int cnt =0; cnt < (kc-2)*p_decParams->Z; cnt++){
inv_d[cnt] = (1)*harq_process->d[r][cnt];
}*/
}
*/
memset(pv,0,2*p_decParams->Z*sizeof(int16_t));
//memset(pl,0,2*p_decParams->Z*sizeof(int8_t));
@@ -1670,9 +1685,11 @@ void nr_dlsch_decoding_process(void *arg)
pv[i]= _mm_loadu_si128((__m128i*)(&harq_process->d[r][8*j]));
}
for (i=Kr_bytes,j=K_bytes_F-((2*p_decParams->Z)>>3); i < ((kc*p_decParams->Z)>>3); i++, j++)
j+=(harq_process->F>>3);
// for (i=Kr_bytes,j=K_bytes_F-((2*p_decParams->Z)>>3); i < ((kc*p_decParams->Z)>>3); i++, j++)
for (i=Kr_bytes; i < ((kc*p_decParams->Z)>>3); i++,j++)
{
pv[i]= _mm_loadu_si128((__m128i*)(&harq_process->d[r][8*j]));
pv[i]= _mm_loadu_si128((__m128i*)(&harq_process->d[r][8*j]));
}
for (i=0, j=0; j < ((kc*p_decParams->Z)>>4); i+=2, j++)
@@ -1688,16 +1705,16 @@ void nr_dlsch_decoding_process(void *arg)
// Fixme: correct type is unsigned, but nrLDPC_decoder and all called behind use signed int
if (check_crc((uint8_t*)llrProcBuf,length_dec,harq_process->F,crc_type)) {
printf("Segment %u CRC OK\n",r);
LOG_D(PHY,"Segment %u CRC OK\n",r);
ret = 2;
}
else {
printf("Segment %d CRC NOK\n",r);
LOG_D(PHY,"Segment %u CRC NOK\n",r);
ret = 1+dlsch->max_ldpc_iterations;
}
if (no_iteration_ldpc > 10)
printf("Error number of iteration LPDC %d\n", no_iteration_ldpc);
LOG_D(PHY,"Error number of iteration LPDC %d\n", no_iteration_ldpc);
//else
//printf("OK number of iteration LPDC %d\n", no_iteration_ldpc);
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
+96 -114
View File
@@ -101,16 +101,16 @@ static void nr_dlsch_layer_demapping(int16_t **llr_cw,
int16_t **llr_layers);
int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
PDSCH_t type,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid)
PDSCH_t type,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid)
{
NR_UE_COMMON *common_vars = &ue->common_vars;
@@ -151,7 +151,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
//int16_t *pllr_symbol_cw1_deint;
uint32_t llr_offset_symbol;
//uint16_t bundle_L = 2;
uint8_t l0 =2, pilots=0;
uint8_t pilots=0;
uint16_t n_tx=1, n_rx=1;
int32_t median[16];
uint32_t len;
@@ -234,7 +234,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
start_rb = dlsch0_harq->start_rb;
nb_rb_pdsch = dlsch0_harq->nb_rb;
l0 = dlsch0_harq->start_symbol;
DevAssert(dlsch0_harq);
round = dlsch0_harq->round;
@@ -286,9 +285,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
printf("Demod dlsch0_harq->pmi_alloc %d\n", dlsch0_harq->pmi_alloc);
#endif
pilots = (symbol==l0) ? 1 : 0;
pilots = ((1<<symbol)&dlsch0_harq->dlDmrsSymbPos)>0 ? 1 : 0;
if (frame_parms->nb_antenna_ports_eNB>1 && beamforming_mode==0) {
if (frame_parms->nb_antenna_ports_gNB>1 && beamforming_mode==0) {
#ifdef DEBUG_DLSCH_MOD
LOG_I(PHY,"dlsch: using pmi %x (%p)\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc),dlsch[0]);
#endif
@@ -297,19 +296,19 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
#endif
nb_rb = nr_dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
#ifdef DEBUG_DLSCH_MOD
printf("dlsch: using pmi %lx, pmi_ext ",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
for (rb=0;rb<nb_rb;rb++)
@@ -349,21 +348,21 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
frame_parms,
dlsch0_harq->mimo_mode);
}
} else if (beamforming_mode==0) { //else if nb_antennas_ports_eNB==1 && beamforming_mode == 0
} else if (beamforming_mode==0) { //else if nb_antennas_ports_gNB==1 && beamforming_mode == 0
//printf("start nr dlsch extract nr_tti_rx %d thread id %d \n", nr_tti_rx, ue->current_thread_id[nr_tti_rx]);
nb_rb = nr_dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms);
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms);
} /*else if(beamforming_mode>7) {
LOG_W(PHY,"dlsch_demodulation: beamforming mode not supported yet.\n");
@@ -375,31 +374,31 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
return(-1);
}
len = (symbol==l0)? (nb_rb*6):(nb_rb*12);
len = (pilots==1)? (nb_rb*6):(nb_rb*12);
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
#endif
n_tx = frame_parms->nb_antenna_ports_eNB;
n_tx = frame_parms->nb_antenna_ports_gNB;
n_rx = frame_parms->nb_antennas_rx;
nr_dlsch_scale_channel(pdsch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
dlsch,
symbol,
pilots,
nb_rb);
frame_parms,
dlsch,
symbol,
pilots,
nb_rb);
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
@@ -417,17 +416,17 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
if (beamforming_mode==0){
if (dlsch0_harq->mimo_mode<NR_DUALSTREAM) {
nr_dlsch_channel_level(pdsch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
avg,
symbol,
len,
nb_rb);
frame_parms,
avg,
symbol,
len,
nb_rb);
avgs = 0;
for (aatx=0;aatx<frame_parms->nb_antenna_ports_eNB;aatx++)
for (aatx=0;aatx<frame_parms->nb_antenna_ports_gNB;aatx++)
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++)
avgs = cmax(avgs,avg[(aatx<<1)+aarx]);
pdsch_vars[eNB_id]->log2_maxh = (log2_approx(avgs)/2)+1;
pdsch_vars[eNB_id]->log2_maxh = (log2_approx(avgs)/2)+3;
}
else if (dlsch0_harq->mimo_mode == NR_DUALSTREAM)
{
@@ -450,14 +449,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
}
#ifdef UE_DEBUG_TRACE
LOG_I(PHY,"[DLSCH] AbsSubframe %d.%d log2_maxh = %d [log2_maxh0 %d log2_maxh1 %d] (%d,%d)\n",
frame%1024,nr_tti_rx, pdsch_vars[eNB_id]->log2_maxh,
pdsch_vars[eNB_id]->log2_maxh0,
pdsch_vars[eNB_id]->log2_maxh1,
avg[0],avgs);
//#ifdef UE_DEBUG_TRACE
LOG_D(PHY,"[DLSCH] AbsSubframe %d.%d log2_maxh = %d [log2_maxh0 %d log2_maxh1 %d] (%d,%d)\n",
frame%1024,nr_tti_rx, pdsch_vars[eNB_id]->log2_maxh,
pdsch_vars[eNB_id]->log2_maxh0,
pdsch_vars[eNB_id]->log2_maxh1,
avg[0],avgs);
//LOG_D(PHY,"[DLSCH] mimo_mode = %d\n", dlsch0_harq->mimo_mode);
#endif
//#endif
//wait until pdcch is decoded
//proc->channel_level = 1;
@@ -648,13 +647,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
#endif
//printf("LLR dlsch0_harq->Qm %d rx_type %d cw0 %d cw1 %d symbol %d \n",dlsch0_harq->Qm,rx_type,codeword_TB0,codeword_TB1,symbol);
// compute LLRs
// -> // compute @pointer where llrs should filled for this ofdm-symbol
pdsch_vars[eNB_id]->llr_offset[l0-1] = 0;
if (first_symbol_flag==1) pdsch_vars[eNB_id]->llr_offset[symbol-1] = 0;
llr_offset_symbol = pdsch_vars[eNB_id]->llr_offset[symbol-1];
//pllr_symbol_cw0_deint = (int8_t*)pdsch_vars[eNB_id]->llr[0];
//pllr_symbol_cw1_deint = (int8_t*)pdsch_vars[eNB_id]->llr[1];
@@ -1148,7 +1148,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128,QAM_amp128b;
QAM_amp128b = _mm_setzero_si128();
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
if (mod_order == 4) {
QAM_amp128 = _mm_set1_epi16(QAM16_n1); // 2/sqrt(10)
QAM_amp128b = _mm_setzero_si128();
@@ -1400,7 +1400,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
if ((symbol_mod == 0) || (symbol_mod == (4-frame_parms->Ncp))) {
if (frame_parms->nb_antenna_ports_eNB==1) { // 10 out of 12 so don't reduce size
if (frame_parms->nb_antenna_ports_gNB==1) { // 10 out of 12 so don't reduce size
nb_rb=1+(5*nb_rb/6);
}
else {
@@ -1408,7 +1408,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
}
}
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
if (mod_order == 4) {
QAM_amp128 = vmovq_n_s16(QAM16_n1); // 2/sqrt(10)
QAM_amp128b = vmovq_n_s16(0);
@@ -1789,11 +1789,11 @@ void nr_dlsch_channel_compensation_core(int **rxdataF_ext,
void nr_dlsch_scale_channel(int **dl_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t **dlsch_ue,
uint8_t symbol,
uint8_t pilots,
unsigned short nb_rb)
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t **dlsch_ue,
uint8_t symbol,
uint8_t pilots,
unsigned short nb_rb)
{
#if defined(__x86_64__)||defined(__i386__)
@@ -1809,14 +1809,14 @@ void nr_dlsch_scale_channel(int **dl_ch_estimates_ext,
// Determine scaling amplitude based the symbol
ch_amp = 1024*8; //((pilots) ? (dlsch_ue[0]->sqrt_rho_b) : (dlsch_ue[0]->sqrt_rho_a));
ch_amp = 1024*8; //((pilots) ? (dlsch_ue[0]->sqrt_rho_b) : (dlsch_ue[0]->sqrt_rho_a));
LOG_D(PHY,"Scaling PDSCH Chest in OFDM symbol %d by %d, pilots %d nb_rb %d NCP %d symbol %d\n",symbol,ch_amp,pilots,nb_rb,frame_parms->Ncp,symbol);
// printf("Scaling PDSCH Chest in OFDM symbol %d by %d\n",symbol_mod,ch_amp);
ch_amp128 = _mm_set1_epi16(ch_amp); // Q3.13
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*nb_rb*12];
@@ -1849,11 +1849,11 @@ ch_amp = 1024*8; //((pilots) ? (dlsch_ue[0]->sqrt_rho_b) : (dlsch_ue[0]->sqrt_rh
//compute average channel_level on each (TX,RX) antenna pair
void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
int32_t *avg,
uint8_t symbol,
uint32_t len,
unsigned short nb_rb)
NR_DL_FRAME_PARMS *frame_parms,
int32_t *avg,
uint8_t symbol,
uint32_t len,
unsigned short nb_rb)
{
#if defined(__x86_64__)||defined(__i386__)
@@ -1864,10 +1864,11 @@ void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
//nb_rb*nre = y * 2^x
int16_t x = factor2(len);
//x = (x>4) ? 4 : x;
int16_t y = (len)>>x;
//printf("nb_rb*nre = %d = %d * 2^(%d)\n",nb_rb*nre,y,x);
//printf("len = %d = %d * 2^(%d)\n",len,y,x);
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++)
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
avg128D = _mm_setzero_si128();
@@ -1876,29 +1877,10 @@ void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*nb_rb*12];
for (rb=0;rb<nb_rb;rb++) {
// printf("rb %d : ",rb);
// print_shorts("ch",&dl_ch128[0]);
avg128D = _mm_add_epi32(avg128D,_mm_srai_epi16(_mm_madd_epi16(dl_ch128[0],dl_ch128[0]),x));
avg128D = _mm_add_epi32(avg128D,_mm_srai_epi16(_mm_madd_epi16(dl_ch128[1],dl_ch128[1]),x));
//avg128D = _mm_add_epi32(avg128D,_mm_madd_epi16(dl_ch128[0],_mm_srai_epi16(_mm_mulhi_epi16(dl_ch128[0], coeff128),15)));
//avg128D = _mm_add_epi32(avg128D,_mm_madd_epi16(dl_ch128[1],_mm_srai_epi16(_mm_mulhi_epi16(dl_ch128[1], coeff128),15)));
/*if (((symbol_mod == 0) || (symbol_mod == (frame_parms->Ncp-1)))&&(frame_parms->nb_antenna_ports_eNB!=1)) {
dl_ch128+=2;
}
else {*/
avg128D = _mm_add_epi32(avg128D,_mm_srai_epi16(_mm_madd_epi16(dl_ch128[2],dl_ch128[2]),x));
//avg128D = _mm_add_epi32(avg128D,_mm_madd_epi16(dl_ch128[2],_mm_srai_epi16(_mm_mulhi_epi16(dl_ch128[2], coeff128),15)));
dl_ch128+=3;
// }
/*
if (rb==0) {
print_shorts("dl_ch128",&dl_ch128[0]);
print_shorts("dl_ch128",&dl_ch128[1]);
print_shorts("dl_ch128",&dl_ch128[2]);
}
*/
avg128D = _mm_add_epi32(avg128D,_mm_srai_epi16(_mm_madd_epi16(dl_ch128[2],dl_ch128[2]),x));
dl_ch128+=3;
}
avg[(aatx<<1)+aarx] =(((int32_t*)&avg128D)[0] +
@@ -1920,7 +1902,7 @@ void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++)
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
avg128D = vdupq_n_s32(0);
@@ -1936,7 +1918,7 @@ void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
avg128D = vqaddq_s32(avg128D,vmull_s16(dl_ch128[2],dl_ch128[2]));
avg128D = vqaddq_s32(avg128D,vmull_s16(dl_ch128[3],dl_ch128[3]));
if (((symbol_mod == 0) || (symbol_mod == (frame_parms->Ncp-1)))&&(frame_parms->nb_antenna_ports_eNB!=1)) {
if (((symbol_mod == 0) || (symbol_mod == (frame_parms->Ncp-1)))&&(frame_parms->nb_antenna_ports_gNB!=1)) {
dl_ch128+=4;
} else {
avg128D = vqaddq_s32(avg128D,vmull_s16(dl_ch128[4],dl_ch128[4]));
@@ -2030,7 +2012,7 @@ void nr_dlsch_channel_level_median(int **dl_ch_estimates_ext,
int32x4_t norm128D;
int16x4_t *dl_ch128;
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++){
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++){
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
max = 0;
min = 0;
@@ -2602,7 +2584,7 @@ void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_tti_rx,unsigned int *
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[1],12*N_RB_DL*nsymb,1,1);
}
if (ue->frame_parms.nb_antenna_ports_eNB == 2) {
if (ue->frame_parms.nb_antenna_ports_gNB == 2) {
sprintf(fname,"dlsch%d_ch_r%d_ext10.m",eNB_id,round);
sprintf(vname,"dl%d_ch_r%d_ext10",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[2],12*N_RB_DL*nsymb,1,1);
@@ -2636,7 +2618,7 @@ void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_tti_rx,unsigned int *
sprintf(fname,"dlsch%d_rxF_r%d_comp0.m",eNB_id,round);
sprintf(vname,"dl%d_rxF_r%d_comp0",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_comp0[0],12*N_RB_DL*nsymb,1,1);
if (ue->frame_parms.nb_antenna_ports_eNB == 2) {
if (ue->frame_parms.nb_antenna_ports_gNB == 2) {
sprintf(fname,"dlsch%d_rxF_r%d_comp1.m",eNB_id,round);
sprintf(vname,"dl%d_rxF_r%d_comp1",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_comp1[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
+7 -7
View File
@@ -980,7 +980,7 @@ void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account
if (frame_parms->nb_antenna_ports_eNB!=1)
if (frame_parms->nb_antenna_ports_gNB!=1)
len = nb_rb*8 - (2*pbch_pss_sss_adjust/3);
else
len = nb_rb*10 - (5*pbch_pss_sss_adjust/6);
@@ -1379,7 +1379,7 @@ int nr_dlsch_qpsk_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
// if symbol has pilots
if (frame_parms->nb_antenna_ports_eNB!=1)
if (frame_parms->nb_antenna_ports_gNB!=1)
// in 2 antenna ports we have 8 REs per symbol per RB
len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
else
@@ -1661,7 +1661,7 @@ int nr_dlsch_qpsk_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
// if symbol has pilots
if (frame_parms->nb_antenna_ports_eNB!=1)
if (frame_parms->nb_antenna_ports_gNB!=1)
// in 2 antenna ports we have 8 REs per symbol per RB
len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
else
@@ -2427,7 +2427,7 @@ int nr_dlsch_16qam_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
// if symbol has pilots
if (frame_parms->nb_antenna_ports_eNB!=1)
if (frame_parms->nb_antenna_ports_gNB!=1)
// in 2 antenna ports we have 8 REs per symbol per RB
len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
else
@@ -3602,7 +3602,7 @@ int nr_dlsch_16qam_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
// if symbol has pilots
if (frame_parms->nb_antenna_ports_eNB!=1)
if (frame_parms->nb_antenna_ports_gNB!=1)
// in 2 antenna ports we have 8 REs per symbol per RB
len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
else
@@ -5164,7 +5164,7 @@ int nr_dlsch_64qam_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
// if symbol has pilots
if (frame_parms->nb_antenna_ports_eNB!=1)
if (frame_parms->nb_antenna_ports_gNB!=1)
// in 2 antenna ports we have 8 REs per symbol per RB
len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
else
@@ -6707,7 +6707,7 @@ int nr_dlsch_64qam_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
// if symbol has pilots
if (frame_parms->nb_antenna_ports_eNB!=1)
if (frame_parms->nb_antenna_ports_gNB!=1)
// in 2 antenna ports we have 8 REs per symbol per RB
len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
else
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
+12 -15
View File
@@ -176,7 +176,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
if (ret==0) {
frame_parms->nb_antenna_ports_eNB = 1; //pbch_tx_ant;
frame_parms->nb_antenna_ports_gNB = 1; //pbch_tx_ant;
// set initial transmission mode to 1 or 2 depending on number of detected TX antennas
//frame_parms->mode1_flag = (pbch_tx_ant==1);
@@ -213,18 +213,9 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
int ret=-1;
int rx_power=0; //aarx,
//nfapi_nr_config_request_t* config;
int n_ssb_crb=(fp->N_RB_DL-20);
// First try TDD normal prefix, mu 1
fp->Ncp=NORMAL;
fp->frame_type=TDD;
// FK: added N_RB_DL paramter here as this function shares code with the gNB where it is needed. We should rewrite this function for the UE.
nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,fp->N_RB_DL,n_ssb_crb,0);
LOG_D(PHY,"nr_initial sync ue RB_DL %d\n", fp->N_RB_DL);
/* Initial synchronisation
*
* 1 radio frame = 10 ms
@@ -264,7 +255,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
double s_time = 1/(1.0e3*fp->samples_per_subframe); // sampling time
double off_angle = -2*M_PI*s_time*(ue->common_vars.freq_offset); // offset rotation angle compensation per sample
int start = ue->ssb_offset; // start for offset correction is at ssb_offset (pss time position)
int start = is*fp->samples_per_frame+ue->ssb_offset; // start for offset correction is at ssb_offset (pss time position)
int end = start + 4*(fp->ofdm_symbol_size + fp->nb_prefix_samples); // loop over samples in 4 symbols (ssb size), including prefix
for(int n=start; n<end; n++){
@@ -290,10 +281,10 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
/* rxdataF stores SS/PBCH from beginning of buffers in the same symbol order as in time domain */
for(int i=0; i<4;i++)
nr_slot_fep(ue,
nr_slot_fep_init_sync(ue,
i,
0,
ue->ssb_offset,
is*fp->samples_per_frame+ue->ssb_offset,
0);
#ifdef DEBUG_INITIAL_SYNCH
@@ -312,7 +303,13 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
// sync at symbol ue->symbol_offset
// computing the offset wrt the beginning of the frame
sync_pos_frame = (fp->ofdm_symbol_size + fp->nb_prefix_samples0)+((ue->symbol_offset)-1)*(fp->ofdm_symbol_size + fp->nb_prefix_samples);
ue->rx_offset = ue->ssb_offset - sync_pos_frame;
if (ue->ssb_offset < sync_pos_frame)
ue->rx_offset = fp->samples_per_frame - sync_pos_frame + ue->ssb_offset;
else
ue->rx_offset = ue->ssb_offset - sync_pos_frame;
ue->init_sync_frame = is;
}
nr_gold_pdcch(ue,0, 2);
@@ -406,7 +403,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
fp->N_RB_DL,
fp->phich_config_common.phich_duration,
phich_string[fp->phich_config_common.phich_resource],
fp->nb_antenna_ports_eNB);*/
fp->nb_antenna_ports_gNB);*/
#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
LOG_I(PHY, "[UE %d] Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+13 -7
View File
@@ -430,7 +430,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
//uint32_t pbch_a_prime;
int16_t *pbch_e_rx;
uint8_t *decoded_output = nr_ue_pbch_vars->decoded_output;
uint8_t nushift,n_hf,ssb_index;
uint8_t nushift;
uint16_t M;
uint8_t Lmax=frame_parms->Lmax;
//uint16_t crc;
@@ -538,7 +538,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint32_t unscrambling_mask = (Lmax==64)?0x100006D:0x1000041;
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_E,0,0);
//polar decoding de-rate matching
const t_nrPolar_params *currentPtr = nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL);
const t_nrPolar_params *currentPtr = nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL,1,&ue->polarList);
decoderState = polar_decoder_int16(pbch_e_rx,(uint64_t *)&nr_ue_pbch_vars->pbch_a_prime,0,currentPtr);
if(decoderState) return(decoderState);
@@ -578,15 +578,21 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
for (int i=0; i<3; i++)
decoded_output[i] = (uint8_t)((payload>>((3-i)<<3))&0xff);
n_hf = ((nr_ue_pbch_vars->xtra_byte>>4)&0x01); // computing the half frame index from the extra byte
frame_parms->half_frame_bit = ((nr_ue_pbch_vars->xtra_byte>>4)&0x01); // computing the half frame index from the extra byte
ssb_index = i_ssb; // ssb index corresponds to i_ssb for Lmax = 4,8
frame_parms->ssb_index = i_ssb; // ssb index corresponds to i_ssb for Lmax = 4,8
if (Lmax == 64) { // for Lmax = 64 ssb index 4th,5th and 6th bits are in extra byte
for (int i=0; i<3; i++)
ssb_index += (((nr_ue_pbch_vars->xtra_byte>>(7-i))&0x01)<<(3+i));
frame_parms->ssb_index += (((nr_ue_pbch_vars->xtra_byte>>(7-i))&0x01)<<(3+i));
}
ue->symbol_offset = nr_get_ssb_start_symbol(frame_parms, ssb_index, n_hf);
ue->symbol_offset = nr_get_ssb_start_symbol(frame_parms);
uint8_t frame_number_4lsb = 0;
for (int i=0; i<4; i++)
frame_number_4lsb |= ((nr_ue_pbch_vars->xtra_byte>>i)&1)<<(3-i);
proc->decoded_frame_rx = frame_number_4lsb;
#ifdef DEBUG_PBCH
printf("xtra_byte %x payload %x\n", nr_ue_pbch_vars->xtra_byte, payload);
@@ -602,7 +608,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
dl_indication.proc=proc; // needed to signal back the frame number -> FIXME
dl_indication.proc=proc;
dl_indication.module_id=0;
dl_indication.cc_id=proc->CC_id;
openair1/PHY/NR_UE_TRANSPORT/nr_prach.c
+484 -859
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/nr_prach.h
-891
View File
@@ -1,891 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/LTE_TRANSPORT/prach_common.c
* \brief Common routines for UE/eNB PRACH physical channel V8.6 2009-03
* \author Agustin Mico Pereperez
* \date 2018
* \version 0.1
* \company
* \email:
* \note
* \warning
*/
int16_t nr_ru[2*839]; // quantized roots of unity
uint32_t nr_ZC_inv[839]; // multiplicative inverse for roots u
uint16_t nr_du[838];
/*************************************
* The following tables defined for NR
**************************************/
// Table 6.3.3.1-5 (38.211) NCS for preamble formats with delta_f_RA = 1.25 KHz
uint16_t NCS_unrestricted_delta_f_RA_125[16] = {0,13,15,18,22,26,32,38,46,59,76,93,119,167,279,419};
uint16_t NCS_restricted_TypeA_delta_f_RA_125[15] = {15,18,22,26,32,38,46,55,68,82,100,128,158,202,237}; // high-speed case set Type A
uint16_t NCS_restricted_TypeB_delta_f_RA_125[13] = {15,18,22,26,32,38,46,55,68,82,100,118,137}; // high-speed case set Type B
// Table 6.3.3.1-6 (38.211) NCS for preamble formats with delta_f_RA = 5 KHz
uint16_t NCS_unrestricted_delta_f_RA_5[16] = {0,13,26,33,38,41,49,55,64,76,93,119,139,209,279,419};
uint16_t NCS_restricted_TypeA_delta_f_RA_5[16] = {36,57,72,81,89,94,103,112,121,132,137,152,173,195,216,237}; // high-speed case set Type A
uint16_t NCS_restricted_TypeB_delta_f_RA_5[14] = {36,57,60,63,65,68,71,77,81,85,97,109,122,137}; // high-speed case set Type B
// Table 6.3.3.1-7 (38.211) NCS for preamble formats with delta_f_RA = 15 * 2mu KHz where mu = {0,1,2,3}
uint16_t NCS_unrestricted_delta_f_RA_15[16] = {0,2,4,6,8,10,12,13,15,17,19,23,27,34,46,69};
//Table 6.3.3.1-3: Mapping from logical index i to sequence number u for preamble formats with L_RA = 839
uint16_t prach_root_sequence_map_0_3[838] = {
129, 710, 140, 699, 120, 719, 210, 629, 168, 671, 84 , 755, 105, 734, 93 , 746, 70 , 769, 60 , 779,
2 , 837, 1 , 838, 56 , 783, 112, 727, 148, 691, 80 , 759, 42 , 797, 40 , 799, 35 , 804, 73 , 766,
146, 693, 31 , 808, 28 , 811, 30 , 809, 27 , 812, 29 , 810, 24 , 815, 48 , 791, 68 , 771, 74 , 765,
178, 661, 136, 703, 86 , 753, 78 , 761, 43 , 796, 39 , 800, 20 , 819, 21 , 818, 95 , 744, 202, 637,
190, 649, 181, 658, 137, 702, 125, 714, 151, 688, 217, 622, 128, 711, 142, 697, 122, 717, 203, 636,
118, 721, 110, 729, 89 , 750, 103, 736, 61 , 778, 55 , 784, 15 , 824, 14 , 825, 12 , 827, 23 , 816,
34 , 805, 37 , 802, 46 , 793, 207, 632, 179, 660, 145, 694, 130, 709, 223, 616, 228, 611, 227, 612,
132, 707, 133, 706, 143, 696, 135, 704, 161, 678, 201, 638, 173, 666, 106, 733, 83 , 756, 91 , 748,
66 , 773, 53 , 786, 10 , 829, 9 , 830, 7 , 832, 8 , 831, 16 , 823, 47 , 792, 64 , 775, 57 , 782,
104, 735, 101, 738, 108, 731, 208, 631, 184, 655, 197, 642, 191, 648, 121, 718, 141, 698, 149, 690,
216, 623, 218, 621, 152, 687, 144, 695, 134, 705, 138, 701, 199, 640, 162, 677, 176, 663, 119, 720,
158, 681, 164, 675, 174, 665, 171, 668, 170, 669, 87 , 752, 169, 670, 88 , 751, 107, 732, 81 , 758,
82 , 757, 100, 739, 98 , 741, 71 , 768, 59 , 780, 65 , 774, 50 , 789, 49 , 790, 26 , 813, 17 , 822,
13 , 826, 6 , 833, 5 , 834, 33 , 806, 51 , 788, 75 , 764, 99 , 740, 96 , 743, 97 , 742, 166, 673,
172, 667, 175, 664, 187, 652, 163, 676, 185, 654, 200, 639, 114, 725, 189, 650, 115, 724, 194, 645,
195, 644, 192, 647, 182, 657, 157, 682, 156, 683, 211, 628, 154, 685, 123, 716, 139, 700, 212, 627,
153, 686, 213, 626, 215, 624, 150, 689, 225, 614, 224, 615, 221, 618, 220, 619, 127, 712, 147, 692,
124, 715, 193, 646, 205, 634, 206, 633, 116, 723, 160, 679, 186, 653, 167, 672, 79 , 760, 85 , 754,
77 , 762, 92 , 747, 58 , 781, 62 , 777, 69 , 770, 54 , 785, 36 , 803, 32 , 807, 25 , 814, 18 , 821,
11 , 828, 4 , 835, 3 , 836, 19 , 820, 22 , 817, 41 , 798, 38 , 801, 44 , 795, 52 , 787, 45 , 794,
63 , 776, 67 , 772, 72 , 767, 76 , 763, 94 , 745, 102, 737, 90 , 749, 109, 730, 165, 674, 111, 728,
209, 630, 204, 635, 117, 722, 188, 651, 159, 680, 198, 641, 113, 726, 183, 656, 180, 659, 177, 662,
196, 643, 155, 684, 214, 625, 126, 713, 131, 708, 219, 620, 222, 617, 226, 613, 230, 609, 232, 607,
262, 577, 252, 587, 418, 421, 416, 423, 413, 426, 411, 428, 376, 463, 395, 444, 283, 556, 285, 554,
379, 460, 390, 449, 363, 476, 384, 455, 388, 451, 386, 453, 361, 478, 387, 452, 360, 479, 310, 529,
354, 485, 328, 511, 315, 524, 337, 502, 349, 490, 335, 504, 324, 515, 323, 516, 320, 519, 334, 505,
359, 480, 295, 544, 385, 454, 292, 547, 291, 548, 381, 458, 399, 440, 380, 459, 397, 442, 369, 470,
377, 462, 410, 429, 407, 432, 281, 558, 414, 425, 247, 592, 277, 562, 271, 568, 272, 567, 264, 575,
259, 580, 237, 602, 239, 600, 244, 595, 243, 596, 275, 564, 278, 561, 250, 589, 246, 593, 417, 422,
248, 591, 394, 445, 393, 446, 370, 469, 365, 474, 300, 539, 299, 540, 364, 475, 362, 477, 298, 541,
312, 527, 313, 526, 314, 525, 353, 486, 352, 487, 343, 496, 327, 512, 350, 489, 326, 513, 319, 520,
332, 507, 333, 506, 348, 491, 347, 492, 322, 517, 330, 509, 338, 501, 341, 498, 340, 499, 342, 497,
301, 538, 366, 473, 401, 438, 371, 468, 408, 431, 375, 464, 249, 590, 269, 570, 238, 601, 234, 605,
257, 582, 273, 566, 255, 584, 254, 585, 245, 594, 251, 588, 412, 427, 372, 467, 282, 557, 403, 436,
396, 443, 392, 447, 391, 448, 382, 457, 389, 450, 294, 545, 297, 542, 311, 528, 344, 495, 345, 494,
318, 521, 331, 508, 325, 514, 321, 518, 346, 493, 339, 500, 351, 488, 306, 533, 289, 550, 400, 439,
378, 461, 374, 465, 415, 424, 270, 569, 241, 598, 231, 608, 260, 579, 268, 571, 276, 563, 409, 430,
398, 441, 290, 549, 304, 535, 308, 531, 358, 481, 316, 523, 293, 546, 288, 551, 284, 555, 368, 471,
253, 586, 256, 583, 263, 576, 242, 597, 274, 565, 402, 437, 383, 456, 357, 482, 329, 510, 317, 522,
307, 532, 286, 553, 287, 552, 266, 573, 261, 578, 236, 603, 303, 536, 356, 483, 355, 484, 405, 434,
404, 435, 406, 433, 235, 604, 267, 572, 302, 537, 309, 530, 265, 574, 233, 606, 367, 472, 296, 543,
336, 503, 305, 534, 373, 466, 280, 559, 279, 560, 419, 420, 240, 599, 258, 581, 229, 610
};
// Table 6.3.3.1-4: Mapping from logical index i to sequence number u for preamble formats with L_RA = 139
uint16_t prach_root_sequence_map_abc[138] = {
1 , 138, 2 , 137, 3 , 136, 4 , 135, 5 , 134, 6 , 133, 7 , 132, 8 , 131, 9 , 130, 10, 129,
11, 128, 12, 127, 13, 126, 14, 125, 15, 124, 16, 123, 17, 122, 18, 121, 19, 120, 20, 119,
21, 118, 22, 117, 23, 116, 24, 115, 25, 114, 26, 113, 27, 112, 28, 111, 29, 110, 30, 109,
31, 108, 32, 107, 33, 106, 34, 105, 35, 104, 36, 103, 37, 102, 38, 101, 39, 100, 40, 99 ,
41, 98 , 42, 97 , 43, 96 , 44, 95 , 45, 94 , 46, 93 , 47, 92 , 48, 91 , 49, 90 , 50, 89 ,
51, 88 , 52, 87 , 53, 86 , 54, 85 , 55, 84 , 56, 83 , 57, 82 , 58, 81 , 59, 80 , 60, 79 ,
61, 78 , 62, 77 , 63, 76 , 64, 75 , 65, 74 , 66, 73 , 67, 72 , 68, 71 , 69, 70
};
// Table 6.3.3.2-2: Random access configurations for FR1 and paired spectrum/supplementary uplink
// the column 5, (SFN_nbr is a bitmap where we set bit to '1' in the position of the subframe where the RACH can be sent.
// E.g. in row 4, and column 5 we have set value 512 ('1000000000') which means RACH can be sent at subframe 9.
// E.g. in row 20 and column 5 we have set value 66 ('0001000010') which means RACH can be sent at subframe 1 or 6
int64_t table_6_3_3_2_2_prachConfig_Index [256][9] = {
//format, format, x, y, SFN_nbr, star_symb, slots_sfn, occ_slot, duration
{0, -1, 16, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 16, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 16, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 16, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{0, -1, 8, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 8, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 8, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 8, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{0, -1, 4, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 4, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 4, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 4, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{0, -1, 2, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 2, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 2, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 2, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{0, -1, 1, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 1, 0, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 1, 0, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 1, 0, 66, 0, -1, -1, 0}, // (subframe number) 1,6
{0, -1, 1, 0, 132, 0, -1, -1, 0}, // (subframe number) 2,7
{0, -1, 1, 0, 264, 0, -1, -1, 0}, // (subframe number) 3,8
{0, -1, 1, 0, 146, 0, -1, -1, 0}, // (subframe number) 1,4,7
{0, -1, 1, 0, 292, 0, -1, -1, 0}, // (subframe number) 2,5,8
{0, -1, 1, 0, 584, 0, -1, -1, 0}, // (subframe number) 3, 6, 9
{0, -1, 1, 0, 341, 0, -1, -1, 0}, // (subframe number) 0,2,4,6,8
{0, -1, 1, 0, 682, 0, -1, -1, 0}, // (subframe number) 1,3,5,7,9
{0, -1, 1, 0, 1023, 0, -1, -1, 0}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{1, -1, 16, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 16, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 16, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 16, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{1, -1, 8, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 8, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 8, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 8, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{1, -1, 4, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 4, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 4, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 4, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{1, -1, 2, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 2, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 2, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 2, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{1, -1, 1, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 1, 0, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 1, 0, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 1, 0, 66, 0, -1, -1, 0}, // (subframe number) 1,6
{1, -1, 1, 0, 132, 0, -1, -1, 0}, // (subframe number) 2,7
{1, -1, 1, 0, 264, 0, -1, -1, 0}, // (subframe number) 3,8
{1, -1, 1, 0, 146, 0, -1, -1, 0}, // (subframe number) 1,4,7
{1, -1, 1, 0, 292, 0, -1, -1, 0}, // (subframe number) 2,5,8
{1, -1, 1, 0, 584, 0, -1, -1, 0}, // (subframe number) 3,6,9
{2, -1, 16, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 8, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 4, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 2, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 2, 0, 32, 0, -1, -1, 0}, // (subframe number) 5
{2, -1, 1, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 1, 0, 32, 0, -1, -1, 0}, // (subframe number) 5
{3, -1, 16, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 16, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 16, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 16, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{3, -1, 8, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 8, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 8, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 4, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 4, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 4, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 4, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{3, -1, 2, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 2, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 2, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 2, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{3, -1, 1, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 1, 0, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 1, 0, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 1, 0, 66, 0, -1, -1, 0}, // (subframe number) 1,6
{3, -1, 1, 0, 132, 0, -1, -1, 0}, // (subframe number) 2,7
{3, -1, 1, 0, 264, 0, -1, -1, 0}, // (subframe number) 3,8
{3, -1, 1, 0, 146, 0, -1, -1, 0}, // (subframe number) 1,4,7
{3, -1, 1, 0, 292, 0, -1, -1, 0}, // (subframe number) 2,5,8
{3, -1, 1, 0, 584, 0, -1, -1, 0}, // (subframe number) 3, 6, 9
{3, -1, 1, 0, 341, 0, -1, -1, 0}, // (subframe number) 0,2,4,6,8
{3, -1, 1, 0, 682, 0, -1, -1, 0}, // (subframe number) 1,3,5,7,9
{3, -1, 1, 0, 1023, 0, -1, -1, 0}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xa1, -1, 16, 0, 528, 0, 1, 6, 2}, // (subframe number) 4,9
{0xa1, -1, 16, 1, 16, 0, 2, 6, 2}, // (subframe number) 4
{0xa1, -1, 8, 0, 528, 0, 1, 6, 2}, // (subframe number) 4,9
{0xa1, -1, 8, 1, 16, 0, 2, 6, 2}, // (subframe number) 4
{0xa1, -1, 4, 0, 528, 0, 1, 6, 2}, // (subframe number) 4,9
{0xa1, -1, 4, 1, 528, 0, 1, 6, 2}, // (subframe number) 4,9
{0xa1, -1, 4, 0, 16, 0, 2, 6, 2}, // (subframe number) 4
{0xa1, -1, 2, 0, 528, 0, 1, 6, 2}, // (subframe number) 4,9
{0xa1, -1, 2, 0, 2, 0, 2, 6, 2}, // (subframe number) 1
{0xa1, -1, 2, 0, 16, 0, 2, 6, 2}, // (subframe number) 4
{0xa1, -1, 2, 0, 128, 0, 2, 6, 2}, // (subframe number) 7
{0xa1, -1, 1, 0, 16, 0, 1, 6, 2}, // (subframe number) 4
{0xa1, -1, 1, 0, 66, 0, 1, 6, 2}, // (subframe number) 1,6
{0xa1, -1, 1, 0, 528, 0, 1, 6, 2}, // (subframe number) 4,9
{0xa1, -1, 1, 0, 2, 0, 2, 6, 2}, // (subframe number) 1
{0xa1, -1, 1, 0, 128, 0, 2, 6, 2}, // (subframe number) 7
{0xa1, -1, 1, 0, 132, 0, 2, 6, 2}, // (subframe number) 2,7
{0xa1, -1, 1, 0, 146, 0, 2, 6, 2}, // (subframe number) 1,4,7
{0xa1, -1, 1, 0, 341, 0, 2, 6, 2}, // (subframe number) 0,2,4,6,8
{0xa1, -1, 1, 0, 1023, 0, 2, 6, 2}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xa1, -1, 1, 0, 682, 0, 2, 6, 2}, // (subframe number) 1,3,5,7,9
{0xa1, 0xb1, 2, 0, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xa1, 0xb1, 2, 0, 16, 0, 2, 7, 2}, // (subframe number) 4
{0xa1, 0xb1, 1, 0, 16, 0, 1, 7, 2}, // (subframe number) 4
{0xa1, 0xb1, 1, 0, 66, 0, 1, 7, 2}, // (subframe number) 1,6
{0xa1, 0xb1, 1, 0, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xa1, 0xb1, 1, 0, 2, 0, 2, 7, 2}, // (subframe number) 1
{0xa1, 0xb1, 1, 0, 128, 0, 2, 7, 2}, // (subframe number) 7
{0xa1, 0xb1, 1, 0, 146, 0, 2, 7, 2}, // (subframe number) 1,4,7
{0xa1, 0xb1, 1, 0, 341, 0, 2, 7, 2}, // (subframe number) 0,2,4,6,8
{0xa2, -1, 16, 1, 580, 0, 1, 3, 4}, // (subframe number) 2,6,9
{0xa2, -1, 16, 1, 16, 0, 2, 3, 4}, // (subframe number) 4
{0xa2, -1, 8, 1, 580, 0, 1, 3, 4}, // (subframe number) 2,6,9
{0xa2, -1, 8, 1, 16, 0, 2, 3, 4}, // (subframe number) 4
{0xa2, -1, 4, 0, 580, 0, 1, 3, 4}, // (subframe number) 2,6,9
{0xa2, -1, 4, 0, 16, 0, 2, 3, 4}, // (subframe number) 4
{0xa2, -1, 2, 1, 580, 0, 1, 3, 4}, // (subframe number) 2,6,9
{0xa2, -1, 2, 0, 2, 0, 2, 3, 4}, // (subframe number) 1
{0xa2, -1, 2, 0, 16, 0, 2, 3, 4}, // (subframe number) 4
{0xa2, -1, 2, 0, 128, 0, 2, 3, 4}, // (subframe number) 7
{0xa2, -1, 1, 0, 16, 0, 1, 3, 4}, // (subframe number) 4
{0xa2, -1, 1, 0, 66, 0, 1, 3, 4}, // (subframe number) 1,6
{0xa2, -1, 1, 0, 528, 0, 1, 3, 4}, // (subframe number) 4,9
{0xa2, -1, 1, 0, 2, 0, 2, 3, 4}, // (subframe number) 1
{0xa2, -1, 1, 0, 128, 0, 2, 3, 4}, // (subframe number) 7
{0xa2, -1, 1, 0, 132, 0, 2, 3, 4}, // (subframe number) 2,7
{0xa2, -1, 1, 0, 146, 0, 2, 3, 4}, // (subframe number) 1,4,7
{0xa2, -1, 1, 0, 341, 0, 2, 3, 4}, // (subframe number) 0,2,4,6,8
{0xa2, -1, 1, 0, 1023, 0, 2, 3, 4}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xa2, -1, 1, 0, 682, 0, 2, 3, 4}, // (subframe number) 1,3,5,7,9
{0xa2, 0xb2, 2, 1, 580, 0, 1, 3, 4}, // (subframe number) 2,6,9
{0xa2, 0xb2, 2, 0, 16, 0, 2, 3, 4}, // (subframe number) 4
{0xa2, 0xb2, 1, 0, 16, 0, 1, 3, 4}, // (subframe number) 4
{0xa2, 0xb2, 1, 0, 66, 0, 1, 3, 4}, // (subframe number) 1,6
{0xa2, 0xb2, 1, 0, 528, 0, 1, 3, 4}, // (subframe number) 4,9
{0xa2, 0xb2, 1, 0, 2, 0, 2, 3, 4}, // (subframe number) 1
{0xa2, 0xb2, 1, 0, 128, 0, 2, 3, 4}, // (subframe number) 7
{0xa2, 0xb2, 1, 0, 146, 0, 2, 3, 4}, // (subframe number) 1,4,7
{0xa2, 0xb2, 1, 0, 341, 0, 2, 3, 4}, // (subframe number) 0,2,4,6,8
{0xa2, 0xb2, 1, 0, 1023, 0, 2, 3, 4}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xa3, -1, 16, 1, 528, 0, 1, 2, 6}, // (subframe number) 4,9
{0xa3, -1, 16, 1, 16, 0, 2, 2, 6}, // (subframe number) 4
{0xa3, -1, 8, 1, 528, 0, 1, 2, 6}, // (subframe number) 4,9
{0xa3, -1, 8, 1, 16, 0, 2, 2, 6}, // (subframe number) 4
{0xa3, -1, 4, 0, 528, 0, 1, 2, 6}, // (subframe number) 4,9
{0xa3, -1, 4, 0, 16, 0, 2, 2, 6}, // (subframe number) 4
{0xa3, -1, 2, 1, 580, 0, 2, 2, 6}, // (subframe number) 2,6,9
{0xa3, -1, 2, 0, 2, 0, 2, 2, 6}, // (subframe number) 1
{0xa3, -1, 2, 0, 16, 0, 2, 2, 6}, // (subframe number) 4
{0xa3, -1, 2, 0, 128, 0, 2, 2, 6}, // (subframe number) 7
{0xa3, -1, 1, 0, 16, 0, 1, 2, 6}, // (subframe number) 4
{0xa3, -1, 1, 0, 66, 0, 1, 2, 6}, // (subframe number) 1,6
{0xa3, -1, 1, 0, 528, 0, 1, 2, 6}, // (subframe number) 4,9
{0xa3, -1, 1, 0, 2, 0, 2, 2, 6}, // (subframe number) 1
{0xa3, -1, 1, 0, 128, 0, 2, 2, 6}, // (subframe number) 7
{0xa3, -1, 1, 0, 132, 0, 2, 2, 6}, // (subframe number) 2,7
{0xa3, -1, 1, 0, 146, 0, 2, 2, 6}, // (subframe number) 1,4,7
{0xa3, -1, 1, 0, 341, 0, 2, 2, 6}, // (subframe number) 0,2,4,6,8
{0xa3, -1, 1, 0, 1023, 0, 2, 2, 6}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xa3, -1, 1, 0, 682, 0, 2, 2, 6}, // (subframe number) 1,3,5,7,9
{0xa3, 0xb3, 2, 1, 580, 0, 2, 2, 6}, // (subframe number) 2,6,9
{0xa3, 0xb3, 2, 0, 16, 0, 2, 2, 6}, // (subframe number) 4
{0xa3, 0xb3, 1, 0, 16, 0, 1, 2, 6}, // (subframe number) 4
{0xa3, 0xb3, 1, 0, 66, 0, 1, 2, 6}, // (subframe number) 1,6
{0xa3, 0xb3, 1, 0, 528, 0, 1, 2, 6}, // (subframe number) 4,9
{0xa3, 0xb3, 1, 0, 2, 0, 2, 2, 6}, // (subframe number) 1
{0xa3, 0xb3, 1, 0, 128, 0, 2, 2, 6}, // (subframe number) 7
{0xa3, 0xb3, 1, 0, 146, 0, 2, 2, 6}, // (subframe number) 1,4,7
{0xa3, 0xb3, 1, 0, 341, 0, 2, 2, 6}, // (subframe number) 0,2,4,6,8
{0xa3, 0xb3, 1, 0, 1023, 0, 2, 2, 6}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xb1, -1, 16, 0, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xb1, -1, 16, 1, 16, 0, 2, 7, 2}, // (subframe number) 4
{0xb1, -1, 8, 0, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xb1, -1, 8, 1, 16, 0, 2, 7, 2}, // (subframe number) 4
{0xb1, -1, 4, 0, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xb1, -1, 4, 1, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xb1, -1, 4, 0, 16, 0, 2, 7, 2}, // (subframe number) 4
{0xb1, -1, 2, 0, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xb1, -1, 2, 0, 2, 0, 2, 7, 2}, // (subframe number) 1
{0xb1, -1, 2, 0, 16, 0, 2, 7, 2}, // (subframe number) 4
{0xb1, -1, 2, 0, 128, 0, 2, 7, 2}, // (subframe number) 7
{0xb1, -1, 1, 0, 16, 0, 1, 7, 2}, // (subframe number) 4
{0xb1, -1, 1, 0, 66, 0, 1, 7, 2}, // (subframe number) 1,6
{0xb1, -1, 1, 0, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xb1, -1, 1, 0, 2, 0, 2, 7, 2}, // (subframe number) 1
{0xb1, -1, 1, 0, 128, 0, 2, 7, 2}, // (subframe number) 7
{0xb1, -1, 1, 0, 132, 0, 2, 7, 2}, // (subframe number) 2,7
{0xb1, -1, 1, 0, 146, 0, 2, 7, 2}, // (subframe number) 1,4,7
{0xb1, -1, 1, 0, 341, 0, 2, 7, 2}, // (subframe number) 0,2,4,6,8
{0xb1, -1, 1, 0, 1023, 0, 2, 7, 2}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xb1, -1, 1, 0, 682, 0, 2, 7, 2}, // (subframe number) 1,3,5,7,9
{0xb4, -1, 16, 0, 528, 0, 2, 1, 12}, // (subframe number) 4,9
{0xb4, -1, 16, 1, 16, 0, 2, 1, 12}, // (subframe number) 4
{0xb4, -1, 8, 0, 528, 0, 2, 1, 12}, // (subframe number) 4,9
{0xb4, -1, 8, 1, 16, 0, 2, 1, 12}, // (subframe number) 4
{0xb4, -1, 4, 0, 528, 0, 2, 1, 12}, // (subframe number) 4,9
{0xb4, -1, 4, 0, 16, 0, 2, 1, 12}, // (subframe number) 4
{0xb4, -1, 4, 1, 528, 0, 2, 1, 12}, // (subframe number) 4,9
{0xb4, -1, 2, 0, 528, 0, 2, 1, 12}, // (subframe number) 4,9
{0xb4, -1, 2, 0, 2, 0, 2, 1, 12}, // (subframe number) 1
{0xb4, -1, 2, 0, 16, 0, 2, 1, 12}, // (subframe number) 4
{0xb4, -1, 2, 0, 128, 0, 2, 1, 12}, // (subframe number) 7
{0xb4, -1, 1, 0, 2, 0, 2, 1, 12}, // (subframe number) 1
{0xb4, -1, 1, 0, 16, 0, 2, 1, 12}, // (subframe number) 4
{0xb4, -1, 1, 0, 128, 0, 2, 1, 12}, // (subframe number) 7
{0xb4, -1, 1, 0, 66, 0, 2, 1, 12}, // (subframe number) 1,6
{0xb4, -1, 1, 0, 132, 0, 2, 1, 12}, // (subframe number) 2,7
{0xb4, -1, 1, 0, 528, 0, 2, 1, 12}, // (subframe number) 4,9
{0xb4, -1, 1, 0, 146, 0, 2, 1, 12}, // (subframe number) 1,4,7
{0xb4, -1, 1, 0, 341, 0, 2, 1, 12}, // (subframe number) 0,2,4,6,8
{0xb4, -1, 1, 0, 1023, 0, 2, 1, 12}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xb4, -1, 1, 0, 682, 0, 2, 1, 12}, // (subframe number) 1,3,5,7,9
{0xc0, -1, 8, 1, 16, 0, 2, 7, 2}, // (subframe number) 4
{0xc0, -1, 4, 1, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xc0, -1, 4, 0, 16, 0, 2, 7, 2}, // (subframe number) 4
{0xc0, -1, 2, 0, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xc0, -1, 2, 0, 2, 0, 2, 7, 2}, // (subframe number) 1
{0xc0, -1, 2, 0, 16, 0, 2, 7, 2}, // (subframe number) 4
{0xc0, -1, 2, 0, 128, 0, 2, 7, 2}, // (subframe number) 7
{0xc0, -1, 1, 0, 16, 0, 1, 7, 2}, // (subframe number) 4
{0xc0, -1, 1, 0, 66, 0, 1, 7, 2}, // (subframe number) 1,6
{0xc0, -1, 1, 0, 528, 0, 1, 7, 2}, // (subframe number) 4,9
{0xc0, -1, 1, 0, 2, 0, 2, 7, 2}, // (subframe number) 1
{0xc0, -1, 1, 0, 128, 0, 2, 7, 2}, // (subframe number) 7
{0xc0, -1, 1, 0, 132, 0, 2, 7, 2}, // (subframe number) 2,7
{0xc0, -1, 1, 0, 146, 0, 2, 7, 2}, // (subframe number) 1,4,7
{0xc0, -1, 1, 0, 341, 0, 2, 7, 2}, // (subframe number) 0,2,4,6,8
{0xc0, -1, 1, 0, 1023, 0, 2, 7, 2}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xc0, -1, 1, 0, 682, 0, 2, 7, 2}, // (subframe number) 1,3,5,7,9
{0xc2, -1, 16, 1, 528, 0, 1, 2, 6}, // (subframe number) 4,9
{0xc2, -1, 16, 1, 16, 0, 2, 2, 6}, // (subframe number) 4
{0xc2, -1, 8, 1, 528, 0, 1, 2, 6}, // (subframe number) 4,9
{0xc2, -1, 8, 1, 16, 0, 2, 2, 6}, // (subframe number) 4
{0xc2, -1, 4, 0, 528, 0, 1, 2, 6}, // (subframe number) 4,9
{0xc2, -1, 4, 0, 16, 0, 2, 2, 6}, // (subframe number) 4
{0xc2, -1, 2, 1, 580, 0, 2, 2, 6}, // (subframe number) 2,6,9
{0xc2, -1, 2, 0, 2, 0, 2, 2, 6}, // (subframe number) 1
{0xc2, -1, 2, 0, 16, 0, 2, 2, 6}, // (subframe number) 4
{0xc2, -1, 2, 0, 128, 0, 2, 2, 6}, // (subframe number) 7
{0xc2, -1, 1, 0, 16, 0, 1, 2, 6}, // (subframe number) 4
{0xc2, -1, 1, 0, 66, 0, 1, 2, 6}, // (subframe number) 1,6
{0xc2, -1, 1, 0, 528, 0, 1, 2, 6}, // (subframe number) 4,9
{0xc2, -1, 1, 0, 2, 0, 2, 2, 6}, // (subframe number) 1
{0xc2, -1, 1, 0, 128, 0, 2, 2, 6}, // (subframe number) 7
{0xc2, -1, 1, 0, 132, 0, 2, 2, 6}, // (subframe number) 2,7
{0xc2, -1, 1, 0, 146, 0, 2, 2, 6}, // (subframe number) 1,4,7
{0xc2, -1, 1, 0, 341, 0, 2, 2, 6}, // (subframe number) 0,2,4,6,8
{0xc2, -1, 1, 0, 1023, 0, 2, 2, 6}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xc2, -1, 1, 0, 682, 0, 2, 2, 6} // (subframe number) 1,3,5,7,9
};
// Table 6.3.3.2-3: Random access configurations for FR1 and unpaired spectrum
int64_t table_6_3_3_2_3_prachConfig_Index [256][9] = {
//format, format, x, y, SFN_nbr, star_symb, slots_sfn, occ_slot, duration
{0, -1, 16, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 8, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 4, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 2, 0, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 2, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 2, 0, 16, 0, -1, -1, 0}, // (subrame number 4)
{0, -1, 2, 1, 16, 0, -1, -1, 0}, // (subrame number 4)
{0, -1, 1, 0, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 1, 0, 256, 0, -1, -1, 0}, // (subrame number 8)
{0, -1, 1, 0, 128, 0, -1, -1, 0}, // (subrame number 7)
{0, -1, 1, 0, 64, 0, -1, -1, 0}, // (subrame number 6)
{0, -1, 1, 0, 32, 0, -1, -1, 0}, // (subrame number 5)
{0, -1, 1, 0, 16, 0, -1, -1, 0}, // (subrame number 4)
{0, -1, 1, 0, 8, 0, -1, -1, 0}, // (subrame number 3)
{0, -1, 1, 0, 4, 0, -1, -1, 0}, // (subrame number 2)
{0, -1, 1, 0, 66, 0, -1, -1, 0}, // (subrame number 1,6)
{0, -1, 1, 0, 66, 7, -1, -1, 0}, // (subrame number 1,6)
{0, -1, 1, 0, 528, 0, -1, -1, 0}, // (subrame number 4,9)
{0, -1, 1, 0, 264, 0, -1, -1, 0}, // (subrame number 3,8)
{0, -1, 1, 0, 132, 0, -1, -1, 0}, // (subrame number 2,7)
{0, -1, 1, 0, 768, 0, -1, -1, 0}, // (subrame number 8,9)
{0, -1, 1, 0, 784, 0, -1, -1, 0}, // (subrame number 4,8,9)
{0, -1, 1, 0, 536, 0, -1, -1, 0}, // (subrame number 3,4,9)
{0, -1, 1, 0, 896, 0, -1, -1, 0}, // (subrame number 7,8,9)
{0, -1, 1, 0, 792, 0, -1, -1, 0}, // (subrame number 3,4,8,9)
{0, -1, 1, 0, 960, 0, -1, -1, 0}, // (subrame number 6,7,8,9)
{0, -1, 1, 0, 594, 0, -1, -1, 0}, // (subrame number 1,4,6,9)
{0, -1, 1, 0, 682, 0, -1, -1, 0}, // (subrame number 1,3,5,7,9)
{1, -1, 16, 1, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 8, 1, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 4, 1, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 2, 0, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 2, 1, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 1, 0, 128, 0, -1, -1, 0}, // (subrame number 7)
{2, -1, 16, 1, 64, 0, -1, -1, 0}, // (subrame number 6)
{2, -1, 8, 1, 64, 0, -1, -1, 0}, // (subrame number 6)
{2, -1, 4, 1, 64, 0, -1, -1, 0}, // (subrame number 6)
{2, -1, 2, 0, 64, 7, -1, -1, 0}, // (subrame number 6)
{2, -1, 2, 1, 64, 7, -1, -1, 0}, // (subrame number 6)
{2, -1, 1, 0, 64, 7, -1, -1, 0}, // (subrame number 6)
{3, -1, 16, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 8, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 4, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 2, 0, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 2, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 2, 0, 16, 0, -1, -1, 0}, // (subrame number 4)
{3, -1, 2, 1, 16, 0, -1, -1, 0}, // (subrame number 4)
{3, -1, 1, 0, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 1, 0, 256, 0, -1, -1, 0}, // (subrame number 8)
{3, -1, 1, 0, 128, 0, -1, -1, 0}, // (subrame number 7)
{3, -1, 1, 0, 64, 0, -1, -1, 0}, // (subrame number 6)
{3, -1, 1, 0, 32, 0, -1, -1, 0}, // (subrame number 5)
{3, -1, 1, 0, 16, 0, -1, -1, 0}, // (subrame number 4)
{3, -1, 1, 0, 8, 0, -1, -1, 0}, // (subrame number 3)
{3, -1, 1, 0, 4, 0, -1, -1, 0}, // (subrame number 2)
{3, -1, 1, 0, 66, 0, -1, -1, 0}, // (subrame number 1,6)
{3, -1, 1, 0, 66, 7, -1, -1, 0}, // (subrame number 1,6)
{3, -1, 1, 0, 528, 0, -1, -1, 0}, // (subrame number 4,9)
{3, -1, 1, 0, 264, 0, -1, -1, 0}, // (subrame number 3,8)
{3, -1, 1, 0, 132, 0, -1, -1, 0}, // (subrame number 2,7)
{3, -1, 1, 0, 768, 0, -1, -1, 0}, // (subrame number 8,9)
{3, -1, 1, 0, 784, 0, -1, -1, 0}, // (subrame number 4,8,9)
{3, -1, 1, 0, 536, 0, -1, -1, 0}, // (subrame number 3,4,9)
{3, -1, 1, 0, 896, 0, -1, -1, 0}, // (subrame number 7,8,9)
{3, -1, 1, 0, 792, 0, -1, -1, 0}, // (subrame number 3,4,8,9)
{3, -1, 1, 0, 594, 0, -1, -1, 0}, // (subrame number 1,4,6,9)
{3, -1, 1, 0, 682, 0, -1, -1, 0}, // (subrame number 1,3,5,7,9)
{0xa1, -1, 16, 1, 512, 0, 2, 6, 2}, // (subrame number 9)
{0xa1, -1, 8, 1, 512, 0, 2, 6, 2}, // (subrame number 9)
{0xa1, -1, 4, 1, 512, 0, 1, 6, 2}, // (subrame number 9)
{0xa1, -1, 2, 1, 512, 0, 1, 6, 2}, // (subrame number 9)
{0xa1, -1, 2, 1, 528, 7, 1, 3, 2}, // (subrame number 4,9)
{0xa1, -1, 2, 1, 640, 7, 1, 3, 2}, // (subrame number 7,9)
{0xa1, -1, 2, 1, 640, 0, 1, 6, 2}, // (subrame number 7,9)
{0xa1, -1, 2, 1, 768, 0, 2, 6, 2}, // (subrame number 8,9)
{0xa1, -1, 2, 1, 528, 0, 2, 6, 2}, // (subrame number 4,9)
{0xa1, -1, 2, 1, 924, 0, 1, 6, 2}, // (subrame number 2,3,4,7,8,9)
{0xa1, -1, 1, 0, 512, 0, 2, 6, 2}, // (subrame number 9)
{0xa1, -1, 1, 0, 512, 7, 1, 3, 2}, // (subrame number 9)
{0xa1, -1, 1, 0, 512, 0, 1, 6, 2}, // (subrame number 9)
{0xa1, -1, 1, 0, 768, 0, 2, 6, 2}, // (subrame number 8,9)
{0xa1, -1, 1, 0, 528, 0, 1, 6, 2}, // (subrame number 4,9)
{0xa1, -1, 1, 0, 640, 7, 1, 3, 2}, // (subrame number 7,9)
{0xa1, -1, 1, 0, 792, 0, 1, 6, 2}, // (subrame number 3,4,8,9)
{0xa1, -1, 1, 0, 792, 0, 2, 6, 2}, // (subrame number 3,4,8,9)
{0xa1, -1, 1, 0, 682, 0, 1, 6, 2}, // (subrame number 1,3,5,7,9)
{0xa1, -1, 1, 0, 1023, 7, 1, 3, 2}, // (subrame number 0,1,2,3,4,5,6,7,8,9)
{0xa2, -1, 16, 1, 512, 0, 2, 3, 4}, // (subrame number 9)
{0xa2, -1, 8, 1, 512, 0, 2, 3, 4}, // (subrame number 9)
{0xa2, -1, 4, 1, 512, 0, 1, 3, 4}, // (subrame number 9)
{0xa2, -1, 2, 1, 640, 0, 1, 3, 4}, // (subrame number 7,9)
{0xa2, -1, 2, 1, 768, 0, 2, 3, 4}, // (subrame number 8,9)
{0xa2, -1, 2, 1, 640, 9, 1, 1, 4}, // (subrame number 7,9)
{0xa2, -1, 2, 1, 528, 9, 1, 1, 4}, // (subrame number 4,9)
{0xa2, -1, 2, 1, 528, 0, 2, 3, 4}, // (subrame number 4,9)
{0xa2, -1, 16, 1, 924, 0, 1, 3, 4}, // (subrame number 2,3,4,7,8,9)
{0xa2, -1, 1, 0, 4, 0, 1, 3, 4}, // (subrame number 2)
{0xa2, -1, 1, 0, 128, 0, 1, 3, 4}, // (subrame number 7)
{0xa2, -1, 2, 1, 512, 0, 1, 3, 4}, // (subrame number 9)
{0xa2, -1, 1, 0, 512, 0, 2, 3, 4}, // (subrame number 9)
{0xa2, -1, 1, 0, 512, 9, 1, 1, 4}, // (subrame number 9)
{0xa2, -1, 1, 0, 512, 0, 1, 3, 4}, // (subrame number 9)
{0xa2, -1, 1, 0, 132, 0, 1, 3, 4}, // (subrame number 2,7)
{0xa2, -1, 1, 0, 768, 0, 2, 3, 4}, // (subrame number 8,9)
{0xa2, -1, 1, 0, 528, 0, 1, 3, 4}, // (subrame number 4,9)
{0xa2, -1, 1, 0, 640, 9, 1, 1, 4}, // (subrame number 7,9)
{0xa2, -1, 1, 0, 792, 0, 1, 3, 4}, // (subrame number 3,4,8,9)
{0xa2, -1, 1, 0, 792, 0, 2, 3, 4}, // (subrame number 3,4,8,9)
{0xa2, -1, 1, 0, 682, 0, 1, 3, 4}, // (subrame number 1,3,5,7,9)
{0xa2, -1, 1, 0, 1023, 9, 1, 1, 4}, // (subrame number 0,1,2,3,4,5,6,7,8,9)
{0xa3, -1, 16, 1, 512, 0, 2, 2, 6}, // (subrame number 9)
{0xa3, -1, 8, 1, 512, 0, 2, 2, 6}, // (subrame number 9)
{0xa3, -1, 4, 1, 512, 0, 1, 2, 6}, // (subrame number 9)
{0xa3, -1, 2, 1, 528, 7, 1, 1, 6}, // (subrame number 4,9)
{0xa3, -1, 2, 1, 640, 7, 1, 1, 6}, // (subrame number 7,9)
{0xa3, -1, 2, 1, 640, 0, 1, 2, 6}, // (subrame number 7,9)
{0xa3, -1, 2, 1, 528, 0, 2, 2, 6}, // (subrame number 4,9)
{0xa3, -1, 2, 1, 768, 0, 2, 2, 6}, // (subrame number 8,9)
{0xa3, -1, 2, 1, 924, 0, 1, 2, 6}, // (subrame number 2,3,4,7,8,9)
{0xa3, -1, 1, 0, 4, 0, 1, 2, 6}, // (subrame number 2)
{0xa3, -1, 1, 0, 128, 0, 1, 2, 6}, // (subrame number 7)
{0xa3, -1, 2, 1, 512, 0, 1, 2, 6}, // (subrame number 9)
{0xa3, -1, 1, 0, 512, 0, 2, 2, 6}, // (subrame number 9)
{0xa3, -1, 1, 0, 512, 7, 1, 1, 6}, // (subrame number 9)
{0xa3, -1, 1, 0, 512, 0, 1, 2, 6}, // (subrame number 9)
{0xa3, -1, 1, 0, 132, 0, 1, 2, 6}, // (subrame number 2,7)
{0xa3, -1, 1, 0, 768, 0, 2, 2, 6}, // (subrame number 8,9)
{0xa3, -1, 1, 0, 528, 0, 1, 2, 6}, // (subrame number 4,9)
{0xa3, -1, 1, 0, 640, 7, 1, 1, 6}, // (subrame number 7,9)
{0xa3, -1, 1, 0, 792, 0, 1, 2, 6}, // (subrame number 3,4,8,9)
{0xa3, -1, 1, 0, 792, 0, 2, 2, 6}, // (subrame number 3,4,8,9)
{0xa3, -1, 1, 0, 682, 0, 1, 2, 6}, // (subrame number 1,3,5,7,9)
{0xa3, -1, 1, 0, 1023, 7, 1, 1, 6}, // (subrame number 0,1,2,3,4,5,6,7,8,9)
{0xb1, -1, 4, 1, 512, 2, 1, 6, 2}, // (subrame number 9)
{0xb1, -1, 2, 1, 512, 2, 1, 6, 2}, // (subrame number 9)
{0xb1, -1, 2, 1, 640, 2, 1, 6, 2}, // (subrame number 7,9)
{0xb1, -1, 2, 1, 528, 8, 1, 3, 2}, // (subrame number 4,9)
{0xb1, -1, 2, 1, 528, 2, 2, 6, 2}, // (subrame number 4,9)
{0xb1, -1, 1, 0, 512, 2, 2, 6, 2}, // (subrame number 9)
{0xb1, -1, 1, 0, 512, 8, 1, 3, 2}, // (subrame number 9)
{0xb1, -1, 1, 0, 512, 2, 1, 6, 2}, // (subrame number 9)
{0xb1, -1, 1, 0, 768, 2, 2, 6, 2}, // (subrame number 8,9)
{0xb1, -1, 1, 0, 528, 2, 1, 6, 2}, // (subrame number 4,9)
{0xb1, -1, 1, 0, 640, 8, 1, 3, 2}, // (subrame number 7,9)
{0xb1, -1, 1, 0, 682, 2, 1, 6, 2}, // (subrame number 1,3,5,7,9)
{0xb4, -1, 16, 1, 512, 0, 2, 1, 12}, // (subrame number 9)
{0xb4, -1, 8, 1, 512, 0, 2, 1, 12}, // (subrame number 9)
{0xb4, -1, 4, 1, 512, 2, 1, 1, 12}, // (subrame number 9)
{0xb4, -1, 2, 1, 512, 0, 1, 1, 12}, // (subrame number 9)
{0xb4, -1, 2, 1, 512, 2, 1, 1, 12}, // (subrame number 9)
{0xb4, -1, 2, 1, 640, 2, 1, 1, 12}, // (subrame number 7,9)
{0xb4, -1, 2, 1, 528, 2, 1, 1, 12}, // (subrame number 4,9)
{0xb4, -1, 2, 1, 528, 0, 2, 1, 12}, // (subrame number 4,9)
{0xb4, -1, 2, 1, 768, 0, 2, 1, 12}, // (subrame number 8,9)
{0xb4, -1, 2, 1, 924, 0, 1, 1, 12}, // (subrame number 2,3,4,7,8,9)
{0xb4, -1, 1, 0, 2, 0, 1, 1, 12}, // (subrame number 1)
{0xb4, -1, 1, 0, 4, 0, 1, 1, 12}, // (subrame number 2)
{0xb4, -1, 1, 0, 16, 0, 1, 1, 12}, // (subrame number 4)
{0xb4, -1, 1, 0, 128, 0, 1, 1, 12}, // (subrame number 7)
{0xb4, -1, 1, 0, 512, 0, 1, 1, 12}, // (subrame number 9)
{0xb4, -1, 1, 0, 512, 2, 1, 1, 12}, // (subrame number 9)
{0xb4, -1, 1, 0, 512, 0, 2, 1, 12}, // (subrame number 9)
{0xb4, -1, 1, 0, 528, 2, 1, 1, 12}, // (subrame number 4,9)
{0xb4, -1, 1, 0, 640, 2, 1, 1, 12}, // (subrame number 7,9)
{0xb4, -1, 1, 0, 768, 0, 2, 1, 12}, // (subrame number 8,9)
{0xb4, -1, 1, 0, 792, 2, 1, 1, 12}, // (subrame number 3,4,8,9)
{0xb4, -1, 1, 0, 682, 2, 1, 1, 12}, // (subrame number 1,3,5,7,9)
{0xb4, -1, 1, 0, 1023, 0, 2, 1, 12}, // (subrame number 0,1,2,3,4,5,6,7,8,9)
{0xb4, -1, 1, 0, 1023, 2, 1, 1, 12}, // (subrame number 0,1,2,3,4,5,6,7,8,9)
{0xc0, -1, 16, 1, 512, 2, 2, 6, 2}, // (subrame number 9)
{0xc0, -1, 8, 1, 512, 2, 2, 6, 2}, // (subrame number 9)
{0xc0, -1, 4, 1, 512, 2, 1, 6, 2}, // (subrame number 9)
{0xc0, -1, 2, 1, 512, 2, 1, 6, 2}, // (subrame number 9)
{0xc0, -1, 2, 1, 768, 2, 2, 6, 2}, // (subrame number 8,9)
{0xc0, -1, 2, 1, 640, 2, 1, 6, 2}, // (subrame number 7,9)
{0xc0, -1, 2, 1, 640, 8, 1, 3, 2}, // (subrame number 7,9)
{0xc0, -1, 2, 1, 528, 8, 1, 3, 2}, // (subrame number 4,9)
{0xc0, -1, 2, 1, 528, 2, 2, 6, 2}, // (subrame number 4,9)
{0xc0, -1, 2, 1, 924, 2, 1, 6, 2}, // (subrame number 2,3,4,7,8,9)
{0xc0, -1, 1, 0, 512, 2, 2, 6, 2}, // (subrame number 9)
{0xc0, -1, 1, 0, 512, 8, 1, 3, 2}, // (subrame number 9)
{0xc0, -1, 1, 0, 512, 2, 1, 6, 2}, // (subrame number 9)
{0xc0, -1, 1, 0, 768, 2, 2, 6, 2}, // (subrame number 8,9)
{0xc0, -1, 1, 0, 528, 2, 1, 6, 2}, // (subrame number 4,9)
{0xc0, -1, 1, 0, 640, 8, 1, 3, 2}, // (subrame number 7,9)
{0xc0, -1, 1, 0, 792, 2, 1, 6, 2}, // (subrame number 3,4,8,9)
{0xc0, -1, 1, 0, 792, 2, 2, 6, 2}, // (subrame number 3,4,8,9)
{0xc0, -1, 1, 0, 682, 2, 1, 6, 2}, // (subrame number 1,3,5,7,9)
{0xc0, -1, 1, 0, 1023, 8, 1, 3, 2}, // (subrame number 0,1,2,3,4,5,6,7,8,9)
{0xc2, -1, 16, 1, 512, 2, 2, 2, 6}, // (subrame number 9)
{0xc2, -1, 8, 1, 512, 2, 2, 2, 6}, // (subrame number 9)
{0xc2, -1, 4, 1, 512, 2, 1, 2, 6}, // (subrame number 9)
{0xc2, -1, 2, 1, 512, 2, 1, 2, 6}, // (subrame number 9)
{0xc2, -1, 2, 1, 768, 2, 2, 2, 6}, // (subrame number 8,9)
{0xc2, -1, 2, 1, 640, 2, 1, 2, 6}, // (subrame number 7,9)
{0xc2, -1, 2, 1, 640, 8, 1, 1, 6}, // (subrame number 7,9)
{0xc2, -1, 2, 1, 528, 8, 1, 1, 6}, // (subrame number 4,9)
{0xc2, -1, 2, 1, 528, 2, 2, 2, 6}, // (subrame number 4,9)
{0xc2, -1, 2, 1, 924, 2, 1, 2, 6}, // (subrame number 2,3,4,7,8,9)
{0xc2, -1, 8, 1, 512, 8, 2, 1, 6}, // (subrame number 9)
{0xc2, -1, 4, 1, 512, 8, 1, 1, 6}, // (subrame number 9)
{0xc2, -1, 1, 0, 512, 2, 2, 2, 6}, // (subrame number 9)
{0xc2, -1, 1, 0, 512, 8, 1, 1, 6}, // (subrame number 9)
{0xc2, -1, 1, 0, 512, 2, 1, 2, 6}, // (subrame number 9)
{0xc2, -1, 1, 0, 768, 2, 2, 2, 6}, // (subrame number 8,9)
{0xc2, -1, 1, 0, 528, 2, 1, 2, 6}, // (subrame number 4,9)
{0xc2, -1, 1, 0, 640, 8, 1, 1, 6}, // (subrame number 7,9)
{0xc2, -1, 1, 0, 792, 2, 1, 2, 6}, // (subrame number 3,4,8,9)
{0xc2, -1, 1, 0, 792, 2, 2, 2, 6}, // (subrame number 3,4,8,9)
{0xc2, -1, 1, 0, 682, 2, 1, 2, 6}, // (subrame number 1,3,5,7,9)
{0xc2, -1, 1, 0, 1023, 8, 1, 1, 6}, // (subrame number 0,1,2,3,4,5,6,7,8,9)
{0xa1, 0xb1, 2, 1, 512, 2, 1, 6, 2}, // (subrame number 9)
{0xa1, 0xb1, 2, 1, 528, 8, 1, 3, 2}, // (subrame number 4,9)
{0xa1, 0xb1, 2, 1, 640, 8, 1, 3, 2}, // (subrame number 7,9)
{0xa1, 0xb1, 2, 1, 640, 2, 1, 6, 2}, // (subrame number 7,9)
{0xa1, 0xb1, 2, 1, 528, 2, 2, 6, 2}, // (subrame number 4,9)
{0xa1, 0xb1, 2, 1, 768, 2, 2, 6, 2}, // (subrame number 8,9)
{0xa1, 0xb1, 1, 0, 512, 2, 2, 6, 2}, // (subrame number 9)
{0xa1, 0xb1, 1, 0, 512, 8, 1, 3, 2}, // (subrame number 9)
{0xa1, 0xb1, 1, 0, 512, 2, 1, 6, 2}, // (subrame number 9)
{0xa1, 0xb1, 1, 0, 768, 2, 2, 6, 2}, // (subrame number 8,9)
{0xa1, 0xb1, 1, 0, 528, 2, 1, 6, 2}, // (subrame number 4,9)
{0xa1, 0xb1, 1, 0, 640, 8, 1, 3, 2}, // (subrame number 7,9)
{0xa1, 0xb1, 1, 0, 792, 2, 2, 6, 2}, // (subrame number 3,4,8,9)
{0xa1, 0xb1, 1, 0, 682, 2, 1, 6, 2}, // (subrame number 1,3,5,7,9)
{0xa1, 0xb1, 1, 0, 1023, 8, 1, 3, 2}, // (subrame number 0,1,2,3,4,5,6,7,8,9)
{0xa2, 0xb2, 2, 1, 512, 0, 1, 3, 4}, // (subrame number 9)
{0xa2, 0xb2, 2, 1, 528, 6, 1, 2, 4}, // (subrame number 4,9)
{0xa2, 0xb2, 2, 1, 640, 6, 1, 2, 4}, // (subrame number 7,9)
{0xa2, 0xb2, 2, 1, 528, 0, 2, 3, 4}, // (subrame number 4,9)
{0xa2, 0xb2, 2, 1, 768, 0, 2, 3, 4}, // (subrame number 8,9)
{0xa2, 0xb2, 1, 0, 512, 0, 2, 3, 4}, // (subrame number 9)
{0xa2, 0xb2, 1, 0, 512, 6, 1, 2, 4}, // (subrame number 9)
{0xa2, 0xb2, 1, 0, 512, 0, 1, 3, 4}, // (subrame number 9)
{0xa2, 0xb2, 1, 0, 768, 0, 2, 3, 4}, // (subrame number 8,9)
{0xa2, 0xb2, 1, 0, 528, 0, 1, 3, 4}, // (subrame number 4,9)
{0xa2, 0xb2, 1, 0, 640, 6, 1, 2, 4}, // (subrame number 7,9)
{0xa2, 0xb2, 1, 0, 792, 0, 1, 3, 4}, // (subrame number 3,4,8,9)
{0xa2, 0xb2, 1, 0, 792, 0, 2, 3, 4}, // (subrame number 3,4,8,9)
{0xa2, 0xb2, 1, 0, 682, 0, 1, 3, 4}, // (subrame number 1,3,5,7,9)
{0xa2, 0xb2, 1, 0, 1023, 6, 1, 2, 4}, // (subrame number 0,1,2,3,4,5,6,7,8,9)
{0xa3, 0xb3, 2, 1, 512, 0, 1, 2, 6}, // (subrame number 9)
{0xa3, 0xb3, 2, 1, 528, 2, 1, 2, 6}, // (subrame number 4,9)
{0xa3, 0xb3, 2, 1, 640, 0, 1, 2, 6}, // (subrame number 7,9)
{0xa3, 0xb3, 2, 1, 640, 2, 1, 2, 6}, // (subrame number 7,9)
{0xa3, 0xb3, 2, 1, 528, 0, 2, 2, 6}, // (subrame number 4,9)
{0xa3, 0xb3, 2, 1, 768, 0, 2, 2, 6}, // (subrame number 8,9)
{0xa3, 0xb3, 1, 0, 512, 0, 2, 2, 6}, // (subrame number 9)
{0xa3, 0xb3, 1, 0, 512, 2, 1, 2, 6}, // (subrame number 9)
{0xa3, 0xb3, 1, 0, 512, 0, 1, 2, 6}, // (subrame number 9)
{0xa3, 0xb3, 1, 0, 768, 0, 2, 2, 6}, // (subrame number 8,9)
{0xa3, 0xb3, 1, 0, 528, 0, 1, 2, 6}, // (subrame number 4,9)
{0xa3, 0xb3, 1, 0, 640, 2, 1, 2, 6}, // (subrame number 7,9)
{0xa3, 0xb3, 1, 0, 792, 0, 2, 2, 6}, // (subrame number 3,4,8,9)
{0xa3, 0xb3, 1, 0, 682, 0, 1, 2, 6}, // (subrame number 1,3,5,7,9)
{0xa3, 0xb3, 1, 0, 1023, 2, 1, 2, 6} // (subrame number 0,1,2,3,4,5,6,7,8,9)
};
// Table 6.3.3.2-4: Random access configurations for FR2 and unpaired spectrum
int64_t table_6_3_3_2_4_prachConfig_Index [256][10] = {
//format, format, x, y, y, SFN_nbr, star_symb, slots_sfn, occ_slot, duration
{0xa1, -1, 16, 1, -1, 567489872400, 0, 2, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, -1, 16, 1, -1, 586406201480, 0, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, -1, 8, 1, 2, 550293209600, 0, 2, 6, 2}, // (subframe number :9,19,29,39)
{0xa1, -1, 8, 1, -1, 567489872400, 0, 2, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, -1, 8, 1, -1, 586406201480, 0, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, -1, 4, 1, -1, 567489872400, 0, 1, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, -1, 4, 1, -1, 567489872400, 0, 2, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, -1, 4, 1, -1, 586406201480, 0, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, -1, 2, 1, -1, 551911719040, 0, 2, 6, 2}, // (subframe number :7,15,23,31,39)
{0xa1, -1, 2, 1, -1, 567489872400, 0, 1, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, -1, 2, 1, -1, 567489872400, 0, 2, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, -1, 2, 1, -1, 586406201480, 0, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, -1, 1, 0, -1, 549756338176, 7, 1, 3, 2}, // (subframe number :19,39)
{0xa1, -1, 1, 0, -1, 168, 0, 1, 6, 2}, // (subframe number :3,5,7)
{0xa1, -1, 1, 0, -1, 567489331200, 7, 1, 3, 2}, // (subframe number :24,29,34,39)
{0xa1, -1, 1, 0, -1, 550293209600, 7, 2, 3, 2}, // (subframe number :9,19,29,39)
{0xa1, -1, 1, 0, -1, 687195422720, 0, 1, 6, 2}, // (subframe number :17,19,37,39)
{0xa1, -1, 1, 0, -1, 550293209600, 0, 2, 6, 2}, // (subframe number :9,19,29,39)
{0xa1, -1, 1, 0, -1, 567489872400, 0, 1, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, -1, 1, 0, -1, 567489872400, 7, 1, 3, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, -1, 1, 0, -1, 10920, 7, 1, 3, 2}, // (subframe number :3,5,7,9,11,13)
{0xa1, -1, 1, 0, -1, 586405642240, 7, 1, 3, 2}, // (subframe number :23,27,31,35,39)
{0xa1, -1, 1, 0, -1, 551911719040, 0, 1, 6, 2}, // (subframe number :7,15,23,31,39)
{0xa1, -1, 1, 0, -1, 586405642240, 0, 1, 6, 2}, // (subframe number :23,27,31,35,39)
{0xa1, -1, 1, 0, -1, 965830828032, 7, 2, 3, 2}, // (subframe number :13,14,15, 29,30,31,37,38,39)
{0xa1, -1, 1, 0, -1, 586406201480, 7, 1, 3, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, -1, 1, 0, -1, 586406201480, 0, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, -1, 1, 0, -1, 733007751850, 0, 1, 6, 2}, // (subframe number :1,3,5,7,…,37,39)
{0xa1, -1, 1, 0, -1, 1099511627775, 7, 1, 3, 2}, // (subframe number :0,1,2,…,39)
{0xa2, -1, 16, 1, -1, 567489872400, 0, 2, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, -1, 16, 1, -1, 586406201480, 0, 1, 3, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, -1, 8, 1, -1, 567489872400, 0, 2, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, -1, 8, 1, -1, 586406201480, 0, 1, 3, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, -1, 8, 1, 2, 550293209600, 0, 2, 3, 4}, // (subframe number :9,19,29,39)
{0xa2, -1, 4, 1, -1, 567489872400, 0, 1, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, -1, 4, 1, -1, 567489872400, 0, 2, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, -1, 4, 1, -1, 586406201480, 0, 1, 3, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, -1, 2, 1, -1, 551911719040, 0, 2, 3, 4}, // (subframe number :7,15,23,31,39)
{0xa2, -1, 2, 1, -1, 567489872400, 0, 1, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, -1, 2, 1, -1, 567489872400, 0, 2, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, -1, 2, 1, -1, 586406201480, 0, 1, 3, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, -1, 1, 0, -1, 549756338176, 5, 1, 2, 4}, // (subframe number :19,39)
{0xa2, -1, 1, 0, -1, 168, 0, 1, 3, 4}, // (subframe number :3,5,7)
{0xa2, -1, 1, 0, -1, 567489331200, 5, 1, 2, 4}, // (subframe number :24,29,34,39)
{0xa2, -1, 1, 0, -1, 550293209600, 5, 2, 2, 4}, // (subframe number :9,19,29,39)
{0xa2, -1, 1, 0, -1, 687195422720, 0, 1, 3, 4}, // (subframe number :17,19,37,39)
{0xa2, -1, 1, 0, -1, 550293209600, 0, 2, 3, 4}, // (subframe number :9, 19, 29, 39)
{0xa2, -1, 1, 0, -1, 551911719040, 0, 1, 3, 4}, // (subframe number :7,15,23,31,39)
{0xa2, -1, 1, 0, -1, 586405642240, 5, 1, 2, 4}, // (subframe number :23,27,31,35,39)
{0xa2, -1, 1, 0, -1, 586405642240, 0, 1, 3, 4}, // (subframe number :23,27,31,35,39)
{0xa2, -1, 1, 0, -1, 10920, 5, 1, 2, 4}, // (subframe number :3,5,7,9,11,13)
{0xa2, -1, 1, 0, -1, 10920, 0, 1, 3, 4}, // (subframe number :3,5,7,9,11,13)
{0xa2, -1, 1, 0, -1, 567489872400, 5, 1, 2, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, -1, 1, 0, -1, 567489872400, 0, 1, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, -1, 1, 0, -1, 965830828032, 5, 2, 2, 4}, // (subframe number :13,14,15, 29,30,31,37,38,39)
{0xa2, -1, 1, 0, -1, 586406201480, 5, 1, 2, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, -1, 1, 0, -1, 586406201480, 0, 1, 3, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, -1, 1, 0, -1, 733007751850, 0, 1, 3, 4}, // (subframe number :1,3,5,7,…,37,39)
{0xa2, -1, 1, 0, -1, 1099511627775, 5, 1, 2, 4}, // (subframe number :0,1,2,…,39)
{0xa3, -1, 16, 1, -1, 567489872400, 0, 2, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, -1, 16, 1, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, -1, 8, 1, -1, 567489872400, 0, 2, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, -1, 8, 1, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, -1, 8, 1, 2, 550293209600, 0, 2, 2, 6}, // (subframe number :9,19,29,39)
{0xa3, -1, 4, 1, -1, 567489872400, 0, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, -1, 4, 1, -1, 567489872400, 0, 2, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, -1, 4, 1, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, -1, 2, 1, -1, 567489872400, 0, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, -1, 2, 1, -1, 567489872400, 0, 2, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, -1, 2, 1, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, -1, 1, 0, -1, 549756338176, 7, 1, 1, 6}, // (subframe number :19,39)
{0xa3, -1, 1, 0, -1, 168, 0, 1, 2, 6}, // (subframe number :3,5,7)
{0xa3, -1, 1, 0, -1, 10752, 2, 1, 2, 6}, // (subframe number :9,11,13)
{0xa3, -1, 1, 0, -1, 567489331200, 7, 1, 1, 6}, // (subframe number :24,29,34,39)
{0xa3, -1, 1, 0, -1, 550293209600, 7, 2, 1, 6}, // (subframe number :9,19,29,39)
{0xa3, -1, 1, 0, -1, 687195422720, 0, 1, 2, 6}, // (subframe number :17,19,37,39)
{0xa3, -1, 1, 0, -1, 550293209600, 0, 2, 2, 6}, // (subframe number :9,19,29,39)
{0xa3, -1, 1, 0, -1, 551911719040, 0, 1, 2, 6}, // (subframe number :7,15,23,31,39)
{0xa3, -1, 1, 0, -1, 586405642240, 7, 1, 1, 6}, // (subframe number :23,27,31,35,39)
{0xa3, -1, 1, 0, -1, 586405642240, 0, 1, 2, 6}, // (subframe number :23,27,31,35,39)
{0xa3, -1, 1, 0, -1, 10920, 0, 1, 2, 6}, // (subframe number :3,5,7,9,11,13)
{0xa3, -1, 1, 0, -1, 10920, 7, 1, 1, 6}, // (subframe number :3,5,7,9,11,13)
{0xa3, -1, 1, 0, -1, 567489872400, 0, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, -1, 1, 0, -1, 567489872400, 7, 1, 1, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, -1, 1, 0, -1, 965830828032, 7, 2, 1, 6}, // (subframe number :13,14,15, 29,30,31,37,38,39)
{0xa3, -1, 1, 0, -1, 586406201480, 7, 1, 1, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, -1, 1, 0, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, -1, 1, 0, -1, 733007751850, 0, 1, 2, 6}, // (subframe number :1,3,5,7,…,37,39)
{0xa3, -1, 1, 0, -1, 1099511627775, 7, 1, 1, 6}, // (subframe number :0,1,2,…,39)
{0xb1, -1, 16, 1, -1, 567489872400, 2, 2, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb1, -1, 8, 1, -1, 567489872400, 2, 2, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb1, -1, 8, 1, 2, 550293209600, 2, 2, 6, 2}, // (subframe number :9,19,29,39)
{0xb1, -1, 4, 1, -1, 567489872400, 2, 2, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb1, -1, 2, 1, -1, 567489872400, 2, 2, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb1, -1, 2, 1, -1, 586406201480, 2, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xb1, -1, 1, 0, -1, 549756338176, 8, 1, 3, 2}, // (subframe number :19,39)
{0xb1, -1, 1, 0, -1, 168, 2, 1, 6, 2}, // (subframe number :3,5,7)
{0xb1, -1, 1, 0, -1, 567489331200, 8, 1, 3, 2}, // (subframe number :24,29,34,39)
{0xb1, -1, 1, 0, -1, 550293209600, 8, 2, 3, 2}, // (subframe number :9,19,29,39)
{0xb1, -1, 1, 0, -1, 687195422720, 2, 1, 6, 2}, // (subframe number :17,19,37,39)
{0xb1, -1, 1, 0, -1, 550293209600, 2, 2, 6, 2}, // (subframe number :9,19,29,39)
{0xb1, -1, 1, 0, -1, 551911719040, 2, 1, 6, 2}, // (subframe number :7,15,23,31,39)
{0xb1, -1, 1, 0, -1, 586405642240, 8, 1, 3, 2}, // (subframe number :23,27,31,35,39)
{0xb1, -1, 1, 0, -1, 586405642240, 2, 1, 6, 2}, // (subframe number :23,27,31,35,39)
{0xb1, -1, 1, 0, -1, 10920, 8, 1, 3, 2}, // (subframe number :3,5,7,9,11,13)
{0xb1, -1, 1, 0, -1, 567489872400, 8, 1, 3, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb1, -1, 1, 0, -1, 567489872400, 2, 1, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb1, -1, 1, 0, -1, 586406201480, 8, 1, 3, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xb1, -1, 1, 0, -1, 965830828032, 8, 2, 3, 2}, // (subframe number :13,14,15, 29,30,31,37,38,39)
{0xb1, -1, 1, 0, -1, 586406201480, 2, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xb1, -1, 1, 0, -1, 733007751850, 2, 1, 6, 2}, // (subframe number :1,3,5,7,…,37,39)
{0xb1, -1, 1, 0, -1, 1099511627775, 8, 1, 3, 2}, // (subframe number :0,1,2,…,39)
{0xb4, -1, 16, 1, 2, 567489872400, 0, 2, 1, 12}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb4, -1, 16, 1, 2, 586406201480, 0, 1, 1, 12}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xb4, -1, 8, 1, 2, 567489872400, 0, 2, 1, 12}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb4, -1, 8, 1, 2, 586406201480, 0, 1, 1, 12}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xb4, -1, 8, 1, 2, 550293209600, 0, 2, 1, 12}, // (subframe number :9,19,29,39)
{0xb4, -1, 4, 1, -1, 567489872400, 0, 1, 1, 12}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb4, -1, 4, 1, -1, 567489872400, 0, 2, 1, 12}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb4, -1, 4, 1, 2, 586406201480, 0, 1, 1, 12}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xb4, -1, 2, 1, -1, 551911719040, 2, 2, 1, 12}, // (subframe number :7,15,23,31,39)
{0xb4, -1, 2, 1, -1, 567489872400, 0, 1, 1, 12}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb4, -1, 2, 1, -1, 567489872400, 0, 2, 1, 12}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb4, -1, 2, 1, -1, 586406201480, 0, 1, 1, 12}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xb4, -1, 1, 0, -1, 549756338176, 2, 2, 1, 12}, // (subframe number :19, 39)
{0xb4, -1, 1, 0, -1, 687195422720, 0, 1, 1, 12}, // (subframe number :17, 19, 37, 39)
{0xb4, -1, 1, 0, -1, 567489331200, 2, 1, 1, 12}, // (subframe number :24,29,34,39)
{0xb4, -1, 1, 0, -1, 550293209600, 2, 2, 1, 12}, // (subframe number :9,19,29,39)
{0xb4, -1, 1, 0, -1, 550293209600, 0, 2, 1, 12}, // (subframe number :9,19,29,39)
{0xb4, -1, 1, 0, -1, 551911719040, 0, 1, 1, 12}, // (subframe number :7,15,23,31,39)
{0xb4, -1, 1, 0, -1, 551911719040, 0, 2, 1, 12}, // (subframe number :7,15,23,31,39)
{0xb4, -1, 1, 0, -1, 586405642240, 0, 1, 1, 12}, // (subframe number :23,27,31,35,39)
{0xb4, -1, 1, 0, -1, 586405642240, 2, 2, 1, 12}, // (subframe number :23,27,31,35,39)
{0xb4, -1, 1, 0, -1, 698880, 0, 1, 1, 12}, // (subframe number :9,11,13,15,17,19)
{0xb4, -1, 1, 0, -1, 10920, 2, 1, 1, 12}, // (subframe number :3,5,7,9,11,13)
{0xb4, -1, 1, 0, -1, 567489872400, 0, 1, 1, 12}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb4, -1, 1, 0, -1, 567489872400, 2, 2, 1, 12}, // (subframe number :4,9,14,19,24,29,34,39)
{0xb4, -1, 1, 0, -1, 965830828032, 2, 2, 1, 12}, // (subframe number :13,14,15, 29,30,31,37,38,39)
{0xb4, -1, 1, 0, -1, 586406201480, 0, 1, 1, 12}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xb4, -1, 1, 0, -1, 586406201480, 2, 1, 1, 12}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xb4, -1, 1, 0, -1, 44739240, 2, 1, 1, 12}, // (subframe number :3, 5, 7, …, 23,25)
{0xb4, -1, 1, 0, -1, 44739240, 0, 2, 1, 12}, // (subframe number :3, 5, 7, …, 23,25)
{0xb4, -1, 1, 0, -1, 733007751850, 0, 1, 1, 12}, // (subframe number :1,3,5,7,…,37,39)
{0xb4, -1, 1, 0, -1, 1099511627775, 2, 1, 1, 12}, // (subframe number :0, 1, 2,…, 39)
{0xc0, -1, 16, 1, -1, 567489872400, 0, 2, 7, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc0, -1, 16, 1, -1, 586406201480, 0, 1, 7, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc0, -1, 8, 1, -1, 567489872400, 0, 1, 7, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc0, -1, 8, 1, -1, 586406201480, 0, 1, 7, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc0, -1, 8, 1, 2, 550293209600, 0, 2, 7, 2}, // (subframe number :9,19,29,39)
{0xc0, -1, 4, 1, -1, 567489872400, 0, 1, 7, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc0, -1, 4, 1, -1, 567489872400, 0, 2, 7, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc0, -1, 4, 1, -1, 586406201480, 0, 1, 7, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc0, -1, 2, 1, -1, 551911719040, 0, 2, 7, 2}, // (subframe number :7,15,23,31,39)
{0xc0, -1, 2, 1, -1, 567489872400, 0, 1, 7, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc0, -1, 2, 1, -1, 567489872400, 0, 2, 7, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc0, -1, 2, 1, -1, 586406201480, 0, 1, 7, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc0, -1, 1, 0, -1, 549756338176, 8, 1, 3, 2}, // (subframe number :19,39)
{0xc0, -1, 1, 0, -1, 168, 0, 1, 7, 2}, // (subframe number :3,5,7)
{0xc0, -1, 1, 0, -1, 567489331200, 8, 1, 3, 2}, // (subframe number :24,29,34,39)
{0xc0, -1, 1, 0, -1, 550293209600, 8, 2, 3, 2}, // (subframe number :9,19,29,39)
{0xc0, -1, 1, 0, -1, 687195422720, 0, 1, 7, 2}, // (subframe number :17,19,37,39)
{0xc0, -1, 1, 0, -1, 550293209600, 0, 2, 7, 2}, // (subframe number :9,19,29,39)
{0xc0, -1, 1, 0, -1, 586405642240, 8, 1, 3, 2}, // (subframe number :23,27,31,35,39)
{0xc0, -1, 1, 0, -1, 551911719040, 0, 1, 7, 2}, // (subframe number :7,15,23,31,39)
{0xc0, -1, 1, 0, -1, 586405642240, 0, 1, 7, 2}, // (subframe number :23,27,31,35,39)
{0xc0, -1, 1, 0, -1, 10920, 8, 1, 3, 2}, // (subframe number :3,5,7,9,11,13)
{0xc0, -1, 1, 0, -1, 567489872400, 8, 1, 3, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc0, -1, 1, 0, -1, 567489872400, 0, 1, 7, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc0, -1, 1, 0, -1, 965830828032, 8, 2, 3, 2}, // (subframe number :13,14,15, 29,30,31,37,38,39)
{0xc0, -1, 1, 0, -1, 586406201480, 8, 1, 3, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc0, -1, 1, 0, -1, 586406201480, 0, 1, 7, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc0, -1, 1, 0, -1, 733007751850, 0, 1, 7, 2}, // (subframe number :1,3,5,7,…,37,39)
{0xc0, -1, 1, 0, -1, 1099511627775, 8, 1, 3, 2}, // (subframe number :0,1,2,…,39)
{0xc2, -1, 16, 1, -1, 567489872400, 0, 2, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc2, -1, 16, 1, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc2, -1, 8, 1, -1, 567489872400, 0, 2, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc2, -1, 8, 1, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc2, -1, 8, 1, 2, 550293209600, 0, 2, 2, 6}, // (subframe number :9,19,29,39)
{0xc2, -1, 4, 1, -1, 567489872400, 0, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc2, -1, 4, 1, -1, 567489872400, 0, 2, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc2, -1, 4, 1, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc2, -1, 2, 1, -1, 551911719040, 2, 2, 2, 6}, // (subframe number :7,15,23,31,39)
{0xc2, -1, 2, 1, -1, 567489872400, 0, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc2, -1, 2, 1, -1, 567489872400, 0, 2, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc2, -1, 2, 1, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc2, -1, 1, 0, -1, 549756338176, 2, 1, 2, 6}, // (subframe number :19,39)
{0xc2, -1, 1, 0, -1, 168, 0, 1, 2, 6}, // (subframe number :3,5,7)
{0xc2, -1, 1, 0, -1, 567489331200, 7, 1, 1, 6}, // (subframe number :24,29,34,39)
{0xc2, -1, 1, 0, -1, 550293209600, 7, 2, 1, 6}, // (subframe number :9,19,29,39)
{0xc2, -1, 1, 0, -1, 687195422720, 0, 1, 2, 6}, // (subframe number :17,19,37,39)
{0xc2, -1, 1, 0, -1, 550293209600, 2, 2, 2, 6}, // (subframe number :9,19,29,39)
{0xc2, -1, 1, 0, -1, 551911719040, 2, 1, 2, 6}, // (subframe number :7,15,23,31,39)
{0xc2, -1, 1, 0, -1, 10920, 7, 1, 1, 6}, // (subframe number :3,5,7,9,11,13)
{0xc2, -1, 1, 0, -1, 586405642240, 7, 2, 1, 6}, // (subframe number :23,27,31,35,39)
{0xc2, -1, 1, 0, -1, 586405642240, 0, 1, 2, 6}, // (subframe number :23,27,31,35,39)
{0xc2, -1, 1, 0, -1, 567489872400, 7, 2, 1, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc2, -1, 1, 0, -1, 567489872400, 2, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xc2, -1, 1, 0, -1, 965830828032, 7, 2, 1, 6}, // (subframe number :13,14,15, 29,30,31,37,38,39)
{0xc2, -1, 1, 0, -1, 586406201480, 7, 1, 1, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc2, -1, 1, 0, -1, 586406201480, 0, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xc2, -1, 1, 0, -1, 733007751850, 0, 1, 2, 6}, // (subframe number :1,3,5,7,…,37,39)
{0xc2, -1, 1, 0, -1, 1099511627775, 7, 1, 1, 6}, // (subframe number :0,1,2,…,39)
{0xa1, 0xb1, 16, 1, -1, 567489872400, 2, 1, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, 0xb1, 16, 1, -1, 586406201480, 2, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, 0xb1, 8, 1, -1, 567489872400, 2, 1, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, 0xb1, 8, 1, -1, 586406201480, 2, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, 0xb1, 4, 1, -1, 567489872400, 2, 1, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, 0xb1, 4, 1, -1, 586406201480, 2, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, 0xb1, 2, 1, -1, 567489872400, 2, 1, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, 0xb1, 1, 0, -1, 549756338176, 8, 1, 3, 2}, // (subframe number :19,39)
{0xa1, 0xb1, 1, 0, -1, 550293209600, 8, 1, 3, 2}, // (subframe number :9,19,29,39)
{0xa1, 0xb1, 1, 0, -1, 687195422720, 2, 1, 6, 2}, // (subframe number :17,19,37,39)
{0xa1, 0xb1, 1, 0, -1, 550293209600, 2, 2, 6, 2}, // (subframe number :9,19,29,39)
{0xa1, 0xb1, 1, 0, -1, 586405642240, 8, 1, 3, 2}, // (subframe number :23,27,31,35,39)
{0xa1, 0xb1, 1, 0, -1, 551911719040, 2, 1, 6, 2}, // (subframe number :7,15,23,31,39)
{0xa1, 0xb1, 1, 0, -1, 586405642240, 2, 1, 6, 2}, // (subframe number :23,27,31,35,39)
{0xa1, 0xb1, 1, 0, -1, 567489872400, 8, 1, 3, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, 0xb1, 1, 0, -1, 567489872400, 2, 1, 6, 2}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa1, 0xb1, 1, 0, -1, 586406201480, 2, 1, 6, 2}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa1, 0xb1, 1, 0, -1, 733007751850, 2, 1, 6, 2}, // (subframe number :1,3,5,7,…,37,39)
{0xa2, 0xb2, 16, 1, -1, 567489872400, 2, 1, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, 0xb2, 16, 1, -1, 586406201480, 2, 1, 3, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, 0xb2, 8, 1, -1, 567489872400, 2, 1, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, 0xb2, 8, 1, -1, 586406201480, 2, 1, 3, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, 0xb2, 4, 1, -1, 567489872400, 2, 1, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, 0xb2, 4, 1, -1, 586406201480, 2, 1, 3, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, 0xb2, 2, 1, -1, 567489872400, 2, 1, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, 0xb2, 1, 0, -1, 549756338176, 6, 1, 2, 4}, // (subframe number :19,39)
{0xa2, 0xb2, 1, 0, -1, 550293209600, 6, 1, 2, 4}, // (subframe number :9,19,29,39)
{0xa2, 0xb2, 1, 0, -1, 687195422720, 2, 1, 3, 4}, // (subframe number :17,19,37,39)
{0xa2, 0xb2, 1, 0, -1, 550293209600, 2, 2, 3, 4}, // (subframe number :9,19,29,39)
{0xa2, 0xb2, 1, 0, -1, 586405642240, 6, 1, 2, 4}, // (subframe number :23,27,31,35,39)
{0xa2, 0xb2, 1, 0, -1, 551911719040, 2, 1, 3, 4}, // (subframe number :7,15,23,31,39)
{0xa2, 0xb2, 1, 0, -1, 586405642240, 2, 1, 3, 4}, // (subframe number :23,27,31,35,39)
{0xa2, 0xb2, 1, 0, -1, 567489872400, 6, 1, 2, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, 0xb2, 1, 0, -1, 567489872400, 2, 1, 3, 4}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa2, 0xb2, 1, 0, -1, 586406201480, 2, 1, 3, 4}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa2, 0xb2, 1, 0, -1, 733007751850, 2, 1, 3, 4}, // (subframe number :1,3,5,7,…,37,39)
{0xa3, 0xb3, 16, 1, -1, 567489872400, 2, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, 0xb3, 16, 1, -1, 586406201480, 2, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, 0xb3, 8, 1, -1, 567489872400, 2, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, 0xb3, 8, 1, -1, 586406201480, 2, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, 0xb3, 4, 1, -1, 567489872400, 2, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, 0xb3, 4, 1, -1, 586406201480, 2, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, 0xb3, 2, 1, -1, 567489872400, 2, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, 0xb3, 1, 0, -1, 549756338176, 2, 1, 2, 6}, // (subframe number :19,39)
{0xa3, 0xb3, 1, 0, -1, 550293209600, 2, 1, 2, 6}, // (subframe number :9,19,29,39)
{0xa3, 0xb3, 1, 0, -1, 687195422720, 2, 1, 2, 6}, // (subframe number :17,19,37,39)
{0xa3, 0xb3, 1, 0, -1, 550293209600, 2, 2, 2, 6}, // (subframe number :9,19,29,39)
{0xa3, 0xb3, 1, 0, -1, 551911719040, 2, 1, 2, 6}, // (subframe number :7,15,23,31,39)
{0xa3, 0xb3, 1, 0, -1, 586405642240, 2, 1, 2, 6}, // (subframe number :23,27,31,35,39)
{0xa3, 0xb3, 1, 0, -1, 586405642240, 2, 2, 2, 6}, // (subframe number :23,27,31,35,39)
{0xa3, 0xb3, 1, 0, -1, 567489872400, 2, 1, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, 0xb3, 1, 0, -1, 567489872400, 2, 2, 2, 6}, // (subframe number :4,9,14,19,24,29,34,39)
{0xa3, 0xb3, 1, 0, -1, 586406201480, 2, 1, 2, 6}, // (subframe number :3,7,11,15,19,23,27,31,35,39)
{0xa3, 0xb3, 1, 0, -1, 733007751850, 2, 1, 2, 6} // (subframe number :1,3,5,7,…,37,39)
};
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+19 -67
View File
@@ -47,7 +47,8 @@
\brief This function frees memory allocated for a particular DLSCH at UE
@param dlsch Pointer to DLSCH to be removed
*/
void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlsch);
void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlsch,uint8_t N_RB_DL);
/** \fn new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t abstraction_flag)
\brief This function allocates structures for a particular DLSCH at UE
@@ -58,13 +59,12 @@ void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlsch);
@params N_RB_DL total number of resource blocks (determine the operating BW)
@param abstraction_flag Flag to indicate abstracted interface
*/
NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_turbo_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag);
NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_turbo_iterations,uint16_t N_RB_DL, uint8_t abstraction_flag);
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulsch);
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulsch,unsigned char N_RB_UL);
NR_UE_ULSCH_t *new_nr_ue_ulsch(unsigned char N_RB_UL, int number_of_harq_pids, uint8_t abstraction_flag);
NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids, uint8_t abstraction_flag);
void fill_UE_dlsch_MCH(PHY_VARS_NR_UE *ue,int mcs,int ndi,int rvidx,int eNB_id);
@@ -1114,6 +1114,7 @@ void *nr_dlsch_decoding_2thread0(void *arg);
void *nr_dlsch_decoding_2thread1(void *arg);
void nr_dlsch_unscrambling(int16_t* llr,
uint32_t size,
uint8_t q,
@@ -1125,17 +1126,10 @@ uint32_t dlsch_decoding_emul(PHY_VARS_NR_UE *phy_vars_ue,
PDSCH_t dlsch_id,
uint8_t eNB_id);
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint32_t frame,
uint8_t nr_tti_rx,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag,
uint8_t is_secondary_ue,
int nb_coreset_active,
uint16_t symbol_mon,
NR_SEARCHSPACE_TYPE_t searchSpaceType);
uint32_t slot);
/*! \brief Extract PSS and SSS resource elements
@param phy_vars_ue Pointer to UE variables
@@ -1545,10 +1539,9 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME
void pdcch_interleaving(NR_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **wbar,uint8_t n_symbols_pdcch,uint8_t mi);
void pdcch_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
int8_t* llr,
uint32_t length);
void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t slot,
int16_t *z, int16_t *z2,uint32_t length, uint16_t pdcch_DMRS_scrambling_id);
@@ -1712,46 +1705,14 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint8_t n_ra_prboffset,
uint8_t tdd_mapindex, uint16_t Nf);
void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t nr_tti_rx,
int16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id, int do_common);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
uint8_t nr_dci_decoding_procedure(int s,
int p,
PHY_VARS_NR_UE *ue,
NR_DCI_ALLOC_t *dci_alloc,
NR_SEARCHSPACE_TYPE_t searchSpacetype,
int16_t eNB_id,
uint8_t nr_tti_rx,
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
crc_scrambled_t *crc_scrambled,
format_found_t *format_found,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
int frame,
int slot,
fapi_nr_dci_indication_t *dci_ind);
int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
int frame,
uint8_t nr_tti_rx,
uint64_t dci_pdu[2],
uint16_t rnti,
uint8_t dci_length,
NR_DCI_format_t dci_format,
NR_UE_PDCCH *pdcch_vars,
NR_UE_PDSCH *pdsch_vars,
NR_UE_DLSCH_t **dlsch,
NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
uint8_t beamforming_mode,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted);
/** \brief This function is the top-level entry point to PDSCH demodulation, after frequency-domain transformation and channel estimation. It performs
- RB extraction (signal and channel estimates)
@@ -1795,20 +1756,11 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t is_crnti,
uint8_t llr8_flag);
int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
lte_frame_type_t frame_type,
uint8_t dci_length,
uint16_t rnti,
uint64_t dci_pdu[2],
fapi_nr_dci_pdu_rel15_t *nr_pdci_info_extracted,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
NR_DCI_format_t dci_format,
uint8_t nr_tti_rx,
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe, uint16_t Nf );
void *dlsch_thread(void *arg);
/**@}*/
#endif
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+16 -4
View File
@@ -42,6 +42,8 @@
#include "UTIL/LISTS/list.h"
#endif
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
//#include "../LTE_TRANSPORT/transport_common.h"
// structures below implement 36-211 and 36-212
@@ -127,9 +129,9 @@ typedef struct {
/// LDPC-code outputs
uint8_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
/// LDPC-code outputs (TS 36.212 V15.4.0, Sec 5.3.2 p. 17)
uint8_t e[MAX_NUM_NR_CHANNEL_BITS] __attribute__((aligned(32)));
uint8_t *e;
/// Rate matching (Interleaving) outputs (TS 36.212 V15.4.0, Sec 5.4.2.2 p. 30)
uint8_t f[MAX_NUM_NR_CHANNEL_BITS] __attribute__((aligned(32)));
uint8_t *f;
/// Number of code segments
uint32_t C;
/// Number of bits in code segments
@@ -240,6 +242,8 @@ typedef struct {
int16_t Po_SRS;
/// num active cba group
uint8_t num_active_cba_groups;
/// bit mask of PT-RS ofdm symbol indicies
uint16_t ptrs_symbols;
/// num dci found for cba
//uint8_t num_cba_dci[10];
/// allocated CBA RNTI
@@ -278,13 +282,13 @@ typedef struct {
/// MIMO mode for this DLSCH
MIMO_nrmode_t mimo_mode;
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t w[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
int16_t *w[MAX_NUM_NR_DLSCH_SEGMENTS];
/// for abstraction soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
//double w_abs[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
/// soft bits for each received segment ("d"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
/// LDPC processing buffers
t_nrLDPC_procBuf* p_nrLDPC_procBuf[MAX_NUM_DLSCH_SEGMENTS];
t_nrLDPC_procBuf* p_nrLDPC_procBuf[MAX_NUM_NR_DLSCH_SEGMENTS];
/// Number of code segments
uint32_t C;
/// Number of bits in code segments
@@ -299,12 +303,20 @@ typedef struct {
int8_t delta_PUCCH;
/// Number of soft channel bits
uint32_t G;
/// Start PRB of BWP
uint16_t BWPStart;
/// Number of PRBs in BWP
uint16_t BWPSize;
/// Current Number of RBs
uint16_t nb_rb;
/// Starting RB number
uint16_t start_rb;
/// Number of Symbols
uint16_t nb_symbols;
/// DMRS symbol positions
uint16_t dlDmrsSymbPos;
/// DMRS Configuration Type
uint8_t dmrsConfigType;
/// Starting Symbol number
uint16_t start_symbol;
/// Current subband PMI allocation
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c
+84 -39
View File
@@ -36,13 +36,14 @@
#include "PHY/CODING/coding_defs.h"
#include "PHY/CODING/coding_extern.h"
#include "PHY/CODING/lte_interleaver_inline.h"
#include "PHY/CODING/nrLDPC_encoder/defs.h"
#include "PHY/CODING/nrLDPC_extern.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr,unsigned char N_RB_UL)
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr)
{
int i, r;
NR_UE_ULSCH_t *ulsch = *ulschptr;
@@ -52,18 +53,35 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr)
printf("Freeing ulsch %p\n",ulsch);
#endif
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273;
}
uint16_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
if (ulsch->harq_processes[i]) {
if (ulsch->harq_processes[i]->a) {
free16(ulsch->harq_processes[i]->a,MAX_NR_ULSCH_PAYLOAD_BYTES);
free16(ulsch->harq_processes[i]->a,ulsch_bytes);
ulsch->harq_processes[i]->a = NULL;
}
if (ulsch->harq_processes[i]->b) {
free16(ulsch->harq_processes[i]->b,MAX_NR_ULSCH_PAYLOAD_BYTES);
free16(ulsch->harq_processes[i]->b,ulsch_bytes);
ulsch->harq_processes[i]->b = NULL;
}
for (r=0; r<MAX_NUM_NR_ULSCH_SEGMENTS; r++) {
if (ulsch->harq_processes[i]->e) {
free16(ulsch->harq_processes[i]->e,14*N_RB_UL*12*8);
ulsch->harq_processes[i]->e = NULL;
}
if (ulsch->harq_processes[i]->f) {
free16(ulsch->harq_processes[i]->f,14*N_RB_UL*12*8);
ulsch->harq_processes[i]->f = NULL;
}
for (r=0; r<a_segments; r++) {
if (ulsch->harq_processes[i]->c[r]) {
free16(ulsch->harq_processes[i]->c[r],((r==0)?8:0) + 3+768);
ulsch->harq_processes[i]->c[r] = NULL;
@@ -87,24 +105,20 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr)
}
NR_UE_ULSCH_t *new_nr_ue_ulsch(unsigned char N_RB_UL,
NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL,
int number_of_harq_pids,
uint8_t abstraction_flag)
{
NR_UE_ULSCH_t *ulsch;
unsigned char exit_flag = 0,i,r;
unsigned char bw_scaling =1;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
switch (N_RB_UL) {
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273;
}
case 106:
bw_scaling =2;
break;
default:
bw_scaling =1;
break;
}
uint16_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
ulsch = (NR_UE_ULSCH_t *)malloc16(sizeof(NR_UE_ULSCH_t));
@@ -124,25 +138,25 @@ NR_UE_ULSCH_t *new_nr_ue_ulsch(unsigned char N_RB_UL,
// printf("ulsch->harq_processes[%d] %p\n",i,ulsch->harq_processes[i]);
if (ulsch->harq_processes[i]) {
memset(ulsch->harq_processes[i], 0, sizeof(NR_UL_UE_HARQ_t));
ulsch->harq_processes[i]->b = (uint8_t*)malloc16(MAX_NR_ULSCH_PAYLOAD_BYTES/bw_scaling);
ulsch->harq_processes[i]->a = (unsigned char*)malloc16(MAX_NR_ULSCH_PAYLOAD_BYTES/bw_scaling);
ulsch->harq_processes[i]->b = (uint8_t*)malloc16(ulsch_bytes);
ulsch->harq_processes[i]->a = (unsigned char*)malloc16(ulsch_bytes);
if (ulsch->harq_processes[i]->a) {
bzero(ulsch->harq_processes[i]->a,MAX_NR_ULSCH_PAYLOAD_BYTES/bw_scaling);
bzero(ulsch->harq_processes[i]->a,ulsch_bytes);
} else {
printf("Can't allocate PDU\n");
exit_flag=1;
}
if (ulsch->harq_processes[i]->b)
bzero(ulsch->harq_processes[i]->b,MAX_NR_ULSCH_PAYLOAD_BYTES/bw_scaling);
bzero(ulsch->harq_processes[i]->b,ulsch_bytes);
else {
LOG_E(PHY,"Can't get b\n");
exit_flag=1;
}
if (abstraction_flag==0) {
for (r=0; r<MAX_NUM_NR_ULSCH_SEGMENTS/bw_scaling; r++) {
for (r=0; r<a_segments; r++) {
// account for filler in first segment and CRCs for multiple segment case
ulsch->harq_processes[i]->c[r] = (uint8_t*)malloc16(8448);
ulsch->harq_processes[i]->d[r] = (uint8_t*)malloc16(68*384); //max size for coded output
@@ -160,6 +174,20 @@ NR_UE_ULSCH_t *new_nr_ue_ulsch(unsigned char N_RB_UL,
exit_flag=2;
}
}
ulsch->harq_processes[i]->e = (uint8_t*)malloc16(14*N_RB_UL*12*8);
if (ulsch->harq_processes[i]->e) {
bzero(ulsch->harq_processes[i]->e,14*N_RB_UL*12*8);
} else {
printf("Can't get e\n");
exit_flag=1;
}
ulsch->harq_processes[i]->f = (uint8_t*)malloc16(14*N_RB_UL*12*8);
if (ulsch->harq_processes[i]->f) {
bzero(ulsch->harq_processes[i]->f,14*N_RB_UL*12*8);
} else {
printf("Can't get f\n");
exit_flag=1;
}
}
ulsch->harq_processes[i]->subframe_scheduling_flag = 0;
@@ -180,7 +208,7 @@ NR_UE_ULSCH_t *new_nr_ue_ulsch(unsigned char N_RB_UL,
}
LOG_E(PHY,"new_ue_ulsch exit flag, size of %d , %zu\n",exit_flag, sizeof(LTE_UE_ULSCH_t));
free_nr_ue_ulsch(&ulsch);
free_nr_ue_ulsch(&ulsch,N_RB_UL);
return(NULL);
@@ -240,13 +268,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
///////////
/////////////////////////////////////////////////////////////////////////////////////////
/*
uint8_t *channel_input[MAX_NUM_DLSCH_SEGMENTS]; //unsigned char
for(j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
channel_input[j] = (unsigned char *)malloc16(sizeof(unsigned char) * 68*384);
}
*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN);
LOG_D(PHY,"ulsch coding nb_rb %d nb_symb_sch %d nb_re_dmrs %d, length_dmrs %d, harq_process->Nl = %d\n", nb_rb,nb_symb_sch, nb_re_dmrs,length_dmrs, harq_process->Nl);
@@ -270,17 +292,35 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
printf("%02x.",a[i]);
printf("\n");
*/
// Add 24-bit crc (polynomial A) to payload
crc = crc24a(harq_process->a,A)>>8;
harq_process->a[A>>3] = ((uint8_t*)&crc)[2];
harq_process->a[1+(A>>3)] = ((uint8_t*)&crc)[1];
harq_process->a[2+(A>>3)] = ((uint8_t*)&crc)[0];
//printf("CRC %x (A %d)\n",crc,A);
//printf("a0 %d a1 %d a2 %d\n", a[A>>3], a[1+(A>>3)], a[2+(A>>3)]);
if (A > 3824) {
// Add 24-bit crc (polynomial A) to payload
crc = crc24a(harq_process->a,A)>>8;
harq_process->a[A>>3] = ((uint8_t*)&crc)[2];
harq_process->a[1+(A>>3)] = ((uint8_t*)&crc)[1];
harq_process->a[2+(A>>3)] = ((uint8_t*)&crc)[0];
//printf("CRC %x (A %d)\n",crc,A);
//printf("a0 %d a1 %d a2 %d\n", a[A>>3], a[1+(A>>3)], a[2+(A>>3)]);
harq_process->B = A+24;
harq_process->B = A+24;
memcpy(harq_process->b,harq_process->a,(A/8)+4);
AssertFatal((A/8)+4 <= MAX_NR_ULSCH_PAYLOAD_BYTES,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,MAX_NR_ULSCH_PAYLOAD_BYTES);
memcpy(harq_process->b,harq_process->a,(A/8)+4);
}
else {
// Add 16-bit crc (polynomial A) to payload
crc = crc16(harq_process->a,A)>>16;
harq_process->a[A>>3] = ((uint8_t*)&crc)[1];
harq_process->a[1+(A>>3)] = ((uint8_t*)&crc)[0];
//printf("CRC %x (A %d)\n",crc,A);
//printf("a0 %d a1 %d \n", a[A>>3], a[1+(A>>3)]);
harq_process->B = A+16;
AssertFatal((A/8)+3 <= MAX_NR_ULSCH_PAYLOAD_BYTES,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,MAX_NR_ULSCH_PAYLOAD_BYTES);
memcpy(harq_process->b,harq_process->a,(A/8)+3); // using 3 bytes to mimic the case of 24 bit crc
}
///////////
///////////////////////////////////////////////////////////////////////////
@@ -353,8 +393,11 @@ opp_enabled=0;
printf("%d \n", harq_process->d[0][cnt]);
}
printf("\n");*/
encoder_implemparams_t impp;
impp.n_segments=harq_process->C;
impp.macro_num=0;
ldpc_encoder_optim_8seg(harq_process->c,harq_process->d,*pz,Kb,Kr,BG,harq_process->C,NULL,NULL,NULL,NULL);
nrLDPC_encoder(harq_process->c,harq_process->d,*pz,Kb,Kr,BG,&impp);
//stop_meas(te_stats);
//printf("end ldpc encoder -- output\n");
@@ -405,6 +448,8 @@ opp_enabled=0;
harq_process->d[r],
harq_process->e+r_offset,
harq_process->C,
F,
Kr-F-2*(*pz),
harq_process->rvidx,
E);
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+99 -47
View File
@@ -31,6 +31,7 @@
*/
#include <stdint.h>
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/MODULATION/nr_modulation.h"
@@ -105,27 +106,28 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
int32_t **txdataF;
uint16_t start_sc, start_rb;
int8_t Wf[2], Wt[2], l_prime[2], delta;
uint16_t n_dmrs, code_rate, number_dmrs_symbols;
uint16_t n_dmrs, code_rate, number_dmrs_symbols, k;
uint8_t dmrs_type;
uint8_t mapping_type;
int ap, start_symbol, Nid_cell, i;
int sample_offsetF, N_RE_prime, N_PRB_oh;
uint16_t n_rnti;
uint8_t data_existing =0;
uint8_t L_ptrs, K_ptrs; // PTRS parameters
uint16_t beta_ptrs; // PTRS parameter related to power control
NR_UE_ULSCH_t *ulsch_ue;
NR_UL_UE_HARQ_t *harq_process_ul_ue;
NR_DL_FRAME_PARMS *frame_parms = &UE->frame_parms;
NR_UE_PUSCH *pusch_ue = UE->pusch_vars[thread_id][gNB_id];
uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES];
ptrs_UplinkConfig_t *ptrs_Uplink_Config = &UE->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig;
num_of_codewords = 1; // tmp assumption
n_rnti = 0x1234;
Nid_cell = 0;
N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
number_dmrs_symbols = 0;
mapping_type = UE->pusch_config.pusch_TimeDomainResourceAllocation[0]->mappingType;
uint8_t mapping_type = UE->pusch_config.pusch_TimeDomainResourceAllocation[0]->mappingType;
for (cwd_index = 0;cwd_index < num_of_codewords; cwd_index++) {
@@ -135,23 +137,23 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
start_symbol = harq_process_ul_ue->start_symbol;
for (i = start_symbol; i < start_symbol + harq_process_ul_ue->number_of_symbols; i++)
number_dmrs_symbols += is_dmrs_symbol(i,
number_dmrs_symbols += is_dmrs_symbol((mapping_type)?i-start_symbol:i,
0,
0,
0,
0,
0,
harq_process_ul_ue->number_of_symbols,
&UE->dmrs_UplinkConfig,
mapping_type,
UE->pusch_config.dmrs_UplinkConfig.pusch_dmrs_type,
frame_parms->ofdm_symbol_size);
ulsch_ue->length_dmrs = UE->dmrs_UplinkConfig.pusch_maxLength;
ulsch_ue->length_dmrs = number_dmrs_symbols; // pusch.MaxLenght is redundant here as number_dmrs_symbols
// contains all dmrs symbols even for double symbol dmrs
ulsch_ue->rnti = n_rnti;
ulsch_ue->Nid_cell = Nid_cell;
ulsch_ue->nb_re_dmrs = ((UE->dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)?6:4)*number_dmrs_symbols;
ulsch_ue->nb_re_dmrs = ((UE->pusch_config.dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)?6:4);
N_RE_prime = NR_NB_SC_PER_RB*harq_process_ul_ue->number_of_symbols - ulsch_ue->nb_re_dmrs - N_PRB_oh;
N_RE_prime = NR_NB_SC_PER_RB*harq_process_ul_ue->number_of_symbols - ulsch_ue->nb_re_dmrs*number_dmrs_symbols - N_PRB_oh;
harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*harq_process_ul_ue->nb_rb*num_of_codewords;
@@ -172,6 +174,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
// to be removed later when MAC is ready
if (harq_process_ul_ue != NULL){
data_existing = 0;
if (IS_SOFTMODEM_NOS1){
data_existing = nr_ue_get_sdu(UE->Mod_id, UE->CC_id, frame,
@@ -189,31 +192,22 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
printf("\n");
#endif
}
//Random traffic to be transmitted if there is no IP traffic available for this Tx opportunity
else{
//Use zeros for the header bytes in noS1 mode, in order to make sure that the LCID is not valid
//and block this traffic from being forwarded to the upper layers at the gNB
uint16_t payload_offset = 5;
LOG_D(PHY, "Random data to be tranmsitted: \n");
//Give the header bytes some dummy value in order to block the random packet at the MAC layer of the receiver
for (i = 0; i<payload_offset; i++)
harq_process_ul_ue->a[i] = 0;
}
//Random traffic to be transmitted if there is no IP traffic available for this Tx opportunity
if (!IS_SOFTMODEM_NOS1 || !data_existing) {
//Use zeros for the header bytes in noS1 mode, in order to make sure that the LCID is not valid
//and block this traffic from being forwarded to the upper layers at the gNB
uint16_t payload_offset = 5;
LOG_D(PHY, "Random data to be tranmsitted: \n");
//Give the header bytes some dummy value in order to block the random packet at the MAC layer of the receiver
for (i = 0; i<payload_offset; i++)
harq_process_ul_ue->a[i] = 0;
for (i = payload_offset; i < harq_process_ul_ue->TBS / 8; i++) {
harq_process_ul_ue->a[i] = (unsigned char) rand();
//printf(" input encoder a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
}
}
}
//else if(uplink_counter == 0){ //if(!IS_SOFTMODEM_NOS1){
else{
LOG_D(PHY, "Random data to be tranmsitted: \n");
for (i = 0; i < harq_process_ul_ue->TBS / 8; i++) {
harq_process_ul_ue->a[i] = (unsigned char) rand();
//printf(" input encoder a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
}
//uplink_counter++;
for (i = payload_offset; i < harq_process_ul_ue->TBS / 8; i++) {
harq_process_ul_ue->a[i] = (unsigned char) rand();
//printf(" input encoder a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
}
}
} else {
LOG_E(PHY, "[phy_procedures_nrUE_TX] harq_process_ul_ue is NULL !!\n");
return;
@@ -275,12 +269,41 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////DMRS Modulation/////////////////////////
///////////
pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
n_dmrs = (harq_process_ul_ue->nb_rb*ulsch_ue->nb_re_dmrs);
n_dmrs = (harq_process_ul_ue->nb_rb*ulsch_ue->nb_re_dmrs*ulsch_ue->length_dmrs);
int16_t mod_dmrs[n_dmrs<<1];
dmrs_type = UE->dmrs_UplinkConfig.pusch_dmrs_type;
dmrs_type = UE->pusch_config.dmrs_UplinkConfig.pusch_dmrs_type;
///////////
////////////////////////////////////////////////////////////////////////
/////////////////////////PTRS parameters' initialization/////////////////////////
///////////
int16_t mod_ptrs[(harq_process_ul_ue->nb_rb/2)*(NR_SYMBOLS_PER_SLOT-1)*2]; // assume maximum number of PTRS per pusch allocation
K_ptrs = 0; // just to avoid a warning
if (UE->ptrs_configured == 1) {
K_ptrs = get_K_ptrs(ptrs_Uplink_Config, harq_process_ul_ue->nb_rb);
L_ptrs = get_L_ptrs(ptrs_Uplink_Config, harq_process_ul_ue->mcs);
beta_ptrs = 1; // temp value until power control is implemented
ulsch_ue->ptrs_symbols = 0;
set_ptrs_symb_idx(&ulsch_ue->ptrs_symbols,
harq_process_ul_ue->number_of_symbols,
start_symbol,
dmrs_type,
L_ptrs,
ulsch_ue->length_dmrs,
frame_parms->ofdm_symbol_size);
}
///////////
////////////////////////////////////////////////////////////////////////////////
/////////////////////////ULSCH layer mapping/////////////////////////
///////////
@@ -306,15 +329,14 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
for (l = start_symbol; l < start_symbol + harq_process_ul_ue->number_of_symbols; l++) {
is_dmrs = is_dmrs_symbol(l,
is_dmrs = is_dmrs_symbol((mapping_type)?l-start_symbol:l,
0,
0,
0,
0,
0,
harq_process_ul_ue->number_of_symbols,
&UE->dmrs_UplinkConfig,
mapping_type,
dmrs_type,
frame_parms->ofdm_symbol_size);
if (is_dmrs == 1)
@@ -357,35 +379,54 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t k_prime=0;
uint8_t is_dmrs;
uint16_t m=0, n=0, dmrs_idx=0, k=0;
uint8_t is_dmrs, is_ptrs;
uint8_t l_ref;
uint16_t m=0, n=0, dmrs_idx=0, ptrs_idx = 0;
for (l=start_symbol; l<start_symbol+harq_process_ul_ue->number_of_symbols; l++) {
k = start_sc;
n = 0;
dmrs_idx = 0;
l_ref = (mapping_type) ? l-start_symbol : l;
for (i=0; i<harq_process_ul_ue->nb_rb*NR_NB_SC_PER_RB; i++) {
sample_offsetF = l*frame_parms->ofdm_symbol_size + k;
is_dmrs = 0;
is_ptrs = 0;
is_dmrs = is_dmrs_symbol(l,
is_dmrs = is_dmrs_symbol(l_ref,
k,
start_sc,
k_prime,
n,
delta,
harq_process_ul_ue->number_of_symbols,
&UE->dmrs_UplinkConfig,
mapping_type,
dmrs_type,
frame_parms->ofdm_symbol_size);
if (UE->ptrs_configured == 1){
is_ptrs = is_ptrs_symbol(l,
k,
ulsch_ue->rnti,
harq_process_ul_ue->nb_rb,
harq_process_ul_ue->number_of_symbols,
ap,
K_ptrs,
ulsch_ue->ptrs_symbols,
start_sc,
frame_parms->ofdm_symbol_size,
UE->pusch_config.dmrs_UplinkConfig.pusch_dmrs_type,
ptrs_Uplink_Config->resourceElementOffset);
}
if (is_dmrs == 1) {
nr_modulation(pusch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
if (k == start_sc){
nr_modulation(pusch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
}
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
@@ -401,9 +442,19 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
k_prime++;
k_prime&=1;
n+=(k_prime)?0:1;
}
else {
} else if (is_ptrs == 1) {
if (k == start_sc){
nr_modulation(pusch_dmrs[l][0], harq_process_ul_ue->nb_rb/2, DMRS_MOD_ORDER, mod_ptrs);
}
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (beta_ptrs*AMP*mod_ptrs[ptrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (beta_ptrs*AMP*mod_ptrs[(ptrs_idx<<1) + 1]) >> 15;
ptrs_idx++;
} else {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = ((int16_t *) ulsch_ue->y)[m<<1];
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = ((int16_t *) ulsch_ue->y)[(m<<1) + 1];
@@ -454,7 +505,7 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
timing_advance = 0;
#endif
tx_offset = slot*frame_parms->samples_per_slot - timing_advance;
tx_offset = frame_parms->get_samples_slot_timestamp(slot,frame_parms,0) - timing_advance;
if (tx_offset < 0)
tx_offset += frame_parms->samples_per_frame;
@@ -484,6 +535,7 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
frame_parms);
}
}
///////////
////////////////////////////////////////////////////
return 0;
openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
+3 -3
View File
@@ -880,7 +880,7 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
/* perform correlation of rx data and pss sequence ie it is a dot product */
result = dot_product64((short*)primary_synchro_time_nr[pss_index],
(short*) &(rxdata[ar][n])+(is*frame_parms->samples_per_frame),
(short*) &(rxdata[ar][n+is*frame_parms->samples_per_frame]),
frame_parms->ofdm_symbol_size,
shift);
pss_corr_ue[pss_index][n] += abs64(result);
@@ -914,13 +914,13 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
int64_t result1,result2;
// Computing cross-correlation at peak on half the symbol size for first half of data
result1 = dot_product64((short*)primary_synchro_time_nr[pss_source],
(short*) &(rxdata[0][peak_position])+(is*frame_parms->samples_per_frame),
(short*) &(rxdata[0][peak_position+is*frame_parms->samples_per_frame]),
frame_parms->ofdm_symbol_size>>1,
shift);
// Computing cross-correlation at peak on half the symbol size for data shifted by half symbol size
// as it is real and complex it is necessary to shift by a value equal to symbol size to obtain such shift
result2 = dot_product64((short*)primary_synchro_time_nr[pss_source]+(frame_parms->ofdm_symbol_size),
(short*) &(rxdata[0][peak_position])+(frame_parms->ofdm_symbol_size+(is*frame_parms->samples_per_frame)),
(short*) &(rxdata[0][peak_position+is*frame_parms->samples_per_frame])+frame_parms->ofdm_symbol_size,
frame_parms->ofdm_symbol_size>>1,
shift);
openair1/PHY/NR_UE_TRANSPORT/sss_nr.c
+1 -1
View File
@@ -341,7 +341,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
pss_rxF_ext = &pss_ext[aarx][0];
sss_rxF_ext = &sss_ext[aarx][0];
unsigned int k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56;
unsigned int k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56;
if (k>= frame_parms->ofdm_symbol_size) k-=frame_parms->ofdm_symbol_size;
for (int i=0; i < LENGTH_PSS_NR; i++) {
openair1/PHY/TOOLS/Makefile
+5 -3
View File
@@ -2,13 +2,15 @@ lte_dfts_sse4: lte_dfts.c
gcc-7 -O3 -std=gnu99 -msse4.1 -o lte_dfts_sse4 lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
lte_dfts_avx2: lte_dfts.c
gcc -O2 -std=gnu99 -mavx2 -g -ggdb -o lte_dfts_avx2 lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
gcc -O2 -std=gnu99 -mavx2 -g -ggdb -o lte_dfts_avx2 lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c $$OPENAIR_HOME/common/utils/backtrace.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
lte_dfts_avx2.s: lte_dfts.c
gcc -O2 -std=gnu99 -mavx2 -S lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
gcc -O2 -std=gnu99 -mavx2 -S lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c $$OPENAIR_HOME/common/utils/backtrace.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
lte_dfts_sse4.s: lte_dfts.c
gcc -O2 -std=gnu99 -msse4.1 -S lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm # -DD256STATS #-DD64STATS
gcc -O2 -std=gnu99 -msse4.1 -S lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c $$OPENAIR_HOME/common/utils/backtrace.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
dft_cycles_avx2: lte_dfts_avx2
./lte_dfts_avx2 | egrep cycles
openair1/PHY/TOOLS/lte_dfts.c
+93 -21
View File
@@ -2573,7 +2573,7 @@ const static int16_t tw64c[96] __attribute__((aligned(32))) = {
#define simd256_q15_t __m256i
#define shiftright_int16_simd256(a,shift) _mm256_srai_epi16(a,shift)
#define set1_int16_simd256(a) _mm256_set1_epi16(a);
#define mulhi_int16_simd256(a,b) _mm256_slli_epi16(_mm256_mulhi_epi16(a,b),1);
#define mulhi_int16_simd256(a,b) _mm256_mulhrs_epi16(a,b); //_mm256_slli_epi16(_mm256_mulhi_epi16(a,b),1);
#endif
#elif defined(__arm__)
@@ -4836,22 +4836,22 @@ void idft4096(int16_t *x,int16_t *y,int scale)
if (scale>0) {
for (i=0; i<64; i++) {
y128[0] = shiftright_int16(y128[0],1);
y128[1] = shiftright_int16(y128[1],1);
y128[2] = shiftright_int16(y128[2],1);
y128[3] = shiftright_int16(y128[3],1);
y128[4] = shiftright_int16(y128[4],1);
y128[5] = shiftright_int16(y128[5],1);
y128[6] = shiftright_int16(y128[6],1);
y128[7] = shiftright_int16(y128[7],1);
y128[8] = shiftright_int16(y128[8],1);
y128[9] = shiftright_int16(y128[9],1);
y128[10] = shiftright_int16(y128[10],1);
y128[11] = shiftright_int16(y128[11],1);
y128[12] = shiftright_int16(y128[12],1);
y128[13] = shiftright_int16(y128[13],1);
y128[14] = shiftright_int16(y128[14],1);
y128[15] = shiftright_int16(y128[15],1);
y128[0] = shiftright_int16(y128[0],scale);
y128[1] = shiftright_int16(y128[1],scale);
y128[2] = shiftright_int16(y128[2],scale);
y128[3] = shiftright_int16(y128[3],scale);
y128[4] = shiftright_int16(y128[4],scale);
y128[5] = shiftright_int16(y128[5],scale);
y128[6] = shiftright_int16(y128[6],scale);
y128[7] = shiftright_int16(y128[7],scale);
y128[8] = shiftright_int16(y128[8],scale);
y128[9] = shiftright_int16(y128[9],scale);
y128[10] = shiftright_int16(y128[10],scale);
y128[11] = shiftright_int16(y128[11],scale);
y128[12] = shiftright_int16(y128[12],scale);
y128[13] = shiftright_int16(y128[13],scale);
y128[14] = shiftright_int16(y128[14],scale);
y128[15] = shiftright_int16(y128[15],scale);
y128+=16;
}
@@ -5692,6 +5692,18 @@ void dft6144(int16_t *input, int16_t *output,int scale)
}
int16_t twa9216[6144] __attribute__((aligned(32)));
int16_t twb9216[6144] __attribute__((aligned(32)));
// 3072 x 3
void dft9216(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
void idft9216(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
int16_t twa12288[8192] __attribute__((aligned(32)));
int16_t twb12288[8192] __attribute__((aligned(32)));
@@ -6042,6 +6054,59 @@ void idft24576(int16_t *input, int16_t *output,int scale)
}
}
int16_t twa36864[24576] __attribute__((aligned(32)));
int16_t twb36884[24576] __attribute__((aligned(32)));
// 12288 x 3
void dft36864(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
void idft36864(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
int16_t twa49152[32768] __attribute__((aligned(32)));
int16_t twb49152[32768] __attribute__((aligned(32)));
// 16384 x 3
void dft49152(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
void idft49152(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
int16_t twa73728[49152] __attribute__((aligned(32)));
int16_t twb73728[49152] __attribute__((aligned(32)));
// 24576 x 3
void dft73728(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
void idft73728(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
int16_t twa98304[49152] __attribute__((aligned(32)));
int16_t twb98304[49152] __attribute__((aligned(32)));
// 32768 x 3
void dft98304(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
void idft98304(int16_t *input, int16_t *output,int scale) {
AssertFatal(1==0,"Need to do this ..\n");
}
/// THIS SECTION IS FOR ALL PUSCH DFTS (i.e. radix 2^a * 3^b * 4^c * 5^d)
/// They use twiddles for 4-way parallel DFTS (i.e. 4 DFTS with interleaved input/output)
@@ -8526,6 +8591,8 @@ void dft1200(int16_t *x,int16_t *y,unsigned char scale_flag)
}
//#define round trunc
void init_rad4(int N,int16_t *tw) {
int16_t *twa = tw;
@@ -8695,6 +8762,8 @@ void init_dfts(void)
init_rad4_rep(1200,twa1200,twb1200,twc1200);
}
//#undef round
#ifdef MR_MAIN
#include <string.h>
#include <stdio.h>
@@ -8862,9 +8931,9 @@ int main(int argc, char**argv)
time_stats_t ts;
#ifdef __AVX2__
simd256_q15_t x[4096],y[4096],tw0,tw1,tw2,tw3;
simd256_q15_t x[4096],x2[4096],y[4096],tw0,tw1,tw2,tw3;
#else
simd_q15_t x[8192],y[8192],tw0,tw1,tw2,tw3;
simd_q15_t x[8192],x2[8192],y[8192],tw0,tw1,tw2,tw3;
#endif
int i;
simd_q15_t *x128=(simd_q15_t*)x,*y128=(simd_q15_t*)y;
@@ -9351,8 +9420,8 @@ int main(int argc, char**argv)
write_output("x3072.m","x3072",x,3072,1,1);
memset((void*)x,0,2048*sizeof(int32_t));
for (i=2;i<2402;i++) {
memset((void*)x,0,4096*sizeof(int32_t));
for (i=0;i<2400;i++) {
if ((taus() & 1)==0)
((int16_t*)x)[i] = 364;
else
@@ -9376,6 +9445,9 @@ int main(int argc, char**argv)
LOG_M("y4096.m","y4096",y,4096,1,1);
LOG_M("x4096.m","x4096",x,4096,1,1);
dft4096((int16_t *)y,(int16_t *)x2,1);
LOG_M("x4096_2.m","x4096_2",x2,4096,1,1);
// NR 160Mhz, 434 PRB, 3/4 sampling
memset((void*)x, 0, 6144*sizeof(int32_t));
for (i=2;i<5010;i++) {
openair1/PHY/TOOLS/nr_phy_scope.c
+60 -47
View File
@@ -152,36 +152,36 @@ FD_phy_scope_gnb *create_phy_scope_gnb( void )
void phy_scope_gNB(FD_phy_scope_gnb *form,
PHY_VARS_gNB *phy_vars_gnb,
RU_t *phy_vars_ru,
int UE_id)
{
int i,i2,arx,atx,ind,k;
int i, arx; //int i,i2,arx,atx,ind,k;
NR_DL_FRAME_PARMS *frame_parms = &phy_vars_gnb->frame_parms;
int nsymb_ce = 12*frame_parms->N_RB_UL*frame_parms->symbols_per_tti;
uint8_t nb_antennas_rx = frame_parms->nb_antennas_rx;
uint8_t nb_antennas_tx = 1; // frame_parms->nb_antennas_tx; // in LTE Rel. 8 and 9 only a single transmit antenna is assumed at the UE
int16_t **rxsig_t;
int16_t **chest_t=NULL;
int16_t **chest_f=NULL;
int16_t *pusch_llr=NULL;
int32_t *pusch_comp=NULL;
int32_t *pucch1_comp=NULL;
int32_t *pucch1_thres=NULL;
int32_t *pucch1ab_comp=NULL;
float Re,Im,ymax;
int16_t **rxsig_t, **rxsig_f;
// int16_t **chest_t=NULL;
// int16_t **chest_f=NULL;
// int16_t *pusch_llr=NULL;
// int32_t *pusch_comp=NULL;
// int32_t *pucch1_comp=NULL;
// int32_t *pucch1_thres=NULL;
// int32_t *pucch1ab_comp=NULL;
// float Re,Im,ymax;
float *llr, *bit;
float I[nsymb_ce*2], Q[nsymb_ce*2];
float I_pucch[10240],Q_pucch[10240],A_pucch[10240],B_pucch[10240],C_pucch[10240];
float rxsig_t_dB[nb_antennas_rx][FRAME_LENGTH_COMPLEX_SAMPLES];
float chest_t_abs[nb_antennas_rx][frame_parms->ofdm_symbol_size];
float *chest_f_abs;
float time[FRAME_LENGTH_COMPLEX_SAMPLES];
float time2[2048];
float freq[nsymb_ce*nb_antennas_rx*nb_antennas_tx];
uint32_t total_dlsch_bitrate = phy_vars_gnb->total_dlsch_bitrate;
// float I[nsymb_ce*2], Q[nsymb_ce*2];
// float I_pucch[10240],Q_pucch[10240],A_pucch[10240],B_pucch[10240],C_pucch[10240];
float *rxsig_t_dB[nb_antennas_rx];
float *rxsig_f_dB[nb_antennas_rx];
float time[frame_parms->samples_per_frame];
// float freq[nsymb_ce*nb_antennas_rx*nb_antennas_tx];
// uint32_t total_dlsch_bitrate = phy_vars_gnb->total_dlsch_bitrate;
int coded_bits_per_codeword = 0;
uint8_t harq_pid; // in TDD config 3 it is sf-2, i.e., can be 0,1,2
// uint8_t harq_pid; // in TDD config 3 it is sf-2, i.e., can be 0,1,2
int Qm = 2;
/*
if (!RC.nrmac[0]->UE_list.active[UE_id])
return;
@@ -191,14 +191,18 @@ void phy_scope_gNB(FD_phy_scope_gnb *form,
//Qm = cmax(phy_vars_gnb->ulsch[UE_id][0]->harq_processes->Qm,Qm);
}
}
*/
coded_bits_per_codeword = frame_parms->N_RB_UL*12*Qm*frame_parms->symbols_per_tti;
chest_f_abs = (float*) calloc(nsymb_ce*nb_antennas_rx*nb_antennas_tx,sizeof(float));
for (arx=0; arx<nb_antennas_rx; arx++) {
rxsig_t_dB[arx] = (float*) calloc(frame_parms->samples_per_frame,sizeof(float));
rxsig_f_dB[arx] = (float*) calloc(frame_parms->samples_per_slot_wCP,sizeof(float));
}
llr = (float*) calloc(coded_bits_per_codeword,sizeof(float)); // init to zero
bit = malloc(coded_bits_per_codeword*sizeof(float));
rxsig_t = (int16_t**) phy_vars_gnb->common_vars.rxdata;
rxsig_t = (int16_t**) phy_vars_ru->common.rxdata;
rxsig_f = (int16_t**) phy_vars_ru->common.rxdataF;
//chest_t = (int16_t**) phy_vars_gnb->pusch_vars[UE_id]->drs_ch_estimates_time[eNB_id];
/* chest_t = (int16_t**) phy_vars_gnb->srs_vars[UE_id].srs_ch_estimates;
chest_f = (int16_t**) phy_vars_gnb->pusch_vars[UE_id]->drs_ch_estimates;
@@ -212,25 +216,26 @@ void phy_scope_gNB(FD_phy_scope_gnb *form,
// Received signal in time domain of receive antenna 0
if (rxsig_t != NULL) {
if (rxsig_t[0] != NULL) {
for (i=0; i<FRAME_LENGTH_COMPLEX_SAMPLES; i++) {
for (i=0; i<frame_parms->samples_per_frame; i++) {
rxsig_t_dB[0][i] = 10*log10(1.0+(float) ((rxsig_t[0][2*i])*(rxsig_t[0][2*i])+(rxsig_t[0][2*i+1])*(rxsig_t[0][2*i+1])));
time[i] = (float) i;
}
fl_set_xyplot_data(form->rxsig_t,time,rxsig_t_dB[0],FRAME_LENGTH_COMPLEX_SAMPLES,"","","");
fl_set_xyplot_data(form->rxsig_t,time,rxsig_t_dB[0],frame_parms->samples_per_frame,"","","");
}
for (arx=1; arx<nb_antennas_rx; arx++) {
if (rxsig_t[arx] != NULL) {
for (i=0; i<FRAME_LENGTH_COMPLEX_SAMPLES; i++) {
for (i=0; i<frame_parms->samples_per_frame; i++) {
rxsig_t_dB[arx][i] = 10*log10(1.0+(float) ((rxsig_t[arx][2*i])*(rxsig_t[arx][2*i])+(rxsig_t[arx][2*i+1])*(rxsig_t[arx][2*i+1])));
}
fl_add_xyplot_overlay(form->rxsig_t,arx,time,rxsig_t_dB[arx],FRAME_LENGTH_COMPLEX_SAMPLES,rx_antenna_colors[arx]);
fl_add_xyplot_overlay(form->rxsig_t,arx,time,rxsig_t_dB[arx],frame_parms->samples_per_frame,rx_antenna_colors[arx]);
}
}
}
/*
// Channel Impulse Response
if (chest_t != NULL) {
ymax = 0;
@@ -268,12 +273,22 @@ void phy_scope_gNB(FD_phy_scope_gnb *form,
// fl_get_xyplot_ybounds(form->chest_t,&ymin,&ymax);
fl_set_xyplot_ybounds(form->chest_t,0,ymax);
}
*/
// Channel Frequency Response
if (chest_f != NULL) {
ind = 0;
if (rxsig_f != NULL) {
if (rxsig_f[0] != NULL) {
for (i=0; i<frame_parms->samples_per_slot_wCP; i++) {
rxsig_f_dB[0][i] = 10*log10(1.0+(float) ((rxsig_f[0][2*i])*(rxsig_f[0][2*i])+(rxsig_f[0][2*i+1])*(rxsig_f[0][2*i+1])));
time[i] = (float) i;
}
fl_set_xyplot_data(form->chest_t,time,rxsig_f_dB[0],frame_parms->samples_per_slot_wCP,"","","");
}
}
/*
for (atx=0; atx<nb_antennas_tx; atx++) {
for (arx=0; arx<nb_antennas_rx; arx++) {
if (chest_f[(atx<<1)+arx] != NULL) {
for (k=0; k<nsymb_ce; k++) {
@@ -364,18 +379,19 @@ void phy_scope_gNB(FD_phy_scope_gnb *form,
memmove( tput_enb[UE_id], &tput_enb[UE_id][1], (TPUT_WINDOW_LENGTH-1)*sizeof(float) );
tput_time_enb[UE_id][TPUT_WINDOW_LENGTH-1] = (float) 0;
tput_enb[UE_id][TPUT_WINDOW_LENGTH-1] = ((float) total_dlsch_bitrate)/1000.0;
// tput_enb[UE_id][TPUT_WINDOW_LENGTH-1] = ((float) total_dlsch_bitrate)/1000.0;
fl_set_xyplot_data(form->pusch_tput,tput_time_enb[UE_id],tput_enb[UE_id],TPUT_WINDOW_LENGTH,"","","");
// fl_get_xyplot_ybounds(form->pusch_tput,&ymin,&ymax);
// fl_set_xyplot_ybounds(form->pusch_tput,0,ymax);
*/
fl_check_forms();
free(llr);
free(bit);
free(chest_f_abs);
}
FD_phy_scope_nrue *create_phy_scope_nrue( void )
@@ -492,7 +508,7 @@ void phy_scope_nrUE(FD_phy_scope_nrue *form,
//int nsymb_ce = frame_parms->ofdm_symbol_size;//*frame_parms->symbols_per_tti;
int samples_per_frame = frame_parms->samples_per_frame;
uint8_t nb_antennas_rx = frame_parms->nb_antennas_rx;
uint8_t nb_antennas_tx = frame_parms->nb_antenna_ports_eNB;
uint8_t nb_antennas_tx = frame_parms->nb_antenna_ports_gNB;
int16_t **rxsig_t;
float **rxsig_t_dB;
float *time;
@@ -863,11 +879,10 @@ typedef struct {
// current status is that every UE has a DL scope for a SINGLE eNB (gnb_id=0)
// at eNB 0, an UL scope for every UE
//FD_phy_scope_gnb *form_gnb[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
static FD_phy_scope_gnb *form_gnb[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
FD_phy_scope_gnb *form_gnb[NUMBER_OF_UE_MAX];
//FD_stats_form *form_stats=NULL,*form_stats_l2=NULL;
//char title[255];
unsigned char scope_enb_num_ue = 2;
unsigned char scope_enb_num_ue = 1;
//static pthread_t forms_thread; //xforms
@@ -896,7 +911,7 @@ void reset_stats_gNB(FL_OBJECT *button,
static void *scope_thread_gNB(void *arg) {
int UE_id, CC_id;
int UE_id;
int ue_cnt=0;
//# ifdef ENABLE_XFORMS_WRITE_STATS
// FILE *gNB_stats = fopen("gNB_stats.txt", "w");
@@ -906,13 +921,11 @@ static void *scope_thread_gNB(void *arg) {
ue_cnt=0;
for(UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
for(CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
if ((ue_cnt<scope_enb_num_ue)) {
//this function needs to be written
phy_scope_gNB(form_gnb[CC_id][ue_cnt], RC.gNB[0][CC_id], UE_id);
phy_scope_gNB(form_gnb[ue_cnt], RC.gNB[0], RC.ru[0], UE_id);
ue_cnt++;
}
}
}
sleep(1);
}
@@ -956,17 +969,17 @@ void startScope(scopeParms_t * p) {
FD_stats_form *form_stats=NULL,*form_stats_l2=NULL;
char title[255];
fl_initialize (p->argc, p->argv, NULL, 0, 0);
/*
form_stats_l2 = create_form_stats_form();
fl_show_form (form_stats_l2->stats_form, FL_PLACE_HOTSPOT, FL_FULLBORDER, "l2 stats");
form_stats = create_form_stats_form();
fl_show_form (form_stats->stats_form, FL_PLACE_HOTSPOT, FL_FULLBORDER, "stats");
*/
for(int UE_id=0; UE_id<scope_enb_num_ue; UE_id++) {
for(int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
form_gnb[CC_id][UE_id] = create_phy_scope_gnb();
sprintf (title, "LTE UL SCOPE eNB for CC_id %d, UE %d",CC_id,UE_id);
fl_show_form (form_gnb[CC_id][UE_id]->phy_scope_gnb, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
} // CC_id
form_gnb[UE_id] = create_phy_scope_gnb();
sprintf (title, "LTE UL SCOPE eNB for UE %d",UE_id);
fl_show_form (form_gnb[UE_id]->phy_scope_gnb, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
} // UE_id
pthread_t forms_thread;
openair1/PHY/TOOLS/nr_phy_scope.h
+1
View File
@@ -78,6 +78,7 @@ FD_phy_scope_nrue * create_phy_scope_nrue( void );
void phy_scope_gNB(FD_phy_scope_gnb *form,
PHY_VARS_gNB *phy_vars_gnb,
RU_t *phy_vars_ru,
int UE_id);
openair1/PHY/TOOLS/tools_defs.h
+15 -2
View File
@@ -36,8 +36,6 @@ extern "C" {
#include <stdint.h>
#include "PHY/sse_intrin.h"
#define CEILIDIV(a,b) ((a+b-1)/b)
#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
struct complex {
double x;
@@ -205,6 +203,21 @@ void dft18432(int16_t *sigF,int16_t *sig,int scale);
void dft24576(int16_t *sigF,int16_t *sig,int scale);
void dft49152(int16_t *sigF,int16_t *sig,int scale);
void idft49152(int16_t *sigF,int16_t *sig,int scale);
void dft9216(int16_t *sigF,int16_t *sig,int scale);
void idft9216(int16_t *sigF,int16_t *sig,int scale);
void dft36864(int16_t *sigF,int16_t *sig,int scale);
void idft36864(int16_t *sigF,int16_t *sig,int scale);
void dft98304(int16_t *sigF,int16_t *sig,int scale);
void idft98304(int16_t *sigF,int16_t *sig,int scale);
void dft73728(int16_t *sigF,int16_t *sig,int scale);
void idft73728(int16_t *sigF,int16_t *sig,int scale);
/*!\fn int32_t rotate_cpx_vector(int16_t *x,int16_t *alpha,int16_t *y,uint32_t N,uint16_t output_shift)
This function performs componentwise multiplication of a vector with a complex scalar.
openair1/PHY/defs_RU.h
+4
View File
@@ -468,6 +468,8 @@ typedef struct RU_t_s {
int nb_rx;
/// number of TX paths on device
int nb_tx;
/// number of logical antennas at TX beamformer input
int nb_log_antennas;
/// maximum PDSCH RS EPRE
int max_pdschReferenceSignalPower;
/// maximum RX gain
@@ -604,6 +606,8 @@ typedef struct RU_t_s {
int wakeup_L1_sleeptime;
/// maximum number of sleeps
int wakeup_L1_sleep_cnt_max;
/// DL IF frequency in Hz
uint64_t if_frequency;
} RU_t;
openair1/PHY/defs_common.h
+5
View File
@@ -85,6 +85,7 @@
#define LTE_CE_OFFSET LTE_CE_FILTER_LENGTH
#define TX_RX_SWITCH_SYMBOL (NUMBER_OF_SYMBOLS_PER_FRAME>>1)
#define PBCH_PDU_SIZE 3 //bytes
#define NR_NUMBER_OF_SYMBOLS_PER_SLOT 14
#define PRACH_SYMBOL 3 //position of the UL PSS wrt 2nd slot of special subframe
@@ -635,6 +636,10 @@ typedef struct LTE_DL_FRAME_PARMS {
uint16_t first_carrier_offset_khz_1dot25;
/// Number of samples in a subframe
uint32_t samples_per_tti;
/// Number of samples in a subframe
uint32_t samples_per_subframe;
/// Number of samples in a slot
uint32_t samples_per_slot;
/// Number of OFDM/SC-FDMA symbols in one subframe (to be modified to account for potential different in UL/DL)
uint16_t symbols_per_tti;
/// Number of OFDM symbols in DL portion of S-subframe
openair1/PHY/defs_gNB.h
+64 -147
View File
@@ -40,7 +40,7 @@
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/impl_defs_top.h"
#include "PHY/defs_common.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.h"
#include "PHY/CODING/nrLDPC_extern.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
#define MAX_NUM_RU_PER_gNB MAX_NUM_RU_PER_eNB
@@ -61,29 +61,6 @@ typedef struct {
} NR_PBCH_parms_t;
typedef struct {
/// Length of DCI payload in bits
uint16_t size;
/// Aggregation level
uint8_t L;
/// HARQ PID
uint8_t harq_pid;
/// PDCCH parameters
nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params;
/// CCE list
nr_cce_t cce_list[NR_MAX_PDCCH_AGG_LEVEL];
/// DCI pdu
uint64_t dci_pdu[2];
} NR_gNB_DCI_ALLOC_t;
typedef struct {
uint8_t num_dci;
uint8_t num_pdsch_rnti;
NR_gNB_DCI_ALLOC_t dci_alloc[256];
} NR_gNB_PDCCH;
typedef enum {
NR_SCH_IDLE,
NR_ACTIVE,
@@ -94,7 +71,7 @@ typedef enum {
typedef struct {
/// Nfapi DLSCH PDU
nfapi_nr_dl_config_dlsch_pdu dlsch_pdu;
nfapi_nr_dl_tti_pdsch_pdu pdsch_pdu;
/// pointer to pdu from MAC interface (this is "a" in 36.212)
uint8_t *pdu;
/// The payload + CRC size in bits, "B" from 36-212
@@ -112,11 +89,11 @@ typedef struct {
/// MIMO mode for this DLSCH
MIMO_mode_t mimo_mode;
/// Concatenated sequences
uint8_t e[MAX_NUM_NR_CHANNEL_BITS] __attribute__((aligned(32)));
uint8_t *e;
/// LDPC-code outputs
uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
/// Interleaver outputs
uint8_t f[MAX_NUM_NR_CHANNEL_BITS] __attribute__((aligned(32)));
uint8_t *f;
/// Number of code segments
uint32_t C;
/// Number of bits in "small" code segments
@@ -171,10 +148,21 @@ typedef struct {
int16_t sqrt_rho_b;
} NR_gNB_DLSCH_t;
typedef struct {
/// \brief ?.
/// first index: ? [0..1023] (hard coded)
int16_t *prachF;
/// \brief ?.
/// second index: rx antenna [0..63] (hard coded) \note Hard coded array size indexed by \c nb_antennas_rx.
/// third index: frequency-domain sample [0..ofdm_symbol_size*12[
int16_t **rxsigF;
/// \brief local buffer to compute prach_ifft
int32_t *prach_ifft;
} NR_gNB_PRACH;
typedef struct {
/// Nfapi ULSCH PDU
nfapi_nr_ul_config_ulsch_pdu ulsch_pdu;
nfapi_nr_pusch_pdu_t ulsch_pdu;
/// Frame where current HARQ round was sent
uint32_t frame;
/// Subframe where current HARQ round was sent
@@ -285,7 +273,7 @@ typedef struct {
/// Temporary h sequence to flag PUSCH_x/PUSCH_y symbols which are not scrambled
uint8_t h[MAX_NUM_CHANNEL_BITS];
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
int16_t *w[MAX_NUM_NR_ULSCH_SEGMENTS];
//////////////////////////////////////////////////////////////
} NR_UL_gNB_HARQ_t;
@@ -375,6 +363,14 @@ typedef struct {
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..12*N_RB_UL*frame_parms->symbols_per_tti[
int32_t **ul_ch_estimates_ext;
/// \brief Hold the PTRS phase estimates in frequency domain.
/// - first index: rx antenna id [0..nb_antennas_rx[
/// - second index: ? [0..12*N_RB_UL*frame_parms->symbols_per_tti[
int32_t **ul_ch_ptrs_estimates;
/// \brief Uplink phase estimates extracted in PRBS.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..12*N_RB_UL*frame_parms->symbols_per_tti[
int32_t **ul_ch_ptrs_estimates_ext;
/// \brief Holds the compensated signal.
/// - first index: rx antenna id [0..nb_antennas_rx[
/// - second index: ? [0..12*N_RB_UL*frame_parms->symbols_per_tti[
@@ -414,8 +410,16 @@ typedef struct {
/// \brief llr values.
/// - first index: ? [0..1179743] (hard coded)
int16_t *llr;
// DMRS symbol index, to be updated every DMRS symbol within a slot.
/// DMRS symbol index, to be updated every DMRS symbol within a slot.
uint8_t dmrs_symbol;
// PTRS symbol index, to be updated every PTRS symbol within a slot.
uint8_t ptrs_symbol_index;
/// bit mask of PT-RS ofdm symbol indicies
uint16_t ptrs_symbols;
// PTRS subcarriers per OFDM symbol
uint16_t ptrs_sc_per_ofdm_symbol;
/// flag to verify if channel level computation is done
uint8_t cl_done;
} NR_gNB_PUSCH;
@@ -612,7 +616,7 @@ typedef struct PHY_VARS_gNB_s {
int rx_total_gain_dB;
int (*nr_start_if)(struct RU_t_s *ru, struct PHY_VARS_gNB_s *gNB);
uint8_t local_flag;
nfapi_nr_config_request_t gNB_config;
nfapi_nr_config_request_scf_t gNB_config;
NR_DL_FRAME_PARMS frame_parms;
PHY_MEASUREMENTS_gNB measurements;
NR_IF_Module_t *if_inst;
@@ -637,21 +641,21 @@ typedef struct PHY_VARS_gNB_s {
//Sched_Rsp_t Sched_INFO;
nfapi_nr_ul_tti_request_t UL_tti_req;
NR_gNB_PDCCH pdcch_vars;
NR_gNB_PBCH pbch;
nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu;
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu;
nfapi_nr_dl_tti_ssb_pdu ssb_pdu;
NR_gNB_COMMON common_vars;
NR_gNB_PUSCH *pusch_vars[NUMBER_OF_UE_MAX];
int num_pdsch_rnti;
NR_gNB_PBCH pbch;
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
NR_gNB_COMMON common_vars;
NR_gNB_PRACH prach_vars;
NR_gNB_PUSCH *pusch_vars[NUMBER_OF_NR_ULSCH_MAX];
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; // Nusers times two spatial streams
NR_gNB_ULSCH_t *ulsch[NUMBER_OF_NR_ULSCH_MAX][2]; // [Nusers times][2 codewords]
NR_gNB_DLSCH_t *dlsch_SI,*dlsch_ra,*dlsch_p;
NR_gNB_DLSCH_t *dlsch_PCH;
/*
LTE_eNB_UE_stats UE_stats[NUMBER_OF_UE_MAX];
LTE_eNB_UE_stats *UE_stats_ptr[NUMBER_OF_UE_MAX];
*/
uint8_t pbch_configured;
uint8_t pbch_pdu[4]; //PBCH_PDU_SIZE
char gNB_generate_rar;
/// NR synchronization sequences
@@ -669,12 +673,15 @@ typedef struct PHY_VARS_gNB_s {
/// PDSCH DMRS sequence
uint32_t ****nr_gold_pdsch_dmrs;
/// PUSCH DMRS
uint32_t nr_gold_pusch[2][20][2][NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD];
uint32_t ****nr_gold_pusch_dmrs;
/// Indicator set to 0 after first SR
uint8_t first_sr[NUMBER_OF_UE_MAX];
uint8_t first_sr[NUMBER_OF_NR_SR_MAX];
/// PRACH root sequence
uint32_t X_u[64][839];
uint32_t max_peak_val;
@@ -685,7 +692,6 @@ typedef struct PHY_VARS_gNB_s {
/// N0 (used for abstraction)
double N0;
unsigned char first_run_timing_advance[NUMBER_OF_UE_MAX];
unsigned char first_run_I0_measurements;
@@ -703,96 +709,29 @@ typedef struct PHY_VARS_gNB_s {
/// counter to average prach energh over first 100 prach opportunities
int prach_energy_counter;
// PDSCH Variables
PDSCH_CONFIG_DEDICATED pdsch_config_dedicated[NUMBER_OF_UE_MAX];
// PUSCH Varaibles
PUSCH_CONFIG_DEDICATED pusch_config_dedicated[NUMBER_OF_UE_MAX];
PUSCH_Config_t pusch_config;
// PUCCH variables
PUCCH_CONFIG_DEDICATED pucch_config_dedicated[NUMBER_OF_UE_MAX];
// UL-POWER-Control
UL_POWER_CONTROL_DEDICATED ul_power_control_dedicated[NUMBER_OF_UE_MAX];
// TPC
TPC_PDCCH_CONFIG tpc_pdcch_config_pucch[NUMBER_OF_UE_MAX];
TPC_PDCCH_CONFIG tpc_pdcch_config_pusch[NUMBER_OF_UE_MAX];
// CQI reporting
CQI_REPORT_CONFIG cqi_report_config[NUMBER_OF_UE_MAX];
// SRS Variables
SOUNDINGRS_UL_CONFIG_DEDICATED soundingrs_ul_config_dedicated[NUMBER_OF_UE_MAX];
dmrs_UplinkConfig_t dmrs_UplinkConfig;
dmrs_DownlinkConfig_t dmrs_DownlinkConfig;
uint8_t ncs_cell[20][7];
// Scheduling Request Config
SCHEDULING_REQUEST_CONFIG scheduling_request_config[NUMBER_OF_UE_MAX];
// Transmission mode per UE
uint8_t transmission_mode[NUMBER_OF_UE_MAX];
/// cba_last successful reception for each group, used for collision detection
uint8_t cba_last_reception[4];
// Pointers for active physicalConfigDedicated to be applied in current slot
struct PhysicalConfigDedicated *physicalConfigDedicated[NUMBER_OF_UE_MAX];
uint32_t rb_mask_ul[4];
/// Information regarding TM5
MU_MIMO_mode mu_mimo_mode[NUMBER_OF_UE_MAX];
/// target_ue_dl_mcs : only for debug purposes
uint32_t target_ue_dl_mcs;
/// target_ue_ul_mcs : only for debug purposes
uint32_t target_ue_ul_mcs;
/// target_ue_dl_rballoc : only for debug purposes
uint32_t ue_dl_rb_alloc;
/// target ul PRBs : only for debug
uint32_t ue_ul_nb_rb;
///check for Total Transmissions
uint32_t check_for_total_transmissions;
///check for MU-MIMO Transmissions
uint32_t check_for_MUMIMO_transmissions;
///check for SU-MIMO Transmissions
uint32_t check_for_SUMIMO_transmissions;
///check for FULL MU-MIMO Transmissions
uint32_t FULL_MUMIMO_transmissions;
/// Counter for total bitrate, bits and throughput in downlink
uint32_t total_dlsch_bitrate;
uint32_t total_transmitted_bits;
uint32_t total_system_throughput;
int hw_timing_advance;
/*
time_stats_t phy_proc;
*/
time_stats_t phy_proc_tx;
/*
time_stats_t phy_proc_rx;
*/
time_stats_t rx_prach;
/*
time_stats_t ofdm_mod_stats;
*/
time_stats_t dlsch_encoding_stats;
time_stats_t dlsch_modulation_stats;
time_stats_t dlsch_scrambling_stats;
time_stats_t tinput;
time_stats_t tprep;
time_stats_t tparity;
time_stats_t toutput;
time_stats_t dlsch_rate_matching_stats;
time_stats_t dlsch_turbo_encoding_stats;
time_stats_t dlsch_interleaving_stats;
time_stats_t dlsch_segmentation_stats;
/*
time_stats_t rx_dft_stats;
time_stats_t ulsch_channel_estimation_stats;
time_stats_t ulsch_freq_offset_estimation_stats;
@@ -803,29 +742,7 @@ typedef struct PHY_VARS_gNB_s {
time_stats_t ulsch_deinterleaving_stats;
time_stats_t ulsch_demultiplexing_stats;
time_stats_t ulsch_llr_stats;
time_stats_t ulsch_tc_init_stats;
time_stats_t ulsch_tc_alpha_stats;
time_stats_t ulsch_tc_beta_stats;
time_stats_t ulsch_tc_gamma_stats;
time_stats_t ulsch_tc_ext_stats;
time_stats_t ulsch_tc_intl1_stats;
time_stats_t ulsch_tc_intl2_stats;
#ifdef LOCALIZATION
/// time state for localization
time_stats_t localization_stats;
#endif
int32_t pucch1_stats_cnt[NUMBER_OF_UE_MAX][10];
int32_t pucch1_stats[NUMBER_OF_UE_MAX][10*1024];
int32_t pucch1_stats_thres[NUMBER_OF_UE_MAX][10*1024];
int32_t pucch1ab_stats_cnt[NUMBER_OF_UE_MAX][10];
int32_t pucch1ab_stats[NUMBER_OF_UE_MAX][2*10*1024];
int32_t pusch_stats_rb[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_round[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_mcs[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_bsr[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_BO[NUMBER_OF_UE_MAX][10240];
*/
} PHY_VARS_gNB;
#endif
openair1/PHY/defs_nr_UE.h
+15 -70
View File
@@ -45,6 +45,7 @@
#include <math.h>
#include "common_lib.h"
#include "msc.h"
#include "fapi_nr_ue_interface.h"
//#include <complex.h>
#include "assertions.h"
@@ -470,65 +471,7 @@ typedef struct {
#ifdef NR_PDCCH_DEFS_NR_UE
#define MAX_NR_DCI_DECODED_SLOT 10 // This value is not specified
#define NBR_NR_FORMATS 8 // The number of formats is 8 (0_0, 0_1, 1_0, 1_1, 2_0, 2_1, 2_2, 2_3)
#define NBR_NR_DCI_FIELDS 56 // The number of different dci fields defined in TS 38.212 subclause 7.3.1
#define IDENTIFIER_DCI_FORMATS 0
#define CARRIER_IND 1
#define SUL_IND_0_1 2
#define SLOT_FORMAT_IND 3
#define PRE_EMPTION_IND 4
#define BLOCK_NUMBER 5
#define CLOSE_LOOP_IND 6
#define BANDWIDTH_PART_IND 7
#define SHORT_MESSAGE_IND 8
#define SHORT_MESSAGES 9
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 10
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 11
#define TIME_DOM_RESOURCE_ASSIGNMENT 12
#define VRB_TO_PRB_MAPPING 13
#define PRB_BUNDLING_SIZE_IND 14
#define RATE_MATCHING_IND 15
#define ZP_CSI_RS_TRIGGER 16
#define FREQ_HOPPING_FLAG 17
#define TB1_MCS 18
#define TB1_NDI 19
#define TB1_RV 20
#define TB2_MCS 21
#define TB2_NDI 22
#define TB2_RV 23
#define MCS 24
#define NDI 25
#define RV 26
#define HARQ_PROCESS_NUMBER 27
#define DAI_ 28
#define FIRST_DAI 29
#define SECOND_DAI 30
#define TB_SCALING 31
#define TPC_PUSCH 32
#define TPC_PUCCH 33
#define PUCCH_RESOURCE_IND 34
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35
#define SRS_RESOURCE_IND 36
#define PRECOD_NBR_LAYERS 37
#define ANTENNA_PORTS 38
#define TCI 39
#define SRS_REQUEST 40
#define TPC_CMD 41
#define CSI_REQUEST 42
#define CBGTI 43
#define CBGFI 44
#define PTRS_DMRS 45
#define BETA_OFFSET_IND 46
#define DMRS_SEQ_INI 47
#define UL_SCH_IND 48
#define PADDING_NR_DCI 49
#define SUL_IND_0_0 50
#define RA_PREAMBLE_INDEX 51
#define SUL_IND_1_0 52
#define SS_PBCH_INDEX 53
#define PRACH_MASK_INDEX 54
#define RESERVED_NR_DCI 55
typedef enum {
@@ -759,12 +702,6 @@ typedef struct {
/// \brief PDCCH/DCI e-sequence (input to rate matching).
/// - first index: ? [0..96*N_RB_DL[
int16_t *e_rx;
/// number of PDCCH symbols in current subframe
uint8_t num_pdcch_symbols;
/// Allocated CRNTI for UE
uint16_t crnti;
/// 1: the allocated crnti is Temporary C-RNTI / 0: otherwise
uint8_t crnti_is_temporary;
/// Total number of PDU errors (diagnostic mode)
uint32_t dci_errors;
/// Total number of PDU received
@@ -773,11 +710,14 @@ typedef struct {
uint32_t dci_false;
/// Total number of DCI missed (diagnostic mode)
uint32_t dci_missed;
/// nCCE for PUCCH per subframe
/// nCCE for PDCCH per subframe
uint8_t nCCE[10];
//Check for specific DCIFormat and AgregationLevel
uint8_t dciFormat;
uint8_t agregationLevel;
int nb_search_space;
fapi_nr_dl_config_dci_dl_pdu_rel15_t pdcch_config[FAPI_NR_MAX_SS_PER_CORESET];
/*
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
// CORESET structure, where maximum number of CORESETs to be handled is 3 (according to 38.331 V15.1.0)
@@ -788,7 +728,7 @@ typedef struct {
int n_RB_BWP[NR_NBR_SEARCHSPACE_ACT_BWP];
uint32_t nb_search_space;
#endif
#endif*/
} NR_UE_PDCCH;
#define PBCH_A 24
@@ -940,9 +880,10 @@ typedef struct {
nr_ue_if_module_t *if_inst;
//nfapi_nr_config_request_t nrUE_config; <-- don't use config type for gNB!!!
fapi_nr_config_request_t nrUE_config;
uint16_t frame_gap;
// the following structures are not part of PHY_vars_UE anymore as it is not thread safe. They are now on the stack of the functions that actually need them
//nr_downlink_indication_t dl_indication;
@@ -957,8 +898,9 @@ typedef struct {
//fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[40];
uint8_t current_thread_id[NR_MAX_SLOTS_PER_FRAME];
t_nrPolar_params *polarList;
NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads
NR_UE_PDSCH_FLP *pdsch_vars_flp[NUMBER_OF_CONNECTED_eNB_MAX+1];
NR_UE_PDSCH *pdsch_vars_SI[NUMBER_OF_CONNECTED_eNB_MAX+1];
@@ -1012,6 +954,9 @@ typedef struct {
/// PUSCH DMRS sequence
uint32_t ****nr_gold_pusch_dmrs;
/// flag to indicate if PTRS is configured
uint8_t ptrs_configured;
uint32_t X_u[64][839];
uint32_t high_speed_flag;
@@ -1064,12 +1009,13 @@ typedef struct {
int current_dlsch_cqi[NUMBER_OF_CONNECTED_eNB_MAX];
unsigned char first_run_timing_advance[NUMBER_OF_CONNECTED_eNB_MAX];
uint8_t generate_prach;
uint8_t generate_nr_prach;
uint8_t prach_cnt;
uint8_t prach_PreambleIndex;
// uint8_t prach_timer;
uint8_t decode_SIB;
uint8_t decode_MIB;
uint8_t ssb_periodicity;
uint8_t init_sync_frame;
/// temporary offset during cell search prior to MIB decoding
int ssb_offset;
uint16_t symbol_offset; // offset in terms of symbols for detected ssb in sync
@@ -1143,7 +1089,6 @@ typedef struct {
crossCarrierSchedulingConfig_t crossCarrierSchedulingConfig;
supplementaryUplink_t supplementaryUplink;
dmrs_UplinkConfig_t dmrs_UplinkConfig;
dmrs_DownlinkConfig_t dmrs_DownlinkConfig;
csi_MeasConfig_t csi_MeasConfig;
PUSCH_ServingCellConfig_t PUSCH_ServingCellConfig;
openair1/PHY/defs_nr_common.h
+55 -27
View File
@@ -35,7 +35,7 @@
#include "PHY/impl_defs_top.h"
#include "defs_common.h"
#include "nfapi_nr_interface.h"
#include "nfapi_nr_interface_scf.h"
#include "impl_defs_nr.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
@@ -102,6 +102,15 @@
#define NR_MAX_PUSCH_ENCODED_LENGTH NR_MAX_PDSCH_ENCODED_LENGTH
#define NR_MAX_PDSCH_TBS 3824
#define MAX_NUM_NR_DLSCH_SEGMENTS 34
#define MAX_NR_DLSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056)
#define MAX_NUM_NR_ULSCH_SEGMENTS MAX_NUM_NR_DLSCH_SEGMENTS
#define MAX_NR_ULSCH_PAYLOAD_BYTES (MAX_NUM_NR_ULSCH_SEGMENTS*1056)
#define MAX_NUM_NR_CHANNEL_BITS (14*273*12*8) // 14 symbols, 273 RB
#define MAX_NUM_NR_RE (14*273*12)
typedef enum {
NR_MU_0=0,
NR_MU_1,
@@ -190,35 +199,43 @@ typedef struct {
} nr_cce_t;
/// PRACH-ConfigInfo from 36.331 RRC spec
/// PRACH-ConfigInfo from 38.331 RRC spec
typedef struct {
/// Parameter: prach-ConfigurationIndex, see TS 36.211 (5.7.1). \vr{[0..63]}
/// Parameter: prach-ConfigurationIndex, see TS 38.211 (6.3.3.2).
uint8_t prach_ConfigIndex;
/// Parameter: High-speed-flag, see TS 36.211 (5.7.2). \vr{[0..1]} 1 corresponds to Restricted set and 0 to Unrestricted set.
/// Parameter: High-speed-flag, see TS 38.211 (6.3.3.1). 1 corresponds to Restricted set and 0 to Unrestricted set.
uint8_t highSpeedFlag;
/// Parameter: \f$N_\text{CS}\f$, see TS 36.211 (5.7.2). \vr{[0..15]}\n Refer to table 5.7.2-2 for preamble format 0..3 and to table 5.7.2-3 for preamble format 4.
/// Restricted Set Config (type A=0 , type B=1) TS 38.211 (6.3.3.1)
uint8_t restrictedSetConfig;
/// 38.211 (NCS 38.211 6.3.3.1).
uint8_t zeroCorrelationZoneConfig;
/// Parameter: prach-FrequencyOffset, see TS 36.211 (5.7.1). \vr{[0..94]}\n For TDD the value range is dependent on the value of \ref prach_ConfigIndex.
uint8_t prach_FreqOffset;
/// see TS 38.211 (6.3.3.2).
uint8_t msg1_frequencystart;
} NR_PRACH_CONFIG_INFO;
/// PRACH-ConfigSIB or PRACH-Config
typedef struct {
/// Parameter: RACH_ROOT_SEQUENCE, see TS 36.211 (5.7.1). \vr{[0..837]}
/// Parameter: prach-rootSequenceIndex, see TS 38.211 (6.3.3.2).
uint16_t rootSequenceIndex;
/// prach_Config_enabled=1 means enabled. \vr{[0..1]}
/// prach_Config_enabled=1 means enabled.}
uint8_t prach_Config_enabled;
/// PRACH Configuration Information
NR_PRACH_CONFIG_INFO prach_ConfigInfo;
} NR_PRACH_CONFIG_COMMON;
typedef struct NR_DL_FRAME_PARMS {
typedef struct NR_DL_FRAME_PARMS NR_DL_FRAME_PARMS;
typedef uint32_t (*get_samples_per_slot_t)(int slot, NR_DL_FRAME_PARMS* fp);
typedef uint32_t (*get_samples_slot_timestamp_t)(int slot, NR_DL_FRAME_PARMS* fp, uint8_t sl_ahead);
struct NR_DL_FRAME_PARMS {
/// frequency range
nr_frequency_range_e freq_range;
/// Placeholder to replace overlapping fields below
nfapi_nr_rf_config_t rf_config;
// /// Placeholder to replace overlapping fields below
// nfapi_nr_rf_config_t rf_config;
/// Placeholder to replace SSB overlapping fields below
nfapi_nr_sch_config_t sch_config;
// nfapi_nr_sch_config_t sch_config;
/// Number of resource blocks (RB) in DL
int N_RB_DL;
/// Number of resource blocks (RB) in UL
@@ -227,12 +244,12 @@ typedef struct NR_DL_FRAME_PARMS {
uint8_t N_RBG;
/// Total Number of Resource Block Groups SubSets: this is P
uint8_t N_RBGS;
/// EUTRA Band
uint16_t eutra_band;
/// NR Band
uint16_t nr_band;
/// DL carrier frequency
uint32_t dl_CarrierFreq;
uint64_t dl_CarrierFreq;
/// UL carrier frequency
uint32_t ul_CarrierFreq;
uint64_t ul_CarrierFreq;
/// TX attenuation
uint32_t att_tx;
/// RX attenuation
@@ -240,11 +257,10 @@ typedef struct NR_DL_FRAME_PARMS {
/// total Number of Resource Block Groups: this is ceil(N_PRB/P)
/// Frame type (0 FDD, 1 TDD)
lte_frame_type_t frame_type;
/// TDD subframe assignment (0-7) (default = 3) (254=RX only, 255=TX only)
uint8_t tdd_config;
/// TDD S-subframe configuration (0-9)
/// Cell ID
uint16_t Nid_cell;
/// subcarrier spacing (15,30,60,120)
uint32_t subcarrier_spacing;
/// 3/4 sampling
uint8_t threequarter_fs;
@@ -260,12 +276,18 @@ typedef struct NR_DL_FRAME_PARMS {
uint16_t symbols_per_slot;
/// Number of slots per subframe
uint16_t slots_per_subframe;
/// Number of slots per frame
/// Number of slots per frame
uint16_t slots_per_frame;
/// Number of samples in a subframe
uint32_t samples_per_subframe;
/// Number of samples in a slot
uint32_t samples_per_slot;
/// Number of samples in current slot
get_samples_per_slot_t get_samples_per_slot;
/// Number of samples before slot
get_samples_slot_timestamp_t get_samples_slot_timestamp;
/// Number of samples in 0th and center slot of a subframe
uint32_t samples_per_slot0;
/// Number of samples in other slots of the subframe
uint32_t samples_per_slotN0;
/// Number of OFDM/SC-FDMA symbols in one subframe (to be modified to account for potential different in UL/DL)
uint16_t symbols_per_tti;
/// Number of samples in a radio frame
@@ -290,7 +312,7 @@ typedef struct NR_DL_FRAME_PARMS {
/// Number of Receive antennas in node
uint8_t nb_antennas_rx;
/// Number of common transmit antenna ports in eNodeB (1 or 2)
uint8_t nb_antenna_ports_eNB;
uint8_t nb_antenna_ports_gNB;
/// PRACH_CONFIG
NR_PRACH_CONFIG_COMMON prach_config_common;
/// Cyclic Prefix for DL (0=Normal CP, 1=Extended CP)
@@ -299,17 +321,20 @@ typedef struct NR_DL_FRAME_PARMS {
uint8_t nushift;
/// SRS configuration from TS 38.331 RRC
SRS_NR srs_nr;
/// Power used by SSB in order to estimate signal strength and path loss
int ss_PBCH_BlockPower;
/// for NR TDD management
TDD_UL_DL_configCommon_t *p_tdd_UL_DL_Configuration;
TDD_UL_DL_configCommon_t *p_tdd_UL_DL_ConfigurationCommon2;
TDD_UL_DL_SlotConfig_t *p_TDD_UL_DL_ConfigDedicated;
TDD_UL_DL_SlotConfig_t *p_TDD_UL_DL_ConfigDedicated;
/// TDD configuration
uint16_t tdd_uplink_nr[2*NR_MAX_SLOTS_PER_FRAME]; /* this is a bitmap of symbol of each slot given for 2 frames */
uint8_t half_frame_bit;
//SSB related params
/// Start in Subcarrier index of the SSB block
uint16_t ssb_start_subcarrier;
@@ -321,10 +346,12 @@ typedef struct NR_DL_FRAME_PARMS {
uint64_t L_ssb;
/// Total number of SSB transmitted
uint8_t N_ssb;
/// SSB index
uint8_t ssb_index;
/// PBCH polar encoder params
t_nrPolar_params pbch_polar_params;
} NR_DL_FRAME_PARMS;
};
#define KHz (1000UL)
#define MHz (1000*KHz)
@@ -335,8 +362,9 @@ typedef struct nr_bandentry_s {
uint64_t ul_max;
uint64_t dl_min;
uint64_t dl_max;
uint64_t N_OFFs_DL;
uint64_t step_size;
uint64_t N_OFFs_DL;
uint8_t deltaf_raster;
} nr_bandentry_t;
typedef struct nr_band_info_s {
openair1/PHY/impl_defs_nr.h
+37 -39
View File
@@ -67,33 +67,10 @@ EXTERN const uint8_t N_slot_subframe[MU_NUMBER]
#endif
;
//#define RX_NB_TH_MAX 3
//#define RX_NB_TH 3
#if 0
#define LTE_SLOTS_PER_SUBFRAME (2)
#define LTE_NUMBER_OF_SUBFRAMES_PER_FRAME (10)
#define LTE_SLOTS_PER_FRAME (20)
#define LTE_CE_FILTER_LENGTH (5)
#define LTE_CE_OFFSET (LTE_CE_FILTER_LENGTH)
#define TX_RX_SWITCH_SYMBOL (NUMBER_OF_SYMBOLS_PER_FRAME>>1)
#define PBCH_PDU_SIZE (3) //bytes
#define PRACH_SYMBOL (3) //position of the UL PSS wrt 2nd slot of special subframe
#define NUMBER_OF_FREQUENCY_GROUPS (lte_frame_parms->N_RB_DL)
#define SSS_AMP (1148)
#define MAX_NUM_PHICH_GROUPS (56) //110 RBs Ng=2, p.60 36-212, Sec. 6.9
#define MAX_MBSFN_AREA (8)
#endif
#define NB_DL_DATA_TO_UL_ACK (8) /* size of table TS 38.213 Table 9.2.3-1 */
/***********************************************************************
*
* FUNCTIONALITY : System information type 1
@@ -120,15 +97,11 @@ SystemInformationBlockType1_nr_t;
#define NR_TDD_SET_ALL_SYMBOLS (0x3FFF)
#define NR_DOWNLINK_SLOT (0x01)
#define NR_UPLINK_SLOT (0x03)
#define NR_UPLINK_SLOT (0x02)
#define NR_MIXED_SLOT (0x03)
#define FRAME_DURATION_MICRO_SEC (10000) /* frame duration in microsecond */
typedef enum {
SLOT_DL = 0,
SLOT_UL = 1,
} nr_slot_t;
typedef enum {
ms0p5 = 500, /* duration is given in microsecond */
ms0p625 = 625,
@@ -140,7 +113,7 @@ typedef enum {
ms10 = 10000,
} dl_UL_TransmissionPeriodicity_t;
typedef struct {
typedef struct TDD_UL_DL_configCommon_s {
/// Reference SCS used to determine the time domain boundaries in the UL-DL pattern which must be common across all subcarrier specific
/// virtual carriers, i.e., independent of the actual subcarrier spacing using for data transmission.
/// Only the values 15 or 30 kHz (<6GHz), 60 or 120 kHz (>6GHz) are applicable.
@@ -164,7 +137,7 @@ typedef struct {
/// Corresponds to L1 parameter 'number-of-UL-symbols-common' (see 38.211, section FFS_Section)
uint8_t nrofUplinkSymbols;
/// \ for setting a sequence
struct TDD_UL_DL_configCommon_t *p_next_TDD_UL_DL_configCommon_t;
struct TDD_UL_DL_configCommon_s *p_next;
} TDD_UL_DL_configCommon_t;
typedef struct {
@@ -363,9 +336,9 @@ typedef struct {
/***********************************************************************
*
* FUNCTIONALITY : Packed Downlink Shared Channel PDSCH
* FUNCTIONALITY : Physical Downlink Shared Channel PDSCH
*
* DESCRIPTION : interface description for PSCH configuration
* DESCRIPTION : interface description for PSDCH configuration
*
************************************************************************/
@@ -510,9 +483,6 @@ typedef struct {
uint8_t startSymbolAndLength;
} PUSCH_TimeDomainResourceAllocation_t;
////////////////////////////////////////////////////////////////////////////////################################
typedef struct { // The IE PTRS-UplinkConfig is used to configure uplink Phase-Tracking-Reference-Signals (PTRS)
} ptrs_UplinkConfig_t;
typedef enum{
maxCodeBlockGroupsPerTransportBlock_n2 = 2,
maxCodeBlockGroupsPerTransportBlock_n4 = 4,
@@ -530,8 +500,8 @@ typedef enum {
pdsch_dmrs_type2 = 2
} pdsch_dmrs_type_t;
typedef enum {
pusch_dmrs_type1 = 1,
pusch_dmrs_type2 = 2
pusch_dmrs_type1 = 0,
pusch_dmrs_type2 = 1
} pusch_dmrs_type_t;
typedef enum {
pdsch_dmrs_pos0 = 0,
@@ -544,6 +514,12 @@ typedef enum {
pusch_dmrs_pos2 = 2,
pusch_dmrs_pos3 = 3,
} pusch_dmrs_AdditionalPosition_t;
typedef enum {
offset00 = 0,
offset01 = 1,
offset10 = 2,
offset11 = 3,
} ptrs_resource_elementoffset_t;
typedef enum {
pdsch_len1 = 1,
pdsch_len2 = 2
@@ -552,6 +528,22 @@ typedef enum {
pusch_len1 = 1,
pusch_len2 = 2
} pusch_maxLength_t;
typedef struct {
uint8_t ptrs_mcs1;
uint8_t ptrs_mcs2;
uint8_t ptrs_mcs3;
} ptrs_time_density_t;
typedef struct {
uint16_t n_rb0;
uint16_t n_rb1;
} ptrs_frequency_density_t;
typedef struct { // The IE PTRS-UplinkConfig is used to configure uplink Phase-Tracking-Reference-Signals (PTRS)
uint8_t num_ptrs_ports;
ptrs_resource_elementoffset_t resourceElementOffset;
ptrs_time_density_t timeDensity;
ptrs_frequency_density_t frequencyDensity;
uint32_t ul_ptrs_power;
} ptrs_UplinkConfig_t;
typedef struct { // The IE DMRS-DownlinkConfig is used to configure downlink demodulation reference signals for PDSCH
pdsch_dmrs_type_t pdsch_dmrs_type;
pdsch_dmrs_AdditionalPosition_t pdsch_dmrs_AdditionalPosition;
@@ -563,6 +555,7 @@ typedef struct { // The IE DMRS-UplinkConfig is used to configure uplink demodul
pusch_dmrs_type_t pusch_dmrs_type;
pusch_dmrs_AdditionalPosition_t pusch_dmrs_AdditionalPosition;
pusch_maxLength_t pusch_maxLength;
ptrs_UplinkConfig_t ptrs_UplinkConfig;
uint16_t scramblingID0;
uint16_t scramblingID1;
} dmrs_UplinkConfig_t;
@@ -647,6 +640,10 @@ typedef struct {
* resourceAllocation
*/
ul_resourceAllocation_t ul_resourceAllocation;
/*
* DMRS-Uplinkconfig
*/
dmrs_UplinkConfig_t dmrs_UplinkConfig;
/*
* rgb_Size
*/
@@ -1112,6 +1109,7 @@ typedef struct {
SchedulingRequestResourceConfig_t *sr_ResourceConfig[MAX_NR_OF_SR_CONFIG_PER_CELL_GROUP];
} scheduling_request_config_t;
#undef EXTERN
#undef INIT_VARIABLES_PHY_IMPLEMENTATION_DEFS_NR_H
#endif /* PHY_IMPL_DEFS_NR_H */
openair1/PHY/impl_defs_top.h
+2 -2
View File
@@ -149,10 +149,10 @@
#define OFDM_SYMBOL_SIZE_BYTES0 (OFDM_SYMBOL_SIZE_SAMPLES0*2)
#define OFDM_SYMBOL_SIZE_BYTES_NO_PREFIX (OFDM_SYMBOL_SIZE_SAMPLES_NO_PREFIX*2)
#define SLOT_LENGTH_BYTES (frame_parms->samples_per_tti<<1) // 4 bytes * samples_per_tti/2
#define SLOT_LENGTH_BYTES (frame_parms->samples_per_slot) // 4 bytes * samples_per_tti/2
#define SLOT_LENGTH_BYTES_NO_PREFIX (OFDM_SYMBOL_SIZE_BYTES_NO_PREFIX * NUMBER_OF_OFDM_SYMBOLS_PER_SLOT)
#define FRAME_LENGTH_COMPLEX_SAMPLES (frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)
#define FRAME_LENGTH_COMPLEX_SAMPLES (frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)
#define FRAME_LENGTH_SAMPLES (FRAME_LENGTH_COMPLEX_SAMPLES*2)
#define FRAME_LENGTH_SAMPLES_NO_PREFIX (NUMBER_OF_SYMBOLS_PER_FRAME*OFDM_SYMBOL_SIZE_SAMPLES_NO_PREFIX)
#define FRAME_LENGTH_COMPLEX_SAMPLES_NO_PREFIX (FRAME_LENGTH_SAMPLES_NO_PREFIX/2)
openair1/SCHED_NR/fapi_nr_l1.c
+76 -93
View File
@@ -34,28 +34,21 @@
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req);
int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req);
extern uint8_t nfapi_mode;
void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu,
uint8_t *sdu)
void handle_nr_nfapi_ssb_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu)
{
AssertFatal(dl_config_pdu->bch_pdu_rel15.length == 3, "BCH PDU has length %d != 3\n",
dl_config_pdu->bch_pdu_rel15.length);
AssertFatal(dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag== 1, "bchPayloadFlat %d != 1\n",
dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag);
LOG_D(PHY,"pbch_pdu[0]: %x,pbch_pdu[1]: %x,gNB->pbch_pdu[2]: %x\n",sdu[0],sdu[1],sdu[2]);
gNB->pbch_pdu[0] = sdu[2];
gNB->pbch_pdu[1] = sdu[1];
gNB->pbch_pdu[2] = sdu[0];
// adjust transmit amplitude here based on NFAPI info
LOG_I(PHY,"%d.%d : pbch_pdu: %x\n",frame,slot,dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload);
memcpy((void*)&gNB->ssb_pdu,&dl_tti_pdu->ssb_pdu,sizeof(dl_tti_pdu->ssb_pdu));
}
/*void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int subframe,gNB_L1_rxtx_proc_t *proc,
/*void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int subframe,gNB_L1_rxtx_proc_t *proc,
uint8_t codeword_index,
uint8_t *sdu)
{
@@ -85,7 +78,7 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
//AssertFatal(sdu!=NULL,"NFAPI: SFN/SF:%04d%d proc:TX:[frame %d subframe %d]: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d dlsch0_harq[round:%d SFN/SF:%d%d pdu:%p mcs:%d ndi:%d pdschstart:%d]\n",
// frame,subframe,
// proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid,
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe,dlsch0_harq->pdu,dlsch0_harq->mcs,dlsch0_harq->ndi,dlsch0_harq->pdsch_start);
// dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel8.pdu_index,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe,dlsch0_harq->pdu,dlsch0_harq->mcs,dlsch0_harq->ndi,dlsch0_harq->pdsch_start);
if (codeword_index == 0) dlsch0_harq->pdu = sdu;
else dlsch1_harq->pdu = sdu;
LOG_I(PHY, "SFN/SF: %d/%d DLSCH PDU filled \n",frame, subframe);
@@ -94,29 +87,43 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
}*/
void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
nfapi_nr_dl_config_dci_dl_pdu *dci_dl_pdu) {
int idx = slot&1;
NR_gNB_PDCCH *pdcch_vars = &gNB->pdcch_vars;
void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu) {
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, slot, idx, pdcch_vars->num_dci);
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci);
// copy dci configuration into gNB structure
nr_fill_dci(gNB,frame,slot,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],dci_dl_pdu);
gNB->pdcch_pdu = pdcch_pdu;
nr_fill_dci(gNB,frame,slot);
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, slot, idx, pdcch_vars->num_dci);
}
void handle_nfapi_nr_ul_dci_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu) {
void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
LOG_D(PHY,"Frame %d, Slot %d: UL DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15.numDlDci);
// copy dci configuration into gNB structure
gNB->ul_dci_pdu = ul_dci_request_pdu;
nr_fill_ul_dci(gNB,frame,slot);
}
void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu)
{
nr_fill_dlsch(gNB,frame,slot,dlsch_pdu,sdu);
nr_fill_dlsch(gNB,frame,slot,pdsch_pdu,sdu);
}
@@ -125,99 +132,75 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
PHY_VARS_gNB *gNB;
// copy data from L2 interface into L1 structures
module_id_t Mod_id = Sched_INFO->module_id;
uint8_t CC_id = Sched_INFO->CC_id;
nfapi_nr_dl_config_request_t *DL_req = Sched_INFO->DL_req;
nfapi_tx_request_t *TX_req = Sched_INFO->TX_req;
nfapi_nr_dl_tti_request_t *DL_req = Sched_INFO->DL_req;
nfapi_nr_tx_data_request_t *TX_req = Sched_INFO->TX_req;
nfapi_nr_ul_tti_request_t *UL_tti_req = Sched_INFO->UL_tti_req;
nfapi_nr_ul_dci_request_t *UL_dci_req = Sched_INFO->UL_dci_req;
frame_t frame = Sched_INFO->frame;
sub_frame_t slot = Sched_INFO->slot;
AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");
AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id);
AssertFatal(RC.gNB[Mod_id][CC_id]!=NULL,"RC.gNB[%d][%d] is null\n",Mod_id,CC_id);
gNB = RC.gNB[Mod_id][CC_id];
gNB = RC.gNB[Mod_id];
uint8_t number_dl_pdu = DL_req->dl_config_request_body.number_pdu;
//uint8_t number_ul_pdu = UL_tti_req->n_pdus;
uint8_t number_dl_pdu = DL_req->dl_tti_request_body.nPDUs;
// uint8_t number_ul_pdu = 0;
uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus;
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu;
int i;
// if (UL_tti_req != NULL) number_ul_pdu = UL_tti_req->n_pdus;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d \n",
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d%d DL_req:SFN/SLO:%04d%d:dl_pdu:%d tx_req:SFN/SLOT:%04d%d:pdus:%d;\n",
frame,slot,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu,
NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus);
DL_req->SFN,DL_req->Slot,number_dl_pdu,
TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs);
int do_oai =0;
int dont_send =0;
gNB->pdcch_vars.num_dci = 0;
gNB->pdcch_vars.num_pdsch_rnti = 0;
int pdcch_received=0;
gNB->num_pdsch_rnti=0;
gNB->pdcch_pdu = NULL;
gNB->pbch_configured=0;
gNB->pdcch_vars.num_dci=0;
for (int i=0;i<number_dl_pdu;i++) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_tti_pdu->PDUType);
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
gNB->pbch_configured=1;
for (i=0;i<number_dl_pdu;i++) {
dl_config_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[i];
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
switch (dl_config_pdu->pdu_type) {
case NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE:
AssertFatal(dl_config_pdu->bch_pdu_rel15.pdu_index < TX_req->tx_request_body.number_of_pdus,
"bch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)\n",
dl_config_pdu->bch_pdu_rel15.pdu_index,
TX_req->tx_request_body.number_of_pdus);
gNB->pbch_configured=1;
do_oai=1;
handle_nr_nfapi_ssb_pdu(gNB,frame,slot,
dl_tti_pdu);
handle_nr_nfapi_bch_pdu(gNB,
dl_config_pdu,
TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->bch_pdu_rel15.pdu_index].segments[0].segment_data);
break;
case NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE:
handle_nfapi_nr_dci_dl_pdu(gNB,
frame, slot,
&dl_config_pdu->dci_dl_pdu);
gNB->pdcch_vars.num_dci++;
gNB->pdcch_vars.num_pdsch_rnti++;
do_oai=1;
case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
AssertFatal(pdcch_received == 0, "pdcch_received is not 0, we can only handle one PDCCH PDU per slot\n");
handle_nfapi_nr_pdcch_pdu(gNB,
frame, slot,
&dl_tti_pdu->pdcch_pdu);
pdcch_received = 1;
break;
case NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE:
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
{
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel15;
uint16_t pdu_index = dlsch_pdu_rel15->pdu_index;
uint16_t tx_pdus = TX_req->tx_request_body.number_of_pdus;
uint16_t invalid_pdu = pdu_index == -1;
uint8_t *sdu = invalid_pdu ? NULL : pdu_index >= tx_pdus ? NULL : TX_req->tx_request_body.tx_pdu_list[pdu_index].segments[0].segment_data;
AssertFatal(sdu!=NULL,"sdu is null, pdu_index %d, tx_pdus %d\n",pdu_index,tx_pdus);
handle_nr_nfapi_dlsch_pdu(gNB,frame,slot,&dl_config_pdu->dlsch_pdu, sdu);
do_oai=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
pduIndex,TX_req->pdu_list[pduIndex].num_TLV);
uint8_t *sdu = (uint8_t *)TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
handle_nr_nfapi_pdsch_pdu(gNB,frame,slot,&dl_tti_pdu->pdsch_pdu, sdu);
}
}
}
memcpy(&gNB->UL_tti_req,UL_tti_req,sizeof(nfapi_nr_ul_tti_request_t));
if (UL_tti_req!=NULL) memcpy(&gNB->UL_tti_req,UL_tti_req,sizeof(nfapi_nr_ul_tti_request_t));
/*
// this is done in phy_procedures_gNB_uespec_RX now
for (i=0;i<number_ul_pdu;i++) {
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,UL_tti_req->pdus_list[i].pdu_type);
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
{
nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu;
nr_fill_ulsch(gNB,frame,slot,pusch_pdu);
}
}
for (int i=0;i<number_ul_dci_pdu;i++) {
handle_nfapi_nr_ul_dci_pdu(gNB,
frame, slot,
&UL_dci_req->ul_dci_pdu_list[i]);
}
*/
if (nfapi_mode && do_oai && !dont_send) {
oai_nfapi_tx_req(Sched_INFO->TX_req);
oai_nfapi_nr_dl_config_req(Sched_INFO->DL_req); // DJP - .dl_config_request_body.dl_config_pdu_list[0]); // DJP - FIXME TODO - yuk - only copes with 1 pdu
}
}
openair1/SCHED_NR/fapi_nr_l1.h
+6 -5
View File
@@ -34,15 +34,16 @@
#include "PHY/phy_extern.h"
#include "SCHED_NR/sched_nr.h"
#include "nfapi_nr_interface.h"
#include "nfapi_nr_interface_scf.h"
void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO);
void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
int frame, int subframe,
nfapi_nr_dl_config_dci_dl_pdu *dcl_dl_pdu);
void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB,
int frame, int subframe,
nfapi_nr_dl_tti_pdcch_pdu *dcl_dl_pdu);
void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu);
void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t harq_pid);
openair1/SCHED_NR/nr_ru_procedures.c
+166 -148
View File
@@ -66,167 +66,197 @@ void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa) {
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0) , 1 );
slot_offset = slot*fp->samples_per_slot;
slot_offset = fp->get_samples_slot_timestamp(slot,fp,0);
slot_offsetF = first_symbol*fp->ofdm_symbol_size;
int abs_first_symbol = slot*fp->symbols_per_slot;
if (first_symbol>0) slot_offset += (fp->ofdm_symbol_size*first_symbol) + (fp->nb_prefix_samples0) + (fp->nb_prefix_samples*(first_symbol-1));
for (uint16_t idx_sym=abs_first_symbol; idx_sym<abs_first_symbol+first_symbol; idx_sym++)
slot_offset += (idx_sym%(0x7<<fp->numerology_index)) ? fp->nb_prefix_samples : fp->nb_prefix_samples0;
slot_offset += fp->ofdm_symbol_size*first_symbol;
LOG_D(PHY,"SFN/SF:RU:TX:%d/%d Generating slot %d (first_symbol %d num_symbols %d)\n",ru->proc.frame_tx, ru->proc.tti_tx,slot,first_symbol,num_symbols);
if (fp->Ncp == 1) {
if (fp->Ncp == 1)
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
num_symbols,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
}
else {
if (first_symbol==0) {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
1,
fp->nb_prefix_samples0,
CYCLIC_PREFIX);
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF+fp->ofdm_symbol_size],
(int*)&ru->common.txdata[aa][slot_offset+fp->nb_prefix_samples0+fp->ofdm_symbol_size],
fp->ofdm_symbol_size,
num_symbols-1,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
if (fp->numerology_index != 0) {
if (!(slot%(fp->slots_per_subframe/2))&&(first_symbol==0)) {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
1,
fp->nb_prefix_samples0,
CYCLIC_PREFIX);
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF+fp->ofdm_symbol_size],
(int*)&ru->common.txdata[aa][slot_offset+fp->nb_prefix_samples0+fp->ofdm_symbol_size],
fp->ofdm_symbol_size,
num_symbols-1,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
}
else {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
num_symbols,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
}
}
else {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
num_symbols,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
for (uint16_t idx_sym=abs_first_symbol; idx_sym<abs_first_symbol+num_symbols; idx_sym++) {
if (idx_sym%0x7) {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
1,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
slot_offset += fp->nb_prefix_samples+fp->ofdm_symbol_size;
}
else {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
1,
fp->nb_prefix_samples0,
CYCLIC_PREFIX);
slot_offset += fp->nb_prefix_samples0+fp->ofdm_symbol_size;
}
}
}
}
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0), 0);
}
void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
RU_proc_t *proc = &ru->proc;
RU_feptx_t *feptx = proc->feptx;
PHY_VARS_gNB *gNB;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
int slot = tti_tx;
int i = 0;
int j = 0;//symbol
int aa = 0;//logical antenna number
int aa = 0;//physical antenna number
int ret = 0;
int nb_antenna_ports = fp->L_ssb;
int ofdm_mask_full = (1<<(ru->nb_tx*2))-1;
int txdataF_offset = ((tti_tx%2)*fp->samples_per_slot_wCP);
if (nr_slot_select(cfg,slot,frame_tx) == SF_UL) return;
for (aa=0; aa<fp->Lmax; aa++) {
memset(ru->common.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t));
}
if (nr_slot_select(cfg,frame_tx,slot) == NR_UPLINK_SLOT) return;
for (aa=0; aa<ru->nb_tx; aa++) memset(ru->common.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t));
start_meas(&ru->ofdm_total_stats);
if(ru->num_gNB != 0){//L1 RU on same machine
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
for(j=0; j<2; ++j){//half slot
for(i=0; i<ru->nb_tx; ++i){
if(j == 0){
AssertFatal((ret=pthread_mutex_lock(&feptx[i].mutex_feptx))==0,"mutex_lock return %d\n",ret);
feptx[i].aa = i;
feptx[i].index = i;
feptx[i].ru = ru;
feptx[i].symbol = 0;
feptx[i].slot = slot;
feptx[i].nb_antenna_ports = nb_antenna_ports;
feptx[i].instance_cnt_feptx = 0;
AssertFatal(pthread_cond_signal(&feptx[i].cond_feptx) == 0,"ERROR pthread_cond_signal for feptx_ofdm_thread\n");
AssertFatal((ret=pthread_mutex_unlock(&feptx[i].mutex_feptx))==0,"mutex_lock returns %d\n",ret);
}//first half
else{
AssertFatal((ret=pthread_mutex_lock(&feptx[i+ru->nb_tx].mutex_feptx))==0,"mutex_lock return %d\n",ret);
feptx[i+ru->nb_tx].aa = i;
feptx[i+ru->nb_tx].index = i+ru->nb_tx;
feptx[i+ru->nb_tx].ru = ru;
feptx[i+ru->nb_tx].symbol = fp->symbols_per_slot>>1;
feptx[i+ru->nb_tx].slot = slot;
feptx[i+ru->nb_tx].nb_antenna_ports = nb_antenna_ports;
feptx[i+ru->nb_tx].instance_cnt_feptx = 0;
AssertFatal(pthread_cond_signal(&feptx[i+ru->nb_tx].cond_feptx) == 0,"ERROR pthread_cond_signal for feptx_ofdm_thread\n");
AssertFatal((ret=pthread_mutex_unlock(&feptx[i+ru->nb_tx].mutex_feptx))==0,"mutex_lock returns %d\n",ret);
}//second half
}//physical antenna
}//half slot
}//if L1 RU on same machine
else{//(RU only machine)
for(j=0; j<fp->symbols_per_slot; ++j){
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+j , 1);
start_meas(&ru->txdataF_copy_stats);
if (ru->num_gNB == 1){
gNB = ru->gNB_list[0];
cfg = &gNB->gNB_config;
for(i=0; i<nb_antenna_ports; ++i){
memcpy((void*)&ru->common.txdataF[i][j*fp->ofdm_symbol_size],
(void*)&gNB->common_vars.txdataF[i][j*fp->ofdm_symbol_size + txdataF_offset],
fp->ofdm_symbol_size*sizeof(int32_t));
}
}//num_gNB == 1
stop_meas(&ru->txdataF_copy_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+j , 0);
//if (nr_slot_select(cfg,frame_tx,slot)==NR_DOWNLINK_SLOT) {
if(ru->num_gNB != 0){//L1 RU on same machine
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
if (nr_slot_select(cfg,slot,frame_tx)==SF_DL) {
// If this is not an S-tti
for(j=0; j<2; ++j){//half slot
for(i=0; i<ru->nb_tx; ++i){
if(j%2 == 0){
while(feptx[i].instance_cnt_feptx != -1){
usleep(5);
}
if(j == 0){
AssertFatal((ret=pthread_mutex_lock(&feptx[i].mutex_feptx))==0,"mutex_lock return %d\n",ret);
feptx[i].aa = i;
feptx[i].index = i;
feptx[i].ru = ru;
feptx[i].symbol = j;
feptx[i].symbol = 0;
feptx[i].slot = slot;
feptx[i].nb_antenna_ports = nb_antenna_ports;
feptx[i].nb_antenna_ports = ru->nb_tx;
feptx[i].instance_cnt_feptx = 0;
AssertFatal(pthread_cond_signal(&feptx[i].cond_feptx) == 0,"ERROR pthread_cond_signal for feptx_ofdm_thread\n");
AssertFatal((ret=pthread_mutex_unlock(&feptx[i].mutex_feptx))==0,"mutex_lock returns %d\n",ret);
}
}//first half
else{
while(feptx[i+ru->nb_tx].instance_cnt_feptx != -1){
usleep(5);
}
AssertFatal((ret=pthread_mutex_lock(&feptx[i+ru->nb_tx].mutex_feptx))==0,"mutex_lock return %d\n",ret);
feptx[i+ru->nb_tx].aa = i;
feptx[i+ru->nb_tx].index = i+ru->nb_tx;
feptx[i+ru->nb_tx].ru = ru;
feptx[i+ru->nb_tx].symbol = j;
feptx[i+ru->nb_tx].symbol = fp->symbols_per_slot>>1;
feptx[i+ru->nb_tx].slot = slot;
feptx[i+ru->nb_tx].nb_antenna_ports = nb_antenna_ports;
feptx[i+ru->nb_tx].nb_antenna_ports = ru->nb_tx;
feptx[i+ru->nb_tx].instance_cnt_feptx = 0;
AssertFatal(pthread_cond_signal(&feptx[i+ru->nb_tx].cond_feptx) == 0,"ERROR pthread_cond_signal for feptx_ofdm_thread\n");
AssertFatal((ret=pthread_mutex_unlock(&feptx[i+ru->nb_tx].mutex_feptx))==0,"mutex_lock returns %d\n",ret);
}
}
}//if == SF_DL
else {
proc->feptx_mask = ofdm_mask_full;
}
}//j<fp->symbols_per_slot
}//else (RU only machine)
}//second half
}//physical antenna
}//half slot
}//if L1 RU on same machine
else{//(RU only machine)
for(j=0; j<fp->symbols_per_slot; ++j){
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+j , 1);
start_meas(&ru->txdataF_copy_stats);
if (ru->num_gNB == 1){
gNB = ru->gNB_list[0];
cfg = &gNB->gNB_config;
for(i=0; i<ru->nb_tx; ++i){
memcpy((void*)&ru->common.txdataF[i][j*fp->ofdm_symbol_size],
(void*)&gNB->common_vars.txdataF[i][j*fp->ofdm_symbol_size + txdataF_offset],
fp->ofdm_symbol_size*sizeof(int32_t));
}
}//num_gNB == 1
stop_meas(&ru->txdataF_copy_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+j , 0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
if (nr_slot_select(cfg,slot,frame_tx)==SF_DL) {
// If this is not an S-tti
for(i=0; i<ru->nb_tx; ++i){
if(j%2 == 0){
while(feptx[i].instance_cnt_feptx != -1){
usleep(5);
}
AssertFatal((ret=pthread_mutex_lock(&feptx[i].mutex_feptx))==0,"mutex_lock return %d\n",ret);
feptx[i].aa = i;
feptx[i].index = i;
feptx[i].ru = ru;
feptx[i].symbol = j;
feptx[i].slot = slot;
feptx[i].nb_antenna_ports = ru->nb_tx;
feptx[i].instance_cnt_feptx = 0;
AssertFatal(pthread_cond_signal(&feptx[i].cond_feptx) == 0,"ERROR pthread_cond_signal for feptx_ofdm_thread\n");
AssertFatal((ret=pthread_mutex_unlock(&feptx[i].mutex_feptx))==0,"mutex_lock returns %d\n",ret);
}
else{
while(feptx[i+ru->nb_tx].instance_cnt_feptx != -1){
usleep(5);
}
AssertFatal((ret=pthread_mutex_lock(&feptx[i+ru->nb_tx].mutex_feptx))==0,"mutex_lock return %d\n",ret);
feptx[i+ru->nb_tx].aa = i;
feptx[i+ru->nb_tx].index = i+ru->nb_tx;
feptx[i+ru->nb_tx].ru = ru;
feptx[i+ru->nb_tx].symbol = j;
feptx[i+ru->nb_tx].slot = slot;
feptx[i+ru->nb_tx].nb_antenna_ports = ru->nb_tx;
feptx[i+ru->nb_tx].instance_cnt_feptx = 0;
AssertFatal(pthread_cond_signal(&feptx[i+ru->nb_tx].cond_feptx) == 0,"ERROR pthread_cond_signal for feptx_ofdm_thread\n");
AssertFatal((ret=pthread_mutex_unlock(&feptx[i+ru->nb_tx].mutex_feptx))==0,"mutex_lock returns %d\n",ret);
}
}
}//if == SF_DL
else {
proc->feptx_mask = ofdm_mask_full;
}
}//j<fp->symbols_per_slot
}//else (RU only machine)
//}
// wait all process to finish
AssertFatal((ret=pthread_mutex_lock(&proc->mutex_feptx))==0,"mutex_lock return %d\n",ret);
while (proc->feptx_mask != ofdm_mask_full) {
@@ -256,14 +286,13 @@ static void *nr_feptx_thread(void *param) {
int ofdm_mask_full;
int txdataF_offset;
int32_t *txdataF;
while (!oai_exit) {
ret = 0;
if (wait_on_condition(&feptx->mutex_feptx,&feptx->cond_feptx,&feptx->instance_cnt_feptx,"NR feptx thread")<0) break;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+feptx->index+1 , 1 );
AssertFatal(feptx->ru->nb_log_antennas>0 && feptx->ru->nb_log_antennas < 13,"ru->nb_log_antennas is %d\n", feptx->ru->nb_log_antennas);
ru = feptx->ru;
slot = feptx->slot;
aa = feptx->aa;
@@ -278,15 +307,10 @@ static void *nr_feptx_thread(void *param) {
////////////precoding////////////
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->index+1 , 1);
start_meas(&ru->precoding_stats);
if (ru->nb_tx == 1) {
AssertFatal(fp->N_ssb==ru->nb_tx,"Attempting to transmit %d SSB while Nb_tx = %d",fp->N_ssb,ru->nb_tx);
for (int p=0; p<fp->Lmax; p++) {
if ((fp->L_ssb >> p) & 0x01){
if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
memcpy((void*)&ru->common.txdataF_BF[0][l*fp->ofdm_symbol_size],
(void*)&ru->gNB_list[0]->common_vars.txdataF[p][txdataF_offset + l*fp->ofdm_symbol_size],
(void*)&ru->gNB_list[0]->common_vars.txdataF[0][txdataF_offset + l*fp->ofdm_symbol_size],
(fp->samples_per_slot_wCP>>1)*sizeof(int32_t));
}
}
}
else {
bw = ru->beam_weights[0];
@@ -324,15 +348,10 @@ static void *nr_feptx_thread(void *param) {
else{
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->index+1 , 1);
start_meas(&ru->precoding_stats);
if (ru->nb_tx == 1) {
AssertFatal(fp->N_ssb==ru->nb_tx,"Attempting to transmit %d SSB while Nb_tx = %d",fp->N_ssb,ru->nb_tx);
for (int p=0; p<fp->Lmax; p++) {
if ((fp->L_ssb >> p) & 0x01){
if (ru->nb_tx == 1 && ru->nb_log_antennas) {
memcpy((void*)&ru->common.txdataF_BF[0][l*fp->ofdm_symbol_size],
(void*)&ru->common.txdataF[p][l*fp->ofdm_symbol_size],
(void*)&ru->common.txdataF[0][l*fp->ofdm_symbol_size],
fp->ofdm_symbol_size*sizeof(int32_t));
}
}
}
else {
bw = ru->beam_weights[0];
@@ -374,30 +393,32 @@ static void *nr_feptx_thread(void *param) {
// seems to be hardcoded to numerology 1 (2 slots=1 subframe)
void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
int cyclic_prefix_type = NFAPI_CP_NORMAL;
unsigned int aa=0;
int slot_sizeF = (fp->ofdm_symbol_size)*
((cfg->subframe_config.dl_cyclic_prefix_type.value == 1) ? 12 : 14);
((cyclic_prefix_type == 1) ? 12 : 14);
int slot = tti_tx;
int *txdata = &ru->common.txdata[aa][slot*fp->samples_per_slot];
int *txdata = &ru->common.txdata[aa][fp->get_samples_slot_timestamp(slot,fp,0)];
if (nr_slot_select(cfg,slot, frame_tx) == SF_UL) return;
if (nr_slot_select(cfg,frame_tx,slot) == NR_UPLINK_SLOT) return;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
start_meas(&ru->ofdm_mod_stats);
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
nr_feptx0(ru,slot,0,fp->symbols_per_slot,aa);
nr_feptx0(ru,slot,0,NR_NUMBER_OF_SYMBOLS_PER_SLOT,aa);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 0 );
stop_meas(&ru->ofdm_mod_stats);
LOG_D(PHY,"feptx_ofdm (TXPATH): frame %d, slot %d: txp (time %p) %d dB, txp (freq) %d dB\n",
frame_tx,slot,txdata,dB_fixed(signal_energy((int32_t*)txdata,fp->samples_per_slot)),
dB_fixed(signal_energy_nodc(ru->common.txdataF_BF[aa],2*slot_sizeF)));
frame_tx,slot,txdata,dB_fixed(signal_energy((int32_t*)txdata,fp->get_samples_per_slot(
slot,fp))),dB_fixed(signal_energy_nodc(ru->common.txdataF_BF[aa],2*slot_sizeF)));
}
@@ -420,39 +441,36 @@ void nr_init_feptx_thread(RU_t *ru) {
}
void nr_feptx_prec(RU_t *ru,int frame,int tti_tx) {
void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx) {
int l,aa;
PHY_VARS_gNB **gNB_list = ru->gNB_list,*gNB;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
nfapi_nr_config_request_t *cfg;
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
int32_t ***bw;
int i=0;
int slot_tx = tti_tx;
int txdataF_offset = ((tti_tx%2)*fp->samples_per_slot_wCP);
start_meas(&ru->precoding_stats);
AssertFatal(ru->nb_log_antennas > 0,"ru->nb_log_antennas is 0!\n");
if (ru->num_gNB == 1){
gNB = gNB_list[0];
cfg = &gNB->gNB_config;
if (nr_slot_select(cfg,tti_tx,frame) == SF_UL) return;
for(i=0; i<fp->Lmax; ++i)
if (nr_slot_select(cfg,frame_tx,slot_tx) == NR_UPLINK_SLOT) return;
for(i=0; i<ru->nb_log_antennas; ++i)
memcpy((void*)ru->common.txdataF[i],
(void*)gNB->common_vars.txdataF[i],
(void*)&gNB->common_vars.txdataF[i][txdataF_offset],
fp->samples_per_slot_wCP*sizeof(int32_t));
if (ru->nb_tx == 1) {
if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC , 1);
AssertFatal(fp->N_ssb==ru->nb_tx,"Attempting to transmit %d SSB while Nb_tx = %d",fp->N_ssb,ru->nb_tx);
for (int p=0; p<fp->Lmax; p++) {
if ((fp->L_ssb >> p) & 0x01){
memcpy((void*)ru->common.txdataF_BF[0],
(void*)ru->common.txdataF[p],
fp->samples_per_slot_wCP*sizeof(int32_t));
}
}
memcpy((void*)ru->common.txdataF_BF[0],
(void*)ru->common.txdataF[0],
fp->samples_per_slot_wCP*sizeof(int32_t));
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC , 0);
}// if (ru->nb_tx == 1)
@@ -467,7 +485,7 @@ void nr_feptx_prec(RU_t *ru,int frame,int tti_tx) {
tti_tx,
l,
aa,
fp->Lmax);
ru->nb_log_antennas);
}// for (aa=0;aa<ru->nb_tx;aa++)
}// for (l=0;l<fp->symbols_per_slot;l++)
}// if (ru->nb_tx == 1)
@@ -563,7 +581,7 @@ void nr_fep_full_2thread(RU_t *ru, int slot) {
// NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
// if ((fp->frame_type == TDD) &&
// (subframe_select(fp,proc->tti_rx) != SF_UL)) return;
// (subframe_select(fp,proc->tti_rx) != NR_UPLINK_SLOT)) return;
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
@@ -622,7 +640,7 @@ void nr_fep_full(RU_t *ru, int slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
// if ((fp->frame_type == TDD) &&
// (subframe_select(fp,proc->tti_rx) != SF_UL)) return;
// (subframe_select(fp,proc->tti_rx) != NR_UPLINK_SLOT)) return;
start_meas(&ru->ofdm_demod_stats);
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
openair1/SCHED_NR/phy_frame_config_nr.h
+2 -2
View File
@@ -47,7 +47,7 @@
* @param nrofUplinkSymbols number of uplink symbols
@returns 0 if tdd dedicated configuration has been properly set or -1 on error with message */
int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeriodicity,
int set_tdd_config_nr(nfapi_nr_config_request_scf_t *cfg, int mu,
int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols);
@@ -78,7 +78,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
* @param nr_tti : slot number
@returns nr_slot_t : downlink or uplink */
nr_slot_t slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
nr_slot_t nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
openair1/SCHED_NR/phy_procedures_nr_common.c
-9
View File
@@ -33,12 +33,3 @@
#include "sched_nr.h"
#include "PHY/INIT/phy_init.h"
nr_subframe_t nr_slot_select(nfapi_nr_config_request_t *cfg, unsigned char slot, int frame)
{
if (cfg->subframe_config.duplex_mode.value == FDD || slot == NR_DOWNLINK_SLOT || nr_is_ssb_slot(cfg,slot,frame)==1)
return(SF_DL);
else if (slot == NR_UPLINK_SLOT)
return (SF_UL);
return -1;
}
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+160 -177
View File
@@ -49,103 +49,78 @@
#include "intertask_interface.h"
uint8_t SSB_Table[38]={0,2,4,6,8,10,12,14,254,254,16,18,20,22,24,26,28,30,254,254,32,34,36,38,40,42,44,46,254,254,48,50,52,54,56,58,60,62};
extern uint8_t nfapi_mode;
/*
int return_ssb_type(nfapi_config_request_t *cfg)
{
int mu = cfg->subframe_config.numerology_index_mu.value;
nr_ssb_type_e ssb_type;
switch(mu) {
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp) {
case NR_MU_0:
ssb_type = nr_ssb_type_A;
break;
uint8_t sco = 0;
if (((fp->freq_range == nr_FR1) && (cfg->ssb_table.ssb_subcarrier_offset.value<24)) ||
((fp->freq_range == nr_FR2) && (cfg->ssb_table.ssb_subcarrier_offset.value<12)) )
sco = cfg->ssb_table.ssb_subcarrier_offset.value;
case NR_MU_1:
ssb_type = nr_ssb_type_B;
break;
case NR_MU_3:
ssb_type = nr_ssb_type_D;
break;
case NR_MU_4:
ssb_type = nr_ssb_type_E;
break;
default:
AssertFatal(0==1, "Invalid numerology index %d for the synchronization block\n", mu);
}
LOG_D(PHY, "SSB type %d\n", ssb_type);
return ssb_type;
}*/
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp) {
fp->ssb_start_subcarrier = (12 * cfg->sch_config.n_ssb_crb.value + cfg->sch_config.ssb_subcarrier_offset.value)/(1<<cfg->subframe_config.numerology_index_mu.value);
LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,cfg->sch_config.n_ssb_crb.value,cfg->sch_config.ssb_subcarrier_offset.value);
fp->ssb_start_subcarrier = (12 * cfg->ssb_table.ssb_offset_point_a.value + sco);
LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,cfg->ssb_table.ssb_offset_point_a.value,sco);
}
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF;
uint8_t *pbch_pdu=&gNB->pbch_pdu[0];
uint8_t ssb_index, n_hf;
int ssb_start_symbol, rel_slot;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
uint16_t slots_per_hf = fp->slots_per_frame / 2;
n_hf = cfg->sch_config.half_frame_index.value;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF;
uint8_t ssb_index, n_hf;
uint16_t ssb_start_symbol, rel_slot;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
uint16_t slots_per_hf = (fp->slots_per_frame)>>1;
n_hf = fp->half_frame_bit;
// if SSB periodicity is 5ms, they are transmitted in both half frames
if ( cfg->sch_config.ssb_periodicity.value == 5) {
if ( cfg->ssb_table.ssb_period.value == 0) {
if (slot<slots_per_hf)
n_hf=0;
else
n_hf=1;
}
// to set a effective slot number between 0 to 9 in the half frame where the SSB is supposed to be
// to set a effective slot number in the half frame where the SSB is supposed to be
rel_slot = (n_hf)? (slot-slots_per_hf) : slot;
LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot);
if(rel_slot<slots_per_hf && rel_slot>=0) {
for (int i=0; i<2; i++) { // max two SSB per frame
ssb_index = i + 2*rel_slot; // computing the ssb_index
if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
if(rel_slot<38 && rel_slot>=0) { // there is no SSB beyond slot 37
for (int i=0; i<2; i++) { // max two SSB per frame
ssb_index = i + SSB_Table[rel_slot]; // computing the ssb_index
if ((ssb_index<64) && ((fp->L_ssb >> (63-ssb_index)) & 0x01)) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
fp->ssb_index = ssb_index;
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % fp->symbols_per_slot; // start symbol wrt slot
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp, ssb_index, n_hf); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % 14; // start symbol wrt slot
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
&gNB->ssb_pdu,
gNB->nr_pbch_interleaver,
&txdataF[0][txdataF_offset],
AMP,
ssb_start_symbol,
n_hf, frame, cfg, fp);
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
// it is supposed that each logical antenna port correspont to a different beam so each SSB is stored into its own index of txdataF
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, &txdataF[ssb_index][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, &txdataF[ssb_index][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (fp->Lmax == 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],&txdataF[ssb_index][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],&txdataF[ssb_index][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
pbch_pdu,
gNB->nr_pbch_interleaver,
&txdataF[ssb_index][txdataF_offset],
AMP,
ssb_start_symbol,
n_hf,fp->Lmax,ssb_index,
frame, cfg, fp);
}
}
}
}
}
}
@@ -153,64 +128,71 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
int frame,int slot,
int do_meas) {
int aa;
uint8_t num_dci=0,num_pdsch_rnti;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int offset = gNB->CC_id;
uint8_t ssb_frame_periodicity; // every how many frames SSB are generated
uint8_t ssb_frame_periodicity = 1; // every how many frames SSB are generated
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
if (cfg->sch_config.ssb_periodicity.value < 20)
ssb_frame_periodicity = 1;
else
ssb_frame_periodicity = (cfg->sch_config.ssb_periodicity.value)/10 ; // 10ms is the frame length
if (cfg->ssb_table.ssb_period.value > 1)
ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ;
if ((cfg->subframe_config.duplex_mode.value == TDD) && (nr_slot_select(cfg,slot,frame)==SF_UL)) return;
if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
(nr_slot_select(cfg,frame,slot) == NR_UPLINK_SLOT)) return;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1);
if (do_meas==1) start_meas(&gNB->phy_proc_tx);
// clear the transmit data array for the current subframe
for (aa=0; aa<fp->Lmax; aa++) {
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
memset(&gNB->common_vars.txdataF[aa][txdataF_offset],0,fp->samples_per_slot_wCP*sizeof(int32_t));
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_COMMON_TX,1);
if (nfapi_mode == 0 || nfapi_mode == 1) {
if (!(frame%ssb_frame_periodicity)) // generate SSB only for given frames according to SSB periodicity
if ((!(frame%ssb_frame_periodicity))) // generate SSB only for given frames according to SSB periodicity
nr_common_signal_procedures(gNB,frame, slot);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_COMMON_TX,0);
num_dci = gNB->pdcch_vars.num_dci;
num_pdsch_rnti = gNB->pdcch_vars.num_pdsch_rnti;
for (int i=0; i<num_dci; i++) {
LOG_D(PHY, "[gNB %d] Frame %d slot %d \
Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, slot, num_dci);
if (gNB->pdcch_pdu || gNB->ul_dci_pdu) {
LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n",
gNB->Mod_id, frame, slot,
gNB->ul_dci_pdu==NULL?0:gNB->ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15.numDlDci,
gNB->pdcch_pdu==NULL?0:gNB->pdcch_pdu->pdcch_pdu_rel15.numDlDci);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,1);
nr_generate_dci_top(gNB->pdcch_vars.dci_alloc[i],
gNB->nr_gold_pdcch_dmrs[slot],
&gNB->common_vars.txdataF[0][txdataF_offset], // hardcoded to beam 0
AMP, *fp, *cfg);
nr_generate_dci_top(gNB->pdcch_pdu,
gNB->ul_dci_pdu,
gNB->nr_gold_pdcch_dmrs[slot],
&gNB->common_vars.txdataF[0][txdataF_offset],
AMP, *fp);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0);
}
for (int i=0; i<num_pdsch_rnti; i++) {
LOG_D(PHY, "PDSCH generation started (%d)\n", gNB->num_pdsch_rnti);
for (int i=0; i<gNB->num_pdsch_rnti; i++) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,1);
LOG_D(PHY, "PDSCH generation started (%d)\n", num_pdsch_rnti);
nr_generate_pdsch(gNB->dlsch[i][0],
&gNB->pdcch_vars.dci_alloc[i],
gNB->nr_gold_pdsch_dmrs[slot],
gNB->common_vars.txdataF,
AMP, frame, slot, fp, cfg,
AMP, frame, slot, fp, 0,
&gNB->dlsch_encoding_stats,
&gNB->dlsch_scrambling_stats,
&gNB->dlsch_modulation_stats);
&gNB->dlsch_modulation_stats,
&gNB->tinput,
&gNB->tprep,
&gNB->tparity,
&gNB->toutput,
&gNB->dlsch_rate_matching_stats,
&gNB->dlsch_interleaving_stats,
&gNB->dlsch_segmentation_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
}
@@ -218,86 +200,84 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
}
void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int UE_id, uint8_t harq_pid)
/*
if ((cfg->subframe_config.duplex_mode.value == TDD) &&
((nr_slot_select(fp,frame,slot)&NR_DOWNLINK_SLOT)==SF_DL)) return;
// VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX,1);
if (do_prach_rx(fp,frame,slot)) L1_nr_prach_procedures(gNB,frame,slot/fp->slots_per_subframe);
*/
void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH_id, uint8_t harq_pid)
{
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &gNB->ulsch[UE_id][0]->harq_processes[harq_pid]->ulsch_pdu;
nfapi_nr_ul_config_ulsch_pdu_rel15_t *nfapi_ulsch_pdu_rel15 = &rel15_ul->ulsch_pdu_rel15;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *pusch_pdu = &gNB->ulsch[ULSCH_id][0]->harq_processes[harq_pid]->ulsch_pdu;
uint8_t ret;
uint8_t l, number_dmrs_symbols = 0;
uint8_t mapping_type;
uint32_t G;
int Nid_cell = 0; // [hna] shouldn't be a local variable (should be signaled)
uint16_t start_symbol, number_symbols, nb_re_dmrs;
mapping_type = gNB->pusch_config.pusch_TimeDomainResourceAllocation[0]->mappingType;
start_symbol = nfapi_ulsch_pdu_rel15->start_symbol;
number_symbols = nfapi_ulsch_pdu_rel15->number_symbols;
start_symbol = pusch_pdu->start_symbol_index;
number_symbols = pusch_pdu->nr_of_symbols;
for (l = start_symbol; l < start_symbol + number_symbols; l++)
number_dmrs_symbols += is_dmrs_symbol(l,
0,
0,
0,
0,
0,
number_symbols,
&gNB->dmrs_UplinkConfig,
mapping_type,
frame_parms->ofdm_symbol_size);
number_dmrs_symbols += ((pusch_pdu->ul_dmrs_symb_pos)>>l)&0x01;
nb_re_dmrs = ((gNB->dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)?6:4)*number_dmrs_symbols;
nb_re_dmrs = ((pusch_pdu->dmrs_config_type == pusch_dmrs_type1)?6:4);
G = nr_get_G(nfapi_ulsch_pdu_rel15->number_rbs,
G = nr_get_G(pusch_pdu->rb_size,
number_symbols,
nb_re_dmrs,
nfapi_ulsch_pdu_rel15->length_dmrs,
nfapi_ulsch_pdu_rel15->Qm,
nfapi_ulsch_pdu_rel15->n_layers);
number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
pusch_pdu->qam_mod_order,
pusch_pdu->nrOfLayers);
//----------------------------------------------------------
//------------------- ULSCH unscrambling -------------------
//----------------------------------------------------------
nr_ulsch_unscrambling(gNB->pusch_vars[UE_id]->llr,
nr_ulsch_unscrambling(gNB->pusch_vars[ULSCH_id]->llr,
G,
0,
Nid_cell,
rel15_ul->rnti);
pusch_pdu->data_scrambling_id,
pusch_pdu->rnti);
//----------------------------------------------------------
//--------------------- ULSCH decoding ---------------------
//----------------------------------------------------------
ret = nr_ulsch_decoding(gNB,
UE_id,
gNB->pusch_vars[UE_id]->llr,
frame_parms,
frame_rx,
number_symbols,
nb_re_dmrs,
slot_rx,
harq_pid,
0);
ULSCH_id,
gNB->pusch_vars[ULSCH_id]->llr,
frame_parms,
pusch_pdu,
frame_rx,
slot_rx,
harq_pid,
G);
if (ret > gNB->ulsch[UE_id][0]->max_ldpc_iterations)
LOG_I(PHY, "ULSCH in error\n");
//gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->b
else if(gNB->ulsch[UE_id][0]->harq_processes[harq_pid]->b!=NULL){
if (ret > gNB->ulsch[ULSCH_id][0]->max_ldpc_iterations)
LOG_I(PHY, "ULSCH %d in error\n",ULSCH_id);
//gNB->ulsch[ULSCH_id+1][0]->harq_processes[harq_pid]->b
else if(gNB->ulsch[ULSCH_id][0]->harq_processes[harq_pid]->b!=NULL){
LOG_I(PHY, "ULSCH received ok \n");
if(IS_SOFTMODEM_NOS1){ //&& gNB->ulsch[UE_id][0]->rnti == 0x1234
nr_fill_crc_indication (gNB,frame_rx, slot_rx, UE_id, 0);
nr_fill_rx_indication(gNB, frame_rx, slot_rx, UE_id, harq_pid);
if(IS_SOFTMODEM_NOS1){ //&& gNB->ulsch[ULSCH_id][0]->rnti == 0x1234
nr_fill_crc_indication(gNB,frame_rx, slot_rx, ULSCH_id, 0);
nr_fill_rx_indication(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid);
}
}
}
void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t harq_pid)
void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id, uint8_t harq_pid)
{
// --------------------
// [hna] TO BE CLEANED
@@ -308,32 +288,33 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
int timing_advance_update;
int sync_pos;
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[UE_id][0];
uint16_t mu = gNB->frame_parms.numerology_index;
// pthread_mutex_lock(&gNB->UL_INFO_mutex);
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ULSCH_id][0];
NR_UL_gNB_HARQ_t *harq_process = ulsch->harq_processes[harq_pid];
uint16_t mu = gNB->gNB_config.subframe_config.numerology_index_mu.value;
pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.rx_ind.sfn_sf = frame<<4| slot_rx;
gNB->UL_INFO.rx_ind.rx_indication_body.tl.tag = NFAPI_RX_INDICATION_BODY_TAG;
gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list->rx_indication_rel8.length = gNB->ulsch[UE_id][0]->harq_processes[harq_pid]->TBS>>3;
gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list->rx_indication_rel8.length = gNB->ulsch[ULSCH_id][0]->harq_processes[harq_pid]->TBS;
pdu = &gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list[gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus];
//pdu->rx_ue_information.handle = gNB->ulsch[UE_id+1][0]->handle;
//pdu->rx_ue_information.handle = gNB->ulsch[ULSCH_id+1][0]->handle;
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = gNB->ulsch[UE_id][0]->rnti;
pdu->rx_ue_information.rnti = gNB->ulsch[ULSCH_id][0]->rnti;
pdu->rx_indication_rel8.tl.tag = NFAPI_RX_INDICATION_REL8_TAG;
pdu->rx_indication_rel8.offset = 1; // DJP - I dont understand - but broken unless 1 ???? 0; // filled in at the end of the UL_INFO formation
pdu->data = harq_process->b;//gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->b;
pdu->data = harq_process->b;//gNB->ulsch[ULSCH_id+1][0]->harq_processes[harq_pid]->b;
// estimate timing advance for MAC
sync_pos = nr_est_timing_advance_pusch(gNB, UE_id);
sync_pos = nr_est_timing_advance_pusch(gNB, ULSCH_id);
timing_advance_update = sync_pos; // - gNB->frame_parms.nb_prefix_samples/4; //to check
// printf("\x1B[33m" "timing_advance_update = %d\n" "\x1B[0m", timing_advance_update);
//pdu->data = gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->b;
sync_pos = nr_est_timing_advance_pusch(gNB, UE_id); // estimate timing advance for MAC
// pdu->data = gNB->ulsch[ULSCH_id+1][0]->harq_processes[harq_pid]->b;
sync_pos = nr_est_timing_advance_pusch(gNB, ULSCH_id); // estimate timing advance for MAC
timing_advance_update = sync_pos * (1 << mu); // scale by the used scs numerology
// scale the 16 factor in N_TA calculation in 38.213 section 4.2 according to the used FFT size
@@ -342,6 +323,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
case 217: timing_advance_update /= 32; break;
case 245: timing_advance_update /= 32; break;
case 273: timing_advance_update /= 32; break;
case 66: timing_advance_update /= 12; break;
default: abort();
}
@@ -356,7 +338,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
pdu->rx_indication_rel8.timing_advance = timing_advance_update;
// estimate UL_CQI for MAC (from antenna port 0 only)
int SNRtimes10 = dB_fixed_times10(gNB->pusch_vars[UE_id]->ulsch_power[0]) - 300;//(10*gNB->measurements.n0_power_dB[0]);
int SNRtimes10 = dB_fixed_times10(gNB->pusch_vars[ULSCH_id]->ulsch_power[0]) - 300;//(10*gNB->measurements.n0_power_dB[0]);
if (SNRtimes10 < -640) pdu->rx_indication_rel8.ul_cqi=0;
else if (SNRtimes10 > 635) pdu->rx_indication_rel8.ul_cqi=255;
@@ -372,7 +354,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
pthread_mutex_unlock(&gNB->UL_INFO_mutex);
}
void nr_fill_crc_indication (PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t crc_flag) {
void nr_fill_crc_indication (PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id, uint8_t crc_flag) {
pthread_mutex_lock(&gNB->UL_INFO_mutex);
nfapi_crc_indication_pdu_t *pdu = &gNB->UL_INFO. crc_ind.crc_indication_body.crc_pdu_list[gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs];
gNB->UL_INFO.crc_ind.sfn_sf = frame<<4 | slot_rx;
@@ -381,7 +363,7 @@ void nr_fill_crc_indication (PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_i
pdu->instance_length = 0; // don't know what to do with this
// pdu->rx_ue_information.handle = handle;
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = gNB->ulsch[UE_id][0]->rnti;
pdu->rx_ue_information.rnti = gNB->ulsch[ULSCH_id][0]->rnti;
pdu->crc_indication_rel8.tl.tag = NFAPI_CRC_INDICATION_REL8_TAG;
pdu->crc_indication_rel8.crc_flag = crc_flag;
gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs++;
@@ -420,24 +402,25 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
for (int i = 0; i < num_pusch_pdu; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
{
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE\n",frame_rx,slot_rx);
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:{
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE\n",frame_rx,slot_rx);
nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu;
nr_fill_ulsch(gNB,frame_rx,slot_rx,pusch_pdu);
uint8_t UE_id = find_nr_ulsch(pusch_pdu->rnti,gNB,SEARCH_EXIST);
uint8_t harq_pid = pusch_pdu->pusch_data.harq_process_id;
uint8_t symbol_start = pusch_pdu->start_symbol_index;
uint8_t symbol_end = symbol_start + pusch_pdu->nr_of_symbols;
for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
nr_rx_pusch(gNB, UE_id, frame_rx, slot_rx, symbol, harq_pid);
}
//LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[UE_id]->rxdataF_comp[0],6900,1,1);
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[UE_id]->rxdataF_ext[0],6900,1,1);
nr_ulsch_procedures(gNB, frame_rx, slot_rx, UE_id, harq_pid);
nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu;
nr_fill_ulsch(gNB,frame_rx,slot_rx,pusch_pdu);
uint8_t ULSCH_id = find_nr_ulsch(pusch_pdu->rnti,gNB,SEARCH_EXIST);
uint8_t harq_pid = pusch_pdu->pusch_data.harq_process_id;
uint8_t symbol_start = pusch_pdu->start_symbol_index;
uint8_t symbol_end = symbol_start + pusch_pdu->nr_of_symbols;
for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
}
//LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[0]->rxdataF_comp[0],6900,1,1);
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[0]->rxdataF_ext[0],6900,1,1);
nr_ulsch_procedures(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid);
nr_fill_rx_indication(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid); // indicate SDU to MAC
nr_fill_crc_indication(gNB, frame_rx, slot_rx, ULSCH_id, 0);
}
}
}
openair1/SCHED_NR/sched_nr.h
+2 -14
View File
@@ -32,10 +32,10 @@
#include "PHY_INTERFACE/phy_interface.h"
#include "SCHED/sched_eNB.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
#include "phy_frame_config_nr.h"
nr_slot_t nr_slot_select (nfapi_nr_config_request_t *cfg, unsigned char slot, int frame);
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp);
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp);
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, int frame_tx, int slot_tx, int do_meas);
void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx);
void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx);
@@ -54,16 +54,4 @@ void nr_fep_full_2thread(RU_t *ru, int slot);
void feptx_prec(RU_t *ru,int frame_tx,int tti_tx);
int nr_phy_init_RU(RU_t *ru);
void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint8_t k_ssb,
uint16_t sfn_ssb,
uint8_t n_ssb,
uint16_t nb_slots_per_frame,
uint16_t N_RB);
#endif
openair1/SCHED_NR_UE/defs.h
+1 -2
View File
@@ -376,11 +376,10 @@ void nr_compute_srs_pos(lte_frame_type_t frameType,uint16_t isrs,uint16_t *psrsP
void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx);
int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
int is_pbch_in_slot(fapi_nr_pbch_config_t *pbch_config, int frame, int slot, int periodicity, uint16_t slots_per_frame);
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp);
/*@}*/
#endif
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+15 -72
View File
@@ -51,10 +51,9 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
uint8_t cc_id = scheduled_response->CC_id;
uint32_t i;
int slot = scheduled_response->slot;
// Note: we have to handle the thread IDs for this. To be revisited completely.
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
//NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
@@ -66,40 +65,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
LOG_D(PHY,"Received %d DL pdus\n",dl_config->number_pdus);
pdcch_vars->nb_search_space = 0;
for(i=0; i<dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
pdcch_vars2->n_RB_BWP[i] = dci_config->N_RB_BWP;
pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot;
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4];
pdcch_vars2->coreset[i].duration = dci_config->coreset.duration;
pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource;
pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset;
if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
}else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 6;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 1;
}
pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
//pdcch_vars2->coreset[i].tciStatesPDCCH;
//pdcch_vars2->coreset[i].tciPresentInDCI;
pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *pdcch_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
memcpy((void*)&pdcch_vars->pdcch_config[pdcch_vars->nb_search_space],(void*)pdcch_config,sizeof(*pdcch_config));
pdcch_vars->nb_search_space = pdcch_vars->nb_search_space + 1;
LOG_D(PHY,"Number of DCI SearchSpaces %d\n",pdcch_vars->nb_search_space);
}else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
// dlsch config pdu
@@ -113,11 +86,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch0->harq_processes[current_harq_pid];
dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart;
dlsch0_harq->BWPSize = dlsch_config_pdu->BWPSize;
dlsch0_harq->nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq->start_rb = dlsch_config_pdu->start_rb;
dlsch0_harq->nb_symbols = dlsch_config_pdu->number_symbols;
dlsch0_harq->start_symbol = dlsch_config_pdu->start_symbol;
dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos;
dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType;
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->DCINdi = dlsch_config_pdu->ndi;
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
@@ -132,7 +108,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
}
}
}else{
pdcch_vars2->nb_search_space = 0;
pdcch_vars->nb_search_space = 0;
}
if(scheduled_response->ul_config != NULL){
@@ -218,43 +194,10 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
fapi_nr_config_request_t *nrUE_config = &PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->nrUE_config;
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
LOG_I(MAC,"[L1][IF module][PHY CONFIG]\n");
LOG_I(MAC,"subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
LOG_I(MAC,"ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
LOG_I(MAC,"dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
LOG_I(MAC,"pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
LOG_I(MAC,"cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
LOG_I(MAC,"intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
LOG_I(MAC,"system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
LOG_I(MAC,"ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
LOG_I(MAC,"half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
LOG_I(MAC,"-------------------------------\n");
memcpy(&nrUE_config->pbch_config,&phy_config->config_req.pbch_config,sizeof(fapi_nr_pbch_config_t));
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
}
}
if(phy_config != NULL)
memcpy(nrUE_config,&phy_config->config_req,sizeof(fapi_nr_config_request_t));
return 0;
}
openair1/SCHED_NR_UE/phy_frame_config_nr.c
-342
View File
@@ -1,342 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/***********************************************************************
*
* FILENAME : phy_frame_configuration_nr.c
*
* DESCRIPTION : functions related to FDD/TDD configuration for NR
* see TS 38.213 11.1 Slot configuration
* and TS 38.331 for RRC configuration
*
************************************************************************/
#include "SCHED_NR_UE/defs.h"
#include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/phy_frame_config_nr.h"
/*******************************************************************
*
* NAME : set_tdd_configuration
*
* PARAMETERS : pointer to frame configuration
*
* OUTPUT: table of uplink symbol for each slot for 2 frames
*
* RETURN : 0 if tdd has been properly configurated
* -1 tdd configuration can not be done
*
* DESCRIPTION : generate bit map for uplink symbol for each slot for several frames
* see TS 38.213 11.1 Slot configuration
*
*********************************************************************/
int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeriodicity,
int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols)
{
TDD_UL_DL_configCommon_t *p_tdd_ul_dl_configuration;
int slot_number = 0;
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
/* allocate buffer for configuration structure */
p_tdd_ul_dl_configuration = calloc( 1, sizeof(TDD_UL_DL_configCommon_t));
if (p_tdd_ul_dl_configuration == NULL) {
printf("Error test_frame_configuration: memory allocation problem \n");
assert(0);
}
else {
frame_parms->frame_type = TDD;
}
p_tdd_ul_dl_configuration->dl_UL_TransmissionPeriodicity = dl_UL_TransmissionPeriodicity;
p_tdd_ul_dl_configuration->nrofDownlinkSlots = nrofDownlinkSlots;
p_tdd_ul_dl_configuration->nrofDownlinkSymbols = nrofDownlinkSymbols;
p_tdd_ul_dl_configuration->nrofUplinkSlots = nrofUplinkSlots;
p_tdd_ul_dl_configuration->nrofUplinkSymbols = nrofUplinkSymbols;
frame_parms->p_tdd_UL_DL_Configuration = p_tdd_ul_dl_configuration;
int nb_periods_per_frame = (FRAME_DURATION_MICRO_SEC/dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = (frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
if (nb_slots_per_period != (nrofDownlinkSlots + nrofUplinkSlots)) {
LOG_E(PHY,"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration \n");
return (-1);
}
while(slot_number != nb_slots_to_set) {
for (int number_of_slot = 0; number_of_slot < nrofDownlinkSlots; number_of_slot++) {
frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_DOWNLINK_SLOT;
slot_number++;
}
if (p_tdd_ul_dl_configuration->nrofDownlinkSymbols != 0) {
LOG_E(PHY,"set_tdd_configuration_nr: downlink symbol for slot is not supported for tdd configuration \n");
return (-1);
}
for (int number_of_slot = 0; number_of_slot < nrofUplinkSlots; number_of_slot++) {
frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_UPLINK_SLOT;
slot_number++;
}
if (p_tdd_ul_dl_configuration->nrofUplinkSymbols != 0) {
LOG_E(PHY,"set_tdd_configuration_nr: uplink symbol for slot is not supported for tdd configuration \n");
return (-1);
}
}
if (frame_parms->p_tdd_UL_DL_ConfigurationCommon2 != NULL) {
LOG_E(PHY,"set_tdd_configuration_nr: additionnal tdd configuration 2 is not supported for tdd configuration \n");
return (-1);
}
return (0);
}
/*******************************************************************
*
* NAME : add_tdd_dedicated_configuration_nr
*
* PARAMETERS : pointer to frame configuration
*
* OUTPUT: table of uplink symbol for each slot for several frames
*
* RETURN : 0 if tdd has been properly configurated
* -1 tdd configuration can not be done
*
* DESCRIPTION : generate bit map for uplink symbol for each slot for several frames
* see TS 38.213 11.1 Slot configuration
*
*********************************************************************/
void add_tdd_dedicated_configuration_nr(NR_DL_FRAME_PARMS *frame_parms, int slotIndex, int nrofDownlinkSymbols, int nrofUplinkSymbols)
{
TDD_UL_DL_SlotConfig_t *p_TDD_UL_DL_ConfigDedicated = frame_parms->p_TDD_UL_DL_ConfigDedicated;
TDD_UL_DL_SlotConfig_t *p_previous_TDD_UL_DL_ConfigDedicated;
int next = 0;
while (p_TDD_UL_DL_ConfigDedicated != NULL) {
p_previous_TDD_UL_DL_ConfigDedicated = p_TDD_UL_DL_ConfigDedicated;
p_TDD_UL_DL_ConfigDedicated = (TDD_UL_DL_SlotConfig_t *)(p_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig);
next = 1;
}
p_TDD_UL_DL_ConfigDedicated = calloc( 1, sizeof(TDD_UL_DL_SlotConfig_t));
//printf("allocate pt %p \n", p_TDD_UL_DL_ConfigDedicated);
if (p_TDD_UL_DL_ConfigDedicated == NULL) {
printf("Error test_frame_configuration: memory allocation problem \n");
assert(0);
}
if (next == 0) {
frame_parms->p_TDD_UL_DL_ConfigDedicated = p_TDD_UL_DL_ConfigDedicated;
}
else {
p_previous_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig = (struct TDD_UL_DL_SlotConfig_t *)p_TDD_UL_DL_ConfigDedicated;
}
p_TDD_UL_DL_ConfigDedicated->slotIndex = slotIndex;
p_TDD_UL_DL_ConfigDedicated->nrofDownlinkSymbols = nrofDownlinkSymbols;
p_TDD_UL_DL_ConfigDedicated->nrofUplinkSymbols = nrofUplinkSymbols;
}
/*******************************************************************
*
* NAME : set_tdd_configuration_dedicated_nr
*
* PARAMETERS : pointer to frame configuration
*
* OUTPUT: table of uplink symbol for each slot for several frames
*
* RETURN : 0 if tdd has been properly configurated
* -1 tdd configuration can not be done
*
* DESCRIPTION : generate bit map for uplink symbol for each slot for several frames
* see TS 38.213 11.1 Slot configuration
*
*********************************************************************/
int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
{
TDD_UL_DL_SlotConfig_t *p_current_TDD_UL_DL_SlotConfig;
p_current_TDD_UL_DL_SlotConfig = frame_parms->p_TDD_UL_DL_ConfigDedicated;
NR_TST_PHY_PRINTF("\nSet tdd dedicated configuration\n ");
while(p_current_TDD_UL_DL_SlotConfig != NULL) {
int slot_index = p_current_TDD_UL_DL_SlotConfig->slotIndex;
if (slot_index < TDD_CONFIG_NB_FRAMES*(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)) {
if (p_current_TDD_UL_DL_SlotConfig->nrofDownlinkSymbols != 0) {
if (p_current_TDD_UL_DL_SlotConfig->nrofDownlinkSymbols == NR_TDD_SET_ALL_SYMBOLS) {
if (p_current_TDD_UL_DL_SlotConfig->nrofUplinkSymbols == 0) {
frame_parms->tdd_uplink_nr[slot_index] = NR_TDD_DOWNLINK_SLOT;
NR_TST_PHY_PRINTF(" DL[%d] ", slot_index);
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: tdd downlink & uplink symbol configuration is not supported \n");
return (-1);
}
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: tdd downlink symbol configuration is not supported \n");
return (-1);
}
}
else if (p_current_TDD_UL_DL_SlotConfig->nrofUplinkSymbols != 0) {
if (p_current_TDD_UL_DL_SlotConfig->nrofUplinkSymbols == NR_TDD_SET_ALL_SYMBOLS) {
frame_parms->tdd_uplink_nr[slot_index] = NR_TDD_UPLINK_SLOT;
NR_TST_PHY_PRINTF(" UL[%d] ", slot_index);
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: tdd uplink symbol configuration is not supported \n");
return (-1);
}
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: no tdd symbol configuration is specified \n");
return (-1);
}
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: tdd slot index exceeds maximum value \n");
return (-1);
}
p_current_TDD_UL_DL_SlotConfig = (TDD_UL_DL_SlotConfig_t *)(p_current_TDD_UL_DL_SlotConfig->p_next_TDD_UL_DL_SlotConfig);
}
NR_TST_PHY_PRINTF("\n");
return (0);
}
/*******************************************************************
*
* NAME : set_tdd_configuration
*
* PARAMETERS : pointer to tdd common configuration
* pointer to tdd common configuration2
* pointer to tdd dedicated configuration
*
* OUTPUT: table of uplink symbol for each slot for 2 frames
*
* RETURN : 0 if srs sequence has been successfully generated
* -1 if sequence can not be properly generated
*
* DESCRIPTION : generate bit map for uplink symbol for each slot for 2 frames
* see TS 38.213 11.1 Slot configuration
*
*********************************************************************/
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
{
/* for FFD all slot can be considered as an uplink */
if (frame_parms->frame_type == FDD) {
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT );
}
if (nr_frame%2 == 0) {
if (frame_parms->tdd_uplink_nr[nr_tti] == NR_TDD_UPLINK_SLOT) {
return (NR_UPLINK_SLOT);
}
else {
return (NR_DOWNLINK_SLOT);
}
}
else if ((frame_parms->tdd_uplink_nr[(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti] == NR_TDD_UPLINK_SLOT)) {
return (NR_UPLINK_SLOT);
}
else {
return (NR_DOWNLINK_SLOT);
}
}
/*******************************************************************
*
* NAME : free_tdd_configuration_nr
*
* PARAMETERS : pointer to frame configuration
*
* RETURN : none
*
* DESCRIPTION : free structure related to tdd configuration
*
*********************************************************************/
void free_tdd_configuration_nr(NR_DL_FRAME_PARMS *frame_parms)
{
TDD_UL_DL_configCommon_t *p_tdd_UL_DL_Configuration = frame_parms->p_tdd_UL_DL_Configuration;
free_tdd_configuration_dedicated_nr(frame_parms);
if (p_tdd_UL_DL_Configuration != NULL) {
frame_parms->p_tdd_UL_DL_Configuration = NULL;
free(p_tdd_UL_DL_Configuration);
}
for (int number_of_slot = 0; number_of_slot < NR_MAX_SLOTS_PER_FRAME; number_of_slot++) {
frame_parms->tdd_uplink_nr[number_of_slot] = NR_TDD_DOWNLINK_SLOT;
}
}
/*******************************************************************
*
* NAME : free_tdd_configuration_dedicated_nr
*
* PARAMETERS : pointer to frame configuration
*
* RETURN : none
*
* DESCRIPTION : free structure related to tdd dedicated configuration
*
*********************************************************************/
void free_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
{
TDD_UL_DL_SlotConfig_t *p_current_TDD_UL_DL_ConfigDedicated = frame_parms->p_TDD_UL_DL_ConfigDedicated;
TDD_UL_DL_SlotConfig_t *p_next_TDD_UL_DL_ConfigDedicated;
int next = 0;
if (p_current_TDD_UL_DL_ConfigDedicated != NULL) {
do {
if (p_current_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig != NULL) {
next = 1;
p_next_TDD_UL_DL_ConfigDedicated = (TDD_UL_DL_SlotConfig_t *)(p_current_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig);
p_current_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig = NULL;
//printf("free pt %p \n", p_current_TDD_UL_DL_ConfigDedicated);
free(p_current_TDD_UL_DL_ConfigDedicated);
p_current_TDD_UL_DL_ConfigDedicated = p_next_TDD_UL_DL_ConfigDedicated;
}
else {
if (p_current_TDD_UL_DL_ConfigDedicated != NULL) {
frame_parms->p_TDD_UL_DL_ConfigDedicated = NULL;
//printf("free pt %p \n", p_current_TDD_UL_DL_ConfigDedicated);
free(p_current_TDD_UL_DL_ConfigDedicated);
next = 0;
}
}
} while (next);
}
}
openair1/SCHED_NR_UE/phy_frame_config_nr.h
-12
View File
@@ -36,18 +36,6 @@
/*************** FUNCTIONS *****************************************/
/** \brief This function processes tdd dedicated configuration for nr
* @param frame_parms NR DL Frame parameters
* @param dl_UL_TransmissionPeriodicity periodicity
* @param nrofDownlinkSlots number of downlink slots
* @param nrofDownlinkSymbols number of downlink symbols
* @param nrofUplinkSlots number of uplink slots
* @param nrofUplinkSymbols number of uplink symbols
@returns 0 if tdd dedicated configuration has been properly set or -1 on error with message */
int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeriodicity,
int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols);
/** \brief This function adds a slot configuration to current dedicated configuration for nr
* @param frame_parms NR DL Frame parameters
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+309 -390
View File
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