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restructuring of UE DLSCH code to handle 2 codewords

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even if 2 codewords are currently not supported and not tested, the way UE handled the possibility of having 2 codewords was messy, in between support and non-support
the intention of this MR is to cleanup the code more than extend the support

Signed-off-by: Francesco Mani <email@francescomani.it>
This commit is contained in:
francescomani
2026-09-14 22:56:26 +09:00
committed by maki
parent 08349f246b
commit 04ee4ea8e5
28 changed files with 747 additions and 879 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair1/SIMULATION/NR_PHY/dlschsim.c
+23 -26
View File
@@ -457,20 +457,22 @@ int main(int argc, char **argv)
NR_UE_DLSCH_t *dlsch0_ue = &dlsch_ue[0];
NR_DL_UE_HARQ_t *harq_process = &UE->dl_harq_processes[0][harq_pid];
harq_process->first_rx = 1;
dlsch0_ue->dlsch_config.mcs = Imcs;
dlsch0_ue->dlsch_config.mcs_table = mcs_table;
dlsch0_ue->Nl = Nl;
dlsch0_ue->dlsch_config.number_rbs = nb_rb;
dlsch0_ue->dlsch_config.qamModOrder = mod_order;
dlsch0_ue->dlsch_config.rv = rvidx;
dlsch0_ue->dlsch_config.targetCodeRate = rate;
dlsch0_ue->dlsch_config.TBS = TBS;
dlsch0_ue->dlsch_config.ldpcBaseGraph = get_BG(TBS, rate);
dlsch0_ue->dlsch_config.dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
dlsch0_ue->dlsch_config.dlDmrsSymbPos = 4;
dlsch0_ue->dlsch_config.n_dmrs_cdm_groups = 1;
dlsch0_ue->dlsch_config.tbslbrm = Tbslbrm;
printf("harq process ue mcs = %d Qm = %d, symb %d\n", dlsch0_ue->dlsch_config.mcs, dlsch0_ue->dlsch_config.qamModOrder, nb_symb_sch);
fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config;
dlsch_config.cw_info[0].mcs = Imcs;
dlsch_config.mcs_table = mcs_table;
dlsch_config.number_rbs = nb_rb;
dlsch_config.cw_info[0].Nl = Nl;
dlsch_config.cw_info[0].qamModOrder = mod_order;
dlsch_config.cw_info[0].rv = rvidx;
dlsch_config.cw_info[0].targetCodeRate = rate;
dlsch_config.cw_info[0].TBS = TBS;
dlsch_config.cw_info[0].ldpcBaseGraph = get_BG(TBS, rate);
dlsch_config.dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
dlsch_config.dlDmrsSymbPos = 4;
dlsch_config.n_dmrs_cdm_groups = 1;
dlsch_config.tbslbrm = Tbslbrm;
dlsch0_ue->cw_info = dlsch_config.cw_info[0];
printf("harq process ue mcs = %d Qm = %d, symb %d\n", dlsch_config.cw_info[0].mcs, dlsch_config.cw_info[0].qamModOrder, nb_symb_sch);
uint8_t test_input[TBS / 8 + 4]; // + 3 for CRC + 1 additional byte, see nr_dlsch_encoding()
dlsch->pdu = test_input;
@@ -536,27 +538,23 @@ int main(int argc, char **argv)
exit(-1);
#endif
int a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS; //number of segments to be allocated
int num_rb = dlsch0_ue->dlsch_config.number_rbs;
int a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; // number of segments to be allocated
int num_rb = dlsch_config.number_rbs;
if (num_rb != 273) {
a_segments = a_segments*num_rb;
a_segments = (a_segments/273)+1;
}
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
__attribute__ ((aligned(32))) uint8_t b[dlsch_bytes];
uint8_t DLSCH_ids[1] = {0};
short *p_channel_output_fixed = channel_output_fixed;
uint8_t *p_b = b;
int available_bits_array[1] = { available_bits };
nr_dlsch_decoding(UE,
&proc,
dlsch0_ue,
&p_channel_output_fixed,
&p_b,
available_bits_array,
1,
0,
&dlsch_config,
channel_output_fixed,
b,
num_rb,
DLSCH_ids);
available_bits);
if (dlsch0_ue->last_iteration_cnt > dlsch0_ue->max_ldpc_iterations)
n_errors++;
@@ -634,4 +632,3 @@ int main(int argc, char **argv)
return (n_errors);
}
openair1/SIMULATION/NR_PHY/dlsim.c
+12 -10
View File
@@ -1310,12 +1310,14 @@ int main(int argc, char **argv)
int16_t *UE_llr = (int16_t*)UE->phy_sim_pdsch_llr;
TBS = dlsch0->dlsch_config.TBS;
uint16_t length_dmrs = get_num_dmrs(dlsch0->dlsch_config.dlDmrsSymbPos);
uint16_t nb_rb = dlsch0->dlsch_config.number_rbs;
uint8_t nb_re_dmrs = dlsch0->dlsch_config.dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6*dlsch0->dlsch_config.n_dmrs_cdm_groups : 4*dlsch0->dlsch_config.n_dmrs_cdm_groups;
uint8_t mod_order = dlsch0->dlsch_config.qamModOrder;
uint8_t nb_symb_sch = dlsch0->dlsch_config.number_symbols;
TBS = phy_data.dlsch_config.cw_info[0].TBS;
uint16_t length_dmrs = get_num_dmrs(phy_data.dlsch_config.dlDmrsSymbPos);
uint16_t nb_rb = phy_data.dlsch_config.number_rbs;
uint8_t nb_re_dmrs = phy_data.dlsch_config.dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ?
6 * phy_data.dlsch_config.n_dmrs_cdm_groups :
4 * phy_data.dlsch_config.n_dmrs_cdm_groups;
uint8_t mod_order = phy_data.dlsch_config.cw_info[0].qamModOrder;
uint8_t nb_symb_sch = phy_data.dlsch_config.number_symbols;
uint32_t unav_res = ptrsSymbPerSlot * ptrsRePerSymb;
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, unav_res, mod_order, pdsch_pdu_rel15->nrOfLayers);
if (pdu_bit_map & 0x1) {
@@ -1457,10 +1459,10 @@ int main(int argc, char **argv)
const int s = pdsch_pdu_rel15->StartSymbolIndex;
const int n = pdsch_pdu_rel15->NrOfSymbols;
for (int i = s; i < s + n; i++) {
const uint32_t dmrsBitMap = phy_data.dlsch[0].dlsch_config.dlDmrsSymbPos;
const uint32_t dmrsCfg = phy_data.dlsch[0].dlsch_config.dmrsConfigType;
const uint32_t nrb = phy_data.dlsch[0].dlsch_config.number_rbs;
const uint32_t ncdmg = phy_data.dlsch[0].dlsch_config.n_dmrs_cdm_groups;
const uint32_t dmrsBitMap = phy_data.dlsch_config.dlDmrsSymbPos;
const uint32_t dmrsCfg = phy_data.dlsch_config.dmrsConfigType;
const uint32_t nrb = phy_data.dlsch_config.number_rbs;
const uint32_t ncdmg = phy_data.dlsch_config.n_dmrs_cdm_groups;
const uint32_t numValidReSym = ((dmrsBitMap >> i) & 1)
? ((dmrsCfg == NFAPI_NR_DMRS_TYPE1) ? nrb * (12 - 6 * ncdmg) : nrb * (12 - 4 * ncdmg))
: (nrb * 12);
openair1/SIMULATION/NR_PHY/pbchsim.c
+3 -2
View File
@@ -83,8 +83,9 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t pdu_type,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
int cw_idx,
int harq_pid,
NR_UE_DLSCH_t *dlsch,
uint16_t n_pdus,
const UE_nr_rxtx_proc_t *proc,
void *typeSpecific,