added Si5351C directory

changes in lmslib.cpp
2016-02-11 10:04:36 +01:00
parent 2b61863abb
commit 051a4e2aa5
40 changed files with 3038 additions and 65 deletions
@@ -1,31 +1,3 @@
 /*******************************************************************************
    OpenAirInterface
    Copyright(c) 1999 - 2014 Eurecom
    OpenAirInterface is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
    OpenAirInterface is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
    You should have received a copy of the GNU General Public License
    along with OpenAirInterface.The full GNU General Public License is
   included in this distribution in the file called "COPYING". If not,
   see <http://www.gnu.org/licenses/>.
  Contact Information
  OpenAirInterface Admin: openair_admin@eurecom.fr
  OpenAirInterface Tech : openair_tech@eurecom.fr
  OpenAirInterface Dev  : openair4g-devel@lists.eurecom.fr
  Address      : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
 *******************************************************************************/
 short primary_synch0[144] = {0,0,0,0,0,0,0,0,0,0,32767,0,-26120,-19785,11971,-30502,-24020,-22288,32117,6492,31311,9658,-16384,-28378,25100,-21063,-7292,-31946,20429,25618,14948,29158,11971,-30502,31311,9658,25100,-21063,-16384,28377,-24020,22287,32117,6492,-7292,31945,20429,25618,-26120,-19785,-16384,-28378,-16384,28377,-26120,-19785,-32402,4883,31311,-9659,32117,6492,-7292,-31946,32767,-1,25100,-21063,-24020,22287,-32402,4883,-32402,4883,-24020,22287,25100,-21063,32767,-1,-7292,-31946,32117,6492,31311,-9659,-32402,4883,-26120,-19785,-16384,28377,-16384,-28378,-26120,-19785,20429,25618,-7292,31945,32117,6492,-24020,22287,-16384,28377,25100,-21063,31311,9658,11971,-30502,14948,29158,20429,25618,-7292,-31946,25100,-21063,-16384,-28378,31311,9658,32117,6492,-24020,-22288,11971,-30502,-26120,-19785,32767,0,0,0,0,0,0,0,0,0,0,0};
 short primary_synch1[144] = {0,0,0,0,0,0,0,0,0,0,32767,0,-31754,-8086,-24020,-22288,2448,32675,-26120,19784,27073,18458,-16384,28377,25100,21062,-29523,14217,-7292,31945,-13477,-29868,-24020,-22288,27073,18458,25100,21062,-16384,-28378,2448,-32676,-26120,19784,-29523,-14218,-7292,31945,-31754,-8086,-16384,28377,-16384,-28378,-31754,-8086,31311,-9659,27073,-18459,-26120,19784,-29523,14217,32767,-1,25100,21062,2448,-32676,31311,-9659,31311,-9659,2448,-32676,25100,21062,32767,0,-29523,14217,-26120,19784,27073,-18459,31311,-9659,-31754,-8086,-16384,-28378,-16384,28377,-31754,-8086,-7292,31945,-29523,-14218,-26120,19784,2448,-32676,-16384,-28378,25100,21062,27073,18458,-24020,-22288,-13477,-29868,-7292,31945,-29523,14217,25100,21062,-16384,28377,27073,18458,-26120,19784,2448,32675,-24020,-22288,-31754,-8086,32767,0,0,0,0,0,0,0,0,0,0,0};
 short primary_synch2[144] = {0,0,0,0,0,0,0,0,0,0,32767,0,-31754,8085,-24020,22287,2448,-32676,-26120,-19785,27073,-18459,-16384,-28378,25100,-21063,-29523,-14218,-7292,-31946,-13477,29867,-24020,22287,27073,-18459,25100,-21063,-16384,28377,2448,32675,-26120,-19785,-29523,14217,-7292,-31946,-31754,8085,-16384,-28378,-16384,28377,-31754,8085,31311,9658,27073,18458,-26120,-19785,-29523,-14218,32767,0,25100,-21063,2448,32675,31311,9658,31311,9658,2448,32675,25100,-21063,32767,0,-29523,-14218,-26120,-19785,27073,18458,31311,9658,-31754,8085,-16384,28377,-16384,-28378,-31754,8085,-7292,-31946,-29523,14217,-26120,-19785,2448,32675,-16384,28377,25100,-21063,27073,-18459,-24020,22287,-13477,29867,-7292,-31946,-29523,-14218,25100,-21063,-16384,-28378,27073,-18459,-26120,-19785,2448,-32676,-24020,22287,-31754,8085,32767,-1,0,0,0,0,0,0,0,0,0,0};
@@ -48,7 +48,7 @@
 #include "gain_control.h"
 #endif
-#if defined(OAI_USRP) || defined(EXMIMO)
+#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_LMSSDR)
 #include "common_lib.h"
 extern openair0_config_t openair0_cfg[];
 #endif
@@ -291,17 +291,10 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode)
  frame_parms->Ncp=NORMAL;
  frame_parms->frame_type=FDD;
  init_frame_parms(frame_parms,1);
-
+  /*
-  //  write_output("rxdata0.m","rxd0",phy_vars_ue->lte_ue_common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
+  write_output("rxdata0.m","rxd0",phy_vars_ue->lte_ue_common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
-
+  exit(-1);
-  /*#ifdef OAI_USRP
+  */
  for (aarx = 0; aarx<frame_parms->nb_antennas_rx;aarx++) {
    rxdata128 = (__m128i*)phy_vars_ue->lte_ue_common_vars.rxdata[aarx];
    for (i=0; i<(frame_parms->samples_per_tti*10)>>2; i++) {
      rxdata128[i] = _mm_srai_epi16(rxdata128[i],4);
    } 
  }
  #endif*/
  sync_pos = lte_sync_time(phy_vars_ue->lte_ue_common_vars.rxdata,
                           frame_parms,
                           (int *)&phy_vars_ue->lte_ue_common_vars.eNb_id);
@@ -336,9 +329,11 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode)
 #else
 #ifndef OAI_USRP
-  #ifndef OAI_BLADERF 
+#ifndef OAI_BLADERF
 #ifndef OAI_LMSSDR
  phy_adjust_gain(phy_vars_ue,0);
-  #endif
+#endif
 #endif
 #endif
 #endif
@@ -569,7 +564,7 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode)
 	  phy_vars_ue->lte_frame_parms.phich_config_common.phich_duration,
 	  phich_string[phy_vars_ue->lte_frame_parms.phich_config_common.phich_resource],
 	  phy_vars_ue->lte_frame_parms.nb_antennas_tx_eNB);
-#if defined(OAI_USRP) || defined(EXMIMO)
+#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_LMSSDR)
    LOG_I(PHY,"[UE %d] Frame %d Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
 	  phy_vars_ue->Mod_id,
 	  phy_vars_ue->frame_rx,
@@ -50,7 +50,7 @@
 #endif
 extern int mac_get_rrc_status(uint8_t Mod_id,uint8_t eNB_flag,uint8_t index);
-#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF)
+#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
 #include "common_lib.h"
 extern openair0_config_t openair0_cfg[];
 #endif
@@ -97,10 +97,10 @@ int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t
 #ifdef EXMIMO
    len += sprintf(&buffer[len], "[UE PROC] RX Gain %d dB (LNA %d, vga %d dB)\n",phy_vars_ue->rx_total_gain_dB, openair0_cfg[0].rxg_mode[0],(int)openair0_cfg[0].rx_gain[0]);
 #endif
-#if defined(OAI_USRP) || defined(OAI_BLADERF)
+#if defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
    len += sprintf(&buffer[len], "[UE PROC] RX Gain %d dB\n",phy_vars_ue->rx_total_gain_dB);
 #endif
-#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
    len += sprintf(&buffer[len], "[UE_PROC] Frequency offset %d Hz (%d), estimated carrier frequency %f Hz\n",phy_vars_ue->lte_ue_common_vars.freq_offset,openair_daq_vars.freq_offset,openair0_cfg[0].rx_freq[0]-phy_vars_ue->lte_ue_common_vars.freq_offset);
 #endif
    len += sprintf(&buffer[len], "[UE PROC] UE mode = %s (%d)\n",mode_string[phy_vars_ue->UE_mode[0]],phy_vars_ue->UE_mode[0]);
@@ -121,7 +121,7 @@ extern int rx_sig_fifo;
 #endif
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
 extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
 #endif
@@ -197,7 +197,7 @@ void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
  exit(-1);
 }
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
 //unsigned int gain_table[31] = {100,112,126,141,158,178,200,224,251,282,316,359,398,447,501,562,631,708,794,891,1000,1122,1258,1412,1585,1778,1995,2239,2512,2818,3162};
 /*
 unsigned int get_tx_amp_prach(int power_dBm, int power_max_dBm, int N_RB_UL)
@@ -669,7 +669,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
  uint8_t ack_status=0;
  int8_t Po_PUCCH;
  int32_t ulsch_start=0;
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
  int overflow=0;
  int k,l;
 #endif
@@ -969,7 +969,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
 #endif
          phy_vars_ue->tx_total_RE = nb_rb*12;
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
 	  tx_amp = get_tx_amp(phy_vars_ue->tx_power_dBm,
 			      phy_vars_ue->tx_power_max_dBm,
 			      phy_vars_ue->lte_frame_parms.N_RB_UL,
@@ -1065,7 +1065,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
 #endif
          phy_vars_ue->tx_total_RE = 12;
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
 	  tx_amp = get_tx_amp(Po_PUCCH,
 			      phy_vars_ue->tx_power_max_dBm,
 			      phy_vars_ue->lte_frame_parms.N_RB_UL,
@@ -1128,7 +1128,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
 #endif
          phy_vars_ue->tx_total_RE = 12;
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
          tx_amp =  get_tx_amp(Po_PUCCH,
 	                       phy_vars_ue->tx_power_max_dBm,
 	                       phy_vars_ue->lte_frame_parms.N_RB_UL,
@@ -1230,7 +1230,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
      if (abstraction_flag == 0) {
        nsymb = (frame_parms->Ncp == 0) ? 14 : 12;
-#if defined(EXMIMO) || defined(OAI_USRP) //this is the EXPRESS MIMO case
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)//this is the EXPRESS MIMO case
        ulsch_start = (phy_vars_ue->rx_offset+subframe_tx*frame_parms->samples_per_tti-
                       openair_daq_vars.timing_advance-
                       phy_vars_ue->timing_advance-
@@ -1257,7 +1257,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
          for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
            if (frame_parms->Ncp == 1)
              PHY_ofdm_mod(&phy_vars_ue->lte_ue_common_vars.txdataF[aa][subframe_tx*nsymb*frame_parms->ofdm_symbol_size],
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
                           dummy_tx_buffer,
 #else
                           &phy_vars_ue->lte_ue_common_vars.txdata[aa][ulsch_start],
@@ -1268,7 +1268,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
                           CYCLIC_PREFIX);
            else
              normal_prefix_mod(&phy_vars_ue->lte_ue_common_vars.txdataF[aa][subframe_tx*nsymb*frame_parms->ofdm_symbol_size],
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
                                dummy_tx_buffer,
 #else
                                &phy_vars_ue->lte_ue_common_vars.txdata[aa][ulsch_start],
@@ -1289,7 +1289,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
              }
            */
 #ifndef OFDMA_ULSCH
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
            apply_7_5_kHz(phy_vars_ue,dummy_tx_buffer,0);
            apply_7_5_kHz(phy_vars_ue,dummy_tx_buffer,1);
 #else
@@ -1304,7 +1304,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
            */
 #endif
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
            overflow = ulsch_start - 9*frame_parms->samples_per_tti;
            //if ((slot_tx==4) && (aa==0)) printf("ulsch_start %d, overflow %d\n",ulsch_start,overflow);
@@ -1404,7 +1404,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
            phy_vars_ue->tx_total_RE = 96;
-#if defined(EXMIMO) || defined(OAI_USRP)
+#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
            phy_vars_ue->lte_ue_prach_vars[eNB_id]->amp = get_tx_amp(phy_vars_ue->tx_power_dBm,
 								     phy_vars_ue->tx_power_max_dBm,
 								     phy_vars_ue->lte_frame_parms.N_RB_UL,
@@ -1553,9 +1553,11 @@ void lte_ue_measurement_procedures(uint16_t l, PHY_VARS_UE *phy_vars_ue,uint8_t
 #else
 #ifndef OAI_USRP
-  #ifndef OAI_BLADERF
+#ifndef OAI_BLADERF
 #ifndef OAI_LMSSDR
    phy_adjust_gain (phy_vars_ue,0);
-  #endif
+#endif
 #endif
 #endif
 #endif
    VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL, VCD_FUNCTION_OUT);
@@ -0,0 +1,11 @@
 set(si5351_src_files
 	Si5351C.cpp
 )
 set(CMAKE_CXX_FLAGS
  "${CMAKE_CXX_FLAGS} ${C_FLAGS_PROCESSOR} -std=c++11 "
 )
 add_library(Si5351C STATIC ${si5351_src_files})
 target_include_directories(Si5351C PUBLIC ../lms7002m ${CMAKE_CURRENT_SOURCE_DIR})
 target_link_libraries(Si5351C LMS7002M)
@@ -0,0 +1,872 @@
 /**
@file	Si5351C.cpp
@author	Lime Microsystems
@brief 	Configuring of Si5351C
 */
 #include "Si5351C.h"
 #include "lmsComms.h"
 #include <math.h>
 #include <iomanip>
 #include <fstream>
 #include <sstream>
 #include <set>
 #include <string.h>
 #include <assert.h>
 #include <iostream>
 using namespace std;
 #define Log(msg, type) cout << (msg) << endl;
 /// Splits float into fraction integers A + B/C
 void realToFrac(const float real, int &A, int &B, int &C)
 {
    A = (int)real;
    B = (int)((real - A) * 1048576 + 0.5);
    C = 1048576;
    int a = B;
    int b = C;
    int temp;
    while( b!= 0) // greatest common divider
    {
        temp = a % b;
        a = b;
        b = temp;
    }
    B = B/a;
    C = C/a;
 }
 /// Default configuration
 const unsigned char Si5351C::m_defaultConfiguration[] =
 { 0,0x00,
  1,0x00,
  2,0x08,
  3,0x00,
  4,0x00,
  5,0x00,
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 225,0x00,
 226,0x00,
 227,0x00,
 228,0x00,
 229,0x00,
 230,0x00,
 231,0x00,
 232,0x00};
 // ---------------------------------------------------------------------------
 Si5351C::Si5351C()
 {
    memset(m_newConfiguration, 0, 255);
    for(unsigned int i=0; i<sizeof(m_defaultConfiguration); i+=2)
    {
        m_newConfiguration[m_defaultConfiguration[i]] = m_defaultConfiguration[i+1];
    }
 	device = NULL;
 }
 // ---------------------------------------------------------------------------
 Si5351C::~Si5351C()
 {
 }
 /** @brief Sends Configuration to Si5351C
 */
 Si5351C::Status Si5351C::UploadConfiguration()
 {
    LMScomms::GenericPacket pkt;
    pkt.cmd = CMD_SI5351_WR;
 	if (!device)
        return FAILED;
    //Disable outputs
 	pkt.outBuffer.push_back(3);
    pkt.outBuffer.push_back(0xFF);
 	//Power down all output drivers
 	for(int i=0; i<8; ++i)
    {
        pkt.outBuffer.push_back(16 + i);
        pkt.outBuffer.push_back(0x84);
    }
 	//write new configuration
 	for (int i = 15; i <= 92; ++i)
 	{
        pkt.outBuffer.push_back(i);
        pkt.outBuffer.push_back(m_newConfiguration[i]);
 	}
 	for (int i = 149; i <= 170; ++i)
 	{
        pkt.outBuffer.push_back(i);
        pkt.outBuffer.push_back(m_newConfiguration[i]);
 	}
 	//apply soft reset
    pkt.outBuffer.push_back(177);
    pkt.outBuffer.push_back(0xAC);
    //Enabe desired outputs
    pkt.outBuffer.push_back(3);
    pkt.outBuffer.push_back(m_newConfiguration[3]);
 	if( !device->IsOpen() )
 	{   
        return FAILED;
 	}        
    LMScomms::TransferStatus status;
    status = device->TransferPacket(pkt);
    if (status != LMScomms::TRANSFER_SUCCESS || pkt.status != STATUS_COMPLETED_CMD)
    {
        return FAILED;
    }
    return SUCCESS;
 }
 // ---------------------------------------------------------------------------
 /**
    @brief Sets connection manager to use for data transferring Si5351C
    @param mng connection manager for data transferring
 */
 void Si5351C::Initialize(LMScomms *mng)
 {
    assert(mng != nullptr);
 	device = mng;	
 }
 /**
    @brief Loads register values for Si5356A from file
    @param FName input filename
 */
 bool Si5351C::LoadRegValuesFromFile(string FName)
 {
    fstream fin;
    fin.open(FName.c_str(), ios::in);
    const int len = 1024;
    char line[len];
    int addr;
    int value;
    while(!fin.eof())
    {
        fin.getline(line, len);
        if( line[0] == '#')
            continue;
        if( strcmp(line, "#END_PROFILE") == 0)
            break;
        sscanf(line, "%i,%x",&addr,&value);
        m_newConfiguration[addr] = value;
    }
    fin.close();
 	return false;
 };
 /** @brief Calculates multisynth dividers and VCO frequencies
    @param clocks output clocks configuration
    @param plls plls configurations
    @param Fmin lowest VCO frequency
    @param Fmax highest VCO frequency
 */
 void Si5351C::FindVCO(Si5351_Channel *clocks, Si5351_PLL *plls, const unsigned long Fmin, const unsigned long Fmax)
 {
    int clockCount = 8;
    //reset output parameters
    for(int i=0; i<clockCount; i++)
    {
        clocks[i].pllSource = 0;
        clocks[i].int_mode = 0;
        clocks[i].multisynthDivider = 8;
    }
    bool clk6satisfied = !clocks[6].powered;
    bool clk7satisfied = !clocks[7].powered;
    bool pllAused = false;
    bool pllBused = false;
    map< unsigned long, int> availableFrequenciesPLLA; //all available frequencies for VCO
    map< unsigned long, int> availableFrequenciesPLLB; //all available frequencies for VCO
    //if clk6 or clk7 is used make available frequencies according to them
    if(clocks[6].powered || clocks[7].powered)
    {
        set<unsigned long> clk6freqs;
        set<unsigned long> clk7freqs;
        set<unsigned long> sharedFreqs;
        unsigned int mult = 6;
        if(!clk6satisfied)
        {
            unsigned long freq = clocks[6].outputFreqHz;
            while(freq <= Fmax && mult <= 254)
            {
                freq = clocks[6].outputFreqHz*mult;
                if(freq >= Fmin && freq <= Fmax)
                {
                    clk6freqs.insert(freq);
                }
                mult += 2;
            }
        }
        mult = 6;
        if(!clk7satisfied)
        {
            unsigned long freq = clocks[7].outputFreqHz;
            while(freq <= Fmax && mult <= 254)
            {
                freq = clocks[7].outputFreqHz*mult;
                if(freq >= Fmin && freq <= Fmax)
                {
                    clk7freqs.insert(freq);
                }
                mult += 2;
            }
        }
        bool canShare = false;
        //find if clk6 and clk7 can share the same pll
        for (set<unsigned long>::iterator it6=clk6freqs.begin(); it6!=clk6freqs.end(); ++it6)
        {
            for (set<unsigned long>::iterator it7=clk7freqs.begin(); it7!=clk7freqs.end(); ++it7)
            {
                if(*it6 == *it7)
                {
                    canShare = true;
                    sharedFreqs.insert(*it6);
                }
            }
        }
        if(canShare) //assign PLLA for both clocks
        {
            clocks[6].pllSource = 0;
            clocks[7].pllSource = 0;
            pllAused = true;
            for (set<unsigned long>::iterator it=sharedFreqs.begin(); it!=sharedFreqs.end(); ++it)
            {
                availableFrequenciesPLLA.insert( pair<unsigned long, int> (*it, 0) );
            }
            clk6satisfied = true;
            clk7satisfied = true;
        }
        else //if clocks 6 and 7 can't share pll, assign pllA to clk6 and pllB to clk7
        {
            if(!clk6satisfied)
            {
                clocks[6].pllSource = 0;
                clk6satisfied = true;
                pllAused = true;
                for (set<unsigned long>::iterator it6=clk6freqs.begin(); it6!=clk6freqs.end(); ++it6)
                {
                    availableFrequenciesPLLA.insert( pair<unsigned long, int>(*it6, 0) );
                }
            }
            if(!clk7satisfied)
            {
                clocks[7].pllSource = 1;
                clk7satisfied = true;
                pllBused = true;
                for (set<unsigned long>::iterator it7=clk7freqs.begin(); it7!=clk7freqs.end(); ++it7)
                {
                    availableFrequenciesPLLB.insert( pair<unsigned long, int> (*it7, 0) );
                }
            }
        }
    }
    //PLLA stage, find  all clocks that have integer coefficients with PLLA
    //if pllA is not used by clk6 or clk7, fill available frequencies according to clk1-clk5 clocks
    if( availableFrequenciesPLLA.size() == 0 && !pllAused)
    {
        for(int i=0; i<6; ++i)
        {
            unsigned long freq = clocks[i].outputFreqHz > Fmin ? clocks[i].outputFreqHz : (clocks[i].outputFreqHz*((Fmin/clocks[i].outputFreqHz) + ((Fmin%clocks[i].outputFreqHz)!=0)));
            while(freq >= Fmin && freq <= Fmax)
            {
                //add all output frequency multiples that are in VCO interval
                availableFrequenciesPLLA.insert( pair<unsigned long, int> (freq, 0));
                freq += clocks[i].outputFreqHz;
            }
        }
    }
    unsigned int bestScore = 0; //score shows how many outputs have integer dividers
    //calculate scores for all available frequencies
    unsigned long bestVCOA = 0;
    for (map<unsigned long, int>::iterator it=availableFrequenciesPLLA.begin(); it!=availableFrequenciesPLLA.end(); ++it)
    {
        for(int i=0; i<8; ++i)
        {
            if(clocks[i].outputFreqHz == 0 || !clocks[i].powered)
                continue;
            if( (it->first % clocks[i].outputFreqHz) == 0)
            {
                it->second = it->second+1;
            }
        }
        if(it->second >= bestScore)
        {
            bestScore = it->second;
            bestVCOA = it->first;
        }
    }
    //scores calculated
    //cout << "PLLA stage: " << endl;
    //cout << "best score: " << bestScore << "     best VCO: " << bestVCOA << endl;
    plls[0].VCO_Hz = bestVCOA;
    plls[0].feedbackDivider = (double)bestVCOA/plls[0].inputFreqHz;
    for(int i=0; i<clockCount; ++i)
    {
        if(clocks[i].outputFreqHz == 0 || !clocks[i].powered)
            continue;
        clocks[i].multisynthDivider = bestVCOA/clocks[i].outputFreqHz;
        if(bestVCOA%clocks[i].outputFreqHz == 0)
        {
            clocks[i].int_mode = true;
            clocks[i].multisynthDivider = bestVCOA/clocks[i].outputFreqHz;
        }
        else
        {
            clocks[i].int_mode = false;
            clocks[i].multisynthDivider = (double)bestVCOA/clocks[i].outputFreqHz;
        }
        clocks[i].pllSource = 0;
    }
    //PLLB stage, find  all clocks that have integer coefficients with PLLB
    //if pllB is not used by clk6 or clk7, fill available frequencies according to clk1-clk5 clocks, that don't have integer dividers
    if( availableFrequenciesPLLB.size() == 0 && !pllBused)
    {
        for(int i=0; i<6; ++i)
        {
            if(clocks[i].outputFreqHz == 0 || !clocks[i].powered)
                continue;
            if(clocks[i].int_mode) //skip clocks with integer dividers
                continue;
            unsigned long freq = clocks[i].outputFreqHz > Fmin ? clocks[i].outputFreqHz : (clocks[i].outputFreqHz*((Fmin/clocks[i].outputFreqHz) + ((Fmin%clocks[i].outputFreqHz)!=0)));
            while(freq >= Fmin && freq <= Fmax)
            {
                availableFrequenciesPLLB.insert( pair<unsigned long, int> (freq, 0));
                freq += clocks[i].outputFreqHz;
            }
        }
    }
    bestScore = 0;
    //calculate scores for all available frequencies
    unsigned long bestVCOB = 0;
    for (map<unsigned long, int>::iterator it=availableFrequenciesPLLB.begin(); it!=availableFrequenciesPLLB.end(); ++it)
    {
        for(int i=0; i<8; ++i)
        {
            if(clocks[i].outputFreqHz == 0 || !clocks[i].powered)
                continue;
            if( (it->first % clocks[i].outputFreqHz) == 0)
            {
                it->second = it->second+1;
            }
        }
        if(it->second >= bestScore)
        {
            bestScore = it->second;
            bestVCOB = it->first;
        }
    }
    //scores calculated
 //    cout << "PLLB stage: " << endl;
 //    cout << "best score: " << bestScore << "     best VCO: " << bestVCOB << endl;
    if(bestVCOB == 0) //just in case if pllb is not used make it the same frequency as plla
        bestVCOB = bestVCOA;
    plls[1].VCO_Hz = bestVCOB;
    plls[1].feedbackDivider = (double)bestVCOB/plls[0].inputFreqHz;
    for(int i=0; i<clockCount; ++i)
    {
        if(clocks[i].outputFreqHz == 0 || !clocks[i].powered)
                continue;
        if(clocks[i].int_mode)
            continue;
        clocks[i].multisynthDivider = bestVCOB/clocks[i].outputFreqHz;
        if(bestVCOB%clocks[i].outputFreqHz == 0)
        {
            clocks[i].int_mode = true;
            clocks[i].multisynthDivider = bestVCOB/clocks[i].outputFreqHz;
        }
        else
        {
            clocks[i].int_mode = false;
            clocks[i].multisynthDivider = (double)bestVCOB/clocks[i].outputFreqHz;
        }
        clocks[i].pllSource = 1;
    }
 }
 /** @brief Modifies register map with clock settings
    @return true if success
 */
 Si5351C::Status Si5351C::ConfigureClocks()
 {
    FindVCO(CLK, PLL, 600000000, 900000000);
    stringstream ss;
    int addr;
    m_newConfiguration[3] = 0;    
    for(int i=0; i<8; ++i)
    {
        m_newConfiguration[3] |= (!CLK[i].powered) << i; //enabled
        m_newConfiguration[16+i] = 0;
        m_newConfiguration[16+i] |= !CLK[i].powered << 7; // powered
        if(CLK[i].int_mode)
        {
            m_newConfiguration[16+i] |= 1 << 6; //integer mode
        }
        else
            m_newConfiguration[16+i] |= 0 << 6;
        m_newConfiguration[16+i] |= CLK[i].pllSource << 5; //PLL source
        m_newConfiguration[16+i] |= CLK[i].inverted << 4; // invert
        m_newConfiguration[16+i] |= 3 << 2;
        m_newConfiguration[16+i] |= 3;
        addr = 42+i*8;
        ss.clear();
        ss.str( string() );
        ss << "CLK" << i << " fOut = " << CLK[i].outputFreqHz/1000000.0 << " MHz";
        int DivA;
        int DivB;
        int DivC;
        realToFrac(CLK[i].multisynthDivider, DivA, DivB, DivC);
        ss << "  Multisynth Divider " << DivA << " " << DivB << "/" << DivC;
        ss << "  R divider = " << CLK[i].outputDivider << " source = " << (CLK[i].pllSource == 0 ? "PLLA" : "PLLB") << endl;
        Log(ss.str(), LOG_INFO);
        if( CLK[i].multisynthDivider < 8 || 900 < CLK[i].multisynthDivider)
        {
            Log("Si5351C - Output multisynth divider is outside [8;900] interval.\n", LOG_ERROR);
            return FAILED;
        }
        if(i<6)
        {
            if(CLK[i].outputFreqHz <= 150000000)
            {
                unsigned MSX_P1 = 128 * DivA + floor(128 * ( (float)DivB/DivC)) - 512;
                unsigned MSX_P2 = 128 * DivB - DivC * floor( 128 * DivB/DivC );
                unsigned MSX_P3 = DivC;
                m_newConfiguration[addr] = MSX_P3 >> 8;
                m_newConfiguration[addr+1] = MSX_P3;
                m_newConfiguration[addr+2] = 0;
                m_newConfiguration[addr+2] |= (MSX_P1 >> 16 ) & 0x03;
                m_newConfiguration[addr+3] = MSX_P1 >> 8;
                m_newConfiguration[addr+4] = MSX_P1;
                m_newConfiguration[addr+5] = 0;
                m_newConfiguration[addr+5] = (MSX_P2 >> 16) & 0x0F;
                m_newConfiguration[addr+5] |= (MSX_P3 >> 16) << 4;
                m_newConfiguration[addr+6] = MSX_P2;
                m_newConfiguration[addr+7] = MSX_P2 >> 8;
            }
            else if( CLK[i].outputFreqHz <= 160000000) // AVAILABLE ONLY ON 0-5 MULTISYNTHS
            {
                Log("Si5351C - clock configuring for more than 150 MHz not implemented\n", LOG_ERROR); 
                return FAILED;
            }
        }
        else // CLK6 and CLK7 only integer mode
        {
            if(CLK[i].outputFreqHz <= 150000000)
            {
                if(i==6)
                {
                    m_newConfiguration[90] = DivA;
                    if(DivA%2 != 0)
                    {
                        Log("Si5351C - CLK6 multisynth divider is not even integer\n", LOG_ERROR);
                        return FAILED;
                    }
                }
                else
                {
                    m_newConfiguration[91] = DivA;
                    if(DivA%2 != 0)
                    {
                        Log("Si5351C - CLK7 multisynth divider is not even integer\n", LOG_ERROR);
                        return FAILED;
                    }
                }
            }
            else if( CLK[i].outputFreqHz <= 160000000) // AVAILABLE ONLY ON 0-5 MULTISYNTHS
            {
                Log("Si5351C - clock configuring for more than 150 MHz not implemented\n", LOG_ERROR);
                return FAILED;
            }
        }
    }
    //configure pll
    //set input clk source
    m_newConfiguration[15] = m_newConfiguration[15] & 0xF3;
    m_newConfiguration[15] |= (PLL[0].CLK_SRC & 1) << 2;
    m_newConfiguration[15] |= (PLL[1].CLK_SRC & 1) << 3;
    for(int i=0; i<2; ++i)
    {
        addr = 26+i*8;
        if(PLL[i].feedbackDivider < 15 || PLL[i].feedbackDivider > 90)
        {
            Log("Si5351C - VCO frequency divider out of range [15:90].\n", LOG_ERROR);
            return FAILED;
        }
        if( PLL[i].VCO_Hz < 600000000 || PLL[i].VCO_Hz > 900000000)
        {
            Log("Si5351C - Can't calculate valid VCO frequency.\n", LOG_ERROR);
            return FAILED;
        }
        ss.clear();
        ss.str(string());
        ss << "Si5351C : VCO" << (i==0 ? "A" : "B") << " = " << PLL[i].VCO_Hz/1000000.0 << " MHz";
        //calculate MSNx_P1, MSNx_P2, MSNx_P3
        int MSNx_P1;
        int MSNx_P2;
        int MSNx_P3;
        int DivA;
        int DivB;
        int DivC;
        realToFrac(PLL[i].feedbackDivider, DivA, DivB, DivC);
        ss << "  Feedback Divider " << DivA << " " << DivB << "/" << DivC << endl;
        Log(ss.str(), LOG_INFO);
        MSNx_P1 = 128 * DivA + floor(128 * ( (float)DivB/DivC)) - 512;
        MSNx_P2 = 128 * DivB - DivC * floor( 128 * DivB/DivC );
        MSNx_P3 = DivC;
        m_newConfiguration[addr+4] = MSNx_P1;
        m_newConfiguration[addr+3] = MSNx_P1 >> 8;
        m_newConfiguration[addr+2] = MSNx_P1 >> 16;
        m_newConfiguration[addr+7] = MSNx_P2;
        m_newConfiguration[addr+6] = MSNx_P2 >> 8;
        m_newConfiguration[addr+5] = 0;
        m_newConfiguration[addr+5] = (MSNx_P2 >> 16) & 0x0F;
        m_newConfiguration[addr+5] |= (MSNx_P3 >> 16) << 4;
        m_newConfiguration[addr+1] |= MSNx_P3;
        m_newConfiguration[addr] |= MSNx_P3 >> 8;
    }
    return SUCCESS;
 }
 /** @brief Sets output clock parameters
    @param id clock id 0-CLK0 1-CLK1 ...
    @param fOut_Hz output frequency in Hz
    @param enabled is this output powered
    @param inverted invert clock
 */
 void Si5351C::SetClock(unsigned char id, unsigned long fOut_Hz, bool enabled, bool inverted)
 {
    if( id < 8)
    {
        if(fOut_Hz < 8000 || fOut_Hz > 160000000)
        {
            stringstream ss;
            ss << "Si5351C - CLK" << (int)id << " output frequency must be between 8kHz and 160MHz. fOut_MHz = " << fOut_Hz/1000000.0 << endl;
            Log(ss.str(), LOG_ERROR);
            return;
        }
        CLK[id].powered = enabled;
        CLK[id].inverted = inverted;
        CLK[id].outputFreqHz = fOut_Hz;
    }
 }
 /** @brief Sets PLL input frequency
    @param id PLL id 0-PLLA 1-PLLB
    @param CLKIN_Hz clock input in Hz
 */
 void Si5351C::SetPLL(unsigned char id, unsigned long CLKIN_Hz, int CLK_SRC)
 {
    if (id < 2)
    {
        PLL[id].inputFreqHz = CLKIN_Hz;
        PLL[id].CLK_SRC = CLK_SRC;
    }
 }
 /** @brief Resets configuration registers to default values
 */
 void Si5351C::Reset()
 {
    memset(m_newConfiguration, 0, 255);
    for(unsigned int i=0; i<sizeof(m_defaultConfiguration); i+=2)
    {
        m_newConfiguration[m_defaultConfiguration[i]] = m_defaultConfiguration[i+1];
    }
 }
 Si5351C::StatusBits Si5351C::GetStatusBits()
 {
    StatusBits stat;
    LMScomms::GenericPacket pkt;
    pkt.cmd = CMD_SI5351_RD;
    pkt.outBuffer.push_back(0);
    pkt.outBuffer.push_back(1);        
    LMScomms::TransferStatus status;
    status = device->TransferPacket(pkt);
    if (status != LMScomms::TRANSFER_SUCCESS || pkt.status != STATUS_COMPLETED_CMD)
    {
        return stat;
    }
    stat.sys_init = (pkt.inBuffer[0] >> 7);
    stat.lol_b = (pkt.inBuffer[0] >> 6) & 0x1;
    stat.lol_a = (pkt.inBuffer[0] >> 5) & 0x1;
    stat.los = (pkt.inBuffer[0] >> 4) & 0x1;
    stat.sys_init_stky = (pkt.inBuffer[1] >> 7);
    stat.lol_b_stky = (pkt.inBuffer[1] >> 6) & 0x1;
    stat.lol_a_stky = (pkt.inBuffer[1] >> 5) & 0x1;
    stat.los_stky = (pkt.inBuffer[1] >> 4) & 0x1;
    return stat;
 }
 Si5351C::Status Si5351C::ClearStatus()
 {    
    LMScomms::GenericPacket pkt;
    pkt.cmd = CMD_SI5351_WR;
    pkt.outBuffer.push_back(1);
    pkt.outBuffer.push_back(0x0);    
    LMScomms::TransferStatus status;
    status = device->TransferPacket(pkt);
    if (status != LMScomms::TRANSFER_SUCCESS || pkt.status != STATUS_COMPLETED_CMD)    
        return FAILED;
    return SUCCESS;
 }
@@ -0,0 +1,100 @@
 /**
@file	Si5351C.h
@brief	Header for Si5351C.cpp
@author	Lime Microsystems
 */
 #ifndef SI5351C_MODULE
 #define SI5351C_MODULE
 #include <stdio.h>
 #include <string>
 using namespace std;
 //---------------------------------------------------------------------------
 enum eSi_CLOCK_INPUT
 {
    Si_CLKIN,
    Si_XTAL,
    Si_CMOS
 };
 struct Si5351_Channel
 {
    Si5351_Channel() : outputDivider(1), outputFreqHz(1), multisynthDivider(1), pllSource(0),
        phaseOffset(0), powered(true), inverted(false), int_mode(false) {};
    int outputDivider;
    unsigned long outputFreqHz;
    float multisynthDivider;
    int pllSource;
    float phaseOffset;
    bool powered;
    bool inverted;
    bool int_mode;
 };
 struct Si5351_PLL
 {
    Si5351_PLL() : inputFreqHz(0), VCO_Hz(0), feedbackDivider(0), CLKIN_DIV(1), CLK_SRC(1) {}
    unsigned long inputFreqHz;
    float VCO_Hz;
    float feedbackDivider;
    int CLKIN_DIV;
    int CLK_SRC; //0-XTAL, 1-CLKIN
 };
 class LMScomms;
 class Si5351C
 {
 public:
    enum Status
    {
        SUCCESS,
        FAILED,
    };
    struct StatusBits
    {
        StatusBits() : sys_init(0), sys_init_stky(0), lol_b(0), lol_b_stky(0), lol_a(0), lol_a_stky(0), los(0), los_stky(0)
        {
        }
        int sys_init;
        int sys_init_stky;
        int lol_b;
        int lol_b_stky;
        int lol_a;
        int lol_a_stky;
        int los;
        int los_stky;
    };
    StatusBits GetStatusBits();
    Status ClearStatus();
 	Si5351C();
 	~Si5351C();
 	void Initialize(LMScomms *mng);
 	bool LoadRegValuesFromFile(string FName);
    void SetPLL(unsigned char id, unsigned long CLKIN_Hz, int CLK_SRC);
    void SetClock(unsigned char id, unsigned long fOut_Hz, bool enabled = true, bool inverted = false);
    Status UploadConfiguration();
    Status ConfigureClocks();
 	void Reset();
 private:
    void FindVCO(Si5351_Channel *clocks, Si5351_PLL *plls, const unsigned long Fmin, const unsigned long Fmax);
    LMScomms *device;
    Si5351_PLL PLL[2];
    Si5351_Channel CLK[8];
 	static const unsigned char m_defaultConfiguration[];
 	unsigned char m_newConfiguration[255];
 };
 #endif // SI5351C_MODULE
@@ -0,0 +1,326 @@
 # This is the CMakeCache file.
 # For build in directory: /home/papillon/openairinterface5g/targets/ARCH/LMSSDR/USERSPACE/LIB/Si5351C/build
 # It was generated by CMake: /usr/bin/cmake
 # You can edit this file to change values found and used by cmake.
 # If you do not want to change any of the values, simply exit the editor.
 # If you do want to change a value, simply edit, save, and exit the editor.
 # The syntax for the file is as follows:
 # KEY:TYPE=VALUE
 # KEY is the name of a variable in the cache.
 # TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!.
 # VALUE is the current value for the KEY.
 ########################
 # EXTERNAL cache entries
 ########################
 //Path to a program.
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@@ -941,13 +941,13 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB)
 	len = phy_vars_eNB->lte_frame_parms.samples_per_tti>>1;
      else
 	len = phy_vars_eNB->lte_frame_parms.samples_per_tti;
-      
+      /*
      for (i=0;i<len;i+=4) {
 	dummy_tx_b[i] = 0x100;
 	dummy_tx_b[i+1] = 0x01000000;
 	dummy_tx_b[i+2] = 0xff00;
 	dummy_tx_b[i+3] = 0xff000000;
-      }
+	}*/
      for (i=0; i<len; i++) {
        tx_offset = (int)slot_offset+time_offset[aa]+i;
@@ -529,11 +529,11 @@ static void *UE_thread_synch(void *arg)
 #endif
-#ifdef OAI_USRP
+#if defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
            openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
-
+#if 0
            switch(UE->lte_frame_parms.N_RB_DL) {
            case 6:
              openair0_cfg[card].rx_gain[i] -= 12;
@@ -555,7 +555,7 @@ static void *UE_thread_synch(void *arg)
              printf("Unknown number of RBs %d\n",UE->lte_frame_parms.N_RB_DL);
              break;
            }
-	    
+#endif	    
 #endif
          }
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