Merge branch 'NR_RRCConfiguration' of https://gitlab.eurecom.fr/oai/openairinterface5g into NR_RRCConfiguration
Conflicts: nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h
This commit is contained in:
@@ -22,7 +22,6 @@
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#define NFAPI_MAX_NUM_GROUPS 8
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#define NFAPI_MAX_NUM_CB 8
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typedef struct {
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/// Value: 0 -> 1, 0: Payload is carried directly in the value field, 1: Pointer to payload is in the value field
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uint16_t tag;
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@@ -67,12 +66,6 @@ typedef enum {
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//3.3.1 PARAM
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typedef struct {
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nfapi_tl_t tl;
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uint16_t value;
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} nfapi_nr_param_tlv_t;
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//same with nfapi_param_request_t
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typedef struct {
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nfapi_p4_p5_message_header_t header;
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@@ -85,12 +78,12 @@ typedef enum {
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} nfapi_nr_param_errors_e;
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typedef struct {
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/*typedef struct {
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nfapi_nr_param_errors_e error_code;
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//Number of TLVs contained in the message body.
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uint8_t number_of_tlvs;
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nfapi_nr_param_tlv_t TLV;
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} nfapi_nr_param_response_t;
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} nfapi_nr_param_response_t;*/
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//PARAM and CONFIG TLVs are used in the PARAM and CONFIG message exchanges, respectively
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@@ -100,7 +93,7 @@ typedef struct {
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//table 3-9
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#define NFAPI_NR_PARAM_TLV_RELEASE_CAPABILITY_TAG 0x0001
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#define NFAPI_NR_PARAM_TLV_RELEASE_CAPABILITY_TAG 0x0001
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#define NFAPI_NR_PARAM_TLV_PHY_STATE_TAG 0x0002
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#define NFAPI_NR_PARAM_TLV_SKIP_BLANK_DL_CONFIG_TAG 0x0003
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#define NFAPI_NR_PARAM_TLV_SKIP_BLANK_UL_CONFIG_TAG 0x0004
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@@ -157,123 +150,113 @@ typedef struct {
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typedef struct
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{
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uint16_t release_capability; //TAG 0x0001
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uint16_t phy_state;
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uint8_t skip_blank_dl_config;
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uint8_t skip_blank_ul_config;
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uint16_t num_config_tlvs_to_report;
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nfapi_nr_param_tlv_t* config_tlvs_to_report_list;
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nfapi_uint16_tlv_t release_capability; //TAG 0x0001
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nfapi_uint16_tlv_t phy_state;
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nfapi_uint8_tlv_t skip_blank_dl_config;
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nfapi_uint8_tlv_t skip_blank_ul_config;
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nfapi_uint16_tlv_t num_config_tlvs_to_report;
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nfapi_uint8_tlv_t* config_tlvs_to_report_list;
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} nfapi_nr_cell_param_t;
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//table 3-10 Carrier parameters
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typedef struct
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{
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uint8_t cyclic_prefix;//TAG 0x0006
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uint8_t supported_subcarrier_spacings_dl;
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uint16_t supported_bandwidth_dl;
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uint8_t supported_subcarrier_spacings_ul;
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uint16_t supported_bandwidth_ul;
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nfapi_uint8_tlv_t cyclic_prefix;//TAG 0x0006
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nfapi_uint16_tlv_t supported_subcarrier_spacings_dl;
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nfapi_uint16_tlv_t supported_bandwidth_dl;
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nfapi_uint8_tlv_t supported_subcarrier_spacings_ul;
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nfapi_uint16_tlv_t supported_bandwidth_ul;
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} nfapi_nr_carrier_param_t;
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//table 3-11 PDCCH parameters
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typedef struct
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{
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uint8_t cce_mapping_type;
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uint8_t coreset_outside_first_3_of_ofdm_syms_of_slot;
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uint8_t coreset_precoder_granularity_coreset;
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uint8_t pdcch_mu_mimo;
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uint8_t pdcch_precoder_cycling;
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uint8_t max_pdcch_per_slot;//TAG 0x0010
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nfapi_uint8_tlv_t cce_mapping_type;
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nfapi_uint8_tlv_t coreset_outside_first_3_of_ofdm_syms_of_slot;
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nfapi_uint8_tlv_t coreset_precoder_granularity_coreset;
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nfapi_uint8_tlv_t pdcch_mu_mimo;
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nfapi_uint8_tlv_t pdcch_precoder_cycling;
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nfapi_uint8_tlv_t max_pdcch_per_slot;//TAG 0x0010
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} nfapi_nr_pdcch_param_t;
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//table 3-12 PUCCH parameters
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typedef struct
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{
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uint8_t pucch_formats;
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uint8_t max_pucchs_per_slot;
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nfapi_uint8_tlv_t pucch_formats;
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nfapi_uint8_tlv_t max_pucchs_per_slot;
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} nfapi_nr_pucch_param_t;
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//table 3-13 PDSCH parameters
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typedef struct
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{
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uint8_t pdsch_mapping_type;
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uint8_t pdsch_allocation_types;
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uint8_t pdsch_vrb_to_prb_mapping;
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uint8_t pdsch_cbg;
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uint8_t pdsch_dmrs_config_types;
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uint8_t pdsch_dmrs_max_length;
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uint8_t pdsch_dmrs_additional_pos;
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uint8_t max_pdsch_tbs_per_slot;
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uint8_t max_number_mimo_layers_pdsch;
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uint8_t supported_max_modulation_order_dl;
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uint8_t max_mu_mimo_users_dl;
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uint8_t pdsch_data_in_dmrs_symbols;
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uint8_t premption_support;//TAG 0x001F
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uint8_t pdsch_non_slot_support;
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nfapi_uint8_tlv_t pdsch_mapping_type;
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nfapi_uint8_tlv_t pdsch_allocation_types;
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nfapi_uint8_tlv_t pdsch_vrb_to_prb_mapping;
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nfapi_uint8_tlv_t pdsch_cbg;
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nfapi_uint8_tlv_t pdsch_dmrs_config_types;
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nfapi_uint8_tlv_t pdsch_dmrs_max_length;
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nfapi_uint8_tlv_t pdsch_dmrs_additional_pos;
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nfapi_uint8_tlv_t max_pdsch_tbs_per_slot;
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nfapi_uint8_tlv_t max_number_mimo_layers_pdsch;
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nfapi_uint8_tlv_t supported_max_modulation_order_dl;
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nfapi_uint8_tlv_t max_mu_mimo_users_dl;
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nfapi_uint8_tlv_t pdsch_data_in_dmrs_symbols;
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nfapi_uint8_tlv_t premption_support;//TAG 0x001F
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nfapi_uint8_tlv_t pdsch_non_slot_support;
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} nfapi_nr_pdsch_param_t;
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//table 3-14
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typedef struct
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{
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uint8_t uci_mux_ulsch_in_pusch;
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uint8_t uci_only_pusch;
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uint8_t pusch_frequency_hopping;
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uint8_t pusch_dmrs_config_types;
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uint8_t pusch_dmrs_max_len;
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uint8_t pusch_dmrs_additional_pos;
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uint8_t pusch_cbg;
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uint8_t pusch_mapping_type;
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uint8_t pusch_allocation_types;
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uint8_t pusch_vrb_to_prb_mapping;
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//uint8 ? ↓ see table 3-14
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uint8_t pusch_max_ptrs_ports;
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uint8_t max_pduschs_tbs_per_slot;
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uint8_t max_number_mimo_layers_non_cb_pusch;
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uint8_t supported_modulation_order_ul;
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uint8_t max_mu_mimo_users_ul;
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uint8_t dfts_ofdm_support;
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uint8_t pusch_aggregation_factor;//TAG 0x0031
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nfapi_uint8_tlv_t uci_mux_ulsch_in_pusch;
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nfapi_uint8_tlv_t uci_only_pusch;
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nfapi_uint8_tlv_t pusch_frequency_hopping;
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nfapi_uint8_tlv_t pusch_dmrs_config_types;
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nfapi_uint8_tlv_t pusch_dmrs_max_len;
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nfapi_uint8_tlv_t pusch_dmrs_additional_pos;
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nfapi_uint8_tlv_t pusch_cbg;
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nfapi_uint8_tlv_t pusch_mapping_type;
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nfapi_uint8_tlv_t pusch_allocation_types;
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nfapi_uint8_tlv_t pusch_vrb_to_prb_mapping;
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nfapi_uint8_tlv_t pusch_max_ptrs_ports;
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nfapi_uint8_tlv_t max_pduschs_tbs_per_slot;
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nfapi_uint8_tlv_t max_number_mimo_layers_non_cb_pusch;
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nfapi_uint8_tlv_t supported_modulation_order_ul;
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nfapi_uint8_tlv_t max_mu_mimo_users_ul;
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nfapi_uint8_tlv_t dfts_ofdm_support;
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nfapi_uint8_tlv_t pusch_aggregation_factor;//TAG 0x0031
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} nfapi_nr_pusch_param_t;
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//table 3-15
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typedef struct
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{
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uint8_t prach_long_formats;
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uint8_t prach_short_formats;
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uint8_t prach_restricted_sets;
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uint8_t max_prach_fd_occasions_in_a_slot;
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nfapi_uint8_tlv_t prach_long_formats;
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nfapi_uint8_tlv_t prach_short_formats;
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nfapi_uint8_tlv_t prach_restricted_sets;
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nfapi_uint8_tlv_t max_prach_fd_occasions_in_a_slot;
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} nfapi_nr_prach_param_t;
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//table 3-16
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typedef struct
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{
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uint8_t rssi_measurement_support;
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nfapi_uint8_tlv_t rssi_measurement_support;
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} nfapi_nr_measurement_param_t;
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//-------------------------------------------//
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//3.3.2 CONFIG
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typedef struct {
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nfapi_tl_t tl;
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uint16_t value;
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} nfapi_nr_config_tlv_t;
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typedef struct {
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uint8_t number_of_tlvs;
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nfapi_nr_config_tlv_t tlv;
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} nfapi_nr_config_request_scf_t;
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typedef enum {
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NFAPI_NR_CONFIG_MSG_OK = 0,
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NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state.
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NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state.
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} nfapi_nr_config_errors_e;
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typedef struct {
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/*typedef struct {
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nfapi_nr_config_errors_e error_code;
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uint8_t number_of_invalid_tlvs_that_can_only_be_configured_in_idle;
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uint8_t unmber_of_missing_tlvs;
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@@ -283,7 +266,7 @@ typedef struct {
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nfapi_nr_config_tlv_t* tlv_invalid_running_list;
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nfapi_nr_config_tlv_t* tlv_missing_list;
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} nfapi_nr_config_response_t;
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} nfapi_nr_config_response_t;*/
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//nfapi_nr_config_tlv_format_t carrier config ~ precoding config:
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@@ -336,34 +319,34 @@ typedef struct {
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//table 3-21
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typedef struct
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{
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uint16_t dl_bandwidth;//Carrier bandwidth for DL in MHz [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400
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uint32_t dl_frequency; //Absolute frequency of DL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000
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uint16_t dl_k0[5];//𝑘_{0}^{𝜇} for each of the numerologies [38.211, sec 5.3.1] Value: 0 ->23699
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uint16_t dl_grid_size[5];//Grid size 𝑁_{𝑔𝑟𝑖𝑑}^{𝑠𝑖𝑧𝑒,𝜇} for each of the numerologies [38.211, sec 4.4.2] Value: 0->275 0 = this numerology not used
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uint16_t num_tx_ant;//Number of Tx antennas
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uint16_t uplink_bandwidth;//Carrier bandwidth for UL in MHz. [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400
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uint32_t uplink_frequency;//Absolute frequency of UL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000
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uint16_t ul_k0[5];//𝑘0 𝜇 for each of the numerologies [38.211, sec 5.3.1] Value: : 0 ->23699
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uint16_t ul_grid_size[5];//Grid size 𝑁𝑔𝑟𝑖𝑑 𝑠𝑖𝑧𝑒,𝜇 for each of the numerologies [38.211, sec 4.4.2]. Value: 0->275 0 = this numerology not used
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uint16_t num_rx_ant;//
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uint8_t frequency_shift_7p5khz;//Indicates presence of 7.5KHz frequency shift. Value: 0 = false 1 = true
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nfapi_uint16_tlv_t dl_bandwidth;//Carrier bandwidth for DL in MHz [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400
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nfapi_uint32_tlv_t dl_frequency; //Absolute frequency of DL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000
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nfapi_uint16_tlv_t dl_k0[5];//𝑘_{0}^{𝜇} for each of the numerologies [38.211, sec 5.3.1] Value: 0 ->23699
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nfapi_uint16_tlv_t dl_grid_size[5];//Grid size 𝑁_{𝑔𝑟𝑖𝑑}^{𝑠𝑖𝑧𝑒,𝜇} for each of the numerologies [38.211, sec 4.4.2] Value: 0->275 0 = this numerology not used
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nfapi_uint16_tlv_t num_tx_ant;//Number of Tx antennas
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nfapi_uint16_tlv_t uplink_bandwidth;//Carrier bandwidth for UL in MHz. [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400
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nfapi_uint32_tlv_t uplink_frequency;//Absolute frequency of UL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000
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nfapi_uint16_tlv_t ul_k0[5];//𝑘0 𝜇 for each of the numerologies [38.211, sec 5.3.1] Value: : 0 ->23699
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nfapi_uint16_tlv_t ul_grid_size[5];//Grid size 𝑁𝑔𝑟𝑖𝑑 𝑠𝑖𝑧𝑒,𝜇 for each of the numerologies [38.211, sec 4.4.2]. Value: 0->275 0 = this numerology not used
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nfapi_uint16_tlv_t num_rx_ant;//
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nfapi_uint8_tlv_t frequency_shift_7p5khz;//Indicates presence of 7.5KHz frequency shift. Value: 0 = false 1 = true
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} nfapi_nr_carrier_config_t;
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//table 3-22
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typedef struct
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{
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uint8_t phy_cell_id;//Physical Cell ID, 𝑁_{𝐼𝐷}^{𝑐𝑒𝑙𝑙} [38.211, sec 7.4.2.1] Value: 0 ->1007
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uint8_t frame_duplex_type;//Frame duplex type Value: 0 = FDD 1 = TDD
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nfapi_uint8_tlv_t phy_cell_id;//Physical Cell ID, 𝑁_{𝐼𝐷}^{𝑐𝑒𝑙𝑙} [38.211, sec 7.4.2.1] Value: 0 ->1007
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nfapi_uint8_tlv_t frame_duplex_type;//Frame duplex type Value: 0 = FDD 1 = TDD
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} nfapi_nr_cell_config_t;
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//table 3-23
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typedef struct
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{
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uint32_t ss_pbch_power;//SSB Block Power Value: TBD (-60..50 dBm)
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uint8_t bch_payload;//Defines option selected for generation of BCH payload, see Table 3-13 (v0.0.011 Value: 0: MAC generates the full PBCH payload 1: PHY generates the timing PBCH bits 2: PHY generates the full PBCH payload
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uint8_t scs_common;//subcarrierSpacing for common, used for initial access and broadcast message. [38.211 sec 4.2] Value:0->3
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nfapi_uint32_tlv_t ss_pbch_power;//SSB Block Power Value: TBD (-60..50 dBm)
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nfapi_uint8_tlv_t bch_payload;//Defines option selected for generation of BCH payload, see Table 3-13 (v0.0.011 Value: 0: MAC generates the full PBCH payload 1: PHY generates the timing PBCH bits 2: PHY generates the full PBCH payload
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nfapi_uint8_tlv_t scs_common;//subcarrierSpacing for common, used for initial access and broadcast message. [38.211 sec 4.2] Value:0->3
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} nfapi_nr_ssb_config_t;
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@@ -375,51 +358,51 @@ typedef struct
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typedef struct
|
||||
{
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||||
uint8_t num_prach_fd_occasions;
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uint16_t prach_root_sequence_index;//Starting logical root sequence index, 𝑖, equivalent to higher layer parameter prach-RootSequenceIndex [38.211, sec 6.3.3.1] Value: 0 -> 837
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uint8_t num_root_sequences;//Number of root sequences for a particular FD occasion that are required to generate the necessary number of preambles
|
||||
uint16_t k1;//Frequency offset (from UL bandwidth part) for each FD. [38.211, sec 6.3.3.2] Value: from 0 to 272
|
||||
uint8_t prach_zero_corr_conf;//PRACH Zero CorrelationZone Config which is used to dervive 𝑁𝑐𝑠 [38.211, sec 6.3.3.1] Value: from 0 to 15
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uint8_t num_unused_root_sequences;//Number of unused sequences available for noise estimation per FD occasion. At least one unused root sequence is required per FD occasion.
|
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uint8_t* unused_root_sequences_list;//Unused root sequence or sequences per FD occasion. Required for noise estimation.
|
||||
nfapi_uint16_tlv_t prach_root_sequence_index;//Starting logical root sequence index, 𝑖, equivalent to higher layer parameter prach-RootSequenceIndex [38.211, sec 6.3.3.1] Value: 0 -> 837
|
||||
nfapi_uint8_tlv_t num_root_sequences;//Number of root sequences for a particular FD occasion that are required to generate the necessary number of preambles
|
||||
nfapi_uint16_tlv_t k1;//Frequency offset (from UL bandwidth part) for each FD. [38.211, sec 6.3.3.2] Value: from 0 to 272
|
||||
nfapi_uint8_tlv_t prach_zero_corr_conf;//PRACH Zero CorrelationZone Config which is used to dervive 𝑁𝑐𝑠 [38.211, sec 6.3.3.1] Value: from 0 to 15
|
||||
nfapi_uint8_tlv_t num_unused_root_sequences;//Number of unused sequences available for noise estimation per FD occasion. At least one unused root sequence is required per FD occasion.
|
||||
nfapi_uint8_tlv_t* unused_root_sequences_list;//Unused root sequence or sequences per FD occasion. Required for noise estimation.
|
||||
|
||||
} nfapi_nr_num_prach_fd_occasions_t;
|
||||
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||||
typedef struct
|
||||
{
|
||||
uint8_t prach_sequence_length;//RACH sequence length. Long or Short sequence length. Only short sequence length is supported for FR2. [38.211, sec 6.3.3.1] Value: 0 = Long sequence 1 = Short sequence
|
||||
uint8_t prach_sub_c_spacing;//Subcarrier spacing of PRACH. [38.211 sec 4.2] Value:0->4
|
||||
uint8_t restricted_set_config;//PRACH restricted set config Value: 0: unrestricted 1: restricted set type A 2: restricted set type B
|
||||
uint8_t num_prach_fd_occasions;//Number of RACH frequency domain occasions. Corresponds to the parameter 𝑀 in [38.211, sec 6.3.3.2] which equals the higher layer parameter msg1FDM Value: 1,2,4,8
|
||||
nfapi_uint8_tlv_t prach_sequence_length;//RACH sequence length. Only short sequence length is supported for FR2. [38.211, sec 6.3.3.1] Value: 0 = Long sequence 1 = Short sequence
|
||||
nfapi_uint8_tlv_t prach_sub_c_spacing;//Subcarrier spacing of PRACH. [38.211 sec 4.2] Value:0->4
|
||||
nfapi_uint8_tlv_t restricted_set_config;//PRACH restricted set config Value: 0: unrestricted 1: restricted set type A 2: restricted set type B
|
||||
nfapi_uint8_tlv_t num_prach_fd_occasions;//Corresponds to the parameter 𝑀 in [38.211, sec 6.3.3.2] which equals the higher layer parameter msg1FDM Value: 1,2,4,8
|
||||
nfapi_nr_num_prach_fd_occasions_t* num_prach_fd_occasions_list;
|
||||
uint8_t ssb_per_rach;//SSB-per-RACH-occasion Value: 0: 1/8 1:1/4, 2:1/2 3:1 4:2 5:4, 6:8 7:16
|
||||
uint8_t prach_multiple_carriers_in_a_band;//0 = disabled 1 = enabled
|
||||
nfapi_uint8_tlv_t ssb_per_rach;//SSB-per-RACH-occasion Value: 0: 1/8 1:1/4, 2:1/2 3:1 4:2 5:4, 6:8 7:16
|
||||
nfapi_uint8_tlv_t prach_multiple_carriers_in_a_band;//0 = disabled 1 = enabled
|
||||
|
||||
} nfapi_nr_prach_config_t;
|
||||
|
||||
//table 3-25
|
||||
typedef struct
|
||||
{
|
||||
uint32_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted
|
||||
nfapi_uint32_tlv_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted
|
||||
|
||||
} nfapi_nr_ssb_mask_size_2_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t beam_id[64];//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63
|
||||
nfapi_uint8_tlv_t beam_id[64];//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63
|
||||
|
||||
} nfapi_nr_ssb_mask_size_64_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t ssb_offset_point_a;//Offset of lowest subcarrier of lowest resource block used for SS/PBCH block. Given in PRB [38.211, section 4.4.4.2] Value: 0->2199
|
||||
uint8_t beta_pss;//PSS EPRE to SSS EPRE in a SS/PBCH block [38.213, sec 4.1] Values: 0 = 0dB
|
||||
uint8_t ssb_period;//SSB periodicity in msec Value: 0: ms5 1: ms10 2: ms20 3: ms40 4: ms80 5: ms160
|
||||
uint8_t ssb_subcarrier_offset;//ssbSubcarrierOffset or 𝑘𝑆𝑆𝐵 (38.211, section 7.4.3.1) Value: 0->31
|
||||
uint32_t MIB;//MIB payload, where the 24 MSB are used and represent the MIB in [38.331 MIB IE] and represent 0 1 2 3 1 , , , ,..., A− a a a a a [38.212, sec 7.1.1]
|
||||
nfapi_nr_ssb_mask_size_2_t* ssb_mask_size_2_list;//2
|
||||
nfapi_nr_ssb_mask_size_64_t* ssb_mask_size_64_list;//64
|
||||
uint8_t ss_pbch_multiple_carriers_in_a_band;//0 = disabled 1 = enabled
|
||||
uint8_t multiple_cells_ss_pbch_in_a_carrier;//Indicates that multiple cells will be supported in a single carrier 0 = disabled 1 = enabled
|
||||
nfapi_uint16_tlv_t ssb_offset_point_a;//Offset of lowest subcarrier of lowest resource block used for SS/PBCH block. Given in PRB [38.211, section 4.4.4.2] Value: 0->2199
|
||||
nfapi_uint8_tlv_t beta_pss;//PSS EPRE to SSS EPRE in a SS/PBCH block [38.213, sec 4.1] Values: 0 = 0dB
|
||||
nfapi_uint8_tlv_t ssb_period;//SSB periodicity in msec Value: 0: ms5 1: ms10 2: ms20 3: ms40 4: ms80 5: ms160
|
||||
nfapi_uint8_tlv_t ssb_subcarrier_offset;//ssbSubcarrierOffset or 𝑘𝑆𝑆𝐵 (38.211, section 7.4.3.1) Value: 0->31
|
||||
nfapi_uint32_tlv_t MIB;//MIB payload, where the 24 MSB are used and represent the MIB in [38.331 MIB IE] and represent 0 1 2 3 1 , , , ,..., A− a a a a a [38.212, sec 7.1.1]
|
||||
nfapi_nr_ssb_mask_size_2_t ssb_mask_list[2];
|
||||
nfapi_nr_ssb_mask_size_64_t* ssb_beam_id_list;//64
|
||||
nfapi_uint8_tlv_t ss_pbch_multiple_carriers_in_a_band;//0 = disabled 1 = enabled
|
||||
nfapi_uint8_tlv_t multiple_cells_ss_pbch_in_a_carrier;//Indicates that multiple cells will be supported in a single carrier 0 = disabled 1 = enabled
|
||||
|
||||
} nfapi_nr_ssb_table_t;
|
||||
|
||||
@@ -428,7 +411,7 @@ typedef struct
|
||||
//?
|
||||
typedef struct
|
||||
{
|
||||
uint8_t slot_config;//For each symbol in each slot a uint8_t value is provided indicating: 0: DL slot 1: UL slot 2: Guard slot
|
||||
nfapi_uint8_tlv_t slot_config;//For each symbol in each slot a uint8_t value is provided indicating: 0: DL slot 1: UL slot 2: Guard slot
|
||||
|
||||
} nfapi_nr_max_num_of_symbol_per_slot_t;
|
||||
|
||||
@@ -440,7 +423,7 @@ typedef struct
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10
|
||||
nfapi_uint8_tlv_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10
|
||||
nfapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list;
|
||||
|
||||
} nfapi_nr_tdd_table_t;
|
||||
@@ -448,10 +431,23 @@ typedef struct
|
||||
//table 3-27
|
||||
typedef struct
|
||||
{
|
||||
uint8_t rssi_measurement;//RSSI measurement unit. See Table 3-16 for RSSI definition. Value: 0: Do not report RSSI 1: dBm 2: dBFS
|
||||
nfapi_uint8_tlv_t rssi_measurement;//RSSI measurement unit. See Table 3-16 for RSSI definition. Value: 0: Do not report RSSI 1: dBm 2: dBFS
|
||||
|
||||
} nfapi_nr_measurement_config_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint8_t num_tlv;
|
||||
nfapi_nr_carrier_config_t carrier_config;
|
||||
nfapi_nr_cell_config_t cell_config;
|
||||
nfapi_nr_ssb_config_t ssb_config;
|
||||
nfapi_nr_prach_config_t prach_config;
|
||||
nfapi_nr_ssb_table_t ssb_table;
|
||||
nfapi_nr_tdd_table_t tdd_table;
|
||||
nfapi_nr_measurement_config_t measurement_config;
|
||||
} nfapi_nr_config_request_scf_t;
|
||||
|
||||
|
||||
//------------------------------//
|
||||
//3.3.3 START
|
||||
|
||||
|
||||
Reference in New Issue
Block a user