diff --git a/.vscode/launch.json b/.vscode/launch.json
new file mode 100644
index 0000000000..6757ed47f6
--- /dev/null
+++ b/.vscode/launch.json
@@ -0,0 +1,28 @@
+{
+ // Use IntelliSense to learn about possible attributes.
+ // Hover to view descriptions of existing attributes.
+ // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
+ "version": "0.2.0",
+ "configurations": [
+ {
+ "name": "(gdb) Launch",
+ "type": "cppdbg",
+ "request": "launch",
+ "program": "enter program name, for example ${workspaceFolder}/a.exe",
+ "args": [],
+ "stopAtEntry": false,
+ "cwd": "${workspaceFolder}",
+ "environment": [],
+ "externalConsole": false,
+ "MIMode": "gdb",
+ "miDebuggerPath": "/path/to/gdb",
+ "setupCommands": [
+ {
+ "description": "Enable pretty-printing for gdb",
+ "text": "-enable-pretty-printing",
+ "ignoreFailures": true
+ }
+ ]
+ }
+ ]
+}
\ No newline at end of file
diff --git a/ci-scripts/Jenkinsfile-gitlab b/ci-scripts/Jenkinsfile-gitlab
index 86e9cdf74b..d16de8b7ab 100644
--- a/ci-scripts/Jenkinsfile-gitlab
+++ b/ci-scripts/Jenkinsfile-gitlab
@@ -44,7 +44,7 @@ pipeline {
disableConcurrentBuilds()
timestamps()
gitLabConnection('OAI GitLab')
- gitlabBuilds(builds: ["Build gNB-USRP", "Build nr-UE-USRP", "Build eNB-USRP", "Build basic-sim", "Build phy-sim", "Build eNB-ethernet", "Build UE-ethernet", "Analysis with cppcheck", "Test phy-sim", "Test basic-sim", "Test L2-sim", "Test-Mono-FDD-Band7", "Test-Mono-TDD-Band40", "Test-IF4p5-FDD-Band7", "Test-IF4p5-TDD-Band40", "Test-Mono-FDD-Band13", "Test-Mono-FDD-Band13-X2-HO", "Test-TDD-Band78-gNB-NR-UE"])
+ gitlabBuilds(builds: ["Build gNB-USRP", "Build nr-UE-USRP", "Build eNB-USRP", "Build basic-sim", "Build phy-sim", "Build eNB-ethernet", "Build UE-ethernet", "Analysis with cppcheck", "Test phy-sim", "Test basic-sim", "Test L2-sim", "Test-Mono-FDD-Band7", "Test-Mono-TDD-Band40", "Test-IF4p5-FDD-Band7", "Test-IF4p5-TDD-Band40", "Test-Mono-FDD-Band13", "Test-IF4p5-TDD-Band38-Multi-RRU" , "Test-Mono-FDD-Band13-X2-HO", "Test-TDD-Band78-gNB-NR-UE"])
ansiColor('xterm')
}
@@ -131,8 +131,8 @@ pipeline {
[$class: 'UsernamePasswordMultiBinding', credentialsId: "${params.FlexRanRtcGitLabRepository_Credentials}", usernameVariable: 'git_username', passwordVariable: 'git_password']
]) {
sh "git clone https://${git_username}:${git_password}@gitlab.eurecom.fr/flexran/flexran-rtc.git . > ../git_clone.log 2>&1"
+ sh "git checkout develop >> ../git_clone.log 2>&1"
}
- sh "sed -i -e 's#add-apt-repository.*cleishm.*neo4j#add-apt-repository ppa:cleishm/neo4j -y#' -e 's#libneo4j-client-dev#libneo4j-client-dev -y#' tools/install_dependencies"
sh "zip -r -qq flexran.zip ."
}
}
@@ -578,6 +578,25 @@ pipeline {
}
}
}
+ stage ("Test IF4p5 - TDD - Band 38 - B210 - MultiRRU") {
+ steps {
+ script {
+ triggerSlaveJob ('eNB-CI-IF4p5-TDD-Band38-MultiRRU-B210', 'Test-IF4p5-TDD-Band38-Multi-RRU')
+ }
+ }
+ post {
+ always {
+ script {
+ finalizeSlaveJob('eNB-CI-IF4p5-TDD-Band38-MultiRRU-B210')
+ }
+ }
+ failure {
+ script {
+ currentBuild.result = 'FAILURE'
+ }
+ }
+ }
+ }
stage ("Test OAI UE - FDD - Band 20 - B200") {
steps {
script {
diff --git a/ci-scripts/buildOnVM.sh b/ci-scripts/buildOnVM.sh
index 076e90fc2d..ef2637965f 100755
--- a/ci-scripts/buildOnVM.sh
+++ b/ci-scripts/buildOnVM.sh
@@ -72,7 +72,7 @@ function build_on_vm {
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
- uvt-kvm create $VM_NAME release=$VM_OSREL --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
+ uvt-kvm create $VM_NAME release=$VM_OSREL --memory $VM_MEMORY --cpu $VM_CPU --disk 10 --unsafe-caching --template ci-scripts/template-host.xml
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
@@ -179,8 +179,12 @@ function build_on_vm {
echo "cp /home/ubuntu/zip-install.txt cmake_targets/log" >> $VM_CMDS
echo "echo \"./tools/install_dependencies \"" >> $VM_CMDS
echo "./tools/install_dependencies > cmake_targets/log/install-build.txt 2>&1" >> $VM_CMDS
+ echo "echo \"mkdir build\"" >> $VM_CMDS
+ echo "mkdir build" >> $VM_CMDS
+ echo "echo \"cd build\"" >> $VM_CMDS
+ echo "cd build" >> $VM_CMDS
echo "echo \"$BUILD_OPTIONS \"" >> $VM_CMDS
- echo "$BUILD_OPTIONS > cmake_targets/log/rt_controller.Rel15.txt 2>&1" >> $VM_CMDS
+ echo "$BUILD_OPTIONS > ../cmake_targets/log/rt_controller.Rel15.txt 2>&1" >> $VM_CMDS
fi
if [[ "$VM_NAME" != *"-cppcheck"* ]] && [[ "$VM_NAME" != *"-flexran-rtc"* ]]
then
diff --git a/ci-scripts/createVM.sh b/ci-scripts/createVM.sh
index e0e1da4236..b1d2346392 100755
--- a/ci-scripts/createVM.sh
+++ b/ci-scripts/createVM.sh
@@ -90,7 +90,7 @@ function create_vm {
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
- uvt-kvm create $VM_NAME release=$VM_OSREL --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
+ uvt-kvm create $VM_NAME release=$VM_OSREL --memory $VM_MEMORY --cpu $VM_CPU --disk 10 --unsafe-caching --template ci-scripts/template-host.xml
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
diff --git a/ci-scripts/main.py b/ci-scripts/main.py
index fc7d2090db..aaa7ede62a 100644
--- a/ci-scripts/main.py
+++ b/ci-scripts/main.py
@@ -372,7 +372,7 @@ class SSHConnection():
self.air_interface = 'lte'
self.command('mkdir -p ' + lSourcePath, '\$', 5)
self.command('cd ' + lSourcePath, '\$', 5)
- self.command('if [ ! -e .git ]; then stdbuf -o0 git clone ' + self.ranRepository + ' .; else stdbuf -o0 git fetch; fi', '\$', 600)
+ self.command('if [ ! -e .git ]; then stdbuf -o0 git clone ' + self.ranRepository + ' .; else stdbuf -o0 git fetch --prune; fi', '\$', 600)
# Raphael: here add a check if git clone or git fetch went smoothly
self.command('git config user.email "jenkins@openairinterface.org"', '\$', 5)
self.command('git config user.name "OAI Jenkins"', '\$', 5)
@@ -537,7 +537,7 @@ class SSHConnection():
ue_prefix = ''
self.command('mkdir -p ' + self.UESourceCodePath, '\$', 5)
self.command('cd ' + self.UESourceCodePath, '\$', 5)
- self.command('if [ ! -e .git ]; then stdbuf -o0 git clone ' + self.ranRepository + ' .; else stdbuf -o0 git fetch; fi', '\$', 600)
+ self.command('if [ ! -e .git ]; then stdbuf -o0 git clone ' + self.ranRepository + ' .; else stdbuf -o0 git fetch --prune; fi', '\$', 600)
# here add a check if git clone or git fetch went smoothly
self.command('git config user.email "jenkins@openairinterface.org"', '\$', 5)
self.command('git config user.name "OAI Jenkins"', '\$', 5)
diff --git a/ci-scripts/oai-ci-vm-tool b/ci-scripts/oai-ci-vm-tool
index bbea199ca1..ce40134cec 100755
--- a/ci-scripts/oai-ci-vm-tool
+++ b/ci-scripts/oai-ci-vm-tool
@@ -222,7 +222,7 @@ function variant__v8__ue_ethernet {
function variant__v10__flexran_rtc {
ARCHIVES_LOC=flexran
NB_PATTERN_FILES=1
- BUILD_OPTIONS="cmake . && make -j2"
+ BUILD_OPTIONS="cmake .. && make -j2"
VARIANT_INFO="non-OSA"
}
diff --git a/ci-scripts/waitBuildOnVM.sh b/ci-scripts/waitBuildOnVM.sh
index 9626e36551..f066dacd81 100755
--- a/ci-scripts/waitBuildOnVM.sh
+++ b/ci-scripts/waitBuildOnVM.sh
@@ -76,6 +76,8 @@ function wait_on_vm_build {
echo "echo \"ps -aux | grep build \"" >> $VM_CMDS
echo "while [ \$(ps -aux | grep --color=never build_oai | grep -v grep | wc -l) -gt 0 ]; do sleep 3; done" >> $VM_CMDS
fi
+ echo "echo \"df -h\"" >> $VM_CMDS
+ echo "df -h" >> $VM_CMDS
ssh -T -o StrictHostKeyChecking=no ubuntu@$VM_IP_ADDR < $VM_CMDS
rm -f $VM_CMDS
diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt
index 42603634a5..35f24d0925 100644
--- a/cmake_targets/CMakeLists.txt
+++ b/cmake_targets/CMakeLists.txt
@@ -185,7 +185,7 @@ set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,-rpath -Wl,${CMAKE_CU
# set a flag for changes in the source code
# these changes are related to hardcoded path to include .h files
set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS} -g -DMALLOC_CHECK_=3")
-set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS} -g -DMALLOC_CHECK_=3 -O3")
+set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS} -g3 -DMALLOC_CHECK_=3 -O2")
set(GIT_BRANCH "UNKNOWN")
@@ -1727,10 +1727,6 @@ add_dependencies(L2_UE rrc_flag s1ap_flag x2_flag)
add_library( NR_L2_UE ${NR_L2_SRC_UE} ${MAC_NR_SRC_UE} )
-add_library ( LTE_NR_L2_UE
- ${LTE_NR_L2_SRC_UE}
- )
-
add_library( MAC_NR_COMMON ${OPENAIR2_DIR}/LAYER2/NR_MAC_gNB/nr_mac_common.c )
include_directories("${OPENAIR2_DIR}/NR_UE_PHY_INTERFACE")
@@ -2317,6 +2313,10 @@ add_library(minimal_lib
)
target_link_libraries(minimal_lib pthread dl ${T_LIB})
+add_executable(nfapi_test
+ ${OPENAIR_DIR}/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c
+ )
+
add_executable(replay_node
${OPENAIR_TARGETS}/ARCH/rfsimulator/stored_node.c
)
@@ -2480,44 +2480,6 @@ target_link_libraries (nr-softmodem pthread m ${CONFIG_LIBRARIES} rt crypt ${CRY
target_link_libraries (nr-softmodem ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-softmodem ${T_LIB})
-# nr-softmodem-nos1
-###################################################
-
-add_executable(nr-softmodem-nos1
- ${rrc_h}
- ${s1ap_h}
-# ${OPENAIR_BIN_DIR}/messages_xml.h
- ${OPENAIR_DIR}/executables/nr-gnb.c
- ${OPENAIR_DIR}/executables/nr-ru.c
- ${OPENAIR_DIR}/executables/nr-softmodem.c
- ${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
- ${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
- ${OPENAIR2_DIR}/RRC/NAS/nas_config.c
- ${OPENAIR2_DIR}/RRC/NAS/rb_config.c
- ${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
- ${OPENAIR_DIR}/common/utils/utils.c
- ${OPENAIR_DIR}/common/utils/system.c
- ${OPENAIR_DIR}/common/utils/nr/nr_common.c
- ${GTPU_need_ITTI}
- ${XFORMS_SOURCE_NR}
- ${T_SOURCE}
- ${CONFIG_SOURCES}
- ${SHLIB_LOADER_SOURCES}
- )
-
-target_link_libraries (nr-softmodem-nos1
- -Wl,--start-group
- UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_NR_COMMON PHY_RU LFDS GTPV1U SECU_CN SECU_OSA
- ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7 ${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB}
- RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB L2 L2_NR MAC_NR_COMMON
- NFAPI_COMMON_LIB NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB
- -Wl,--end-group z dl)
-
-target_link_libraries (nr-softmodem-nos1 ${LIBXML2_LIBRARIES})
-target_link_libraries (nr-softmodem-nos1 pthread m ${CONFIG_LIBRARIES} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES})
-target_link_libraries (nr-softmodem-nos1 ${LIB_LMS_LIBRARIES})
-target_link_libraries (nr-softmodem-nos1 ${T_LIB})
-
# nr-uesoftmodem is UE implementation
#######################################
@@ -2556,41 +2518,6 @@ target_link_libraries (nr-uesoftmodem pthread m ${CONFIG_LIBRARIES} rt crypt ${C
target_link_libraries (nr-uesoftmodem ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-uesoftmodem ${T_LIB})
-# nr-uesoftmodem-nos1
-#######################################
-
-add_executable(nr-uesoftmodem-nos1
- ${rrc_h}
- ${s1ap_h}
-# ${OPENAIR_BIN_DIR}/messages_xml.h
- ${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
- ${OPENAIR_DIR}/common/utils/threadPool/thread-pool.c
- ${OPENAIR_DIR}/executables/nr-ue.c
- ${OPENAIR_DIR}/executables/nr-uesoftmodem.c
- ${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
- ${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
- ${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
- ${OPENAIR_DIR}/common/utils/utils.c
- ${OPENAIR_DIR}/common/utils/system.c
- ${OPENAIR_DIR}/common/utils/nr/nr_common.c
- ${XFORMS_SOURCE_NR}
- ${T_SOURCE}
- ${CONFIG_SOURCES}
- ${SHLIB_LOADER_SOURCES}
- )
-
-
-target_link_libraries (nr-uesoftmodem-nos1
- -Wl,--start-group
- RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB GTPV1U SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB PHY_COMMON PHY_NR_COMMON PHY_NR_UE PHY_RU LFDS LTE_NR_L2 NR_L2_UE MAC_NR_COMMON
- ${MSC_LIB} ${RAL_LIB} ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} LFDS7 ${ATLAS_LIBRARIES}
- -Wl,--end-group z dl)
-
-target_link_libraries (nr-uesoftmodem-nos1 ${LIBXML2_LIBRARIES})
-target_link_libraries (nr-uesoftmodem-nos1 pthread m ${CONFIG_LIBRARIES} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES})
-target_link_libraries (nr-uesoftmodem-nos1 ${LIB_LMS_LIBRARIES})
-target_link_libraries (nr-uesoftmodem-nos1 ${T_LIB})
-
# USIM process
#################
@@ -2833,10 +2760,10 @@ endforeach(myExe)
if (${T_TRACER})
foreach(i
#all "add_executable" definitions (except tests, rb_tool, updatefw)
- lte-softmodem lte-uesoftmodem nr-softmodem nr-softmodem-nos1
- nr-uesoftmodem nr-uesoftmodem-nos1 dlsim dlsim_tm4 dlsim_tm7
+ lte-softmodem lte-uesoftmodem nr-softmodem
+ nr-uesoftmodem dlsim dlsim_tm4 dlsim_tm7
ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim
- syncsim ulsim nr_dlsim nr_dlschsim nr_pbchsim nr_pucchsim
+ syncsim nr_ulsim nr_dlsim nr_dlschsim nr_pbchsim nr_pucchsim
nr_ulschsim ldpctest polartest smallblocktest cu_test du_test
#all "add_library" definitions
diff --git a/cmake_targets/autotests/test_case_list.xml b/cmake_targets/autotests/test_case_list.xml
index 9cfaa2b21d..a407171d01 100644
--- a/cmake_targets/autotests/test_case_list.xml
+++ b/cmake_targets/autotests/test_case_list.xml
@@ -1084,33 +1084,32 @@
(Test3: 273 PRB),
(Test4: 106 PRB 12 CSET-Offset),
(Test5: 217 PRB 48 CSET-Offset),
-
- (Test7: 273 PRB 28 MCS)
+ (Test11: 106 PRBs 50 PDSCH-PRBs MCS Index 28
$OPENAIR_DIR/cmake_targets/build_oai
--phy_simulators -c
$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash
$OPENAIR_DIR/targets/bin/nr_dlsim.Rel15
- -n100 -R106
- -n100 -R217
- -n100 -R273
+ -n100 -R106 -b106
+ -n100 -R217 -b217
+ -n100 -R273 -b273
-n100 -R106 -o12
-n100 -R217 -o48
-
- -n100 -R273 -e28
- nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7
- "PDCCH test OK" "PDSCH test OK"
+ -n100 -e28
+ nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7
+ nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11
+ PDSCH test OK
segmentation fault|assertion|exiting|fatal
3
@@ -1240,19 +1239,23 @@
execution
- nr_ulsim Test cases. (Test1: MCS 9),
- (Test2: MCS 16),
- (Test3: MCS 28)
+ nr_ulsim Test cases. (Test1: MCS 9 106 PRBs),
+ (Test2: MCS 16 50 PRBs),
+ (Test3: MCS 28 50 PRBs),
+ (Test4: MCS 9 217 PRBs),
+ (Test5: MCS 9 273 PRBs)
$OPENAIR_DIR/cmake_targets/build_oai
--phy_simulators -c
$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash
$OPENAIR_DIR/targets/bin/nr_ulsim.Rel15
- -f100 -m9 -s10
+ -f100 -m9 -r106 -s10
-f100 -m16 -s20
- -f100 -m28 -s30
- nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3
+ -f100 -m28 -s30
+ -f100 -m9 -R217 -r217 -s10
+ -f100 -m9 -R273 -r273 -s10
+ nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5
PUSCH test OK
segmentation fault|assertion|exiting|fatal
3
diff --git a/common/utils/LOG/log.c b/common/utils/LOG/log.c
index 8d46f72f9c..6bad041641 100644
--- a/common/utils/LOG/log.c
+++ b/common/utils/LOG/log.c
@@ -434,6 +434,10 @@ int logInit (void)
register_log_component("ASN","log",ASN);
register_log_component("NFAPI_VNF","log",NFAPI_VNF);
register_log_component("NFAPI_PNF","log",NFAPI_PNF);
+ register_log_component("GNB_APP","log",GNB_APP);
+ register_log_component("NR_RRC","log",NR_RRC);
+ register_log_component("NR_MAC","log",NR_MAC);
+ register_log_component("NR_PHY","log",NR_PHY);
for (int i=0 ; log_level_names[i].name != NULL ; i++)
g_log->level2string[i] = toupper(log_level_names[i].name[0]); // uppercased first letter of level name
diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c
index 5f7bd4d3b2..7d7c887a34 100644
--- a/common/utils/nr/nr_common.c
+++ b/common/utils/nr/nr_common.c
@@ -144,4 +144,5 @@ void SLIV2SL(int SLIV,int *S,int *L) {
*L=15-SLIVdiv14;
*S=13-SLIVmod14;
}
+
}
diff --git a/common/utils/threadPool/Makefile b/common/utils/threadPool/Makefile
index af0b44996c..6b28eb2ba8 100644
--- a/common/utils/threadPool/Makefile
+++ b/common/utils/threadPool/Makefile
@@ -1,8 +1,13 @@
-all: measurement_display thread-pool-test
+all:
+measurement_display thread-pool-test
-measurement_display: measurement_display.c thread-pool.h
- gcc measurement_display.c -I ${OPENAIR_DIR}/ -I ${OPENAIR_DIR}/common/utils/ -I. ${OPENAIR_DIR}/common/utils/backtrace.c -lpthread -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o measurement_display
+measurement_display:
+measurement_display.c thread-pool.h
+gcc measurement_display.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -lpthread -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o
+measurement_display
-thread-pool-test: thread-pool.c thread-pool.h
- gcc -g thread-pool.c -I ${OPENAIR_DIR}/ -I ${OPENAIR_DIR}/common/utils/ -I. ${OPENAIR_DIR}/common/utils/backtrace.c -I ${OPENAIR_DIR}/openair2/COMMON ${OPENAIR_DIR}/common/utils/LOG/log.c ${OPENAIR_DIR}/common/config/config_userapi.c ${OPENAIR_DIR}/common/config/config_load_configmodule.c ${OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o thread-pool-test
+thread-pool-test:
+thread-pool.c thread-pool.h
+gcc -g thread-pool.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -I $ {OPENAIR_DIR}/openair2/COMMON $ {OPENAIR_DIR}/common/utils/LOG/log.c $ {OPENAIR_DIR}/common/config/config_userapi.c
+$ {OPENAIR_DIR}/common/config/config_load_configmodule.c $ {OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o thread-pool-test
diff --git a/common/utils/threadPool/thread-pool.c b/common/utils/threadPool/thread-pool.c
index b45a8fa722..dd3d16d717 100644
--- a/common/utils/threadPool/thread-pool.c
+++ b/common/utils/threadPool/thread-pool.c
@@ -67,7 +67,7 @@ void *one_thread(void *arg) {
delNotifiedFIFO_elt(elt);
else
pushNotifiedFIFO(elt->reponseFifo, elt);
-
+ myThread->runningOnKey=-1;
mutexunlock(tp->incomingFifo.lockF);
}
} while (true);
@@ -95,7 +95,7 @@ void initTpool(char *params,tpool_t *pool, bool performanceMeas) {
pool->nbThreads=0;
pool->restrictRNTI=false;
curptr=strtok_r(params,",",&saveptr);
-
+ struct one_thread * ptr;
while ( curptr!=NULL ) {
int c=toupper(curptr[0]);
@@ -109,8 +109,9 @@ void initTpool(char *params,tpool_t *pool, bool performanceMeas) {
break;
default:
+ ptr=pool->allthreads;
pool->allthreads=(struct one_thread *)malloc(sizeof(struct one_thread));
- pool->allthreads->next=pool->allthreads;
+ pool->allthreads->next=ptr;
printf("create a thread for core %d\n", atoi(curptr));
pool->allthreads->coreID=atoi(curptr);
pool->allthreads->id=pool->nbThreads;
diff --git a/common/utils/threadPool/thread-pool.h b/common/utils/threadPool/thread-pool.h
index d6dc332c5a..9a2681a828 100644
--- a/common/utils/threadPool/thread-pool.h
+++ b/common/utils/threadPool/thread-pool.h
@@ -150,8 +150,9 @@ static inline notifiedFIFO_elt_t *pollNotifiedFIFO(notifiedFIFO_t *nf) {
// This function aborts all messages matching the key
// If the queue is used in thread pools, it doesn't cancels already running processing
// because the message has already been picked
-static inline void abortNotifiedFIFO(notifiedFIFO_t *nf, uint64_t key) {
+static inline int abortNotifiedFIFO(notifiedFIFO_t *nf, uint64_t key) {
mutexlock(nf->lockF);
+ int nbDeleted=0;
notifiedFIFO_elt_t **start=&nf->outF;
while(*start!=NULL) {
@@ -159,13 +160,16 @@ static inline void abortNotifiedFIFO(notifiedFIFO_t *nf, uint64_t key) {
notifiedFIFO_elt_t *request=*start;
*start=(*start)->next;
delNotifiedFIFO_elt(request);
- }
-
- if (*start != NULL)
+ nbDeleted++;
+ } else
start=&(*start)->next;
}
+ if (nf->outF == NULL)
+ nf->inF=NULL;
+
mutexunlock(nf->lockF);
+ return nbDeleted;
}
struct one_thread {
@@ -195,7 +199,20 @@ typedef struct thread_pool {
static inline void pushTpool(tpool_t *t, notifiedFIFO_elt_t *msg) {
if (t->measurePerf) msg->creationTime=rdtsc();
- pushNotifiedFIFO(&t->incomingFifo, msg);
+ if ( t->activated)
+ pushNotifiedFIFO(&t->incomingFifo, msg);
+ else {
+ if (t->measurePerf)
+ msg->startProcessingTime=rdtsc();
+
+ msg->processingFunc(NotifiedFifoData(msg));
+
+ if (t->measurePerf)
+ msg->endProcessingTime=rdtsc();
+
+ if (msg->reponseFifo)
+ pushNotifiedFIFO(msg->reponseFifo, msg);
+ }
}
static inline notifiedFIFO_elt_t *pullTpool(notifiedFIFO_t *responseFifo, tpool_t *t) {
@@ -225,7 +242,8 @@ static inline notifiedFIFO_elt_t *tryPullTpool(notifiedFIFO_t *responseFifo, tpo
return msg;
}
-static inline void abortTpool(tpool_t *t, uint64_t key) {
+static inline int abortTpool(tpool_t *t, uint64_t key) {
+ int nbRemoved=0;
notifiedFIFO_t *nf=&t->incomingFifo;
mutexlock(nf->lockF);
notifiedFIFO_elt_t **start=&nf->outF;
@@ -235,22 +253,27 @@ static inline void abortTpool(tpool_t *t, uint64_t key) {
notifiedFIFO_elt_t *request=*start;
*start=(*start)->next;
delNotifiedFIFO_elt(request);
- }
-
- if (*start != NULL)
+ nbRemoved++;
+ } else
start=&(*start)->next;
}
+ if (t->incomingFifo.outF==NULL)
+ t->incomingFifo.inF=NULL;
+
struct one_thread *ptr=t->allthreads;
while(ptr!=NULL) {
- if (ptr->runningOnKey==key)
+ if (ptr->runningOnKey==key) {
ptr->abortFlag=true;
+ nbRemoved++;
+ }
ptr=ptr->next;
}
mutexunlock(nf->lockF);
+ return nbRemoved;
}
void initTpool(char *params,tpool_t *pool, bool performanceMeas);
diff --git a/common/utils/threadPool/thread-pool.md b/common/utils/threadPool/thread-pool.md
index 2b6336fb60..bc1b1db54a 100644
--- a/common/utils/threadPool/thread-pool.md
+++ b/common/utils/threadPool/thread-pool.md
@@ -3,69 +3,90 @@
The thread pool is a working server, made of a set of worker threads that can be mapped on CPU cores.
Each worker loop on pick from the same input queue jobs to do.
+
When a job is done, the worker sends a return if a return is defined.
-A selective abort allows to cancel parallel jobs (usage: a client pushed jobs, but from a response of one job, the other linked jobs becomes useless).
+ A selective abort allows to cancel parallel jobs (usage: a client pushed jobs, but from a response of one job, the other linked jobs becomes useless).
-All the thread pool functions are thread safe, nevertheless the working functions are implemented by the thread pool client, so the client has to tackle the parallel execution of his functions called "processingFunc" hereafter.
+ All the thread pool functions are thread safe, nevertheless the working functions are implemented by the thread pool client,
+ so the client has to tackle the parallel execution of his functions called "processingFunc" hereafter.
## license
-Author: Laurent Thomas, Open cells project
-The owner share this piece code to Openairsoftware alliance as per OSA license terms
+ Author:
+ Laurent Thomas, Open cells project
+ The owner share this piece code to Openairsoftware alliance as per OSA license terms
# jobs
-A job is a message (notifiedFIFO_elt_t):
-next: internal FIFO chain, do not set it
-key: a long int that the client can use to identify a message or a group of messages
-responseFifo: if the client defines a response FIFO, the message will be posted back after processing
-processingFunc: any funtion (type void processingFunc(void *)) that the worker will launch
-msgData: the data passed to processingFunc. It can be added automatically, or you can set it to a buffer you are managing
-malloced: a boolean that enable internal free in these cases: no return Fifo or Abort feature
+ A job is a message (notifiedFIFO_elt_t):
+ next:
+ internal FIFO chain, do not set it
+ key:
+ a long int that the client can use to identify a message or a group of messages
+ responseFifo:
+ if the client defines a response FIFO, the message will be posted back after processing
+ processingFunc:
+ any funtion (type void processingFunc(void *)) that the worker will launch
+ msgData:
+ the data passed to processingFunc. It can be added automatically, or you can set it to a buffer you are managing
+ malloced:
+ a boolean that enable internal free in these cases:
+ no return Fifo or Abort feature
-The job messages can be created with newNotifiedFIFO_elt() and delNotifiedFIFO_elt() or managed by the client.
+ The job messages can be created with newNotifiedFIFO_elt() and delNotifiedFIFO_elt() or managed by the client.
# Queues of jobs
-Queues are type of: notifiedFIFO_t that must be initialized by init_notifiedFIFO()
-No delete function is required, the creator has only to free the data of type notifiedFIFO_t
+ Queues are type of:
+ notifiedFIFO_t that must be initialized by init_notifiedFIFO()
+ No delete function is required, the creator has only to free the data of type notifiedFIFO_t
-push_notifiedFIFO() add a job in the queue
-pull_notifiedFIFO() is blocking, poll_notifiedFIFO() is non blocking
+ push_notifiedFIFO() add a job in the queue
+ pull_notifiedFIFO() is blocking, poll_notifiedFIFO() is non blocking
-abort_notifiedFIFO() allows the customer to delete all waiting jobs that match with the key (see key in jobs definition)
+ abort_notifiedFIFO() allows the customer to delete all waiting jobs that match with the key (see key in jobs definition)
# Thread pools
## initialization
-The clients can create one or more thread pools with init_tpool()
-the params string structure: describes a list of cores, separated by "," that run a worker thread
+ The clients can create one or more thread pools with init_tpool()
+ the params string structure:
+ describes a list of cores, separated by "," that run a worker thread
-If the core exists on the CPU, the thread pool initialization sets the affinity between this thread and the related code (use negative values is allowed, so the thread will never be mapped on a specific core).
+ If the core exists on the CPU, the thread pool initialization sets the affinity between this thread and
+ the related code (use negative values is allowed, so the thread will never be mapped on a specific core).
-The threads are all Linux real time scheduler, their name is set automatically is "Tpool_"
+ The threads are all Linux real time scheduler, their name is set automatically is "Tpool_"
## adding jobs
-The client create their jobs messages as a notifiedFIFO_elt_t, then they push it with pushTpool() (that internally calls push_notifiedFIFO())
+ The client create their jobs messages as a notifiedFIFO_elt_t, then they push it with pushTpool() (that internally calls push_notifiedFIFO())
-If they need a return, they have to create response queues with init_notifiedFIFO() and set this FIFO pointer in the notifiedFIFO_elt_t before pushing the job.
+ If they need a return, they have to create response queues with init_notifiedFIFO() and set this FIFO pointer in the notifiedFIFO_elt_t before pushing the job.
## abort
-A abort service abortTpool() allows to abort all jobs that match a key (see jobs "key"). When the abort returns, it garanties no job (matching the key) response will be posted on response queues.
+ A abort service abortTpool() allows to abort all jobs that match a key (see jobs "key"). When the abort returns, it garanties no job (matching the key) response will be posted on response queues.
-Nevertheless, jobs already performed before the return of abortTpool() are pushed in the response Fifo queue.
+ Nevertheless, jobs already performed before the return of abortTpool() are pushed in the response Fifo queue.
## Performance measurements
-A performance measurement is integrated: the pool will automacillay fill timestamps:
+ A performance measurement is integrated:
+ the pool will automacillay fill timestamps:
-* creationTime: time the request is push to the pool;
-* startProcessingTime: time a worker start to run on the job
-* endProcessingTime: time the worker finished the job
-* returnTime: time the client reads the result
+ * creationTime:
+ time the request is push to the pool;
-if you set the environement variable: thread-pool-measurements to a valid file name
+* startProcessingTime:
+time a worker start to run on the job
+* endProcessingTime:
+time the worker finished the job
+* returnTime:
+time the client reads the result
+
+if you set the environement variable:
+thread-pool-measurements to a valid file name
These measurements will be wrote to this Linux pipe.
-A tool to read the linux fifo and display it in ascii is provided: see the local directory Makefile for this tool and to compile the thread pool unitary tests.
+A tool to read the linux fifo and display it in ascii is provided:
+see the local directory Makefile for this tool and to compile the thread pool unitary tests.
diff --git a/executables/nr-gnb.c b/executables/nr-gnb.c
index ed95bf1829..7d4d517ec3 100644
--- a/executables/nr-gnb.c
+++ b/executables/nr-gnb.c
@@ -194,11 +194,6 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
// UE-specific RX processing for subframe n
if (nfapi_mode == 0 || nfapi_mode == 1) */
- if (slot_rx == NR_UPLINK_SLOT || gNB->frame_parms.frame_type == FDD) {
- nfapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_pdu_rel15 = &gNB->ulsch[1][0]->harq_processes[0]->ulsch_pdu.ulsch_pdu_rel15;
- phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx, ulsch_pdu_rel15->start_symbol, ulsch_pdu_rel15->start_symbol + ulsch_pdu_rel15->number_symbols);
- }
-
pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.frame = frame_rx;
gNB->UL_INFO.slot = slot_rx;
@@ -217,6 +212,9 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
if (oai_exit) return(-1);
+ //if (slot_rx == NR_UPLINK_SLOT || gNB->frame_parms.frame_type == FDD)
+ phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx);
+
if(get_thread_parallel_conf() != PARALLEL_RU_L1_TRX_SPLIT) {
phy_procedures_gNB_TX(gNB, frame_tx,slot_tx, 1);
}
@@ -933,13 +931,13 @@ void init_gNB(int single_thread_flag,int wait_for_sync) {
#ifndef OCP_FRAMEWORK
LOG_I(PHY,"Initializing gNB %d\n",inst);
#endif
+
LOG_I(PHY,"Registering with MAC interface module (before %p)\n",gNB->if_inst);
AssertFatal((gNB->if_inst = NR_IF_Module_init(inst))!=NULL,"Cannot register interface");
LOG_I(PHY,"Registering with MAC interface module (after %p)\n",gNB->if_inst);
gNB->if_inst->NR_Schedule_response = nr_schedule_response;
gNB->if_inst->NR_PHY_config_req = nr_phy_config_request;
memset((void *)&gNB->UL_INFO,0,sizeof(gNB->UL_INFO));
- memset((void *)&gNB->Sched_INFO,0,sizeof(gNB->Sched_INFO));
LOG_I(PHY,"Setting indication lists\n");
gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list = gNB->rx_pdu_list;
gNB->UL_INFO.crc_ind.crc_indication_body.crc_pdu_list = gNB->crc_pdu_list;
diff --git a/executables/nr-ru.c b/executables/nr-ru.c
index dbc2e8a52a..c1aabb9d3e 100644
--- a/executables/nr-ru.c
+++ b/executables/nr-ru.c
@@ -81,6 +81,7 @@
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "enb_config.h"
+#include
#ifdef SMBV
#include "PHY/TOOLS/smbv.h"
@@ -1056,10 +1057,10 @@ int wakeup_prach_ru(RU_t *ru) {
void fill_rf_config(RU_t *ru, char *rf_config_file) {
int i;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
- nfapi_nr_config_request_t *gNB_config = &ru->gNB_list[0]->gNB_config; //tmp index
+ nfapi_nr_config_request_scf_t *gNB_config = &ru->gNB_list[0]->gNB_config; //tmp index
openair0_config_t *cfg = &ru->openair0_cfg;
- int N_RB = gNB_config->rf_config.dl_carrier_bandwidth.value;
- int mu = gNB_config->subframe_config.numerology_index_mu.value;
+ int mu = gNB_config->ssb_config.scs_common.value;
+ int N_RB = gNB_config->carrier_config.dl_grid_size[gNB_config->ssb_config.scs_common.value].value;
if (mu == NR_MU_0) { //or if LTE
if(N_RB == 100) {
@@ -1132,7 +1133,7 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
AssertFatal(0 == 1,"Numerology %d not supported for the moment\n",mu);
}
- if (gNB_config->subframe_config.duplex_mode.value==TDD)
+ if (gNB_config->cell_config.frame_duplex_type.value==TDD)
cfg->duplex_mode = duplex_mode_TDD;
else //FDD
cfg->duplex_mode = duplex_mode_FDD;
@@ -1879,7 +1880,7 @@ void configure_ru(int idx,
RU_t *ru = RC.ru[idx];
RRU_config_t *config = (RRU_config_t *)arg;
RRU_capabilities_t *capabilities = (RRU_capabilities_t *)arg;
- nfapi_nr_config_request_t *gNB_config = &ru->gNB_list[0]->gNB_config;
+ nfapi_nr_config_request_scf_t *gNB_config = &ru->gNB_list[0]->gNB_config;
int ret;
LOG_I(PHY, "Received capabilities from RRU %d\n",idx);
@@ -1902,8 +1903,8 @@ void configure_ru(int idx,
//config->tdd_config_S[0] = ru->nr_frame_parms->tdd_config_S;
config->att_tx[0] = ru->att_tx;
config->att_rx[0] = ru->att_rx;
- config->N_RB_DL[0] = gNB_config->rf_config.dl_carrier_bandwidth.value;
- config->N_RB_UL[0] = gNB_config->rf_config.ul_carrier_bandwidth.value;
+ config->N_RB_DL[0] = gNB_config->carrier_config.dl_grid_size[gNB_config->ssb_config.scs_common.value].value;
+ config->N_RB_UL[0] = gNB_config->carrier_config.dl_grid_size[gNB_config->ssb_config.scs_common.value].value;
config->threequarter_fs[0] = ru->nr_frame_parms->threequarter_fs;
/* if (ru->if_south==REMOTE_IF4p5) {
config->prach_FreqOffset[0] = ru->nr_frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset;
diff --git a/executables/nr-softmodem.c b/executables/nr-softmodem.c
index f121df3337..b457c7cc9a 100644
--- a/executables/nr-softmodem.c
+++ b/executables/nr-softmodem.c
@@ -211,7 +211,7 @@ char uecap_xer_in=0;
uint8_t abstraction_flag=0;
/* forward declarations */
-void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
+void set_default_frame_parms(nfapi_nr_config_request_scf_t *config[MAX_NUM_CCs], NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
/*---------------------BMC: timespec helpers -----------------------------*/
@@ -525,18 +525,18 @@ static void get_options(void) {
-void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs],
- NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs])
+void set_default_frame_parms(nfapi_nr_config_request_scf_t *config[MAX_NUM_CCs],
+ NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs])
{
for (int CC_id=0; CC_idsubframe_config.numerology_index_mu.value =1;
- config[CC_id]->subframe_config.duplex_mode.value = 1; //FDD
- config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
- config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
- config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
- config[CC_id]->sch_config.physical_cell_id.value = 0;
+ config[CC_id] = (nfapi_nr_config_request_scf_t *) malloc(sizeof(nfapi_nr_config_request_scf_t));
+ config[CC_id]->ssb_config.scs_common.value = 1;
+ config[CC_id]->cell_config.frame_duplex_type.value = 1; //FDD
+ //config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
+ config[CC_id]->carrier_config.dl_grid_size[1].value = 106;
+ config[CC_id]->carrier_config.ul_grid_size[1].value = 106;
+ config[CC_id]->cell_config.phy_cell_id.value = 0;
///dl frequency to be filled in
/* //Set some default values that may be overwritten while reading options
frame_parms[CC_id]->frame_type = FDD;
diff --git a/executables/nr-softmodem.h b/executables/nr-softmodem.h
index 57d7377134..5d259eb251 100644
--- a/executables/nr-softmodem.h
+++ b/executables/nr-softmodem.h
@@ -49,10 +49,12 @@
#define SOFTMODEM_NOS1_BIT (1<<0)
#define SOFTMODEM_NOKRNMOD_BIT (1<<1)
+#define SOFTMODEM_RFSIM_BIT (1<<10)
#define IS_SOFTMODEM_NOS1 ( get_softmodem_optmask() & SOFTMODEM_NOS1_BIT)
#define IS_SOFTMODEM_NOKRNMOD ( get_softmodem_optmask() & SOFTMODEM_NOKRNMOD_BIT)
+#define IS_SOFTMODEM_RFSIM ( get_softmodem_optmask() & SOFTMODEM_RFSIM_BIT)
extern uint64_t get_softmodem_optmask(void);
extern void get_common_options(void);
diff --git a/executables/nr-ue.c b/executables/nr-ue.c
index aa69997b93..667a6bb192 100644
--- a/executables/nr-ue.c
+++ b/executables/nr-ue.c
@@ -538,6 +538,9 @@ void trashFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
dummy_rx,
UE->frame_parms.samples_per_subframe,
UE->frame_parms.nb_antennas_rx);
+ if (IS_SOFTMODEM_RFSIM ) {
+ usleep(1000); // slow down, as would do actuall rf to let cpu for the synchro thread
+ }
}
for (int i=0; iframe_parms.nb_antennas_tx; i++)
diff --git a/executables/nr-uesoftmodem.c b/executables/nr-uesoftmodem.c
index 7881783651..9bfb76ddc8 100644
--- a/executables/nr-uesoftmodem.c
+++ b/executables/nr-uesoftmodem.c
@@ -671,7 +671,7 @@ int main( int argc, char **argv ) {
logInit();
// get options and fill parameters from configuration file
get_options (); //Command-line options, enb_properties
- get_common_options();
+ //get_common_options();
#if T_TRACER
T_Config_Init();
#endif
diff --git a/nfapi/oai_integration/nfapi_vnf.c b/nfapi/oai_integration/nfapi_vnf.c
index a0574221f5..7ab8be5746 100644
--- a/nfapi/oai_integration/nfapi_vnf.c
+++ b/nfapi/oai_integration/nfapi_vnf.c
@@ -31,7 +31,7 @@
#include
#include
-#include "nfapi_nr_interface.h"
+#include "nfapi_nr_interface_scf.h"
#include "nfapi_vnf_interface.h"
#include "nfapi.h"
#include "vendor_ext.h"
@@ -1169,7 +1169,7 @@ int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req) {
return retval;
}
-int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req)
+int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_tti_request_t *dl_config_req)
{
nfapi_vnf_p7_config_t *p7_config = vnf.p7_vnfs[0].config;
@@ -1177,9 +1177,9 @@ int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req)
int retval = nfapi_vnf_p7_nr_dl_config_req(p7_config, dl_config_req);
- dl_config_req->dl_config_request_body.number_dci = 0;
- dl_config_req->dl_config_request_body.number_pdu = 0;
- dl_config_req->dl_config_request_body.number_pdsch_rnti = 0;
+ dl_config_req->dl_tti_request_body.nPDUs = 0;
+ dl_config_req->dl_tti_request_body.nGroup = 0;
+
if (retval!=0) {
LOG_E(PHY, "%s() Problem sending retval:%d\n", __FUNCTION__, retval);
diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
index 2b5886c86b..5f12fc55b9 100644
--- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
@@ -11,48 +11,16 @@
#include "nfapi_interface.h"
-
#define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5
#define NFAPI_NR_MAX_NB_TCI_STATES_PDCCH 64
#define NFAPI_NR_MAX_NB_CORESETS 12
#define NFAPI_NR_MAX_NB_SEARCH_SPACES 40
-// Extension to the generic structures for single tlv values
-typedef struct {
- nfapi_tl_t tl;
- int32_t value;
-} nfapi_int32_tlv_t;
-typedef struct {
- nfapi_tl_t tl;
- uint32_t value;
-} nfapi_uint32_tlv_t;
-
-/*typedef struct {
- nfapi_tl_t tl;
- int64_t value;
-} nfapi_int64_tlv_t;*/
-
-typedef struct {
- nfapi_tl_t tl;
- uint64_t value;
-} nfapi_uint64_tlv_t;
// nFAPI enums
-typedef enum {
- NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE = 0,
- NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE,
- NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE,
- NFAPI_NR_DL_CONFIG_PCH_PDU_TYPE,
-} nfapi_nr_dl_config_pdu_type_e;
-// nFAPI enums
-typedef enum {
- NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE = 0,
- NFAPI_NR_UL_CONFIG_ULSCH_PDU_TYPE,
- NFAPI_NR_UL_CONFIG_UCI_PDU_TYPE,
- NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE,
-} nfapi_nr_ul_config_pdu_type_e;
+
//These TLVs are used exclusively by nFAPI
typedef struct
@@ -111,37 +79,6 @@ typedef struct
// P5 Message Structures
-typedef struct{
- nfapi_tl_t tl;
- uint16_t corset_ID; ///// L1 parameter 'CORESET-ID'
- uint16_t freq_dom; ///// L1 parameter 'CORESET-freq-dom'
- uint16_t duration; ///// L1 parameter 'CORESET-time-duration'
- uint16_t reg_type; ///// L1 parameter 'CORESET-CCE-REG-mapping-type'
- uint16_t reg_bundlesize; ///// L1 parameter 'CORESET-REG-bundle-size'
- uint16_t interleaversize; ///// L1 parameter 'CORESET-interleaver-size'
- uint16_t shiftindex; ///// L1 parameter 'CORESET-shift-index'
- uint16_t precodergranularity; ///// L1 parameter 'CORESET-precoder-granuality'
- uint16_t tci_stateId; ///// L1 parameter 'TCI-StatesPDCCH'
- uint16_t tci_present; ///// L1 parameter 'TCI-PresentInDCI'
- uint16_t dmrs_scramblingID; ///// L1 parameter 'PDCCH-DMRS-Scrambling-ID'
-} nfapi_nr_ControlResourcesSet_t;
-
-typedef struct{
- nfapi_tl_t tl;
- nfapi_nr_ControlResourcesSet_t coreset;
- uint16_t monitoringSlotPeriodicityAndOffset; ///// L1 parameters 'Montoring-periodicity-PDCCH-slot'
- uint16_t monitoringSymbolsWithinSlot; ///// L1 parameter 'Montoring-symbols-PDCCH-within-slot'
- uint16_t nrofCand_aggLevel1; ///// L1 parameter 'Aggregation-level-1'
- uint16_t nrofCand_aggLevel2; ///// L1 parameter 'Aggregation-level-2'
- uint16_t nrofCand_aggLevel4; ///// L1 parameter 'Aggregation-level-4'
- uint16_t nrofCand_aggLevel8; ///// L1 parameter 'Aggregation-level-8'
- uint16_t nrofCand_aggLevel16; ///// L1 parameter 'Aggregation-level-16'
- uint16_t sfi_agg_fmt2_0; ///// L1 parameters 'SFI-Num-PDCCH-cand' and 'SFI-Aggregation-Level'
- uint16_t monitoringperiodicity_fmt2_3; ///// L1 parameter 'SRS-monitoring-periodicity'
- uint16_t nrof_candidates_fmt_2_3; ///// L1 parameter 'SRS-Num-PDCCH-cand'
-} nfapi_nr_SearchSpace_t;
-
-
typedef struct {
nfapi_uint16_tlv_t numerology_index_mu;
nfapi_uint16_tlv_t duplex_mode;
@@ -457,13 +394,9 @@ typedef enum {
NFAPI_NR_MCS_TABLE_QAM256
} nfapi_nr_pdsch_mcs_table_e;
-typedef enum {
- NFAPI_NR_DMRS_TYPE1=0,
- NFAPI_NR_DMRS_TYPE2
-} nfapi_nr_dmrs_type_e;
-
// P7 Sub Structures
+/*
typedef struct {
nfapi_tl_t tl;
@@ -526,9 +459,12 @@ uint16_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16
uint16_t padding;
} nfapi_nr_dl_config_dci_dl_pdu_rel15_t;
-
+*/
//#define NFAPI_NR_DL_CONFIG_REQUEST_DCI_DL_PDU_REL15_TAG 0x????
+
+
+/*
typedef struct{
nfapi_tl_t tl;
uint8_t coreset_id;
@@ -563,6 +499,7 @@ typedef struct{
uint16_t number_of_candidates[NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS];
} nfapi_nr_search_space_t;
+
typedef struct {
nfapi_tl_t tl;
uint16_t rnti;
@@ -593,154 +530,7 @@ typedef struct {
nfapi_bf_vector_t bf_vector;
} nfapi_nr_dl_config_pdcch_parameters_rel15_t;
-typedef struct {
- nfapi_tl_t tl;
- uint16_t length;
- int16_t pdu_index;
- uint16_t transmission_power;
-} nfapi_nr_dl_config_bch_pdu_rel15_t;
-#define NFAPI_NR_DL_CONFIG_REQUEST_BCH_PDU_REL15_TAG 0x5025
-
-typedef struct {
- nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15;
-} nfapi_nr_dl_config_bch_pdu;
-
-typedef struct {
- /// Number of PRGs spanning this allocation. Value : 1->275
- uint16_t numPRGs;
- /// Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275
- uint16_t prgSize;
- /// Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
- uint8_t digBFInterfaces;
- uint16_t PMIdx[275];
- uint16_t *beamIdx[275];
-} nr_beamforming_t;
-
-typedef struct {
- nfapi_tl_t tl;
- uint16_t pduBitmap;
- uint16_t rnti;
- uint16_t pduIndex;
- // BWP [TS38.213 sec 12]
- /// Bandwidth part size [TS38.213 sec12]. Number of contiguous PRBs allocated to the BWP, Value: 1->275
- uint16_t BWPSize;
- /// bandwidth part start RB index from reference CRB [TS38.213 sec 12],Value: 0->274
- uint16_t BWPStart;
- /// subcarrierSpacing [TS38.211 sec 4.2], Value:0->4
- uint8_t SubcarrierSpacing;
- /// Cyclic prefix type [TS38.211 sec 4.2], 0: Normal; 1: Extended
- uint8_t CyclicPrefix;
- // Codeword information
- /// Number of code words for this RNTI (UE), Value: 1 -> 2
- uint8_t NrOfCodewords;
- /// Target coding rate [TS38.212 sec 5.4.2.1 and 38.214 sec 5.1.3.1]. This is the number of information bits per 1024 coded bits expressed in 0.1 bit units
- uint16_t targetCodeRate[2];
- /// QAM modulation [TS38.212 sec 5.4.2.1 and 38.214 sec 5.1.3.1], Value: 2,4,6,8
- uint8_t qamModOrder[2];
- /// MCS index [TS38.214, sec 5.1.3.1], should match value sent in DCI Value : 0->31
- uint8_t mcsIndex[2];
- /// MCS-Table-PDSCH [TS38.214, sec 5.1.3.1] 0: notqam256, 1: qam256, 2: qam64LowSE
- uint8_t mcsTable[2];
- /// Redundancy version index [TS38.212, Table 5.4.2.1-2 and 38.214, Table 5.1.2.1-2], should match value sent in DCI Value : 0->3
- uint8_t rvIndex[2];
- /// Transmit block size (in bytes) [TS38.214 sec 5.1.3.2], Value: 0->65535
- uint32_t TBSize[2];
- /// dataScramblingIdentityPdsch [TS38.211, sec 7.3.1.1], It equals the higher-layer parameter Datascrambling-Identity if configured and the RNTI equals the C-RNTI, otherwise L2 needs to set it to physical cell id. Value: 0->65535
- uint16_t dataScramblingId;
- /// Number of layers [TS38.211, sec 7.3.1.3]. Value : 1->8
- uint8_t nrOfLayers;
- /// PDSCH transmission schemes [TS38.214, sec5.1.1] 0: Up to 8 transmission layers
- uint8_t transmissionScheme;
- /// Reference point for PDSCH DMRS "k" - used for tone mapping [TS38.211, sec 7.4.1.1.2] Resource block bundles [TS38.211, sec 7.3.1.6] Value: 0 -> 1 If 0, the 0 reference point for PDSCH DMRS is at Point A [TS38.211 sec 4.4.4.2]. Resource block bundles generated per sub-bullets 2 and 3 in [TS38.211, sec 7.3.1.6]. For sub-bullet 2, the start of bandwidth part must be set to the start of actual bandwidth part +NstartCORESET and the bandwidth of the bandwidth part must be set to the bandwidth of the initial bandwidth part. If 1, the DMRS reference point is at the lowest VRB/PRB of the allocation. Resource block bundles generated per sub-bullets 1 [TS38.211, sec 7.3.1.6]
- uint8_t refPoint;
- // DMRS [TS38.211 sec 7.4.1.1]
- /// DMRS symbol positions [TS38.211, sec 7.4.1.1.2 and Tables 7.4.1.1.2-3 and 7.4.1.1.2-4] Bitmap occupying the 14 LSBs with: bit 0: first symbol and for each bit 0: no DMRS 1: DMRS
- uint16_t dlDmrsSymbPos;
- /// DL DMRS config type [TS38.211, sec 7.4.1.1.2] 0: type 1, 1: type 2
- uint8_t dmrsConfigType;
- /// DL-DMRS-Scrambling-ID [TS38.211, sec 7.4.1.1.2 ] If provided by the higher-layer and the PDSCH is scheduled by PDCCH with CRC scrambled by CRNTI or CS-RNTI, otherwise, L2 should set this to physical cell id. Value: 0->65535
- uint16_t dlDmrsScramblingId;
- /// DMRS sequence initialization [TS38.211, sec 7.4.1.1.2]. Should match what is sent in DCI 1_1, otherwise set to 0. Value : 0->1
- uint8_t SCID;
- /// Number of DM-RS CDM groups without data [TS38.212 sec 7.3.1.2.2] [TS38.214 Table 4.1-1] it determines the ratio of PDSCH EPRE to DM-RS EPRE. Value: 1->3
- uint8_t numDmrsCdmGrpsNoData;
- /// DMRS ports. [TS38.212 7.3.1.2.2] provides description between DCI 1-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used
- uint16_t dmrsPorts;
- // Pdsch Allocation in frequency domain [TS38.214, sec 5.1.2.2]
- /// Resource Allocation Type [TS38.214, sec 5.1.2.2] 0: Type 0, 1: Type 1
- uint8_t resourceAlloc;
- /// For resource alloc type 0. TS 38.212 V15.0.x, 7.3.1.2.2 bitmap of RBs, 273 rounded up to multiple of 32. This bitmap is in units of VRBs. LSB of byte 0 of the bitmap represents the first RB of the bwp
- uint8_t rbBitmap[36];
- /// For resource allocation type 1. [TS38.214, sec 5.1.2.2.2] The starting resource block within the BWP for this PDSCH. Value: 0->274
- uint16_t rbStart;
- /// For resource allocation type 1. [TS38.214, sec 5.1.2.2.2] The number of resource block within for this PDSCH. Value: 1->275
- uint16_t rbSize;
- /// VRB-to-PRB-mapping [TS38.211, sec 7.3.1.6] 0: non-interleaved 1: interleaved with RB size 2 2: Interleaved with RB size 4
- uint8_t VRBtoPRBMapping;
- // Resource Allocation in time domain [TS38.214, sec 5.1.2.1]
- /// Start symbol index of PDSCH mapping from the start of the slot, S. [TS38.214, Table 5.1.2.1-1] Value: 0->13
- uint8_t StartSymbolIndex;
- /// PDSCH duration in symbols, L [TS38.214, Table 5.1.2.1-1] Value: 1->14
- uint8_t NrOfSymbols;
- // PTRS [TS38.214, sec 5.1.6.3]
- /// PT-RS antenna ports [TS38.214, sec 5.1.6.3] [TS38.211, table 7.4.1.2.2-1] Bitmap occupying the 6 LSBs with: bit 0: antenna port 1000 bit 5: antenna port 1005 and for each bit 0: PTRS port not used 1: PTRS port used
- uint8_t PTRSPortIndex ;
- /// PT-RS time density [TS38.214, table 5.1.6.3-1] 0: 1 1: 2 2: 4
- uint8_t PTRSTimeDensity;
- /// PT-RS frequency density [TS38.214, table 5.1.6.3-2] 0: 2 1: 4
- uint8_t PTRSFreqDensity;
- /// PT-RS resource element offset [TS38.211, table 7.4.1.2.2-1] Value: 0->3
- uint8_t PTRSReOffset;
- /// PT-RS-to-PDSCH EPRE ratio [TS38.214, table 4.1-2] Value :0->3
- uint8_t nEpreRatioOfPDSCHToPTRS;
- // Beamforming
- nr_beamforming_t precodingAndBeamforming;
-}nfapi_nr_dl_config_dlsch_pdu_rel15_t;
-#define NFAPI_NR_DL_CONFIG_REQUEST_DLSCH_PDU_REL15_TAG
-
-typedef struct {
- nfapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_pdu_rel15;
-} nfapi_nr_dl_config_dlsch_pdu;
-
-typedef struct {
- nfapi_tl_t tl;
- nfapi_nr_search_space_t pagingSearchSpace;
- nfapi_nr_coreset_t pagingControlResourceSets;
-}nfapi_nr_dl_config_pch_pdu_rel15_t;
-
-typedef struct {
- nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15;
- nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params_rel15;
-} nfapi_nr_dl_config_dci_dl_pdu;
-
-
-typedef struct {
- uint8_t pdu_type;
- uint8_t pdu_size;
-
- union {
- nfapi_nr_dl_config_dci_dl_pdu dci_dl_pdu;
- nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15;
- nfapi_nr_dl_config_dlsch_pdu dlsch_pdu;
- nfapi_nr_dl_config_pch_pdu_rel15_t pch_pdu_rel15;
- };
-} nfapi_nr_dl_config_request_pdu_t;
-
-
-typedef struct {
- nfapi_tl_t tl;
- uint8_t number_dci;
- uint8_t number_pdu;
- uint8_t number_pdsch_rnti;
- nfapi_nr_dl_config_request_pdu_t *dl_config_pdu_list;
-} nfapi_nr_dl_config_request_body_t;
-
-typedef struct {
- nfapi_p7_message_header_t header;
- uint16_t sfn_sf;
- nfapi_nr_dl_config_request_body_t dl_config_request_body;
- nfapi_vendor_extension_tlv_t vendor_extension;
-} nfapi_nr_dl_config_request_t;
+*/
typedef enum {nr_pusch_freq_hopping_disabled = 0 ,
diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h
new file mode 100644
index 0000000000..0102cc421d
--- /dev/null
+++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h
@@ -0,0 +1,1646 @@
+/*
+ nfapi_nr_interface.h
+ -------------------
+ AUTHOR : Chenyu Zhang, Florian Kaltenberger
+ COMPANY : BUPT, EURECOM
+ EMAIL : octopus@bupt.edu.cn, florian.kaltenberger@eurecom.fr
+*/
+
+#ifndef _NFAPI_NR_INTERFACE_SCF_H_
+#define _NFAPI_NR_INTERFACE_SCF_H_
+
+#include "stddef.h"
+#include "nfapi_interface.h"
+
+#define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5
+#define NFAPI_NR_MAX_NB_TCI_STATES_PDCCH 64
+#define NFAPI_NR_MAX_NB_CORESETS 12
+#define NFAPI_NR_MAX_NB_SEARCH_SPACES 40
+
+#define NFAPI_MAX_NUM_UL_UE_PER_GROUP 6
+#define NFAPI_MAX_NUM_UL_PDU 8
+#define NFAPI_MAX_NUM_GROUPS 8
+#define NFAPI_MAX_NUM_CB 8
+
+// Extension to the generic structures for single tlv values
+typedef struct {
+ nfapi_tl_t tl;
+ int32_t value;
+} nfapi_int32_tlv_t;
+
+typedef struct {
+ nfapi_tl_t tl;
+ uint32_t value;
+} nfapi_uint32_tlv_t;
+
+typedef struct {
+ nfapi_tl_t tl;
+ int64_t value;
+} nfapi_int64_tlv_t;
+
+typedef struct {
+ nfapi_tl_t tl;
+ uint64_t value;
+} nfapi_uint64_tlv_t;
+
+typedef enum {
+ NFAPI_NR_DMRS_TYPE1=0,
+ NFAPI_NR_DMRS_TYPE2
+} nfapi_nr_dmrs_type_e;
+
+
+typedef struct {
+ /// Value: 0 -> 1, 0: Payload is carried directly in the value field, 1: Pointer to payload is in the value field
+ uint16_t tag;
+ /// Length of the actual payload in bytes, without the padding bytes Value: 0 → 65535
+ uint16_t length;
+ union {
+ uint32_t *ptr;
+ uint32_t direct[16384];
+ } value;
+} nfapi_nr_tx_data_request_tlv_t;
+
+
+// 2019.8
+// SCF222_5G-FAPI_PHY_SPI_Specificayion.pdf Section 3.2
+
+//PHY API message types
+
+typedef enum {
+ NFAPI_NR_PHY_MSG_TYPE_PARAM_REQUEST= 0x00,
+ NFAPI_NR_PHY_MSG_TYPE_PARAM_RESPONSE= 0x01,
+ NFAPI_NR_PHY_MSG_TYPE_CONFIG_REQUEST= 0x02,
+ NFAPI_NR_PHY_MSG_TYPE_CONFIG_RESPONSE=0X03,
+ NFAPI_NR_PHY_MSG_TYPE_START_REQUEST= 0X04,
+ NFAPI_NR_PHY_MSG_TYPE_STOP_REQUEST= 0X05,
+ NFAPI_NR_PHY_MSG_TYPE_STOP_INDICATION=0X06,
+ NFAPI_NR_PHY_MSG_TYPE_ERROR_INDICATION=0X07,
+ //RESERVED 0X08 ~ 0X7F
+ NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST= 0X80,
+ NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST= 0X81,
+ NFAPI_NR_PHY_MSG_TYPE_SLOT_INDICATION=0X82,
+ NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST= 0X83,
+ NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST=0X54,
+ NFAPI_NR_PHY_MSG_TYPE_RX_DATA_INDICATION=0X85,
+ NFAPI_NR_PHY_MSG_TYPE_CRC_INDICATION= 0X86,
+ NFAPI_NR_PHY_MSG_TYPE_UCI_INDICATION= 0X87,
+ NFAPI_NR_PHY_MSG_TYPE_SRS_INDICATION= 0X88,
+ NFAPI_NR_PHY_MSG_TYPE_PACH_INDICATION= 0X89
+ //RESERVED 0X8a ~ 0xff
+} nfapi_nr_phy_msg_type_e;
+
+// SCF222_5G-FAPI_PHY_SPI_Specificayion.pdf Section 3.3
+
+//3.3.1 PARAM
+
+//same with nfapi_param_request_t
+typedef struct {
+ nfapi_p4_p5_message_header_t header;
+ nfapi_vendor_extension_tlv_t vendor_extension;
+} nfapi_nr_param_request_t;
+
+typedef enum {
+ NFAPI_NR_PARAM_MSG_OK = 0,
+ NFAPI_NR_PARAM_MSG_INVALID_STATE
+
+} nfapi_nr_param_errors_e;
+
+/*typedef struct {
+ nfapi_nr_param_errors_e error_code;
+ //Number of TLVs contained in the message body.
+ uint8_t number_of_tlvs;
+ nfapi_nr_param_tlv_t TLV;
+} nfapi_nr_param_response_t;*/
+
+
+//PARAM and CONFIG TLVs are used in the PARAM and CONFIG message exchanges, respectively
+
+
+//nfapi_nr_param_tlv_format_t cell param ~ measurement_param:
+
+//table 3-9
+
+#define NFAPI_NR_PARAM_TLV_RELEASE_CAPABILITY_TAG 0x0001
+#define NFAPI_NR_PARAM_TLV_PHY_STATE_TAG 0x0002
+#define NFAPI_NR_PARAM_TLV_SKIP_BLANK_DL_CONFIG_TAG 0x0003
+#define NFAPI_NR_PARAM_TLV_SKIP_BLANK_UL_CONFIG_TAG 0x0004
+#define NFAPI_NR_PARAM_TLV_NUM_CONFIG_TLVS_TO_REPORT_TAG 0x0005
+#define NFAPI_NR_PARAM_TLV_CYCLIC_PREFIX_TAG 0x0006
+#define NFAPI_NR_PARAM_TLV_SUPPORTED_SUBCARRIER_SPACINGS_DL_TAG 0x0007
+#define NFAPI_NR_PARAM_TLV_SUPPORTED_BANDWIDTH_DL_TAG 0x0008
+#define NFAPI_NR_PARAM_TLV_SUPPORTED_SUBCARRIER_SPACINGS_UL_TAG 0x0009
+#define NFAPI_NR_PARAM_TLV_SUPPORTED_BANDWIDTH_UL_TAG 0x000A
+#define NFAPI_NR_PARAM_TLV_CCE_MAPPING_TYPE_TAG 0x000B
+#define NFAPI_NR_PARAM_TLV_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG 0x000C
+#define NFAPI_NR_PARAM_TLV_PRECODER_GRANULARITY_CORESET_TAG 0x000D
+#define NFAPI_NR_PARAM_TLV_PDCCH_MU_MIMO_TAG 0x000E
+#define NFAPI_NR_PARAM_TLV_PDCCH_PRECODER_CYCLING_TAG 0x000F
+#define NFAPI_NR_PARAM_TLV_MAX_PDCCHS_PER_SLOT_TAG 0x0010
+#define NFAPI_NR_PARAM_TLV_PUCCH_FORMATS_TAG 0x0011
+#define NFAPI_NR_PARAM_TLV_MAX_PUCCHS_PER_SLOT_TAG 0x0012
+#define NFAPI_NR_PARAM_TLV_PDSCH_MAPPING_TYPE_TAG 0x0013
+#define NFAPI_NR_PARAM_TLV_PDSCH_ALLOCATION_TYPES_TAG 0x0014
+#define NFAPI_NR_PARAM_TLV_PDSCH_VRB_TO_PRB_MAPPING_TAG 0x0015
+#define NFAPI_NR_PARAM_TLV_PDSCH_CBG_TAG 0x0016
+#define NFAPI_NR_PARAM_TLV_PDSCH_DMRS_CONFIG_TYPES_TAG 0x0017
+#define NFAPI_NR_PARAM_TLV_PDSCH_DMRS_MAX_LENGTH_TAG 0x0018
+#define NFAPI_NR_PARAM_TLV_PDSCH_DMRS_ADDITIONAL_POS_TAG 0x0019
+#define NFAPI_NR_PARAM_TLV_MAX_PDSCH_S_YBS_PER_SLOT_TAG 0x001A
+#define NFAPI_NR_PARAM_TLV_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG 0x001B
+#define NFAPI_NR_PARAM_TLV_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG 0x001C
+#define NFAPI_NR_PARAM_TLV_MAX_MU_MIMO_USERS_DL_TAG 0x001D
+#define NFAPI_NR_PARAM_TLV_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG 0x001E
+#define NFAPI_NR_PARAM_TLV_PREMPTION_SUPPORT_TAG 0x001F
+#define NFAPI_NR_PARAM_TLV_PDSCH_NON_SLOT_SUPPORT_TAG 0x0020
+#define NFAPI_NR_PARAM_TLV_UCI_MUX_ULSCH_IN_PUSCH_TAG 0x0021
+#define NFAPI_NR_PARAM_TLV_UCI_ONLY_PUSCH_TAG 0x0022
+#define NFAPI_NR_PARAM_TLV_PUSCH_FREQUENCY_HOPPING_TAG 0x0023
+#define NFAPI_NR_PARAM_TLV_PUSCH_DMRS_CONFIG_TYPES_TAG 0x0024
+#define NFAPI_NR_PARAM_TLV_PUSCH_DMRS_MAX_LEN_TAG 0x0025
+#define NFAPI_NR_PARAM_TLV_PUSCH_DMRS_ADDITIONAL_POS_TAG 0x0026
+#define NFAPI_NR_PARAM_TLV_PUSCH_CBG_TAG 0x0027
+#define NFAPI_NR_PARAM_TLV_PUSCH_MAPPING_TYPE_TAG 0x0028
+#define NFAPI_NR_PARAM_TLV_PUSCH_ALLOCATION_TYPES_TAG 0x0029
+#define NFAPI_NR_PARAM_TLV_PUSCH_VRB_TO_PRB_MAPPING_TAG 0x002A
+#define NFAPI_NR_PARAM_TLV_PUSCH_MAX_PTRS_PORTS_TAG 0x002B
+#define NFAPI_NR_PARAM_TLV_MAX_PDUSCHS_TBS_PER_SLOT_TAG 0x002C
+#define NFAPI_NR_PARAM_TLV_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG 0x002D
+#define NFAPI_NR_PARAM_TLV_SUPPORTED_MODULATION_ORDER_UL_TAG 0x002E
+#define NFAPI_NR_PARAM_TLV_MAX_MU_MIMO_USERS_UL_TAG 0x002F
+#define NFAPI_NR_PARAM_TLV_DFTS_OFDM_SUPPORT_TAG 0x0030
+#define NFAPI_NR_PARAM_TLV_PUSCH_AGGREGATION_FACTOR_TAG 0x0031
+#define NFAPI_NR_PARAM_TLV_PRACH_LONG_FORMATS_TAG 0x0032
+#define NFAPI_NR_PARAM_TLV_PRACH_SHORT_FORMATS_TAG 0x0033
+#define NFAPI_NR_PARAM_TLV_PRACH_RESTRICTED_SETS_TAG 0x0034
+#define NFAPI_NR_PARAM_TLV_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG 0x0035
+#define NFAPI_NR_PARAM_TLV_RSSI_MEASUREMENT_SUPPORT_TAG 0x0036
+
+typedef struct
+{
+ nfapi_uint16_tlv_t release_capability; //TAG 0x0001
+ nfapi_uint16_tlv_t phy_state;
+ nfapi_uint8_tlv_t skip_blank_dl_config;
+ nfapi_uint8_tlv_t skip_blank_ul_config;
+ nfapi_uint16_tlv_t num_config_tlvs_to_report;
+ nfapi_uint8_tlv_t* config_tlvs_to_report_list;
+} nfapi_nr_cell_param_t;
+
+//table 3-10 Carrier parameters
+typedef struct
+{
+ nfapi_uint8_tlv_t cyclic_prefix;//TAG 0x0006
+ nfapi_uint16_tlv_t supported_subcarrier_spacings_dl;
+ nfapi_uint16_tlv_t supported_bandwidth_dl;
+ nfapi_uint8_tlv_t supported_subcarrier_spacings_ul;
+ nfapi_uint16_tlv_t supported_bandwidth_ul;
+
+} nfapi_nr_carrier_param_t;
+
+//table 3-11 PDCCH parameters
+typedef struct
+{
+ nfapi_uint8_tlv_t cce_mapping_type;
+ nfapi_uint8_tlv_t coreset_outside_first_3_of_ofdm_syms_of_slot;
+ nfapi_uint8_tlv_t coreset_precoder_granularity_coreset;
+ nfapi_uint8_tlv_t pdcch_mu_mimo;
+ nfapi_uint8_tlv_t pdcch_precoder_cycling;
+ nfapi_uint8_tlv_t max_pdcch_per_slot;//TAG 0x0010
+
+} nfapi_nr_pdcch_param_t;
+
+//table 3-12 PUCCH parameters
+typedef struct
+{
+ nfapi_uint8_tlv_t pucch_formats;
+ nfapi_uint8_tlv_t max_pucchs_per_slot;
+
+} nfapi_nr_pucch_param_t;
+
+//table 3-13 PDSCH parameters
+typedef struct
+{
+ nfapi_uint8_tlv_t pdsch_mapping_type;
+ nfapi_uint8_tlv_t pdsch_allocation_types;
+ nfapi_uint8_tlv_t pdsch_vrb_to_prb_mapping;
+ nfapi_uint8_tlv_t pdsch_cbg;
+ nfapi_uint8_tlv_t pdsch_dmrs_config_types;
+ nfapi_uint8_tlv_t pdsch_dmrs_max_length;
+ nfapi_uint8_tlv_t pdsch_dmrs_additional_pos;
+ nfapi_uint8_tlv_t max_pdsch_tbs_per_slot;
+ nfapi_uint8_tlv_t max_number_mimo_layers_pdsch;
+ nfapi_uint8_tlv_t supported_max_modulation_order_dl;
+ nfapi_uint8_tlv_t max_mu_mimo_users_dl;
+ nfapi_uint8_tlv_t pdsch_data_in_dmrs_symbols;
+ nfapi_uint8_tlv_t premption_support;//TAG 0x001F
+ nfapi_uint8_tlv_t pdsch_non_slot_support;
+
+} nfapi_nr_pdsch_param_t;
+
+//table 3-14
+typedef struct
+{
+ nfapi_uint8_tlv_t uci_mux_ulsch_in_pusch;
+ nfapi_uint8_tlv_t uci_only_pusch;
+ nfapi_uint8_tlv_t pusch_frequency_hopping;
+ nfapi_uint8_tlv_t pusch_dmrs_config_types;
+ nfapi_uint8_tlv_t pusch_dmrs_max_len;
+ nfapi_uint8_tlv_t pusch_dmrs_additional_pos;
+ nfapi_uint8_tlv_t pusch_cbg;
+ nfapi_uint8_tlv_t pusch_mapping_type;
+ nfapi_uint8_tlv_t pusch_allocation_types;
+ nfapi_uint8_tlv_t pusch_vrb_to_prb_mapping;
+ nfapi_uint8_tlv_t pusch_max_ptrs_ports;
+ nfapi_uint8_tlv_t max_pduschs_tbs_per_slot;
+ nfapi_uint8_tlv_t max_number_mimo_layers_non_cb_pusch;
+ nfapi_uint8_tlv_t supported_modulation_order_ul;
+ nfapi_uint8_tlv_t max_mu_mimo_users_ul;
+ nfapi_uint8_tlv_t dfts_ofdm_support;
+ nfapi_uint8_tlv_t pusch_aggregation_factor;//TAG 0x0031
+
+} nfapi_nr_pusch_param_t;
+
+//table 3-15
+typedef struct
+{
+ nfapi_uint8_tlv_t prach_long_formats;
+ nfapi_uint8_tlv_t prach_short_formats;
+ nfapi_uint8_tlv_t prach_restricted_sets;
+ nfapi_uint8_tlv_t max_prach_fd_occasions_in_a_slot;
+} nfapi_nr_prach_param_t;
+
+//table 3-16
+typedef struct
+{
+ nfapi_uint8_tlv_t rssi_measurement_support;
+} nfapi_nr_measurement_param_t;
+
+//-------------------------------------------//
+//3.3.2 CONFIG
+
+
+typedef enum {
+ NFAPI_NR_CONFIG_MSG_OK = 0,
+ NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state.
+} nfapi_nr_config_errors_e;
+
+/*typedef struct {
+ nfapi_nr_config_errors_e error_code;
+ uint8_t number_of_invalid_tlvs_that_can_only_be_configured_in_idle;
+ uint8_t unmber_of_missing_tlvs;
+ //? ↓
+ nfapi_nr_config_tlv_t* tlv_invalid_list;
+ nfapi_nr_config_tlv_t* tlv_invalid_idle_list;
+ nfapi_nr_config_tlv_t* tlv_invalid_running_list;
+ nfapi_nr_config_tlv_t* tlv_missing_list;
+
+} nfapi_nr_config_response_t;*/
+
+//nfapi_nr_config_tlv_format_t carrier config ~ precoding config:
+
+#define NFAPI_NR_CONFIG_DL_BANDWIDTH_TAG 0x1001
+#define NFAPI_NR_CONFIG_DL_FREQUENCY_TAG 0x1002
+#define NFAPI_NR_CONFIG_DL_K0_TAG 0x1003
+#define NFAPI_NR_CONFIG_DL_GRID_SIZE_TAG 0x1004
+#define NFAPI_NR_CONFIG_NUM_TX_ANT_TAG 0x1005
+#define NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG 0x1006
+#define NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG 0x1007
+#define NFAPI_NR_CONFIG_UL_K0_TAG 0x1008
+#define NFAPI_NR_CONFIG_UL_GRID_SIZE_TAG 0x1009
+#define NFAPI_NR_CONFIG_NUM_RX_ANT_TAG 0x100A
+#define NFAPI_NR_CONFIG_FREQUENCY_SHIFT_7P5KHZ_TAG 0x100B
+
+#define NFAPI_NR_CONFIG_PHY_CELL_ID_TAG 0x100C
+#define NFAPI_NR_CONFIG_FRAME_DUPLEX_TYPE_TAG 0x100D
+
+#define NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG 0x100E
+#define NFAPI_NR_CONFIG_BCH_PAYLOAD_TAG 0x100F
+#define NFAPI_NR_CONFIG_SCS_COMMON_TAG 0x1010
+
+#define NFAPI_NR_CONFIG_PRACH_SEQUENCE_LENGTH_TAG 0x1011
+#define NFAPI_NR_CONFIG_PRACH_SUB_C_SPACING_TAG 0x1012
+#define NFAPI_NR_CONFIG_RESTRICTED_SET_CONFIG_TAG 0x1013
+#define NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG 0x1014
+#define NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG 0x1015
+#define NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG 0x1016
+#define NFAPI_NR_CONFIG_K1_TAG 0x1017
+#define NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG 0x1018
+#define NFAPI_NR_CONFIG_NUM_UNUSED_ROOT_SEQUENCES_TAG 0x1019
+#define NFAPI_NR_CONFIG_UNUSED_ROOT_SEQUENCES_TAG 0x101A
+#define NFAPI_NR_CONFIG_SSB_PER_RACH_TAG 0x101B
+#define NFAPI_NR_CONFIG_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x101C
+
+#define NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG 0x101D
+#define NFAPI_NR_CONFIG_BETA_PSS_TAG 0x101E
+#define NFAPI_NR_CONFIG_SSB_PERIOD_TAG 0x101F
+#define NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG 0x1020
+#define NFAPI_NR_CONFIG_MIB_TAG 0x1021
+#define NFAPI_NR_CONFIG_SSB_MASK_TAG 0x1022
+#define NFAPI_NR_CONFIG_BEAM_ID_TAG 0x1023
+#define NFAPI_NR_CONFIG_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x1024
+#define NFAPI_NR_CONFIG_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG 0x1025
+#define NFAPI_NR_CONFIG_TDD_PERIOD_TAG 0x1026
+#define NFAPI_NR_CONFIG_SLOT_CONFIG_TAG 0x1027
+
+#define NFAPI_NR_CONFIG_RSSI_MEASUREMENT_TAG 0x1028
+
+//table 3-21
+typedef struct
+{
+ nfapi_uint16_tlv_t dl_bandwidth;//Carrier bandwidth for DL in MHz [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400
+ nfapi_uint32_tlv_t dl_frequency; //Absolute frequency of DL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000
+ nfapi_uint16_tlv_t dl_k0[5];//𝑘_{0}^{𝜇} for each of the numerologies [38.211, sec 5.3.1] Value: 0 ->23699
+ nfapi_uint16_tlv_t dl_grid_size[5];//Grid size 𝑁_{𝑔𝑟𝑖𝑑}^{𝑠𝑖𝑧𝑒,𝜇} for each of the numerologies [38.211, sec 4.4.2] Value: 0->275 0 = this numerology not used
+ nfapi_uint16_tlv_t num_tx_ant;//Number of Tx antennas
+ nfapi_uint16_tlv_t uplink_bandwidth;//Carrier bandwidth for UL in MHz. [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400
+ nfapi_uint32_tlv_t uplink_frequency;//Absolute frequency of UL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000
+ nfapi_uint16_tlv_t ul_k0[5];//𝑘0 𝜇 for each of the numerologies [38.211, sec 5.3.1] Value: : 0 ->23699
+ nfapi_uint16_tlv_t ul_grid_size[5];//Grid size 𝑁𝑔𝑟𝑖𝑑 𝑠𝑖𝑧𝑒,𝜇 for each of the numerologies [38.211, sec 4.4.2]. Value: 0->275 0 = this numerology not used
+ nfapi_uint16_tlv_t num_rx_ant;//
+ nfapi_uint8_tlv_t frequency_shift_7p5khz;//Indicates presence of 7.5KHz frequency shift. Value: 0 = false 1 = true
+
+} nfapi_nr_carrier_config_t;
+
+//table 3-22
+typedef struct
+{
+ nfapi_uint8_tlv_t phy_cell_id;//Physical Cell ID, 𝑁_{𝐼𝐷}^{𝑐𝑒𝑙𝑙} [38.211, sec 7.4.2.1] Value: 0 ->1007
+ nfapi_uint8_tlv_t frame_duplex_type;//Frame duplex type Value: 0 = FDD 1 = TDD
+
+} nfapi_nr_cell_config_t;
+
+//table 3-23
+typedef struct
+{
+ nfapi_uint32_tlv_t ss_pbch_power;//SSB Block Power Value: TBD (-60..50 dBm)
+ nfapi_uint8_tlv_t bch_payload;//Defines option selected for generation of BCH payload, see Table 3-13 (v0.0.011 Value: 0: MAC generates the full PBCH payload 1: PHY generates the timing PBCH bits 2: PHY generates the full PBCH payload
+ nfapi_uint8_tlv_t scs_common;//subcarrierSpacing for common, used for initial access and broadcast message. [38.211 sec 4.2] Value:0->3
+
+} nfapi_nr_ssb_config_t;
+
+//table 3-24
+/*typedef struct {
+ uint8_t unused_root_sequences;//Unused root sequence or sequences per FD occasion. Required for noise estimation.
+} nfapi_nr_num_unused_root_sequences_t;*/
+
+typedef struct
+{
+ uint8_t num_prach_fd_occasions;
+ nfapi_uint16_tlv_t prach_root_sequence_index;//Starting logical root sequence index, 𝑖, equivalent to higher layer parameter prach-RootSequenceIndex [38.211, sec 6.3.3.1] Value: 0 -> 837
+ nfapi_uint8_tlv_t num_root_sequences;//Number of root sequences for a particular FD occasion that are required to generate the necessary number of preambles
+ nfapi_uint16_tlv_t k1;//Frequency offset (from UL bandwidth part) for each FD. [38.211, sec 6.3.3.2] Value: from 0 to 272
+ nfapi_uint8_tlv_t prach_zero_corr_conf;//PRACH Zero CorrelationZone Config which is used to dervive 𝑁𝑐𝑠 [38.211, sec 6.3.3.1] Value: from 0 to 15
+ nfapi_uint8_tlv_t num_unused_root_sequences;//Number of unused sequences available for noise estimation per FD occasion. At least one unused root sequence is required per FD occasion.
+ nfapi_uint8_tlv_t* unused_root_sequences_list;//Unused root sequence or sequences per FD occasion. Required for noise estimation.
+
+} nfapi_nr_num_prach_fd_occasions_t;
+
+typedef struct
+{
+ nfapi_uint8_tlv_t prach_sequence_length;//RACH sequence length. Only short sequence length is supported for FR2. [38.211, sec 6.3.3.1] Value: 0 = Long sequence 1 = Short sequence
+ nfapi_uint8_tlv_t prach_sub_c_spacing;//Subcarrier spacing of PRACH. [38.211 sec 4.2] Value:0->4
+ nfapi_uint8_tlv_t restricted_set_config;//PRACH restricted set config Value: 0: unrestricted 1: restricted set type A 2: restricted set type B
+ nfapi_uint8_tlv_t num_prach_fd_occasions;//Corresponds to the parameter 𝑀 in [38.211, sec 6.3.3.2] which equals the higher layer parameter msg1FDM Value: 1,2,4,8
+ nfapi_nr_num_prach_fd_occasions_t* num_prach_fd_occasions_list;
+ nfapi_uint8_tlv_t ssb_per_rach;//SSB-per-RACH-occasion Value: 0: 1/8 1:1/4, 2:1/2 3:1 4:2 5:4, 6:8 7:16
+ nfapi_uint8_tlv_t prach_multiple_carriers_in_a_band;//0 = disabled 1 = enabled
+
+} nfapi_nr_prach_config_t;
+
+//table 3-25
+typedef struct
+{
+ nfapi_uint32_tlv_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted
+
+} nfapi_nr_ssb_mask_size_2_t;
+
+typedef struct
+{
+ nfapi_uint8_tlv_t beam_id[64];//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63
+
+} nfapi_nr_ssb_mask_size_64_t;
+
+typedef struct
+{
+ nfapi_uint16_tlv_t ssb_offset_point_a;//Offset of lowest subcarrier of lowest resource block used for SS/PBCH block. Given in PRB [38.211, section 4.4.4.2] Value: 0->2199
+ nfapi_uint8_tlv_t beta_pss;//PSS EPRE to SSS EPRE in a SS/PBCH block [38.213, sec 4.1] Values: 0 = 0dB
+ nfapi_uint8_tlv_t ssb_period;//SSB periodicity in msec Value: 0: ms5 1: ms10 2: ms20 3: ms40 4: ms80 5: ms160
+ nfapi_uint8_tlv_t ssb_subcarrier_offset;//ssbSubcarrierOffset or 𝑘𝑆𝑆𝐵 (38.211, section 7.4.3.1) Value: 0->31
+ nfapi_uint32_tlv_t MIB;//MIB payload, where the 24 MSB are used and represent the MIB in [38.331 MIB IE] and represent 0 1 2 3 1 , , , ,..., A− a a a a a [38.212, sec 7.1.1]
+ nfapi_nr_ssb_mask_size_2_t ssb_mask_list[2];
+ nfapi_nr_ssb_mask_size_64_t* ssb_beam_id_list;//64
+ nfapi_uint8_tlv_t ss_pbch_multiple_carriers_in_a_band;//0 = disabled 1 = enabled
+ nfapi_uint8_tlv_t multiple_cells_ss_pbch_in_a_carrier;//Indicates that multiple cells will be supported in a single carrier 0 = disabled 1 = enabled
+
+} nfapi_nr_ssb_table_t;
+
+//table 3-26
+
+//?
+typedef struct
+{
+ nfapi_uint8_tlv_t slot_config;//For each symbol in each slot a uint8_t value is provided indicating: 0: DL slot 1: UL slot 2: Guard slot
+
+} nfapi_nr_max_num_of_symbol_per_slot_t;
+
+typedef struct
+{
+ nfapi_nr_max_num_of_symbol_per_slot_t* max_num_of_symbol_per_slot_list;
+
+} nfapi_nr_max_tdd_periodicity_t;
+
+typedef struct
+{
+ nfapi_uint8_tlv_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10
+ nfapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list;
+
+} nfapi_nr_tdd_table_t;
+
+//table 3-27
+typedef struct
+{
+ nfapi_uint8_tlv_t rssi_measurement;//RSSI measurement unit. See Table 3-16 for RSSI definition. Value: 0: Do not report RSSI 1: dBm 2: dBFS
+
+} nfapi_nr_measurement_config_t;
+
+
+typedef struct {
+ uint8_t num_tlv;
+ nfapi_nr_carrier_config_t carrier_config;
+ nfapi_nr_cell_config_t cell_config;
+ nfapi_nr_ssb_config_t ssb_config;
+ nfapi_nr_prach_config_t prach_config;
+ nfapi_nr_ssb_table_t ssb_table;
+ nfapi_nr_tdd_table_t tdd_table;
+ nfapi_nr_measurement_config_t measurement_config;
+} nfapi_nr_config_request_scf_t;
+
+
+//------------------------------//
+//3.3.3 START
+
+typedef struct {
+ nfapi_p4_p5_message_header_t header;
+ nfapi_vendor_extension_tlv_t vendor_extension;
+} nfapi_nr_start_request_t;
+
+typedef enum {
+ NFAPI_NR_START_MSG_INVALID_STATE
+} nfapi_nr_start_errors_e;
+
+//3.3.4 STOP
+
+typedef struct {
+ nfapi_p4_p5_message_header_t header;
+ nfapi_vendor_extension_tlv_t vendor_extension;
+} nfapi_nr_stop_request_t;
+
+typedef struct {
+ nfapi_p4_p5_message_header_t header;
+ nfapi_vendor_extension_tlv_t vendor_extension;
+} nfapi_nr_stop_indication_t;
+
+typedef enum {
+ NFAPI_NR_STOP_MSG_INVALID_STATE
+} nfapi_nr_stop_errors_e;
+
+//3.3.5 PHY Notifications
+typedef enum {
+ NFAPI_NR_PHY_API_MSG_OK =0x0,
+ NFAPI_NR_PHY_API_MSG_INVALID_STATE =0x1,
+ NFAPI_NR_PHY_API_MSG_INVALID_CONFIG =0x2,
+ NFAPI_NR_PHY_API_SFN_OUT_OF_SYNC =0X3,
+ NFAPI_NR_PHY_API_MSG_SLOR_ERR =0X4,
+ NFAPI_NR_PHY_API_MSG_BCH_MISSING =0X5,
+ NFAPI_NR_PHY_API_MSG_INVALID_SFN =0X6,
+ NFAPI_NR_PHY_API_MSG_UL_DCI_ERR =0X7,
+ NFAPI_NR_PHY_API_MSG_TX_ERR =0X8
+} nfapi_nr_phy_notifications_errors_e;
+
+typedef struct {
+ uint16_t sfn; //0~1023
+ uint16_t slot;//0~319
+ nfapi_nr_phy_msg_type_e msg_id;//Indicate which message received by the PHY has an error. Values taken from Table 3-4.
+ nfapi_nr_phy_notifications_errors_e error_code;
+} nfapi_nr_phy_notifications_error_indicate_t;
+
+//-----------------------//
+//3.3.6 Storing Precoding and Beamforming Tables
+
+//table 3-32
+//?
+typedef struct {
+ uint16_t beam_idx; //0~65535
+} nfapi_nr_dig_beam_t;
+
+typedef struct {
+ uint16_t dig_beam_weight_Re;
+ uint16_t dig_beam_weight_Im;
+} nfapi_nr_txru_t;
+
+typedef struct {
+ uint16_t num_dig_beams; //0~65535
+ uint16_t num_txrus; //0~65535
+ nfapi_nr_dig_beam_t* dig_beam_list;
+ nfapi_nr_txru_t* txru_list;
+} nfapi_nr_dbt_pdu_t;
+
+
+//table 3-33
+//?
+typedef struct {
+ uint16_t num_ant_ports;
+ int16_t precoder_weight_Re;
+ int16_t precoder_weight_Im;
+} nfapi_nr_num_ant_ports_t;
+
+typedef struct {
+ uint16_t numLayers; //0~65535
+ nfapi_nr_num_ant_ports_t* num_ant_ports_list;
+} nfapi_nr_num_layers_t;
+
+typedef struct {
+ uint16_t pm_idx; //0~65535
+ nfapi_nr_num_layers_t* num_layers_list; //0~65535
+ //nfapi_nr_num_ant_ports_t* num_ant_ports_list;
+} nfapi_nr_pm_pdu_t;
+
+
+// Section 3.4
+
+// Section 3.4.1 slot indication
+#define NFAPI_NR_SLOT_INDICATION_PERIOD_NUMEROLOGY_0 1000 //us
+#define NFAPI_NR_SLOT_INDICATION_PERIOD_NUMEROLOGY_1 50 //us
+#define NFAPI_NR_SLOT_INDICATION_PERIOD_NUMEROLOGY_2 250 //us
+#define NFAPI_NR_SLOT_INDICATION_PERIOD_NUMEROLOGY_3 125 //us
+
+typedef struct {
+ uint16_t sfn; //0->1023
+ uint16_t slot;//0->319
+
+} nfapi_nr_slot_indication_t;
+
+// 3.4.2
+
+//for pdcch_pdu:
+
+typedef struct
+{
+ uint16_t beam_idx;//Index of the digital beam weight vector pre-stored at cell configuration. The vector maps this input port to output TXRUs. Value: 0->65535
+
+}nfapi_nr_dig_bf_interface_t;
+
+typedef struct
+{
+ uint16_t pm_idx;//Index to precoding matrix (PM) pre-stored at cell configuration. Note: If precoding is not used this parameter should be set to 0. Value: 0->65535.
+ nfapi_nr_dig_bf_interface_t* dig_bf_interface_list;
+
+}nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t;
+
+/*
+//table 3-43
+typedef struct
+{
+ uint16_t num_prgs;//Number of PRGs spanning this allocation. Value : 1->275
+ uint16_t prg_size;//Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275
+ //watchout: dig_bf_interfaces here, in table 3-53 it's dig_bf_interface
+ uint8_t dig_bf_interfaces;//Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
+ nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t* prgs_list;//
+
+}nfapi_nr_tx_precoding_and_beamforming_t;
+*/
+
+typedef struct {
+ /// Number of PRGs spanning this allocation. Value : 1->275
+ uint16_t numPRGs;
+ /// Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275
+ uint16_t prgSize;
+ /// Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
+ uint8_t digBFInterfaces;
+ uint16_t PMIdx[275];
+ uint16_t *beamIdx[275];
+} nfapi_nr_tx_precoding_and_beamforming_t;
+
+//table 3-37
+
+#define DCI_PAYLOAD_BTYE_LEN 12 //? TS38.212 sec 7.3.1
+
+typedef struct
+{
+ uint16_t rnti;//
+ uint16_t scrambling_id;//
+ uint16_t scrambling_rnti;/* */
+ uint8_t cce_index;//
+ uint8_t aggregation_level;//
+ nfapi_nr_tx_precoding_and_beamforming_t* precoding_and_beamforming_list;
+ //tx power info
+ uint8_t beta_pdcch_1_0;/*PDCCH power value used for PDCCH Format 1_0 with CRC scrambled by SI-RNTI, PI-RNTI or RA-RNTI. This is ratio of
+SSB/PBCH EPRE to PDCCH and PDCCH DMRS EPRE [TS38.213, sec 4.1] Value :0->17 */
+ uint8_t power_control_offset_ss;//PDCCH power value used for all other PDCCH Formats. This is ratio of SSB/PBCH block EPRE to PDCCH and PDCCH DMRS EPRE [TS38.214, sec 4.1] Values: 0: -3dB, 1: 0dB, 2: 3dB, 3: 6dB
+ uint16_t payload_size_bits;//The total DCI length (in bits) including padding bits [TS38.212 sec 7.3.1] Range 0-> DCI_PAYLOAD_BTYE_LEN*8
+ uint8_t payload[DCI_PAYLOAD_BTYE_LEN];//DCI payload, where the actual size is defined by PayloadSizeBits. The bit order is as following bit0-bit7 are mapped to first byte of MSB - LSB
+
+} nfapi_nr_dl_dci_pdu_t;
+
+typedef struct {
+ /// Number of PRGs spanning this allocation. Value : 1->275
+ uint16_t numPRGs;
+ /// Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275
+ uint16_t prgSize;
+ /// Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
+ uint8_t digBFInterfaces;
+ uint16_t PMIdx[275];
+ uint16_t *beamIdx[275];
+} nr_beamforming_t;
+
+#define MAX_DCI_CORESET 8
+#define DCI_PAYLOAD_BYTE_LEN 8
+
+typedef struct {
+ ///Bandwidth part size [TS38.213 sec12]. Number of contiguous PRBs allocated to the BWP,Value: 1->275
+ uint16_t BWPSize;
+ ///bandwidth part start RB index from reference CRB, [TS38.213 sec 12], Value: 0->274
+ uint16_t BWPStart;
+ ///subcarrierSpacing [TS38.211 sec 4.2], Value:0->4
+ uint8_t SubcarrierSpacing;
+ ///Cyclic prefix type [TS38.211 sec 4.2], 0: Normal; 1: Extended
+ uint8_t CyclicPrefix;
+ ///Starting OFDM symbol for the CORESET, Value: 0->13
+ uint8_t StartSymbolIndex;
+///Contiguous time duration of the CORESET in number of symbols. Corresponds to L1 parameter 𝑁𝑠𝑦𝑚𝑏_𝐶𝑂𝑅𝐸𝑆𝐸𝑇 [TS38.211 sec 7.3.2.2] Value: 1,2,3
+ uint8_t DurationSymbols;
+ ///Frequency domain resources. This is a bitmap defining non-overlapping groups of 6 PRBs in ascending order. [TS38.213 10.1]. Also, corresponds to L1 parameter CORE SET RB N [TS38.211 sec 7.3.2.2] Bitmap of uint8 array. 45 bits.
+ uint8_t FreqDomainResource[6];
+ ///CORESET-CCE-to-REG-mapping-type [TS38.211 sec 7.3.2.2] 0: non-interleaved 1: interleaved
+ uint8_t CceRegMappingType;
+ ///The number of REGs in a bundle. Must be 6 for cceRegMappingType = nonInterleaved. For cceRegMappingType = interleaved, must belong to {2,6} if duration = 1,2 and must belong to {3,6} if duration = 3. Corresponds to parameter L. [TS38.211 sec 7.3.2.2] Value: 2,3,6
+ uint8_t RegBundleSize;
+ ///The interleaver size. For interleaved mapping belongs to {2,3,6} and for non-interleaved mapping is NA. Corresponds to parameter R. [TS38.211 sec 7.3.2.2] Value: 2,3,6 CoreSetType
+ uint8_t InterleaverSize;
+ ///[TS38.211 sec 7.3.2.2 and sec 7.4.1.3.2] 0: CORESET is configured by the PBCH or SIB1 (subcarrier 0 of CRB0 for DMRS mapping) 1: otherwise (subcarrier 0 of CORESET)
+ uint8_t CoreSetType;
+ ///[TS38.211 sec 7.3.2.2] Not applicable for non-interleaved mapping. For interleaved mapping and a PDCCH transmitted in a CORESET configured by the PBCH or SIB1 this should be set to phy cell ID. Value: 10 bits Otherwise, for interleaved mapping this is set to 0-> max num of PRBs. Value 0-> 275
+ uint16_t ShiftIndex;
+ ///Granularity of precoding [TS38.211 sec 7.3.2.2] Field Type Description 0: sameAsRegBundle 1: allContiguousRBs
+ uint8_t precoderGranularity;
+ ///Number of DCIs in this CORESET.Value: 0->MaxDciPerSlot
+ uint16_t numDlDci;
+ ///The RNTI used for identifying the UE when receiving the PDU Value: 1 -> 65535.
+ uint16_t RNTI[MAX_DCI_CORESET];
+ ///For a UE-specific search space it equals the higher-layer parameter PDCCH-DMRSScrambling-ID if configured, otherwise it should be set to the phy cell ID. [TS38.211, sec 7.3.2.3] Value: 0->65535
+ uint16_t ScramblingId[MAX_DCI_CORESET];
+ ///For a UE-specific search space where PDCCH-DMRSScrambling- ID is configured This param equals the CRNTI. Otherwise, it should be set to 0. [TS38.211, sec 7.3.2.3] Value: 0 -> 65535
+ uint16_t ScramblingRNTI[MAX_DCI_CORESET];
+ ///CCE start Index used to send the DCI Value: 0->135
+ uint8_t CceIndex[MAX_DCI_CORESET];
+ ///Aggregation level used [TS38.211, sec 7.3.2.1] Value: 1,2,4,8,16
+ uint8_t AggregationLevel[MAX_DCI_CORESET];
+ ///Precoding and Beamforming structure See Table 3-43
+ nfapi_nr_tx_precoding_and_beamforming_t precodingAndBeamforming[MAX_DCI_CORESET];
+ ///PDCCH power value used for PDCCH Format 1_0 with CRC scrambled by SI-RNTI, PI-RNTI or RA-RNTI. This is ratio of SSB/PBCH EPRE to PDCCH and PDCCH DMRS EPRE [TS38.213, sec 4.1] Value :0->17 Report title: 5G FAPI: PHY API Specification Issue date: 29 June 2019 Version: 222.10.17 68 Field Type Description representing -8 to 8 dB in 1dB steps
+ uint8_t beta_PDCCH_1_0[MAX_DCI_CORESET];
+ ///PDCCH power value used for all other PDCCH Formats. This is ratio of SSB/PBCH block EPRE to PDCCH and PDCCH DMRS EPRE [TS38.214, sec 4.1] Values: 0: -3dB,1: 0dB,2: 3dB,3: 6dB
+ uint8_t powerControlOffsetSS[MAX_DCI_CORESET];
+///The total DCI length (in bits) including padding bits [TS38.212 sec 7.3.1] Range 0->DCI_PAYLOAD_BTYE_LEN*8
+ uint16_t PayloadSizeBits[MAX_DCI_CORESET];
+ ///DCI payload, where the actual size is defined by PayloadSizeBits. The bit order is as following bit0-bit7 are mapped to first byte of MSB - LSB
+ uint8_t Payload[MAX_DCI_CORESET][DCI_PAYLOAD_BYTE_LEN];
+} nfapi_nr_dl_tti_pdcch_pdu_rel15_t;
+
+typedef struct {
+ uint16_t pduBitmap;
+ uint16_t rnti;
+ uint16_t pduIndex;
+ // BWP [TS38.213 sec 12]
+ /// Bandwidth part size [TS38.213 sec12]. Number of contiguous PRBs allocated to the BWP, Value: 1->275
+ uint16_t BWPSize;
+ /// bandwidth part start RB index from reference CRB [TS38.213 sec 12],Value: 0->274
+ uint16_t BWPStart;
+ /// subcarrierSpacing [TS38.211 sec 4.2], Value:0->4
+ uint8_t SubcarrierSpacing;
+ /// Cyclic prefix type [TS38.211 sec 4.2], 0: Normal; 1: Extended
+ uint8_t CyclicPrefix;
+ // Codeword information
+ /// Number of code words for this RNTI (UE), Value: 1 -> 2
+ uint8_t NrOfCodewords;
+ /// Target coding rate [TS38.212 sec 5.4.2.1 and 38.214 sec 5.1.3.1]. This is the number of information bits per 1024 coded bits expressed in 0.1 bit units
+ uint16_t targetCodeRate[2];
+ /// QAM modulation [TS38.212 sec 5.4.2.1 and 38.214 sec 5.1.3.1], Value: 2,4,6,8
+ uint8_t qamModOrder[2];
+ /// MCS index [TS38.214, sec 5.1.3.1], should match value sent in DCI Value : 0->31
+ uint8_t mcsIndex[2];
+ /// MCS-Table-PDSCH [TS38.214, sec 5.1.3.1] 0: notqam256, 1: qam256, 2: qam64LowSE
+ uint8_t mcsTable[2];
+ /// Redundancy version index [TS38.212, Table 5.4.2.1-2 and 38.214, Table 5.1.2.1-2], should match value sent in DCI Value : 0->3
+ uint8_t rvIndex[2];
+ /// Transmit block size (in bytes) [TS38.214 sec 5.1.3.2], Value: 0->65535
+ uint32_t TBSize[2];
+ /// dataScramblingIdentityPdsch [TS38.211, sec 7.3.1.1], It equals the higher-layer parameter Datascrambling-Identity if configured and the RNTI equals the C-RNTI, otherwise L2 needs to set it to physical cell id. Value: 0->65535
+ uint16_t dataScramblingId;
+ /// Number of layers [TS38.211, sec 7.3.1.3]. Value : 1->8
+ uint8_t nrOfLayers;
+ /// PDSCH transmission schemes [TS38.214, sec5.1.1] 0: Up to 8 transmission layers
+ uint8_t transmissionScheme;
+ /// Reference point for PDSCH DMRS "k" - used for tone mapping [TS38.211, sec 7.4.1.1.2] Resource block bundles [TS38.211, sec 7.3.1.6] Value: 0 -> 1 If 0, the 0 reference point for PDSCH DMRS is at Point A [TS38.211 sec 4.4.4.2]. Resource block bundles generated per sub-bullets 2 and 3 in [TS38.211, sec 7.3.1.6]. For sub-bullet 2, the start of bandwidth part must be set to the start of actual bandwidth part +NstartCORESET and the bandwidth of the bandwidth part must be set to the bandwidth of the initial bandwidth part. If 1, the DMRS reference point is at the lowest VRB/PRB of the allocation. Resource block bundles generated per sub-bullets 1 [TS38.211, sec 7.3.1.6]
+ uint8_t refPoint;
+ // DMRS [TS38.211 sec 7.4.1.1]
+ /// DMRS symbol positions [TS38.211, sec 7.4.1.1.2 and Tables 7.4.1.1.2-3 and 7.4.1.1.2-4] Bitmap occupying the 14 LSBs with: bit 0: first symbol and for each bit 0: no DMRS 1: DMRS
+ uint16_t dlDmrsSymbPos;
+ /// DL DMRS config type [TS38.211, sec 7.4.1.1.2] 0: type 1, 1: type 2
+ uint8_t dmrsConfigType;
+ /// DL-DMRS-Scrambling-ID [TS38.211, sec 7.4.1.1.2 ] If provided by the higher-layer and the PDSCH is scheduled by PDCCH with CRC scrambled by CRNTI or CS-RNTI, otherwise, L2 should set this to physical cell id. Value: 0->65535
+ uint16_t dlDmrsScramblingId;
+ /// DMRS sequence initialization [TS38.211, sec 7.4.1.1.2]. Should match what is sent in DCI 1_1, otherwise set to 0. Value : 0->1
+ uint8_t SCID;
+ /// Number of DM-RS CDM groups without data [TS38.212 sec 7.3.1.2.2] [TS38.214 Table 4.1-1] it determines the ratio of PDSCH EPRE to DM-RS EPRE. Value: 1->3
+ uint8_t numDmrsCdmGrpsNoData;
+ /// DMRS ports. [TS38.212 7.3.1.2.2] provides description between DCI 1-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used
+ uint16_t dmrsPorts;
+ // Pdsch Allocation in frequency domain [TS38.214, sec 5.1.2.2]
+ /// Resource Allocation Type [TS38.214, sec 5.1.2.2] 0: Type 0, 1: Type 1
+ uint8_t resourceAlloc;
+ /// For resource alloc type 0. TS 38.212 V15.0.x, 7.3.1.2.2 bitmap of RBs, 273 rounded up to multiple of 32. This bitmap is in units of VRBs. LSB of byte 0 of the bitmap represents the first RB of the bwp
+ uint8_t rbBitmap[36];
+ /// For resource allocation type 1. [TS38.214, sec 5.1.2.2.2] The starting resource block within the BWP for this PDSCH. Value: 0->274
+ uint16_t rbStart;
+ /// For resource allocation type 1. [TS38.214, sec 5.1.2.2.2] The number of resource block within for this PDSCH. Value: 1->275
+ uint16_t rbSize;
+ /// VRB-to-PRB-mapping [TS38.211, sec 7.3.1.6] 0: non-interleaved 1: interleaved with RB size 2 2: Interleaved with RB size 4
+ uint8_t VRBtoPRBMapping;
+ // Resource Allocation in time domain [TS38.214, sec 5.1.2.1]
+ /// Start symbol index of PDSCH mapping from the start of the slot, S. [TS38.214, Table 5.1.2.1-1] Value: 0->13
+ uint8_t StartSymbolIndex;
+ /// PDSCH duration in symbols, L [TS38.214, Table 5.1.2.1-1] Value: 1->14
+ uint8_t NrOfSymbols;
+ // PTRS [TS38.214, sec 5.1.6.3]
+ /// PT-RS antenna ports [TS38.214, sec 5.1.6.3] [TS38.211, table 7.4.1.2.2-1] Bitmap occupying the 6 LSBs with: bit 0: antenna port 1000 bit 5: antenna port 1005 and for each bit 0: PTRS port not used 1: PTRS port used
+ uint8_t PTRSPortIndex ;
+ /// PT-RS time density [TS38.214, table 5.1.6.3-1] 0: 1 1: 2 2: 4
+ uint8_t PTRSTimeDensity;
+ /// PT-RS frequency density [TS38.214, table 5.1.6.3-2] 0: 2 1: 4
+ uint8_t PTRSFreqDensity;
+ /// PT-RS resource element offset [TS38.211, table 7.4.1.2.2-1] Value: 0->3
+ uint8_t PTRSReOffset;
+ /// PT-RS-to-PDSCH EPRE ratio [TS38.214, table 4.1-2] Value :0->3
+ uint8_t nEpreRatioOfPDSCHToPTRS;
+ // Beamforming
+ nfapi_nr_tx_precoding_and_beamforming_t precodingAndBeamforming;
+}nfapi_nr_dl_tti_pdsch_pdu_rel15_t;
+
+
+//for pdsch_pdu:
+/*
+typedef struct
+{
+ uint16_t target_code_rate;//
+ uint8_t qam_mod_order;//
+ uint8_t mcs_index;//
+ uint8_t mcs_table;//
+ uint8_t rv_index;//
+ uint32_t tb_size;//
+} nfapi_nr_code_word_t;
+
+//table 3-38
+typedef struct
+{
+ uint16_t pdu_bit_map;//Bitmap indicating presence of optional PDUs Bit 0: pdschPtrs - Indicates PTRS included (FR2) Bit 1:cbgRetxCtrl (Present when CBG based retransmit is used) All other bits reserved
+ uint16_t rnti;//The RNTI used for identifying the UE when receiving the PDU Value: 1 -> 65535
+ uint16_t pdu_index;//
+ uint16_t bwp_size;//Bandwidth part size [TS38.213 sec12]. Number of contiguous PRBs allocated to the BWP Value: 1->275
+ uint16_t bwp_start;//bandwidth part start RB index from reference CRB [TS38.213 sec 12] Value: 0->274
+ uint8_t subcarrier_spacing;//Value:0->4
+ uint8_t cyclic_prefix;//0: Normal; 1: Extended
+ uint8_t nr_of_code_words;//Number of code words for this RNTI (UE) Value: 1 -> 2
+ nfapi_nr_code_word_t* code_word_list;
+ uint16_t data_scrambling_id;//
+ uint8_t nr_of_layers;//
+ uint8_t transmission_scheme;//PDSCH transmission schemes [TS38.214, sec 5.1.1] 0: Up to 8 transmission layers
+ uint8_t ref_point;//Reference point for PDSCH DMRS "k" - used for tone mapping
+ //DMRS
+ uint16_t dl_dmrs_symb_pos;//Bitmap occupying the 14 LSBs with: bit 0: first symbol and for each bit 0: no DMRS 1: DMRS
+ uint8_t dmrs_config_type;//DL DMRS config type[TS38.211, sec 7.4.1.1.2] 0: type 1 1: type 2
+ uint16_t dl_dmrs_scrambling_id;//DL-DMRS-Scrambling-ID [TS38.211, sec 7.4.1.1.2 ] If provided by the higher-layer and the PDSCH is scheduled by PDCCH with CRC scrambled by CRNTI or CS-RNTI, otherwise, L2 should set this to physical cell id. Value: 0->65535
+ uint8_t scid;// 0 1
+ uint8_t num_dmrs_cdm_grps_no_data;//Number of DM-RS CDM groups without data [TS38.212 sec 7.3.1.2.2] [TS38.214 Table 4.1-1] it determines the ratio of PDSCH EPRE to DM-RS EPRE. Value: 1->3
+ uint16_t dmrs_ports;//DMRS ports. [TS38.212 7.3.1.2.2] provides description between DCI 1-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used
+
+ //Pdsch Allocation in frequency domain [TS38.214, sec 5.1.2.2]
+ uint8_t resource_alloc;//Resource Allocation Type [TS38.214, sec 5.1.2.2] 0: Type 0 1: Type 1
+ uint8_t rb_bit_map[36];//For resource alloc type 0. TS 38.212 V15.0.x, 7.3.1.2.2 bitmap of RBs, 273 rounded up to multiple of 32. This bitmap is in units of VRBs. LSB of byte 0 of the bitmap represents the first RB of the bwp
+ uint16_t rb_start;//For resource allocation type 1. [TS38.214, sec5.1.2.2.2] The starting resource block within the BWP for this PDSCH. Value: 0->274
+ uint16_t rb_size;//For resource allocation type 1. [TS38.214, sec 5.1.2.2.2] The number of resource block within for this PDSCH. Value: 1->275
+ uint8_t vrb_to_prb_mapping;//VRB-to-PRB-mapping [TS38.211, sec 7.3.1.6] 0: non-interleaved 1: interleaved with RB size 2 2: Interleaved with RB size 4
+ //Resource Allocation in time domain [TS38.214, sec 5.1.2.1]
+ uint8_t start_symbol_index;//Start symbol index of PDSCH mapping from the start of the slot, S. [TS38.214, Table 5.1.2.1-1] Value: 0->13
+ uint8_t nr_of_symbols;//PDSCH duration in symbols, L [TS38.214, Table 5.1.2.1-1] Value: 1->14
+ //PTRS TS38.214 sec 5.1.6.3
+ uint8_t ptrs_port_index;//PT-RS antenna ports [TS38.214, sec 5.1.6.3] [TS38.211, table 7.4.1.2.2-1] Bitmap occupying the 6 LSBs with: bit 0: ntenna port 1000 bit 5: antenna port 1005 and for each bit 0: PTRS port not used 1: PTRS port used
+ uint8_t ptrs_time_density;//PT-RS time density [TS38.214, table 5.1.6.3-1] 0: 1 1: 2 2: 4
+ uint8_t ptrs_freq_density;//PT-RS frequency density [TS38.214, table[5.1.6.3-2] 0: 2 1: 4
+ uint8_t ptrs_re_offset;//PT-RS resource element offset [TS38.211, table [7.4.1.2.2-1]
+ uint8_t n_epre_ratio_of_pdsch_to_ptrs;//PT-RS-to-PDSCH EPRE ratio [TS38.214, table 4.1-2] Value :0->3
+ nfapi_nr_tx_precoding_and_beamforming_t* precoding_and_beamforming_list;
+ //TX power info
+ uint8_t power_control_offset;//Ratio of PDSCH EPRE to NZP CSI-RSEPRE [TS38.214, sec 5.2.2.3.1] Value :0->23 representing -8 to 15 dB in 1dB steps
+ uint8_t power_control_offset_ss;//Ratio of SSB/PBCH block EPRE to NZP CSI-RS EPRES [TS38.214, sec 5.2.2.3.1] Values: 0: -3dB, 1: 0dB, 2: 3dB, 3: 6dB
+ //CBG fields
+ uint8_t is_last_cb_present;//Indicates whether last CB is present in the CBG retransmission 0: CBG retransmission does not include last CB 1: CBG retransmission includes last CB If CBG Re-Tx includes last CB, L1 will add the TB CRC to the last CB in the payload before it is read into the LDPC HW unit
+ uint8_t is_inline_tb_crc;//Indicates whether TB CRC is part of data payload or control message 0: TB CRC is part of data payload 1: TB CRC is part of control message
+ uint32_t dl_tb_crc;//TB CRC: to be used in the last CB, applicable only if last CB is present
+
+} nfapi_nr_dlsch_pdu_t;
+*/
+
+//for csi-rs_pdu:
+
+//table 3-39
+typedef struct
+{
+ uint16_t bwp_size;//
+ uint16_t bwp_start;//
+ uint8_t subcarrier_spacing;//
+ uint8_t cyclic_prefix;//
+ uint16_t start_rb;
+ uint16_t nr_of_rbs;
+ uint8_t csi_type;//Value: 0:TRS 1:CSI-RS NZP 2:CSI-RS ZP
+ uint8_t row;//Row entry into the CSI Resource location table. [TS38.211, sec 7.4.1.5.3 and table 7.4.1.5.3-1] Value: 1-18
+ uint16_t freq_domain;//Value: Up to the 12 LSBs, actual size is determined by the Row parameter
+ uint8_t symb_l0;//The time domain location l0 and firstOFDMSymbolInTimeDomain Value: 0->13
+ uint8_t symb_l1;//
+ uint8_t cdm_type;
+ uint8_t freq_density;//The density field, p and comb offset (for dot5).0: dot5 (even RB), 1: dot5 (odd RB), 2: one, 3: three
+ uint16_t scramb_id;//ScramblingID of the CSI-RS [TS38.214, sec 5.2.2.3.1] Value: 0->1023
+ //tx power info
+ uint8_t power_control_offset;//Ratio of PDSCH EPRE to NZP CSI-RSEPRE Value :0->23 representing -8 to 15 dB in 1dB steps
+ uint8_t power_control_offset_ss;//Ratio of SSB/PBCH block EPRE to NZP CSI-RS EPRES 0: -3dB, 1: 0dB, 2: 3dB, 3: 6dB
+
+} nfapi_nr_dl_tti_csi_rs_pdu_rel15_t;
+
+//for ssb_pdu:
+
+typedef struct
+{
+ uint32_t bch_payload;//BCH payload. The valid bits are indicated in the PARAM/CONFIG TLVs. If PARAM/CONFIG TLVs indicate MAC generates full bchPayload then the payload length is 31 bits with the 8 LSB bits being. Otherwise timing PBCH bits are generated by the PHY. And for bchPayload the 24 LSB are used.
+
+} nfapi_nr_mac_generated_mib_pdu_t;
+
+typedef struct
+{
+ uint8_t dmrs_type_a_position;//The position of the first DM-RS for downlink and uplink.
+ uint8_t pdcch_config_sib1;//The parameter PDCCH-ConfigSIB1 that determines a common ControlResourceSet (CORESET) a common search space and necessary PDCCH parameters.
+ uint8_t cell_barred;//The flag to indicate whether the cell is barred
+ uint8_t intra_freq_reselection;//The flag to controls cell selection/reselection to intrafrequency cells when the highest ranked cell is barred, or treated as barred by the UE. value 0 1
+
+} nfapi_nr_phy_generated_mib_pdu_t;
+
+
+typedef struct
+{
+ nfapi_nr_mac_generated_mib_pdu_t* mac_generated_mib_pdu;
+ nfapi_nr_phy_generated_mib_pdu_t* phy_generated_mib_pdu;
+
+} nfapi_nr_bch_payload_t;
+
+typedef struct {
+ /// Physical Cell ID Value 0~>1007
+ uint16_t PhysCellId;
+ ///PSS EPRE to SSS EPRE in a SS/PBCH block 0 = 0dB 1 = 3dB
+ uint8_t BetaPss;
+ ///SS/PBCH block index within a SSB burst set. Required for PBCH DMRS scrambling. Value: 0->63 (Lmax)
+ uint8_t SsbBlockIndex;
+ /// ssbSubcarrierOffset or 𝑘𝑆𝑆𝐵 (TS38.211, section 7.4.3.1) Value: 0->31
+ uint8_t SsbSubcarrierOffset;
+ ///Offset of lowest subcarrier of lowest resource block used for SS/PBCH block. Value: 0->2199
+ uint16_t ssbOffsetPointA;
+ /// A value indicating how the BCH payload is generated. This should match the PARAM/CONFIG TLVs. Value: 0: MAC generates the full PBCH payload, see Table 3-41, where bchPayload has 31 bits 1: PHY generates the timing PBCH bits, see Table 3-41, where the bchPayload has 24 bits 2: PHY generates the full PBCH payload
+ uint8_t bchPayloadFlag;
+ uint32_t bchPayload;
+ nfapi_nr_tx_precoding_and_beamforming_t precoding_and_beamforming;
+} nfapi_nr_dl_tti_ssb_pdu_rel15_t;
+
+typedef struct {
+ nfapi_nr_dl_tti_ssb_pdu_rel15_t ssb_pdu_rel15;
+} nfapi_nr_dl_tti_ssb_pdu;
+
+typedef struct {
+ nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_rs_pdu_rel15;
+} nfapi_nr_dl_tti_csi_rs_pdu;
+
+typedef struct {
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t pdsch_pdu_rel15;
+} nfapi_nr_dl_tti_pdsch_pdu;
+
+typedef struct {
+ nfapi_nr_dl_tti_pdcch_pdu_rel15_t pdcch_pdu_rel15;
+} nfapi_nr_dl_tti_pdcch_pdu;
+
+typedef struct {
+ uint16_t PDUType;
+ uint16_t PDUSize;
+
+ union {
+ nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu;
+ nfapi_nr_dl_tti_pdsch_pdu pdsch_pdu;
+ nfapi_nr_dl_tti_csi_rs_pdu csi_rs_pdu;
+ nfapi_nr_dl_tti_ssb_pdu ssb_pdu;
+ };
+} nfapi_nr_dl_tti_request_pdu_t;
+
+#define NFAPI_NR_MAX_DL_TTI_PDUS 32
+typedef struct {
+ /// Number of PDUs that are included in this message. All PDUs in the message are numbered in order. Value 0 -> 255
+ uint8_t nPDUs;
+ /// Number of UEs in the Group included in this message. Value 0 -> 255
+ uint8_t nGroup;
+ /// List containing PDUs
+ nfapi_nr_dl_tti_request_pdu_t dl_tti_pdu_list[NFAPI_NR_MAX_DL_TTI_PDUS];
+ /// Number of UE in this group. For SU-MIMO, one group includes one UE only. For MU-MIMO, one group includes up to 12 UEs. Value 1 -> 12
+ uint8_t nUe[256];
+ /// This value is an index for number of PDU identified by nPDU in this message Value: 0 -> 255
+ uint8_t PduIdx[256][12];
+} nfapi_nr_dl_tti_request_body_t;
+
+typedef struct {
+ nfapi_p7_message_header_t header;
+ /// System Frame Number (0-1023)
+ uint16_t SFN;
+ /// Slot number (0-319)
+ uint16_t Slot;
+ nfapi_nr_dl_tti_request_body_t dl_tti_request_body;
+ nfapi_vendor_extension_tlv_t vendor_extension;
+} nfapi_nr_dl_tti_request_t;
+
+/*
+typedef struct
+{
+ nfapi_nr_dl_tti_pdcch_pdu* pdcch_pdu;
+ nfapi_nr_dl_tti_pdsch_pdu* pdsch_pdu;
+ nfapi_nr_dl_tti_csi_rs_pdu_t* csi_rs_pdu;
+ nfapi_nr_dl_tti_ssb_pdu_t* ssb_pdu;
+} nfapi_nr_dl_pdu_configuration_t;
+*/
+ /*
+typedef struct
+{
+ uint16_t pdu_type;//0: PDCCH PDU 1: PDSCH PDU 2: CSI-RS PDU 3: SSB PDU,
+ uint16_t pdu_size;//Size of the PDU control information (in bytes). This length value includes the 4 bytes required for the PDU type and PDU size parameters. Value 0 -> 65535
+ nfapi_nr_dl_pdu_configuration_t* dl_pdu_configuration;
+
+} nfapi_nr_dl_tti_request_number_of_pdus_t;
+
+
+typedef struct
+{
+ uint8_t pdu_idx;//This value is an index for number of PDU identified by nPDU in this message Value: 0 -> 255
+
+} nfapi_nr_dl_tti_request_number_of_ue_t;
+
+typedef struct
+{
+ uint8_t n_ue;//Number of UE in this group For SU-MIMO, one group includes one UE only. For MU-MIMO, one group includes up to 12 UEs. Value 1 -> 12
+ nfapi_nr_dl_tti_request_number_of_ue_t* ue_list;
+
+} nfapi_nr_dl_tti_request_number_of_groups_t;
+
+//3.4.2 dl_tti_request
+typedef struct {
+ uint16_t sfn; //0->1023
+ uint16_t slot;//0->319
+ uint8_t n_pdus;//Number of PDUs that are included in this message. All PDUs in the message are numbered in order. Value 0 -> 255
+ uint8_t n_group;//Number of UE Groups included in this message. Value 0 -> 255
+ nfapi_nr_dl_tti_request_number_of_pdus_t* pdus_list;
+ nfapi_nr_dl_tti_request_number_of_groups_t* groups_list;
+
+} nfapi_nr_dl_tti_request_t;
+*/
+
+// Section 3.4.3 ul_tti_request
+
+//for prach_pdu:
+typedef struct
+{
+ nfapi_nr_dig_bf_interface_t* dig_bf_interface_list;
+
+} nfapi_nr_ul_beamforming_number_of_prgs_t;
+
+typedef struct
+{
+ uint16_t num_prgs;
+ uint16_t prg_size;
+ //watchout: dig_bf_interface here, in table 3-43 it's dig_bf_interfaces
+ uint8_t dig_bf_interface;
+ nfapi_nr_ul_beamforming_number_of_prgs_t* prgs_list;//
+
+} nfapi_nr_ul_beamforming_t;
+
+typedef struct
+{
+ uint16_t phys_cell_id;
+ uint8_t num_prach_ocas;
+ uint8_t prach_format;
+ uint8_t num_ra;
+ uint8_t prach_start_symbol;
+ uint16_t num_cs;//
+ nfapi_nr_ul_beamforming_t beamforming;
+
+} nfapi_nr_prach_pdu_t;
+
+//for pusch_pdu:
+
+ //for nfapi_nr_pusch_data_t;
+typedef struct
+{
+ uint8_t rv_index;
+ uint8_t harq_process_id;
+ uint8_t new_data_indicator;
+ uint32_t tb_size;
+ uint16_t num_cb;
+ uint8_t cb_present_and_position[(NFAPI_MAX_NUM_CB+7) / 8];
+
+} nfapi_nr_pusch_data_t;
+ //for nfapi_nr_pusch_uci_t
+typedef struct
+{
+ uint16_t harq_ack_bit_length;
+ uint16_t csi_part1_bit_length;
+ uint16_t csi_part2_bit_length;
+ uint8_t alpha_scaling;
+ uint8_t beta_offset_harq_ack;
+ uint8_t beta_offset_csi1;
+ uint8_t beta_offset_csi2;
+
+} nfapi_nr_pusch_uci_t;
+
+ //for nfapi_nr_pusch_ptrs_t
+typedef struct
+{
+ uint16_t ptrs_port_index;//PT-RS antenna ports [TS38.214, sec6.2.3.1 and 38.212, section 7.3.1.1.2] Bitmap occupying the 12 LSBs with: bit 0: antenna port 0 bit 11: antenna port 11 and for each bit 0: PTRS port not used 1: PTRS port used
+ uint8_t ptrs_dmrs_port;//DMRS port corresponding to PTRS.
+ uint8_t ptrs_re_offset;//PT-RS resource element offset value taken from 0~11
+} nfapi_nr_ptrs_ports_t;
+
+typedef struct
+{
+ uint8_t num_ptrs_ports;
+ nfapi_nr_ptrs_ports_t* ptrs_ports_list;
+ uint8_t ptrs_time_density;
+ uint8_t ptrs_freq_density;
+ uint8_t ul_ptrs_power;
+
+}nfapi_nr_pusch_ptrs_t;
+
+ //for nfapi_nr_dfts_ofdm_t
+typedef struct
+{
+ uint8_t low_papr_group_number;//Group number for Low PAPR sequence generation.
+ uint16_t low_papr_sequence_number;//[TS38.211, sec 5.2.2] For DFT-S-OFDM.
+ uint8_t ul_ptrs_sample_density;//Number of PTRS groups [But I suppose this sentence is misplaced, so as the next one. --Chenyu]
+ uint8_t ul_ptrs_time_density_transform_precoding;//Number of samples per PTRS group
+
+} nfapi_nr_dfts_ofdm_t;
+
+#define PUSCH_PDU_BITMAP_PUSCH_DATA 0x1
+#define PUSCH_PDU_BITMAP_PUSCH_UCI 0x2
+#define PUSCH_PDU_BITMAP_PUSCH_PTRS 0x4
+#define PUSCH_PDU_BITMAP_DFTS_OFDM 0x8
+
+typedef struct
+{
+ uint16_t pdu_bit_map;//Bitmap indicating presence of optional PDUs (see above)
+ uint16_t rnti;
+ uint32_t handle;//An opaque handling returned in the RxData.indication and/or UCI.indication message
+ //BWP
+ uint16_t bwp_size;
+ uint16_t bwp_start;
+ uint8_t subcarrier_spacing;
+ uint8_t cyclic_prefix;
+ //pusch information always include
+ uint16_t target_code_rate;
+ uint8_t qam_mod_order;
+ uint8_t mcs_index;
+ uint8_t mcs_table;
+ uint8_t transform_precoding;
+ uint16_t data_scrambling_id;
+ uint8_t nrOfLayers;
+ //DMRS
+ uint8_t ul_dmrs_symb_pos;
+ uint8_t dmrs_config_type;
+ uint16_t ul_dmrs_scrambling_id;
+ uint8_t scid;//
+ uint8_t num_dmrs_cdm_grps_no_data;
+ uint16_t dmrs_ports;//DMRS ports. [TS38.212 7.3.1.1.2] provides description between DCI 0-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used
+ //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2]
+ uint8_t resource_alloc;
+ uint8_t rb_bitmap[36];//
+ uint16_t rb_start;
+ uint16_t rb_size;
+ uint8_t vrb_to_prb_mapping;
+ uint8_t frequency_hopping;
+ uint16_t tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE]
+ uint8_t uplink_frequency_shift_7p5khz;
+ //Resource Allocation in time domain
+ uint8_t start_symbol_index;
+ uint8_t nr_of_symbols;
+ //Optional Data only included if indicated in pduBitmap
+ nfapi_nr_pusch_data_t pusch_data;
+ nfapi_nr_pusch_uci_t pusch_uci;
+ nfapi_nr_pusch_ptrs_t pusch_ptrs;
+ nfapi_nr_dfts_ofdm_t dfts_ofdm;
+ //beamforming
+ nfapi_nr_ul_beamforming_t beamforming;
+
+} nfapi_nr_pusch_pdu_t;
+
+//for pucch_pdu:
+typedef struct
+{
+ uint16_t rnti;
+ uint32_t handle;
+ //BWP
+ uint16_t bwp_size;
+ uint16_t bwp_start;
+ uint8_t subcarrier_spacing;
+ uint8_t cyclic_prefix;
+
+ uint8_t format_type;
+ uint8_t multi_slot_tx_indicator;
+ uint8_t pi_2bpsk;
+ //pucch allocation in freq domain
+ uint16_t prb_start;
+ uint16_t prb_size;
+ //pucch allocation in tome domain
+ uint8_t start_symbol_index;
+ uint8_t nr_of_symbols;
+ //hopping info
+ uint8_t freq_hop_flag;
+ uint16_t second_hop_prb;
+ uint8_t group_hop_flag;
+ uint8_t sequence_hop_flag;
+ uint16_t hopping_id;
+ uint16_t initial_cyclic_shift;
+
+ uint16_t data_scrambling_id;
+ uint8_t time_domain_occ_idx;
+ uint8_t pre_dft_occ_idx;
+ uint8_t pre_dft_occ_len;
+ //DMRS
+ uint8_t add_dmrs_flag;
+ uint16_t dmrs_scrambling_id;
+ uint8_t dmrs_cyclic_shift;
+
+ uint8_t sr_flag;
+ uint8_t bit_len_harq;
+ uint16_t bit_len_csi_part1;
+ uint16_t bit_len_csi_part2;
+
+ nfapi_nr_ul_beamforming_t beamforming;
+
+} nfapi_nr_pucch_pdu_t;
+
+//for srs_pdu:
+
+typedef struct
+{
+ uint16_t rnti;//UE RNTI
+ uint32_t handle;//An opaque handling returned in the SRS.indication
+ //BWP
+ uint16_t bwp_size;
+ uint16_t bwp_start;
+ uint8_t subcarrier_spacing;
+ uint8_t cyclic_prefix;
+
+ uint8_t num_ant_ports;
+ uint8_t num_symbols;
+ uint8_t num_repetitions;
+ uint8_t time_start_position;//Starting position in the time domain l0; Note: the MAC undertakes the translation from startPosition to 𝑙0
+ uint8_t config_index;
+ uint16_t sequence_id;
+ uint8_t bandwidth_index;
+ uint8_t comb_size;
+ uint8_t comb_offset;//Transmission comb offset 𝑘 ̄ TC [TS38.211, Sec 6.4.1.4.3] Value: 0 → 1 (combSize = 0) Value: 0 → 3 (combSize = 1)
+ uint8_t cyclic_shift;
+ uint8_t frequency_position;
+ uint8_t frequency_shift;
+ uint8_t frequency_hopping;
+ uint8_t group_or_sequence_hopping;//Group or sequence hopping configuration (RRC parameter groupOrSequenceHopping in SRS-Resource
+ uint8_t resource_type;//Type of SRS resource allocation
+ uint16_t t_srs;//SRS-Periodicity in slots [TS38.211 Sec 6.4.1.4.4] Value: 1,2,3,4,5,8,10,16,20,32,40,64,80,160,320,640,1280,2560
+ uint16_t t_offset;//Slot offset value [TS38.211, Sec 6.4.1.4.3] Value:0->2559
+
+ nfapi_nr_ul_beamforming_t beamforming;
+
+} nfapi_nr_srs_pdu_t;
+
+//
+
+typedef enum {
+ NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE = 0,
+ NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE = 1,
+ NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE = 2,
+ NFAPI_NR_DL_TTI_SSB_PDU_TYPE = 3,
+} nfapi_nr_dl_tti_pdu_type_e;
+
+typedef enum {
+ NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE=0,
+ NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE,
+ NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE,
+ NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE,
+} nfapi_nr_ul_config_pdu_type_e;
+
+typedef struct
+{
+ uint16_t pdu_type;//0: PRACH PDU, 1: PUSCH PDU, 2: PUCCH PDU, 3: SRS PDU
+ uint16_t pdu_size;//Value: 0 -> 65535
+ union
+ {
+ nfapi_nr_prach_pdu_t prach_pdu;
+ nfapi_nr_pusch_pdu_t pusch_pdu;
+ nfapi_nr_pucch_pdu_t pucch_pdu;
+ nfapi_nr_srs_pdu_t srs_pdu;
+ };
+
+} nfapi_nr_ul_tti_request_number_of_pdus_t;
+
+typedef struct
+{
+ uint8_t pdu_idx;//This value is an index for number of PDU identified by nPDU in this message Value: 0 -> 65535
+
+} nfapi_nr_ul_tti_request_number_of_ue_t;
+
+typedef struct
+{
+ uint8_t n_ue;//Number of UE in this group For SU-MIMO, one group includes one UE only. For MU-MIMO, one group includes up to 12 UEs. Value 1 -> 6
+ nfapi_nr_ul_tti_request_number_of_ue_t ue_list[NFAPI_MAX_NUM_UL_UE_PER_GROUP];
+
+} nfapi_nr_ul_tti_request_number_of_groups_t;
+
+typedef struct {
+ uint16_t SFN; //0->1023
+ uint16_t Slot;//0->319
+ uint8_t n_pdus;//Number of PDUs that are included in this message. All PDUs in the message are numbered in order. Value 0 -> 255
+ uint8_t rach_present;//Indicates if a RACH PDU will be included in this message. 0: no RACH in this slot 1: RACH in this slot
+ uint8_t n_ulsch;//Number of ULSCH PDUs that are included in this message.
+ uint8_t n_ulcch;//Number of ULCCH PDUs
+ uint8_t n_group;//Number of UE Groups included in this message. Value 0 -> 8
+ nfapi_nr_ul_tti_request_number_of_pdus_t pdus_list[NFAPI_MAX_NUM_UL_PDU];
+ nfapi_nr_ul_tti_request_number_of_groups_t groups_list[NFAPI_MAX_NUM_GROUPS];
+} nfapi_nr_ul_tti_request_t;
+
+//3.4.4 ul_dci_request
+
+//table 3-54
+
+/*
+typedef struct
+{
+ uint16_t pdu_type;//0: PDCCH PDU
+ uint16_t pdu_size;
+ nfapi_nr_dl_pdu_configuration_t* phcch_pdu_configuration;
+
+} nfapi_nr_ul_dci_request_number_of_pdus_t;
+
+typedef struct
+{
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t num_pdus;
+ nfapi_nr_ul_dci_request_number_of_pdus_t* pdu_list;
+
+} nfapi_nr_ul_dci_request_t;
+*/
+
+ // normally one PDU per coreset per BWP
+#define NFAPI_NR_MAX_UL_DCI_PDUS 4
+
+typedef struct {
+ /// only possible value 0: PDCCH PDU
+ uint16_t PDUType;
+ ///Size of the PDU control information (in bytes). This length value includes the 4 bytes required for the PDU type and PDU size parameters. Value 0 -> 65535
+ uint16_t PDUSize;
+ nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu;
+} nfapi_nr_ul_dci_request_pdus_t;
+
+typedef struct {
+ uint16_t SFN;
+ uint16_t Slot;
+ uint8_t numPdus;
+ nfapi_nr_ul_dci_request_pdus_t ul_dci_pdu_list[NFAPI_NR_MAX_UL_DCI_PDUS];
+} nfapi_nr_ul_dci_request_t;
+
+//3.4.5 slot_errors
+typedef enum {
+ NFAPI_NR_SLOT_UL_TTI_MSG_INVALID_STATE,
+ NFAPI_NR_SLOT_UL_TTI_SFN_OUT_OF_SYNC,
+ NFAPI_NR_SLOT_UL_TTI_MSG_BCH_MISSING,
+ NFAPI_NR_SLOT_UL_TTI_MSG_SLOT_ERR
+
+} nfapi_nr_slot_errors_ul_tti_e;
+
+typedef enum {
+ NFAPI_NR_SLOT_DL_TTI_MSG_INVALID_STATE,
+ NFAPI_NR_SLOT_DL_TTI_MSG_SLOT_ERR
+
+} nfapi_nr_slot_errors_dl_tti_e;
+
+
+typedef enum {
+ NFAPI_NR_SLOT_UL_DCI_MSG_INVALID_STATE,
+ NFAPI_NR_SLOT_UL_DCI_MSG_INVALID_SFN,
+ NFAPI_NR_SLOT_UL_DCI_MSG_UL_DCI_ERR
+
+} nfapi_nr_slot_errors_ul_dci_e;
+
+//3.4.6 tx_data_request
+
+//table 3-58
+#define NFAPI_NR_MAX_TX_REQUEST_TLV 2
+typedef struct
+{
+ uint16_t PDU_length;
+ uint16_t PDU_index;
+ uint32_t num_TLV;
+ nfapi_nr_tx_data_request_tlv_t TLVs[NFAPI_NR_MAX_TX_REQUEST_TLV];
+
+} nfapi_nr_pdu_t;
+
+#define NFAPI_NR_MAX_TX_REQUEST_PDUS 16
+typedef struct
+{
+ uint16_t SFN;
+ uint16_t Slot;
+ uint16_t Number_of_PDUs;
+ nfapi_nr_pdu_t pdu_list[NFAPI_NR_MAX_TX_REQUEST_PDUS];
+
+} nfapi_nr_tx_data_request_t;
+
+typedef enum {
+ NFAPI_NR_DL_DATA_MSG_INVALID_STATE,
+ NFAPI_NR_DL_DATA_MSG_INVALID_SFN,
+ NFAPI_NR_DL_DATA_MSG_TX_ERR
+
+} nfapi_nr_dl_data_errors_e;
+
+//section 3.4.7 rx_data_indication
+
+//table 3-61
+
+typedef struct
+{
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t harq_id;
+ uint16_t pdu_length;
+ uint8_t ul_cqi;
+ uint16_t timing_advance;//Timing advance 𝑇𝐴 measured for the UE [TS 38.213, Section 4.2] NTA_new = NTA_old + (TA − 31) ⋅ 16 ⋅ 64⁄2μ Value: 0 → 63 0xffff should be set if this field is invalid
+ uint16_t rssi;
+ //variable ! fixme
+ uint32_t pdu; //MAC PDU
+
+} nfapi_nr_rx_data_pdu_t;
+
+typedef struct
+{
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t number_of_pdus;
+ nfapi_nr_rx_data_pdu_t* pdu_list;
+
+} nfapi_nr_rx_data_indication_t;
+
+//3.4.8 crc_indication
+//table 3-62
+typedef struct
+{
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t harq_id;
+ uint8_t tb_crc_status;
+ uint16_t num_cb;//If CBG is not used this parameter can be set to zero. Otherwise the number of CBs in the TB. Value: 0->65535
+ //! fixme
+ uint8_t* cb_crc_status;//cb_crc_status[ceil(NumCb/8)];
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rssi;
+
+} nfapi_nr_crc_t;
+
+typedef struct
+{
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t number_crcs;
+ nfapi_nr_crc_t* crc_list;
+
+} nfapi_nr_crc_indication_t;
+
+//3.4.9 uci_indication
+
+//table 3-67
+typedef struct
+{
+ uint8_t sr_indication;
+ uint8_t sr_confidence_level;
+
+} nfapi_nr_sr_pdu_0_1_t;
+//table 3-69
+typedef struct
+{
+ uint16_t sr_bit_len;
+ //! fixme
+ uint8_t* sr_payload;//sr_payload[ceil(sr_bit_len/8)];
+
+} nfapi_nr_sr_pdu_2_3_4_t;
+//table 3-68
+typedef struct
+{
+ uint8_t harq_value;//Indicates result on HARQ data. Value: 0 = pass 1 = fail 2 = not present
+
+} nfapi_nr_harq_t;
+
+//table 3-70
+typedef struct
+{
+ uint8_t harq_crc;
+ uint16_t harq_bit_len;
+ //! fixme
+ uint8_t* harq_payload;//harq_payload[ceil(harq_bit_len)];
+} nfapi_nr_harq_pdu_2_3_4_t;
+
+typedef struct
+{
+ uint8_t num_harq;
+ uint8_t harq_confidence_level;
+ nfapi_nr_harq_t* harq_list;
+
+} nfapi_nr_harq_pdu_0_1_t;
+
+//table 3-71
+typedef struct
+{
+ uint8_t csi_part1_crc;
+ uint16_t csi_part1_bit_len;
+ //! fixme
+ uint8_t* csi_part1_payload;//uint8_t[ceil(csiPart1BitLen/8)]
+
+} nfapi_nr_csi_part1_pdu_t;
+
+//table 3-72
+typedef struct
+{
+ uint8_t csi_part2_crc;
+ uint16_t csi_part2_bit_len;
+ //! fixme
+ uint8_t* csi_part2_payload;//uint8_t[ceil(csiPart2BitLen/8)]
+} nfapi_nr_csi_part2_pdu_t;
+
+//table 3-63
+
+ //for dci_pusch_pdu
+typedef struct
+{
+ uint8_t pdu_bit_map;
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rssi;
+ nfapi_nr_harq_pdu_2_3_4_t harq;//table 3-70
+ nfapi_nr_csi_part1_pdu_t csi_part1;//71
+ nfapi_nr_csi_part2_pdu_t csi_part2;//72
+
+}nfapi_nr_uci_pusch_pdu_t;
+
+//for PUCCH PDU Format 0/1
+typedef struct
+{
+ uint8_t pdu_bit_map;
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t pucch_format;//PUCCH format Value: 0 -> 1 0: PUCCH Format0 1: PUCCH Format1
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rssi;
+ nfapi_nr_sr_pdu_0_1_t sr;//67
+ nfapi_nr_harq_pdu_0_1_t harq;//68
+
+
+}nfapi_nr_uci_pucch_pdu_format_0_1_t;
+
+//PUCCH PDU Format 2/3/4
+typedef struct
+{
+ uint8_t pdu_bit_map;
+ uint32_t handle;
+ uint16_t rnti;
+ uint8_t pucch_format;//PUCCH format Value: 0 -> 2 0: PUCCH Format2 1: PUCCH Format3 2: PUCCH Format4
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rssi;
+ nfapi_nr_sr_pdu_2_3_4_t sr;//69
+ nfapi_nr_harq_pdu_2_3_4_t harq;//70
+ nfapi_nr_csi_part1_pdu_t csi_part1;//71
+ nfapi_nr_csi_part2_pdu_t csi_part2;//72
+
+}nfapi_nr_uci_pucch_pdu_format_2_3_4_t;
+
+//for SR, HARQ and CSI Part 1/ 2 PDUs
+
+typedef struct
+{
+ nfapi_nr_uci_pusch_pdu_t* pusch_pdu;
+ nfapi_nr_uci_pucch_pdu_format_0_1_t* pucch_pdu_format_0_1;
+ nfapi_nr_uci_pucch_pdu_format_2_3_4_t* pucch_pdu_format_2_3_4;
+ nfapi_nr_sr_pdu_0_1_t* sr_pdu_0_1;
+ nfapi_nr_sr_pdu_2_3_4_t* sr_pdu_2_3_4;
+ nfapi_nr_harq_pdu_0_1_t* harq_pdu_0_1;
+ nfapi_nr_harq_pdu_2_3_4_t* harq_pdu_2_3_4;
+ nfapi_nr_csi_part1_pdu_t* csi_part1_pdu;
+ nfapi_nr_csi_part2_pdu_t* csi_part2_pdu;
+
+} nfapi_nr_uci_pdu_information_t;
+
+typedef struct
+{
+ uint16_t pdu_type;
+ uint16_t pdu_size;
+ nfapi_nr_uci_pdu_information_t uci_pdu;
+
+} nfapi_nr_uci_t;
+
+typedef struct
+{
+ uint16_t sfn;
+ uint16_t slot;
+ uint16_t num_ucis;
+ nfapi_nr_uci_t* uci_list;
+
+} nfapi_nr_uci_indication_t;
+
+//3.4.10 srs_indication
+//table 3-73
+
+typedef struct
+{
+ uint8_t rb_snr;
+}nfapi_nr_srs_indication_reported_symbol_resource_block_t;
+
+typedef struct
+{
+ uint16_t num_rbs;
+ nfapi_nr_srs_indication_reported_symbol_resource_block_t* rb_list;
+}nfapi_nr_srs_indication_reported_symbol_t;
+
+
+typedef struct
+{
+ uint32_t handle;
+ uint16_t rnti;
+ uint16_t timing_advance;
+ uint8_t num_symbols;
+ uint8_t wide_band_snr;
+ uint8_t num_reported_symbols;
+ nfapi_nr_srs_indication_reported_symbol_t* reported_symbol_list;
+
+}nfapi_nr_srs_indication_pdu_t;
+
+typedef struct
+{
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t number_of_pdus;
+ nfapi_nr_srs_indication_pdu_t* pdu_list;
+
+} nfapi_nr_srs_indication_t;
+
+
+//3.4.11 rach_indication
+//table 3-74
+typedef struct
+{
+ uint8_t preamble_index;
+ uint16_t timing_advance;
+ uint32_t preamble_pwr;
+
+} nfapi_nr_prach_indication_preamble_t;
+
+typedef struct{
+ uint16_t phy_cell_id;
+ uint8_t symbol_index;
+ uint8_t slot_index;
+ uint8_t freq_index;
+ uint8_t avg_rssi;
+ uint8_t avg_snr;
+ uint8_t num_preamble;
+ nfapi_nr_prach_indication_preamble_t* preamble_list;
+
+}nfapi_nr_prach_indication_pdu_t;
+
+typedef struct
+{
+ uint16_t sfn;
+ uint16_t slot;
+ uint8_t number_of_pdus;
+ nfapi_nr_prach_indication_pdu_t* pdu_list;
+
+} nfapi_nr_rach_indication_t;
+
+#endif
diff --git a/nfapi/open-nFAPI/vnf/public_inc/nfapi_vnf_interface.h b/nfapi/open-nFAPI/vnf/public_inc/nfapi_vnf_interface.h
index 5d463afdae..5abf6b75c3 100644
--- a/nfapi/open-nFAPI/vnf/public_inc/nfapi_vnf_interface.h
+++ b/nfapi/open-nFAPI/vnf/public_inc/nfapi_vnf_interface.h
@@ -18,7 +18,8 @@
#define _NFAPI_VNF_INTERFACE_H_
#include "nfapi_interface.h"
-#include "nfapi_nr_interface.h"
+#include "nfapi_nr_interface_scf.h"
+
#include "debug.h"
#include "netinet/in.h"
@@ -938,7 +939,7 @@ int nfapi_vnf_p7_del_pnf(nfapi_vnf_p7_config_t* config, int phy_id);
* may be released after this function call has returned or at a later pointer
*/
int nfapi_vnf_p7_dl_config_req(nfapi_vnf_p7_config_t* config, nfapi_dl_config_request_t* req);
-int nfapi_vnf_p7_nr_dl_config_req(nfapi_vnf_p7_config_t* config, nfapi_nr_dl_config_request_t* req);
+int nfapi_vnf_p7_nr_dl_config_req(nfapi_vnf_p7_config_t* config, nfapi_nr_dl_tti_request_t* req);
/*! Send the UL_CONFIG.request
* \param config A pointer to the vnf p7 configuration
diff --git a/nfapi/open-nFAPI/vnf/src/vnf_p7_interface.c b/nfapi/open-nFAPI/vnf/src/vnf_p7_interface.c
index 8b60122483..35bd5e4c1b 100644
--- a/nfapi/open-nFAPI/vnf/src/vnf_p7_interface.c
+++ b/nfapi/open-nFAPI/vnf/src/vnf_p7_interface.c
@@ -482,7 +482,7 @@ int nfapi_vnf_p7_dl_config_req(nfapi_vnf_p7_config_t* config, nfapi_dl_config_re
return vnf_p7_pack_and_send_p7_msg(vnf_p7, &req->header);
}
-int nfapi_vnf_p7_nr_dl_config_req(nfapi_vnf_p7_config_t* config, nfapi_nr_dl_config_request_t* req)
+int nfapi_vnf_p7_nr_dl_config_req(nfapi_vnf_p7_config_t* config, nfapi_nr_dl_tti_request_t* req)
{
//NFAPI_TRACE(NFAPI_TRACE_INFO, "%s(config:%p req:%p)\n", __FUNCTION__, config, req);
diff --git a/openair1/PHY/CODING/TESTBENCH/polartest.c b/openair1/PHY/CODING/TESTBENCH/polartest.c
index 051e098187..36b6bbf826 100644
--- a/openair1/PHY/CODING/TESTBENCH/polartest.c
+++ b/openair1/PHY/CODING/TESTBENCH/polartest.c
@@ -241,8 +241,8 @@ if (logFlag){
start_meas(&timeEncoder);
if (decoder_int16==1) {
- polar_encoder_fast((uint64_t *)testInput, encoderOutput, 0, currentPtr);
- //polar_encoder_fast((uint64_t*)testInput, (uint64_t*)encoderOutput,0, currentPtr);
+ polar_encoder_fast((uint64_t *)testInput, encoderOutput, 0, 0, currentPtr);
+ //polar_encoder_fast((uint64_t*)testInput, (uint64_t*)encoderOutput,0,0,currentPtr);
} else { //0 --> PBCH, 1 --> DCI, -1 --> UCI
if (polarMessageType == 0)
polar_encoder(testInput, encoderOutput, currentPtr);
@@ -278,7 +278,7 @@ if (logFlag){
start_meas(&timeDecoder);
if (decoder_int16==1) {
- decoderState = polar_decoder_int16(channelOutput_int16, (uint64_t *)estimatedOutput, currentPtr);
+ decoderState = polar_decoder_int16(channelOutput_int16, (uint64_t *)estimatedOutput, 0, currentPtr);
} else { //0 --> PBCH, 1 --> DCI, -1 --> UCI
if (polarMessageType == 0) {
decoderState = polar_decoder(channelOutput,
diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder.c
index a225730845..6ded22d8ca 100644
--- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder.c
+++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder.c
@@ -46,7 +46,7 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh
short *Gen_shift_values=choose_generator_matrix(BG,Zc);
short *no_shift_values, *pointer_shift_values;
int no_punctured_columns;
- short nrows,ncols;
+ short nrows,ncols,rate=3;
int i1,i2,i3,i4,i5,temp_prime;
unsigned char channel_temp,temp;
@@ -56,6 +56,7 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh
pointer_shift_values=(short *) pointer_shift_values_BG1;
nrows=46; //parity check bits
ncols=22; //info bits
+ rate=3;
}
else if (BG==2)
{
@@ -63,6 +64,7 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh
pointer_shift_values=(short *) pointer_shift_values_BG2;
nrows=42; //parity check bits
ncols=10; //info bits
+ rate=5;
}
else {
printf("problem with BG\n");
@@ -70,7 +72,7 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh
}
- no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
+ no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
//printf("no_punctured_columns = %d\n",no_punctured_columns);
diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
index 2b6d1b07a3..fb516549ed 100644
--- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
+++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
@@ -202,7 +202,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,in
{
short nrows=0,ncols=0;
- int i,i1;
+ int i,i1,rate=3;
int no_punctured_columns,removed_bit;
int simd_size;
@@ -214,6 +214,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,in
//BG=1;
nrows=46; //parity check bits
ncols=22; //info bits
+ rate=3;
}
//else if (block_length<=3840)
else if (BG==2)
@@ -221,6 +222,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,in
//BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
+ rate=5;
}
@@ -239,8 +241,8 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,in
unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c
// calculate number of punctured bits
- no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
- removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length*3);
+ no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
+ removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length*rate);
// printf("%d\n",no_punctured_columns);
// printf("%d\n",removed_bit);
// unpack input
@@ -297,7 +299,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
{
short nrows=0,ncols=0;
- int i,i1,j;
+ int i,i1,j,rate=3;
int no_punctured_columns,removed_bit;
char temp;
int simd_size;
@@ -326,6 +328,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
{
nrows=46; //parity check bits
ncols=22; //info bits
+ rate=3;
}
//else if (block_length<=3840)
else if (BG==2)
@@ -333,7 +336,8 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
//BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
-
+ rate=5;
+
}
#ifdef DEBUG_LDPC
@@ -352,8 +356,8 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c
// calculate number of punctured bits
- no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
- removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length*3);
+ no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
+ removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length*rate);
// printf("%d\n",no_punctured_columns);
// printf("%d\n",removed_bit);
// unpack input
@@ -473,7 +477,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
{
short nrows=0,ncols=0;
- int i,i1,j;
+ int i,i1,j,rate=3;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
char temp;
@@ -509,11 +513,13 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
{
nrows=46; //parity check bits
ncols=22; //info bits
+ rate=3;
}
else if (BG==2)
{
nrows=42; //parity check bits
ncols=10; // info bits
+ rate=5;
}
#ifdef DEBUG_LDPC
@@ -532,10 +538,10 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c
// calculate number of punctured bits
- no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
- removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length*3);
- // printf("%d\n",no_punctured_columns);
- // printf("%d\n",removed_bit);
+ no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
+ removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length*rate);
+ //printf("%d\n",no_punctured_columns);
+ //printf("%d\n",removed_bit);
// unpack input
memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc);
diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
index 235badc2e0..5da223dc64 100644
--- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
+++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
@@ -373,7 +373,7 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,int
int i,i1,i2,i3,i4,i5,temp_prime,var;
- int no_punctured_columns,removed_bit;
+ int no_punctured_columns,removed_bit,rate=3;
int nind=0;
int indlist[1000];
int indlist2[1000];
@@ -384,6 +384,7 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,int
{
nrows=46; //parity check bits
ncols=22; //info bits
+ rate=3;
}
//else if (block_length<=3840)
else if (BG==2)
@@ -391,7 +392,7 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,int
//BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
-
+ rate=5;
}
Gen_shift_values=choose_generator_matrix(BG,Zc);
@@ -417,8 +418,8 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,int
AssertFatal(0,"BG %d is not supported yet\n",BG);
}
- no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
- removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*3);
+ no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
+ removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*rate);
//printf("%d\n",no_punctured_columns);
//printf("%d\n",removed_bit);
// unpack input
diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
index a847072a4c..7ec530242e 100644
--- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
+++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
@@ -601,6 +601,7 @@ void init_polar_deinterleaver_table(t_nrPolar_params *polarParams) {
uint32_t polar_decoder_int16(int16_t *input,
uint64_t *out,
+ uint8_t ones_flag,
const t_nrPolar_params *polarParams)
{
int16_t d_tilde[polarParams->N];// = malloc(sizeof(double) * polarParams->N);
@@ -650,28 +651,42 @@ uint32_t polar_decoder_int16(int16_t *input,
uint64_t Ar = 0;
AssertFatal(len<65,"A must be less than 65 bits\n");
+ // appending 24 ones before a0 for DCI as stated in 38.212 7.3.2
+ uint8_t offset = 0;
+ if (ones_flag) offset = 3;
+
if (len<=32) {
Ar = (uint32_t)(B[0]>>crclen);
- uint8_t A32_flip[4];
+ uint8_t A32_flip[4+offset];
+ if (ones_flag) {
+ A32_flip[0] = 0xff;
+ A32_flip[1] = 0xff;
+ A32_flip[2] = 0xff;
+ }
uint32_t Aprime= (uint32_t)(Ar<<(32-len));
- A32_flip[0]=((uint8_t *)&Aprime)[3];
- A32_flip[1]=((uint8_t *)&Aprime)[2];
- A32_flip[2]=((uint8_t *)&Aprime)[1];
- A32_flip[3]=((uint8_t *)&Aprime)[0];
- crc = (uint64_t)(crc24c(A32_flip,len)>>8);
+ A32_flip[0+offset]=((uint8_t *)&Aprime)[3];
+ A32_flip[1+offset]=((uint8_t *)&Aprime)[2];
+ A32_flip[2+offset]=((uint8_t *)&Aprime)[1];
+ A32_flip[3+offset]=((uint8_t *)&Aprime)[0];
+ crc = (uint64_t)(crc24c(A32_flip,8*offset+len)>>8);
} else if (len<=64) {
Ar = (B[0]>>crclen) | (B[1]<<(64-crclen));;
- uint8_t A64_flip[8];
- uint64_t Aprime= (uint32_t)(Ar<<(64-len));
- A64_flip[0]=((uint8_t *)&Aprime)[7];
- A64_flip[1]=((uint8_t *)&Aprime)[6];
- A64_flip[2]=((uint8_t *)&Aprime)[5];
- A64_flip[3]=((uint8_t *)&Aprime)[4];
- A64_flip[4]=((uint8_t *)&Aprime)[3];
- A64_flip[5]=((uint8_t *)&Aprime)[2];
- A64_flip[6]=((uint8_t *)&Aprime)[1];
- A64_flip[7]=((uint8_t *)&Aprime)[0];
- crc = (uint64_t)(crc24c(A64_flip,len)>>8);
+ uint8_t A64_flip[8+offset];
+ if (ones_flag) {
+ A64_flip[0] = 0xff;
+ A64_flip[1] = 0xff;
+ A64_flip[2] = 0xff;
+ }
+ uint64_t Aprime= (uint64_t)(Ar<<(64-len));
+ A64_flip[0+offset]=((uint8_t *)&Aprime)[7];
+ A64_flip[1+offset]=((uint8_t *)&Aprime)[6];
+ A64_flip[2+offset]=((uint8_t *)&Aprime)[5];
+ A64_flip[3+offset]=((uint8_t *)&Aprime)[4];
+ A64_flip[4+offset]=((uint8_t *)&Aprime)[3];
+ A64_flip[5+offset]=((uint8_t *)&Aprime)[2];
+ A64_flip[6+offset]=((uint8_t *)&Aprime)[1];
+ A64_flip[7+offset]=((uint8_t *)&Aprime)[0];
+ crc = (uint64_t)(crc24c(A64_flip,8*offset+len)>>8);
}
#if 0
diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h b/openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
index 493b43ee74..a130484c8e 100644
--- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
+++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
@@ -148,6 +148,7 @@ void polar_encoder_dci(uint32_t *in,
void polar_encoder_fast(uint64_t *A,
uint32_t *out,
int32_t crcmask,
+ uint8_t ones_flag,
t_nrPolar_params *polarParams);
int8_t polar_decoder(double *input,
@@ -157,6 +158,7 @@ int8_t polar_decoder(double *input,
uint32_t polar_decoder_int16(int16_t *input,
uint64_t *out,
+ uint8_t ones_flag,
const t_nrPolar_params *polarParams);
int8_t polar_decoder_dci(double *input,
diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
index df9b53a8b0..8e4b45f744 100644
--- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
+++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
@@ -410,6 +410,7 @@ void build_polar_tables(t_nrPolar_params *polarParams) {
void polar_encoder_fast(uint64_t *A,
uint32_t *out,
int32_t crcmask,
+ uint8_t ones_flag,
t_nrPolar_params *polarParams) {
AssertFatal(polarParams->K > 32, "K = %d < 33, is not supported yet\n",polarParams->K);
AssertFatal(polarParams->K < 129, "K = %d > 128, is not supported yet\n",polarParams->K);
@@ -421,6 +422,10 @@ void polar_encoder_fast(uint64_t *A,
AssertFatal(polarParams->crcParityBits == 24,"support for 24-bit crc only for now\n");
//int bitlen0=bitlen;
uint64_t tcrc=0;
+ uint8_t offset = 0;
+
+ // appending 24 ones before a0 for DCI as stated in 38.212 7.3.2
+ if (ones_flag) offset = 3;
// A bit string should be stored as 0, 0, ..., 0, a'_0, a'_1, ..., a'_A-1,
//???a'_{N-1} a'_{N-2} ... a'_{N-A} 0 .... 0, where N=64,128,192,..., N is smallest multiple of 64 greater than or equal to A
@@ -428,38 +433,53 @@ void polar_encoder_fast(uint64_t *A,
// First flip A bitstring byte endian for CRC routines (optimized for DLSCH/ULSCH, not PBCH/PDCCH)
// CRC reads in each byte in bit positions 7 down to 0, for PBCH/PDCCH we need to read in a_{A-1} down to a_{0}, A = length of bit string (e.g. 32 for PBCH)
if (bitlen<=32) {
- uint8_t A32_flip[4];
+ uint8_t A32_flip[4+offset];
+ if (ones_flag) {
+ A32_flip[0] = 0xff;
+ A32_flip[1] = 0xff;
+ A32_flip[2] = 0xff;
+ }
uint32_t Aprime= (uint32_t)(((uint32_t)*A)<<(32-bitlen));
- A32_flip[0]=((uint8_t *)&Aprime)[3];
- A32_flip[1]=((uint8_t *)&Aprime)[2];
- A32_flip[2]=((uint8_t *)&Aprime)[1];
- A32_flip[3]=((uint8_t *)&Aprime)[0];
- tcrc = (uint64_t)((crcmask^(crc24c(A32_flip,bitlen)>>8)));
+ A32_flip[0+offset]=((uint8_t *)&Aprime)[3];
+ A32_flip[1+offset]=((uint8_t *)&Aprime)[2];
+ A32_flip[2+offset]=((uint8_t *)&Aprime)[1];
+ A32_flip[3+offset]=((uint8_t *)&Aprime)[0];
+ tcrc = (uint64_t)((crcmask^(crc24c(A32_flip,8*offset+bitlen)>>8)));
} else if (bitlen<=64) {
- uint8_t A64_flip[8];
- uint64_t Aprime= (uint32_t)(((uint64_t)*A)<<(64-bitlen));
- A64_flip[0]=((uint8_t *)&Aprime)[7];
- A64_flip[1]=((uint8_t *)&Aprime)[6];
- A64_flip[2]=((uint8_t *)&Aprime)[5];
- A64_flip[3]=((uint8_t *)&Aprime)[4];
- A64_flip[4]=((uint8_t *)&Aprime)[3];
- A64_flip[5]=((uint8_t *)&Aprime)[2];
- A64_flip[6]=((uint8_t *)&Aprime)[1];
- A64_flip[7]=((uint8_t *)&Aprime)[0];
- tcrc = (uint64_t)((crcmask^(crc24c(A64_flip,bitlen)>>8)));
+ uint8_t A64_flip[8+offset];
+ if (ones_flag) {
+ A64_flip[0] = 0xff;
+ A64_flip[1] = 0xff;
+ A64_flip[2] = 0xff;
+ }
+ uint64_t Aprime= (uint64_t)(((uint64_t)*A)<<(64-bitlen));
+ A64_flip[0+offset]=((uint8_t *)&Aprime)[7];
+ A64_flip[1+offset]=((uint8_t *)&Aprime)[6];
+ A64_flip[2+offset]=((uint8_t *)&Aprime)[5];
+ A64_flip[3+offset]=((uint8_t *)&Aprime)[4];
+ A64_flip[4+offset]=((uint8_t *)&Aprime)[3];
+ A64_flip[5+offset]=((uint8_t *)&Aprime)[2];
+ A64_flip[6+offset]=((uint8_t *)&Aprime)[1];
+ A64_flip[7+offset]=((uint8_t *)&Aprime)[0];
+ tcrc = (uint64_t)((crcmask^(crc24c(A64_flip,8*offset+bitlen)>>8)));
}
else if (bitlen<=128) {
- uint8_t A128_flip[16];
- uint128_t Aprime= (uint32_t)(((uint128_t)*A)<<(128-bitlen));
- A128_flip[0]=((uint8_t*)&Aprime)[15]; A128_flip[1]=((uint8_t*)&Aprime)[14];
- A128_flip[2]=((uint8_t*)&Aprime)[13]; A128_flip[3]=((uint8_t*)&Aprime)[12];
- A128_flip[4]=((uint8_t*)&Aprime)[11]; A128_flip[5]=((uint8_t*)&Aprime)[10];
- A128_flip[6] =((uint8_t*)&Aprime)[9]; A128_flip[7] =((uint8_t*)&Aprime)[8];
- A128_flip[8] =((uint8_t*)&Aprime)[7]; A128_flip[9] =((uint8_t*)&Aprime)[6];
- A128_flip[10]=((uint8_t*)&Aprime)[5]; A128_flip[11]=((uint8_t*)&Aprime)[4];
- A128_flip[12]=((uint8_t*)&Aprime)[3]; A128_flip[13]=((uint8_t*)&Aprime)[2];
- A128_flip[14]=((uint8_t*)&Aprime)[1]; A128_flip[15]=((uint8_t*)&Aprime)[0];
- tcrc = (uint64_t)((crcmask^(crc24c(A128_flip,bitlen)>>8)));
+ uint8_t A128_flip[16+offset];
+ if (ones_flag) {
+ A128_flip[0] = 0xff;
+ A128_flip[1] = 0xff;
+ A128_flip[2] = 0xff;
+ }
+ uint128_t Aprime= (uint128_t)(((uint128_t)*A)<<(128-bitlen));
+ A128_flip[0+offset]=((uint8_t*)&Aprime)[15]; A128_flip[1+offset]=((uint8_t*)&Aprime)[14];
+ A128_flip[2+offset]=((uint8_t*)&Aprime)[13]; A128_flip[3+offset]=((uint8_t*)&Aprime)[12];
+ A128_flip[4+offset]=((uint8_t*)&Aprime)[11]; A128_flip[5+offset]=((uint8_t*)&Aprime)[10];
+ A128_flip[6+offset] =((uint8_t*)&Aprime)[9]; A128_flip[7+offset] =((uint8_t*)&Aprime)[8];
+ A128_flip[8+offset] =((uint8_t*)&Aprime)[7]; A128_flip[9+offset] =((uint8_t*)&Aprime)[6];
+ A128_flip[10+offset]=((uint8_t*)&Aprime)[5]; A128_flip[11+offset]=((uint8_t*)&Aprime)[4];
+ A128_flip[12+offset]=((uint8_t*)&Aprime)[3]; A128_flip[13+offset]=((uint8_t*)&Aprime)[2];
+ A128_flip[14+offset]=((uint8_t*)&Aprime)[1]; A128_flip[15+offset]=((uint8_t*)&Aprime)[0];
+ tcrc = (uint64_t)((crcmask^(crc24c(A128_flip,8*offset+bitlen)>>8)));
}
int n;
@@ -473,7 +493,6 @@ void polar_encoder_fast(uint64_t *A,
//??? b_{N'-1} b_{N'-2} ... b_{N'-A} b_{N'-A-1} ... b_{N'-A-Nparity} = a_{N-1} a_{N-2} ... a_{N-A} p_{N_parity-1} ... p_0
-
for (n=0; ncrcParityBits) | tcrc;
else B[n] = (A[n] << polarParams->crcParityBits) | (A[n-1]>>(64-polarParams->crcParityBits));
diff --git a/openair1/PHY/INIT/nr_init.c b/openair1/PHY/INIT/nr_init.c
index 61bbfc3cef..0754d4b1c7 100644
--- a/openair1/PHY/INIT/nr_init.c
+++ b/openair1/PHY/INIT/nr_init.c
@@ -78,7 +78,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
unsigned char abstraction_flag) {
// shortcuts
NR_DL_FRAME_PARMS *const fp = &gNB->frame_parms;
- nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
+ nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PRACH *const prach_vars = &gNB->prach_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
@@ -129,7 +129,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
}
- nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
+ nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
//PDSCH DMRS init
gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
@@ -150,7 +150,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
}
- nr_init_pdsch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
+ nr_init_pdsch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
/// Transport init necessary for NR synchro
init_nr_transport(gNB);
@@ -198,6 +198,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
prach_vars->rxsigF = (int16_t *)malloc16_clear( 1024*2*sizeof(int16_t) );
prach_vars->prach_ifft = (int32_t *)malloc16_clear(1024*2*sizeof(int32_t));
+ int N_RB_UL = cfg->carrier_config.ul_grid_size[cfg->ssb_config.scs_common.value].value;
for (int ULSCH_id=0; ULSCH_idrho = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) );
for (i=0; inb_antennas_rx; i++) {
- pusch_vars[ULSCH_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
- pusch_vars[ULSCH_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
- pusch_vars[ULSCH_id]->ul_ch_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
- pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
+ pusch_vars[ULSCH_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
+ pusch_vars[ULSCH_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
+ pusch_vars[ULSCH_id]->ul_ch_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
+ pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates_time[i] = (int32_t *)malloc16_clear( 2*sizeof(int32_t)*fp->ofdm_symbol_size );
- pusch_vars[ULSCH_id]->rxdataF_comp[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
- pusch_vars[ULSCH_id]->ul_ch_mag0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
- pusch_vars[ULSCH_id]->ul_ch_magb0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
- pusch_vars[ULSCH_id]->ul_ch_mag[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
- pusch_vars[ULSCH_id]->ul_ch_magb[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
+ pusch_vars[ULSCH_id]->rxdataF_comp[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
+ pusch_vars[ULSCH_id]->ul_ch_mag0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
+ pusch_vars[ULSCH_id]->ul_ch_magb0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
+ pusch_vars[ULSCH_id]->ul_ch_mag[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
+ pusch_vars[ULSCH_id]->ul_ch_magb[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_UL*12*7*2) );
}
@@ -237,54 +238,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
gNB->pdsch_config_dedicated->p_a = dB0; //defaul value until overwritten by RRCConnectionReconfiguration
return (0);
}
-/*
-void phy_config_request(PHY_Config_t *phy_config) {
-
- uint8_t Mod_id = phy_config->Mod_id;
- int CC_id = phy_config->CC_id;
- nfapi_nr_config_request_t *cfg = phy_config->cfg;
-
- NR_DL_FRAME_PARMS *fp;
- PHICH_RESOURCE_t phich_resource_table[4]={oneSixth,half,one,two};
- int eutra_band = cfg->nfapi_config.rf_bands.rf_band[0];
- int dl_Bandwidth = cfg->rf_config.dl_carrier_bandwidth.value;
- int ul_Bandwidth = cfg->rf_config.ul_carrier_bandwidth.value;
- int Nid_cell = cfg->sch_config.physical_cell_id.value;
- int Ncp = cfg->subframe_config.dl_cyclic_prefix_type.value;
- int p_eNB = cfg->rf_config.tx_antenna_ports.value;
- uint32_t dl_CarrierFreq = cfg->nfapi_config.earfcn.value;
-
- LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,gNB_tx_antenna_ports %d,Ncp %d,DL freq %u)\n",
- Mod_id, CC_id, eutra_band, dl_Bandwidth, ul_Bandwidth, Nid_cell, p_eNB,Ncp,dl_CarrierFreq );
-
- AssertFatal(RC.gNB != NULL, "PHY instance pointer doesn't exist\n");
- AssertFatal(RC.gNB[Mod_id] != NULL, "PHY instance %d doesn't exist\n",Mod_id);
- AssertFatal(RC.gNB[Mod_id][CC_id] != NULL, "PHY instance %d, CCid %d doesn't exist\n",Mod_id,CC_id);
-
-
- if (RC.gNB[Mod_id][CC_id]->configured == 1)
- {
- LOG_E(PHY,"Already eNB already configured, do nothing\n");
- return;
- }
-
- RC.gNB[Mod_id][CC_id]->mac_enabled = 1;
-
- fp = &RC.gNB[Mod_id][CC_id]->frame_parms;
-
- fp->threequarter_fs = 0;
-
- nr_init_frame_parms(fp,1);
-
- RC.gNB[Mod_id][CC_id]->configured = 1;
- LOG_I(PHY,"gNB %d/%d configured\n",Mod_id,CC_id);
-}*/
-
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
//NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
- //nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
@@ -375,21 +332,21 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,
uint64_t position_in_burst)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
- nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config;
+ nfapi_nr_config_request_scf_t *gNB_config = &gNB->gNB_config;
//overwrite for new NR parameters
- gNB_config->nfapi_config.rf_bands.rf_band[0] = 78;
- gNB_config->nfapi_config.nrarfcn.value = 620000;
- gNB_config->subframe_config.numerology_index_mu.value = mu;
- gNB_config->subframe_config.duplex_mode.value = TDD;
- gNB_config->rf_config.dl_carrier_bandwidth.value = N_RB_DL;
- gNB_config->rf_config.ul_carrier_bandwidth.value = N_RB_UL;
- gNB_config->sch_config.half_frame_index.value = 0;
- gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
- gNB_config->sch_config.n_ssb_crb.value = (N_RB_DL-20);
- gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
- gNB_config->sch_config.physical_cell_id.value = Nid_cell;
- gNB_config->sch_config.ssb_scg_position_in_burst.value = position_in_burst;
- gNB_config->subframe_config.dl_cyclic_prefix_type.value = (fp->Ncp == NORMAL) ? NFAPI_CP_NORMAL : NFAPI_CP_EXTENDED;
+
+ gNB_config->cell_config.phy_cell_id.value = Nid_cell;
+ gNB_config->ssb_config.scs_common.value = mu;
+ gNB_config->ssb_table.ssb_subcarrier_offset.value = 0;
+ gNB_config->ssb_table.ssb_offset_point_a.value = (N_RB_DL-20);
+ gNB_config->ssb_table.ssb_mask_list[0].ssb_mask.value = position_in_burst;
+ gNB_config->ssb_table.ssb_mask_list[1].ssb_mask.value = position_in_burst>>32;
+ gNB_config->cell_config.frame_duplex_type.value = TDD;
+ gNB_config->ssb_table.ssb_period.value = 1; //10ms
+ gNB_config->carrier_config.dl_grid_size[mu].value = N_RB_DL;
+ gNB_config->carrier_config.ul_grid_size[mu].value = N_RB_UL;
+
+ //gNB_config->subframe_config.dl_cyclic_prefix_type.value = (fp->Ncp == NORMAL) ? NFAPI_CP_NORMAL : NFAPI_CP_EXTENDED;
gNB->mac_enabled = 1;
fp->dl_CarrierFreq = 3500000000;//from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
@@ -402,45 +359,53 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,
void nr_phy_config_request(NR_PHY_Config_t *phy_config) {
- uint8_t Mod_id = phy_config->Mod_id;
+ uint8_t Mod_id = phy_config->Mod_id;
int return_tdd;
- NR_DL_FRAME_PARMS *fp = &RC.gNB[Mod_id]->frame_parms;
- nfapi_nr_config_request_t *gNB_config = &RC.gNB[Mod_id]->gNB_config;
- gNB_config->nfapi_config.rf_bands.rf_band[0] = phy_config->cfg->nfapi_config.rf_bands.rf_band[0]; //22
- gNB_config->nfapi_config.nrarfcn.value = phy_config->cfg->nfapi_config.nrarfcn.value; //6600
- gNB_config->subframe_config.numerology_index_mu.value = phy_config->cfg->subframe_config.numerology_index_mu.value;//1
- gNB_config->rf_config.dl_carrier_bandwidth.value = phy_config->cfg->rf_config.dl_carrier_bandwidth.value;//106;
- gNB_config->rf_config.ul_carrier_bandwidth.value = phy_config->cfg->rf_config.ul_carrier_bandwidth.value;//106;
- gNB_config->sch_config.half_frame_index.value = 0;
- gNB_config->sch_config.ssb_subcarrier_offset.value = phy_config->cfg->sch_config.ssb_subcarrier_offset.value;//0;
- gNB_config->sch_config.n_ssb_crb.value = (phy_config->cfg->rf_config.dl_carrier_bandwidth.value-20);
- gNB_config->sch_config.physical_cell_id.value = phy_config->cfg->sch_config.physical_cell_id.value;
- gNB_config->sch_config.ssb_scg_position_in_burst.value= phy_config->cfg->sch_config.ssb_scg_position_in_burst.value;
- gNB_config->sch_config.ssb_periodicity.value = phy_config->cfg->sch_config.ssb_periodicity.value;
-
+ NR_DL_FRAME_PARMS *fp = &RC.gNB[Mod_id]->frame_parms;
+ nfapi_nr_config_request_scf_t *gNB_config = &RC.gNB[Mod_id]->gNB_config;
- if (phy_config->cfg->subframe_config.duplex_mode.value == 0) {
- gNB_config->subframe_config.duplex_mode.value = FDD;
- } else {
- gNB_config->subframe_config.duplex_mode.value = TDD;
+ gNB_config->cell_config.phy_cell_id.value = phy_config->cfg->cell_config.phy_cell_id.value;
+ gNB_config->carrier_config.dl_frequency.value = phy_config->cfg->carrier_config.dl_frequency.value;
+ gNB_config->carrier_config.uplink_frequency.value = phy_config->cfg->carrier_config.uplink_frequency.value;
+ gNB_config->ssb_config.scs_common.value = phy_config->cfg->ssb_config.scs_common.value;
+ gNB_config->carrier_config.dl_bandwidth.value = phy_config->cfg->carrier_config.dl_bandwidth.value;
+ gNB_config->carrier_config.uplink_bandwidth.value = phy_config->cfg->carrier_config.uplink_bandwidth.value;
+ gNB_config->ssb_table.ssb_subcarrier_offset.value = phy_config->cfg->ssb_table.ssb_subcarrier_offset.value;
+ gNB_config->ssb_table.ssb_offset_point_a.value = phy_config->cfg->ssb_table.ssb_offset_point_a.value;
+ gNB_config->ssb_table.ssb_mask_list[0].ssb_mask.value = phy_config->cfg->ssb_table.ssb_mask_list[0].ssb_mask.value;
+ gNB_config->ssb_table.ssb_mask_list[1].ssb_mask.value = phy_config->cfg->ssb_table.ssb_mask_list[1].ssb_mask.value;
+ gNB_config->ssb_table.ssb_period.value = phy_config->cfg->ssb_table.ssb_period.value;
+ for (int i=0; i<5; i++) {
+ gNB_config->carrier_config.dl_grid_size[i].value = phy_config->cfg->carrier_config.dl_grid_size[i].value;
+ gNB_config->carrier_config.ul_grid_size[i].value = phy_config->cfg->carrier_config.ul_grid_size[i].value;
+ gNB_config->carrier_config.dl_k0[i].value = phy_config->cfg->carrier_config.dl_k0[i].value;
+ gNB_config->carrier_config.ul_k0[i].value = phy_config->cfg->carrier_config.ul_k0[i].value;
}
- memcpy((void*)&gNB_config->rach_config,(void*)&phy_config->cfg->rach_config,sizeof(phy_config->cfg->rach_config));
+
+ if (phy_config->cfg->cell_config.frame_duplex_type.value == 0) {
+ gNB_config->cell_config.frame_duplex_type.value = FDD;
+ } else {
+ gNB_config->cell_config.frame_duplex_type.value = TDD;
+ }
+
+ memcpy((void*)&gNB_config->prach_config,(void*)&phy_config->cfg->prach_config,sizeof(phy_config->cfg->prach_config));
memcpy((void*)&gNB_config->tdd_ul_dl_config,(void*)&phy_config->cfg->tdd_ul_dl_config,sizeof(phy_config->cfg->tdd_ul_dl_config));
RC.gNB[Mod_id]->mac_enabled = 1;
- fp->dl_CarrierFreq = from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
+ fp->dl_CarrierFreq = (gNB_config->carrier_config.dl_frequency.value)*1e3 + (gNB_config->carrier_config.dl_bandwidth.value)*5e5;
- fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_nr_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
- // get_band(fp->dl_CarrierFreq, &gNB_config->nfapi_config.rf_bands.rf_band[0], &uplink_frequency_offset[CC_id][0], &fp->frame_type);
- // fp->ul_CarrierFreq = fp->dl_CarrierFreq + uplink_frequency_offset[CC_id][0];
- fp->threequarter_fs = openair0_cfg[0].threequarter_fs;
- LOG_I(PHY,"Configuring MIB for instance %d, : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,DL freq %llu, UL freq %llu)\n",
+ int32_t dlul_offset = 0;
+ lte_frame_type_t frame_type = 0;
+
+ get_band(fp->dl_CarrierFreq,&fp->eutra_band,&dlul_offset,&frame_type);
+
+ fp->ul_CarrierFreq = (gNB_config->carrier_config.uplink_frequency.value)*1e3 + (gNB_config->carrier_config.uplink_bandwidth.value)*5e5;
+
+ fp->threequarter_fs = openair0_cfg[0].threequarter_fs;
+ LOG_I(PHY,"Configuring MIB for instance %d, : (Nid_cell %d,DL freq %llu, UL freq %llu)\n",
Mod_id,
- gNB_config->nfapi_config.rf_bands.rf_band[0],
- gNB_config->rf_config.dl_carrier_bandwidth.value,
- gNB_config->rf_config.ul_carrier_bandwidth.value,
- gNB_config->sch_config.physical_cell_id.value,
+ gNB_config->cell_config.phy_cell_id.value,
(unsigned long long)fp->dl_CarrierFreq,
(unsigned long long)fp->ul_CarrierFreq);
@@ -475,15 +440,16 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
int i;
int j;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
- nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
+ nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
LOG_I(PHY, "Initialise nr transport\n");
+ uint16_t grid_size = cfg->carrier_config.dl_grid_size[fp->numerology_index].value;
for (i=0; idlsch[i][j] = new_gNB_dlsch(1,16,NSOFT,0,fp,cfg);
+ gNB->dlsch[i][j] = new_gNB_dlsch(fp,1,16,NSOFT,0,grid_size);
if (!gNB->dlsch[i][j]) {
LOG_E(PHY,"Can't get gNB dlsch structures for UE %d \n", i);
@@ -500,24 +466,15 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
LOG_I(PHY,"Allocating Transport Channel Buffer for ULSCH, UE %d\n",i);
for (j=0; j<2; j++) {
- // ULSCH for RA
- if(i==0) {
- gNB->ulsch[i][j] = new_gNB_ulsch(MAX_LDPC_ITERATIONS, fp->N_RB_UL, 0);
-
- if (!gNB->ulsch[i][j]) {
- LOG_E(PHY,"Can't get gNB ulsch structures\n");
- exit(-1);
- }
- }
-
// ULSCH for data
- gNB->ulsch[i+1][j] = new_gNB_ulsch(MAX_LDPC_ITERATIONS, fp->N_RB_UL, 0);
+ gNB->ulsch[i][j] = new_gNB_ulsch(MAX_LDPC_ITERATIONS, fp->N_RB_UL, 0);
- if (!gNB->ulsch[i+1][j]) {
+ if (!gNB->ulsch[i][j]) {
LOG_E(PHY,"Can't get gNB ulsch structures\n");
exit(-1);
}
+ /*
LOG_I(PHY,"Initializing nFAPI for ULSCH, UE %d\n",i);
// [hna] added here for RT implementation
uint8_t harq_pid = 0;
@@ -537,13 +494,10 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
rel15_ul->ulsch_pdu_rel15.rv = 0;
rel15_ul->ulsch_pdu_rel15.n_layers = 1;
///////////////////////////////////////////////////
+ */
- //////////////////////////////////////////////////////////////////////////
}
- // this is the transmission mode for the signalling channels
- // this will be overwritten with the real transmission mode by the RRC once the UE is connected
- //gNB->transmission_mode[i] = fp->nb_antenna_ports_gNB==1 ? 1 : 2;
}
gNB->rx_total_gain_dB=130;
diff --git a/openair1/PHY/INIT/nr_parms.c b/openair1/PHY/INIT/nr_parms.c
index 81785872f9..52ce14cac8 100644
--- a/openair1/PHY/INIT/nr_parms.c
+++ b/openair1/PHY/INIT/nr_parms.c
@@ -27,10 +27,11 @@ uint32_t nr_subcarrier_spacing[MAX_NUM_SUBCARRIER_SPACING] = {15e3, 30e3, 60e3,
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 16, 32};
-int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_frame_index)
+int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb)
{
int mu = fp->numerology_index;
+ uint8_t half_frame_index = fp->half_frame_bit;
int symbol = 0;
uint8_t n, n_temp;
nr_ssb_type_e type = fp->ssb_type;
@@ -79,16 +80,14 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_f
return symbol;
}
-int nr_is_ssb_slot(nfapi_nr_config_request_t *cfg, int slot)
+int nr_is_ssb_slot(uint8_t n_hf, uint8_t period, int slot)
{
- uint8_t n_hf;
+
int rel_slot;
- n_hf = cfg->sch_config.half_frame_index.value;
-
// if SSB periodicity is 5ms, they are transmitted in both half frames
- if ( cfg->sch_config.ssb_periodicity.value == 5) {
+ if ( period == 0) {
if (slot<10)
n_hf=0;
else
@@ -122,6 +121,7 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
+ fp->half_frame_bit = 0; // half frame bit initialized to 0 here
fp->numerology_index = mu;
fp->Ncp = Ncp;
fp->N_RB_DL = N_RB_DL;
@@ -277,17 +277,17 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
return 0;
}
-int nr_init_frame_parms(nfapi_nr_config_request_t* config,
+int nr_init_frame_parms(nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *fp)
{
- fp->eutra_band = config->nfapi_config.rf_bands.rf_band[0];
- fp->frame_type = config->subframe_config.duplex_mode.value;
- fp->L_ssb = config->sch_config.ssb_scg_position_in_burst.value;
+ fp->frame_type = config->cell_config.frame_duplex_type.value;
+ fp->L_ssb = (((uint64_t) config->ssb_table.ssb_mask_list[1].ssb_mask.value)<<32) | config->ssb_table.ssb_mask_list[0].ssb_mask.value ;
+ int N_RB_DL = config->carrier_config.dl_grid_size[config->ssb_config.scs_common.value].value;
return nr_init_frame_parms0(fp,
- config->subframe_config.numerology_index_mu.value,
- config->subframe_config.dl_cyclic_prefix_type.value,
- config->rf_config.dl_carrier_bandwidth.value);
+ config->ssb_config.scs_common.value,
+ NFAPI_CP_NORMAL,
+ N_RB_DL);
}
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp,
@@ -314,8 +314,8 @@ void nr_dump_frame_parms(NR_DL_FRAME_PARMS *fp)
LOG_I(PHY,"fp->samples_per_frame_wCP=%d\n",fp->samples_per_frame_wCP);
LOG_I(PHY,"fp->samples_per_subframe=%d\n",fp->samples_per_subframe);
LOG_I(PHY,"fp->samples_per_frame=%d\n",fp->samples_per_frame);
- LOG_I(PHY,"fp->dl_CarrierFreq=%u\n",fp->dl_CarrierFreq);
- LOG_I(PHY,"fp->ul_CarrierFreq=%u\n",fp->ul_CarrierFreq);
+ LOG_I(PHY,"fp->dl_CarrierFreq=%lu\n",fp->dl_CarrierFreq);
+ LOG_I(PHY,"fp->ul_CarrierFreq=%lu\n",fp->ul_CarrierFreq);
}
diff --git a/openair1/PHY/INIT/phy_init.h b/openair1/PHY/INIT/phy_init.h
index 7e0500b56c..d2b614633b 100644
--- a/openair1/PHY/INIT/phy_init.h
+++ b/openair1/PHY/INIT/phy_init.h
@@ -377,9 +377,9 @@ void phy_config_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
-int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_frame_index);
-int nr_is_ssb_slot(nfapi_nr_config_request_t *cfg, int slot);
-int nr_init_frame_parms(nfapi_nr_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms);
+int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb);
+int nr_is_ssb_slot(uint8_t n_hf, uint8_t period, int slot);
+int nr_init_frame_parms(nfapi_nr_config_request_scf_t *config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,int mu,int Ncp,int N_RB_DL,int n_ssb_crb,int ssb_subcarrier_offset);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag);
diff --git a/openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c b/openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
index 0656091c78..89321f637b 100644
--- a/openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
+++ b/openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
@@ -37,11 +37,12 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pusch)
{
- int pilot[1320] __attribute__((aligned(16)));
+ int pilot[3280] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
- int16_t ch[2],*pil,*rxF,*ul_ch,*fl,*fm,*fr,*fml,*fmr,*fmm;
+ int16_t ch[2],*pil,*rxF,*ul_ch;
+ int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh;
int ch_offset,symbol_offset, length_dmrs, UE_id = 0;
unsigned short n_idDMRS[2] = {0,1}; //to update from pusch config
int32_t temp_in_ifft_0[8192*2] __attribute__((aligned(16)));
@@ -82,6 +83,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
fmm = filt8_mm0;
fml = filt8_m0;
fmr = filt8_mr0;
+ fdcl = filt8_dcl0;
+ fdcr = filt8_dcr0;
+ fdclh = filt8_dcl0_h;
+ fdcrh = filt8_dcr0_h;
break;
case 1:
@@ -91,6 +96,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
fmm = filt8_mm1;
fml = filt8_ml1;
fmr = filt8_m1;
+ fdcl = filt8_dcl1;
+ fdcr = filt8_dcr1;
+ fdclh = filt8_dcl1_h;
+ fdcrh = filt8_dcr1_h;
break;
default:
@@ -119,12 +128,12 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
memset(ul_ch,0,4*(gNB->frame_parms.ofdm_symbol_size));
#ifdef DEBUG_PUSCH
- printf("ch est pilot addr %p RB_DL %d\n",&pilot[0], gNB->frame_parms.N_RB_DL);
+ printf("ch est pilot addr %p RB_DL %d\n",&pilot[0], gNB->frame_parms.N_RB_UL);
printf("k %d, first_carrier %d\n",k,gNB->frame_parms.first_carrier_offset);
printf("rxF addr %p p %d\n", rxF,p);
printf("ul_ch addr %p nushift %d\n",ul_ch,nushift);
#endif
- //if ((gNB->frame_parms.N_RB_DL&1)==0) {
+ //if ((gNB->frame_parms.N_RB_UL&1)==0) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -140,7 +149,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ul_ch,
8);
pil+=2;
- re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
+ re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
//for (int i= 0; i<8; i++)
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
@@ -156,7 +165,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ul_ch,
8);
pil+=2;
- re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
+ re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
//printf("ul_ch addr %p\n",ul_ch);
@@ -175,7 +184,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
pil+=2;
- re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
+ re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ul_ch+=8;
@@ -193,7 +202,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
8);
pil+=2;
- re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
+ re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -206,7 +215,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ul_ch,
8);
pil+=2;
- re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
+ re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ul_ch+=8;
@@ -227,7 +236,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
pil+=2;
- re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
+ re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -242,7 +251,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
8);
pil+=2;
- re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
+ re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ul_ch+=8;
@@ -256,6 +265,69 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ul_ch,
8);
+
+ // check if PRB crosses DC and improve estimates around DC
+ if ((bwp_start_subcarrier >= gNB->frame_parms.ofdm_symbol_size/2) && (bwp_start_subcarrier+nb_rb_pusch*12 >= gNB->frame_parms.ofdm_symbol_size)) {
+ ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
+ uint16_t idxDC = 2*(gNB->frame_parms.ofdm_symbol_size - bwp_start_subcarrier);
+ uint16_t idxPil = idxDC/2;
+ re_offset = k;
+ pil = (int16_t *)&pilot[0];
+ pil += (idxPil-2);
+ ul_ch += (idxDC-4);
+ ul_ch = memset(ul_ch, 0, sizeof(int16_t)*10);
+ re_offset = (re_offset+idxDC/2-2) % gNB->frame_parms.ofdm_symbol_size;
+ rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
+ ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
+ ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
+
+ // for proper allignment of SIMD vectors
+ if((gNB->frame_parms.N_RB_UL&1)==0) {
+
+ multadd_real_vector_complex_scalar(fdcl,
+ ch,
+ ul_ch-4,
+ 8);
+
+ pil += 4;
+ re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
+ rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
+ ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
+ ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
+
+ multadd_real_vector_complex_scalar(fdcr,
+ ch,
+ ul_ch-4,
+ 8);
+ } else {
+
+ multadd_real_vector_complex_scalar(fdclh,
+ ch,
+ ul_ch,
+ 8);
+
+ pil += 4;
+ re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
+ rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
+ ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
+ ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
+
+ multadd_real_vector_complex_scalar(fdcrh,
+ ch,
+ ul_ch,
+ 8);
+ }
+
+ }
+#ifdef DEBUG_PDSCH
+ ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
+ for(uint16_t idxP=0; idxPframe_parms.ofdm_symbol_size*sizeof(int32_t));
memcpy(temp_in_ifft_0, &ul_ch_estimates[aarx][symbol_offset], nb_rb_pusch * NR_NB_SC_PER_RB * sizeof(int32_t));
@@ -322,4 +394,4 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#endif
return(0);
-}
\ No newline at end of file
+}
diff --git a/openair1/PHY/NR_REFSIG/dmrs_nr.h b/openair1/PHY/NR_REFSIG/dmrs_nr.h
index 9b02d2b1af..5c4f218512 100644
--- a/openair1/PHY/NR_REFSIG/dmrs_nr.h
+++ b/openair1/PHY/NR_REFSIG/dmrs_nr.h
@@ -55,7 +55,7 @@ int pseudo_random_sequence(int M_PN, uint32_t *c, uint32_t cinit);
void lte_gold_new(LTE_DL_FRAME_PARMS *frame_parms, uint32_t lte_gold_table[20][2][14], uint16_t Nid_cell);
void generate_dmrs_pbch(uint32_t dmrs_pbch_bitmap[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE], uint16_t Nid_cell);
uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position);
-uint16_t get_dmrs_freq_idx_ul(uint8_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type);
+uint16_t get_dmrs_freq_idx_ul(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type);
#undef EXTERN
diff --git a/openair1/PHY/NR_REFSIG/nr_gold.c b/openair1/PHY/NR_REFSIG/nr_gold.c
index 48fcd04a0f..36d8eb81a8 100644
--- a/openair1/PHY/NR_REFSIG/nr_gold.c
+++ b/openair1/PHY/NR_REFSIG/nr_gold.c
@@ -26,11 +26,11 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
unsigned int x1, x2;
uint16_t Nid, i_ssb, i_ssb2;
unsigned char Lmax, l, n_hf, N_hf;
- nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
+ nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint8_t reset;
- Nid = cfg->sch_config.physical_cell_id.value;
+ Nid = cfg->cell_config.phy_cell_id.value;
Lmax = fp->Lmax;
N_hf = (Lmax == 4)? 2:1;
@@ -156,4 +156,4 @@ void nr_gold_pusch(PHY_VARS_gNB* gNB, unsigned short lbar,unsigned short *n_idDM
}
}
}
-}
\ No newline at end of file
+}
diff --git a/openair1/PHY/NR_REFSIG/nr_gold_ue.c b/openair1/PHY/NR_REFSIG/nr_gold_ue.c
index ad26356abb..9793899dd4 100644
--- a/openair1/PHY/NR_REFSIG/nr_gold_ue.c
+++ b/openair1/PHY/NR_REFSIG/nr_gold_ue.c
@@ -148,7 +148,7 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
- for (n=0; n<52; n++) {
+ for (n=0; n>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c
index d00e66f041..8f097f13ae 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dci.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c
@@ -42,8 +42,7 @@
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
- uint16_t N_RB,
- nfapi_nr_config_request_t *config) {
+ uint16_t N_RB) {
uint16_t size = 0;
switch(format) {
@@ -52,7 +51,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
- size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, config) - size; // Padding to match 1_0 size
+ size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB) - size; // Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
break;
@@ -155,12 +154,13 @@ void nr_pdcch_scrambling(uint32_t *in,
}
}
-uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
+uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
+ nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
- NR_DL_FRAME_PARMS frame_parms,
- nfapi_nr_config_request_t config) {
+ NR_DL_FRAME_PARMS frame_parms) {
+
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
uint16_t cset_start_sc;
uint8_t cset_start_symb, cset_nsymb;
@@ -169,178 +169,201 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
nr_reg_t reg;
nr_reg_t reg_mapping_list[NR_MAX_PDCCH_AGG_LEVEL*NR_NB_REG_PER_CCE];
/*First iteration: single DCI*/
- NR_gNB_DCI_ALLOC_t dci_alloc = pdcch_vars.dci_alloc[0];
- nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params = dci_alloc.pdcch_params;
- /*The coreset is initialised
- * in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
- * or the rb_offset for other coresets
- * in time: by its first slot and its first symbol*/
- if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1) {
+ nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15;
+
+
+ // find coreset descriptor
+
+ int rb_offset;
+ int n_rb;
+
+ AssertFatal(pdcch_pdu==NULL || ul_dci_pdu==NULL,"Can't handle both DL and UL DCI in same slot\n");
+
+ if (pdcch_pdu) pdcch_pdu_rel15 = &pdcch_pdu->pdcch_pdu_rel15;
+ else if (ul_dci_pdu) pdcch_pdu_rel15 = &ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15;
+
+ get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
+
+ // compute rb_offset and n_prb based on frequency allocation
+
+ if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) {
cset_start_sc = frame_parms.first_carrier_offset + (frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB +
- pdcch_params.rb_offset)*NR_NB_SC_PER_RB;
+ rb_offset)*NR_NB_SC_PER_RB;
} else
- cset_start_sc = frame_parms.first_carrier_offset + pdcch_params.rb_offset*NR_NB_SC_PER_RB;
+ cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB;
- cset_start_symb = pdcch_params.first_symbol;
- cset_nsymb = pdcch_params.n_symb;
- dci_idx = 0;
- LOG_D(PHY, "Coreset rb_offset %d\n",pdcch_params.rb_offset);
- LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
- // DMRS length is per OFDM symbol
- uint32_t dmrs_length = (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS)?
- (pdcch_params.n_rb*6) : (dci_alloc.L*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
- uint32_t encoded_length = dci_alloc.L*108; //2(QPSK)*9(per RB)*6(REG per CCE)
- LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d\n", dmrs_length, encoded_length);
- dmrs_length += pdcch_params.rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
-
- /// DMRS QPSK modulation
- for (int symb=cset_start_symb; symbnumDlDci;d++) {
+ /*The coreset is initialised
+ * in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
+ * or the rb_offset for other coresets
+ * in time: by its first slot and its first symbol*/
+ cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
+ cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
+ dci_idx = 0;
+ LOG_D(PHY, "Coreset rb_offset %d\n",rb_offset);
+ LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
+ // DMRS length is per OFDM symbol
+ uint32_t dmrs_length = (pdcch_pdu_rel15->precoderGranularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS)?
+ (n_rb*6) : (pdcch_pdu_rel15->AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
+ uint32_t encoded_length = pdcch_pdu_rel15->AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE)
+ LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d\n", dmrs_length, encoded_length);
+ dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
+
+ /// DMRS QPSK modulation
+ for (int symb=cset_start_symb; symbDurationSymbols; symb++) {
+
+ nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); //Qm = 2 as DMRS is QPSK modulated
+
#ifdef DEBUG_PDCCH_DMRS
-
- for (int i=0; i>1; i++)
- printf("symb %d i %d gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
- gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
-
+
+ for (int i=0; i>1; i++)
+ printf("symb %d i %d gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
+ gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
+
#endif
- }
-
- /// DCI payload processing
- // CRC attachment + Scrambling + Channel coding + Rate matching
- uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
- uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.rnti:0;
- uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)?
- pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
- t_nrPolar_params *currentPtr = nr_polar_params(NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
- polar_encoder_fast(dci_alloc.dci_pdu, encoder_output, pdcch_params.rnti,currentPtr);
+ }
+
+ /// DCI payload processing
+ // CRC attachment + Scrambling + Channel coding + Rate matching
+ uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
+ uint16_t n_RNTI = pdcch_pdu_rel15->RNTI[d];
+ uint16_t Nid = pdcch_pdu_rel15->ScramblingId[d];
+
+ t_nrPolar_params *currentPtr = nr_polar_params(NR_POLAR_DCI_MESSAGE_TYPE,
+ pdcch_pdu_rel15->PayloadSizeBits[d],
+ pdcch_pdu_rel15->AggregationLevel[d]);
+ polar_encoder_fast((uint64_t*)pdcch_pdu_rel15->Payload[d], encoder_output, pdcch_pdu_rel15->RNTI[d],1,currentPtr);
#ifdef DEBUG_CHANNEL_CODING
- printf("polar rnti %d\n",pdcch_params.rnti);
- printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
- dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1]);
- printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
-
- for (int i=0; i>5; i++)
- printf("[%d]->0x%08x \t", i,encoder_output[i]);
-
- printf("\n");
+ printf("polar rnti %d\n",pdcch_pdu_rel15->RNTI[d]);
+ printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
+ pdcch_pdu.Payload[d][0], pdcch_pdu.Payload[d][1]);
+ printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
+
+ for (int i=0; i>5; i++)
+ printf("[%d]->0x%08x \t", i,encoder_output[i]);
+
+ printf("\n");
#endif
- /// Scrambling
- uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD]= {0};
- nr_pdcch_scrambling(encoder_output, encoded_length, Nid, n_RNTI, scrambled_output);
+ /// Scrambling
+ uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD]= {0};
+ nr_pdcch_scrambling(encoder_output, encoded_length, Nid, n_RNTI, scrambled_output);
#ifdef DEBUG_CHANNEL_CODING
- printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\t [4]->0x%08x\t [5]->0x%08x\t \
+ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\t [4]->0x%08x\t [5]->0x%08x\t \
[6]->0x%08x \t [7]->0x%08x \t [8]->0x%08x \t [9]->0x%08x\t [10]->0x%08x\t [11]->0x%08x\n",
- scrambled_output[0], scrambled_output[1], scrambled_output[2], scrambled_output[3], scrambled_output[4],scrambled_output[5],
- scrambled_output[6], scrambled_output[7], scrambled_output[8], scrambled_output[9], scrambled_output[10],scrambled_output[11] );
+ scrambled_output[0], scrambled_output[1], scrambled_output[2], scrambled_output[3], scrambled_output[4],scrambled_output[5],
+ scrambled_output[6], scrambled_output[7], scrambled_output[8], scrambled_output[9], scrambled_output[10],scrambled_output[11] );
#endif
- /// QPSK modulation
- int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
- nr_modulation(scrambled_output, encoded_length, DMRS_MOD_ORDER, mod_dci); //Qm = 2 as DMRS is QPSK modulated
+ /// QPSK modulation
+ int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
+ nr_modulation(scrambled_output, encoded_length, DMRS_MOD_ORDER, mod_dci); //Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DCI
-
- for (int i=0; i>1; i++)
- printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
-
+
+ for (int i=0; i>1; i++)
+ printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
+
#endif
+
+ /// Resource mapping
+
+ if (cset_start_sc >= frame_parms.ofdm_symbol_size)
+ cset_start_sc -= frame_parms.ofdm_symbol_size;
+
+ /*Reorder REG list for a freq first mapping*/
+ uint8_t nb_regs = pdcch_pdu_rel15->AggregationLevel[d]*NR_NB_REG_PER_CCE;
- /// Resource mapping
-
- if (cset_start_sc >= frame_parms.ofdm_symbol_size)
- cset_start_sc -= frame_parms.ofdm_symbol_size;
-
- /*Reorder REG list for a freq first mapping*/
- uint8_t nb_regs = dci_alloc.L*NR_NB_REG_PER_CCE;
-
- for (int cce_idx=0; cce_idx>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
- ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
-#ifdef DEBUG_PDCCH_DMRS
- printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
- ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
-#endif
- k+=4;
-
- if (k >= frame_parms.ofdm_symbol_size)
- k -= frame_parms.ofdm_symbol_size;
-
- dmrs_idx++;
+ /*
+ for (int cce_idx=pdcch_pdu_rel15->CceIndex;
+ cce_idx<(pdcch_pdu_rel15->CceIndex+pdcch_pdu_rel15->AggregationLevel[d]);
+ cce_idx++) {
+ cce = gNB->cce_list[cce_idx];
+
+ for (int reg_idx=0; reg_idx= frame_parms.ofdm_symbol_size)
- k -= frame_parms.ofdm_symbol_size;
-
- l = cset_start_symb + reg.symb_idx;
-
- // dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
- if (pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
- dmrs_idx = (reg.reg_idx/cset_nsymb)*3;
- else
- dmrs_idx = ((reg.reg_idx/cset_nsymb)+pdcch_params.rb_offset)*3;
-
- k_prime = 0;
-
- for (int m=0; m>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
- ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
+ */
+
+ if (pdcch_pdu_rel15->precoderGranularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS) {
+ /*in this case the DMRS are mapped on all the coreset*/
+ for (l=cset_start_symb; lCoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
+ dmrs_idx = 0;
+ else
+ dmrs_idx = rb_offset*3;
+
+ k = cset_start_sc + 1;
+
+ while (dmrs_idx<3*n_rb) {
+ ((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = ((amp>>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
+ ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
- printf("l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
- ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
+ printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
+ ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
- dmrs_idx++;
- }
-
- k_prime++;
- } else { // DCI payload
- ((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
- ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
-#ifdef DEBUG_DCI
- printf("l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
- ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
-#endif
- dci_idx++;
+ k+=4;
+
+ if (k >= frame_parms.ofdm_symbol_size)
+ k -= frame_parms.ofdm_symbol_size;
+
+ dmrs_idx++;
+ }
}
-
- k++;
-
+ }
+
+ /*Now mapping the encoded DCI based on newly constructed REG list
+ * and the DMRS for the precoder granularity same as REG bundle*/
+ for (int reg_idx=0; reg_idx= frame_parms.ofdm_symbol_size)
- k -= frame_parms.ofdm_symbol_size;
- }
- }
-
+ k -= frame_parms.ofdm_symbol_size;
+
+ l = cset_start_symb + reg.symb_idx;
+
+ // dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
+ if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
+ dmrs_idx = (reg.reg_idx/cset_nsymb)*3;
+ else
+ dmrs_idx = ((reg.reg_idx/cset_nsymb)+rb_offset)*3;
+
+ k_prime = 0;
+
+ for (int m=0; mprecoderGranularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
+ ((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = ((amp>>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
+ ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
+#ifdef DEBUG_PDCCH_DMRS
+ printf("l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
+ ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
+#endif
+ dmrs_idx++;
+ }
+
+ k_prime++;
+ } else { // DCI payload
+ ((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
+ ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
+#ifdef DEBUG_DCI
+ printf("l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
+ ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
+#endif
+ dci_idx++;
+ }
+
+ k++;
+
+ if (k >= frame_parms.ofdm_symbol_size)
+ k -= frame_parms.ofdm_symbol_size;
+ } // m
+ } // reg_idx
+ } // for (int d=0;dnumDlDci;d++)
return 0;
}
+
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.h b/openair1/PHY/NR_TRANSPORT/nr_dci.h
index 71f8dc5617..ccebf3c82f 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dci.h
+++ b/openair1/PHY/NR_TRANSPORT/nr_dci.h
@@ -27,15 +27,14 @@
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
- uint16_t N_RB,
- nfapi_nr_config_request_t *config);
+ uint16_t N_RB);
-uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
+uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
+ nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
- NR_DL_FRAME_PARMS frame_parms,
- nfapi_nr_config_request_t config);
+ NR_DL_FRAME_PARMS frame_parms);
void nr_pdcch_scrambling(uint32_t *in,
uint32_t size,
@@ -45,11 +44,10 @@ void nr_pdcch_scrambling(uint32_t *in,
void nr_fill_dci(PHY_VARS_gNB *gNB,
int frame,
- int slot,
- NR_gNB_DCI_ALLOC_t *dci_alloc,
- nfapi_nr_dl_config_dci_dl_pdu *pdu);
+ int slot);
-void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t *dci_alloc, uint16_t n_shift, uint8_t m);
+void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m);
+void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset);
#endif //__PHY_NR_TRANSPORT_DCI__H
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
index 17e2b32173..1231fa8127 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
@@ -36,11 +36,14 @@
#include "nr_dlsch.h"
-void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m) {
+/*
+ Original version to keep code for Y that needs to be moved to MAC
+
+void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint16_t n_shift, uint8_t m) {
nr_cce_t* cce;
nr_reg_t* reg;
- nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params = &dci_alloc->pdcch_params;
+ nfapi_nr_dl_config_pdcch_pdu_rel15_t* pdcch_pdu = gNB->pdcch_pdu.pdcch;
uint8_t L = dci_alloc->L;
uint8_t bsize = pdcch_params->reg_bundle_size;
@@ -54,7 +57,7 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
AssertFatal(L>=4, "Invalid aggregation level for SIB1 configured PDCCH %d\n", L);
N_cce = N_reg / NR_NB_REG_PER_CCE;
- /*Max number of candidates per aggregation level -- SIB1 configured search space only*/
+ //Max number of candidates per aggregation level -- SIB1 configured search space only
M_s_max = (L==4)?4:(L==8)?2:1;
if (pdcch_params->search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_COMMON)
@@ -113,6 +116,107 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
}
}
+*/
+
+void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) {
+
+ uint8_t count=0, start=0, start_set=0;
+
+ uint64_t bitmap = (((uint64_t)FreqDomainResource[0])<<37)|
+ (((uint64_t)FreqDomainResource[1])<<29)|
+ (((uint64_t)FreqDomainResource[2])<<21)|
+ (((uint64_t)FreqDomainResource[3])<<13)|
+ (((uint64_t)FreqDomainResource[4])<<5)|
+ (((uint64_t)FreqDomainResource[5])>>3);
+
+ for (int i=0; i<45; i++)
+ if ((bitmap>>(44-i))&1) {
+ count++;
+ if (!start_set) {
+ start = i;
+ start_set = 1;
+ }
+ }
+ *rb_offset = 6*start;
+ *n_rb = 6*count;
+}
+
+void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m) {
+
+ nr_cce_t* cce;
+ nr_reg_t* reg;
+ nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu_rel15 = &gNB->pdcch_pdu->pdcch_pdu_rel15;
+ int bsize = pdcch_pdu_rel15->RegBundleSize;
+ int R = pdcch_pdu_rel15->InterleaverSize;
+ int n_shift = pdcch_pdu_rel15->ShiftIndex;
+
+
+ //Max number of candidates per aggregation level -- SIB1 configured search space only
+
+
+ int n_rb,rb_offset;
+
+ get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
+
+
+ int N_reg = n_rb * pdcch_pdu_rel15->DurationSymbols;
+ int C;
+
+ for (int d=0;dnumDlDci;d++) {
+ int L = pdcch_pdu_rel15->AggregationLevel[d];
+
+ if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1)
+ AssertFatal(L>=4, "Invalid aggregation level for SIB1 configured PDCCH %d\n", L);
+
+ if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
+ uint16_t assertFatalCond = (N_reg%(bsize*R));
+ AssertFatal(assertFatalCond == 0,"CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %us, bsize %d R %d)\n",N_reg, bsize, R);
+ C = N_reg/(bsize*R);
+ }
+
+ LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", m, bsize, R, pdcch_pdu_rel15->CceIndex[d]);
+ for (uint8_t cce_idx=0; cce_idxcce_list[d][cce_idx];
+ cce->cce_idx = pdcch_pdu_rel15->CceIndex[d] + cce_idx;
+ LOG_D(PHY, "cce_idx %d\n", cce->cce_idx);
+
+ if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
+ LOG_D(PHY, "Interleaved CCE to REG mapping\n");
+ uint8_t j = cce->cce_idx, j_prime;
+ uint8_t r,c,idx;
+
+ for (uint8_t bundle_idx=0; bundle_idxreg_list[reg_idx];
+ reg->reg_idx = bsize*idx + reg_idx;
+ reg->start_sc_idx = (reg->reg_idx/pdcch_pdu_rel15->DurationSymbols) * NR_NB_SC_PER_RB;
+ reg->symb_idx = reg->reg_idx % pdcch_pdu_rel15->DurationSymbols;
+ LOG_D(PHY, "reg %d symbol %d start subcarrier %d\n", reg->reg_idx, reg->symb_idx, reg->start_sc_idx);
+ }
+ }
+ }
+ else { // NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED
+ LOG_D(PHY, "Non interleaved CCE to REG mapping\n");
+ for (uint8_t reg_idx=0; reg_idxreg_list[reg_idx];
+ reg->reg_idx = cce->cce_idx*NR_NB_REG_PER_CCE + reg_idx;
+ reg->start_sc_idx = (reg->reg_idx/pdcch_pdu_rel15->DurationSymbols) * NR_NB_SC_PER_RB;
+ reg->symb_idx = reg->reg_idx % pdcch_pdu_rel15->DurationSymbols;
+ LOG_D(PHY, "reg %d symbol %d start subcarrier %d\n", reg->reg_idx, reg->symb_idx, reg->start_sc_idx);
+ }
+
+ }
+
+ }
+ }
+}
+
/*static inline uint64_t dci_field(uint64_t field, uint8_t size) {
uint64_t ret = 0;
for (int i=0; idci_pdu;
- memset((void*)dci_pdu,0,2*sizeof(uint64_t));
- nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdcch_pdu->dci_dl_pdu_rel15;
- nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &pdcch_pdu->pdcch_params_rel15;
-
-
- nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
+ nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &gNB->pdcch_pdu->pdcch_pdu_rel15;
NR_gNB_DLSCH_t *dlsch;
+ for (int i=0;inumDlDci;i++) {
- uint16_t N_RB = params_rel15->n_RB_BWP;
- uint8_t fsize=0, pos=0, cand_idx=0;
+ uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->Payload[i];
-
- int dlsch_id = find_nr_dlsch(params_rel15->rnti,gNB,SEARCH_EXIST_OR_FREE);
- if( (dlsch_id<0) || (dlsch_id>=NUMBER_OF_NR_DLSCH_MAX) ){
- LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",params_rel15->rnti,dlsch_id);
- return;
- }
-
- dlsch = gNB->dlsch[dlsch_id][0];
-
- dlsch->slot_tx[slot] = 1;
- dlsch->harq_ids[frame%2][slot] = pdu_rel15->harq_pid;
- AssertFatal(pdu_rel15->harq_pid < 8 && pdu_rel15->harq_pid >= 0,
- "illegal harq_pid %d\n",pdu_rel15->harq_pid);
-
- dlsch->harq_mask |= (1<harq_pid);
- dlsch->rnti = params_rel15->rnti;
-
- dci_alloc->L = 8;
- memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
- dci_alloc->size = nr_get_dci_size(dci_alloc->pdcch_params.dci_format,
- dci_alloc->pdcch_params.rnti_type,
- N_RB,
- cfg);
-
- AssertFatal(dci_alloc->size<=64, "DCI sizes above 64 bits not yet supported");
- n_shift = (dci_alloc->pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1)?
- cfg->sch_config.physical_cell_id.value : dci_alloc->pdcch_params.shift_index;
- nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
-
- /// Payload generation
- switch(params_rel15->dci_format) {
-
-
- case NFAPI_NR_DL_DCI_FORMAT_1_0:
- switch(params_rel15->rnti_type) {
- case NFAPI_NR_RNTI_RA:
-
- // Freq domain assignment
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- pos=fsize;
- *dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<size-pos));
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,N_RB,dci_alloc->size-pos,*dci_pdu);
-#endif
- // Time domain assignment
- pos+=4;
- *dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"time-domain assignment %d (3 bits)=> %d (0x%lx)\n",pdu_rel15->time_domain_assignment,dci_alloc->size-pos,*dci_pdu);
-#endif
- // VRB to PRB mapping
-
- pos++;
- *dci_pdu |= ((uint64_t)pdu_rel15->vrb_to_prb_mapping&0x1)<<(dci_alloc->size-pos);
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",pdu_rel15->vrb_to_prb_mapping,dci_alloc->size-pos,*dci_pdu);
-#endif
- // MCS
- pos+=5;
- *dci_pdu |= ((uint64_t)pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"mcs %d (5 bits)=> %d (0x%lx)\n",pdu_rel15->mcs,dci_alloc->size-pos,*dci_pdu);
-#endif
- // TB scaling
- pos+=2;
- *dci_pdu |= ((uint64_t)pdu_rel15->tb_scaling&0x3)<<(dci_alloc->size-pos);
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",pdu_rel15->tb_scaling,dci_alloc->size-pos,*dci_pdu);
-#endif
- break;
-
- case NFAPI_NR_RNTI_C:
-
- // indicating a DL DCI format 1bit
- pos++;
- *dci_pdu |= ((uint64_t)pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos);
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",pdu_rel15->format_indicator,1,N_RB,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // Freq domain assignment (275rb >> fsize = 16)
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- pos+=fsize;
- *dci_pdu |= (((uint64_t)pdu_rel15->frequency_domain_assignment&((1<size-pos));
-
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- uint16_t is_ra = 1;
- for (int i=0; ifrequency_domain_assignment>>i)&1)) {
- is_ra = 0;
- break;
+ int dlsch_id = find_nr_dlsch(pdcch_pdu_rel15->RNTI[i],gNB,SEARCH_EXIST_OR_FREE);
+ if( (dlsch_id<0) || (dlsch_id>=NUMBER_OF_NR_DLSCH_MAX) ){
+ LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",(unsigned int)pdcch_pdu_rel15->RNTI[i],dlsch_id);
+ return;
}
- if (is_ra) //fsize are all 1 38.212 p86
- {
- // ra_preamble_index 6 bits
- pos+=6;
- *dci_pdu |= ((pdu_rel15->ra_preamble_index&0x3f)<<(dci_alloc->size-pos));
+
+ dlsch = gNB->dlsch[dlsch_id][0];
+ int harq_pid = 0;//extract_harq_pid(i,pdu_rel15);
- // UL/SUL indicator 1 bit
- pos++;
- *dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos);
+ dlsch->slot_tx[slot] = 1;
+ dlsch->harq_ids[frame%2][slot] = harq_pid;
+ AssertFatal(harq_pid < 8 && harq_pid >= 0,
+ "illegal harq_pid %d\n",harq_pid);
+
+ dlsch->harq_mask |= (1<rnti = pdcch_pdu_rel15->RNTI[i];
+
+ nr_fill_cce_list(gNB,0);
+ /*
+ LOG_D(PHY, "DCI PDU: [0]->0x%lx \t [1]->0x%lx \n",dci_pdu[0], dci_pdu[1]);
+ LOG_D(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
+ */
+
+ }
+
+}
+void nr_fill_ul_dci(PHY_VARS_gNB *gNB,
+ int frame,
+ int slot) {
+
+ nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &gNB->ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15;
+
+
+ for (int i=0;inumDlDci;i++) {
+
+ uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->Payload[i];
+
+ // if there's no DL DCI then generate CCE list
+ if (gNB->pdcch_pdu) nr_fill_cce_list(gNB,0);
+ /*
+ LOG_D(PHY, "DCI PDU: [0]->0x%lx \t [1]->0x%lx \n",dci_pdu[0], dci_pdu[1]);
+ LOG_D(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
+ */
- // SS/PBCH index 6 bits
- pos+=6;
- *dci_pdu |= ((pdu_rel15->ss_pbch_index&0x3f)<<(dci_alloc->size-pos));
-
- // prach_mask_index 4 bits
- pos+=4;
- *dci_pdu |= ((pdu_rel15->prach_mask_index&0xf)<<(dci_alloc->size-pos));
-
- } //end if
-
- else {
-
- // Time domain assignment 4bit
-
- pos+=4;
- *dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->time_domain_assignment,4,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // VRB to PRB mapping 1bit
- pos++;
- *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos);
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->vrb_to_prb_mapping,1,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // MCS 5bit //bit over 32, so dci_pdu ++
- pos+=5;
- *dci_pdu |= (pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"MCS %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->mcs,5,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // New data indicator 1bit
- pos++;
- *dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos);
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"NDI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->ndi,1,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // Redundancy version 2bit
- pos+=2;
- *dci_pdu |= (pdu_rel15->rv&0x3)<<(dci_alloc->size-pos);
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"RV %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->rv,2,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // HARQ process number 4bit
- pos+=4;
- *dci_pdu |= ((pdu_rel15->harq_pid&0xf)<<(dci_alloc->size-pos));
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->harq_pid,4,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // Downlink assignment index 2bit
- pos+=2;
- *dci_pdu |= ((pdu_rel15->dai&3)<<(dci_alloc->size-pos));
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"DAI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->dai,2,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // TPC command for scheduled PUCCH 2bit
- pos+=2;
- *dci_pdu |= ((pdu_rel15->tpc&3)<<(dci_alloc->size-pos));
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"TPC %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->tpc,2,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // PUCCH resource indicator 3bit
- pos+=3;
- *dci_pdu |= ((pdu_rel15->pucch_resource_indicator&0x7)<<(dci_alloc->size-pos));
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->pucch_resource_indicator,3,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- // PDSCH-to-HARQ_feedback timing indicator 3bit
- pos+=3;
- *dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_alloc->size-pos));
-#ifdef DEBUG_FILL_DCI
- LOG_D(PHY,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->pdsch_to_harq_feedback_timing_indicator,3,dci_alloc->size-pos,*dci_pdu);
-#endif
-
- } //end else
- break;
-
- case NFAPI_NR_RNTI_P:
-
- // Short Messages Indicator – 2 bits
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_alloc->size-pos++);
- // Short Messages – 8 bits
- for (int i=0; i<8; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->short_messages>>(7-i))&1)<<(dci_alloc->size-pos++);
- // Freq domain assignment 0-16 bit
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
- // Time domain assignment 4 bit
- for (int i=0; i<4; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
- // VRB to PRB mapping 1 bit
- *dci_pdu |= ((uint64_t)pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
- // MCS 5 bit
- for (int i=0; i<5; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
-
- // TB scaling 2 bit
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_alloc->size-pos++);
-
-
- break;
-
- case NFAPI_NR_RNTI_SI:
- // Freq domain assignment 0-16 bit
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
- // Time domain assignment 4 bit
- for (int i=0; i<4; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
- // VRB to PRB mapping 1 bit
- *dci_pdu |= ((uint64_t)pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
- // MCS 5bit //bit over 32, so dci_pdu ++
- for (int i=0; i<5; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
- // Redundancy version 2bit
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
-
- break;
-
- case NFAPI_NR_RNTI_TC:
- // indicating a DL DCI format 1bit
- *dci_pdu |= ((uint64_t)pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
- // Freq domain assignment 0-16 bit
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
- // Time domain assignment 4 bit
- for (int i=0; i<4; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
- // VRB to PRB mapping 1 bit
- *dci_pdu |= ((uint64_t)pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
- // MCS 5bit //bit over 32, so dci_pdu ++
- for (int i=0; i<5; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
- // New data indicator 1bit
- *dci_pdu |= ((uint64_t)pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
- // Redundancy version 2bit
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
- // HARQ process number 4bit
- for (int i=0; i<4; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
-
- // Downlink assignment index – 2 bits
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->dai>>(1-i))&1)<<(dci_alloc->size-pos++);
-
- // TPC command for scheduled PUCCH – 2 bits
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
-
-
- // LOG_D(PHY, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n",
- // dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
-
-
- // PDSCH-to-HARQ_feedback timing indicator – 3 bits
- for (int i=0; i<3; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<(dci_alloc->size-pos++);
-
- break;
- }
- break;
-
- case NFAPI_NR_UL_DCI_FORMAT_0_0:
- switch(params_rel15->rnti_type)
- {
- case NFAPI_NR_RNTI_C:
- // indicating a DL DCI format 1bit
- *dci_pdu |= ((uint64_t)pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
- // Freq domain assignment max 16 bit
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
- // Time domain assignment 4bit
- for (int i=0; i<4; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
- // Frequency hopping flag – 1 bit
- *dci_pdu |= ((uint64_t)pdu_rel15->frequency_hopping_flag&1)<<(dci_alloc->size-pos++);
- // MCS 5 bit
- for (int i=0; i<5; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
- // New data indicator 1bit
- *dci_pdu |= ((uint64_t)pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
- // Redundancy version 2bit
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
- // HARQ process number 4bit
- for (int i=0; i<4; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
-
- // TPC command for scheduled PUSCH – 2 bits
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
-
- // Padding bits
- for(int a = pos;a<32;a++)
- *dci_pdu |= ((uint64_t)pdu_rel15->padding&1)<<(dci_alloc->size-pos++);
-
- // UL/SUL indicator – 1 bit
- if (cfg->pucch_config.pucch_GroupHopping.value)
- *dci_pdu |= ((uint64_t)pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos++);
-
- break;
-
- case NFAPI_NR_RNTI_TC:
-
- // indicating a DL DCI format 1bit
- *dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
- // Freq domain assignment max 16 bit
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
- // Time domain assignment 4bit
- for (int i=0; i<4; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
- // Frequency hopping flag – 1 bit
- *dci_pdu |= ((uint64_t)pdu_rel15->frequency_hopping_flag&1)<<(dci_alloc->size-pos++);
- // MCS 5 bit
- for (int i=0; i<5; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
- // New data indicator 1bit
- *dci_pdu |= ((uint64_t)pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
- // Redundancy version 2bit
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
- // HARQ process number 4bit
- for (int i=0; i<4; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
-
- // TPC command for scheduled PUSCH – 2 bits
- for (int i=0; i<2; i++)
- *dci_pdu |= (((uint64_t)pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
-
- // Padding bits
- for(int a = pos;a<32;a++)
- *dci_pdu |= ((uint64_t)pdu_rel15->padding&1)<<(dci_alloc->size-pos++);
-
- // UL/SUL indicator – 1 bit
- if (cfg->pucch_config.pucch_GroupHopping.value)
- *dci_pdu |= ((uint64_t)pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos++);
-
- break;
- }
- break;
}
- LOG_D(PHY, "DCI PDU: [0]->0x%lx \t [1]->0x%lx \n",dci_pdu[0], dci_pdu[1]);
- LOG_D(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
-
}
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c
index 78cc8672f8..9a1b5d4431 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c
@@ -67,7 +67,6 @@ void nr_pdsch_codeword_scrambling(uint8_t *in,
uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
- NR_gNB_DCI_ALLOC_t *dci_alloc,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
@@ -75,19 +74,13 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms,
int xOverhead,
- nfapi_nr_config_request_t *config,
time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats) {
- NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[dci_alloc->harq_pid];
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &harq->dlsch_pdu.dlsch_pdu_rel15;
- nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params = dci_alloc->pdcch_params;
- uint8_t rnti_type = pdcch_params.rnti_type;
- uint16_t N_PRB_oh = ((rnti_type==NFAPI_NR_RNTI_SI)||(rnti_type==NFAPI_NR_RNTI_RA)||(rnti_type==NFAPI_NR_RNTI_P))? 0 : \
- (xOverhead);
- uint8_t N_PRB_DMRS = (rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1)?6:4; //This only works for antenna port 1000
- uint8_t N_sh_symb = rel15->NrOfSymbols;
+ int harq_pid = 0;
+ NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[harq_pid];
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15;
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **mod_symbs = (int16_t**)dlsch->mod_symbs;
int16_t **tx_layers = (int16_t**)dlsch->txdataF;
@@ -121,16 +114,12 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
start_meas(dlsch_scrambling_stats);
for (int q=0; qNrOfCodewords; q++)
memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t));
- uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \
- ((pdcch_params.scrambling_id==0)?pdcch_params.rnti:0) : 0;
- uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \
- pdcch_params.scrambling_id : config->sch_config.physical_cell_id.value;
for (int q=0; qNrOfCodewords; q++)
nr_pdsch_codeword_scrambling(harq->f,
encoded_length,
q,
- Nid,
- n_RNTI,
+ rel15->dlDmrsScramblingId,
+ rel15->rnti,
scrambled_output[q]);
stop_meas(dlsch_scrambling_stats);
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h
index 1aad2dfb65..065353b35e 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h
+++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h
@@ -36,10 +36,10 @@
#include "PHY/defs_gNB.h"
void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
- nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
- nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu);
+ nfapi_nr_dl_tti_pdcch_pdu dci_pdu,
+ nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu);
-void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15,nfapi_nr_config_request_t *cfg);
+void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15,nfapi_nr_config_request_t *cfg);
uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB);
@@ -51,8 +51,6 @@ void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type);
void nr_get_rbg_list(uint32_t bitmap, uint8_t n_rbg, uint8_t* rbg_list);
-void nr_get_PRG_parms(NR_BWP_PARMS* bwp, NR_gNB_DCI_ALLOC_t dci_alloc, uint8_t prb_bundling_type);
-
uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx);
@@ -68,11 +66,10 @@ void nr_pdsch_codeword_scrambling(uint8_t *in,
void nr_fill_dlsch(PHY_VARS_gNB *gNB,
int frame,
int slot,
- nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
+ nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
unsigned char *sdu);
uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
- NR_gNB_DCI_ALLOC_t *dci_alloc,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
@@ -80,7 +77,6 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms,
int xOverhead,
- nfapi_nr_config_request_t *config,
time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats);
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
index 00c2d70ee1..eb6b7c10c1 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
@@ -107,19 +107,18 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
}
-NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
+NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
+ unsigned char Kmimo,
unsigned char Mdlharq,
uint32_t Nsoft,
- uint8_t abstraction_flag,
- NR_DL_FRAME_PARMS *frame_parms,
- nfapi_nr_config_request_t *config)
+ uint8_t abstraction_flag,
+ uint16_t N_RB)
{
NR_gNB_DLSCH_t *dlsch;
unsigned char exit_flag = 0,i,r,aa,layer;
int re;
unsigned char bw_scaling =1;
- uint16_t N_RB = config->rf_config.dl_carrier_bandwidth.value;
switch (N_RB) {
@@ -144,12 +143,12 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
for (layer=0; layerue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*));
- for (aa=0; aa<64; aa++) {
+ for (aa=0; aa<64; aa++) {
dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
for (re=0;reue_spec_bf_weights[layer][aa][re] = 0x00007fff;
}
- }
+ }
dlsch->txdataF[layer] = (int32_t *)malloc16((NR_MAX_PDSCH_ENCODED_LENGTH/NR_MAX_NB_LAYERS)*sizeof(int32_t)); // NR_MAX_NB_LAYERS is already included in NR_MAX_PDSCH_ENCODED_LENGTH
}
@@ -280,7 +279,7 @@ int nr_dlsch_encoding(unsigned char *a,
unsigned int crc=1;
uint8_t harq_pid = dlsch->harq_ids[frame&2][slot];
AssertFatal(harq_pid<8 && harq_pid>=0,"illegal harq_pid %d\b",harq_pid);
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15;
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->pdsch_pdu.pdsch_pdu_rel15;
uint16_t nb_rb = rel15->rbSize;
uint8_t nb_symb_sch = rel15->NrOfSymbols;
uint32_t A, Z, Kb, F=0;
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c
index db76ebfd5b..ff1f841e47 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c
@@ -262,7 +262,7 @@ int16_t find_nr_dlsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type) {
AssertFatal(gNB!=NULL,"gNB is null\n");
for (i=0; idlsch[i]!=NULL,"gNB->dlsch[%d] is null\n",i);
- AssertFatal(gNB->dlsch[i]!=NULL,"gNB->dlsch[%d][0] is null\n",i);
+ AssertFatal(gNB->dlsch[i][0]!=NULL,"gNB->dlsch[%d][0] is null\n",i);
LOG_D(PHY,"searching for rnti %x : dlsch_index %d=> harq_mask %x, rnti %x, first_free_index %d\n", rnti,i,gNB->dlsch[i][0]->harq_mask,gNB->dlsch[i][0]->rnti,first_free_index);
if ((gNB->dlsch[i][0]->harq_mask >0) &&
(gNB->dlsch[i][0]->rnti==rnti)) return i;
@@ -274,13 +274,33 @@ int16_t find_nr_dlsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type) {
return first_free_index;
}
+int16_t find_nr_ulsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type) {
+
+ uint16_t i;
+ int16_t first_free_index=-1;
+
+ AssertFatal(gNB!=NULL,"gNB is null\n");
+ for (i=0; iulsch[i]!=NULL,"gNB->ulsch[%d] is null\n",i);
+ AssertFatal(gNB->ulsch[i][0]!=NULL,"gNB->ulsch[%d][0] is null\n",i);
+ LOG_D(PHY,"searching for rnti %x : ulsch_index %d=> harq_mask %x, rnti %x, first_free_index %d\n", rnti,i,gNB->ulsch[i][0]->harq_mask,gNB->ulsch[i][0]->rnti,first_free_index);
+ if ((gNB->ulsch[i][0]->harq_mask >0) &&
+ (gNB->ulsch[i][0]->rnti==rnti)) return i;
+ else if ((gNB->ulsch[i][0]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i;
+ }
+ if (type == SEARCH_EXIST) return -1;
+ if (first_free_index != -1)
+ gNB->ulsch[first_free_index][0]->rnti = 0;
+ return first_free_index;
+}
+
void nr_fill_dlsch(PHY_VARS_gNB *gNB,
int frame,
int slot,
- nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
+ nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu) {
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &dlsch_pdu->dlsch_pdu_rel15;
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &pdsch_pdu->pdsch_pdu_rel15;
int dlsch_id = find_nr_dlsch(rel15->rnti,gNB,SEARCH_EXIST);
AssertFatal( (dlsch_id>=0) && (dlsch_iddlsch[dlsch_id][0];
NR_DL_gNB_HARQ_t **harq = dlsch->harq_processes;
/// DLSCH struct
- memcpy((void*)&harq[dlsch->harq_ids[frame%2][slot]]->dlsch_pdu, (void*)dlsch_pdu, sizeof(nfapi_nr_dl_config_dlsch_pdu));
+ memcpy((void*)&harq[dlsch->harq_ids[frame%2][slot]]->pdsch_pdu, (void*)pdsch_pdu, sizeof(nfapi_nr_dl_tti_pdsch_pdu));
+ gNB->num_pdsch_rnti++;
AssertFatal(sdu!=NULL,"sdu is null\n");
harq[dlsch->harq_ids[frame%2][slot]]->pdu = sdu;
}
+void nr_fill_ulsch(PHY_VARS_gNB *gNB,
+ int frame,
+ int slot,
+ nfapi_nr_pusch_pdu_t *ulsch_pdu) {
+
+
+ int ulsch_id = find_nr_ulsch(ulsch_pdu->rnti,gNB,SEARCH_EXIST_OR_FREE);
+ AssertFatal( (ulsch_id>=0) && (ulsch_idrnti,ulsch_id);
+
+ NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ulsch_id][0];
+ int harq_pid = ulsch_pdu->pusch_data.harq_process_id;
+ ulsch->rnti = ulsch_pdu->rnti;
+ //ulsch->rnti_type;
+ ulsch->harq_mask |= 1<harq_process_id[slot] = harq_pid;
+
+ nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch->harq_processes[harq_pid]->ulsch_pdu;
+
+ LOG_D(PHY,"Initializing nFAPI for ULSCH, UE %d, harq_pid %d\n",ulsch_id,harq_pid);
+
+
+ //FK this is still a bad hack. We need to replace the L1 FAPI structures with the new scf ones as well.
+ rel15_ul->rnti = ulsch_pdu->rnti;
+ rel15_ul->ulsch_pdu_rel15.start_rb = ulsch_pdu->rb_start;
+ rel15_ul->ulsch_pdu_rel15.number_rbs = ulsch_pdu->rb_size;
+ rel15_ul->ulsch_pdu_rel15.start_symbol = ulsch_pdu->start_symbol_index;
+ rel15_ul->ulsch_pdu_rel15.number_symbols = ulsch_pdu->nr_of_symbols;
+ rel15_ul->ulsch_pdu_rel15.nb_re_dmrs = 6; //where should this come from?
+ rel15_ul->ulsch_pdu_rel15.length_dmrs = 1; //where should this come from?
+ rel15_ul->ulsch_pdu_rel15.Qm = ulsch_pdu->qam_mod_order;
+ rel15_ul->ulsch_pdu_rel15.mcs = ulsch_pdu->mcs_index;
+ rel15_ul->ulsch_pdu_rel15.rv = ulsch_pdu->pusch_data.rv_index;
+ rel15_ul->ulsch_pdu_rel15.n_layers = ulsch_pdu->nrOfLayers;
+ rel15_ul->ulsch_pdu_rel15.R = ulsch_pdu->target_code_rate;
+
+}
+
diff --git a/openair1/PHY/NR_TRANSPORT/nr_pbch.c b/openair1/PHY/NR_TRANSPORT/nr_pbch.c
index bb114fa390..e1a256d546 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_pbch.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_pbch.c
@@ -50,13 +50,13 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
- nfapi_nr_config_request_t *config,
+ nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms) {
int k,l;
//int16_t a;
int16_t mod_dmrs[NR_PBCH_DMRS_LENGTH<<1];
uint8_t idx=0;
- uint8_t nushift = config->sch_config.physical_cell_id.value &3;
+ uint8_t nushift = config->cell_config.phy_cell_id.value &3;
LOG_D(PHY, "PBCH DMRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift);
/// QPSK modulation
@@ -220,7 +220,7 @@ void nr_init_pbch_interleaver(uint8_t *interleaver) {
}
int nr_generate_pbch(NR_gNB_PBCH *pbch,
- uint8_t *pbch_pdu,
+ nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
uint8_t *interleaver,
int32_t *txdataF,
int16_t amp,
@@ -229,7 +229,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t Lmax,
uint8_t ssb_index,
int sfn,
- nfapi_nr_config_request_t *config,
+ nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms) {
int k,l,m;
//int16_t a;
@@ -243,7 +243,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
///Payload generation
memset((void *)pbch, 0, sizeof(NR_gNB_PBCH));
pbch->pbch_a=0;
-
+ uint8_t *pbch_pdu = (uint8_t*)&ssb_pdu->ssb_pdu_rel15.bchPayload;
for (int i=0; ipbch_a |= ((pbch_pdu[2-(i>>3)]>>(7-(i&7)))&1)<pbch_a |= ((ssb_index>>(5-i))&1)<<(29+i); // resp. 6th, 5th and 4th bits of ssb_index
else
- pbch->pbch_a |= ((config->sch_config.ssb_subcarrier_offset.value>>4)&1)<<29; //MSB of k_SSB (bit index 4)
+ pbch->pbch_a |= ((config->ssb_table.ssb_subcarrier_offset.value>>4)&1)<<29; //MSB of k_SSB (bit index 4)
LOG_D(PHY,"After extra byte: pbch_a = 0x%08x\n",pbch->pbch_a);
@@ -287,7 +287,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3);
nushift = (((sfn>>2)&1)<<1) ^ ((sfn>>1)&1);
pbch->pbch_a_prime = 0;
- nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 0, unscrambling_mask);
+ nr_pbch_scrambling(pbch, (uint32_t)config->cell_config.phy_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 0, unscrambling_mask);
#ifdef DEBUG_PBCH_ENCODING
printf("Payload scrambling: nushift %d M %d sfn3 %d sfn2 %d\n", nushift, M, (sfn>>2)&1, (sfn>>1)&1);
printf("pbch_a_prime: 0x%08x\n", pbch->pbch_a_prime);
@@ -298,7 +298,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
a_reversed |= (((uint64_t)pbch->pbch_a_prime>>i)&1)<<(31-i);
/// CRC, coding and rate matching
- polar_encoder_fast (&a_reversed, (uint32_t *)pbch->pbch_e, 0,
+ polar_encoder_fast (&a_reversed, (uint32_t *)pbch->pbch_e, 0, 0,
nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL)
);
#ifdef DEBUG_PBCH_ENCODING
@@ -312,7 +312,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
/// Scrambling
M = NR_POLAR_PBCH_E;
nushift = (Lmax==4)? ssb_index&3 : ssb_index&7;
- nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 1, 0);
+ nr_pbch_scrambling(pbch, (uint32_t)config->cell_config.phy_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 1, 0);
#ifdef DEBUG_PBCH_ENCODING
printf("Scrambling:\n");
@@ -333,7 +333,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
}
/// Resource mapping
- nushift = config->sch_config.physical_cell_id.value &3;
+ nushift = config->cell_config.phy_cell_id.value &3;
// PBCH modulated symbols are mapped within the SSB block on symbols 1, 2, 3 excluding the subcarriers used for the PBCH DMRS
///symbol 1 [0:239] -- 180 mod symbols
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier;
diff --git a/openair1/PHY/NR_TRANSPORT/nr_pss.c b/openair1/PHY/NR_TRANSPORT/nr_pss.c
index e0d7b6ae33..be9e011e60 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_pss.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_pss.c
@@ -28,7 +28,7 @@ int nr_generate_pss( int16_t *d_pss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
- nfapi_nr_config_request_t* config,
+ nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int i,k,l,m;
@@ -36,7 +36,7 @@ int nr_generate_pss( int16_t *d_pss,
int16_t x[NR_PSS_LENGTH];
const int x_initial[7] = {0, 1, 1 , 0, 1, 1, 1};
- uint8_t Nid2 = config->sch_config.physical_cell_id.value % 3;
+ uint8_t Nid2 = config->cell_config.phy_cell_id.value % 3;
/// Sequence generation
for (i=0; i < 7; i++)
diff --git a/openair1/PHY/NR_TRANSPORT/nr_sss.c b/openair1/PHY/NR_TRANSPORT/nr_sss.c
index 154aca9ffe..7d8b551d7c 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_sss.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_sss.c
@@ -27,7 +27,7 @@ int nr_generate_sss( int16_t *d_sss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
- nfapi_nr_config_request_t* config,
+ nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int i,k,l;
@@ -39,7 +39,7 @@ int nr_generate_sss( int16_t *d_sss,
const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
/// Sequence generation
- Nid = config->sch_config.physical_cell_id.value;
+ Nid = config->cell_config.phy_cell_id.value;
Nid2 = Nid % 3;
Nid1 = (Nid - Nid2)/3;
diff --git a/openair1/PHY/NR_TRANSPORT/nr_transport.h b/openair1/PHY/NR_TRANSPORT/nr_transport.h
index d94b73245e..32fa68f832 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_transport.h
+++ b/openair1/PHY/NR_TRANSPORT/nr_transport.h
@@ -36,7 +36,7 @@ int nr_generate_pss( int16_t *d_pss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
- nfapi_nr_config_request_t *config,
+ nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -49,7 +49,7 @@ int nr_generate_sss( int16_t *d_sss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
- nfapi_nr_config_request_t *config,
+ nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -62,7 +62,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
- nfapi_nr_config_request_t *config,
+ nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -85,7 +85,7 @@ void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
@returns 0 on success
*/
int nr_generate_pbch(NR_gNB_PBCH *pbch,
- uint8_t *pbch_pdu,
+ nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
uint8_t *interleaver,
int32_t *txdataF,
int16_t amp,
@@ -94,7 +94,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t Lmax,
uint8_t ssb_index,
int sfn,
- nfapi_nr_config_request_t *config,
+ nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -105,12 +105,12 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
*/
void nr_init_pbch_interleaver(uint8_t *interleaver);
-NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
+NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
+ unsigned char Kmimo,
unsigned char Mdlharq,
uint32_t Nsoft,
uint8_t abstraction_flag,
- NR_DL_FRAME_PARMS *frame_parms,
- nfapi_nr_config_request_t *config);
+ uint16_t N_RB);
void rx_nr_prach(PHY_VARS_gNB *gNB,
int frame,
diff --git a/openair1/PHY/NR_TRANSPORT/nr_transport_proto.h b/openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
index aa5d16f613..8d220a76bb 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
+++ b/openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
@@ -190,4 +190,19 @@ void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
uint32_t nb_rb,
uint32_t nb_re,
uint8_t symbol,
- uint8_t mod_order);
\ No newline at end of file
+ uint8_t mod_order);
+
+void nr_fill_ulsch(PHY_VARS_gNB *gNB,
+ int frame,
+ int slot,
+ nfapi_nr_pusch_pdu_t *ulsch_pdu);
+
+uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx);
+
+uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx);
+
+uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx);
+
+uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx);
+
+uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx);
diff --git a/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c b/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
index 3b79d425ad..6e991faf37 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
@@ -48,9 +48,10 @@
#include "common/utils/LOG/log.h"
#include
//#define DEBUG_ULSCH_DECODING
+#define gNB_DEBUG_TRACE
#define OAI_UL_LDPC_MAX_NUM_LLR 27000//26112 // NR_LDPC_NCOL_BG1*NR_LDPC_ZMAX = 68*384
-#define PRINT_CRC_CHECK
+//#define PRINT_CRC_CHECK
static uint64_t nb_total_decod =0;
static uint64_t nb_error_decod =0;
@@ -270,6 +271,10 @@ void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch)
}
}
+#ifdef PRINT_CRC_CHECK
+ static uint32_t prnt_crc_cnt = 0;
+#endif
+
uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
uint8_t UE_id,
short *ulsch_llr,
@@ -289,7 +294,12 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
uint8_t crc_type;
int8_t llrProcBuf[OAI_UL_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
- NR_gNB_ULSCH_t *ulsch = phy_vars_gNB->ulsch[UE_id+1][0];
+#ifdef PRINT_CRC_CHECK
+ prnt_crc_cnt++;
+#endif
+
+
+ NR_gNB_ULSCH_t *ulsch = phy_vars_gNB->ulsch[UE_id][0];
NR_UL_gNB_HARQ_t *harq_process = ulsch->harq_processes[harq_pid];
nfapi_nr_ul_config_ulsch_pdu_rel15_t *nfapi_ulsch_pdu_rel15 = &harq_process->ulsch_pdu.ulsch_pdu_rel15;
@@ -583,12 +593,14 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
if (check_crc((uint8_t*)llrProcBuf,length_dec,harq_process->F,crc_type)) {
#ifdef PRINT_CRC_CHECK
- LOG_I(PHY, "Segment %d CRC OK\n",r);
+ //if (prnt_crc_cnt % 10 == 0)
+ LOG_I(PHY, "Segment %d CRC OK\n",r);
#endif
ret = no_iteration_ldpc;
} else {
#ifdef PRINT_CRC_CHECK
- LOG_I(PHY, "CRC NOK\n");
+ //if (prnt_crc_cnt%10 == 0)
+ LOG_I(PHY, "CRC NOK\n");
#endif
ret = ulsch->max_ldpc_iterations + 1;
}
@@ -634,9 +646,9 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
if (err_flag == 1) {
-#if gNB_DEBUG_TRACE
- LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
- phy_vars_gNB->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
+#ifdef gNB_DEBUG_TRACE
+ LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d) Kr %d r %d\n",
+ phy_vars_gNB->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,Kr,r);
#endif
// harq_process->harq_ack.ack = 0;
@@ -662,9 +674,9 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
} else {
-#if gNB_DEBUG_TRACE
- LOG_I(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
- phy_vars_gNB->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
+#ifdef gNB_DEBUG_TRACE
+ LOG_I(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d TBS %d\n",
+ phy_vars_gNB->Mod_id,nr_tti_rx,harq_process->TBS);
#endif
harq_process->status = SCH_IDLE;
diff --git a/openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c b/openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
index e1b3c5cec9..b961b592d5 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
@@ -973,7 +973,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t first_symbol_flag, aarx, aatx, pilots; // pilots, a flag to indicate DMRS REs in current symbol
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
- nfapi_nr_ul_config_ulsch_pdu_rel15_t *rel15_ul = &gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->ulsch_pdu.ulsch_pdu_rel15;
+ nfapi_nr_ul_config_ulsch_pdu_rel15_t *rel15_ul = &gNB->ulsch[UE_id][0]->harq_processes[harq_pid]->ulsch_pdu.ulsch_pdu_rel15;
uint32_t nb_re_pusch, bwp_start_subcarrier;
int avgs;
int avg[4];
@@ -986,7 +986,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
first_symbol_flag = 1;
}
- if (symbol == 2){ // [hna] here it is assumed that symbol 2 carries 6 DMRS REs (dmrs-type 1)
+ if (symbol == rel15_ul->start_symbol){ // [hna] here it is assumed that first carries 6 DMRS REs (dmrs-type 1)
nb_re_pusch = rel15_ul->number_rbs * 6;
pilots = 1;
} else {
@@ -1026,7 +1026,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
nr_ulsch_scale_channel(gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
frame_parms,
- gNB->ulsch[UE_id+1],
+ gNB->ulsch[UE_id],
symbol,
pilots,
rel15_ul->number_rbs);
diff --git a/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.c b/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.c
index 90ef3b0d44..eeee55ea3f 100644
--- a/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.c
+++ b/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.c
@@ -123,6 +123,30 @@ short filt8_m0[8] = {
short filt8_mm0[8]= {
0,0,0,8192,16384,8192,0,0};
+short filt8_dcma[8]= {
+16384,12288,8192,4096,4096,0,0,0};
+
+short filt8_dcmb[8]= {
+0,4096,8192,4096,4096,0,0,0};
+
+short filt8_dcmc[8]= {
+0,0,0,4096,4096,8192,4096,0};
+
+short filt8_dcmd[8]= {
+0,0,0,4096,4096,8192,12288,16384};
+
+short filt8_dcl0[8]= {
+0,0,16384,12288,8192,4096,0,0};
+
+short filt8_dcr0[8]= {
+0,0,0,4096,8192,12288,16384,0};
+
+short filt8_dcl0_h[8]= {
+16384,12288,8192,4096,0,0,0,0};
+
+short filt8_dcr0_h[8]= {
+0,4096,8192,12288,16384,0,0,0};
+
short filt8_l1[8] = {
24576,16384,0,0,0,0,0,0};
@@ -136,4 +160,16 @@ short filt8_m1[8] = {
0,0,8192,16384,8192,0,0,0};
short filt8_mm1[8]= {
-0,0,0,0,8192,16384,8192,0};
\ No newline at end of file
+0,0,0,0,8192,16384,8192,0};
+
+short filt8_dcl1[8]= {
+0,0,0,16384,12288,8192,4096,0};
+
+short filt8_dcr1[8]= {
+0,0,0,0,4096,8192,12288,16384};
+
+short filt8_dcl1_h[8]= {
+0,16384,12288,8192,4096,0,0,0};
+
+short filt8_dcr1_h[8]= {
+0,0,4096,8192,12288,16384,0,0};
diff --git a/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.h b/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.h
index 9fcad87d7e..f64aebeb52 100644
--- a/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.h
+++ b/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.h
@@ -91,6 +91,22 @@ extern short filt8_m0[8];
extern short filt8_mm0[8];
+extern short filt8_dcma[8];
+
+extern short filt8_dcmb[8];
+
+extern short filt8_dcmc[8];
+
+extern short filt8_dcmd[8];
+
+extern short filt8_dcl0[8];
+
+extern short filt8_dcr0[8];
+
+extern short filt8_dcl0_h[8];
+
+extern short filt8_dcr0_h[8];
+
extern short filt8_l1[8];
extern short filt8_ml1[8];
@@ -101,4 +117,11 @@ extern short filt8_m1[8];
extern short filt8_mm1[8];
-#endif
\ No newline at end of file
+extern short filt8_dcl1[8];
+
+extern short filt8_dcr1[8];
+
+extern short filt8_dcl1_h[8];
+
+extern short filt8_dcr1_h[8];
+#endif
diff --git a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
index 47347e3c19..6ab6a73866 100644
--- a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+++ b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
@@ -98,8 +98,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
#endif
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
@@ -114,8 +113,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
#endif
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
current_ssb->c_re +=ch[0];
@@ -126,8 +124,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
#endif
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
for (pilot_cnt=3; pilot_cnt<(3*20); pilot_cnt+=3) {
@@ -138,8 +135,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
// in 2nd symbol, skip middle REs (48 with DMRS, 144 for SSS, and another 48 with DMRS)
if (dmrss == 1 && pilot_cnt == 12) {
pilot_cnt=48;
- //re_offset = (re_offset+144)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 144) : (re_offset+144);
+ re_offset = (re_offset+144) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
}
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -153,8 +149,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
#endif
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
@@ -168,8 +163,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
@@ -184,8 +178,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
#endif
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
}
@@ -313,8 +306,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
16);
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
//for (int i= 0; i<8; i++)
@@ -332,8 +324,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
16);
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -348,8 +339,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
16);
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
dl_ch+=24;
@@ -361,8 +351,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
// in 2nd symbol, skip middle REs (48 with DMRS, 144 for SSS, and another 48 with DMRS)
if (dmrss == 1 && pilot_cnt == 12) {
pilot_cnt=48;
- //re_offset = (re_offset+144)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 144) : (re_offset+144);
+ re_offset = (re_offset+144) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
dl_ch += 288;
}
@@ -381,8 +370,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
// printf("pilot_cnt %d dl_ch %d %d\n", pilot_cnt, dl_ch+i, *(dl_ch+i));
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
@@ -397,8 +385,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
16);
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
@@ -414,8 +401,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
16);
pil+=2;
- //re_offset = (re_offset+4)&(ue->frame_parms.ofdm_symbol_size-1);
- re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 4) : (re_offset+4);
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+re_offset)];
dl_ch+=24;
@@ -665,11 +651,12 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pdsch)
{
- int pilot[1320] __attribute__((aligned(16)));
+ int pilot[3280] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
- int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*fr,*fml,*fmr,*fmm;
+ int16_t ch[2],*pil,*rxF,*dl_ch;
+ int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh;
int ch_offset,symbol_offset;
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
@@ -704,6 +691,10 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
fmm = filt8_mm0;
fml = filt8_m0;
fmr = filt8_mr0;
+ fdcl = filt8_dcl0;
+ fdcr = filt8_dcr0;
+ fdclh = filt8_dcl0_h;
+ fdcrh = filt8_dcr0_h;
break;
case 1:
@@ -713,6 +704,10 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
fmm = filt8_mm1;
fml = filt8_ml1;
fmr = filt8_m1;
+ fdcl = filt8_dcl1;
+ fdcr = filt8_dcr1;
+ fdclh = filt8_dcl1_h;
+ fdcrh = filt8_dcr1_h;
break;
default:
@@ -730,7 +725,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
for (aarx=0; aarxframe_parms.nb_antennas_rx; aarx++) {
pil = (int16_t *)&pilot[rb_offset*((config_type==0) ? 6:4)];
- k = k&(ue->frame_parms.ofdm_symbol_size-1);
+ k = k % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
@@ -760,8 +755,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
8);
pil+=2;
- re_offset = (re_offset+2)&(ue->frame_parms.ofdm_symbol_size-1);
- //re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 2) : (re_offset+2);
+ re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
//for (int i= 0; i<8; i++)
//printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
@@ -776,8 +770,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
8);
pil+=2;
- re_offset = (re_offset+2)&(ue->frame_parms.ofdm_symbol_size-1);
- //re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 2) : (re_offset+2);
+ re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
//printf("dl_ch addr %p\n",dl_ch);
@@ -795,8 +788,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
//printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
pil+=2;
- re_offset = (re_offset+2)&(ue->frame_parms.ofdm_symbol_size-1);
- //re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 2) : (re_offset+2);
+ re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
dl_ch+=8;
@@ -816,8 +808,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
8);
pil+=2;
- re_offset = (re_offset+2)&(ue->frame_parms.ofdm_symbol_size-1);
- //re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 2) : (re_offset+2);
+ re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -830,15 +821,14 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
8);
pil+=2;
- re_offset = (re_offset+2)&(ue->frame_parms.ofdm_symbol_size-1);
- //re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 2) : (re_offset+2);
+ re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
dl_ch+=8;
}
// Treat first 2 pilots specially (right edge)
- ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
+ ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PDSCH
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
@@ -852,8 +842,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
//printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
pil+=2;
- re_offset = (re_offset+2)&(ue->frame_parms.ofdm_symbol_size-1);
- //re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 2) : (re_offset+2);
+ re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -868,8 +857,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
8);
pil+=2;
- re_offset = (re_offset+2)&(ue->frame_parms.ofdm_symbol_size-1);
- //re_offset = (re_offset >= ue->frame_parms.ofdm_symbol_size) ? (re_offset - ue->frame_parms.ofdm_symbol_size + 2) : (re_offset+2);
+ re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
dl_ch+=8;
@@ -883,7 +871,70 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
8);
//}
+
+ // check if PRB crosses DC and improve estimates around DC
+ if ((bwp_start_subcarrier >= ue->frame_parms.ofdm_symbol_size/2) && (bwp_start_subcarrier+nb_rb_pdsch*12 >= ue->frame_parms.ofdm_symbol_size)) {
+ dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
+ uint16_t idxDC = 2*(ue->frame_parms.ofdm_symbol_size - bwp_start_subcarrier);
+ uint16_t idxPil = idxDC/2;
+ re_offset = k;
+ pil = (int16_t *)&pilot[rb_offset*((config_type==0) ? 6:4)];
+ pil += (idxPil-2);
+ dl_ch += (idxDC-4);
+ dl_ch = memset(dl_ch, 0, sizeof(int16_t)*10);
+ re_offset = (re_offset+idxDC/2-2) % ue->frame_parms.ofdm_symbol_size;
+ rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
+ ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
+ ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
+
+ // for proper allignment of SIMD vectors
+ if((ue->frame_parms.N_RB_DL&1)==0) {
+
+ multadd_real_vector_complex_scalar(fdcl,
+ ch,
+ dl_ch-4,
+ 8);
+
+ pil += 4;
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
+ rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
+ ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
+ ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
+
+ multadd_real_vector_complex_scalar(fdcr,
+ ch,
+ dl_ch-4,
+ 8);
+ } else {
+ multadd_real_vector_complex_scalar(fdclh,
+ ch,
+ dl_ch,
+ 8);
+
+ pil += 4;
+ re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
+ rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
+ ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
+ ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
+
+ multadd_real_vector_complex_scalar(fdcrh,
+ ch,
+ dl_ch,
+ 8);
+ }
+
+ }
+
+#ifdef DEBUG_PDSCH
+ dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
+ for(uint16_t idxP=0; idxPe_rx[CCEind*9*6*2],
dci_estimation,
+ 1,
currentPtrDCI);
crc = decoderState;
//crc = (crc16(&dci_decoded_output[current_thread_id][0], sizeof_bits) >> 16) ^ extract_crc(&dci_decoded_output[current_thread_id][0], sizeof_bits);
diff --git a/openair1/PHY/NR_UE_TRANSPORT/dmrs_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dmrs_nr.c
index d976ec5a04..4d77854a70 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/dmrs_nr.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/dmrs_nr.c
@@ -258,7 +258,7 @@ uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position) {
*
*********************************************************************/
-uint16_t get_dmrs_freq_idx_ul(uint8_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type) {
+uint16_t get_dmrs_freq_idx_ul(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type) {
uint16_t dmrs_idx;
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
index 48156a0233..9928bdad77 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
@@ -569,13 +569,13 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
// Fixme: correct type is unsigned, but nrLDPC_decoder and all called behind use signed int
if (check_crc((uint8_t*)llrProcBuf,length_dec,harq_process->F,crc_type)) {
- printf("\x1B[34m" "Segment %d CRC OK\n",r);
+ printf("\x1B[34m" "Segment %d CRC OK\n\033[0m",r);
//Temporary hack
no_iteration_ldpc = dlsch->max_ldpc_iterations;
ret = no_iteration_ldpc;
}
else {
- printf("\x1B[33m" "CRC NOK\n");
+ printf("\x1B[33m" "CRC NOK\n\033[0m");
ret = 1 + dlsch->max_ldpc_iterations;
}
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c b/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
index 3d8ec866c6..1e17f6dab0 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
@@ -538,7 +538,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_E,0,0);
//polar decoding de-rate matching
const t_nrPolar_params *currentPtr = nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL);
- decoderState = polar_decoder_int16(pbch_e_rx,(uint64_t *)&nr_ue_pbch_vars->pbch_a_prime,currentPtr);
+ decoderState = polar_decoder_int16(pbch_e_rx,(uint64_t *)&nr_ue_pbch_vars->pbch_a_prime,0,currentPtr);
if(decoderState) return(decoderState);
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
index 6ed28a9b36..dd0cd4cf01 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
@@ -256,7 +256,7 @@ typedef struct {
/// DLSCH status flag indicating
SCH_status_t status;
/// Dynamic Configuration from FAPI
- nfapi_nr_dl_config_dlsch_pdu_rel15_t dl_config_pdu;
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t dl_config_pdu;
/// Transport block size
uint32_t TBS;
/// The payload + CRC size in bits
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
index f8c9c83e78..12aaebc917 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
@@ -145,8 +145,10 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
// to be removed later when MAC is ready
if (harq_process_ul_ue != NULL){
- for (i = 0; i < harq_process_ul_ue->TBS / 8; i++)
+ for (i = 0; i < harq_process_ul_ue->TBS / 8; i++) {
harq_process_ul_ue->a[i] = (unsigned char) rand();
+ //printf("input encoder a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
+ }
} else {
LOG_E(PHY, "[phy_procedures_nrUE_TX] harq_process_ul_ue is NULL !!\n");
return;
diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h
index 373eca1b9e..3d49914c36 100644
--- a/openair1/PHY/defs_gNB.h
+++ b/openair1/PHY/defs_gNB.h
@@ -61,29 +61,6 @@ typedef struct {
} NR_PBCH_parms_t;
-typedef struct {
- /// Length of DCI payload in bits
- uint16_t size;
- /// Aggregation level
- uint8_t L;
- /// HARQ PID
- uint8_t harq_pid;
- /// PDCCH parameters
- nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params;
- /// CCE list
- nr_cce_t cce_list[NR_MAX_PDCCH_AGG_LEVEL];
- /// DCI pdu
- uint64_t dci_pdu[2];
-} NR_gNB_DCI_ALLOC_t;
-
-
-typedef struct {
- uint8_t num_dci;
- uint8_t num_pdsch_rnti;
- NR_gNB_DCI_ALLOC_t dci_alloc[256];
-} NR_gNB_PDCCH;
-
-
typedef enum {
NR_SCH_IDLE,
NR_ACTIVE,
@@ -94,7 +71,7 @@ typedef enum {
typedef struct {
/// Nfapi DLSCH PDU
- nfapi_nr_dl_config_dlsch_pdu dlsch_pdu;
+ nfapi_nr_dl_tti_pdsch_pdu pdsch_pdu;
/// pointer to pdu from MAC interface (this is "a" in 36.212)
uint8_t *pdu;
/// The payload + CRC size in bits, "B" from 36-212
@@ -621,12 +598,13 @@ typedef struct PHY_VARS_gNB_s {
int rx_total_gain_dB;
int (*nr_start_if)(struct RU_t_s *ru, struct PHY_VARS_gNB_s *gNB);
uint8_t local_flag;
- nfapi_nr_config_request_t gNB_config;
+ nfapi_nr_config_request_scf_t gNB_config;
NR_DL_FRAME_PARMS frame_parms;
PHY_MEASUREMENTS_gNB measurements;
NR_IF_Module_t *if_inst;
NR_UL_IND_t UL_INFO;
pthread_mutex_t UL_INFO_mutex;
+
/// NFAPI RX ULSCH information
nfapi_rx_indication_pdu_t rx_pdu_list[NFAPI_RX_IND_MAX_PDU];
/// NFAPI RX ULSCH CRC information
@@ -642,19 +620,21 @@ typedef struct PHY_VARS_gNB_s {
/// NFAPI PRACH information
nfapi_preamble_pdu_t preamble_list[MAX_NUM_RX_PRACH_PREAMBLES];
- Sched_Rsp_t Sched_INFO;
- NR_gNB_PDCCH pdcch_vars;
- NR_gNB_PBCH pbch;
- // LTE_eNB_PHICH phich_vars[2];
+ //Sched_Rsp_t Sched_INFO;
+ nfapi_nr_ul_tti_request_t UL_tti_req;
+
+ nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu;
+ nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu;
+ nfapi_nr_dl_tti_ssb_pdu *ssb_pdu;
- NR_gNB_COMMON common_vars;
-/* LTE_eNB_UCI uci_vars[NUMBER_OF_UE_MAX];
- LTE_eNB_SRS srs_vars[NUMBER_OF_UE_MAX];*/
+ int num_pdsch_rnti;
+ NR_gNB_PBCH pbch;
+ nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
+ NR_gNB_COMMON common_vars;
NR_gNB_PRACH prach_vars;
NR_gNB_PUSCH *pusch_vars[NUMBER_OF_UE_MAX];
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; // Nusers times two spatial streams
- NR_gNB_ULSCH_t *ulsch[NUMBER_OF_NR_ULSCH_MAX+1][2]; // [Nusers times + number of RA][2 codewords], index 0 in [NUMBER_OF_UE_MAX+1] is for RA
- // LTE_eNB_ULSCH_t *ulsch[NUMBER_OF_UE_MAX+1]; // Nusers + number of RA
+ NR_gNB_ULSCH_t *ulsch[NUMBER_OF_NR_ULSCH_MAX][2]; // [Nusers times][2 codewords]
NR_gNB_DLSCH_t *dlsch_SI,*dlsch_ra,*dlsch_p;
NR_gNB_DLSCH_t *dlsch_PCH;
/*
@@ -662,7 +642,7 @@ typedef struct PHY_VARS_gNB_s {
LTE_eNB_UE_stats *UE_stats_ptr[NUMBER_OF_UE_MAX];
*/
uint8_t pbch_configured;
- uint8_t pbch_pdu[4]; //PBCH_PDU_SIZE
+ // uint8_t pbch_pdu[4]; //PBCH_PDU_SIZE
char gNB_generate_rar;
/// NR synchronization sequences
diff --git a/openair1/PHY/defs_nr_UE.h b/openair1/PHY/defs_nr_UE.h
index 2d73aafa3c..1fa1bf3fe4 100644
--- a/openair1/PHY/defs_nr_UE.h
+++ b/openair1/PHY/defs_nr_UE.h
@@ -994,7 +994,7 @@ typedef struct {
uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
/// PDSCH DMRS
- uint32_t nr_gold_pdsch[2][20][2][52];
+ uint32_t nr_gold_pdsch[2][20][2][NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD];
/// PDCCH DMRS
uint32_t nr_gold_pdcch[7][20][3][52];
diff --git a/openair1/PHY/defs_nr_common.h b/openair1/PHY/defs_nr_common.h
index 41509e65c1..539539eb89 100644
--- a/openair1/PHY/defs_nr_common.h
+++ b/openair1/PHY/defs_nr_common.h
@@ -35,7 +35,7 @@
#include "PHY/impl_defs_top.h"
#include "defs_common.h"
-#include "nfapi_nr_interface.h"
+#include "nfapi_nr_interface_scf.h"
#include "impl_defs_nr.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
@@ -226,10 +226,10 @@ typedef struct {
typedef struct NR_DL_FRAME_PARMS {
/// frequency range
nr_frequency_range_e freq_range;
- /// Placeholder to replace overlapping fields below
- nfapi_nr_rf_config_t rf_config;
+ // /// Placeholder to replace overlapping fields below
+ // nfapi_nr_rf_config_t rf_config;
/// Placeholder to replace SSB overlapping fields below
- nfapi_nr_sch_config_t sch_config;
+ // nfapi_nr_sch_config_t sch_config;
/// Number of resource blocks (RB) in DL
int N_RB_DL;
/// Number of resource blocks (RB) in UL
@@ -241,9 +241,9 @@ typedef struct NR_DL_FRAME_PARMS {
/// EUTRA Band
uint16_t eutra_band;
/// DL carrier frequency
- uint32_t dl_CarrierFreq;
+ uint64_t dl_CarrierFreq;
/// UL carrier frequency
- uint32_t ul_CarrierFreq;
+ uint64_t ul_CarrierFreq;
/// TX attenuation
uint32_t att_tx;
/// RX attenuation
@@ -321,6 +321,8 @@ typedef struct NR_DL_FRAME_PARMS {
/// TDD configuration
uint16_t tdd_uplink_nr[2*NR_MAX_SLOTS_PER_FRAME]; /* this is a bitmap of symbol of each slot given for 2 frames */
+ uint8_t half_frame_bit;
+
//SSB related params
/// Start in Subcarrier index of the SSB block
uint16_t ssb_start_subcarrier;
diff --git a/openair1/SCHED_NR/fapi_nr_l1.c b/openair1/SCHED_NR/fapi_nr_l1.c
index 82f1e66d0b..063b56564d 100644
--- a/openair1/SCHED_NR/fapi_nr_l1.c
+++ b/openair1/SCHED_NR/fapi_nr_l1.c
@@ -30,31 +30,25 @@
* \warning
*/
#include "fapi_nr_l1.h"
+#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
-int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req);
-int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req);
extern uint8_t nfapi_mode;
-void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
- nfapi_nr_dl_config_request_pdu_t *dl_config_pdu,
- uint8_t *sdu)
+void handle_nr_nfapi_ssb_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
+ nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu)
{
- AssertFatal(dl_config_pdu->bch_pdu_rel15.length == 3, "BCH PDU has length %d != 3\n",
- dl_config_pdu->bch_pdu_rel15.length);
+ AssertFatal(dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag== 1, "bchPayloadFlat %d != 1\n",
+ dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag);
- LOG_D(PHY,"pbch_pdu[0]: %x,pbch_pdu[1]: %x,gNB->pbch_pdu[2]: %x\n",sdu[0],sdu[1],sdu[2]);
- gNB->pbch_pdu[0] = sdu[2];
- gNB->pbch_pdu[1] = sdu[1];
- gNB->pbch_pdu[2] = sdu[0];
-
- // adjust transmit amplitude here based on NFAPI info
+ LOG_I(PHY,"%d.%d : pbch_pdu: %x\n",frame,slot,dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload,dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex);
+ gNB->ssb_pdu = &dl_tti_pdu->ssb_pdu;
}
-/*void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int subframe,gNB_L1_rxtx_proc_t *proc,
+/*void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int subframe,gNB_L1_rxtx_proc_t *proc,
uint8_t codeword_index,
uint8_t *sdu)
{
@@ -84,7 +78,7 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
//AssertFatal(sdu!=NULL,"NFAPI: SFN/SF:%04d%d proc:TX:[frame %d subframe %d]: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d dlsch0_harq[round:%d SFN/SF:%d%d pdu:%p mcs:%d ndi:%d pdschstart:%d]\n",
// frame,subframe,
// proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid,
- // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe,dlsch0_harq->pdu,dlsch0_harq->mcs,dlsch0_harq->ndi,dlsch0_harq->pdsch_start);
+ // dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel8.pdu_index,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe,dlsch0_harq->pdu,dlsch0_harq->mcs,dlsch0_harq->ndi,dlsch0_harq->pdsch_start);
if (codeword_index == 0) dlsch0_harq->pdu = sdu;
else dlsch1_harq->pdu = sdu;
LOG_I(PHY, "SFN/SF: %d/%d DLSCH PDU filled \n",frame, subframe);
@@ -93,29 +87,43 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
}*/
-void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
- int frame, int slot,
- nfapi_nr_dl_config_dci_dl_pdu *dci_dl_pdu) {
- int idx = slot&1;
- NR_gNB_PDCCH *pdcch_vars = &gNB->pdcch_vars;
+void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB,
+ int frame, int slot,
+ nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu) {
- LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, slot, idx, pdcch_vars->num_dci);
+ LOG_D(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci);
// copy dci configuration into gNB structure
- nr_fill_dci(gNB,frame,slot,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],dci_dl_pdu);
+ gNB->pdcch_pdu = pdcch_pdu;
+
+ nr_fill_dci(gNB,frame,slot);
+
- LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, slot, idx, pdcch_vars->num_dci);
}
+void handle_nfapi_nr_ul_dci_pdu(PHY_VARS_gNB *gNB,
+ int frame, int slot,
+ nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu) {
-void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
- nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
+ LOG_D(PHY,"Frame %d, Slot %d: UL DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15.numDlDci);
+
+ // copy dci configuration into gNB structure
+ gNB->ul_dci_pdu = ul_dci_request_pdu;
+
+ nr_fill_ul_dci(gNB,frame,slot);
+
+
+
+}
+
+void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
+ nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu)
{
- nr_fill_dlsch(gNB,frame,slot,dlsch_pdu,sdu);
+ nr_fill_dlsch(gNB,frame,slot,pdsch_pdu,sdu);
}
@@ -125,9 +133,10 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
// copy data from L2 interface into L1 structures
module_id_t Mod_id = Sched_INFO->module_id;
uint8_t CC_id = Sched_INFO->CC_id;
- nfapi_nr_dl_config_request_t *DL_req = Sched_INFO->DL_req;
- nfapi_tx_request_t *TX_req = Sched_INFO->TX_req;
- nfapi_nr_ul_config_request_t *UL_req = Sched_INFO->UL_req;
+ nfapi_nr_dl_tti_request_t *DL_req = Sched_INFO->DL_req;
+ nfapi_nr_tx_data_request_t *TX_req = Sched_INFO->TX_req;
+ nfapi_nr_ul_tti_request_t *UL_tti_req = Sched_INFO->UL_tti_req;
+ nfapi_nr_ul_dci_request_t *UL_dci_req = Sched_INFO->UL_dci_req;
frame_t frame = Sched_INFO->frame;
sub_frame_t slot = Sched_INFO->slot;
@@ -136,77 +145,68 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
gNB = RC.gNB[Mod_id];
- uint8_t number_dl_pdu = DL_req->dl_config_request_body.number_pdu;
- uint8_t number_ul_pdu = UL_req->ul_config_request_body.number_pdu;
+ uint8_t number_dl_pdu = DL_req->dl_tti_request_body.nPDUs;
+ uint8_t number_ul_pdu = UL_tti_req->n_pdus;
+ uint8_t number_ul_dci_pdu = UL_dci_req->numPdus;
-
- LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d \n",
+ LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d%d DL_req:SFN/SLO:%04d%d:dl_pdu:%d tx_req:SFN/SLOT:%04d%d:pdus:%d \n",
frame,slot,
- NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu,
- NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus);
+ DL_req->SFN,DL_req->Slot,number_dl_pdu,
+ TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs);
int do_oai =0;
int dont_send =0;
- gNB->pdcch_vars.num_dci = 0;
- gNB->pdcch_vars.num_pdsch_rnti = 0;
-
- gNB->pdcch_vars.num_dci=0;
+ int pdcch_received=0;
+ gNB->num_pdsch_rnti=0;
+ gNB->pdcch_pdu = NULL;
+ gNB->pbch_configured=0;
+ gNB->ssb_pdu=NULL;
for (int i=0;idl_config_request_body.dl_config_pdu_list[i];
- LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
- switch (dl_config_pdu->pdu_type) {
- case NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE:
- AssertFatal(dl_config_pdu->bch_pdu_rel15.pdu_index < TX_req->tx_request_body.number_of_pdus,
- "bch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)\n",
- dl_config_pdu->bch_pdu_rel15.pdu_index,
- TX_req->tx_request_body.number_of_pdus);
- gNB->pbch_configured=1;
+ nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
+ LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_tti_pdu->PDUType);
+ switch (dl_tti_pdu->PDUType) {
+ case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
+ gNB->pbch_configured=1;
do_oai=1;
- handle_nr_nfapi_bch_pdu(gNB,
- dl_config_pdu,
- TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->bch_pdu_rel15.pdu_index].segments[0].segment_data);
+ handle_nr_nfapi_ssb_pdu(gNB,frame,slot,
+ dl_tti_pdu);
+
break;
- case NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE:
- handle_nfapi_nr_dci_dl_pdu(gNB,
- frame, slot,
- &dl_config_pdu->dci_dl_pdu);
- gNB->pdcch_vars.num_dci++;
- gNB->pdcch_vars.num_pdsch_rnti++;
+ case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
+ AssertFatal(pdcch_received == 0, "pdcch_received is not 0, we can only handle one PDCCH PDU per slot\n");
+ handle_nfapi_nr_pdcch_pdu(gNB,
+ frame, slot,
+ &dl_tti_pdu->pdcch_pdu);
+
+ pdcch_received = 1;
do_oai=1;
break;
- case NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE:
+ case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
{
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel15;
- uint16_t pduIndex = dlsch_pdu_rel15->pduIndex;
- uint16_t tx_pdus = TX_req->tx_request_body.number_of_pdus;
- uint16_t invalid_pdu = pduIndex == -1;
- uint8_t *sdu = invalid_pdu ? NULL : pduIndex >= tx_pdus ? NULL : TX_req->tx_request_body.tx_pdu_list[pduIndex].segments[0].segment_data;
-
- AssertFatal(sdu!=NULL,"sdu is null, pduIndex %d, tx_pdus %d\n",pduIndex,tx_pdus);
- handle_nr_nfapi_dlsch_pdu(gNB,frame,slot,&dl_config_pdu->dlsch_pdu, sdu);
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
+ uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
+ uint16_t tx_pdus = TX_req->Number_of_PDUs;
+ AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
+ pduIndex,TX_req->pdu_list[pduIndex].num_TLV);
+ uint8_t *sdu = TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
+ handle_nr_nfapi_pdsch_pdu(gNB,frame,slot,&dl_tti_pdu->pdsch_pdu, sdu);
do_oai=1;
}
}
}
- if (nfapi_mode && do_oai && !dont_send) {
- oai_nfapi_tx_req(Sched_INFO->TX_req);
-
- oai_nfapi_nr_dl_config_req(Sched_INFO->DL_req); // DJP - .dl_config_request_body.dl_config_pdu_list[0]); // DJP - FIXME TODO - yuk - only copes with 1 pdu
+ memcpy(&gNB->UL_tti_req,UL_tti_req,sizeof(nfapi_nr_ul_tti_request_t));
+
+ for (int i=0;iul_dci_pdu_list[i]);
}
- for (int i=0;iul_config_request_body.ul_config_pdu_list[i];
- LOG_D(PHY,"NFAPI: ul_pdu %d : type %d\n",i,ul_config_pdu->pdu_type);
- switch (ul_config_pdu->pdu_type) {
- case NFAPI_NR_UL_CONFIG_ULSCH_PDU_TYPE:
- //handle_nr_nfapi_ulsch_pdu(gNB,frame,slot,&ul_config_pdu->ulsch_pdu);
- break;
- }
- }
+
}
diff --git a/openair1/SCHED_NR/fapi_nr_l1.h b/openair1/SCHED_NR/fapi_nr_l1.h
index 51169660bf..c35ae82c0b 100644
--- a/openair1/SCHED_NR/fapi_nr_l1.h
+++ b/openair1/SCHED_NR/fapi_nr_l1.h
@@ -34,15 +34,16 @@
#include "PHY/phy_extern.h"
#include "SCHED_NR/sched_nr.h"
#include "nfapi_nr_interface.h"
+#include "nfapi_nr_interface_scf.h"
void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO);
-void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
- int frame, int subframe,
- nfapi_nr_dl_config_dci_dl_pdu *dcl_dl_pdu);
+void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB,
+ int frame, int subframe,
+ nfapi_nr_dl_tti_pdcch_pdu *dcl_dl_pdu);
-void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
- nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
+void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
+ nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu);
void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t harq_pid);
diff --git a/openair1/SCHED_NR/nr_prach_procedures.c b/openair1/SCHED_NR/nr_prach_procedures.c
index 158fe38098..2c8abc4213 100644
--- a/openair1/SCHED_NR/nr_prach_procedures.c
+++ b/openair1/SCHED_NR/nr_prach_procedures.c
@@ -33,7 +33,7 @@
#include "PHY/defs_eNB.h"
#include "PHY/phy_extern.h"
#include "SCHED/sched_eNB.h"
-#include "nfapi_nr_interface.h"
+#include "nfapi_nr_interface_scf.h"
#include "fapi_nr_l1.h"
#include "nfapi_pnf.h"
#include "common/utils/LOG/log.h"
diff --git a/openair1/SCHED_NR/nr_ru_procedures.c b/openair1/SCHED_NR/nr_ru_procedures.c
index 05881eb2ea..0bce1676ce 100644
--- a/openair1/SCHED_NR/nr_ru_procedures.c
+++ b/openair1/SCHED_NR/nr_ru_procedures.c
@@ -113,7 +113,6 @@ void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols) {
void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
- nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
RU_proc_t *proc = &ru->proc;
struct timespec wait;
int slot = tti_tx;
@@ -123,12 +122,11 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
start_meas(&ru->ofdm_mod_stats);
- if (nr_slot_select(fp,frame_tx,slot) == SF_UL) return;
+ if (nr_slot_select(fp,frame_tx,slot) == NR_UPLINK_SLOT) return;
// this copy should be done in the precoding thread (currently inactive)
for (int aa=0;aanb_tx;aa++)
memcpy((void*)ru->common.txdataF_BF[aa],
-
(void*)ru->gNB_list[0]->common_vars.txdataF[aa], fp->samples_per_slot_wCP*sizeof(int32_t));
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
@@ -216,11 +214,11 @@ void nr_init_feptx_thread(RU_t *ru) {
void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
- nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
+ int cyclic_prefix_type = NFAPI_CP_NORMAL;
unsigned int aa=0;
int slot_sizeF = (fp->ofdm_symbol_size)*
- ((cfg->subframe_config.dl_cyclic_prefix_type.value == 1) ? 12 : 14);
+ ((cyclic_prefix_type == 1) ? 12 : 14);
int slot = tti_tx;
int *txdata = &ru->common.txdata[aa][slot*fp->samples_per_slot];
@@ -346,7 +344,7 @@ void nr_fep_full_2thread(RU_t *ru, int slot) {
// NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
// if ((fp->frame_type == TDD) &&
- // (subframe_select(fp,proc->tti_rx) != SF_UL)) return;
+ // (subframe_select(fp,proc->tti_rx) != NR_UPLINK_SLOT)) return;
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
@@ -405,7 +403,7 @@ void nr_fep_full(RU_t *ru, int slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
// if ((fp->frame_type == TDD) &&
- // (subframe_select(fp,proc->tti_rx) != SF_UL)) return;
+ // (subframe_select(fp,proc->tti_rx) != NR_UPLINK_SLOT)) return;
start_meas(&ru->ofdm_demod_stats);
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
diff --git a/openair1/SCHED_NR/phy_procedures_nr_common.c b/openair1/SCHED_NR/phy_procedures_nr_common.c
index 6ef1cff6f1..8d1f615569 100755
--- a/openair1/SCHED_NR/phy_procedures_nr_common.c
+++ b/openair1/SCHED_NR/phy_procedures_nr_common.c
@@ -33,4 +33,3 @@
#include "sched_nr.h"
#include "PHY/INIT/phy_init.h"
-
diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c
index fa1db7e780..6b05771a6a 100644
--- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c
+++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c
@@ -84,23 +84,22 @@ int return_ssb_type(nfapi_config_request_t *cfg)
-void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp) {
- fp->ssb_start_subcarrier = (12 * cfg->sch_config.n_ssb_crb.value + cfg->sch_config.ssb_subcarrier_offset.value)/(1<subframe_config.numerology_index_mu.value);
- LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,cfg->sch_config.n_ssb_crb.value,cfg->sch_config.ssb_subcarrier_offset.value);
+void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp) {
+ fp->ssb_start_subcarrier = (12 * cfg->ssb_table.ssb_offset_point_a.value + cfg->ssb_table.ssb_subcarrier_offset.value);
+ LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,cfg->ssb_table.ssb_offset_point_a.value,cfg->ssb_table.ssb_subcarrier_offset.value);
}
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
- nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
+ nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF;
- uint8_t *pbch_pdu=&gNB->pbch_pdu[0];
uint8_t ssb_index, n_hf;
int ssb_start_symbol, rel_slot;
- n_hf = cfg->sch_config.half_frame_index.value;
+ n_hf = fp->half_frame_bit;
// if SSB periodicity is 5ms, they are transmitted in both half frames
- if ( cfg->sch_config.ssb_periodicity.value == 5) {
+ if ( cfg->ssb_table.ssb_period.value == 0) {
if (slot<10)
n_hf=0;
else
@@ -113,35 +112,35 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot);
if(rel_slot<10 && rel_slot>=0) {
- for (int i=0; i<2; i++) { // max two SSB per frame
-
- ssb_index = i + 2*rel_slot; // computing the ssb_index
- if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
+ for (int i=0; i<2; i++) { // max two SSB per frame
+
+ ssb_index = i + 2*rel_slot; // computing the ssb_index
+ if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
- int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp, ssb_index, n_hf); // computing the starting symbol for current ssb
- ssb_start_symbol = ssb_start_symbol_abs % 14; // start symbol wrt slot
-
- nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
-
- LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
- nr_generate_pss(gNB->d_pss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
- nr_generate_sss(gNB->d_sss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
-
- if (fp->Lmax == 4)
- nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF[0], AMP, ssb_start_symbol, cfg, fp);
- else
- nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],txdataF[0], AMP, ssb_start_symbol, cfg, fp);
-
- nr_generate_pbch(&gNB->pbch,
- pbch_pdu,
- gNB->nr_pbch_interleaver,
- txdataF[0],
- AMP,
- ssb_start_symbol,
- n_hf,fp->Lmax,ssb_index,
- frame, cfg, fp);
- }
- }
+ int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp, ssb_index); // computing the starting symbol for current ssb
+ ssb_start_symbol = ssb_start_symbol_abs % 14; // start symbol wrt slot
+
+ nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
+
+ LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
+ nr_generate_pss(gNB->d_pss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
+ nr_generate_sss(gNB->d_sss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
+
+ if (fp->Lmax == 4)
+ nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF[0], AMP, ssb_start_symbol, cfg, fp);
+ else
+ nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],txdataF[0], AMP, ssb_start_symbol, cfg, fp);
+
+ nr_generate_pbch(&gNB->pbch,
+ gNB->ssb_pdu,
+ gNB->nr_pbch_interleaver,
+ txdataF[0],
+ AMP,
+ ssb_start_symbol,
+ n_hf,fp->Lmax,ssb_index,
+ frame, cfg, fp);
+ }
+ }
}
}
@@ -149,18 +148,17 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
int frame,int slot,
int do_meas) {
int aa;
- uint8_t num_dci=0,num_pdsch_rnti;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
- nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
+ nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int offset = gNB->CC_id;
- uint8_t ssb_frame_periodicity; // every how many frames SSB are generated
+ uint8_t ssb_frame_periodicity = 1; // every how many frames SSB are generated
- if (cfg->sch_config.ssb_periodicity.value < 20)
- ssb_frame_periodicity = 1;
- else
- ssb_frame_periodicity = (cfg->sch_config.ssb_periodicity.value)/10 ; // 10ms is the frame length
+
+
+ if (cfg->ssb_table.ssb_period.value > 1)
+ ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ; // 10ms is the frame length
- if ((cfg->subframe_config.duplex_mode.value == TDD) &&
+ if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
((nr_slot_select(fp,frame,slot)&NR_UPLINK_SLOT) > 0)) return;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1);
@@ -174,42 +172,36 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_COMMON_TX,1);
if (nfapi_mode == 0 || nfapi_mode == 1) {
- if (!(frame%ssb_frame_periodicity)) // generate SSB only for given frames according to SSB periodicity
+ if ((!(frame%ssb_frame_periodicity)) && (gNB->ssb_pdu)) // generate SSB only for given frames according to SSB periodicity
nr_common_signal_procedures(gNB,frame, slot);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_COMMON_TX,0);
- num_dci = gNB->pdcch_vars.num_dci;
- num_pdsch_rnti = gNB->pdcch_vars.num_pdsch_rnti;
- if (num_dci) {
- LOG_D(PHY, "[gNB %d] Frame %d slot %d \
- Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, slot, num_dci);
+ LOG_D(PHY, "[gNB %d] Frame %d slot %d \
+ Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, slot, gNB->pdcch_pdu->pdcch_pdu_rel15.numDlDci);
+
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,1);
+
+ if (gNB->pdcch_pdu || gNB->ul_dci_pdu) nr_generate_dci_top(gNB->pdcch_pdu,
+ gNB->ul_dci_pdu,
+ gNB->nr_gold_pdcch_dmrs[slot],
+ gNB->common_vars.txdataF[0],
+ AMP, *fp);
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,1);
- if (nfapi_mode == 0 || nfapi_mode == 1) {
- nr_generate_dci_top(gNB->pdcch_vars,
- gNB->nr_gold_pdcch_dmrs[slot],
- gNB->common_vars.txdataF[0],
- AMP, *fp, *cfg);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0);
- if (num_pdsch_rnti) {
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,1);
- LOG_D(PHY, "PDSCH generation started (%d)\n", num_pdsch_rnti);
- nr_generate_pdsch(gNB->dlsch[0][0],
- &gNB->pdcch_vars.dci_alloc[0],
- gNB->nr_gold_pdsch_dmrs[slot],
- gNB->common_vars.txdataF,
- AMP, frame, slot, fp,
- 0, // xOverhead
- cfg,
- &gNB->dlsch_encoding_stats,
- &gNB->dlsch_scrambling_stats,
- &gNB->dlsch_modulation_stats);
-
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
- }
- }
+
+ LOG_D(PHY, "PDSCH generation started (%d)\n", gNB->num_pdsch_rnti);
+ for (int i=0; inum_pdsch_rnti; i++) {
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,1);
+ nr_generate_pdsch(gNB->dlsch[i][0],
+ gNB->nr_gold_pdsch_dmrs[slot],
+ gNB->common_vars.txdataF,
+ AMP, frame, slot, fp, 0,
+ &gNB->dlsch_encoding_stats,
+ &gNB->dlsch_scrambling_stats,
+ &gNB->dlsch_modulation_stats);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,0);
@@ -231,10 +223,10 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH_id, uint8_t harq_pid)
{
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
- nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &gNB->ulsch[ULSCH_id+1][0]->harq_processes[harq_pid]->ulsch_pdu;
+ nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &gNB->ulsch[ULSCH_id][0]->harq_processes[harq_pid]->ulsch_pdu;
nfapi_nr_ul_config_ulsch_pdu_rel15_t *nfapi_ulsch_pdu_rel15 = &rel15_ul->ulsch_pdu_rel15;
- //uint8_t ret;
+ uint8_t ret;
uint32_t G;
int Nid_cell = 0; // [hna] shouldn't be a local variable (should be signaled)
@@ -259,8 +251,7 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
//--------------------- ULSCH decoding ---------------------
//----------------------------------------------------------
- //ret = nr_ulsch_decoding(gNB,
- nr_ulsch_decoding(gNB,
+ ret = nr_ulsch_decoding(gNB,
ULSCH_id,
gNB->pusch_vars[ULSCH_id]->llr,
frame_parms,
@@ -270,13 +261,15 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
harq_pid,
0);
- // if (ret > ulsch_gNB->max_ldpc_iterations)
- // n_errors++;
+ if (ret > gNB->ulsch[ULSCH_id][0]->max_ldpc_iterations)
+ LOG_I(PHY, "ULSCH in error\n");
+ else
+ LOG_I(PHY, "ULSCH received ok\n");
}
-void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t harq_pid)
+void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id, uint8_t harq_pid)
{
// --------------------
// [hna] TO BE CLEANED
@@ -302,7 +295,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
// pdu->rx_indication_rel8.offset = 1; // DJP - I dont understand - but broken unless 1 ???? 0; // filled in at the end of the UL_INFO formation
// pdu->data = gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->b;
// estimate timing advance for MAC
- sync_pos = nr_est_timing_advance_pusch(gNB, UE_id);
+ sync_pos = nr_est_timing_advance_pusch(gNB, ULSCH_id);
timing_advance_update = sync_pos; // - gNB->frame_parms.nb_prefix_samples/4; //to check
// printf("\x1B[33m" "timing_advance_update = %d\n" "\x1B[0m", timing_advance_update);
@@ -314,6 +307,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
// case 75: timing_advance_update /= 12; break;
case 106: timing_advance_update /= 16; break;
case 217: timing_advance_update /= 32; break;
+ case 273: timing_advance_update /= 32; break;
default: abort();
}
@@ -363,19 +357,36 @@ void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
}
+void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
-void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, uint8_t symbol_start, uint8_t symbol_end) {
+ nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req;
+ int num_pusch_pdu = UL_tti_req->n_pdus;
+
+ LOG_D(PHY,"phy_procedures_gNB_uespec_RX frame %d, slot %d, num_pusch_pdu %d\n",frame_rx,slot_rx,num_pusch_pdu);
- uint8_t ULSCH_id;
- uint8_t symbol;
- uint8_t harq_pid = 0; // [hna] Previously in LTE, the harq_pid was obtained from the subframe number (Synchronous HARQ)
- // In NR, this should be signaled through uplink scheduling dci (i.e, DCI 0_0, 0_1) (Asynchronous HARQ)
+ for (int i = 0; i < num_pusch_pdu; i++) {
- for (ULSCH_id = 0; ULSCH_id < /*NUMBER_OF_NR_ULSCH_MAX*/1; ULSCH_id++) { // temporary set to 1 untill list of connected UEs is implemented
- for(symbol = symbol_start; symbol < symbol_end; symbol++) {
- nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
+ switch (UL_tti_req->pdus_list[i].pdu_type) {
+ case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
+ {
+ LOG_I(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE\n",frame_rx,slot_rx);
+
+ nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu;
+ nr_fill_ulsch(gNB,frame_rx,slot_rx,pusch_pdu);
+
+ uint8_t ULSCH_id = find_nr_ulsch(pusch_pdu->rnti,gNB,SEARCH_EXIST);
+ uint8_t harq_pid = pusch_pdu->pusch_data.harq_process_id;
+ uint8_t symbol_start = pusch_pdu->start_symbol_index;
+ uint8_t symbol_end = symbol_start + pusch_pdu->nr_of_symbols;
+
+ for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
+ nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
+ }
+ //LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[UE_id]->rxdataF_comp[0],6900,1,1);
+ //LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[UE_id]->rxdataF_ext[0],6900,1,1);
+ nr_ulsch_procedures(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid);
+ nr_fill_rx_indication(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid); // indicate SDU to MAC
+ }
}
- nr_ulsch_procedures(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid);
- nr_fill_rx_indication(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid); // indicate SDU to MAC
}
}
diff --git a/openair1/SCHED_NR/sched_nr.h b/openair1/SCHED_NR/sched_nr.h
index f26890abb0..a33e0e4612 100644
--- a/openair1/SCHED_NR/sched_nr.h
+++ b/openair1/SCHED_NR/sched_nr.h
@@ -35,10 +35,10 @@
#include "phy_frame_config_nr.h"
-void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp);
+void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp);
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, int frame_tx, int slot_tx, int do_meas);
void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx);
-void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, uint8_t symbol_start, uint8_t symbol_end);
+void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx);
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot);
void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx);
void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx);
@@ -50,16 +50,4 @@ void nr_fep_full_2thread(RU_t *ru, int slot);
void feptx_prec(RU_t *ru,int frame_tx,int tti_tx);
int nr_phy_init_RU(RU_t *ru);
-void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
- nr_scs_e scs_common,
- nr_scs_e pdcch_scs,
- nr_frequency_range_e freq_range,
- uint8_t rmsi_pdcch_config,
- uint8_t ssb_idx,
- uint8_t k_ssb,
- uint16_t sfn_ssb,
- uint8_t n_ssb,
- uint16_t nb_slots_per_frame,
- uint16_t N_RB);
-
#endif
diff --git a/openair1/SIMULATION/NR_PHY/dlschsim.c b/openair1/SIMULATION/NR_PHY/dlschsim.c
index e6fcaadef6..851217d6a4 100644
--- a/openair1/SIMULATION/NR_PHY/dlschsim.c
+++ b/openair1/SIMULATION/NR_PHY/dlschsim.c
@@ -136,7 +136,6 @@ int main(int argc, char **argv)
int frame_length_complex_samples;
//int frame_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms;
- //nfapi_nr_config_request_t *gNB_config;
uint8_t Kmimo = 0;
uint32_t Nsoft = 0;
double sigma;
diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c
index 4b7831c9bc..2ee22fee2a 100644
--- a/openair1/SIMULATION/NR_PHY/dlsim.c
+++ b/openair1/SIMULATION/NR_PHY/dlsim.c
@@ -104,31 +104,29 @@ void config_common(int Mod_idP,
);
uint64_t get_softmodem_optmask(void) {return 0;}
-mac_rlc_status_resp_t mac_rlc_status_ind( const module_id_t module_idP, const rnti_t rntiP,
- const eNB_index_t eNB_index, const frame_t frameP,
- const sub_frame_t subframeP, const eNB_flag_t enb_flagP,
- const MBMS_flag_t MBMS_flagP, const logical_chan_id_t channel_idP,
- const tb_size_t tb_sizeP
- #if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
- ,const uint32_t sourceL2Id
- ,const uint32_t destinationL2Id
- #endif
- ){mac_rlc_status_resp_t mac_rlc_status_resp; return mac_rlc_status_resp;}
-tbs_size_t mac_rlc_data_req(
- const module_id_t module_idP,
- const rnti_t rntiP,
- const eNB_index_t eNB_index,
- const frame_t frameP,
- const eNB_flag_t enb_flagP,
- const MBMS_flag_t MBMS_flagP,
- const logical_chan_id_t channel_idP,
- const tb_size_t tb_sizeP,
- char *buffer_pP
-#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
- ,const uint32_t sourceL2Id
- ,const uint32_t destinationL2Id
-#endif
- )
+mac_rlc_status_resp_t mac_rlc_status_ind( const module_id_t module_idP,
+ const rnti_t rntiP,
+ const eNB_index_t eNB_index,
+ const frame_t frameP,
+ const sub_frame_t subframeP,
+ const eNB_flag_t enb_flagP,
+ const MBMS_flag_t MBMS_flagP,
+ const logical_chan_id_t channel_idP,
+ const tb_size_t tb_sizeP,
+ const uint32_t sourceL2Id,
+ const uint32_t destinationL2Id)
+{mac_rlc_status_resp_t mac_rlc_status_resp; return mac_rlc_status_resp;}
+tbs_size_t mac_rlc_data_req( const module_id_t module_idP,
+ const rnti_t rntiP,
+ const eNB_index_t eNB_index,
+ const frame_t frameP,
+ const eNB_flag_t enb_flagP,
+ const MBMS_flag_t MBMS_flagP,
+ const logical_chan_id_t channel_idP,
+ const tb_size_t tb_sizeP,
+ char *buffer_pP,
+ const uint32_t sourceL2Id,
+ const uint32_t destinationL2Id )
{return 0;}
int generate_dlsch_header(unsigned char *mac_header,
unsigned char num_sdus,
@@ -209,12 +207,11 @@ int main(int argc, char **argv)
int frame_length_complex_samples_no_prefix;
int slot_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms;
- nfapi_nr_config_request_t *gNB_config;
UE_nr_rxtx_proc_t UE_proc;
NR_Sched_Rsp_t Sched_INFO;
gNB_MAC_INST *gNB_mac;
NR_UE_MAC_INST_t *UE_mac;
-
+ int cyclic_prefix_type = NFAPI_CP_NORMAL;
int ret;
int run_initial_sync=0;
int do_pdcch_flag=1;
@@ -480,7 +477,6 @@ int main(int argc, char **argv)
memset(RC.gNB[0],0,sizeof(PHY_VARS_gNB));
gNB = RC.gNB[0];
- gNB_config = &gNB->gNB_config;
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
frame_parms->nb_antennas_tx = n_tx;
frame_parms->nb_antennas_rx = n_rx;
@@ -677,7 +673,7 @@ int main(int argc, char **argv)
Sched_INFO.frame = frame;
Sched_INFO.slot = slot;
Sched_INFO.DL_req = &gNB_mac->DL_req[0];
- Sched_INFO.UL_req = NULL;
+ Sched_INFO.UL_tti_req = &gNB_mac->UL_tti_req[0];
Sched_INFO.HI_DCI0_req = NULL;
Sched_INFO.TX_req = &gNB_mac->TX_req[0];
nr_schedule_response(&Sched_INFO);
@@ -694,7 +690,7 @@ int main(int argc, char **argv)
//TODO: loop over slots
for (aa=0; aaframe_parms.nb_antennas_tx; aa++) {
- if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) {
+ if (cyclic_prefix_type == 1) {
PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
&txdata[aa][tx_offset],
frame_parms->ofdm_symbol_size,
@@ -956,25 +952,16 @@ int main(int argc, char **argv)
printf("*****************************************\n");
printf("SNR %f, (false positive %f)\n", SNR,
- (float) n_false_positive / (float) n_trials);
+ (float) n_errors / (float) n_trials);
printf("*****************************************\n");
printf("\n");
-
- if (errors_bit == 0) {
- printf("PDSCH test OK\n");
- printf("\n");
- }
-
printf("SNR %f : n_errors (negative CRC) = %d/%d\n", SNR, n_errors, n_trials);
printf("\n");
if ((float)n_errors/(float)n_trials <= target_error_rate) {
- printf("PDCCH test OK\n");
+ printf("PDSCH test OK\n");
break;
}
-
- if (n_trials == 1)
- break;
} // NSR
diff --git a/openair1/SIMULATION/NR_PHY/pbchsim.c b/openair1/SIMULATION/NR_PHY/pbchsim.c
index 172ab9ae18..e858b9b999 100644
--- a/openair1/SIMULATION/NR_PHY/pbchsim.c
+++ b/openair1/SIMULATION/NR_PHY/pbchsim.c
@@ -113,7 +113,6 @@ int main(int argc, char **argv)
int frame_length_complex_samples;
int frame_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms;
- nfapi_nr_config_request_t *gNB_config;
int ret, payload_ret=0;
int run_initial_sync=0;
@@ -348,7 +347,6 @@ int main(int argc, char **argv)
RC.gNB = (PHY_VARS_gNB**) malloc(sizeof(PHY_VARS_gNB *));
RC.gNB[0] = malloc(sizeof(PHY_VARS_gNB));
gNB = RC.gNB[0];
- gNB_config = &gNB->gNB_config;
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
frame_parms->nb_antennas_tx = n_tx;
frame_parms->nb_antennas_rx = n_rx;
@@ -361,7 +359,8 @@ int main(int argc, char **argv)
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
phy_init_nr_gNB(gNB,0,0);
- uint8_t n_hf = gNB_config->sch_config.half_frame_index.value;
+ uint8_t n_hf = 0;
+ int cyclic_prefix_type = NFAPI_CP_NORMAL;
double fs,bw,scs,eps;
@@ -479,7 +478,7 @@ int main(int argc, char **argv)
nr_common_signal_procedures (gNB,frame,slot);
for (aa=0; aaframe_parms.nb_antennas_tx; aa++) {
- if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) {
+ if (cyclic_prefix_type == 1) {
PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
&txdata[aa][slot*frame_parms->samples_per_slot],
frame_parms->ofdm_symbol_size,
@@ -589,7 +588,7 @@ int main(int argc, char **argv)
UE->rx_offset=0;
uint8_t ssb_index = 0;
while (!((SSB_positions >> ssb_index) & 0x01)) ssb_index++; // to select the first transmitted ssb
- UE->symbol_offset = nr_get_ssb_start_symbol(frame_parms, ssb_index, n_hf);
+ UE->symbol_offset = nr_get_ssb_start_symbol(frame_parms, ssb_index);
int ssb_slot = (ssb_index/2)+(n_hf*frame_parms->slots_per_frame);
for (int i=UE->symbol_offset+1; isymbol_offset+4; i++) {
nr_slot_fep(UE,
diff --git a/openair1/SIMULATION/NR_PHY/ulschsim.c b/openair1/SIMULATION/NR_PHY/ulschsim.c
index 3767e1fae0..fbfc0c3b1c 100644
--- a/openair1/SIMULATION/NR_PHY/ulschsim.c
+++ b/openair1/SIMULATION/NR_PHY/ulschsim.c
@@ -419,7 +419,7 @@ int main(int argc, char **argv)
uint8_t rvidx = 0;
uint8_t UE_id = 0;
- NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id+1][0];
+ NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id][0];
nfapi_nr_ul_config_ulsch_pdu_rel15_t *rel15_ul = &ulsch_gNB->harq_processes[harq_pid]->ulsch_pdu.ulsch_pdu_rel15;
NR_UE_ULSCH_t *ulsch_ue = UE->ulsch[0][0][0];
@@ -603,31 +603,6 @@ int main(int argc, char **argv)
printf("\n");
}
- for (i = 0; i < 2; i++) {
-
- printf("----------------------\n");
- printf("freeing codeword %d\n", i);
- printf("----------------------\n");
-
- printf("gNB ulsch[0][%d]\n", i); // [hna] ulsch[0] is for RA
-
- free_gNB_ulsch(gNB->ulsch[0][i]);
-
- printf("gNB ulsch[%d][%d]\n",UE_id+1, i);
-
- free_gNB_ulsch(gNB->ulsch[UE_id+1][i]);
-
- for (sf = 0; sf < 2; sf++) {
-
- printf("UE ulsch[%d][0][%d]\n", sf, i);
-
- if (UE->ulsch[sf][0][i])
- free_nr_ue_ulsch(UE->ulsch[sf][0][i]);
- }
-
- printf("\n");
- }
-
if (output_fd)
fclose(output_fd);
diff --git a/openair1/SIMULATION/NR_PHY/ulsim.c b/openair1/SIMULATION/NR_PHY/ulsim.c
index 87360910b3..21a59b25e2 100644
--- a/openair1/SIMULATION/NR_PHY/ulsim.c
+++ b/openair1/SIMULATION/NR_PHY/ulsim.c
@@ -54,6 +54,7 @@
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
+#include "openair2/LAYER2/NR_MAC_gNB/mac_proto.h"
//#define DEBUG_ULSIM
@@ -103,19 +104,50 @@ void exit_function(const char *file, const char *function, const int line, const
// dummy functions
int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id, const int CC_id, const uint8_t gNB_index,
const int8_t channel, const uint8_t* pduP, const sdu_size_t pdu_len) { return 0; }
-void mac_rlc_data_ind (
- const module_id_t module_idP,
- const rnti_t rntiP,
- const eNB_index_t eNB_index,
- const frame_t frameP,
- const eNB_flag_t enb_flagP,
- const MBMS_flag_t MBMS_flagP,
- const logical_chan_id_t channel_idP,
- char *buffer_pP,
- const tb_size_t tb_sizeP,
- num_tb_t num_tbP,
- crc_t *crcs_pP)
-{}
+void mac_rlc_data_ind ( const module_id_t module_idP,
+ const rnti_t rntiP,
+ const eNB_index_t eNB_index,
+ const frame_t frameP,
+ const eNB_flag_t enb_flagP,
+ const MBMS_flag_t MBMS_flagP,
+ const logical_chan_id_t channel_idP,
+ char *buffer_pP,
+ const tb_size_t tb_sizeP,
+ num_tb_t num_tbP,
+ crc_t *crcs_pP){}
+mac_rlc_status_resp_t mac_rlc_status_ind( const module_id_t module_idP,
+ const rnti_t rntiP,
+ const eNB_index_t eNB_index,
+ const frame_t frameP,
+ const sub_frame_t subframeP,
+ const eNB_flag_t enb_flagP,
+ const MBMS_flag_t MBMS_flagP,
+ const logical_chan_id_t channel_idP,
+ const tb_size_t tb_sizeP,
+ const uint32_t sourceL2Id,
+ const uint32_t destinationL2Id)
+{mac_rlc_status_resp_t mac_rlc_status_resp; return mac_rlc_status_resp;}
+tbs_size_t mac_rlc_data_req( const module_id_t module_idP,
+ const rnti_t rntiP,
+ const eNB_index_t eNB_index,
+ const frame_t frameP,
+ const eNB_flag_t enb_flagP,
+ const MBMS_flag_t MBMS_flagP,
+ const logical_chan_id_t channel_idP,
+ const tb_size_t tb_sizeP,
+ char *buffer_pP,
+ const uint32_t sourceL2Id,
+ const uint32_t destinationL2Id )
+{return 0;}
+int generate_dlsch_header(unsigned char *mac_header,
+ unsigned char num_sdus,
+ unsigned short *sdu_lengths,
+ unsigned char *sdu_lcids,
+ unsigned char drx_cmd,
+ unsigned short timing_advance_cmd,
+ unsigned char *ue_cont_res_id,
+ unsigned char short_padding,
+ unsigned short post_padding){return 0;}
uint64_t get_softmodem_optmask(void) {return 0;}
int rlc_module_init (void) {return(0);}
void pdcp_layer_init (void) {}
@@ -148,7 +180,7 @@ int main(int argc, char **argv)
uint16_t N_RB_DL = 106, N_RB_UL = 106, mu = 1;
//unsigned char frame_type = 0;
int number_of_frames = 1;
- int frame_length_complex_samples;
+ int frame_length_complex_samples, frame_length_complex_samples_no_prefix ;
NR_DL_FRAME_PARMS *frame_parms;
int loglvl = OAILOG_WARNING;
uint64_t SSB_positions=0x01;
@@ -178,7 +210,7 @@ int main(int argc, char **argv)
//logInit();
randominit(0);
- while ((c = getopt(argc, argv, "d:f:g:h:i:j:l:m:n:p:r:s:y:z:F:M:N:P:R:S:")) != -1) {
+ while ((c = getopt(argc, argv, "d:f:g:h:i:j:l:m:n:p:r:s:y:z:F:M:N:P:R:S:L:")) != -1) {
switch (c) {
/*case 'd':
@@ -337,6 +369,10 @@ int main(int argc, char **argv)
printf("Setting SNR1 to %f\n", snr1);
break;
+ case 'L':
+ loglvl = atoi(optarg);
+ break;
+
default:
case 'h':
printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", argv[0]);
@@ -406,7 +442,7 @@ int main(int argc, char **argv)
//init_eNB_afterRU();
frame_length_complex_samples = frame_parms->samples_per_subframe;
- //frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP;
+ frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP;
//configure UE
UE = malloc(sizeof(PHY_VARS_NR_UE));
@@ -450,9 +486,11 @@ int main(int argc, char **argv)
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, precod_nbr_layers);
- NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id+1][0];
- nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch_gNB->harq_processes[harq_pid]->ulsch_pdu;
-
+ NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id][0];
+ //nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch_gNB->harq_processes[harq_pid]->ulsch_pdu;
+ nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req;
+ nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu;
+
NR_UE_ULSCH_t **ulsch_ue = UE->ulsch[0][0];
unsigned char *estimated_output_bit;
@@ -481,7 +519,8 @@ int main(int argc, char **argv)
UE_proc.nr_tti_tx = slot;
UE_proc.frame_tx = frame;
- // --------- setting rel15_ul parameters for gNB --------
+ // --------- setting parameters for gNB --------
+ /*
rel15_ul->rnti = n_rnti;
rel15_ul->ulsch_pdu_rel15.start_rb = start_rb;
rel15_ul->ulsch_pdu_rel15.number_rbs = nb_rb;
@@ -496,8 +535,50 @@ int main(int argc, char **argv)
rel15_ul->ulsch_pdu_rel15.n_layers = precod_nbr_layers;
rel15_ul->ulsch_pdu_rel15.R = code_rate;
///////////////////////////////////////////////////
+ */
- //fapi_nr_tx_request_t tx_request;
+ UL_tti_req->sfn = frame;
+ UL_tti_req->slot = slot;
+ UL_tti_req->n_pdus = 1;
+ UL_tti_req->pdus_list[0].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
+ UL_tti_req->pdus_list[0].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
+ memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t));
+
+ pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
+ pusch_pdu->rnti = n_rnti;
+ pusch_pdu->mcs_index = Imcs;
+ pusch_pdu->mcs_table = 0;
+ pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table);
+ pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table) ;
+ pusch_pdu->transform_precoding = 0;
+ pusch_pdu->data_scrambling_id = 0;
+ pusch_pdu->nrOfLayers = 1;
+ pusch_pdu->ul_dmrs_symb_pos = 1;
+ pusch_pdu->dmrs_config_type = 0;
+ pusch_pdu->ul_dmrs_scrambling_id = 0;
+ pusch_pdu->scid = 0;
+ pusch_pdu->resource_alloc = 1;
+ pusch_pdu->rb_start = start_rb;
+ pusch_pdu->rb_size = nb_rb;
+ pusch_pdu->vrb_to_prb_mapping = 0;
+ pusch_pdu->frequency_hopping = 0;
+ pusch_pdu->uplink_frequency_shift_7p5khz = 0;
+ pusch_pdu->start_symbol_index = start_symbol;
+ pusch_pdu->nr_of_symbols = nb_symb_sch;
+ pusch_pdu->pusch_data.rv_index = 0;
+ pusch_pdu->pusch_data.harq_process_id = 0;
+ pusch_pdu->pusch_data.new_data_indicator = 0;
+ pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->mcs_index,
+ pusch_pdu->target_code_rate,
+ pusch_pdu->rb_size,
+ pusch_pdu->nr_of_symbols,
+ nb_re_dmrs*length_dmrs,
+ 0,
+ pusch_pdu->nrOfLayers = 1);
+ pusch_pdu->pusch_data.num_cb = 0;
+
+
+ // --------- setting parameters for UE --------
scheduled_response.module_id = 0;
scheduled_response.CC_id = 0;
@@ -531,6 +612,8 @@ int main(int argc, char **argv)
phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id, 0);
+ //LOG_M("txsig0.m","txs0", UE->common_vars.txdata[0],frame_length_complex_samples,1,1);
+
///////////
////////////////////////////////////////////////////
tx_offset = slot*frame_parms->samples_per_slot;
@@ -568,7 +651,9 @@ int main(int argc, char **argv)
//----------------------------------------------------------
phy_procedures_gNB_common_RX(gNB, frame, slot);
- phy_procedures_gNB_uespec_RX(gNB, frame, slot, rel15_ul->ulsch_pdu_rel15.start_symbol, rel15_ul->ulsch_pdu_rel15.start_symbol + rel15_ul->ulsch_pdu_rel15.number_symbols);
+ //LOG_M("rxsigF0.m","rxsF0",gNB->common_vars.rxdataF[0],frame_length_complex_samples_no_prefix,1,1);
+
+ phy_procedures_gNB_uespec_RX(gNB, frame, slot);
////////////////////////////////////////////////////////////
//----------------------------------------------------------
@@ -593,7 +678,7 @@ int main(int argc, char **argv)
for (i = 0; i < TBS; i++) {
estimated_output_bit[i] = (ulsch_gNB->harq_processes[harq_pid]->b[i/8] & (1 << (i & 7))) >> (i & 7);
- test_input_bit[i] = (ulsch_ue[0]->harq_processes[harq_pid]->b[i / 8] & (1 << (i & 7))) >> (i & 7);
+ test_input_bit[i] = (ulsch_ue[0]->harq_processes[harq_pid]->b[i/8] & (1 << (i & 7))) >> (i & 7);
if (estimated_output_bit[i] != test_input_bit[i]) {
if(errors_decoding == 0)
@@ -617,7 +702,7 @@ int main(int argc, char **argv)
break;
} // frame loop
- if(is_frame_in_error == 0)
+ if(is_frame_in_error == 0 || number_of_frames==1)
break;
} // SNR loop
@@ -630,31 +715,6 @@ int main(int argc, char **argv)
printf("\n");
- for (i = 0; i < 2; i++) {
-
- printf("----------------------\n");
- printf("freeing codeword %d\n", i);
- printf("----------------------\n");
-
- printf("gNB ulsch[0][%d]\n", i); // [hna] ulsch[0] is for RA
-
- free_gNB_ulsch(gNB->ulsch[0][i]);
-
- printf("gNB ulsch[%d][%d]\n",UE_id+1, i);
-
- free_gNB_ulsch(gNB->ulsch[UE_id+1][i]); // "+1" because first element in ulsch is for RA
-
- for (sf = 0; sf < 2; sf++) {
-
- printf("UE ulsch[%d][0][%d]\n", sf, i);
-
- if (UE->ulsch[sf][0][i])
- free_nr_ue_ulsch(UE->ulsch[sf][0][i]);
- }
-
- printf("\n");
- }
-
free(test_input_bit);
free(estimated_output_bit);
diff --git a/openair2/COMMON/platform_constants.h b/openair2/COMMON/platform_constants.h
index 0b05b46dc5..aeeb393245 100644
--- a/openair2/COMMON/platform_constants.h
+++ b/openair2/COMMON/platform_constants.h
@@ -100,6 +100,7 @@
#define NUMBER_OF_NR_DLSCH_MAX 2//16
#define NUMBER_OF_NR_ULSCH_MAX 2//16
+
#define MAX_MANAGED_ENB_PER_MOBILE 2
#define MAX_MANAGED_GNB_PER_MOBILE 2
diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c
index 3e0be6fdee..6dba9633c8 100644
--- a/openair2/GNB_APP/gnb_config.c
+++ b/openair2/GNB_APP/gnb_config.c
@@ -639,7 +639,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
// Parse optional physical parameters
sprintf(gnbpath,"%s.[%i]",GNB_CONFIG_STRING_GNB_LIST,k),
-
+ printf("SSB SCO %d\n",ssb_SubcarrierOffset);
NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = ssb_SubcarrierOffset;
NRRRC_CONFIGURATION_REQ (msg_p).scc = scc;
diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c
index 775a961f28..83f422b100 100644
--- a/openair2/LAYER2/NR_MAC_gNB/config.c
+++ b/openair2/LAYER2/NR_MAC_gNB/config.c
@@ -49,132 +49,371 @@ extern RAN_CONTEXT_t RC;
extern void mac_top_init_gNB(void);
extern uint8_t nfapi_mode;
+uint16_t config_bandwidth(int mu, int nb_rb, int nr_band)
+{
+ uint16_t bandwidth;
-void config_common(int Mod_idP,
- NR_ServingCellConfigCommon_t *scc
- ){
- nfapi_nr_config_request_t *cfg = &RC.nrmac[Mod_idP]->config[0];
+ if (nr_band < 100) { //FR1
+ switch(mu) {
+ case 0 :
+ switch(nb_rb) {
+ case 25 :
+ bandwidth = 5;
+ break;
+ case 52 :
+ bandwidth = 10;
+ break;
+ case 79 :
+ bandwidth = 15;
+ break;
+ case 106 :
+ bandwidth = 20;
+ break;
+ case 133 :
+ bandwidth = 25;
+ break;
+ case 160 :
+ bandwidth = 30;
+ break;
+ case 216 :
+ bandwidth = 40;
+ break;
+ case 270 :
+ bandwidth = 50;
+ break;
+ default:
+ AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
+ }
+ break;
+ case 1 :
+ switch(nb_rb) {
+ case 11 :
+ bandwidth = 5;
+ break;
+ case 24 :
+ bandwidth = 10;
+ break;
+ case 38 :
+ bandwidth = 15;
+ break;
+ case 51 :
+ bandwidth = 20;
+ break;
+ case 65 :
+ bandwidth = 25;
+ break;
+ case 78 :
+ bandwidth = 30;
+ break;
+ case 106 :
+ bandwidth = 40;
+ break;
+ case 133 :
+ bandwidth = 50;
+ break;
+ case 162 :
+ bandwidth = 60;
+ break;
+ case 189 :
+ bandwidth = 70;
+ break;
+ case 217 :
+ bandwidth = 80;
+ break;
+ case 245 :
+ bandwidth = 90;
+ break;
+ case 273 :
+ bandwidth = 100;
+ break;
+ default:
+ AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
+ }
+ break;
+ case 2 :
+ switch(nb_rb) {
+ case 11 :
+ bandwidth = 10;
+ break;
+ case 18 :
+ bandwidth = 15;
+ break;
+ case 24 :
+ bandwidth = 20;
+ break;
+ case 31 :
+ bandwidth = 25;
+ break;
+ case 38 :
+ bandwidth = 30;
+ break;
+ case 51 :
+ bandwidth = 40;
+ break;
+ case 65 :
+ bandwidth = 50;
+ break;
+ case 79 :
+ bandwidth = 60;
+ break;
+ case 93 :
+ bandwidth = 70;
+ break;
+ case 107 :
+ bandwidth = 80;
+ break;
+ case 121 :
+ bandwidth = 90;
+ break;
+ case 135 :
+ bandwidth = 100;
+ break;
+ default:
+ AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
+ }
+ break;
+ default:
+ AssertFatal(1==0,"Numerology %d undefined for band %d in FR1\n", mu,nr_band);
+ }
+ }
+ else {
+ switch(mu) {
+ case 2 :
+ switch(nb_rb) {
+ case 66 :
+ bandwidth = 50;
+ break;
+ case 132 :
+ bandwidth = 100;
+ break;
+ case 264 :
+ bandwidth = 200;
+ break;
+ default:
+ AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
+ }
+ break;
+ case 3 :
+ switch(nb_rb) {
+ case 32 :
+ bandwidth = 50;
+ break;
+ case 66 :
+ bandwidth = 100;
+ break;
+ case 132 :
+ bandwidth = 200;
+ break;
+ case 264 :
+ bandwidth = 400;
+ break;
+ default:
+ AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
+ }
+ break;
+ default:
+ AssertFatal(1==0,"Numerology %d undefined for band %d in FR1\n", mu,nr_band);
+ }
+ }
+
+ return (bandwidth);
+}
+
+
+void config_common(int Mod_idP, NR_ServingCellConfigCommon_t *scc) {
+
+ nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[Mod_idP]->config[0];
RC.nrmac[Mod_idP]->common_channels[0].ServingCellConfigCommon = scc;
+ int i;
- int mu = 1;
-
- switch (*scc->ssb_periodicityServingCell) {
- case 0:
- cfg->sch_config.ssb_periodicity.value = 5;
- break;
- case 1:
- cfg->sch_config.ssb_periodicity.value = 10;
- break;
- case 2:
- cfg->sch_config.ssb_periodicity.value = 20;
- break;
- case 3:
- cfg->sch_config.ssb_periodicity.value = 40;
- break;
- case 4:
- cfg->sch_config.ssb_periodicity.value = 80;
- break;
- case 5:
- cfg->sch_config.ssb_periodicity.value = 160;
- break;
- }
-
-
- cfg->sch_config.physical_cell_id.value = *scc->physCellId;
- cfg->sch_config.ssb_scg_position_in_burst.value = scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0];
-
- // TDD
- cfg->subframe_config.duplex_mode.value = 1;
- cfg->subframe_config.duplex_mode.tl.tag = NFAPI_SUBFRAME_CONFIG_DUPLEX_MODE_TAG;
- cfg->num_tlv++;
+ // TDD Configuration
cfg->tdd_ul_dl_config.referenceSubcarrierSpacing.value = scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing;
- cfg->tdd_ul_dl_config.dl_ul_periodicity.value = 5000;//scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;// rakesh:need to configure properly
+ cfg->tdd_ul_dl_config.dl_ul_periodicity.value = 5000;//scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;// rakesh:need to configure properly
cfg->tdd_ul_dl_config.nrofDownlinkSlots.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
cfg->tdd_ul_dl_config.nrofDownlinkSymbols.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols;
cfg->tdd_ul_dl_config.nrofUplinkSlots.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
cfg->tdd_ul_dl_config.nrofUplinkSymbols.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
+
+ // Carrier configuration
- /// In NR DL and UL will be different band
- cfg->nfapi_config.rf_bands.number_rf_bands = 1;
- cfg->nfapi_config.rf_bands.rf_band[0] = *(long*)scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
- cfg->nfapi_config.rf_bands.tl.tag = NFAPI_PHY_RF_BANDS_TAG;
+ cfg->carrier_config.dl_bandwidth.value = config_bandwidth(scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
+ scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
+ *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]);
+ cfg->carrier_config.dl_bandwidth.tl.tag = NFAPI_NR_CONFIG_DL_BANDWIDTH_TAG; //temporary
+ cfg->num_tlv++;
+ LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->carrier_config.dl_bandwidth.value);
+
+ cfg->carrier_config.dl_frequency.value = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],
+ scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
+ cfg->carrier_config.dl_frequency.tl.tag = NFAPI_NR_CONFIG_DL_FREQUENCY_TAG;
cfg->num_tlv++;
- cfg->nfapi_config.nrarfcn.value = scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA;
+ for (i=0; i<5; i++) {
+ if (i==scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
+ cfg->carrier_config.dl_grid_size[i].value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
+ cfg->carrier_config.dl_k0[i].value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
+ cfg->carrier_config.dl_grid_size[i].tl.tag = NFAPI_NR_CONFIG_DL_GRID_SIZE_TAG;
+ cfg->carrier_config.dl_k0[i].tl.tag = NFAPI_NR_CONFIG_DL_K0_TAG;
+ cfg->num_tlv++;
+ cfg->num_tlv++;
+ }
+ else {
+ cfg->carrier_config.dl_grid_size[i].value = 0;
+ cfg->carrier_config.dl_k0[i].value = 0;
+ }
+ }
- cfg->nfapi_config.nrarfcn.tl.tag = NFAPI_NR_NFAPI_NRARFCN_TAG;
+ cfg->carrier_config.uplink_bandwidth.value = config_bandwidth(scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
+ scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
+ *scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]);
+ cfg->carrier_config.uplink_bandwidth.tl.tag = NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG; //temporary
+ cfg->num_tlv++;
+ LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->carrier_config.uplink_bandwidth.value);
+
+ int UL_pointA;
+ if (scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA == NULL)
+ UL_pointA = scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA;
+ else
+ UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA;
+
+ cfg->carrier_config.uplink_frequency.value = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],
+ UL_pointA)/1000; // freq in kHz
+ cfg->carrier_config.uplink_frequency.tl.tag = NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG;
cfg->num_tlv++;
- cfg->subframe_config.numerology_index_mu.value = mu;
- //cfg->subframe_config.tl.tag =
- //cfg->num_tlv++;
+ for (i=0; i<5; i++) {
+ if (i==scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
+ cfg->carrier_config.ul_grid_size[i].value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
+ cfg->carrier_config.ul_k0[i].value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
+ cfg->carrier_config.ul_grid_size[i].tl.tag = NFAPI_NR_CONFIG_UL_GRID_SIZE_TAG;
+ cfg->carrier_config.ul_k0[i].tl.tag = NFAPI_NR_CONFIG_UL_K0_TAG;
+ cfg->num_tlv++;
+ cfg->num_tlv++;
+ }
+ else {
+ cfg->carrier_config.ul_grid_size[i].value = 0;
+ cfg->carrier_config.ul_k0[i].value = 0;
+ }
+ }
- cfg->rf_config.dl_carrier_bandwidth.value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
- cfg->rf_config.dl_carrier_bandwidth.tl.tag = NFAPI_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG; //temporary
- cfg->num_tlv++;
- LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->rf_config.dl_carrier_bandwidth.value);
-
- cfg->rf_config.ul_carrier_bandwidth.value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
- cfg->rf_config.ul_carrier_bandwidth.tl.tag = NFAPI_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG;
+ // Cell configuration
+ cfg->cell_config.phy_cell_id.value = *scc->physCellId;
+ cfg->cell_config.phy_cell_id.tl.tag = NFAPI_NR_CONFIG_PHY_CELL_ID_TAG;
cfg->num_tlv++;
- cfg->rf_config.dl_subcarrierspacing.value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
- cfg->rf_config.dl_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG;
+ cfg->cell_config.frame_duplex_type.value = 1;
+ cfg->cell_config.frame_duplex_type.tl.tag = NFAPI_NR_CONFIG_FRAME_DUPLEX_TYPE_TAG;
cfg->num_tlv++;
- cfg->rf_config.ul_subcarrierspacing.value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
- cfg->rf_config.ul_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG;
+
+ // SSB configuration
+ cfg->ssb_config.ss_pbch_power.value = scc->ss_PBCH_BlockPower;
+ cfg->ssb_config.ss_pbch_power.tl.tag = NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG;
cfg->num_tlv++;
- cfg->rf_config.dl_offsettocarrier.value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
- cfg->rf_config.dl_offsettocarrier.tl.tag = NFAPI_NR_RF_CONFIG_DL_OFFSETTOCARRIER_TAG;
+ cfg->ssb_config.scs_common.value = *scc->ssbSubcarrierSpacing;
+ cfg->ssb_config.scs_common.tl.tag = NFAPI_NR_CONFIG_SCS_COMMON_TAG;
cfg->num_tlv++;
- cfg->rf_config.ul_offsettocarrier.value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
- cfg->rf_config.ul_offsettocarrier.tl.tag = NFAPI_NR_RF_CONFIG_UL_OFFSETTOCARRIER_TAG;
+ // PRACH configuration
+
+ cfg->prach_config.prach_sequence_length.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present;
+ cfg->prach_config.prach_sequence_length.tl.tag = NFAPI_NR_CONFIG_PRACH_SEQUENCE_LENGTH_TAG;
+ cfg->num_tlv++;
+
+ if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
+ cfg->prach_config.prach_sub_c_spacing.value = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
+ else
+ cfg->prach_config.prach_sub_c_spacing.value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
+ cfg->prach_config.prach_sub_c_spacing.tl.tag = NFAPI_NR_CONFIG_PRACH_SUB_C_SPACING_TAG;
+ cfg->num_tlv++;
+
+ cfg->prach_config.restricted_set_config.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig;
+ cfg->prach_config.restricted_set_config.tl.tag = NFAPI_NR_CONFIG_RESTRICTED_SET_CONFIG_TAG;
+ cfg->num_tlv++;
+
+ switch (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM) {
+ case 0 :
+ cfg->prach_config.num_prach_fd_occasions.value = 1;
+ break;
+ case 1 :
+ cfg->prach_config.num_prach_fd_occasions.value = 2;
+ break;
+ case 2 :
+ cfg->prach_config.num_prach_fd_occasions.value = 4;
+ break;
+ case 3 :
+ cfg->prach_config.num_prach_fd_occasions.value = 8;
+ break;
+ default:
+ AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM);
+ }
+ cfg->prach_config.num_prach_fd_occasions.tl.tag = NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG;
+ cfg->num_tlv++;
+
+ cfg->prach_config.num_prach_fd_occasions_list = (nfapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions.value*sizeof(nfapi_nr_num_prach_fd_occasions_t));
+ for (i=0; iprach_config.num_prach_fd_occasions.value; i++) {
+ cfg->prach_config.num_prach_fd_occasions_list[i].num_prach_fd_occasions = i;
+ if (cfg->prach_config.prach_sequence_length.value)
+ cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
+ else
+ cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l839;
+ cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.tl.tag = NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG;
+ cfg->num_tlv++;
+ cfg->prach_config.num_prach_fd_occasions_list[i].k1.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart;
+ cfg->prach_config.num_prach_fd_occasions_list[i].k1.tl.tag = NFAPI_NR_CONFIG_K1_TAG;
+ cfg->num_tlv++;
+ cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
+ cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.tl.tag = NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG;
+ cfg->num_tlv++;
+ //cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences.value = ???
+ }
+
+ cfg->prach_config.ssb_per_rach.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present;
+ cfg->prach_config.ssb_per_rach.tl.tag = NFAPI_NR_CONFIG_SSB_PER_RACH_TAG;
cfg->num_tlv++;
- // InitialBWP configuration
-
- cfg->initialBWP_config.dl_bandwidth.value = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
- cfg->initialBWP_config.dl_bandwidth.tl.tag = NFAPI_INITIALBWP_DL_BANDWIDTH_TAG; //temporary
+ // SSB Table Configuration
+ int scs_scaling = 1<<(cfg->ssb_config.scs_common.value);
+ uint32_t absolute_diff = (*scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
+ cfg->ssb_table.ssb_offset_point_a.value = absolute_diff/(12*scs_scaling);
+ cfg->ssb_table.ssb_offset_point_a.tl.tag = NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG;
cfg->num_tlv++;
- cfg->initialBWP_config.dl_offset.value = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
- cfg->initialBWP_config.dl_offset.tl.tag = NFAPI_INITIALBWP_DL_OFFSET_TAG; //temporary
+
+ cfg->ssb_table.ssb_period.value = *scc->ssb_periodicityServingCell;
+ cfg->ssb_table.ssb_period.tl.tag = NFAPI_NR_CONFIG_SSB_PERIOD_TAG;
cfg->num_tlv++;
- cfg->initialBWP_config.dl_subcarrierSpacing.value = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
- cfg->initialBWP_config.dl_subcarrierSpacing.tl.tag = NFAPI_INITIALBWP_DL_SUBCARRIERSPACING_TAG; //temporary
+
+ switch (scc->ssb_PositionsInBurst->present) {
+ case 1 :
+ cfg->ssb_table.ssb_mask_list[0].ssb_mask.value = scc->ssb_PositionsInBurst->choice.shortBitmap.buf[0];
+ cfg->ssb_table.ssb_mask_list[1].ssb_mask.value = 0;
+ break;
+ case 2 :
+ cfg->ssb_table.ssb_mask_list[0].ssb_mask.value = scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0];
+ cfg->ssb_table.ssb_mask_list[1].ssb_mask.value = 0;
+ break;
+ case 3 :
+ cfg->ssb_table.ssb_mask_list[0].ssb_mask.value = 0;
+ cfg->ssb_table.ssb_mask_list[1].ssb_mask.value = 0;
+ for (i=0; i<4; i++) {
+ cfg->ssb_table.ssb_mask_list[0].ssb_mask.value += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[i]<ssb_table.ssb_mask_list[1].ssb_mask.value += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[i+4]<ssb_PositionsInBurst->present);
+ }
+ cfg->ssb_table.ssb_mask_list[0].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
cfg->num_tlv++;
- LOG_I(PHY,"%s() initialBWP_dl_Bandwidth.RBstart.SCS :%d.%d.%d\n", __FUNCTION__, cfg->initialBWP_config.dl_bandwidth.value,cfg->initialBWP_config.dl_offset.value,cfg->initialBWP_config.dl_subcarrierSpacing.value);
- cfg->initialBWP_config.ul_bandwidth.value = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
- cfg->initialBWP_config.ul_bandwidth.tl.tag = NFAPI_INITIALBWP_UL_BANDWIDTH_TAG;
+ // TDD Table Configuration
+ cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
+ cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG;
cfg->num_tlv++;
- cfg->initialBWP_config.ul_offset.value = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
- cfg->initialBWP_config.ul_offset.tl.tag = NFAPI_INITIALBWP_UL_OFFSET_TAG; //temporary
- cfg->num_tlv++;
- cfg->initialBWP_config.ul_subcarrierSpacing.value = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
- cfg->initialBWP_config.ul_subcarrierSpacing.tl.tag = NFAPI_INITIALBWP_DL_SUBCARRIERSPACING_TAG; //temporary
- cfg->num_tlv++;
- LOG_I(PHY,"%s() initialBWP_ul_Bandwidth.RBstart.SCS :%d.%d.%d\n", __FUNCTION__, cfg->initialBWP_config.ul_bandwidth.value,cfg->initialBWP_config.ul_offset.value,cfg->initialBWP_config.ul_subcarrierSpacing.value);
- cfg->rach_config.prach_RootSequenceIndex.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
- if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
- cfg->rach_config.prach_msg1_SubcarrierSpacing.value = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
- else cfg->rach_config.prach_msg1_SubcarrierSpacing.value=cfg->rf_config.dl_subcarrierspacing.value;
-
- cfg->rach_config.restrictedSetConfig.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig;
- if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder)
- cfg->rach_config.msg3_transformPrecoding.value = 1;
- else cfg->rach_config.msg3_transformPrecoding.value = 0;
-
- cfg->rach_config.prach_ConfigurationIndex.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
- cfg->rach_config.prach_msg1_FDM.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM;
- cfg->rach_config.prach_msg1_FrequencyStart.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart;
- cfg->rach_config.zeroCorrelationZoneConfig.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
- cfg->rach_config.preambleReceivedTargetPower.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower;
-
+/*
// PDCCH-ConfigCommon
cfg->pdcch_config.controlResourceSetZero.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero;
cfg->pdcch_config.searchSpaceZero.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero;
@@ -195,10 +434,8 @@ void config_common(int Mod_idP,
AssertFatal(cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value<=NFAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS,"illegal TimeDomainAllocation count %d\n",cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value);
for (int i=0;ipusch_config.num_PUSCHTimeDomainResourceAllocations.value;i++) {
cfg->pusch_config.PUSCHTimeDomainResourceAllocation_k2[i].value=*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2;
- }
+ }*/
- //cfg->sch_config.half_frame_index.value = 0; Fix in PHY
- //cfg->sch_config.n_ssb_crb.value = 86; Fix in PHY
}
@@ -237,7 +474,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
phycfg.Mod_id = Mod_idP;
phycfg.CC_id = 0;
phycfg.cfg = &RC.nrmac[Mod_idP]->config[0];
-
+
+ phycfg.cfg->ssb_table.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
+ phycfg.cfg->ssb_table.ssb_subcarrier_offset.tl.tag = NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG;
+ phycfg.cfg->num_tlv++;
+
if (RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req) RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req(&phycfg);
}
@@ -255,9 +496,6 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
UE_list->secondaryCellGroup[UE_id] = secondaryCellGroup;
LOG_I(PHY,"Modified UE_id %d/%x with secondaryCellGroup\n",UE_id,rnti);
}
- fill_nfapi_coresets_and_searchspaces(secondaryCellGroup,
- UE_list->coreset[UE_id],
- UE_list->search_space[UE_id]);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
index 2ea89453aa..1844fb2b72 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
@@ -75,29 +75,33 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
frame_t frameP,
sub_frame_t slotP){
- nfapi_nr_dl_config_request_t *DL_req = &gNB->DL_req[0];
- nfapi_ul_config_request_t *UL_req = &gNB->UL_req[0];
- nfapi_hi_dci0_request_t * HI_DCI0_req = &gNB->HI_DCI0_req[0];
- nfapi_tx_request_t *TX_req = &gNB->TX_req[0];
+ nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0];
+ nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req[0];
+ nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0];
+ nfapi_nr_tx_data_request_t *TX_req = &gNB->TX_req[0];
gNB->pdu_index[CC_idP] = 0;
if (nfapi_mode==0 || nfapi_mode == 1) { // monolithic or PNF
- DL_req[CC_idP].dl_config_request_body.number_dci = 0;
- DL_req[CC_idP].dl_config_request_body.number_pdu = 0;
- DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0;
- //DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000;
+ DL_req[CC_idP].SFN = frameP;
+ DL_req[CC_idP].Slot = slotP;
+ DL_req[CC_idP].dl_tti_request_body.nPDUs = 0;
+ DL_req[CC_idP].dl_tti_request_body.nGroup = 0;
+ //DL_req[CC_idP].dl_tti_request_body.transmission_power_pcfich = 6000;
- HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = slotP + (frameP<<7);
- HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
+ UL_dci_req[CC_idP].SFN = frameP;
+ UL_dci_req[CC_idP].Slot = slotP;
+ UL_dci_req[CC_idP].numPdus = 0;
+ UL_tti_req[CC_idP].SFN = frameP;
+ UL_tti_req[CC_idP].Slot = slotP;
+ UL_tti_req[CC_idP].n_pdus = 0;
+ UL_tti_req[CC_idP].n_ulsch = 0;
+ UL_tti_req[CC_idP].n_ulcch = 0;
+ UL_tti_req[CC_idP].n_group = 0;
- UL_req[CC_idP].ul_config_request_body.number_of_pdus = 0;
- UL_req[CC_idP].ul_config_request_body.rach_prach_frequency_resources = 0; // ignored, handled by PHY for now
- UL_req[CC_idP].ul_config_request_body.srs_present = 0; // ignored, handled by PHY for now
-
- TX_req[CC_idP].tx_request_body.number_of_pdus = 0;
+ TX_req[CC_idP].Number_of_PDUs = 0;
}
}
@@ -109,7 +113,7 @@ void check_nr_ul_failure(module_id_t module_idP,
sub_frame_t slotP) {
UE_list_t *UE_list = &RC.nrmac[module_idP]->UE_list;
- nfapi_nr_dl_config_request_t *DL_req = &RC.nrmac[module_idP]->DL_req[0];
+ nfapi_nr_dl_dci_request_t *DL_req = &RC.nrmac[module_idP]->DL_req[0];
uint16_t rnti = UE_RNTI(module_idP, UE_id);
NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels;
@@ -122,11 +126,11 @@ void check_nr_ul_failure(module_id_t module_idP,
UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 1;
// add a format 1A dci for this UE to request an RA procedure (only one UE per subframe)
- nfapi_nr_dl_config_request_pdu_t *dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[DL_req[CC_id].dl_config_request_body.number_pdu];
- memset((void *) dl_config_pdu, 0,sizeof(nfapi_dl_config_request_pdu_t));
+ nfapi_nr_dl_dci_request_pdu_t *dl_config_pdu = &DL_req[CC_id].dl_tti_request_body.dl_config_pdu_list[DL_req[CC_id].dl_tti_request_body.number_pdu];
+ memset((void *) dl_config_pdu, 0,sizeof(nfapi_dl_dci_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_dl_config_dci_dl_pdu));
- dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tl.tag = NFAPI_DL_CONFIG_REQUEST_DCI_DL_PDU_REL8_TAG;
+ dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tl.tag = NFAPI_DL_DCI_REQUEST_DCI_DL_PDU_REL8_TAG;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = get_aggregation(get_bw_index(module_idP, CC_id),
UE_list->UE_sched_ctrl[UE_id].
@@ -139,9 +143,9 @@ void check_nr_ul_failure(module_id_t module_idP,
"illegal dl_Bandwidth %d\n",
(int) cc[CC_id].mib->message.dl_Bandwidth);
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = nr_pdcch_order_table[cc[CC_id].mib->message.dl_Bandwidth];
- DL_req[CC_id].dl_config_request_body.number_dci++;
- DL_req[CC_id].dl_config_request_body.number_pdu++;
- DL_req[CC_id].dl_config_request_body.tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
+ DL_req[CC_id].dl_tti_request_body.number_dci++;
+ DL_req[CC_id].dl_tti_request_body.number_pdu++;
+ DL_req[CC_id].dl_tti_request_body.tl.tag = NFAPI_DL_TTI_REQUEST_BODY_TAG;
LOG_I(MAC,
"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d), resource_block_coding %d \n",
UE_id, rnti,
@@ -275,6 +279,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t subfr
}
*/
+/*
void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
{
int CC_id;
@@ -282,9 +287,7 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
- nfapi_ul_config_request_t *ul_req_tmp = &mac->UL_req_tmp[CC_id][slotP];
- nfapi_ul_config_request_t *ul_req = &mac->UL_req[CC_id];
- nfapi_ul_config_request_pdu_t *ul_req_pdu = ul_req->ul_config_request_body.ul_config_pdu_list;
+ nfapi_ul_config_request_t *ul_req = &mac->UL_tti_req[CC_id];
*ul_req = *ul_req_tmp;
@@ -303,10 +306,14 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
ul_req->ul_config_request_body.number_of_pdus*sizeof(nfapi_ul_config_request_pdu_t));
}
}
+*/
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
- frame_t frameP,
- sub_frame_t slotP){
+ frame_t frame_rxP,
+ sub_frame_t slot_rxP,
+ frame_t frame_txP,
+ sub_frame_t slot_txP){
+
protocol_ctxt_t ctxt;
int CC_id, i = -1;
@@ -319,8 +326,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
- RC.nrmac[module_idP]->frame = frameP;
- RC.nrmac[module_idP]->slot = slotP;
+ RC.nrmac[module_idP]->frame = frame_rxP;
+ RC.nrmac[module_idP]->slot = slot_rxP;
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
@@ -330,7 +337,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
memset(cc[CC_id].vrb_map, 0, 100);
memset(cc[CC_id].vrb_map_UL, 0, 100);
- clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frameP, slotP);
+ clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame_txP, slot_txP);
}
// refresh UE list based on UEs dropped by PHY in previous subframe
@@ -339,14 +346,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (UE_list->active[i]) {
nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id];
-<<<<<<< HEAD
-
- if (nr_is_dci_opportunity(UE_list->search_space[i][1],
- UE_list->coreset[i][1],
- frameP,
- slotP,
- *cfg))
- nr_schedule_uss_dlsch_phytest(module_idP, frameP, slotP);
rnti = 0;//UE_RNTI(module_idP, i);
@@ -355,31 +354,35 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
*/
- PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frameP, slotP,module_idP);
+ PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frame_txP, slot_txP,module_idP);
pdcp_run(&ctxt);
//rrc_rx_tx(&ctxt, CC_id);
// This schedules MIB
- if((slotP == 0) && (frameP & 7) == 0){
- schedule_nr_mib(module_idP, frameP, slotP);
+ if((slot_txP == 0) && (frame_txP & 7) == 0){
+ schedule_nr_mib(module_idP, frame_txP, slot_txP);
}
// Phytest scheduling/ option not activated because of pending bug
+ // Phytest scheduling
+
+ if (slot_rxP==2){
+ nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
+ }
+
+ if (slot_txP==1){
+ nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
+ }
- /*if (slotP==2)
- nr_schedule_css_dlsch_phytest(module_idP, frameP, slotP);*/
-
- if (slotP==1)
- nr_schedule_uss_dlsch_phytest(module_idP, frameP, slotP, NULL);
/*
// Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
allocate_CCEs(module_idP, CC_id, subframeP, 0);
-
- stop_meas(&RC.nrmac[module_idP]->eNB_scheduler);
*/
+ stop_meas(&RC.nrmac[module_idP]->eNB_scheduler);
+
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
}
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
index 8dbdbc93fa..f657d52d50 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
@@ -62,23 +62,21 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc;
- nfapi_nr_dl_config_request_t *dl_config_request;
- nfapi_nr_dl_config_request_body_t *dl_req;
- nfapi_nr_dl_config_request_pdu_t *dl_config_pdu;
- nfapi_tx_request_pdu_t *TX_req;
+ nfapi_nr_dl_tti_request_t *dl_tti_request;
+ nfapi_nr_dl_tti_request_body_t *dl_req;
+ nfapi_nr_dl_tti_request_pdu_t *dl_config_pdu;
int mib_sdu_length;
int CC_id;
- uint16_t sfn_sf = frameP << 7 | slotP;
AssertFatal(slotP == 0, "Subframe must be 0\n");
AssertFatal((frameP & 7) == 0, "Frame must be a multiple of 8\n");
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
- dl_config_request = &gNB->DL_req[CC_id];
- dl_req = &dl_config_request->dl_config_request_body;
+ dl_tti_request = &gNB->DL_req[CC_id];
+ dl_req = &dl_tti_request->dl_tti_request_body;
cc = &gNB->common_channels[CC_id];
mib_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, MIBCH, 1, &cc->MIB_pdu.payload[0]); // not used in this case
@@ -87,38 +85,59 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
if (mib_sdu_length > 0) {
- LOG_D(MAC, "Frame %d, slot %d: Adding BCH PDU in position %d (length %d)\n", frameP, slotP, dl_req->number_pdu, mib_sdu_length);
+ LOG_I(MAC, "Frame %d, slot %d: Adding BCH PDU in position %d (length %d)\n", frameP, slotP, dl_req->nPDUs, mib_sdu_length);
if ((frameP & 1023) < 80){
- LOG_D(MAC,"[gNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes\n",module_idP, frameP, CC_id, mib_sdu_length);
+ LOG_I(MAC,"[gNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes\n",module_idP, frameP, CC_id, mib_sdu_length);
}
- dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
- memset((void *) dl_config_pdu, 0,sizeof(nfapi_nr_dl_config_request_pdu_t));
- dl_config_pdu->pdu_type = NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE;
- dl_config_pdu->pdu_size =2 + sizeof(nfapi_nr_dl_config_bch_pdu_rel15_t);
- dl_config_pdu->bch_pdu_rel15.tl.tag = NFAPI_NR_DL_CONFIG_REQUEST_BCH_PDU_REL15_TAG;
- dl_config_pdu->bch_pdu_rel15.length = mib_sdu_length;
- dl_config_pdu->bch_pdu_rel15.pdu_index = gNB->pdu_index[CC_id];
- dl_config_pdu->bch_pdu_rel15.transmission_power = 6000;
- dl_req->tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
- dl_req->number_pdu++;
- dl_config_request->header.message_id = NFAPI_DL_CONFIG_REQUEST;
- dl_config_request->sfn_sf = sfn_sf;
+ dl_config_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
+ memset((void *) dl_config_pdu, 0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
+ dl_config_pdu->PDUType = NFAPI_NR_DL_TTI_SSB_PDU_TYPE;
+ dl_config_pdu->PDUSize =2 + sizeof(nfapi_nr_dl_tti_ssb_pdu_rel15_t);
- LOG_D(MAC, "gNB->DL_req[0].number_pdu %d (%p)\n", dl_req->number_pdu, &dl_req->number_pdu);
- // DL request
-
- TX_req = &gNB->TX_req[CC_id].tx_request_body.tx_pdu_list[gNB->TX_req[CC_id].tx_request_body.number_of_pdus];
- TX_req->pdu_length = 3;
- TX_req->pdu_index = gNB->pdu_index[CC_id]++;
- TX_req->num_segments = 1;
- TX_req->segments[0].segment_length = 3;
- TX_req->segments[0].segment_data = cc[CC_id].MIB_pdu.payload;
- gNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
- gNB->TX_req[CC_id].sfn_sf = sfn_sf;
- gNB->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
- gNB->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
+ AssertFatal(cc->ServingCellConfigCommon->physCellId!=NULL,"cc->ServingCellConfigCommon->physCellId is null\n");
+ dl_config_pdu->ssb_pdu.ssb_pdu_rel15.PhysCellId = *cc->ServingCellConfigCommon->physCellId;
+ dl_config_pdu->ssb_pdu.ssb_pdu_rel15.BetaPss = 0;
+ dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = 0;
+ AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon!=NULL,"scc->downlinkConfigCommonL is null\n");
+ AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL is null\n");
+ AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB is null\n");
+ AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count==1,"Frequency Band list does not have 1 element (%d)\n",cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count);
+ AssertFatal(cc->ServingCellConfigCommon->ssbSubcarrierSpacing,"ssbSubcarrierSpacing is null\n");
+ AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],"band is null\n");
+ long band = *cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
+ uint32_t ssb_offset0 = cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB - cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA;
+ int ratio;
+ switch (*cc->ServingCellConfigCommon->ssbSubcarrierSpacing) {
+ case NR_SubcarrierSpacing_kHz15:
+ AssertFatal(band <= 79, "Band %d is not possible for SSB with 15 kHz SCS\n",band);
+ if (band<77) // below 3GHz
+ ratio=3; // NRARFCN step is 5 kHz
+ else
+ ratio=1; // NRARFCN step is 15 kHz
+ break;
+ case NR_SubcarrierSpacing_kHz30:
+ AssertFatal(band <= 79, "Band %d is not possible for SSB with 15 kHz SCS\n",band);
+ if (band<77) // below 3GHz
+ ratio=6; // NRARFCN step is 5 kHz
+ else
+ ratio=2; // NRARFCN step is 15 kHz
+ break;
+ case NR_SubcarrierSpacing_kHz120:
+ AssertFatal(band >= 257, "Band %d is not possible for SSB with 120 kHz SCS\n",band);
+ ratio=8; // NRARFCN step is 15 kHz
+ break;
+ case NR_SubcarrierSpacing_kHz240:
+ AssertFatal(band >= 257, "Band %d is not possible for SSB with 240 kHz SCS\n",band);
+ ratio=16; // NRARFCN step is 15 kHz
+ break;
+ }
+ dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset = 0; //kSSB
+ dl_config_pdu->ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA = ssb_offset0/ratio;
+ dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag = 1;
+ dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload = ((uint32_t)cc->MIB_pdu.payload[0]) & ((1<<24)-1);
+ dl_req->nPDUs++;
}
}
}
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
index 9002d57a22..6ea7829d53 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
@@ -58,23 +58,20 @@ extern RAN_CONTEXT_t RC;
* current version has only a DCI for type 1 PDCCH for C_RNTI*/
void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
frame_t frameP,
- sub_frame_t slotP)
-{
+ sub_frame_t slotP) {
uint8_t CC_id;
-
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc = &nr_mac->common_channels[0];
- nfapi_nr_dl_config_request_body_t *dl_req;
- nfapi_nr_dl_config_request_pdu_t *dl_config_dci_pdu;
- nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu;
- nfapi_tx_request_pdu_t *TX_req;
+ nfapi_nr_dl_tti_request_body_t *dl_req;
+ nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu;
+ nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu;
+ nfapi_nr_pdu_t *TX_req;
uint16_t rnti = 0x1234;
NR_ServingCellConfigCommon_t *scc=cc->ServingCellConfigCommon;
- uint16_t sfn_sf = frameP << 7 | slotP;
int dlBWP_carrier_bandwidth = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
// everything here is hard-coded to 30 kHz
@@ -88,51 +85,51 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275));
- dl_req = &nr_mac->DL_req[CC_id].dl_config_request_body;
- dl_config_dci_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
- memset((void*)dl_config_dci_pdu,0,sizeof(nfapi_nr_dl_config_request_pdu_t));
- dl_config_dci_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE;
- dl_config_dci_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dci_dl_pdu));
+ dl_req = &nr_mac->DL_req[CC_id].dl_tti_request_body;
+ dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
+ memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
+ dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
+ dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
- dl_config_dlsch_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu+1];
- memset((void*)dl_config_dlsch_pdu,0,sizeof(nfapi_nr_dl_config_request_pdu_t));
- dl_config_dlsch_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE;
- dl_config_dlsch_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dlsch_pdu));
+ dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs+1];
+ memset((void *)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
+ dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE;
+ dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
+
- nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &dl_config_dci_pdu->dci_dl_pdu.dci_dl_pdu_rel15;
- nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &dl_config_dci_pdu->dci_dl_pdu.pdcch_params_rel15;
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15;
+ nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
- dlsch_pdu_rel15->pduBitmap = 0;
- dlsch_pdu_rel15->rnti = rnti;
- dlsch_pdu_rel15->pduIndex = 0;
+ pdsch_pdu_rel15->pduBitmap = 0;
+ pdsch_pdu_rel15->rnti = rnti;
+ pdsch_pdu_rel15->pduIndex = 0;
// BWP
- dlsch_pdu_rel15->BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
- dlsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
- dlsch_pdu_rel15->SubcarrierSpacing = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
- dlsch_pdu_rel15->CyclicPrefix = 0;
- dlsch_pdu_rel15->NrOfCodewords = 1;
+ pdsch_pdu_rel15->BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
+ pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
+ pdsch_pdu_rel15->SubcarrierSpacing = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
+ pdsch_pdu_rel15->CyclicPrefix = 0;
+ pdsch_pdu_rel15->NrOfCodewords = 1;
int mcsIndex = 9;
- dlsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcsIndex,0);
- dlsch_pdu_rel15->qamModOrder[0] = 2;
- dlsch_pdu_rel15->mcsIndex[0] = mcsIndex;
- dlsch_pdu_rel15->mcsTable[0] = 0;
- dlsch_pdu_rel15->rvIndex[0] = 0;
- dlsch_pdu_rel15->dataScramblingId = *scc->physCellId;
- dlsch_pdu_rel15->nrOfLayers = 1;
- dlsch_pdu_rel15->transmissionScheme = 0;
- dlsch_pdu_rel15->refPoint = 0; // Point A
+ pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcsIndex,0);
+ pdsch_pdu_rel15->qamModOrder[0] = 2;
+ pdsch_pdu_rel15->mcsIndex[0] = mcsIndex;
+ pdsch_pdu_rel15->mcsTable[0] = 0;
+ pdsch_pdu_rel15->rvIndex[0] = 0;
+ pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
+ pdsch_pdu_rel15->nrOfLayers = 1;
+ pdsch_pdu_rel15->transmissionScheme = 0;
+ pdsch_pdu_rel15->refPoint = 0; // Point A
- dlsch_pdu_rel15->dmrsConfigType = 1; // 1 by default for InitialBWP
- dlsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
- dlsch_pdu_rel15->SCID = 0;
- dlsch_pdu_rel15->numDmrsCdmGrpsNoData = 1;
- dlsch_pdu_rel15->dmrsPorts = 1;
- dlsch_pdu_rel15->resourceAlloc = 1;
- dlsch_pdu_rel15->rbStart = 0;
- dlsch_pdu_rel15->rbSize = 6;
- dlsch_pdu_rel15->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP
+ pdsch_pdu_rel15->dmrsConfigType = 1; // 1 by default for InitialBWP
+ pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
+ pdsch_pdu_rel15->SCID = 0;
+ pdsch_pdu_rel15->numDmrsCdmGrpsNoData = 1;
+ pdsch_pdu_rel15->dmrsPorts = 1;
+ pdsch_pdu_rel15->resourceAlloc = 1;
+ pdsch_pdu_rel15->rbStart = 0;
+ pdsch_pdu_rel15->rbSize = 6;
+ pdsch_pdu_rel15->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP
// choose shortest PDSCH
int startSymbolAndLength=0;
int StartSymbolIndex,NrOfSymbols=14,k0=0;
@@ -151,14 +148,15 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
time_domain_assignment = i;
}
}
- dlsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
- dlsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
- dlsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
+ pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
+ pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
+ pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
scc->dmrs_TypeA_Position,
NrOfSymbols);
+ /*
AssertFatal(k0==0,"k0 is not zero for Initial DL BWP TimeDomain Alloc\n");
- nr_configure_css_dci_initial(params_rel15,
+ nr_configure_css_dci_initial(pdcch_pdu_rel15,
scs,
scs,
FR,
@@ -169,10 +167,9 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
slots_per_frame,
dlBWP_carrier_bandwidth);
- params_rel15->first_slot = 0;
- pdu_rel15->frequency_domain_assignment = PRBalloc_to_locationandbandwidth0(dlsch_pdu_rel15->rbStart,
- dlsch_pdu_rel15->rbSize,
+ pdu_rel15->frequency_domain_assignment = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbStart,
+ pdsch_pdu_rel15->rbSize,
dlBWP_carrier_bandwidth);
pdu_rel15->time_domain_assignment = time_domain_assignment;
@@ -218,226 +215,262 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
params_rel15->nb_slots,
params_rel15->sfn_mod2,
params_rel15->first_slot);
- nr_get_tbs_dl(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu,0);
+ nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, dl_tti_dci_pdu->dci_dl_pdu,0);
LOG_D(MAC, "DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d\n",
- dlsch_pdu_rel15->rbStart,
- dlsch_pdu_rel15->rbSize,
- dlsch_pdu_rel15->StartSymbolIndex,
- dlsch_pdu_rel15->NrOfSymbols,
- dlsch_pdu_rel15->nrOfLayers,
- dlsch_pdu_rel15->NrOfCodewords,
- dlsch_pdu_rel15->mcsIndex[0]);
+ pdsch_pdu_rel15->rbStart,
+ pdsch_pdu_rel15->rbSize,
+ pdsch_pdu_rel15->StartSymbolIndex,
+ pdsch_pdu_rel15->NrOfSymbols,
+ pdsch_pdu_rel15->nrOfLayers,
+ pdsch_pdu_rel15->NrOfCodewords,
+ pdsch_pdu_rel15->mcsIndex[0]);
+ */
- dl_req->number_dci++;
- dl_req->number_pdsch_rnti++;
- dl_req->number_pdu+=2;
-
- TX_req = &nr_mac->TX_req[CC_id].tx_request_body.tx_pdu_list[nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus];
- TX_req->pdu_length = 6;
- TX_req->pdu_index = nr_mac->pdu_index[CC_id]++;
- TX_req->num_segments = 1;
- TX_req->segments[0].segment_length = 8;
- TX_req->segments[0].segment_data = &cc[CC_id].RAR_pdu.payload[0];
- nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
- nr_mac->TX_req[CC_id].sfn_sf = sfn_sf;
- nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
- nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
+ dl_req->nPDUs+=2;
+ TX_req = &nr_mac->TX_req[CC_id].pdu_list[nr_mac->TX_req[CC_id].Number_of_PDUs];
+ TX_req->PDU_length = 6;
+ TX_req->PDU_index = nr_mac->pdu_index[CC_id]++;
+ TX_req->num_TLV = 1;
+ TX_req->TLVs[0].length = 8;
+ memcpy((void*)&TX_req->TLVs[0].value.direct[0],(void*)&cc[CC_id].RAR_pdu.payload[0],TX_req->TLVs[0].length);
+ nr_mac->TX_req[CC_id].Number_of_PDUs++;
+ nr_mac->TX_req[CC_id].SFN=frameP;
+ nr_mac->TX_req[CC_id].Slot=slotP;
}
}
int configure_fapi_dl_Tx(int Mod_idP,
- nfapi_nr_dl_config_request_body_t *dl_req,
- nfapi_tx_request_pdu_t *TX_req,
- nfapi_nr_config_request_t *cfg,
- nfapi_nr_coreset_t* coreset,
- nfapi_nr_search_space_t* search_space,
- int16_t pdu_index) {
+ nfapi_nr_dl_tti_request_body_t *dl_req,
+ nfapi_nr_pdu_t *TX_req) {
+
gNB_MAC_INST *nr_mac = RC.nrmac[Mod_idP];
NR_COMMON_channels_t *cc = nr_mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
- nfapi_nr_dl_config_request_pdu_t *dl_config_dci_pdu;
- nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu;
+ nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu;
+ nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu;
int TBS;
-
int bwp_id=1;
+
int UE_id = 0;
NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id);
+
+
+
LOG_I(PHY,"UE_id %d\n",UE_id);
NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id];
+ AssertFatal(secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1,
+ "downlinkBWP_ToAddModList has %d BWP!\n",
+ secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count);
+ NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
- dl_config_dci_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
- memset((void*)dl_config_dci_pdu,0,sizeof(nfapi_nr_dl_config_request_pdu_t));
- dl_config_dci_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE;
- dl_config_dci_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dci_dl_pdu));
+
+ dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
+ memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
+ dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
+ dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
- dl_config_dlsch_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu+1];
- memset((void*)dl_config_dlsch_pdu,0,sizeof(nfapi_nr_dl_config_request_pdu_t));
- dl_config_dlsch_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE;
- dl_config_dlsch_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dlsch_pdu));
+ dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs+1];
+ memset((void*)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
+ dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE;
+ dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
+
+ nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
+
+
+ pdsch_pdu_rel15->pduBitmap = 0;
+ pdsch_pdu_rel15->rnti = UE_list->rnti[UE_id];
+ pdsch_pdu_rel15->pduIndex = 0;
+
+ // BWP
+ pdsch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
+ pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
+ pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
+ if (bwp->bwp_Common->genericParameters.cyclicPrefix) pdsch_pdu_rel15->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
+ else pdsch_pdu_rel15->CyclicPrefix=0;
+
+ pdsch_pdu_rel15->NrOfCodewords = 1;
+ int mcsIndex = 9;
+ pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcsIndex,0);
+ pdsch_pdu_rel15->qamModOrder[0] = 2;
+ pdsch_pdu_rel15->mcsIndex[0] = mcsIndex;
+ pdsch_pdu_rel15->mcsTable[0] = 0;
+ pdsch_pdu_rel15->rvIndex[0] = 0;
+ pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
+ pdsch_pdu_rel15->nrOfLayers = 1;
+ pdsch_pdu_rel15->transmissionScheme = 0;
+ pdsch_pdu_rel15->refPoint = 0; // Point A
+
+ pdsch_pdu_rel15->dmrsConfigType = 1; // 1 by default for InitialBWP
+ pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
+ pdsch_pdu_rel15->SCID = 0;
+ pdsch_pdu_rel15->numDmrsCdmGrpsNoData = 1;
+ pdsch_pdu_rel15->dmrsPorts = 1;
+ pdsch_pdu_rel15->resourceAlloc = 1;
+ pdsch_pdu_rel15->rbStart = 0;
+ pdsch_pdu_rel15->rbSize = 50;
+ pdsch_pdu_rel15->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP
+ // choose shortest PDSCH
+ int startSymbolAndLength=0;
+ int time_domain_assignment=2;
+ int StartSymbolIndex,NrOfSymbols;
+
+ AssertFatal(time_domain_assignmentbwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count,"time_domain_assignment %d>=%d\n",time_domain_assignment,bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count);
+ startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength;
+ SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols);
+ pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
+ pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
+
+ // k0 = *bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
+ pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
+ scc->dmrs_TypeA_Position,
+ pdsch_pdu_rel15->NrOfSymbols);
+
+ dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET];
- nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &dl_config_dci_pdu->dci_dl_pdu.dci_dl_pdu_rel15;
- nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &dl_config_dci_pdu->dci_dl_pdu.pdcch_params_rel15;
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15;
-
- NR_BWP_Downlink_t *bwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[*secondaryCellGroup->spCellConfig->spCellConfigDedicated->firstActiveDownlinkBWP_Id-1];
-
- // get Coreset for PDCCH
-
- // Get SSpace for PDCCH
-
- // get TimeDomainAllocationList for PDSCH
-
- NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainResourceAllocationList;
- if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList != NULL)
- pdsch_TimeDomainResourceAllocationList = bwp->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup;
- else pdsch_TimeDomainResourceAllocationList = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
-
- int pdsch_start_symbol,pdsch_length;
- int pdsch_K0;
- // find index which has first PDCCH symbol equal to 1 and has more than 11 symbols
- for (int i=0;ilist.count;i++) {
- SLIV2SL(pdsch_TimeDomainResourceAllocationList->list.array[i]->startSymbolAndLength,
- &pdsch_start_symbol,
- &pdsch_length);
- pdsch_K0 = *pdsch_TimeDomainResourceAllocationList->list.array[i]->k0;
- if (pdsch_start_symbol == 1 && pdsch_length>=12)
- break;
- }
- AssertFatal(pdsch_K0==0,"can't handle pdsch_K0 > 0\n");
- AssertFatal(pdsch_start_symbol > 0 && pdsch_start_symbol < 8,
- "illegal pdsch_start_symbol %d\n",pdsch_start_symbol);
- AssertFatal(pdsch_length > 0 && pdsch_length < 14,
- "illegal pdsch_length %d\n",pdsch_length);
-
- dlsch_pdu_rel15->rnti = UE_list->rnti[UE_id];
- dlsch_pdu_rel15->rbStart = 0;
- dlsch_pdu_rel15->rbSize = 50;
- dlsch_pdu_rel15->StartSymbolIndex = pdsch_start_symbol;
- dlsch_pdu_rel15->NrOfSymbols = pdsch_length;
- dlsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(bwp->bwp_Dedicated->pdsch_Config->choice.setup,
- scc->dmrs_TypeA_Position,
- pdsch_length);
- dlsch_pdu_rel15->NrOfCodewords = 1;
- dlsch_pdu_rel15->targetCodeRate[0] = 0;
- dlsch_pdu_rel15->qamModOrder[0] = 0;
- dlsch_pdu_rel15->mcsIndex[0] = 9;
- dlsch_pdu_rel15->mcsTable[0] = 0;
- dlsch_pdu_rel15->rvIndex[0] = 0;
- dlsch_pdu_rel15->TBSize[0]=0;
- dlsch_pdu_rel15->nrOfLayers =1;
-
-
- nr_configure_dci_from_pdcch_config(params_rel15,
- 1, // ue specific,
- 4,
- 0,
- scc,
- bwp);
+ dci_pdu_rel15[0].frequency_domain_assignment = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbStart,
+ pdsch_pdu_rel15->rbSize,
+ NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275));
+ dci_pdu_rel15[0].time_domain_assignment = time_domain_assignment; // row index used here instead of SLIV;
+ dci_pdu_rel15[0].vrb_to_prb_mapping = 1;
+ dci_pdu_rel15[0].mcs = pdsch_pdu_rel15->mcsIndex[0];
+ dci_pdu_rel15[0].tb_scaling = 1;
- pdu_rel15->frequency_domain_assignment = PRBalloc_to_locationandbandwidth0(dlsch_pdu_rel15->rbStart, dlsch_pdu_rel15->rbSize, cfg->rf_config.dl_carrier_bandwidth.value);
- pdu_rel15->time_domain_assignment = 3; // row index used here instead of SLIV;
- pdu_rel15->vrb_to_prb_mapping = 1;
- pdu_rel15->mcs = dlsch_pdu_rel15->mcsIndex[0];
- pdu_rel15->tb_scaling = 1;
-
- pdu_rel15->ra_preamble_index = 25;
- pdu_rel15->format_indicator = 1;
- pdu_rel15->ndi = 1;
- pdu_rel15->rv = 0;
- pdu_rel15->harq_pid = 0;
- pdu_rel15->dai = 2;
- pdu_rel15->tpc = 2;
- pdu_rel15->pucch_resource_indicator = 7;
- pdu_rel15->pdsch_to_harq_feedback_timing_indicator = 7;
+ dci_pdu_rel15[0].ra_preamble_index = 25;
+ dci_pdu_rel15[0].format_indicator = 1;
+ dci_pdu_rel15[0].ndi = 1;
+ dci_pdu_rel15[0].rv = 0;
+ dci_pdu_rel15[0].harq_pid = 0;
+ dci_pdu_rel15[0].dai = 2;
+ dci_pdu_rel15[0].tpc = 2;
+ dci_pdu_rel15[0].pucch_resource_indicator = 7;
+ dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = 7;
LOG_I(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
- pdu_rel15->frequency_domain_assignment,
- pdu_rel15->time_domain_assignment,
- pdu_rel15->vrb_to_prb_mapping,
- pdu_rel15->mcs,
- pdu_rel15->tb_scaling,
- pdu_rel15->ndi,
- pdu_rel15->rv);
+ dci_pdu_rel15[0].frequency_domain_assignment,
+ dci_pdu_rel15[0].time_domain_assignment,
+ dci_pdu_rel15[0].vrb_to_prb_mapping,
+ dci_pdu_rel15[0].mcs,
+ dci_pdu_rel15[0].tb_scaling,
+ dci_pdu_rel15[0].ndi,
+ dci_pdu_rel15[0].rv);
- params_rel15->rnti = UE_list->rnti[UE_id];
- params_rel15->rnti_type = NFAPI_NR_RNTI_C;
- params_rel15->dci_format = NFAPI_NR_DL_DCI_FORMAT_1_0;
+ nr_configure_pdcch(pdcch_pdu_rel15,
+ 1, // ue-specific
+ scc,
+ bwp);
+
+ pdcch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
+ pdcch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
+ pdcch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
+
+ pdcch_pdu_rel15->numDlDci = 1;
+ pdcch_pdu_rel15->AggregationLevel[0] = 4;
+ pdcch_pdu_rel15->RNTI[0]=UE_list->rnti[0];
+ pdcch_pdu_rel15->CceIndex[0] = 0;
+ pdcch_pdu_rel15->beta_PDCCH_1_0[0]=0;
+ pdcch_pdu_rel15->powerControlOffsetSS[0]=1;
+
+ int dci_formats[2];
+ int rnti_types[2];
+
+ dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
+ rnti_types[0] = NR_RNTI_C;
+
+ pdcch_pdu_rel15->PayloadSizeBits[0]=nr_dci_size(dci_formats[0],rnti_types[0],pdcch_pdu_rel15->BWPSize);
+
+ LOG_I(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d\n \
+ coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n",
+ pdcch_pdu_rel15->RNTI[0],
+ rnti_types[0],
+ dci_formats[0],
+ (unsigned long long)pdcch_pdu_rel15->FreqDomainResource,
+ pdcch_pdu_rel15->StartSymbolIndex,
+ pdcch_pdu_rel15->DurationSymbols);
- //params_rel15->aggregation_level = 1;
- LOG_I(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d, config type %d\n \
- coreset params: mux_pattern %d, n_rb %d, n_symb %d, rb_offset %d \n \
- ss params : first symb %d, ss type %d\n",
- params_rel15->rnti,
- params_rel15->rnti_type,
- params_rel15->config_type,
- params_rel15->dci_format,
- params_rel15->mux_pattern,
- params_rel15->n_rb,
- params_rel15->n_symb,
- params_rel15->rb_offset,
- params_rel15->first_symbol,
- params_rel15->search_space_type);
int x_Overhead = 0; // should be 0 for initialBWP
- nr_get_tbs_dl(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu,x_Overhead);
+ nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu,
+ x_Overhead);
// Hardcode it for now
- TBS = dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15.TBSize[0];
- LOG_D(MAC, "DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d TBS: %d\n",
- dlsch_pdu_rel15->rbStart,
- dlsch_pdu_rel15->rbSize,
- dlsch_pdu_rel15->StartSymbolIndex,
- dlsch_pdu_rel15->NrOfSymbols,
- dlsch_pdu_rel15->nrOfLayers,
- dlsch_pdu_rel15->NrOfCodewords,
- dlsch_pdu_rel15->mcsIndex[0],
+ TBS = dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15.TBSize[0];
+ LOG_I(MAC, "DLSCH PDU: start PRB %d n_PRB %d startSymbolAndLength %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d TBS: %d\n",
+ pdsch_pdu_rel15->rbStart,
+ pdsch_pdu_rel15->rbSize,
+ startSymbolAndLength,
+ pdsch_pdu_rel15->StartSymbolIndex,
+ pdsch_pdu_rel15->NrOfSymbols,
+ pdsch_pdu_rel15->nrOfLayers,
+ pdsch_pdu_rel15->NrOfCodewords,
+ pdsch_pdu_rel15->mcsIndex[0],
TBS);
- dl_req->number_dci++;
- dl_req->number_pdsch_rnti++;
- dl_req->number_pdu+=2;
-
- TX_req->pdu_length = dlsch_pdu_rel15->TBSize[0];
- TX_req->pdu_index = pdu_index++;
- TX_req->num_segments = 1;
+ dl_req->nPDUs+=2;
+
+ TX_req->PDU_length = pdsch_pdu_rel15->TBSize[0];
+ TX_req->PDU_index = nr_mac->pdu_index[0]++;
+
+ // TX_req->num_TLV = 1;
+ // TX_req->TLVs[0].length = 8;
+ // memcpy((void*)&TX_req->TLVs[0].value.direct[0],(void*)&cc[CC_id].RAR_pdu.payload[0],TX_req->TLVs[0].length);
+
return TBS/8; //Return TBS in bytes
}
+void config_uldci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, int *dci_formats, int *rnti_types) {
+ dci_pdu_rel15->frequency_domain_assignment = 0; // PRBalloc_to_locationandbandwidth0(0,50,NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275)); // to be changed with UL bwp
+ dci_pdu_rel15->time_domain_assignment = 2; // row index used here instead of SLIV;
+ dci_pdu_rel15->frequency_hopping_flag = 1;
+ dci_pdu_rel15->mcs = 9;
+
+ dci_pdu_rel15->format_indicator = 0;
+ dci_pdu_rel15->ndi = 1;
+ dci_pdu_rel15->rv = 0;
+ dci_pdu_rel15->harq_pid = 0;
+ dci_pdu_rel15->tpc = 2;
+
+ LOG_I(MAC, "[gNB scheduler phytest] DCI type 0 payload: freq_alloc %d, time_alloc %d, freq_hop_flag %d, mcs %d tpc %d ndi %d rv %d\n",
+ dci_pdu_rel15->frequency_domain_assignment,
+ dci_pdu_rel15->time_domain_assignment,
+ dci_pdu_rel15->frequency_hopping_flag,
+ dci_pdu_rel15->mcs,
+ dci_pdu_rel15->tpc,
+ dci_pdu_rel15->ndi,
+ dci_pdu_rel15->rv);
+
+ dci_formats[pdcch_pdu_rel15->numDlDci] = NR_UL_DCI_FORMAT_0_0;
+ rnti_types[pdcch_pdu_rel15->numDlDci] = NR_RNTI_C;
+ pdcch_pdu_rel15->numDlDci++;
+}
+
void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config)
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *dlsch_config)
{
LOG_D(MAC, "In nr_schedule_uss_dlsch_phytest \n");
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
//NR_COMMON_channels_t *cc = nr_mac->common_channels;
//NR_ServingCellConfigCommon_t *scc=cc->ServingCellConfigCommon;
- nfapi_nr_dl_config_request_body_t *dl_req;
- nfapi_tx_request_pdu_t *TX_req;
+ nfapi_nr_dl_tti_request_body_t *dl_req;
+ nfapi_nr_pdu_t *TX_req;
uint16_t rnti = 0x1234;
-
- nfapi_nr_config_request_t *cfg = &nr_mac->config[0];
-
- uint16_t sfn_sf = frameP << 7 | slotP;
-
- // everything here is hard-coded to 30 kHz
- //int scs = get_dlscs(cfg);
- //int slots_per_frame = get_spf(cfg);
-
+
int TBS;
int TBS_bytes;
int lcid;
@@ -455,28 +488,27 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
int padding = 0, post_padding = 0;
UE_list_t *UE_list = &nr_mac->UE_list;
- DLSCH_PDU DLSCH_pdu;
- //DLSCH_PDU *DLSCH_pdu = (DLSCH_PDU*) malloc(sizeof(DLSCH_PDU));
+ DLSCH_PDU dlsch_pdu;
+ //PDSCH_PDU *pdsch_pdu = (PDSCH_PDU*) malloc(sizeof(PDSCH_PDU));
LOG_D(MAC, "Scheduling UE specific search space DCI type 1\n");
int CC_id=0;
- dl_req = &nr_mac->DL_req[CC_id].dl_config_request_body;
- TX_req = &nr_mac->TX_req[CC_id].tx_request_body.tx_pdu_list[nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus];
+ dl_req = &nr_mac->DL_req[CC_id].dl_tti_request_body;
+ TX_req = &nr_mac->TX_req[CC_id].pdu_list[nr_mac->TX_req[CC_id].Number_of_PDUs];
//The --NOS1 use case currently schedules DLSCH transmissions only when there is IP traffic arriving
//through the LTE stack
if (IS_SOFTMODEM_NOS1){
- memset(&DLSCH_pdu, 0, sizeof(DLSCH_pdu));
+ memset(&dlsch_pdu, 0, sizeof(DLSCH_PDU));
int ta_update = 31;
ta_len = 0;
// Hardcode it for now
TBS = 6784/8; //TBS in bytes
- //nr_get_tbs_dl(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu, *cfg);
- //TBS = dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15.transport_block_size;
+ //TBS = dl_tti_pdsch_pdu->pdsch_pdu.dlsch_pdu_rel15.transport_block_size;
for (lcid = NB_RB_MAX - 1; lcid >= DTCH; lcid--) {
// TODO: check if the lcid is active
@@ -568,6 +600,7 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
ta_update, // timing advance
NULL, // contention res id
padding, post_padding);
+
LOG_D(MAC, "Offset bits: %d \n", offset);
// Probably there should be other actions done before that
@@ -583,10 +616,9 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
nr_mac->UE_list.DLSCH_pdu[0][0].payload[0][offset + sdu_length_total + j] = 0;
}
- TBS_bytes = configure_fapi_dl_Tx(module_idP,dl_req, TX_req, cfg,
- &nr_mac->UE_list.coreset[1],
- &nr_mac->UE_list.search_space[1],
- nr_mac->pdu_index);
+ TBS_bytes = configure_fapi_dl_Tx(module_idP,
+ dl_req,
+ TX_req);
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_I(MAC, "Printing first 10 payload bytes at the gNB side, Frame: %d, slot: %d, , TBS size: %d \n \n", frameP, slotP, TBS_bytes);
@@ -595,25 +627,21 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
}
#endif
- //TX_req->segments[0].segment_length = 8;
- TX_req->segments[0].segment_length = TBS_bytes +2;
- TX_req->segments[0].segment_data = nr_mac->UE_list.DLSCH_pdu[0][0].payload[0];
+ TX_req->num_TLV=1;
+ TX_req->TLVs[0].length = TBS_bytes +2;
+ memcpy((void*)&TX_req->TLVs[0].value.direct[0],(void*)&nr_mac->UE_list.DLSCH_pdu[0][0].payload[0],TBS_bytes);;
- nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
- nr_mac->TX_req[CC_id].sfn_sf = sfn_sf;
- nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
- nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
+ nr_mac->TX_req[CC_id].Number_of_PDUs++;
+ nr_mac->TX_req[CC_id].SFN = frameP;
+ nr_mac->TX_req[CC_id].Slot = slotP;
} //if (ta_len + sdu_length_total + header_length_total > 0)
} //if (IS_SOFTMODEM_NOS1)
//When the --NOS1 option is not enabled, DLSCH transmissions with random data
//occur every time that the current function is called (dlsch phytest mode)
else{
- TBS_bytes = configure_fapi_dl_Tx(module_idP,dl_req, TX_req, cfg,
- &nr_mac->UE_list.coreset[1],
- &nr_mac->UE_list.search_space[1],
- nr_mac->pdu_index[CC_id]);
+ TBS_bytes = configure_fapi_dl_Tx(module_idP,dl_req, TX_req);
// HOT FIX for all zero pdu problem
// ------------------------------------------------------------------------------------------------
@@ -631,18 +659,149 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
#endif
//TX_req->segments[0].segment_length = 8;
- TX_req->segments[0].segment_length = TBS_bytes +2;
- TX_req->segments[0].segment_data = nr_mac->UE_list.DLSCH_pdu[0][0].payload[0];
+ TX_req->num_TLV=1;
+ TX_req->TLVs[0].length = TBS_bytes +2;
+ memcpy((void*)&TX_req->TLVs[0].value.direct[0],
+ (void*)&nr_mac->UE_list.DLSCH_pdu[0][0].payload[0],
+ TBS_bytes);
- nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
- nr_mac->TX_req[CC_id].sfn_sf = sfn_sf;
- nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
- nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
+ nr_mac->TX_req[CC_id].Number_of_PDUs++;
+ nr_mac->TX_req[CC_id].SFN = frameP;
+ nr_mac->TX_req[CC_id].Slot = slotP;
// ------------------------------------------------------------------------------------------------
}
}
+void nr_schedule_uss_ulsch_phytest(int Mod_idP,
+ frame_t frameP,
+ sub_frame_t slotP) {
+
+ gNB_MAC_INST *nr_mac = RC.nrmac[Mod_idP];
+ NR_COMMON_channels_t *cc = nr_mac->common_channels;
+ NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
+
+ int bwp_id=1;
+
+ int UE_id = 0;
+ NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
+ AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id);
+
+ NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id];
+ AssertFatal(secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1,
+ "downlinkBWP_ToAddModList has %d BWP!\n",
+ secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count);
+ NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
+
+ nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
+ nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[Mod_idP]->UL_dci_req[0];
+ uint16_t rnti = UE_list->rnti[UE_id];
+ nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu;
+ for (uint8_t CC_id=0; CC_idUL_tti_req[CC_id];
+ UL_tti_req->SFN = frameP;
+ UL_tti_req->Slot = slotP;
+ UL_tti_req->n_pdus = 1;
+ UL_tti_req->pdus_list[0].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
+ UL_tti_req->pdus_list[0].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
+ nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu;
+ memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t));
+ /*
+ // original configuration
+ rel15_ul->rnti = 0x1234;
+ rel15_ul->ulsch_pdu_rel15.start_rb = 30;
+ rel15_ul->ulsch_pdu_rel15.number_rbs = 50;
+ rel15_ul->ulsch_pdu_rel15.start_symbol = 2;
+ rel15_ul->ulsch_pdu_rel15.number_symbols = 12;
+ rel15_ul->ulsch_pdu_rel15.nb_re_dmrs = 6;
+ rel15_ul->ulsch_pdu_rel15.length_dmrs = 1;
+ rel15_ul->ulsch_pdu_rel15.Qm = 2;
+ rel15_ul->ulsch_pdu_rel15.mcs = 9;
+ rel15_ul->ulsch_pdu_rel15.rv = 0;
+ rel15_ul->ulsch_pdu_rel15.n_layers = 1;
+ */
+ pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
+ pusch_pdu->rnti = rnti;
+ pusch_pdu->handle = 0; //not yet used
+ //BWP related paramters - we don't yet use them as the PHY only uses one default BWP
+ //pusch_pdu->bwp_size;
+ //pusch_pdu->bwp_start;
+ //pusch_pdu->subcarrier_spacing;
+ //pusch_pdu->cyclic_prefix;
+ //pusch information always include
+ //this informantion seems to be redundant. with hthe mcs_index and the modulation table, the mod_order and target_code_rate can be determined.
+ pusch_pdu->mcs_index = 9;
+ pusch_pdu->mcs_table = 0; //0: notqam256 [TS38.214, table 5.1.3.1-1] - corresponds to nr_target_code_rate_table1 in PHY
+ pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table) ;
+ pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table) ;
+ pusch_pdu->transform_precoding = 0;
+ pusch_pdu->data_scrambling_id = 0; //It equals the higher-layer parameter Data-scrambling-Identity if configured and the RNTI equals the C-RNTI, otherwise L2 needs to set it to physical cell id.;
+ pusch_pdu->nrOfLayers = 1;
+ //DMRS
+ pusch_pdu->ul_dmrs_symb_pos = 1;
+ pusch_pdu->dmrs_config_type = 0; //dmrs-type 1 (the one with a single DMRS symbol in the beginning)
+ pusch_pdu->ul_dmrs_scrambling_id = 0; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
+ pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
+ //pusch_pdu->num_dmrs_cdm_grps_no_data;
+ //pusch_pdu->dmrs_ports; //DMRS ports. [TS38.212 7.3.1.1.2] provides description between DCI 0-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used
+ //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2]
+ pusch_pdu->resource_alloc = 1; //type 1
+ //pusch_pdu->rb_bitmap;// for ressource alloc type 0
+ pusch_pdu->rb_start = 0;
+ pusch_pdu->rb_size = 50;
+ pusch_pdu->vrb_to_prb_mapping = 0;
+ pusch_pdu->frequency_hopping = 0;
+ //pusch_pdu->tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE]
+ pusch_pdu->uplink_frequency_shift_7p5khz = 0;
+ //Resource Allocation in time domain
+ pusch_pdu->start_symbol_index = 2;
+ pusch_pdu->nr_of_symbols = 12;
+ //Optional Data only included if indicated in pduBitmap
+ pusch_pdu->pusch_data.rv_index = 0;
+ pusch_pdu->pusch_data.harq_process_id = 0;
+ pusch_pdu->pusch_data.new_data_indicator = 0;
+ pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->mcs_index,
+ pusch_pdu->target_code_rate,
+ pusch_pdu->rb_size,
+ pusch_pdu->nr_of_symbols,
+ 6, //nb_re_dmrs - not sure where this is coming from - its not in the FAPI
+ 0, //nb_rb_oh
+ pusch_pdu->nrOfLayers = 1);
+ pusch_pdu->pusch_data.num_cb = 0; //CBG not supported
+ //pusch_pdu->pusch_data.cb_present_and_position;
+ //pusch_pdu->pusch_uci;
+ //pusch_pdu->pusch_ptrs;
+ //pusch_pdu->dfts_ofdm;
+ //beamforming
+ //pusch_pdu->beamforming; //not used for now
+ }
+
+ ul_dci_request_pdu = &UL_dci_req->ul_dci_pdu_list[UL_dci_req->numPdus];
+ memset((void*)ul_dci_request_pdu,0,sizeof(nfapi_nr_ul_dci_request_pdus_t));
+ ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
+ ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
+ nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
+
+ int dci_formats[2];
+ int rnti_types[2];
+
+ dci_formats[0] = NR_UL_DCI_FORMAT_0_0;
+ rnti_types[0] = NR_RNTI_C;
+
+ nr_configure_pdcch(pdcch_pdu_rel15,
+ 1, // ue-specific,
+ scc,
+ bwp);
+
+ dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET];
+
+ config_uldci(pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types);
+
+ pdcch_pdu_rel15->PayloadSizeBits[0]=nr_dci_size(dci_formats[0],rnti_types[0],pdcch_pdu_rel15->BWPSize);
+ fill_dci_pdu_rel15(pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types);
+
+}
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
index bfe6ac98f8..facece2aae 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
@@ -134,7 +134,7 @@ int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slot){
return (0);
}
-void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
+void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
@@ -152,6 +152,8 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
uint8_t mu = scs_common;
uint8_t O_scale=0, M_scale=0; // used to decide if the values of O and M need to be divided by 2
+ AssertFatal(1==0,"todo\n");
+ /*
/// Coreset params
switch(scs_common) {
@@ -160,18 +162,18 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
switch(pdcch_scs) {
case kHz15:
AssertFatal(cset_idx<15,"Coreset index %d reserved for scs kHz15/kHz15\n", cset_idx);
- pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
- pdcch_params->n_rb = (cset_idx < 6)? 24 : (cset_idx < 12)? 48 : 96;
- pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_15_15[cset_idx];
- pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_15_15[cset_idx];
+ pdcch_pdu->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
+ pdcch_pdu->n_rb = (cset_idx < 6)? 24 : (cset_idx < 12)? 48 : 96;
+ pdcch_pdu->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_15_15[cset_idx];
+ pdcch_pdu->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_15_15[cset_idx];
break;
case kHz30:
AssertFatal(cset_idx<14,"Coreset index %d reserved for scs kHz15/kHz30\n", cset_idx);
- pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
- pdcch_params->n_rb = (cset_idx < 8)? 24 : 48;
- pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_15_30[cset_idx];
- pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_15_15[cset_idx];
+ pdcch_pdu->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
+ pdcch_pdu->n_rb = (cset_idx < 8)? 24 : 48;
+ pdcch_pdu->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_15_30[cset_idx];
+ pdcch_pdu->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_15_15[cset_idx];
break;
default:
@@ -186,17 +188,17 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
switch(pdcch_scs) {
case kHz15:
AssertFatal(cset_idx<9,"Coreset index %d reserved for scs kHz30/kHz15\n", cset_idx);
- pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
- pdcch_params->n_rb = (cset_idx < 10)? 48 : 96;
- pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_15_b40Mhz[cset_idx];
- pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_15_b40Mhz[cset_idx];
+ pdcch_pdu->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
+ pdcch_pdu->n_rb = (cset_idx < 10)? 48 : 96;
+ pdcch_pdu->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_15_b40Mhz[cset_idx];
+ pdcch_pdu->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_15_b40Mhz[cset_idx];
break;
case kHz30:
- pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
- pdcch_params->n_rb = (cset_idx < 6)? 24 : 48;
- pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_30_b40Mhz[cset_idx];
- pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_30_b40Mhz[cset_idx];
+ pdcch_pdu->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
+ pdcch_pdu->n_rb = (cset_idx < 6)? 24 : 48;
+ pdcch_pdu->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_30_b40Mhz[cset_idx];
+ pdcch_pdu->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_30_b40Mhz[cset_idx];
break;
default:
@@ -208,18 +210,18 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
switch(pdcch_scs) {
case kHz15:
AssertFatal(cset_idx<9,"Coreset index %d reserved for scs kHz30/kHz15\n", cset_idx);
- pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
- pdcch_params->n_rb = (cset_idx < 3)? 48 : 96;
- pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_15_a40Mhz[cset_idx];
- pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_15_a40Mhz[cset_idx];
+ pdcch_pdu->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
+ pdcch_pdu->n_rb = (cset_idx < 3)? 48 : 96;
+ pdcch_pdu->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_15_a40Mhz[cset_idx];
+ pdcch_pdu->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_15_a40Mhz[cset_idx];
break;
case kHz30:
AssertFatal(cset_idx<10,"Coreset index %d reserved for scs kHz30/kHz30\n", cset_idx);
- pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
- pdcch_params->n_rb = (cset_idx < 4)? 24 : 48;
- pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_30_a40Mhz[cset_idx];
- pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_30_a40Mhz[cset_idx];
+ pdcch_pdu->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
+ pdcch_pdu->n_rb = (cset_idx < 4)? 24 : 48;
+ pdcch_pdu->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_30_a40Mhz[cset_idx];
+ pdcch_pdu->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_30_a40Mhz[cset_idx];
break;
default:
@@ -232,19 +234,19 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
switch(pdcch_scs) {
case kHz60:
AssertFatal(cset_idx<12,"Coreset index %d reserved for scs kHz120/kHz60\n", cset_idx);
- pdcch_params->mux_pattern = (cset_idx < 8)?NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 : NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2;
- pdcch_params->n_rb = (cset_idx < 6)? 48 : (cset_idx < 8)? 96 : (cset_idx < 10)? 48 : 96;
- pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_120_60[cset_idx];
- pdcch_params->rb_offset = (nr_coreset_rb_offset_pdcch_type_0_scs_120_60[cset_idx]>0)?nr_coreset_rb_offset_pdcch_type_0_scs_120_60[cset_idx] :
+ pdcch_pdu->mux_pattern = (cset_idx < 8)?NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 : NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2;
+ pdcch_pdu->n_rb = (cset_idx < 6)? 48 : (cset_idx < 8)? 96 : (cset_idx < 10)? 48 : 96;
+ pdcch_pdu->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_120_60[cset_idx];
+ pdcch_pdu->rb_offset = (nr_coreset_rb_offset_pdcch_type_0_scs_120_60[cset_idx]>0)?nr_coreset_rb_offset_pdcch_type_0_scs_120_60[cset_idx] :
(k_ssb == 0)? -41 : -42;
break;
case kHz120:
AssertFatal(cset_idx<8,"Coreset index %d reserved for scs kHz120/kHz120\n", cset_idx);
- pdcch_params->mux_pattern = (cset_idx < 4)?NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 : NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3;
- pdcch_params->n_rb = (cset_idx < 2)? 24 : (cset_idx < 4)? 48 : (cset_idx < 6)? 24 : 48;
- pdcch_params->n_symb = (cset_idx == 2)? 1 : 2;
- pdcch_params->rb_offset = (nr_coreset_rb_offset_pdcch_type_0_scs_120_120[cset_idx]>0)? nr_coreset_rb_offset_pdcch_type_0_scs_120_120[cset_idx] :
+ pdcch_pdu->mux_pattern = (cset_idx < 4)?NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 : NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3;
+ pdcch_pdu->n_rb = (cset_idx < 2)? 24 : (cset_idx < 4)? 48 : (cset_idx < 6)? 24 : 48;
+ pdcch_pdu->n_symb = (cset_idx == 2)? 1 : 2;
+ pdcch_pdu->rb_offset = (nr_coreset_rb_offset_pdcch_type_0_scs_120_120[cset_idx]>0)? nr_coreset_rb_offset_pdcch_type_0_scs_120_120[cset_idx] :
(k_ssb == 0)? -20 : -21;
break;
@@ -257,18 +259,18 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
switch(pdcch_scs) {
case kHz60:
AssertFatal(cset_idx<4,"Coreset index %d reserved for scs kHz240/kHz60\n", cset_idx);
- pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
- pdcch_params->n_rb = 96;
- pdcch_params->n_symb = (cset_idx < 2)? 1 : 2;
- pdcch_params->rb_offset = (cset_idx&1)? 16 : 0;
+ pdcch_pdu->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
+ pdcch_pdu->n_rb = 96;
+ pdcch_pdu->n_symb = (cset_idx < 2)? 1 : 2;
+ pdcch_pdu->rb_offset = (cset_idx&1)? 16 : 0;
break;
case kHz120:
AssertFatal(cset_idx<8,"Coreset index %d reserved for scs kHz240/kHz120\n", cset_idx);
- pdcch_params->mux_pattern = (cset_idx < 4)? NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 : NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2;
- pdcch_params->n_rb = (cset_idx < 4)? 48 : (cset_idx < 6)? 24 : 48;
- pdcch_params->n_symb = ((cset_idx==2)||(cset_idx==3))? 2 : 1;
- pdcch_params->rb_offset = (nr_coreset_rb_offset_pdcch_type_0_scs_240_120[cset_idx]>0)? nr_coreset_rb_offset_pdcch_type_0_scs_240_120[cset_idx] :
+ pdcch_pdu->mux_pattern = (cset_idx < 4)? NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 : NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2;
+ pdcch_pdu->n_rb = (cset_idx < 4)? 48 : (cset_idx < 6)? 24 : 48;
+ pdcch_pdu->n_symb = ((cset_idx==2)||(cset_idx==3))? 2 : 1;
+ pdcch_pdu->rb_offset = (nr_coreset_rb_offset_pdcch_type_0_scs_240_120[cset_idx]>0)? nr_coreset_rb_offset_pdcch_type_0_scs_240_120[cset_idx] :
(k_ssb == 0)? -41 : -42;
break;
@@ -283,29 +285,29 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
}
/// Search space params
- switch(pdcch_params->mux_pattern) {
+ switch(pdcch_pdu->mux_pattern) {
case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1:
if (freq_range == nr_FR1) {
O = nr_ss_param_O_type_0_mux1_FR1[ss_idx];
- pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR1[ss_idx];
+ pdcch_pdu->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR1[ss_idx];
M = nr_ss_param_M_type_0_mux1_FR1[ss_idx];
M_scale = nr_ss_scale_M_mux1_FR1[ss_idx];
- pdcch_params->first_symbol = (ss_idx < 8)? ( (ssb_idx&1)? pdcch_params->n_symb : 0 ) : nr_ss_first_symb_idx_type_0_mux1_FR1[ss_idx - 8];
+ pdcch_pdu->first_symbol = (ss_idx < 8)? ( (ssb_idx&1)? pdcch_pdu->n_symb : 0 ) : nr_ss_first_symb_idx_type_0_mux1_FR1[ss_idx - 8];
}
else {
AssertFatal(ss_idx<14 ,"Invalid search space index for multiplexing type 1 and FR2 %d\n", ss_idx);
O = nr_ss_param_O_type_0_mux1_FR2[ss_idx];
O_scale = nr_ss_scale_O_mux1_FR2[ss_idx];
- pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR2[ss_idx];
+ pdcch_pdu->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR2[ss_idx];
M = nr_ss_param_M_type_0_mux1_FR2[ss_idx];
M_scale = nr_ss_scale_M_mux1_FR2[ss_idx];
- pdcch_params->first_symbol = (ss_idx < 12)? ( (ss_idx&1)? 7 : 0 ) : 0;
+ pdcch_pdu->first_symbol = (ss_idx < 12)? ( (ss_idx&1)? 7 : 0 ) : 0;
}
- pdcch_params->nb_slots = 2;
- pdcch_params->sfn_mod2 = (CEILIDIV( (((O<>O_scale) + ((ssb_idx*M)>>M_scale)), nb_slots_per_frame ) & 1)? 1 : 0;
- pdcch_params->first_slot = (((O<>O_scale) + ((ssb_idx*M)>>M_scale)) % nb_slots_per_frame;
+ pdcch_pdu->nb_slots = 2;
+ pdcch_pdu->sfn_mod2 = (CEILIDIV( (((O<>O_scale) + ((ssb_idx*M)>>M_scale)), nb_slots_per_frame ) & 1)? 1 : 0;
+ pdcch_pdu->first_slot = (((O<>O_scale) + ((ssb_idx*M)>>M_scale)) % nb_slots_per_frame;
break;
@@ -314,14 +316,14 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
"Invalid scs_common/pdcch_scs combination %d/%d for Mux type 2\n", scs_common, pdcch_scs );
AssertFatal(ss_idx==0, "Search space index %d reserved for scs_common/pdcch_scs combination %d/%d", ss_idx, scs_common, pdcch_scs);
- pdcch_params->nb_slots = 1;
+ pdcch_pdu->nb_slots = 1;
if ((scs_common==kHz120)&&(pdcch_scs==kHz60)) {
- pdcch_params->first_symbol = nr_ss_first_symb_idx_scs_120_60_mux2[ssb_idx&3];
- // Missing in pdcch_params sfn_C and n_C here and in else case
+ pdcch_pdu->first_symbol = nr_ss_first_symb_idx_scs_120_60_mux2[ssb_idx&3];
+ // Missing in pdcch_pdu sfn_C and n_C here and in else case
}
else {
- pdcch_params->first_symbol = ((ssb_idx&7)==4)?12 : ((ssb_idx&7)==4)?13 : nr_ss_first_symb_idx_scs_240_120_set1_mux2[ssb_idx&7]; //???
+ pdcch_pdu->first_symbol = ((ssb_idx&7)==4)?12 : ((ssb_idx&7)==4)?13 : nr_ss_first_symb_idx_scs_240_120_set1_mux2[ssb_idx&7]; //???
}
break;
@@ -331,246 +333,560 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
"Invalid scs_common/pdcch_scs combination %d/%d for Mux type 3\n", scs_common, pdcch_scs );
AssertFatal(ss_idx==0, "Search space index %d reserved for scs_common/pdcch_scs combination %d/%d", ss_idx, scs_common, pdcch_scs);
- pdcch_params->first_symbol = nr_ss_first_symb_idx_scs_120_120_mux3[ssb_idx&3];
+ pdcch_pdu->first_symbol = nr_ss_first_symb_idx_scs_120_120_mux3[ssb_idx&3];
break;
default:
- AssertFatal(1==0, "Invalid SSB and coreset multiplexing pattern %d\n", pdcch_params->mux_pattern);
+ AssertFatal(1==0, "Invalid SSB and coreset multiplexing pattern %d\n", pdcch_pdu->mux_pattern);
}
- pdcch_params->config_type = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
- pdcch_params->cr_mapping_type = NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED;
- pdcch_params->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE;
- pdcch_params->reg_bundle_size = 6;
- pdcch_params->interleaver_size = 2;
+ pdcch_pdu->config_type = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
+ pdcch_pdu->cr_mapping_type = NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED;
+ pdcch_pdu->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE;
+ pdcch_pdu->reg_bundle_size = 6;
+ pdcch_pdu->interleaver_size = 2;
// set initial banwidth part to full bandwidth
- pdcch_params->n_RB_BWP = N_RB;
+ pdcch_pdu->n_RB_BWP = N_RB;
-
-}
-
-void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
- int ss_type,
- int target_aggregation_level,
- int cce_index,
- NR_ServingCellConfigCommon_t *scc,
- NR_BWP_Downlink_t *bwp) {
-
- uint16_t N_RB=NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
-
- /// coreset
-
- //ControlResourceSetId
- pdcch_params->config_type = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
- AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList!=NULL,
- "controlResourceSetToAddModList is null\n");
- AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.count>0,
- "controlResourceSetToAddModList is empty\n");
- NR_ControlResourceSet_t *coreset0 = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[0];
-
- //frequencyDomainResources
- uint8_t count=0, start=0, start_set=0;
- // find coreset descriptor
-
- uint64_t bitmap = (((uint64_t)coreset0->frequencyDomainResources.buf[0])<<37)|
- (((uint64_t)coreset0->frequencyDomainResources.buf[1])<<29)|
- (((uint64_t)coreset0->frequencyDomainResources.buf[2])<<21)|
- (((uint64_t)coreset0->frequencyDomainResources.buf[3])<<13)|
- (((uint64_t)coreset0->frequencyDomainResources.buf[4])<<5)|
- (((uint64_t)coreset0->frequencyDomainResources.buf[5])>>3);
-
- for (int i=0; i<45; i++)
- if ((bitmap>>(44-i))&1) {
- count++;
- if (!start_set) {
- start = i;
- start_set = 1;
- }
- }
- pdcch_params->rb_offset = 6*start;
- pdcch_params->n_rb = 6*count;
-
- //duration
- pdcch_params->n_symb = coreset0->duration;
-
- //cce-REG-MappingType
- pdcch_params->cr_mapping_type = coreset0->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved?
- NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED;
- if (pdcch_params->cr_mapping_type == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
- pdcch_params->reg_bundle_size = (coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize == NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize);
- pdcch_params->interleaver_size = (coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize==NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize);
- AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n");
- pdcch_params->shift_index = coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId;
- }
- else {
- pdcch_params->reg_bundle_size = 0;
- pdcch_params->interleaver_size = 0;
- pdcch_params->shift_index = 0;
- }
-
- //precoderGranularity
- pdcch_params->precoder_granularity = coreset0->precoderGranularity;
-
- //TCI states
- //
- /*
- //TCI present
- if (coreset0->tci_PresentInDCI != NULL) {
- AssertFatal(coreset0->tci_StatesPDCCH_ToAddList != NULL,"tci_StatesPDCCH_ToAddList is null\n");
- AssertFatal(coreset0->tci_StatesPDCCH_ToAddList->list.count>0,"TCI state list is empty\n");
- for (int i=0;itci_StatesPDCCH_ToAddList->list.count;i++) {
-
- }
*/
- //pdcch-DMRS-ScramblingID
- pdcch_params->scrambling_id = coreset0->pdcch_DMRS_ScramblingID;
-
-
-/// SearchSpace
-
- // first symbol
- //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
- int sps = bwp->bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12;
-
- AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n");
- AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0,
- "searchPsacesToAddModList is empty\n");
- NR_SearchSpace_t *ss;
- int found=0;
- int target_ss = NR_SearchSpace__searchSpaceType_PR_common;
- if (ss_type == 1) {
- target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
- pdcch_params->search_space_type = NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC;
- } else pdcch_params->search_space_type = NFAPI_NR_SEARCH_SPACE_TYPE_COMMON;
-
- for (int i=0;ibwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count;i++) {
- ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[i];
- AssertFatal(ss->controlResourceSetId != NULL,"ss->controlResourceSetId is null\n");
- AssertFatal(ss->searchSpaceType != NULL,"ss->searchSpaceType is null\n");
- if (*ss->controlResourceSetId == coreset0->controlResourceSetId &&
- ss->searchSpaceType->present == target_ss) {
- found=1;
- break;
- }
- }
- AssertFatal(found==1,"Couldn't find a searchspace corresponding to coreset0\n");
- AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n");
- AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n");
-
- // for SPS=14 8 MSBs in positions 13 downto 6,
- uint16_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) |
- (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
-
- for (int i=0; i>(sps-1-i))&1) {
- pdcch_params->first_symbol=i;
- break;
- }
-
- // aggregation, find closest to target
- AssertFatal(target_aggregation_level == 1 || target_aggregation_level == 2 || target_aggregation_level == 4 || target_aggregation_level == 8 || target_aggregation_level == 16,"illegal target aggregation level %d\n",target_aggregation_level);
- AssertFatal(ss->nrofCandidates!=NULL,"ss->nrofCandidates is null\n");
- switch (target_aggregation_level) {
- case 1:
- if (ss->nrofCandidates->aggregationLevel1 > 0) pdcch_params->aggregation_level = 1;
- else if (ss->nrofCandidates->aggregationLevel2 > 0) pdcch_params->aggregation_level = 2;
- else if (ss->nrofCandidates->aggregationLevel4 > 0) pdcch_params->aggregation_level = 4;
- else if (ss->nrofCandidates->aggregationLevel8 > 0) pdcch_params->aggregation_level = 8;
- else if (ss->nrofCandidates->aggregationLevel16 > 0) pdcch_params->aggregation_level = 16;
- else AssertFatal(1==0,"Couldn't find an aggregation level, shouldn't happen\n");
- break;
- case 2:
- if (ss->nrofCandidates->aggregationLevel2 > 0) pdcch_params->aggregation_level = 2;
- else if (ss->nrofCandidates->aggregationLevel4 > 0) pdcch_params->aggregation_level = 4;
- else if (ss->nrofCandidates->aggregationLevel1 > 0) pdcch_params->aggregation_level = 1;
- else if (ss->nrofCandidates->aggregationLevel8 > 0) pdcch_params->aggregation_level = 8;
- else if (ss->nrofCandidates->aggregationLevel16 > 0) pdcch_params->aggregation_level = 16;
- else AssertFatal(1==0,"Couldn't find an aggregation level, shouldn't happen\n");
- break;
- case 4:
- if (ss->nrofCandidates->aggregationLevel4 > 0) pdcch_params->aggregation_level = 4;
- else if (ss->nrofCandidates->aggregationLevel8 > 0) pdcch_params->aggregation_level = 8;
- else if (ss->nrofCandidates->aggregationLevel2 > 0) pdcch_params->aggregation_level = 2;
- else if (ss->nrofCandidates->aggregationLevel16 > 0) pdcch_params->aggregation_level = 16;
- else if (ss->nrofCandidates->aggregationLevel1 > 0) pdcch_params->aggregation_level = 1;
- else AssertFatal(1==0,"Couldn't find an aggregation level, shouldn't happen\n");
- break;
- case 8:
- if (ss->nrofCandidates->aggregationLevel8 > 0) pdcch_params->aggregation_level = 8;
- else if (ss->nrofCandidates->aggregationLevel16 > 0) pdcch_params->aggregation_level = 16;
- else if (ss->nrofCandidates->aggregationLevel4 > 0) pdcch_params->aggregation_level = 4;
- else if (ss->nrofCandidates->aggregationLevel2 > 0) pdcch_params->aggregation_level = 2;
- else if (ss->nrofCandidates->aggregationLevel1 > 0) pdcch_params->aggregation_level = 1;
- else AssertFatal(1==0,"Couldn't find an aggregation level, shouldn't happen\n");
- break;
- case 16:
- if (ss->nrofCandidates->aggregationLevel16 > 0) pdcch_params->aggregation_level = 16;
- else if (ss->nrofCandidates->aggregationLevel8 > 0) pdcch_params->aggregation_level = 8;
- else if (ss->nrofCandidates->aggregationLevel4 > 0) pdcch_params->aggregation_level = 4;
- else if (ss->nrofCandidates->aggregationLevel2 > 0) pdcch_params->aggregation_level = 2;
- else if (ss->nrofCandidates->aggregationLevel1 > 0) pdcch_params->aggregation_level = 1;
- else AssertFatal(1==0,"Couldn't find an aggregation level, shouldn't happen\n");
- break;
- }
-
-
- pdcch_params->n_RB_BWP = N_RB;
- pdcch_params->cce_index = cce_index;
}
-int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
- nfapi_nr_coreset_t coreset,
- uint16_t frame,
- uint16_t slot,
- nfapi_nr_config_request_t cfg) {
+void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
+ int ss_type,
+ NR_ServingCellConfigCommon_t *scc,
+ NR_BWP_Downlink_t *bwp) {
+
+ uint16_t N_RB=NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
- AssertFatal(search_space.coreset_id==coreset.coreset_id, "Invalid association of coreset(%d) and search space(%d)\n",
- search_space.search_space_id, coreset.coreset_id);
+ if (bwp) { // This is not the InitialBWP
+ /// coreset
+
+ //ControlResourceSetId
+ // pdcch_pdu->config_type = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
+ AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList!=NULL,
+ "controlResourceSetToAddModList is null\n");
+ AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.count>0,
+ "controlResourceSetToAddModList is empty\n");
+ NR_ControlResourceSet_t *coreset0 = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[0];
+
+
+ pdcch_pdu->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
+ pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
+ pdcch_pdu->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
+ pdcch_pdu->CyclicPrefix = bwp->bwp_Common->genericParameters.cyclicPrefix;
+
+ pdcch_pdu->DurationSymbols = coreset0->duration;
+
+ //frequencyDomainResources
+ /* uint8_t count=0, start=0, start_set=0;
+ // find coreset descriptor
+
+ uint64_t bitmap = (((uint64_t)coreset0->frequencyDomainResources.buf[0])<<37)|
+ (((uint64_t)coreset0->frequencyDomainResources.buf[1])<<29)|
+ (((uint64_t)coreset0->frequencyDomainResources.buf[2])<<21)|
+ (((uint64_t)coreset0->frequencyDomainResources.buf[3])<<13)|
+ (((uint64_t)coreset0->frequencyDomainResources.buf[4])<<5)|
+ (((uint64_t)coreset0->frequencyDomainResources.buf[5])>>3);
+
+ for (int i=0; i<45; i++)
+ if ((bitmap>>(44-i))&1) {
+ count++;
+ if (!start_set) {
+ start = i;
+ start_set = 1;
+ }
+ }
+ pdcch_pdu->rb_offset = 6*start;
+ pdcch_pdu->n_rb = 6*count;
+ */
+ for (int i=0;i<6;i++)
+ pdcch_pdu->FreqDomainResource[i] = coreset0->frequencyDomainResources.buf[i];
+ //duration
+
+
+ //cce-REG-MappingType
+ pdcch_pdu->CceRegMappingType = coreset0->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved?
+ NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED;
+ if (pdcch_pdu->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
+ pdcch_pdu->RegBundleSize = (coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize == NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize);
+ pdcch_pdu->InterleaverSize = (coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize==NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize);
+ AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n");
+ pdcch_pdu->ShiftIndex = coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId;
+ }
+ else {
+ pdcch_pdu->RegBundleSize = 0;
+ pdcch_pdu->InterleaverSize = 0;
+ pdcch_pdu->ShiftIndex = 0;
+ }
- uint8_t is_dci_opportunity=0;
- uint16_t Ks=search_space.slot_monitoring_periodicity;
- uint16_t Os=search_space.slot_monitoring_offset;
- uint8_t Ts=search_space.duration;
+ pdcch_pdu->CoreSetType = 1;
+
+ //precoderGranularity
+ pdcch_pdu->precoderGranularity = coreset0->precoderGranularity;
+
+ //TCI states
+ //
+ /*
+ //TCI present
+ if (coreset0->tci_PresentInDCI != NULL) {
+ AssertFatal(coreset0->tci_StatesPDCCH_ToAddList != NULL,"tci_StatesPDCCH_ToAddList is null\n");
+ AssertFatal(coreset0->tci_StatesPDCCH_ToAddList->list.count>0,"TCI state list is empty\n");
+ for (int i=0;itci_StatesPDCCH_ToAddList->list.count;i++) {
+
+ }
+ */
+
+ for (int i=0;inumDlDci;i++) {
+ //pdcch-DMRS-ScramblingID
+ pdcch_pdu->ScramblingId[i] = coreset0->pdcch_DMRS_ScramblingID;
+
+
+ /// SearchSpace
+
+ // first symbol
+ //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
+ int sps = bwp->bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12;
+
+ AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n");
+ AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0,
+ "searchPsacesToAddModList is empty\n");
+ NR_SearchSpace_t *ss;
+ int found=0;
+ int target_ss = NR_SearchSpace__searchSpaceType_PR_common;
+ if (ss_type == 1) {
+ target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
+ }
+
+ for (int i=0;ibwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count;i++) {
+ ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[i];
+ AssertFatal(ss->controlResourceSetId != NULL,"ss->controlResourceSetId is null\n");
+ AssertFatal(ss->searchSpaceType != NULL,"ss->searchSpaceType is null\n");
+ if (*ss->controlResourceSetId == coreset0->controlResourceSetId &&
+ ss->searchSpaceType->present == target_ss) {
+ found=1;
+ break;
+ }
+ }
+ AssertFatal(found==1,"Couldn't find a searchspace corresponding to coreset0\n");
+ AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n");
+ AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n");
+
+ // for SPS=14 8 MSBs in positions 13 downto 6,
+ uint16_t monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) |
+ (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
+
+ for (int i=0; i>(sps-1-i))&1) {
+ pdcch_pdu->StartSymbolIndex=i;
+ break;
+ }
+ }
+ }
+ else { // this is for InitialBWP
+ AssertFatal(1==0,"Fill in InitialBWP PDCCH configuration\n");
+ }
+}
- if (((frame*get_spf(&cfg) + slot - Os)%Ks)BWPSize;
+ uint8_t fsize=0, pos=0, cand_idx=0;
+
+ for (int d=0;dnumDlDci;d++) {
+
+ uint64_t *dci_pdu = (uint64_t *)pdcch_pdu_rel15->Payload[d];
+ AssertFatal(pdcch_pdu_rel15->PayloadSizeBits[d]<=64, "DCI sizes above 64 bits not yet supported");
+ /*
+ n_shift = (dci_alloc->pdcch_pdu.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1)?
+ cfg->sch_config.physical_cell_id.value : dci_alloc->pdcch_pdu.shift_index;
+ nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
+ */
+ int dci_size = pdcch_pdu_rel15->PayloadSizeBits[d];
+
+ /// Payload generation
+ switch(dci_formats[d]) {
+ case NR_DL_DCI_FORMAT_1_0:
+ switch(rnti_types[d]) {
+ case NR_RNTI_RA:
+ // Freq domain assignment
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ pos=fsize;
+ *dci_pdu |= ((dci_pdu_rel15->frequency_domain_assignment&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment,fsize,N_RB,dci_size-pos,*dci_pdu);
+#endif
+ // Time domain assignment
+ pos+=4;
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment&0xf) << (dci_size-pos));
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"time-domain assignment %d (3 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment,dci_size-pos,*dci_pdu);
+#endif
+ // VRB to PRB mapping
+
+ pos++;
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping&0x1)<<(dci_size-pos);
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping,dci_size-pos,*dci_pdu);
+#endif
+ // MCS
+ pos+=5;
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu);
+#endif
+ // TB scaling
+ pos+=2;
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling&0x3)<<(dci_size-pos);
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu);
+#endif
+ break;
+
+ case NR_RNTI_C:
+
+ // indicating a DL DCI format 1bit
+ pos++;
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator&1)<<(dci_size-pos);
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
+#endif
+
+ // Freq domain assignment (275rb >> fsize = 16)
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ pos+=fsize;
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment,fsize,dci_size-pos,*dci_pdu);
+#endif
+
+ uint16_t is_ra = 1;
+ for (int i=0; ifrequency_domain_assignment>>i)&1)) {
+ is_ra = 0;
+ break;
+ }
+ if (is_ra) //fsize are all 1 38.212 p86
+ {
+ // ra_preamble_index 6 bits
+ pos+=6;
+ *dci_pdu |= ((dci_pdu_rel15->ra_preamble_index&0x3f)<<(dci_size-pos));
+
+ // UL/SUL indicator 1 bit
+ pos++;
+ *dci_pdu |= (dci_pdu_rel15->ul_sul_indicator&1)<<(dci_size-pos);
+
+ // SS/PBCH index 6 bits
+ pos+=6;
+ *dci_pdu |= ((dci_pdu_rel15->ss_pbch_index&0x3f)<<(dci_size-pos));
+
+ // prach_mask_index 4 bits
+ pos+=4;
+ *dci_pdu |= ((dci_pdu_rel15->prach_mask_index&0xf)<<(dci_size-pos));
+
+ } //end if
+
+ else {
+
+ // Time domain assignment 4bit
+
+ pos+=4;
+ *dci_pdu |= ((dci_pdu_rel15->time_domain_assignment&0xf) << (dci_size-pos));
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment,4,dci_size-pos,*dci_pdu);
+#endif
+
+ // VRB to PRB mapping 1bit
+ pos++;
+ *dci_pdu |= (dci_pdu_rel15->vrb_to_prb_mapping&1)<<(dci_size-pos);
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping,1,dci_size-pos,*dci_pdu);
+#endif
+
+ // MCS 5bit //bit over 32, so dci_pdu ++
+ pos+=5;
+ *dci_pdu |= (dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu);
+#endif
+
+ // New data indicator 1bit
+ pos++;
+ *dci_pdu |= (dci_pdu_rel15->ndi&1)<<(dci_size-pos);
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
+#endif
+
+ // Redundancy version 2bit
+ pos+=2;
+ *dci_pdu |= (dci_pdu_rel15->rv&0x3)<<(dci_size-pos);
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu);
+#endif
+
+ // HARQ process number 4bit
+ pos+=4;
+ *dci_pdu |= ((dci_pdu_rel15->harq_pid&0xf)<<(dci_size-pos));
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu);
+#endif
+
+ // Downlink assignment index 2bit
+ pos+=2;
+ *dci_pdu |= ((dci_pdu_rel15->dai&3)<<(dci_size-pos));
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai,2,dci_size-pos,*dci_pdu);
+#endif
+
+ // TPC command for scheduled PUCCH 2bit
+ pos+=2;
+ *dci_pdu |= ((dci_pdu_rel15->tpc&3)<<(dci_size-pos));
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu);
+#endif
+
+ // PUCCH resource indicator 3bit
+ pos+=3;
+ *dci_pdu |= ((dci_pdu_rel15->pucch_resource_indicator&0x7)<<(dci_size-pos));
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu);
+#endif
+
+ // PDSCH-to-HARQ_feedback timing indicator 3bit
+ pos+=3;
+ *dci_pdu |= ((dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_size-pos));
+#ifdef DEBUG_FILL_DCI
+ LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator,3,dci_size-pos,*dci_pdu);
+#endif
+
+ } //end else
+ break;
+
+ case NR_RNTI_P:
+
+ // Short Messages Indicator – 2 bits
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_size-pos++);
+ // Short Messages – 8 bits
+ for (int i=0; i<8; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages>>(7-i))&1)<<(dci_size-pos++);
+ // Freq domain assignment 0-16 bit
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++);
+ // Time domain assignment 4 bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++);
+ // VRB to PRB mapping 1 bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping&1)<<(dci_size-pos++);
+ // MCS 5 bit
+ for (int i=0; i<5; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
+
+ // TB scaling 2 bit
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_size-pos++);
+
+
+ break;
+
+ case NR_RNTI_SI:
+ // Freq domain assignment 0-16 bit
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++);
+ // Time domain assignment 4 bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++);
+ // VRB to PRB mapping 1 bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping&1)<<(dci_size-pos++);
+ // MCS 5bit //bit over 32, so dci_pdu ++
+ for (int i=0; i<5; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
+ // Redundancy version 2bit
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++);
+
+ break;
+
+ case NR_RNTI_TC:
+ // indicating a DL DCI format 1bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator&1)<<(dci_size-pos++);
+ // Freq domain assignment 0-16 bit
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++);
+ // Time domain assignment 4 bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++);
+ // VRB to PRB mapping 1 bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping&1)<<(dci_size-pos++);
+ // MCS 5bit //bit over 32, so dci_pdu ++
+ for (int i=0; i<5; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
+ // New data indicator 1bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi&1)<<(dci_size-pos++);
+ // Redundancy version 2bit
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++);
+ // HARQ process number 4bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid>>(3-i))&1)<<(dci_size-pos++);
+
+ // Downlink assignment index – 2 bits
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->dai>>(1-i))&1)<<(dci_size-pos++);
+
+ // TPC command for scheduled PUCCH – 2 bits
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->tpc>>(1-i))&1)<<(dci_size-pos++);
+
+
+ // LOG_D(MAC, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n",
+ // dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
+
+
+ // PDSCH-to-HARQ_feedback timing indicator – 3 bits
+ for (int i=0; i<3; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<(dci_size-pos++);
+
+ break;
+ }
+ break;
+
+ case NR_UL_DCI_FORMAT_0_0:
+ switch(rnti_types[d])
+ {
+ case NR_RNTI_C:
+ // indicating a DL DCI format 1bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator&1)<<(dci_size-pos++);
+ // Freq domain assignment max 16 bit
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++);
+ // Time domain assignment 4bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++);
+ // Frequency hopping flag – 1 bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag&1)<<(dci_size-pos++);
+ // MCS 5 bit
+ for (int i=0; i<5; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
+ // New data indicator 1bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi&1)<<(dci_size-pos++);
+ // Redundancy version 2bit
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++);
+ // HARQ process number 4bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid>>(3-i))&1)<<(dci_size-pos++);
+
+ // TPC command for scheduled PUSCH – 2 bits
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->tpc>>(1-i))&1)<<(dci_size-pos++);
+
+ // Padding bits
+ for(int a = pos;a<32;a++)
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->padding&1)<<(dci_size-pos++);
+
+ // UL/SUL indicator – 1 bit
+ /* commented for now (RK): need to get this from BWP descriptor
+ if (cfg->pucch_config.pucch_GroupHopping.value)
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->ul_sul_indicator&1)<<(dci_size-pos++);
+ */
+ break;
+
+ case NFAPI_NR_RNTI_TC:
+
+ // indicating a DL DCI format 1bit
+ *dci_pdu |= (dci_pdu_rel15->format_indicator&1)<<(dci_size-pos++);
+ // Freq domain assignment max 16 bit
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++);
+ // Time domain assignment 4bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++);
+ // Frequency hopping flag – 1 bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag&1)<<(dci_size-pos++);
+ // MCS 5 bit
+ for (int i=0; i<5; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
+ // New data indicator 1bit
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi&1)<<(dci_size-pos++);
+ // Redundancy version 2bit
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++);
+ // HARQ process number 4bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid>>(3-i))&1)<<(dci_size-pos++);
+
+ // TPC command for scheduled PUSCH – 2 bits
+ for (int i=0; i<2; i++)
+ *dci_pdu |= (((uint64_t)dci_pdu_rel15->tpc>>(1-i))&1)<<(dci_size-pos++);
+
+ // Padding bits
+ for(int a = pos;a<32;a++)
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->padding&1)<<(dci_size-pos++);
+
+ // UL/SUL indicator – 1 bit
+ /*
+ commented for now (RK): need to get this information from BWP descriptor
+ if (cfg->pucch_config.pucch_GroupHopping.value)
+ *dci_pdu |= ((uint64_t)dci_pdu_rel15->ul_sul_indicator&1)<<(dci_size-pos++);
+ */
+ break;
+
+ }
+ break;
+ }
+ }
+}
+
+
+ /*
+ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
+ nfapi_nr_coreset_t coreset,
+ uint16_t frame,
+ uint16_t slot,
+ nfapi_nr_config_request_scf_t cfg) {
+
+ AssertFatal(search_space.coreset_id==coreset.coreset_id, "Invalid association of coreset(%d) and search space(%d)\n",
+ search_space.search_space_id, coreset.coreset_id);
+
+ uint8_t is_dci_opportunity=0;
+ uint16_t Ks=search_space.slot_monitoring_periodicity;
+ uint16_t Os=search_space.slot_monitoring_offset;
+ uint8_t Ts=search_space.duration;
+
+ if (((frame*get_spf(&cfg) + slot - Os)%Ks)rf_config.dl_subcarrierspacing.value);
-}
-
-
-int get_ulscs(nfapi_nr_config_request_t *cfg) {
-
- return(cfg->rf_config.ul_subcarrierspacing.value);
-}
-
-int get_spf(nfapi_nr_config_request_t *cfg) {
-
- int mu = cfg->rf_config.dl_subcarrierspacing.value;
+ int mu = cfg->ssb_config.scs_common.value;
AssertFatal(mu>=0&&mu<4,"Illegal scs %d\n",mu);
return(10 * (1<subframe_config.dl_cyclic_prefix_type.value==NFAPI_CP_EXTENDED)?12:14);
-
-}
-
-
int extract_startSymbol(int startSymbolAndLength) {
int tmp = startSymbolAndLength/14;
@@ -694,7 +1010,7 @@ int add_new_nr_ue(module_id_t mod_idP,
return -1;
}
-void fill_nfapi_coresets_and_searchspaces(NR_CellGroupConfig_t *cg,
+/*void fill_nfapi_coresets_and_searchspaces(NR_CellGroupConfig_t *cg,
nfapi_nr_coreset_t *coreset,
nfapi_nr_search_space_t *search_space) {
@@ -996,7 +1312,7 @@ void fill_nfapi_coresets_and_searchspaces(NR_CellGroupConfig_t *cg,
}
}
}
-
+*/
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols) {
int mapping_Type = 0; // TypeA
@@ -1078,3 +1394,6 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
}
}
}
+
+
+
diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
index eecc844241..84c8e30c23 100644
--- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
@@ -55,7 +55,9 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
frame_t frameP,
sub_frame_t subframeP);
-void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP);
+void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
+ frame_t frame_txP, sub_frame_t slot_txP,
+ frame_t frame_rxP, sub_frame_t slot_rxP);
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP);
@@ -64,20 +66,24 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
sub_frame_t subframeP);
int configure_fapi_dl_Tx(int Mod_id,
- nfapi_nr_dl_config_request_body_t *dl_req,
- nfapi_tx_request_pdu_t *TX_req,
- nfapi_nr_config_request_t *cfg,
- nfapi_nr_coreset_t* coreset,
- nfapi_nr_search_space_t* search_space,
- int16_t pdu_index);
+ nfapi_nr_dl_tti_request_body_t *dl_req,
+ nfapi_nr_pdu_t *TX_req);
+void config_uldci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
+ dci_pdu_rel15_t *dci_pdu_rel15,
+ int *dci_formats,
+ int *rnti_types);
void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config);
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_config);
-void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
+void nr_schedule_uss_ulsch_phytest(int Mod_idP,
+ frame_t frameP,
+ sub_frame_t slotP);
+
+void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
@@ -88,39 +94,35 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
uint8_t n_ssb,
uint16_t nb_slots_per_frame,
uint16_t N_RB);
-
+/*
int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
nfapi_nr_coreset_t coreset,
uint16_t frame,
uint16_t slot,
- nfapi_nr_config_request_t cfg);
+ nfapi_nr_config_request_scf_t cfg);
+*/
+void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
+ int ss_type,
+ NR_ServingCellConfigCommon_t *scc,
+ NR_BWP_Downlink_t *bwp);
+void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
+ dci_pdu_rel15_t *dci_pdu_rel15,
+ int *dci_formats,
+ int *rnti_types
+ );
-void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
- int ss_type,
- int target_aggregation_level,
- int cce_index,
- NR_ServingCellConfigCommon_t *scc,
- NR_BWP_Downlink_t *bwp);
+int get_spf(nfapi_nr_config_request_scf_t *cfg);
-int get_dlscs(nfapi_nr_config_request_t *cfg);
+int to_absslot(nfapi_nr_config_request_scf_t *cfg,int frame,int slot);
-int get_ulscs(nfapi_nr_config_request_t *cfg);
-
-int get_spf(nfapi_nr_config_request_t *cfg);
-
-int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot);
-
-int get_symbolsperslot(nfapi_nr_config_request_t *cfg);
-
-void get_band(uint32_t downlink_frequency, uint16_t *current_band, int32_t *current_offset, lte_frame_type_t *current_type);
+void get_band(uint64_t downlink_frequency, uint16_t *current_band, int32_t *current_offset, lte_frame_type_t *current_type);
uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw);
-void nr_get_tbs_dl(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
- nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
+void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
int x_overhead);
/** \brief Computes Q based on I_MCS PDSCH and table_idx for downlink. Implements MCS Tables from 38.214. */
uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx);
@@ -149,4 +151,8 @@ int get_num_dmrs(uint16_t dmrs_mask );
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols);
+uint16_t nr_dci_size(nr_dci_format_t format,
+ nr_rnti_type_t rnti_type,
+ uint16_t N_RB);
+
#endif /*__LAYER2_NR_MAC_PROTO_H__*/
diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c
index 661d17d27a..1c2cf606a9 100644
--- a/openair2/LAYER2/NR_MAC_gNB/main.c
+++ b/openair2/LAYER2/NR_MAC_gNB/main.c
@@ -74,23 +74,6 @@ void mac_top_init_gNB(void)
bzero(RC.nrmac[i], sizeof(gNB_MAC_INST));
RC.nrmac[i]->Mod_id = i;
-
-
- for (j = 0; j < MAX_NUM_CCs; j++) {
- RC.nrmac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.nrmac[i]->dl_config_pdu_list[j];
- RC.nrmac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.nrmac[i]->ul_config_pdu_list[j];
-
- for (int k = 0; k < 10; k++)
- RC.nrmac[i]->UL_req_tmp[j][k].ul_config_request_body.ul_config_pdu_list =RC.nrmac[i]->ul_config_pdu_list_tmp[j][k];
-
- RC.nrmac[i]->HI_DCI0_req[j].hi_dci0_request_body.hi_dci0_pdu_list = RC.nrmac[i]->hi_dci0_pdu_list[j];
- RC.nrmac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.nrmac[i]->tx_request_pdu[j];
- RC.nrmac[i]->ul_handle = 0;
-
-
- }
-
-
}//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
AssertFatal(rlc_module_init() == 0,"Could not initialize RLC layer\n");
diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_common.c b/openair2/LAYER2/NR_MAC_gNB/nr_mac_common.c
index a32c289119..fc20b668f6 100644
--- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_common.c
+++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_common.c
@@ -69,7 +69,7 @@ nr_bandentry_t nr_bandtable[] = {
#define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t))
-void get_band(uint32_t downlink_frequency,
+void get_band(uint64_t downlink_frequency,
uint16_t *current_band,
int32_t *current_offset,
lte_frame_type_t *current_type)
@@ -91,26 +91,24 @@ void get_band(uint32_t downlink_frequency,
if ( nr_bandtable[ind].dl_min <= dl_freq_khz && nr_bandtable[ind].dl_max >= dl_freq_khz ) {
center_frequency_khz = (nr_bandtable[ind].dl_max + nr_bandtable[ind].dl_min)/2;
-
if (abs(dl_freq_khz - center_frequency_khz) < center_freq_diff_khz){
-
*current_band = nr_bandtable[ind].band;
- *current_offset = (nr_bandtable[ind].ul_min - nr_bandtable[ind].dl_min)*1000;
+ *current_offset = (nr_bandtable[ind].ul_min - nr_bandtable[ind].dl_min)*1000;
center_freq_diff_khz = abs(dl_freq_khz - center_frequency_khz);
- if (*current_offset == 0)
- *current_type = TDD;
- else
- *current_type = FDD;
+ if (*current_offset == 0)
+ *current_type = TDD;
+ else
+ *current_type = FDD;
}
}
}
- LOG_I( PHY, "DL frequency %"PRIu32": band %d, frame_type %d, UL frequency %"PRIu32"\n",
+ LOG_I( PHY, "DL frequency %"PRIu64": band %d, frame_type %d, UL frequency %"PRIu64"\n",
downlink_frequency, *current_band, *current_type, downlink_frequency+*current_offset);
AssertFatal(*current_band != 0,
- "Can't find EUTRA band for frequency %u\n", downlink_frequency);
+ "Can't find EUTRA band for frequency %lu\n", downlink_frequency);
}
uint32_t to_nrarfcn(int nr_bandP,
@@ -182,20 +180,16 @@ int32_t get_nr_uldl_offset(int nr_bandP)
}
-void nr_get_tbs_dl(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
- nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
+void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
int x_overhead) {
LOG_D(MAC, "TBS calculation\n");
- nfapi_nr_dl_config_pdcch_parameters_rel15_t params_rel15 = dci_pdu.pdcch_params_rel15;
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_rel15 = &dlsch_pdu->dlsch_pdu_rel15;
- uint8_t rnti_type = params_rel15.rnti_type;
- uint16_t N_PRB_oh = ((rnti_type==NFAPI_NR_RNTI_SI)||(rnti_type==NFAPI_NR_RNTI_RA)||(rnti_type==NFAPI_NR_RNTI_P))? 0 : \
- (x_overhead);
- uint8_t N_PRB_DMRS = (dlsch_rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1)?6:4; //This only works for antenna port 1000
- uint8_t N_sh_symb = dlsch_rel15->NrOfSymbols;
- uint8_t Imcs = dlsch_rel15->mcsIndex[0];
+ nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_rel15 = &pdsch_pdu->pdsch_pdu_rel15;
+ uint16_t N_PRB_oh = x_overhead;
+ uint8_t N_PRB_DMRS = (pdsch_rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1)?6:4; //This only works for antenna port 1000
+ uint8_t N_sh_symb = pdsch_rel15->NrOfSymbols;
+ uint8_t Imcs = pdsch_rel15->mcsIndex[0];
uint16_t N_RE_prime = NR_NB_SC_PER_RB*N_sh_symb - N_PRB_DMRS - N_PRB_oh;
LOG_D(MAC, "N_RE_prime %d for %d symbols %d DMRS per PRB and %d overhead\n", N_RE_prime, N_sh_symb, N_PRB_DMRS, N_PRB_oh);
@@ -213,20 +207,20 @@ void nr_get_tbs_dl(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
TBS = nr_compute_tbs(Qm,
R,
- dlsch_rel15->rbSize,
+ pdsch_rel15->rbSize,
N_sh_symb,
N_PRB_DMRS,
N_PRB_oh,
- dlsch_rel15->nrOfLayers);
+ pdsch_rel15->nrOfLayers);
- dlsch_rel15->targetCodeRate[0] = R;
- dlsch_rel15->qamModOrder[0] = Qm;
- dlsch_rel15->TBSize[0] = TBS;
- // dlsch_rel15->nb_mod_symbols = N_RE_prime*dlsch_rel15->n_prb*dlsch_rel15->nb_codewords;
- dlsch_rel15->mcsTable[0] = table_idx;
+ pdsch_rel15->targetCodeRate[0] = R;
+ pdsch_rel15->qamModOrder[0] = Qm;
+ pdsch_rel15->TBSize[0] = TBS;
+ // pdsch_rel15->nb_mod_symbols = N_RE_prime*pdsch_rel15->n_prb*pdsch_rel15->nb_codewords;
+ pdsch_rel15->mcsTable[0] = table_idx;
LOG_D(MAC, "TBS %d : N_PRB_DMRS %d N_sh_symb %d N_PRB_oh %d R %d Qm %d table %d nb_symbols %d\n",
- TBS, N_PRB_DMRS, N_sh_symb, N_PRB_oh, R, Qm, table_idx,N_RE_prime*dlsch_rel15->rbSize*dlsch_rel15->NrOfCodewords );
+ TBS, N_PRB_DMRS, N_sh_symb, N_PRB_oh, R, Qm, table_idx,N_RE_prime*pdsch_rel15->rbSize*pdsch_rel15->NrOfCodewords );
}
//Table 5.1.3.1-1 of 38.214
@@ -366,9 +360,98 @@ static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8
int get_num_dmrs(uint16_t dmrs_mask ) {
- int num_dmrs;
+ int num_dmrs=0;
for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1);
return(num_dmrs);
}
+uint16_t nr_dci_size(nr_dci_format_t format,
+ nr_rnti_type_t rnti_type,
+ uint16_t N_RB) {
+
+ uint16_t size = 0;
+
+ switch(format) {
+ /*Only sizes for 0_0 and 1_0 are correct at the moment*/
+ case NR_UL_DCI_FORMAT_0_0:
+ /// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
+ size += 20;
+ size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
+ size += nr_dci_size(NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB) - size; // Padding to match 1_0 size
+ // UL/SUL indicator assumed to be 0
+ break;
+
+ case NR_UL_DCI_FORMAT_0_1:
+ /// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2, SRS request 2 --17
+ size += 17;
+ // Carrier indicator
+ // UL/SUL indicator
+ // BWP Indicator
+ // Freq domain assignment
+ // Time domain assignment
+ // VRB to PRB mapping
+ // Frequency Hopping flag
+ // 1st DAI
+ // 2nd DAI
+ // SRS resource indicator
+ // Precoding info and number of layers
+ // Antenna ports
+ // CSI request
+ // CBGTI
+ // PTRS - DMRS association
+ // beta offset indicator
+ // DMRS sequence init
+ break;
+
+ case NR_DL_DCI_FORMAT_1_0:
+ /// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 Time Domain assgnmt 4 -- 28
+ size += 28;
+ size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment
+ break;
+
+ case NR_DL_DCI_FORMAT_1_1:
+ // Carrier indicator
+ size += 1; // Format identifier
+ // BWP Indicator
+ // Freq domain assignment
+ // Time domain assignment
+ // VRB to PRB mapping
+ // PRB bundling size indicator
+ // Rate matching indicator
+ // ZP CSI-RS trigger
+ /// TB1- MCS 5, NDI 1, RV 2
+ size += 8;
+ // TB2
+ size += 4 ; // HARQ PID
+ // DAI
+ size += 2; // TPC PUCCH
+ size += 3; // PUCCH resource indicator
+ size += 3; // PDSCH to HARQ timing indicator
+ // Antenna ports
+ // Tx Config Indication
+ size += 2; // SRS request
+ // CBGTI
+ // CBGFI
+ size += 1; // DMRS sequence init
+ break;
+
+ case NR_DL_DCI_FORMAT_2_0:
+ break;
+
+ case NR_DL_DCI_FORMAT_2_1:
+ break;
+
+ case NR_DL_DCI_FORMAT_2_2:
+ break;
+
+ case NR_DL_DCI_FORMAT_2_3:
+ break;
+
+ default:
+ AssertFatal(1==0, "Invalid NR DCI format %d\n", format);
+ }
+
+ return size;
+}
+
diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
index 5ca35bd382..10a98db7c0 100644
--- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
@@ -47,7 +47,7 @@
#include "NR_ServingCellConfigCommon.h"
#include "NR_MeasConfig.h"
-#include "nfapi_nr_interface.h"
+#include "nfapi_nr_interface_scf.h"
#include "NR_PHY_INTERFACE/NR_IF_Module.h"
#include "COMMON/platform_constants.h"
@@ -66,7 +66,7 @@ typedef struct {
int p_gNB;
int Ncp;
int nr_band;
- uint32_t dl_CarrierFreq;
+ uint64_t dl_CarrierFreq;
NR_BCCH_BCH_Message_t *mib;
NR_ServingCellConfigCommon_t *ServingCellConfigCommon;
NR_TDD_UL_DL_ConfigCommon_t *tdd_Config;
@@ -116,12 +116,6 @@ typedef struct {
boolean_t active[MAX_MOBILES_PER_GNB];
rnti_t rnti[MAX_MOBILES_PER_GNB];
NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB];
- /// NFAPI coreset structure
- nfapi_nr_coreset_t coreset[MAX_MOBILES_PER_GNB][NFAPI_NR_MAX_NB_CORESETS];
- /// NFAPI search space structure
- nfapi_nr_search_space_t search_space[MAX_MOBILES_PER_GNB][NFAPI_NR_MAX_NB_SEARCH_SPACES];
-
-
} NR_UE_list_t;
/*! \brief top level eNB MAC structure */
@@ -144,27 +138,15 @@ typedef struct gNB_MAC_INST_s {
uint16_t pdu_index[NFAPI_CC_MAX];
/// NFAPI Config Request Structure
- nfapi_nr_config_request_t config[NFAPI_CC_MAX];
+ nfapi_nr_config_request_scf_t config[NFAPI_CC_MAX];
/// NFAPI DL Config Request Structure
- nfapi_nr_dl_config_request_t DL_req[NFAPI_CC_MAX];
- /// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place
- nfapi_ul_config_request_t UL_req[NFAPI_CC_MAX];
- /// Preallocated DL pdu list
- nfapi_nr_dl_config_request_pdu_t dl_config_pdu_list[NFAPI_CC_MAX][MAX_NUM_DL_PDU];
- /// Preallocated UL pdu list
- nfapi_ul_config_request_pdu_t ul_config_pdu_list[NFAPI_CC_MAX][MAX_NUM_UL_PDU];
- /// Preallocated UL pdu list for ULSCH (n+k delay)
- nfapi_ul_config_request_pdu_t ul_config_pdu_list_tmp[NFAPI_CC_MAX][10][MAX_NUM_UL_PDU];
- /// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests
- nfapi_ul_config_request_t UL_req_tmp[NFAPI_CC_MAX][10];
- /// Preallocated HI_DCI0 pdu list
- nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[NFAPI_CC_MAX][MAX_NUM_HI_DCI0_PDU];
+ nfapi_nr_dl_tti_request_t DL_req[NFAPI_CC_MAX];
+ /// NFAPI UL TTI Request Structure (this is from the new SCF specs)
+ nfapi_nr_ul_tti_request_t UL_tti_req[NFAPI_CC_MAX];
/// NFAPI HI/DCI0 Config Request Structure
- nfapi_hi_dci0_request_t HI_DCI0_req[NFAPI_CC_MAX];
- /// Prealocated TX pdu list
- nfapi_tx_request_pdu_t tx_request_pdu[NFAPI_CC_MAX][MAX_NUM_TX_REQUEST_PDU];
+ nfapi_nr_ul_dci_request_t UL_dci_req[NFAPI_CC_MAX];
/// NFAPI DL PDU structure
- nfapi_tx_request_t TX_req[NFAPI_CC_MAX];
+ nfapi_nr_tx_data_request_t TX_req[NFAPI_CC_MAX];
NR_UE_list_t UE_list;
/// UL handle
@@ -193,4 +175,93 @@ typedef struct gNB_MAC_INST_s {
time_stats_t schedule_pch;
} gNB_MAC_INST;
+typedef struct {
+
+
+uint8_t format_indicator; //1 bit
+uint16_t frequency_domain_assignment; //up to 16 bits
+uint8_t time_domain_assignment; // 4 bits
+uint8_t frequency_hopping_flag; //1 bit
+
+uint8_t ra_preamble_index; //6 bits
+uint8_t ss_pbch_index; //6 bits
+uint8_t prach_mask_index; //4 bits
+
+uint8_t vrb_to_prb_mapping; //0 or 1 bit
+uint8_t mcs; //5 bits
+uint8_t ndi; //1 bit
+uint8_t rv; //2 bits
+uint8_t harq_pid; //4 bits
+uint8_t dai; //0, 2 or 4 bits
+uint8_t dai1; //1 or 2 bits
+uint8_t dai2; //0 or 2 bits
+uint8_t tpc; //2 bits
+uint8_t pucch_resource_indicator; //3 bits
+uint8_t pdsch_to_harq_feedback_timing_indicator; //0, 1, 2 or 3 bits
+
+uint8_t short_messages_indicator; //2 bits
+uint8_t short_messages; //8 bits
+uint8_t tb_scaling; //2 bits
+
+uint8_t carrier_indicator; //0 or 3 bits
+uint8_t bwp_indicator; //0, 1 or 2 bits
+uint8_t prb_bundling_size_indicator; //0 or 1 bits
+uint8_t rate_matching_indicator; //0, 1 or 2 bits
+uint8_t zp_csi_rs_trigger; //0, 1 or 2 bits
+uint8_t transmission_configuration_indication; //0 or 3 bits
+uint8_t srs_request; //2 bits
+uint8_t cbgti; //CBG Transmission Information: 0, 2, 4, 6 or 8 bits
+uint8_t cbgfi; //CBG Flushing Out Information: 0 or 1 bit
+uint8_t dmrs_sequence_initialization; //0 or 1 bit
+
+uint8_t srs_resource_indicator;
+uint8_t precoding_information;
+uint8_t csi_request;
+uint8_t ptrs_dmrs_association;
+uint8_t beta_offset_indicator; //0 or 2 bits
+
+uint8_t slot_format_indicator_count;
+uint8_t *slot_format_indicators;
+
+uint8_t pre_emption_indication_count;
+uint16_t *pre_emption_indications; //14 bit
+
+uint8_t block_number_count;
+uint8_t *block_numbers;
+
+uint8_t ul_sul_indicator; //0 or 1 bit
+uint8_t antenna_ports;
+
+uint16_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits
+uint16_t padding;
+
+} dci_pdu_rel15_t;
+
+typedef enum {
+ NR_DL_DCI_FORMAT_1_0 = 0,
+ NR_DL_DCI_FORMAT_1_1,
+ NR_DL_DCI_FORMAT_2_0,
+ NR_DL_DCI_FORMAT_2_1,
+ NR_DL_DCI_FORMAT_2_2,
+ NR_DL_DCI_FORMAT_2_3,
+ NR_UL_DCI_FORMAT_0_0,
+ NR_UL_DCI_FORMAT_0_1
+} nr_dci_format_t;
+
+typedef enum {
+ NR_RNTI_new = 0,
+ NR_RNTI_C,
+ NR_RNTI_RA,
+ NR_RNTI_P,
+ NR_RNTI_CS,
+ NR_RNTI_TC,
+ NR_RNTI_SP_CSI,
+ NR_RNTI_SI,
+ NR_RNTI_SFI,
+ NR_RNTI_INT,
+ NR_RNTI_TPC_PUSCH,
+ NR_RNTI_TPC_PUCCH,
+ NR_RNTI_TPC_SRS
+} nr_rnti_type_t;
+
#endif /*__LAYER2_NR_MAC_GNB_H__ */
diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c
index 9932ea7053..ca2c602033 100644
--- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c
+++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c
@@ -273,7 +273,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
handle_nr_cqi(UL_info);
handle_nr_harq(UL_info);
// clear HI prior to handling ULSCH
- mac->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi = 0;
+ mac->UL_dci_req[CC_id].numPdus = 0;
handle_nr_ulsch(UL_info);
if (nfapi_mode != 1) {
@@ -283,24 +283,27 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
(UL_info->frame+((UL_info->slot>(9-sf_ahead))?1:0)) % 1024,
(UL_info->slot+sf_ahead)%10);
*/
- nfapi_nr_config_request_t *cfg = &mac->config[CC_id];
+ nfapi_nr_config_request_scf_t *cfg = &mac->config[CC_id];
int spf = get_spf(cfg);
gNB_dlsch_ulsch_scheduler(module_id,
- (UL_info->frame+((UL_info->slot>(spf-1-sf_ahead))?1:0)) % 1024,
- (UL_info->slot+sf_ahead)%spf);
+ UL_info->frame,
+ UL_info->slot,
+ (UL_info->frame+((UL_info->slot>(spf-1-sf_ahead))?1:0)) % 1024,
+ (UL_info->slot+sf_ahead)%spf);
+
ifi->CC_mask = 0;
sched_info->module_id = module_id;
sched_info->CC_id = CC_id;
sched_info->frame = (UL_info->frame + ((UL_info->slot>(spf-1-sf_ahead)) ? 1 : 0)) % 1024;
sched_info->slot = (UL_info->slot+sf_ahead)%spf;
sched_info->DL_req = &mac->DL_req[CC_id];
- sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
+ sched_info->UL_dci_req = &mac->UL_dci_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_nr_UL_slot(&mac->common_channels[CC_id],(sched_info->slot+sf_ahead)%spf)>0))
- sched_info->UL_req = &mac->UL_req[CC_id];
+ sched_info->UL_tti_req = &mac->UL_tti_req[CC_id];
else
- sched_info->UL_req = NULL;
+ sched_info->UL_tti_req = NULL;
sched_info->TX_req = &mac->TX_req[CC_id];
#ifdef DUMP_FAPI
@@ -315,7 +318,10 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
ifi->NR_Schedule_response(sched_info);
}
- LOG_D(PHY,"NR_Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",sched_info->frame,sched_info->slot,sched_info->DL_req->dl_config_request_body.number_pdu);
+ LOG_D(PHY,"NR_Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",
+ sched_info->frame,
+ sched_info->slot,
+ sched_info->DL_req->dl_tti_request_body.nPDUs);
}
}
}
diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.h b/openair2/NR_PHY_INTERFACE/NR_IF_Module.h
index 67b00f6db4..14355781d0 100644
--- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.h
+++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.h
@@ -35,6 +35,7 @@
#include
#include "nfapi_nr_interface.h"
+#include "nfapi_nr_interface_scf.h"
#include "platform_constants.h"
#include "platform_types.h"
@@ -99,19 +100,19 @@ typedef struct {
/// slot
slot_t slot;
/// nFAPI DL Config Request
- nfapi_nr_dl_config_request_t *DL_req;
+ nfapi_nr_dl_tti_request_t *DL_req;
/// nFAPI UL Config Request
- nfapi_ul_config_request_t *UL_req;
- /// nFAPI HI_DCI Request
- nfapi_hi_dci0_request_t *HI_DCI0_req;
+ nfapi_nr_ul_tti_request_t *UL_tti_req;
+ /// nFAPI UL_DCI Request
+ nfapi_nr_ul_dci_request_t *UL_dci_req;
/// Pointers to DL SDUs
- nfapi_tx_request_t *TX_req;
+ nfapi_nr_tx_data_request_t *TX_req;
} NR_Sched_Rsp_t;
typedef struct {
uint8_t Mod_id;
int CC_id;
- nfapi_nr_config_request_t *cfg;
+ nfapi_nr_config_request_scf_t *cfg;
} NR_PHY_Config_t;
typedef struct NR_IF_Module_s {
diff --git a/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c b/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c
new file mode 100644
index 0000000000..7736252a07
--- /dev/null
+++ b/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c
@@ -0,0 +1,20 @@
+
+
+//openair2/NR_PHY_INTERFACE/nfapi_5g_test.c
+#include "nfapi_nr_interface_scf.h"
+
+#include // for printf
+
+int main ( int argc, char** argv)
+{
+ nfapi_nr_cell_param_t nfapi_nr_cell_param_test;
+ nfapi_nr_param_tlv_t* tlvs_to_report_list;
+ nfapi_nr_cell_param_test.config_tlvs_to_report_list = tlvs_to_report_list;
+ nfapi_nr_cell_param_test.phy_state = 0;
+ nfapi_nr_cell_param_test.release_capability = 0;
+ nfapi_nr_cell_param_test.skip_blank_dl_config = 0;
+ nfapi_nr_cell_param_test.skip_blank_ul_config = 0;
+
+ printf(" test nfapi \n");
+ return 0;
+}
diff --git a/targets/ARCH/COMMON/common_lib.c b/targets/ARCH/COMMON/common_lib.c
index 192578dea6..16b86cfd64 100644
--- a/targets/ARCH/COMMON/common_lib.c
+++ b/targets/ARCH/COMMON/common_lib.c
@@ -126,7 +126,7 @@ int load_lib(openair0_device *device,
libname=OAI_RFSIM_LIBNAME;
shlib_fdesc[0].fname="device_init";
} else if (flag == RAU_LOCAL_RADIO_HEAD) {
- if (getenv("RFSIMULATOR") != NULL)
+ if (IS_SOFTMODEM_RFSIM)
libname="rfsimulator";
else
libname=OAI_RF_LIBNAME;
diff --git a/targets/ARCH/rfsimulator/simulator.c b/targets/ARCH/rfsimulator/simulator.c
index 86d64a16b0..76d0ad6674 100644
--- a/targets/ARCH/rfsimulator/simulator.c
+++ b/targets/ARCH/rfsimulator/simulator.c
@@ -70,8 +70,8 @@ typedef struct complex16 sample_t; // 2*16 bits complex number
typedef struct buffer_s {
int conn_sock;
openair0_timestamp lastReceivedTS;
- openair0_timestamp lastWroteTS;
bool headerMode;
+ bool trashingPacket;
samplesBlockHeader_t th;
char *transferPtr;
uint64_t remainToTransfer;
@@ -83,6 +83,7 @@ typedef struct buffer_s {
typedef struct {
int listen_sock, epollfd;
openair0_timestamp nextTimestamp;
+ openair0_timestamp lastWroteTS;
uint64_t typeStamp;
char *ip;
uint16_t port;
@@ -102,11 +103,11 @@ void allocCirBuf(rfsimulator_state_t *bridge, int sock) {
ptr->circularBufEnd=((char *)ptr->circularBuf)+sampleToByte(CirSize,1);
ptr->conn_sock=sock;
ptr->lastReceivedTS=0;
- ptr->lastWroteTS=0;
ptr->headerMode=true;
+ ptr->trashingPacket=false;
ptr->transferPtr=(char *)&ptr->th;
ptr->remainToTransfer=sizeof(samplesBlockHeader_t);
- int sendbuff=1000*1000*10;
+ int sendbuff=1000*1000*100;
AssertFatal ( setsockopt(sock, SOL_SOCKET, SO_SNDBUF, &sendbuff, sizeof(sendbuff)) == 0, "");
struct epoll_event ev= {0};
ev.events = EPOLLIN | EPOLLRDHUP;
@@ -183,7 +184,7 @@ void setblocking(int sock, enum blocking_t active) {
AssertFatal(fcntl(sock, F_SETFL, opts) >= 0, "");
}
-static bool flushInput(rfsimulator_state_t *t, int timeout);
+static bool flushInput(rfsimulator_state_t *t, int timeout, int nsamps);
void fullwrite(int fd, void *_buf, ssize_t count, rfsimulator_state_t *t) {
if (t->saveIQfile != -1) {
@@ -207,7 +208,8 @@ void fullwrite(int fd, void *_buf, ssize_t count, rfsimulator_state_t *t) {
if(errno==EAGAIN) {
// The opposite side is saturated
// we read incoming sockets meawhile waiting
- flushInput(t, 5);
+ //flushInput(t, 5);
+ usleep(500);
continue;
} else
return;
@@ -218,8 +220,6 @@ void fullwrite(int fd, void *_buf, ssize_t count, rfsimulator_state_t *t) {
}
}
-
-
void rfsimulator_readconfig(rfsimulator_state_t *rfsimulator) {
char *saveF=NULL;
char *modelname=NULL;
@@ -316,19 +316,18 @@ sin_addr:
return 0;
}
-int rfsimulator_write(openair0_device *device, openair0_timestamp timestamp, void **samplesVoid, int nsamps, int nbAnt, int flags) {
- rfsimulator_state_t *t = device->priv;
+static int rfsimulator_write_internal(rfsimulator_state_t *t, openair0_timestamp timestamp, void **samplesVoid, int nsamps, int nbAnt, int flags, bool alreadyLocked) {
+ if (!alreadyLocked)
+ pthread_mutex_lock(&Sockmutex);
+
LOG_D(HW,"sending %d samples at time: %ld\n", nsamps, timestamp);
for (int i=0; ibuf[i];
if (b->conn_sock >= 0 ) {
- if ( abs((double)b->lastWroteTS-timestamp) > (double)CirSize )
- LOG_E(HW,"Tx/Rx shift too large Tx:%lu, Rx:%lu\n", b->lastWroteTS, b->lastReceivedTS);
-
samplesBlockHeader_t header= {t->typeStamp, nsamps, nbAnt, timestamp};
- fullwrite(b->conn_sock, &header, sizeof(header), t);
+ fullwrite(b->conn_sock,&header, sizeof(header), t);
sample_t tmpSamples[nsamps][nbAnt];
for(int a=0; aconn_sock >= 0 ) {
fullwrite(b->conn_sock, (void *)tmpSamples, sampleToByte(nsamps,nbAnt), t);
- b->lastWroteTS=timestamp+nsamps;
}
}
}
+ if ( t->lastWroteTS != 0 && abs((double)t->lastWroteTS-timestamp) > (double)CirSize)
+ LOG_E(HW,"Discontinuous TX gap too large Tx:%lu, %lu\n", t->lastWroteTS, timestamp);
+
+ AssertFatal(t->lastWroteTS <= timestamp+1, " Not supported to send Tx out of order (same in USRP) %lu, %lu\n",
+ t->lastWroteTS, timestamp);
+ t->lastWroteTS=timestamp+nsamps;
+
+ if (!alreadyLocked)
+ pthread_mutex_unlock(&Sockmutex);
+
LOG_D(HW,"sent %d samples at time: %ld->%ld, energy in first antenna: %d\n",
nsamps, timestamp, timestamp+nsamps, signal_energy(samplesVoid[0], nsamps) );
- // Let's verify we don't have incoming data
- // This is mandatory when the opposite side doesn't transmit
- flushInput(t, 0);
- pthread_mutex_unlock(&Sockmutex);
return nsamps;
}
-static bool flushInput(rfsimulator_state_t *t, int timeout) {
+int rfsimulator_write(openair0_device *device, openair0_timestamp timestamp, void **samplesVoid, int nsamps, int nbAnt, int flags) {
+ return rfsimulator_write_internal(device->priv, timestamp, samplesVoid, nsamps, nbAnt, flags, false);
+}
+
+static bool flushInput(rfsimulator_state_t *t, int timeout, int nsamps_for_initial) {
// Process all incoming events on sockets
// store the data in lists
struct epoll_event events[FD_SETSIZE]= {0};
@@ -375,7 +383,16 @@ static bool flushInput(rfsimulator_state_t *t, int timeout) {
AssertFatal( (conn_sock = accept(t->listen_sock,NULL,NULL)) != -1, "");
setblocking(conn_sock, notBlocking);
allocCirBuf(t, conn_sock);
- LOG_I(HW,"A ue connected\n");
+ LOG_I(HW,"A ue connected, sending the current time\n");
+ struct complex16 v= {0};
+ void *samplesVoid[t->tx_num_channels];
+
+ for ( int i=0; i < t->tx_num_channels; i++)
+ samplesVoid[i]=(void *)&v;
+
+ rfsimulator_write_internal(t, t->lastWroteTS > 1 ? t->lastWroteTS-1 : 0,
+ samplesVoid, 1,
+ t->tx_num_channels, 1, false);
} else {
if ( events[nbEv].events & (EPOLLHUP | EPOLLERR | EPOLLRDHUP) ) {
socketError(t,fd);
@@ -421,40 +438,60 @@ static bool flushInput(rfsimulator_state_t *t, int timeout) {
(t->typeStamp == ENB_MAGICDL_FDD && b->th.magic==UE_MAGICDL_FDD), "Socket Error in protocol");
b->headerMode=false;
- if ( b->lastReceivedTS != b->th.timestamp) {
+ if ( t->nextTimestamp == 0 ) { // First block in UE, resync with the eNB current TS
+ t->nextTimestamp=b->th.timestamp> nsamps_for_initial ?
+ b->th.timestamp - nsamps_for_initial :
+ 0;
+ b->lastReceivedTS=b->th.timestamp> nsamps_for_initial ?
+ b->th.timestamp :
+ nsamps_for_initial;
+ LOG_W(HW,"UE got first timestamp: starting at %lu\n", t->nextTimestamp);
+ b->trashingPacket=true;
+ } else if ( b->lastReceivedTS < b->th.timestamp) {
int nbAnt= b->th.nbAnt;
-
+
for (uint64_t index=b->lastReceivedTS; index < b->th.timestamp; index++ ) {
for (int a=0; a < nbAnt; a++) {
b->circularBuf[(index*nbAnt+a)%CirSize].r=0;
b->circularBuf[(index*nbAnt+a)%CirSize].i=0;
}
}
+ if (b->lastReceivedTS != 0 && b->th.timestamp-b->lastReceivedTS > 50 )
+ LOG_W(HW,"UEsock: %d gap of: %ld in reception\n", fd, b->th.timestamp-b->lastReceivedTS );
+ b->lastReceivedTS=b->th.timestamp;
+
+ } else if ( b->lastReceivedTS > b->th.timestamp && b->th.size == 1 ) {
+ LOG_W(HW,"Received Rx/Tx synchro out of order\n");
+ b->trashingPacket=true;
+ } else if ( b->lastReceivedTS == b->th.timestamp ) {
+ // normal case
+ } else {
+ abort();
+ AssertFatal(false, "received data in past: current is %lu, new reception: %lu!\n", b->lastReceivedTS, b->th.timestamp); }
- LOG_W(HW,"gap of: %ld in reception\n", b->th.timestamp-b->lastReceivedTS );
- }
+ pthread_mutex_lock(&Sockmutex);
- b->lastReceivedTS=b->th.timestamp;
- AssertFatal(b->lastWroteTS == 0 || ( abs((double)b->lastWroteTS-b->lastReceivedTS) < (double)CirSize),
- "Tx/Rx shift too large Tx:%lu, Rx:%lu\n", b->lastWroteTS, b->lastReceivedTS);
+ if (t->lastWroteTS != 0 && ( abs((double)t->lastWroteTS-b->lastReceivedTS) > (double)CirSize))
+ LOG_E(HW,"UEsock: %d Tx/Rx shift too large Tx:%lu, Rx:%lu\n", fd, t->lastWroteTS, b->lastReceivedTS);
+
+ pthread_mutex_unlock(&Sockmutex);
b->transferPtr=(char *)&b->circularBuf[b->lastReceivedTS%CirSize];
b->remainToTransfer=sampleToByte(b->th.size, b->th.nbAnt);
}
if ( b->headerMode==false ) {
- LOG_D(HW,"Set b->lastReceivedTS %ld\n", b->lastReceivedTS);
- b->lastReceivedTS=b->th.timestamp+b->th.size-byteToSample(b->remainToTransfer,b->th.nbAnt);
+ LOG_D(HW,"UEsock: %d Set b->lastReceivedTS %ld\n", fd, b->lastReceivedTS);
+ if ( ! b->trashingPacket ) {
+ b->lastReceivedTS=b->th.timestamp+b->th.size-byteToSample(b->remainToTransfer,b->th.nbAnt);
+ }
- // First block in UE, resync with the eNB current TS
- if ( t->nextTimestamp == 0 )
- t->nextTimestamp=b->lastReceivedTS-b->th.size;
-
- if ( b->remainToTransfer==0) {
- LOG_D(HW,"Completed block reception: %ld\n", b->lastReceivedTS);
- b->headerMode=true;
- b->transferPtr=(char *)&b->th;
- b->remainToTransfer=sizeof(samplesBlockHeader_t);
- b->th.magic=-1;
+ if ( b->remainToTransfer==0) {
+ LOG_D(HW,"UEsock: %d Completed block reception: %ld\n", fd, b->lastReceivedTS);
+ b->headerMode=true;
+ b->transferPtr=(char *)&b->th;
+ b->remainToTransfer=sizeof(samplesBlockHeader_t);
+ b->th.magic=-1;
+ b->trashingPacket=false;
}
}
}
@@ -468,7 +505,6 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
LOG_W(HW, "rfsimulator: only 1 antenna tested\n");
}
- pthread_mutex_lock(&Sockmutex);
rfsimulator_state_t *t = device->priv;
LOG_D(HW, "Enter rfsimulator_read, expect %d samples, will release at TS: %ld\n", nsamps, t->nextTimestamp+nsamps);
// deliver data from received data
@@ -484,45 +520,58 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
if ( t->nextTimestamp == 0)
LOG_W(HW,"No connected device, generating void samples...\n");
- if (!flushInput(t, 10)) {
+ if (!flushInput(t, 10, nsamps)) {
for (int x=0; x < nbAnt; x++)
memset(samplesVoid[x],0,sampleToByte(nsamps,1));
t->nextTimestamp+=nsamps;
- LOG_D(HW,"Generated void samples for Rx: %ld\n", t->nextTimestamp);
+
+ if ( ((t->nextTimestamp/nsamps)%100) == 0)
+ LOG_W(HW,"No UE, Generated void samples for Rx: %ld\n", t->nextTimestamp);
+
*ptimestamp = t->nextTimestamp-nsamps;
- pthread_mutex_unlock(&Sockmutex);
return nsamps;
}
} else {
+ pthread_mutex_lock(&Sockmutex);
+
+ if ( t->nextTimestamp > 0 && t->lastWroteTS < t->nextTimestamp) {
+ pthread_mutex_unlock(&Sockmutex);
+ usleep(10000);
+ pthread_mutex_lock(&Sockmutex);
+ if ( t->lastWroteTS < t->nextTimestamp ) {
+ // Assuming Tx is not done fully in another thread
+ // We can never write is the past from the received time
+ // So, the node perform receive but will never write these symbols
+ // let's tell this to the opposite node
+ // We send timestamp for nb samples required
+ // assuming this should have been done earlier if a Tx would exist
+ pthread_mutex_unlock(&Sockmutex);
+ struct complex16 v= {0};
+ void *samplesVoid[t->tx_num_channels];
+
+ for ( int i=0; i < t->tx_num_channels; i++)
+ samplesVoid[i]=(void *)&v;
+ LOG_I(HW, "No samples Tx occured, so we send 1 sample to notify it: Tx:%lu, Rx:%lu\n",
+ t->lastWroteTS, t->nextTimestamp);
+ rfsimulator_write_internal(t, t->nextTimestamp,
+ samplesVoid, 1,
+ t->tx_num_channels, 1, true);
+ } else {
+ pthread_mutex_unlock(&Sockmutex);
+ LOG_W(HW, "trx_write came from another thread\n");
+ }
+ } else
+ pthread_mutex_unlock(&Sockmutex);
+
bool have_to_wait;
do {
have_to_wait=false;
- for (int sock=0; sockbuf[sock];
- if ( b->circularBuf) {
- LOG_D(HW,"sock: %d, lastWroteTS: %lu, lastRecvTS: %lu, TS must be avail: %lu\n",
- sock, b->lastWroteTS,
- b->lastReceivedTS,
- t->nextTimestamp+nsamps);
-
- if ( b->lastReceivedTS > b->lastWroteTS ) {
- // The caller modem (NB, UE, ...) must send Tx in advance, so we fill TX if Rx is in advance
- // This occurs for example when UE is in sync mode: it doesn't transmit
- // with USRP, it seems ok: if "tx stream" is off, we may consider it actually cuts the Tx power
- struct complex16 v = {0};
- void *samplesVoid[b->th.nbAnt];
-
- for ( int i=0; i < b->th.nbAnt; i++)
- samplesVoid[i]=(void *)&v;
-
- rfsimulator_write(device, b->lastReceivedTS, samplesVoid, 1, b->th.nbAnt, 0);
- }
- }
-
if ( b->circularBuf )
if ( t->nextTimestamp+nsamps > b->lastReceivedTS ) {
have_to_wait=true;
@@ -535,7 +584,7 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
ptr->lastReceivedTS,
t->nextTimestamp+nsamps);
*/
- flushInput(t, 3);
+ flushInput(t, 3, nsamps);
} while (have_to_wait);
}
@@ -582,7 +631,6 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
nsamps,
*ptimestamp, t->nextTimestamp,
signal_energy(samplesVoid[0], nsamps));
- pthread_mutex_unlock(&Sockmutex);
return nsamps;
}
int rfsimulator_request(openair0_device *device, void *msg, ssize_t msg_len) {
@@ -613,7 +661,6 @@ __attribute__((__visibility__("default")))
int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
// to change the log level, use this on command line
// --log_config.hw_log_level debug
- // (for phy layer, replace "hw" by "phy")
rfsimulator_state_t *rfsimulator = (rfsimulator_state_t *)calloc(sizeof(rfsimulator_state_t),1);
rfsimulator_readconfig(rfsimulator);
pthread_mutex_init(&Sockmutex, NULL);
@@ -629,7 +676,6 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
device->trx_set_gains_func = rfsimulator_set_gains;
device->trx_write_func = rfsimulator_write;
device->trx_read_func = rfsimulator_read;
- device->uhd_set_thread_priority = NULL;
/* let's pretend to be a b2x0 */
device->type = USRP_B200_DEV;
device->openair0_cfg=&openair0_cfg[0];
diff --git a/targets/COMMON/openairinterface5g_limits.h b/targets/COMMON/openairinterface5g_limits.h
index 7fa0271d48..aa99eee048 100644
--- a/targets/COMMON/openairinterface5g_limits.h
+++ b/targets/COMMON/openairinterface5g_limits.h
@@ -14,10 +14,11 @@
// now , if we use --mu option in UE, compiling error will occur.
// This problem will be fixed in the future.
# ifndef UESIM_EXPANSION
-# define NUMBER_OF_UE_MAX 16
-# define NUMBER_OF_UCI_VARS_MAX 56
-# define NUMBER_OF_CONNECTED_eNB_MAX 3
-# define NUMBER_OF_CONNECTED_gNB_MAX 3
+# define NUMBER_OF_UE_MAX 4
+# define NUMBER_OF_NR_UE_MAX 4
+# define NUMBER_OF_UCI_VARS_MAX 14
+# define NUMBER_OF_CONNECTED_eNB_MAX 1
+# define NUMBER_OF_CONNECTED_gNB_MAX 1
# else
# define NUMBER_OF_UE_MAX 256
# define NUMBER_OF_UCI_VARS_MAX 256
diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
index ad88a0b89f..2a2ebd45fd 100644
--- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
+++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
@@ -284,9 +284,9 @@ NETWORK_CONTROLLER :
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
- phy_log_level ="info";
+ phy_log_level ="debug";
phy_log_verbosity ="medium";
- mac_log_level ="info";
+ mac_log_level ="debug";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf
index a11bf9d515..379c602c13 100644
--- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf
+++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf
@@ -262,7 +262,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
- parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
+ parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_DISABLE";
}
diff --git a/targets/RT/USER/lte-ru.c b/targets/RT/USER/lte-ru.c
index f81626f929..dea8c7a2b5 100644
--- a/targets/RT/USER/lte-ru.c
+++ b/targets/RT/USER/lte-ru.c
@@ -2731,11 +2731,6 @@ void init_RU(char *rf_config_file,
else
ru->generate_dmrs_sync = 0;
- if (ru->generate_dmrs_sync == 1) {
- generate_ul_ref_sigs();
- ru->dmrssync = (int16_t *)malloc16_clear(ru->frame_parms->ofdm_symbol_size*2*sizeof(int16_t));
- }
-
ru->wakeup_L1_sleeptime = 2000;
ru->wakeup_L1_sleep_cnt_max = 3;