fixing the new PUCCH procedures
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@@ -70,7 +70,7 @@ static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac,
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LOG_D(NR_MAC,
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"%s %4d.%2d Scheduling pucch reception in %4d.%2d: bits SR %d, DAI %d, CSI %d on res %d\n",
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pucch->dai_c>0 ? "pucch_acknak" : "",
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pucch->dai_c>0 ? "pucch_acknack" : "",
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frame,
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slot,
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pucch->frame,
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@@ -204,17 +204,15 @@ void nr_csi_meas_reporting(int Mod_idP,
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AssertFatal(res_index < n,
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"CSI pucch resource %ld not found among PUCCH resources\n", pucchcsires->pucch_Resource);
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// find free PUCCH that is in order with possibly existing PUCCH
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// schedulings (other CSI, SR)
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NR_sched_pucch_t *curr_pucch = NULL;
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for (int i=0; i<sched_ctrl->sched_pucch_size; i++) {
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curr_pucch = &sched_ctrl->sched_pucch[i];
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if (!curr_pucch->active)
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break; // found an available pucch structure
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}
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AssertFatal(curr_pucch,
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"PUCCH structure not found for UE %04x\n",
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UE->rnti);
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const NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels[0].ServingCellConfigCommon;
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const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
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AssertFatal(tdd || RC.nrmac[Mod_idP]->common_channels[0].frame_type == FDD, "Dynamic TDD not handled yet\n");
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const int nr_slots_period = tdd ? n_slots_frame / get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity) : n_slots_frame;
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const int first_ul_slot_period = tdd ? tdd->nrofDownlinkSlots : 0;
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const int n_ul_slots_period = tdd ? tdd->nrofUplinkSlots + (tdd->nrofUplinkSymbols > 0 ? 1 : 0) : n_slots_frame;
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const int pucch_index = ((sched_slot % nr_slots_period) - first_ul_slot_period + (sched_slot / nr_slots_period) * n_ul_slots_period) % sched_ctrl->sched_pucch_size;
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NR_sched_pucch_t *curr_pucch = &sched_ctrl->sched_pucch[pucch_index];
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AssertFatal(curr_pucch->active == false, "CSI structure is scheduled in advance. It should be free!\n");
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curr_pucch->r_pucch = -1;
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curr_pucch->frame = sched_frame;
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curr_pucch->ul_slot = sched_slot;
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@@ -1062,6 +1060,7 @@ int nr_acknack_scheduling(int mod_id,
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AssertFatal(tdd || RC.nrmac[mod_id]->common_channels[CC_id].frame_type == FDD, "Dynamic TDD not handled yet\n");
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const int nr_slots_period = tdd ? n_slots_frame / get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity) : n_slots_frame;
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const int first_ul_slot_period = tdd ? tdd->nrofDownlinkSlots : 0;
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const int n_ul_slots_period = tdd ? tdd->nrofUplinkSlots + (tdd->nrofUplinkSymbols > 0 ? 1 : 0) : n_slots_frame;
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/* for the moment, we consider:
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* * only pucch_sched[0] holds HARQ (and SR)
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@@ -1090,42 +1089,40 @@ int nr_acknack_scheduling(int mod_id,
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// check if the slot is UL
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if(pucch_slot%nr_slots_period < first_ul_slot_period)
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continue;
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const int pucch_frame = frame + ((slot + pdsch_to_harq_feedback[f]) / n_slots_frame);
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int inactive_pucch = -1;
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NR_sched_pucch_t *curr_pucch = NULL;
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for (int i=0; i<sched_ctrl->sched_pucch_size; i++) {
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curr_pucch = &sched_ctrl->sched_pucch[i];
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// if there is already an active pucch for this frame and slot
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if (curr_pucch->active &&
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curr_pucch->frame == pucch_frame &&
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curr_pucch->ul_slot == pucch_slot) {
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LOG_D(NR_MAC, "pucch_acknak DL %4d.%2d, UL_ACK %4d.%2d Bits already in current PUCCH: DAI_C %d CSI %d\n",
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frame, slot, pucch_frame, pucch_slot, curr_pucch->dai_c, curr_pucch->csi_bits);
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// we can't schedule if short pucch is already full
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if (curr_pucch->csi_bits == 0 &&
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curr_pucch->dai_c == 2)
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continue;
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// if there is CSI but simultaneous HARQ+CSI is disable we can't schedule
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if(!curr_pucch->simultaneous_harqcsi &&
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curr_pucch->csi_bits>0)
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continue;
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// TODO we can't schedule more than 11 bits in PUCCH2 for now
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if (curr_pucch->csi_bits + curr_pucch->dai_c >= 10)
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continue;
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const int pucch_frame = (frame + ((slot + pdsch_to_harq_feedback[f]) / n_slots_frame)) & 1023;
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const int pucch_index = ((pucch_slot % nr_slots_period) - first_ul_slot_period + (pucch_slot / nr_slots_period) * n_ul_slots_period) % sched_ctrl->sched_pucch_size;
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NR_sched_pucch_t *curr_pucch = &sched_ctrl->sched_pucch[pucch_index];
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if (curr_pucch->active &&
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curr_pucch->frame == pucch_frame &&
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curr_pucch->ul_slot == pucch_slot) { // if there is already a PUCCH in given frame and slot
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LOG_D(NR_MAC, "pucch_acknack DL %4d.%2d, UL_ACK %4d.%2d Bits already in current PUCCH: DAI_C %d CSI %d\n",
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frame, slot, pucch_frame, pucch_slot, curr_pucch->dai_c, curr_pucch->csi_bits);
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// we can't schedule if short pucch is already full
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if (curr_pucch->csi_bits == 0 &&
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curr_pucch->dai_c == 2)
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continue;
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// if there is CSI but simultaneous HARQ+CSI is disable we can't schedule
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if(!curr_pucch->simultaneous_harqcsi &&
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curr_pucch->csi_bits>0)
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continue;
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// TODO we can't schedule more than 11 bits in PUCCH2 for now
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if (curr_pucch->csi_bits + curr_pucch->dai_c >= 10)
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continue;
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// otherwise we can schedule in this active PUCCH
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// no need to check VRB occupation because already done when PUCCH has been activated
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curr_pucch->timing_indicator = f;
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curr_pucch->dai_c++;
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LOG_D(NR_MAC, "DL %4d.%2d, UL_ACK %4d.%2d Scheduling ACK/NACK in PUCCH %d with timing indicator %d DAI %d CSI %d\n",
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frame,slot,curr_pucch->frame,curr_pucch->ul_slot,i,f,curr_pucch->dai_c,curr_pucch->csi_bits);
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return i; // index of current PUCCH structure
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}
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else if (!curr_pucch->active)
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inactive_pucch = i;
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// otherwise we can schedule in this active PUCCH
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// no need to check VRB occupation because already done when PUCCH has been activated
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curr_pucch->timing_indicator = f;
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curr_pucch->dai_c++;
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LOG_D(NR_MAC, "DL %4d.%2d, UL_ACK %4d.%2d Scheduling ACK/NACK in PUCCH %d with timing indicator %d DAI %d CSI %d\n",
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frame,slot,curr_pucch->frame,curr_pucch->ul_slot,pucch_index,f,curr_pucch->dai_c,curr_pucch->csi_bits);
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return pucch_index; // index of current PUCCH structure
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}
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if (inactive_pucch>0) {
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curr_pucch = &sched_ctrl->sched_pucch[inactive_pucch];
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else if (curr_pucch->active) {
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LOG_E(NR_MAC, "This shouldn't happen! curr_pucch frame.slot %d.%d not matching with computed frame.slot %d.%d\n",
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curr_pucch->frame, curr_pucch->ul_slot, pucch_frame, pucch_slot);
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continue;
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}
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else { // unoccupied occasion
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// checking if in ul_slot the resources potentially to be assigned to this PUCCH are available
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uint16_t *vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch_slot * MAX_BWP_SIZE];
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bool ret = test_pucch0_vrb_occupation(sched_ctrl,
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@@ -1151,7 +1148,7 @@ int nr_acknack_scheduling(int mod_id,
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curr_pucch->r_pucch=r_pucch;
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LOG_D(NR_MAC, "DL %4d.%2d, UL_ACK %4d.%2d Scheduling ACK/NACK in PUCCH %d with timing indicator %d DAI %d\n",
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frame,slot,curr_pucch->frame,curr_pucch->ul_slot,inactive_pucch,f,curr_pucch->dai_c);
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frame,slot,curr_pucch->frame,curr_pucch->ul_slot,pucch_index,f,curr_pucch->dai_c);
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// blocking resources for current PUCCH in VRB map
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for (int l=0; l<curr_pucch->nr_of_symb; l++) {
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@@ -1162,7 +1159,7 @@ int nr_acknack_scheduling(int mod_id,
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vrb_map_UL[bwp_start+prb] |= symb;
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}
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return inactive_pucch; // index of current PUCCH structure
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return pucch_index; // index of current PUCCH structure
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}
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}
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LOG_D(NR_MAC, "DL %4d.%2d, Couldn't find scheduling occasion for this HARQ process\n", frame, slot);
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@@ -1175,7 +1172,6 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
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if (!is_xlsch_in_slot(nrmac->ulsch_slot_bitmap[slot / 64], slot))
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return;
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int CC_id = 0;
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const NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
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UE_iterator(nrmac->UE_info.list, UE) {
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NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
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NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
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@@ -1211,30 +1207,31 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
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}
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AssertFatal(idx>-1,"SR resource not found among PUCCH resources");
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NR_sched_pucch_t *curr_pucch = NULL;
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bool found = false;
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int free_pucch = -1;
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for (int i=0; i<sched_ctrl->sched_pucch_size; i++) {
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curr_pucch = &sched_ctrl->sched_pucch[i];
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if (curr_pucch->active &&
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curr_pucch->frame == SFN &&
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curr_pucch->ul_slot == slot &&
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curr_pucch->resource_indicator == idx) {
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curr_pucch->sr_flag = true;
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found = true;
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break;
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}
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else if (!curr_pucch->active)
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free_pucch = i; // found an available pucch structure
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const NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
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const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
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AssertFatal(tdd || nrmac->common_channels[CC_id].frame_type == FDD, "Dynamic TDD not handled yet\n");
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const int nr_slots_period = tdd ? n_slots_frame / get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity) : n_slots_frame;
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const int first_ul_slot_period = tdd ? tdd->nrofDownlinkSlots : 0;
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const int n_ul_slots_period = tdd ? tdd->nrofUplinkSlots + (tdd->nrofUplinkSymbols > 0 ? 1 : 0) : n_slots_frame;
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const int pucch_index = ((slot % nr_slots_period) - first_ul_slot_period + (slot / nr_slots_period) * n_ul_slots_period) % sched_ctrl->sched_pucch_size;
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NR_sched_pucch_t *curr_pucch = &sched_ctrl->sched_pucch[pucch_index];
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if (curr_pucch->active &&
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curr_pucch->frame == SFN &&
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curr_pucch->ul_slot == slot &&
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curr_pucch->resource_indicator == idx)
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curr_pucch->sr_flag = true;
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else if (curr_pucch->active) {
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LOG_E(NR_MAC, "This shouldn't happen! curr_pucch frame.slot %d.%d not matching with SR function frame.slot %d.%d\n",
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curr_pucch->frame, curr_pucch->ul_slot, SFN, slot);
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continue;
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}
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AssertFatal(found || free_pucch>-1, "Coulnd't find an available PUCCH resource to schedule SR\n");
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if (!found) {
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else {
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uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[slot * MAX_BWP_SIZE];
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int bwp_start = ul_bwp->BWPStart;
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int bwp_size = ul_bwp->BWPSize;
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NR_sched_pucch_t *sched_sr = &sched_ctrl->sched_pucch[free_pucch];
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bool ret = test_pucch0_vrb_occupation(sched_ctrl,
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sched_sr,
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curr_pucch,
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vrb_map_UL,
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scc,
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pucch_Config,
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@@ -1245,19 +1242,19 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
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LOG_E(NR_MAC,"Cannot schedule SR. PRBs not available\n");
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continue;
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}
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sched_sr->frame = SFN;
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sched_sr->ul_slot = slot;
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sched_sr->sr_flag = true;
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sched_sr->resource_indicator = idx;
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sched_sr->r_pucch = -1;
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sched_sr->active = true;
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for (int l=0; l<sched_sr->nr_of_symb; l++) {
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uint16_t symb = SL_to_bitmap(sched_sr->start_symb+l, 1);
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curr_pucch->frame = SFN;
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curr_pucch->ul_slot = slot;
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curr_pucch->sr_flag = true;
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curr_pucch->resource_indicator = idx;
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curr_pucch->r_pucch = -1;
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curr_pucch->active = true;
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for (int l=0; l<curr_pucch->nr_of_symb; l++) {
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uint16_t symb = SL_to_bitmap(curr_pucch->start_symb+l, 1);
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int prb;
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if (l==1 && sched_sr->second_hop_prb != 0)
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prb = sched_sr->second_hop_prb;
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if (l==1 && curr_pucch->second_hop_prb != 0)
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prb = curr_pucch->second_hop_prb;
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else
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prb = sched_sr->prb_start;
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prb = curr_pucch->prb_start;
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vrb_map_UL[bwp_start+prb] |= symb;
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}
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}
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