Add changes for avx512/aarch64 ldpc encoder optimizations
newly-generated files for innermost part of the parity bit generation which, for AVX512, uses the mm512_permutex2var_epi8 instruction and for 128-bit (aarch64) the mm_alignr_epi8 (vextq_s8) in the computation corresponding to each non-zero bit of the H matrix. It is generated with ldpctest -n0 -g1. the changes for this are in a future MR. I did these changes to compare with the GPU version (ldpc_encoder_cuda), so that the CPU version is as fast as possible. The generator will come when we merge the GPU encoder/decoder which also has a generator for the CUDA version. it was difficult to extract the changes in ldpctest/ldpc_encoder.c so I just took the generated file. This allows for removing a very large memcpy and reduces the memory demand for the parity matrix computation. For the moment this is limited to largest case in BG1, namely Zc=384. This is the only format used when the number of segments after codeblock segmentation is large (>8). This improves the timing required for ldpc parity bits generation by more than a factor 2 with AVX512. This significantly reduces the total time to generate the DLSCH/PDSCH
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Robert Schmidt
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