diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c index a704a66c76..4b006ca425 100644 --- a/common/utils/nr/nr_common.c +++ b/common/utils/nr/nr_common.c @@ -257,6 +257,48 @@ void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) { *n_rb = 6*count; } +int get_nb_periods_per_frame(uint8_t tdd_period) { + + int nb_periods_per_frame; + switch(tdd_period) { + case 0: + nb_periods_per_frame = 20; // 10ms/0p5ms + break; + + case 1: + nb_periods_per_frame = 16; // 10ms/0p625ms + break; + + case 2: + nb_periods_per_frame = 10; // 10ms/1ms + break; + + case 3: + nb_periods_per_frame = 8; // 10ms/1p25ms + break; + + case 4: + nb_periods_per_frame = 5; // 10ms/2ms + break; + + case 5: + nb_periods_per_frame = 4; // 10ms/2p5ms + break; + + case 6: + nb_periods_per_frame = 2; // 10ms/5ms + break; + + case 7: + nb_periods_per_frame = 1; // 10ms/10ms + break; + + default: + AssertFatal(1==0,"Undefined tdd period %d\n", tdd_period); + } + return nb_periods_per_frame; +} + int get_dmrs_port(int nl, uint16_t dmrs_ports) { diff --git a/common/utils/nr/nr_common.h b/common/utils/nr/nr_common.h index d9f2b0c03a..4165ca2d41 100644 --- a/common/utils/nr/nr_common.h +++ b/common/utils/nr/nr_common.h @@ -71,6 +71,7 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx); int get_subband_size(int NPRB,int size); void SLIV2SL(int SLIV,int *S,int *L); int get_dmrs_port(int nl, uint16_t dmrs_ports); +int get_nb_periods_per_frame(uint8_t tdd_period); #define CEILIDIV(a,b) ((a+b-1)/b) #define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1)) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 5223b00e2a..0c397187b5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -492,16 +492,25 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, find_SSB_and_RO_available(Mod_idP); const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; - const int nr_dlmix_slots = tdd ? tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0) : 0; - const int nr_dl_slots = tdd ? nr_dlmix_slots : n; - const int nr_ulstart_slot = tdd ? tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0) : 1; + + int nr_slots_period = n; + int nr_dl_slots = n; + int nr_ulstart_slot = 0; + if (tdd) { + nr_dl_slots = tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0); + nr_ulstart_slot = tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0); + nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + } + else{ + if(RC.nrmac[Mod_idP]->common_channels[0].frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); + } for (int slot = 0; slot < n; ++slot) { /* FIXME: it seems there is a problem with slot 0/10/slots right after UL: - * we just get retransmissions. Thus, do not schedule such slots in DL */ - if (slot % nr_slots_period != 0){ + * we just get retransmissions. Thus, do not schedule such slots in DL in TDD */ + if (RC.nrmac[Mod_idP]->common_channels[0].frame_type == FDD || + (slot % nr_slots_period != 0)){ RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) < nr_dl_slots) << (slot % 64); } RC.nrmac[Mod_idP]->ulsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) >= nr_ulstart_slot) << (slot % 64); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 7b6dc0e01d..1929f58943 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -36,6 +36,7 @@ #include "NR_MAC_gNB/mac_proto.h" #include "common/utils/LOG/log.h" +#include "common/utils/nr/nr_common.h" #include "common/utils/LOG/vcd_signal_dumper.h" #include "UTIL/OPT/opt.h" #include "OCG.h" @@ -284,13 +285,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; if (slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) { + //FR2 const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; - const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; - const int nb_periods_per_frame = n / nr_slots_period; - - // re-initialization of tdd_beam_association at beginning of frame (only for FR2) + AssertFatal(tdd,"Dynamic TDD not handled yet\n"); + const int nb_periods_per_frame = get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + // re-initialization of tdd_beam_association at beginning of frame for (int i=0; itdd_beam_association[i] = -1; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index fcfbc455ca..dcd85e880b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -397,6 +397,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, uint16_t *msg2_frame, uint16_t *msg2_slot, NR_ServingCellConfigCommon_t *scc, + lte_frame_type_t frame_type, uint16_t monitoring_slot_period, uint16_t monitoring_offset,uint8_t beam_index, uint8_t num_active_ssb, @@ -411,17 +412,20 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; // number of mixed slot or of last dl slot if there is no mixed slot - uint8_t last_dl_slot_period = tdd ? tdd->nrofDownlinkSlots : 0; + uint8_t last_dl_slot_period = n_slots_frame-1; // lenght of tdd period in slots - uint8_t tdd_period_slot = tdd ? scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots : n_slots_frame; + uint8_t tdd_period_slot = n_slots_frame; - if (tdd && (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols == 0)) { - last_dl_slot_period--; + if (tdd) { + last_dl_slot_period = tdd->nrofDownlinkSymbols == 0? (tdd->nrofDownlinkSlots-1) : tdd->nrofDownlinkSlots; + tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); } - if (tdd && ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))) { - tdd_period_slot++; + else{ + if(frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); } + switch(response_window){ case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1: slot_window = 1; @@ -515,6 +519,7 @@ void nr_initiate_ra_proc(module_id_t module_idP, gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + lte_frame_type_t frame_type = cc->frame_type; uint8_t total_RApreambles = MAX_NUM_NR_PRACH_PREAMBLES; uint8_t num_ssb_per_RO = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present; @@ -619,6 +624,7 @@ void nr_initiate_ra_proc(module_id_t module_idP, &msg2_frame, &msg2_slot, scc, + frame_type, monitoring_slot_period, monitoring_offset, beam_index, @@ -728,15 +734,11 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t // beam association for FR2 int16_t *tdd_beam_association = nr_mac->tdd_beam_association; if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) { - + // FR2 const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - uint8_t tdd_period_slot = tdd ? scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots : n_slots_frame; - - if (tdd && ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))) { - tdd_period_slot++; - } - + AssertFatal(tdd,"Dynamic TDD not handled yet\n"); + uint8_t tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); int num_tdd_period = sched_slot/tdd_period_slot; if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id)) @@ -886,6 +888,8 @@ void nr_get_Msg3alloc(module_id_t module_id, uint16_t msg3_nb_rb = 8; // sdu has 6 or 8 bytes + lte_frame_type_t frame_type = RC.nrmac[module_id]->common_channels->frame_type; + int mu = ubwp ? ubwp->bwp_Common->genericParameters.subcarrierSpacing : scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; @@ -901,7 +905,7 @@ void nr_get_Msg3alloc(module_id_t module_id, const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; const int n_slots_frame = nr_slots_per_frame[mu]; - const int nrofUplinkSymbols = tdd ? tdd->nrofUplinkSymbols : 4; + const int nrofUplinkSymbols = (frame_type==TDD) ? tdd->nrofUplinkSymbols : 11; // TODO change in favor of harmonization branch uint8_t k2 = 0; for (int i=0; ilist.count; i++) { startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; @@ -927,10 +931,8 @@ void nr_get_Msg3alloc(module_id_t module_id, // beam association for FR2 if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) { - uint8_t tdd_period_slot = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots : n_slots_frame; - if (tdd && ((tdd->nrofDownlinkSymbols > 0) || (tdd->nrofUplinkSymbols > 0))) { - tdd_period_slot++; - } + AssertFatal(tdd,"Dynamic TDD not handled yet\n"); + uint8_t tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); int num_tdd_period = ra->Msg3_slot/tdd_period_slot; if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id)) AssertFatal(1==0,"Cannot schedule MSG3\n"); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 090c9523ef..d7a004b17f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -268,8 +268,8 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id); const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n_slots_frame; + // FR2 is only TDD, to be fixed for flexible TDD + const int nr_slots_period = tdd ? n_slots_frame/get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity) : n_slots_frame; num_tdd_period = rel_slot/nr_slots_period; gNB->tdd_beam_association[num_tdd_period]=i_ssb; num_ssb++; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 0f0f38cd75..65a97e01ac 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -62,9 +62,23 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t * /* there is a mixed slot only when in TDD */ NR_ServingCellConfigCommon_t *scc = nrmac->common_channels->ServingCellConfigCommon; + lte_frame_type_t frame_type = nrmac->common_channels->frame_type; + const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - const int symb_dlMixed = tdd ? (1 << tdd->nrofDownlinkSymbols) - 1 : 0; + + int symb_dlMixed = 0; + int nr_mix_slots = 0; + int nr_slots_period = n; + if (tdd) { + symb_dlMixed = (1 << tdd->nrofDownlinkSymbols) - 1; + nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; + nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + } + else{ + if(frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); + } int target_ss; if (bwp) { @@ -97,7 +111,7 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t * /* check that TDA index 1 fits into DL part of mixed slot, if it exists */ int tdaMi = -1; - if (tdd && tdaList->list.count > 1) { + if (frame_type == TDD && tdaList->list.count > 1) { const NR_PDSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; AssertFatal(!tdaP_Mi->k0 || *tdaP_Mi->k0 == 0, "TimeDomainAllocation at index 1: non-null k0 (%ld) is not supported by the scheduler\n", @@ -120,16 +134,13 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t * } } - const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; nrmac->preferred_dl_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_dl_tda[bwp_id])); - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; for (int i = 0; i < n; ++i) { nrmac->preferred_dl_tda[bwp_id][i] = -1; - if (!tdd || i % nr_slots_period < tdd->nrofDownlinkSlots) + if (frame_type == FDD || i % nr_slots_period < tdd->nrofDownlinkSlots) nrmac->preferred_dl_tda[bwp_id][i] = 0; - else if (tdd && nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots) + else if (nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots) nrmac->preferred_dl_tda[bwp_id][i] = tdaMi; LOG_D(MAC, "slot %d preferred_dl_tda %d\n", i, nrmac->preferred_dl_tda[bwp_id][i]); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 42dffee5cc..1365a02505 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -32,6 +32,7 @@ #include "NR_MAC_COMMON/nr_mac_extern.h" #include "NR_MAC_gNB/mac_proto.h" #include "common/ran_context.h" +#include "common/utils/nr/nr_common.h" #include "nfapi/oai_integration/vendor_ext.h" extern RAN_CONTEXT_t RC; @@ -1182,26 +1183,27 @@ int nr_acknack_scheduling(int mod_id, int r_pucch, int is_common) { - const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon; - const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; - const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - const int nr_mix_slots = tdd? (tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0) : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n_slots_frame; - const int first_ul_slot_tdd = tdd? tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period) : 0; - const int first_ul_slot_period = tdd? tdd->nrofDownlinkSlots : 0; const int CC_id = 0; const int minfbtime = RC.nrmac[mod_id]->minRXTXTIMEpdsch; + const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels[CC_id].ServingCellConfigCommon; + const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; + const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; + // initializing the values for FDD + int nr_slots_period = n_slots_frame; + int first_ul_slot_tdd = slot + minfbtime; + int first_ul_slot_period = 0; + if(tdd){ + nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period); + first_ul_slot_period = tdd->nrofDownlinkSlots; + } + else{ + if(RC.nrmac[mod_id]->common_channels[CC_id].frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); + } NR_sched_pucch_t *csi_pucch; - if (tdd) { - AssertFatal(slot < first_ul_slot_tdd + (tdd->nrofUplinkSymbols != 0), - "cannot handle multiple TDD periods (yet): slot %d first_ul_slot_tdd %d nrofUplinkSlots %ld\n", - slot, - first_ul_slot_tdd, - tdd->nrofUplinkSlots); - } - /* for the moment, we consider: * * only pucch_sched[0] holds HARQ (and SR) * * we do not multiplex with CSI, which is always in pucch_sched[2] @@ -1320,7 +1322,7 @@ int nr_acknack_scheduling(int mod_id, AssertFatal(pucch->sr_flag + pucch->dai_c == 0, "expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n", UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot); - const int s = tdd ? first_ul_slot_tdd : slot + minfbtime; + const int s = first_ul_slot_tdd; pucch->frame = (s < n_slots_frame - 1) ? frame : (frame + 1) % 1024; pucch->ul_slot = s % n_slots_frame; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 49871670a3..37f735a0c5 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -59,11 +59,24 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub /* there is a mixed slot only when in TDD */ NR_ServingCellConfigCommon_t *scc = nrmac->common_channels->ServingCellConfigCommon; + lte_frame_type_t frame_type = nrmac->common_channels->frame_type; + const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; /* Uplink symbols are at the end of the slot */ - const int symb_ulMixed = tdd ? ((1 << tdd->nrofUplinkSymbols) - 1) << (14 - tdd->nrofUplinkSymbols) : 0; + int symb_ulMixed = 0; + int nr_mix_slots = 0; + int nr_slots_period = n; + if (tdd) { + symb_ulMixed = ((1 << tdd->nrofUplinkSymbols) - 1) << (14 - tdd->nrofUplinkSymbols); + nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; + nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + } + else{ + if(frame_type == TDD) + AssertFatal(1==0,"Dynamic TDD not handled yet\n"); + } const struct NR_PUCCH_Config__resourceToAddModList *resList = ubwp->bwp_Dedicated->pucch_Config->choice.setup->resourceToAddModList; // for the moment, just block any symbol that might hold a PUCCH, regardless @@ -117,7 +130,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub // get largest time domain allocation (TDA) for UL slot and UL in mixed slot int tdaMi = -1; - if (tdd) { + if (nr_mix_slots>0) { const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", @@ -139,16 +152,15 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub symb_tda_mi); } } - const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; + nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id])); - const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0; - const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n; + for (int slot = 0; slot < n; ++slot) { const int sched_slot = (slot + k2) % n; nrmac->preferred_ul_tda[bwp_id][slot] = -1; - if (!tdd || sched_slot % nr_slots_period >= tdd->nrofDownlinkSlots + nr_mix_slots) + if (frame_type == FDD || sched_slot % nr_slots_period >= tdd->nrofDownlinkSlots + nr_mix_slots) nrmac->preferred_ul_tda[bwp_id][slot] = 0; - else if (tdd && nr_mix_slots && sched_slot % nr_slots_period == tdd->nrofDownlinkSlots) + else if (nr_mix_slots && sched_slot % nr_slots_period == tdd->nrofDownlinkSlots) nrmac->preferred_ul_tda[bwp_id][slot] = tdaMi; LOG_D(MAC, "DL slot %d UL slot %d preferred_ul_tda %d\n", slot, sched_slot, nrmac->preferred_ul_tda[bwp_id][slot]); }