From abe25a52b3a3397276f5d9de755a9c8752f27b77 Mon Sep 17 00:00:00 2001 From: Sakthivel Velumani Date: Fri, 9 May 2025 01:40:27 -0400 Subject: [PATCH 1/5] Fix alignment of LLR buffer in UE --- openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c index d266d443e9..ebe4c946be 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c @@ -693,7 +693,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, return -1; } - int16_t layer_llr[dlsch[0].Nl][rx_llr_layer_size]; + __attribute__((aligned(32))) int16_t layer_llr[dlsch[0].Nl][rx_llr_layer_size]; for(int i = startSymbIdx; i < startSymbIdx + nbSymb; i++) { /* Calculate LLR's for each symbol */ start_meas_nr_ue_phy(ue, DLSCH_LLR_STATS); From 7feaea00c27b46f46e20786be6a1e243cb3cffc5 Mon Sep 17 00:00:00 2001 From: Sakthivel Velumani Date: Thu, 10 Jul 2025 20:40:46 -0400 Subject: [PATCH 2/5] Fix counting error bits in nr_dlsim Recently f buffer was changed to hold packed bits and the correspoinding change in dlsim was not done so the number of error bits before decoding was incorrectly reported. This commit fixes it. --- openair1/SIMULATION/NR_PHY/dlsim.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index f1fa7885a4..36f69041cc 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -1253,9 +1253,8 @@ printf("%d\n", slot); } for (i = 0; i < available_bits; i++) { - if(((gNB_dlsch->harq_process.f[i] == 0) && (UE_llr[i] <= 0)) || - ((gNB_dlsch->harq_process.f[i] == 1) && (UE_llr[i] >= 0))) - { + const uint8_t current_bit = (gNB_dlsch->harq_process.f[i / 8] & (1 << (i & 7))) >> (i & 7); + if (((current_bit == 0) && (UE_llr[i] <= 0)) || ((current_bit == 1) && (UE_llr[i] >= 0))) { if (errors_scrambling[round] == 0) { LOG_D(PHY,"First bit in error in unscrambling = %d\n",i); } From eb44d715ca7d8da7215fa48c42b2ebdb60a42879 Mon Sep 17 00:00:00 2001 From: Sakthivel Velumani Date: Mon, 12 May 2025 16:13:30 -0400 Subject: [PATCH 3/5] Dlsim dump processing buffers Write extracted rxF buffer to output bin file. Fix offset in writing rxF buffer. --- .../NR_UE_TRANSPORT/nr_dlsch_demodulation.c | 15 ++--- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 8 ++- openair1/SIMULATION/NR_PHY/dlsim.c | 57 ++++++++++++------- 3 files changed, 50 insertions(+), 30 deletions(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c index ebe4c946be..d045c6f198 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c @@ -480,10 +480,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, ue->phy_cpu_stats.cpu_time_stats[DLSCH_EXTRACT_RBS_STATS].p_time / (cpuf * 1000.0)); } if (ue->phy_sim_pdsch_rxdataF_ext) - for (unsigned char aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) { - int offset = ((void *)rxdataF_ext[aarx] - (void *)rxdataF_ext) + symbol * rx_size_symbol; - memcpy(ue->phy_sim_pdsch_rxdataF_ext + offset, rxdataF_ext, rx_size_symbol * sizeof(c16_t)); - } + memcpy(ue->phy_sim_pdsch_rxdataF_ext + symbol * sizeof(rxdataF_ext), rxdataF_ext, sizeof(rxdataF_ext)); nb_re_pdsch = (pilots == 1) ? ((config_type == NFAPI_NR_DMRS_TYPE1) ? nb_rb_pdsch * (12 - 6 * dlsch_config->n_dmrs_cdm_groups) : nb_rb_pdsch * (12 - 4 * dlsch_config->n_dmrs_cdm_groups)) @@ -776,12 +773,16 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, if (ue->phy_sim_pdsch_rxdataF_comp) for (int a = 0; a < nbRx; a++) { - int offset = (void *)rxdataF_comp[0][a] - (void *)rxdataF_comp[0] + symbol * rx_size_symbol * sizeof(c16_t); - memcpy(ue->phy_sim_pdsch_rxdataF_comp + offset, rxdataF_comp[0][a] + symbol * rx_size_symbol, sizeof(c16_t) * rx_size_symbol); + for (int l = 0; l < nl; l++) { + int offset = (void *)rxdataF_comp[l][a] - (void *)rxdataF_comp[0] + symbol * rx_size_symbol * sizeof(c16_t); + memcpy(ue->phy_sim_pdsch_rxdataF_comp + offset, + rxdataF_comp[l][a] + symbol * rx_size_symbol, + sizeof(c16_t) * rx_size_symbol); + } memcpy((c16_t *)ue->phy_sim_pdsch_dl_ch_estimates + pdsch_est_size * a, dl_ch_estimates, pdsch_est_size * sizeof(c16_t)); } if (ue->phy_sim_pdsch_dl_ch_estimates_ext) - memcpy((c16_t *)ue->phy_sim_pdsch_dl_ch_estimates_ext + symbol * rx_size_symbol, + memcpy(ue->phy_sim_pdsch_dl_ch_estimates_ext + symbol * sizeof(dl_ch_estimates_ext), dl_ch_estimates_ext, sizeof(dl_ch_estimates_ext)); return (0); diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index 791f3e4631..fc22fe693e 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -1042,6 +1042,8 @@ int pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_ phy_pdcch_config->nb_search_space = 0; VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_OUT); TracyCZoneEnd(ctx); + if (ue->phy_sim_rxdataF) + memcpy(ue->phy_sim_rxdataF, rxdataF[0], sizeof(int32_t) * nb_symb_pdcch * ue->frame_parms.ofdm_symbol_size); return sampleShift; } @@ -1166,9 +1168,11 @@ void pdsch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_ } if (ue->phy_sim_rxdataF) - memcpy(ue->phy_sim_rxdataF, rxdataF, sizeof(int32_t)*rxdataF_sz*ue->frame_parms.nb_antennas_rx); + memcpy(ue->phy_sim_rxdataF + start_symb_sch * ue->frame_parms.ofdm_symbol_size * sizeof(c16_t), + &rxdataF[0][start_symb_sch * ue->frame_parms.ofdm_symbol_size], + sizeof(int32_t) * nb_symb_sch * ue->frame_parms.ofdm_symbol_size); if (ue->phy_sim_pdsch_llr) - memcpy(ue->phy_sim_pdsch_llr, llr[0], sizeof(int16_t)*rx_llr_buf_sz); + memcpy(ue->phy_sim_pdsch_llr, llr[0], sizeof(int16_t) * rx_llr_buf_sz); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT); for (int i=0; iphy_sim_pdsch_llr; TBS = dlsch0->dlsch_config.TBS;//rel15->TBSize[0]; - uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); - uint16_t nb_rb = rel15->rbSize; - uint8_t nb_re_dmrs = rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6*dlsch0->dlsch_config.n_dmrs_cdm_groups : 4*dlsch0->dlsch_config.n_dmrs_cdm_groups; - uint8_t mod_order = rel15->qamModOrder[0]; - uint8_t nb_symb_sch = rel15->NrOfSymbols; + uint16_t length_dmrs = get_num_dmrs(dlsch0->dlsch_config.dlDmrsSymbPos); + uint16_t nb_rb = dlsch0->dlsch_config.number_rbs; + uint8_t nb_re_dmrs = dlsch0->dlsch_config.dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6*dlsch0->dlsch_config.n_dmrs_cdm_groups : 4*dlsch0->dlsch_config.n_dmrs_cdm_groups; + uint8_t mod_order = dlsch0->dlsch_config.qamModOrder; + uint8_t nb_symb_sch = dlsch0->dlsch_config.number_symbols; uint32_t unav_res = ptrsSymbPerSlot * ptrsRePerSymb; available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, unav_res, mod_order, rel15->nrOfLayers); if (pdu_bit_map & 0x1) { @@ -1367,23 +1367,38 @@ printf("%d\n", slot); if (UE->frame_parms.nb_antennas_rx>1) LOG_M("rxsig1.m", "rxs1", UE->common_vars.rxdata[1], frame_length_complex_samples, dec, op_format); LOG_M("rxF0.m", "rxF0", UE->phy_sim_rxdataF, frame_parms->samples_per_slot_wCP, dec, op_format); - LOG_M("rxF_ext.m", "rxFe", UE->phy_sim_pdsch_rxdataF_ext, g_rbSize * 12 * 14, dec, op_format); const uint32_t numReSym = (g_rbSize * 12 + 15) & (~15); - const uint32_t numValidReSym = g_rbSize * 12; - { - const int s = rel15->StartSymbolIndex; - const int n = rel15->NrOfSymbols; - for (int i = s; i < s + n; i++) { - char fName[50]; - snprintf(fName, sizeof(fName), "chestF0_ext_s%d.m", i); - LOG_M(fName, - "chF0_ext", - ((c16_t *)UE->phy_sim_pdsch_dl_ch_estimates_ext) + (i * numReSym), - numValidReSym, - dec, - op_format); - snprintf(fName, sizeof(fName), "rxF_comp_s%d.m", i); - LOG_M(fName, "rxFc", ((c16_t *)UE->phy_sim_pdsch_rxdataF_comp) + (i * numReSym), numValidReSym, dec, op_format); + for (int l = 0; l < g_nrOfLayers; l++) { + for (int r = 0; r < n_rx; r++) { + const int s = rel15->StartSymbolIndex; + const int n = rel15->NrOfSymbols; + for (int i = s; i < s + n; i++) { + const uint32_t dmrsBitMap = phy_data.dlsch[0].dlsch_config.dlDmrsSymbPos; + const uint32_t dmrsCfg = phy_data.dlsch[0].dlsch_config.dmrsConfigType; + const uint32_t nrb = phy_data.dlsch[0].dlsch_config.number_rbs; + const uint32_t ncdmg = phy_data.dlsch[0].dlsch_config.n_dmrs_cdm_groups; + const uint32_t numValidReSym = ((dmrsBitMap >> i) & 1) + ? ((dmrsCfg == NFAPI_NR_DMRS_TYPE1) ? nrb * (12 - 6 * ncdmg) : nrb * (12 - 4 * ncdmg)) + : (nrb * 12); + char fName[50]; + snprintf(fName, sizeof(fName), "chestF_ext_l%d_r%d_s%d.m", l, r, i); + uint32_t buff_offset = (i * g_nrOfLayers * n_rx * numReSym) + (l * n_rx * numReSym) + (r * numReSym); + LOG_M(fName, + "chF0_ext", + ((c16_t *)UE->phy_sim_pdsch_dl_ch_estimates_ext) + buff_offset, + numValidReSym, + dec, + op_format); + snprintf(fName, sizeof(fName), "rxF_comp_l%d_s%d.m", l, i); + LOG_M(fName, "rxFc", ((c16_t *)UE->phy_sim_pdsch_rxdataF_comp) + (l * NR_SYMBOLS_PER_SLOT * numReSym) + (i * numReSym), numValidReSym, dec, op_format); + if (l == 0) { + snprintf(fName, sizeof(fName), "rxF_ext_r%d_s%d.m", r, i); + buff_offset = (i * n_rx * numReSym) + (r * numReSym); + LOG_M(fName, "rxFext", ((c16_t *)UE->phy_sim_pdsch_rxdataF_ext) + buff_offset, numValidReSym, dec, op_format); + } + snprintf(fName, sizeof(fName), "chestF0_s%d.m", i); + LOG_M(fName, "chF0", ((c16_t *)UE->phy_sim_pdsch_dl_ch_estimates) + i * frame_parms->ofdm_symbol_size, nrb*12, dec, op_format); + } } } LOG_M("chestF0.m", "chF0", UE->phy_sim_pdsch_dl_ch_estimates, frame_parms->ofdm_symbol_size * 14, dec, op_format); From dad6cf8dc3895be22e85a8abeb3cf14c9fb27cff Mon Sep 17 00:00:00 2001 From: Sakthivel Velumani Date: Thu, 10 Jul 2025 16:11:09 -0400 Subject: [PATCH 4/5] Fix bug in LLR threshold buffer The LLR threshold buffers hold only for one symbol but the LLRs are computed for all symbols together. So only the threshold of last symbol was used for computing LLR for all other symbols. This commit calls nr_dlsch_llr for each symbol togther with rest of nr_rx_pdsch() and calls nr_dlsch_layer_demapping at the last symbol. Fixes issue 948. --- .../NR_UE_TRANSPORT/nr_dlsch_demodulation.c | 61 +++++++------------ .../NR_UE_TRANSPORT/nr_transport_proto_ue.h | 2 + openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 11 ++++ 3 files changed, 35 insertions(+), 39 deletions(-) diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c index d045c6f198..15297a2ba3 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c @@ -312,6 +312,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, unsigned char harq_pid, uint32_t pdsch_est_size, int32_t dl_ch_estimates[][pdsch_est_size], + int layer_llr_size, + int16_t layer_llr[][layer_llr_size], int16_t *llr[2], uint32_t dl_valid_re[NR_SYMBOLS_PER_SLOT], c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP], @@ -681,47 +683,28 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, dlsch); dl_valid_re[symbol] -= ptrs_re_per_slot[0][symbol]; } + start_meas_nr_ue_phy(ue, DLSCH_LLR_STATS); + nr_dlsch_llr(rx_size_symbol, + nbRx, + layer_llr_size, + layer_llr, + rxdataF_comp, + dl_ch_mag[0][0], + dl_ch_magb[0][0], + dl_ch_magr[0][0], + dlsch0_harq, + dlsch1_harq, + symbol, + dl_valid_re[symbol], + dlsch, + llr_offset[symbol]); + if (symbol < startSymbIdx + nbSymb - 1) // up to the penultimate symbol + llr_offset[symbol + 1] = dl_valid_re[symbol] * dlsch_config->qamModOrder + llr_offset[symbol]; + stop_meas_nr_ue_phy(ue, DLSCH_LLR_STATS); /* at last symbol in a slot calculate LLR's for whole slot */ - if(symbol == (startSymbIdx + nbSymb - 1)) { - const uint32_t rx_llr_layer_size = (G + dlsch[0].Nl - 1) / dlsch[0].Nl; - - if (dlsch[0].Nl == 0 || rx_llr_layer_size == 0 || rx_llr_layer_size > 10 * 1000 * 1000) { - LOG_E(PHY, "rx_llr_layer_size %d, G %d, Nl, %d, discarding this pdsch\n", rx_llr_layer_size, G, dlsch[0].Nl); - return -1; - } - - __attribute__((aligned(32))) int16_t layer_llr[dlsch[0].Nl][rx_llr_layer_size]; - for(int i = startSymbIdx; i < startSymbIdx + nbSymb; i++) { - /* Calculate LLR's for each symbol */ - start_meas_nr_ue_phy(ue, DLSCH_LLR_STATS); - nr_dlsch_llr(rx_size_symbol, - nbRx, - rx_llr_layer_size, - layer_llr, - rxdataF_comp, - dl_ch_mag[0][0], - dl_ch_magb[0][0], - dl_ch_magr[0][0], - dlsch0_harq, - dlsch1_harq, - i, - dl_valid_re[i], - dlsch, - llr_offset[i]); - if (i < startSymbIdx + nbSymb - 1) // up to the penultimate symbol - llr_offset[i + 1] = dl_valid_re[i] * dlsch_config->qamModOrder + llr_offset[i]; - stop_meas_nr_ue_phy(ue, DLSCH_LLR_STATS); - } - + if (symbol == (startSymbIdx + nbSymb - 1)) { start_meas_nr_ue_phy(ue, DLSCH_LAYER_DEMAPPING); - nr_dlsch_layer_demapping(llr, - dlsch[0].Nl, - dlsch_config->qamModOrder, - G, - codeword_TB0, - codeword_TB1, - rx_llr_layer_size, - layer_llr); + nr_dlsch_layer_demapping(llr, dlsch[0].Nl, dlsch_config->qamModOrder, G, codeword_TB0, codeword_TB1, layer_llr_size, layer_llr); stop_meas_nr_ue_phy(ue, DLSCH_LAYER_DEMAPPING); /* for (int i=0; i < 2; i++){ diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h index 8e266a57a3..cdb10d0533 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h @@ -310,6 +310,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, unsigned char harq_pid, uint32_t pdsch_est_size, int32_t dl_ch_estimates[][pdsch_est_size], + int layer_llr_size, + int16_t layer_llr[][layer_llr_size], int16_t *llr[2], uint32_t dl_valid_re[NR_SYMBOLS_PER_SLOT], c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP], diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index fc22fe693e..e31d0491bc 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -605,6 +605,15 @@ static int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, uint32_t llr_offset[NR_SYMBOLS_PER_SLOT] = {0}; int32_t log2_maxh = 0; + + const uint32_t rx_llr_layer_size = (G + dlsch[0].Nl - 1) / dlsch[0].Nl; + + if (dlsch[0].Nl == 0 || rx_llr_layer_size == 0 || rx_llr_layer_size > 10 * 1000 * 1000) { + LOG_E(PHY, "rx_llr_layer_size %d, G %d, Nl, %d, discarding this pdsch\n", rx_llr_layer_size, G, dlsch[0].Nl); + return -1; + } + __attribute__((aligned(32))) int16_t layer_llr[dlsch[0].Nl][rx_llr_layer_size]; + start_meas_nr_ue_phy(ue, RX_PDSCH_STATS); pdsch_scope_req_t scope_req = { .copy_chanest_to_scope = false, .copy_rxdataF_to_scope = false, @@ -639,6 +648,8 @@ static int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, harq_pid, pdsch_est_size, pdsch_dl_ch_estimates, + rx_llr_layer_size, + layer_llr, llr, dl_valid_re, rxdataF, From e9d95e89623716840840debafebff6a25f3a738b Mon Sep 17 00:00:00 2001 From: Sakthivel Velumani Date: Thu, 10 Jul 2025 21:13:52 -0400 Subject: [PATCH 5/5] Add new physim test cases for nr_dlsim Following tests are added: 1. 256QAM with TDL-A channel model 2. 256QAM with 2 layers --- openair1/PHY/CODING/tests/CMakeLists.txt | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/openair1/PHY/CODING/tests/CMakeLists.txt b/openair1/PHY/CODING/tests/CMakeLists.txt index 8d7fac20d7..2f8f88d547 100644 --- a/openair1/PHY/CODING/tests/CMakeLists.txt +++ b/openair1/PHY/CODING/tests/CMakeLists.txt @@ -113,10 +113,12 @@ add_physim_test(5g nr_dlsim offset.test5 "217 PRB 100 PDSCH-PRBs 110 PDSCH-Offse add_physim_test(5g nr_dlsim mcs.mimo.test1 "106 PRBs 50 PDSCH-PRBs MCS Index 27" -n300 -e27 -s30) add_physim_test(5g nr_dlsim mcs.mimo.test2 "106 PRBs 50 PDSCH-PRBs MCS Index 16" -n300 -e16 -s11 -S13) add_physim_test(5g nr_dlsim mcs.mimo.test3 "106 MCS-TABLE 256 QAM MCS Index 26" -n300 -q1 -e26 -s30) -add_physim_test(5g nr_dlsim mcs.mimo.test4 "MCS 0, low SNR performance" -n300 -e0 -t95 -S-1.0 -i 2 1 0) -add_physim_test(5g nr_dlsim mcs.mimo.test5 "4x4 MIMO, 1 Layer" -n30 -s20 -U 3 0 0 2 -gA -x1 -y4 -z4) -add_physim_test(5g nr_dlsim mcs.mimo.test6 "4x4 MIMO, 2 Layers" -n30 -s20 -U 3 0 0 2 -gA -x2 -y4 -z4) -add_physim_test(5g nr_dlsim mcs.mimo.test7 "4x4 MIMO, 4 Layers" -n30 -s20 -U 3 0 0 2 -x4 -y4 -z4) +add_physim_test(5g nr_dlsim mcs.mimo.test4 "106 MCS-TABLE 256 QAM Fading Channel" -n300 -q1 -e24 -s30 -gA) +add_physim_test(5g nr_dlsim mcs.mimo.test5 "MCS 0, low SNR performance" -n300 -e0 -t95 -S-1.0 -i 2 1 0) +add_physim_test(5g nr_dlsim mcs.mimo.test6 "4x4 MIMO, 1 Layer" -n30 -s20 -U 3 0 0 2 -gA -x1 -y4 -z4) +add_physim_test(5g nr_dlsim mcs.mimo.test7 "4x4 MIMO, 2 Layers" -n30 -s20 -U 3 0 0 2 -gA -x2 -y4 -z4) +add_physim_test(5g nr_dlsim mcs.mimo.test8 "4x4 MIMO, 2 Layers 256 QAM" -n30 -s25 -e22 -q1 -U 3 0 0 2 -gA -x2 -y4 -z4) +add_physim_test(5g nr_dlsim mcs.mimo.test9 "4x4 MIMO, 4 Layers" -n30 -s20 -U 3 0 0 2 -x4 -y4 -z4) add_physim_test(5g nr_dlsim dmrs.ptrs.test1 "3 PTRS, 8 Interpolated Symbols" -n300 -s5 -T 2 2 2) add_physim_test(5g nr_dlsim dmrs.ptrs.test2 "6 PTRS, 5 Interpolated Symbols" -n300 -s5 -T 2 1 2) add_physim_test(5g nr_dlsim dmrs.ptrs.test3 "11 PTRS, 0 Interpolated Symbols" -n300 -s5 -T 2 0 4)