PreProc IF: save Time domain assignment info per UE
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@@ -478,6 +478,8 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
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module_id, UE_id, frame, slot, num_slots_per_tdd, &sched_ctrl->pucch_sched_idx);
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module_id, UE_id, frame, slot, num_slots_per_tdd, &sched_ctrl->pucch_sched_idx);
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AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n");
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AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n");
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// Time-domain allocation
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sched_ctrl->time_domain_allocation = 2;
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}
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}
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void nr_schedule_ue_spec(module_id_t module_id,
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void nr_schedule_ue_spec(module_id_t module_id,
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@@ -510,9 +512,15 @@ void nr_schedule_ue_spec(module_id_t module_id,
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const uint8_t numDmrsCdmGrpsNoData = 1;
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const uint8_t numDmrsCdmGrpsNoData = 1;
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const nfapi_nr_dmrs_type_e dmrsConfigType = sched_ctrl->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
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const nfapi_nr_dmrs_type_e dmrsConfigType = sched_ctrl->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
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const int time_domain_assignment = 2;
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struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
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AssertFatal(time_domain_assignment<sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count,"time_domain_assignment %d>=%d\n",time_domain_assignment,sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count);
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sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
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const int startSymbolAndLength = sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength;
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AssertFatal(sched_ctrl->time_domain_allocation < tdaList->list.count,
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"time_domain_allocation %d>=%d\n",
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sched_ctrl->time_domain_allocation,
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tdaList->list.count);
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const int startSymbolAndLength =
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tdaList->list.array[sched_ctrl->time_domain_allocation]->startSymbolAndLength;
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int startSymbolIndex, nrOfSymbols;
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int startSymbolIndex, nrOfSymbols;
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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@@ -670,7 +678,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
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R,
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R,
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Qm,
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Qm,
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TBS,
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TBS,
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time_domain_assignment,
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sched_ctrl->time_domain_allocation,
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startSymbolIndex,
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startSymbolIndex,
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nrOfSymbols,
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nrOfSymbols,
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sched_ctrl->aggregation_level,
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sched_ctrl->aggregation_level,
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@@ -301,6 +301,9 @@ typedef struct {
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int cce_index;
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int cce_index;
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uint8_t aggregation_level;
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uint8_t aggregation_level;
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// time-domain allocation for scheduled RBs
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int time_domain_allocation;
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uint16_t ta_timer;
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uint16_t ta_timer;
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int16_t ta_update;
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int16_t ta_update;
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uint8_t tpc0;
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uint8_t tpc0;
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