use commonControlResourceSet instead of CSET0 as coreset for common SearchSpaces in case of MUX pattern 3
This commit is contained in:
@@ -32,7 +32,7 @@ gNBs =
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absoluteFrequencySSB = 2078299;
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absoluteFrequencySSB = 2078299;
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dl_frequencyBand = 257;
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dl_frequencyBand = 257;
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# this is 27.900 GHz
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# this is 27.900 GHz
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dl_absoluteFrequencyPointA = 2077915;
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dl_absoluteFrequencyPointA = 2077963;
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#scs-SpecificCarrierList
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#scs-SpecificCarrierList
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dl_offstToCarrier = 0;
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dl_offstToCarrier = 0;
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# subcarrierSpacing
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# subcarrierSpacing
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@@ -42,7 +42,7 @@ gNBs =
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#initialDownlinkBWP
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#initialDownlinkBWP
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#genericParameters
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#genericParameters
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# this is RBstart=0,L=32 (275*(L-1))+RBstart
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# this is RBstart=0,L=32 (275*(L-1))+RBstart
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initialDLBWPlocationAndBandwidth = 13475;
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initialDLBWPlocationAndBandwidth = 6349;
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# subcarrierSpacing
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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initialDLBWPsubcarrierSpacing = 3;
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initialDLBWPsubcarrierSpacing = 3;
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@@ -62,7 +62,7 @@ gNBs =
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pMax = 20;
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pMax = 20;
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#initialUplinkBWP
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#initialUplinkBWP
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#genericParameters
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#genericParameters
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initialULBWPlocationAndBandwidth = 13475;
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initialULBWPlocationAndBandwidth = 6349;
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# subcarrierSpacing
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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initialULBWPsubcarrierSpacing = 3;
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initialULBWPsubcarrierSpacing = 3;
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@@ -143,6 +143,11 @@ gNBs =
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);
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);
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first_active_bwp = 1;
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bwp_list = (
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{ scs = 3; bwpStart = 0; bwpSize = 66;}
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);
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# ------- SCTP definitions
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# ------- SCTP definitions
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SCTP :
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SCTP :
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{
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{
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@@ -122,7 +122,7 @@ services:
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environment:
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environment:
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USE_ADDITIONAL_OPTIONS: --rfsim
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USE_ADDITIONAL_OPTIONS: --rfsim
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--rfsimulator.serveraddr 192.168.71.140 --log_config.global_log_options level,nocolor,time
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--rfsimulator.serveraddr 192.168.71.140 --log_config.global_log_options level,nocolor,time
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-C 27972480000 -r 66 --numerology 3 --ssb 72 --band 257
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-C 27975360000 -r 66 --numerology 3 --ssb 48 --band 257
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ASAN_OPTIONS: detect_leaks=0
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ASAN_OPTIONS: detect_leaks=0
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devices:
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devices:
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- /dev/net/tun:/dev/net/tun
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- /dev/net/tun:/dev/net/tun
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@@ -587,7 +587,7 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc, uint64_t ssbmap)
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nr_rrc_config_dl_tda(dlcc->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList,
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nr_rrc_config_dl_tda(dlcc->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList,
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frame_type,
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frame_type,
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scc->tdd_UL_DL_ConfigurationCommon,
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scc->tdd_UL_DL_ConfigurationCommon,
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dlcc->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
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NRRIV2BW(dlcc->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE));
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if (frame_type == FDD) {
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if (frame_type == FDD) {
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ASN_STRUCT_FREE(asn_DEF_NR_TDD_UL_DL_ConfigCommon, scc->tdd_UL_DL_ConfigurationCommon);
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ASN_STRUCT_FREE(asn_DEF_NR_TDD_UL_DL_ConfigCommon, scc->tdd_UL_DL_ConfigurationCommon);
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@@ -821,6 +821,15 @@ static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
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fill_coresetZero(&sched_ctrlCommon->coreset, &type0_PDCCH_CSS_config);
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fill_coresetZero(&sched_ctrlCommon->coreset, &type0_PDCCH_CSS_config);
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nr_mac->cset0_bwp_start = type0_PDCCH_CSS_config.cset_start_rb;
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nr_mac->cset0_bwp_start = type0_PDCCH_CSS_config.cset_start_rb;
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nr_mac->cset0_bwp_size = type0_PDCCH_CSS_config.num_rbs;
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nr_mac->cset0_bwp_size = type0_PDCCH_CSS_config.num_rbs;
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if (type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern > 1) {
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int bwp_start = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,
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MAX_BWP_SIZE);
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int bwp_size = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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// we need to configure a commonControlResourceSet != 0
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// because CSET0 would start from a symbol != 0 and that's unwanted for anything but SIB1
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// The network configures the commonControlResourceSet in SIB1 so that it is contained in the bandwidth of CSET0
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configure_coreset_for_mux23(scc, nr_mac->cset0_bwp_start - bwp_start, nr_mac->cset0_bwp_size, bwp_start, bwp_size);
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}
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}
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}
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/**
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/**
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@@ -273,20 +273,41 @@ NR_SearchSpace_t *rrc_searchspace_config(bool is_common,
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return ss;
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return ss;
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}
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}
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static NR_ControlResourceSet_t *get_coreset_config(int bwp_id, int bwp_start, int bwp_size, uint64_t ssb_bitmap)
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static NR_ControlResourceSet_t *get_coreset_config(int bwp_id,
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int cset_offset,
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int cset_limit,
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int bwp_start,
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int bwp_size,
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uint64_t ssb_bitmap)
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{
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{
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NR_ControlResourceSet_t *coreset = calloc(1, sizeof(*coreset));
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NR_ControlResourceSet_t *coreset = calloc(1, sizeof(*coreset));
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AssertFatal(coreset != NULL, "out of memory\n");
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AssertFatal(coreset != NULL, "out of memory\n");
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// frequency domain resources depending on BWP size
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// frequency domain resources depending on BWP size
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int additional_offset = (bwp_start + 5) / 6 * 6 - bwp_start;
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int additional_offset = (bwp_start + 5) / 6 * 6 - bwp_start;
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int cset_shift = 0;
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if (cset_offset > additional_offset) {
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cset_shift = cset_offset / 6 + (cset_offset % 6 > 0);
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additional_offset += cset_shift * 6;
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}
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int eff_bwp_size = bwp_size - additional_offset;
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int eff_bwp_size = bwp_size - additional_offset;
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if (cset_limit && eff_bwp_size > cset_limit)
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eff_bwp_size = cset_limit;
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AssertFatal(eff_bwp_size >= 24, "CORESET effective BWP size %d is less than 24 PRB, can't allocate\n", eff_bwp_size);
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coreset->frequencyDomainResources.buf = calloc(1,6);
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coreset->frequencyDomainResources.buf = calloc(1,6);
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coreset->frequencyDomainResources.buf[0] = (eff_bwp_size < 48) ? 0xf0 : 0xff;
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uint64_t buf = 0;
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coreset->frequencyDomainResources.buf[1] = (eff_bwp_size < 96) ? 0x00 : 0xff;
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if (eff_bwp_size < 48)
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coreset->frequencyDomainResources.buf[2] = (eff_bwp_size < 144) ? 0x00 : 0xff;
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buf = 0xf;
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coreset->frequencyDomainResources.buf[3] = (eff_bwp_size < 192) ? 0x00 : 0xff;
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else {
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coreset->frequencyDomainResources.buf[4] = (eff_bwp_size < 240) ? 0x00 : 0xff;
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for (int i = 0; i < eff_bwp_size / 48; i++) {
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coreset->frequencyDomainResources.buf[5] = 0x00;
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buf <<= 8;
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buf += 0xff;
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}
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}
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buf <<= cset_shift;
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for (int b = 0; b < 6; b++) {
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uint8_t temp_buf = (buf >> (8 * b)) & 0xff;
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reverse_bits_u8(&temp_buf, 1, &coreset->frequencyDomainResources.buf[b]);
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}
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coreset->frequencyDomainResources.size = 6;
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coreset->frequencyDomainResources.size = 6;
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coreset->frequencyDomainResources.bits_unused = 3;
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coreset->frequencyDomainResources.bits_unused = 3;
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coreset->duration = (eff_bwp_size < 48) ? 2 : 1;
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coreset->duration = (eff_bwp_size < 48) ? 2 : 1;
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@@ -1001,8 +1022,8 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
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void nr_rrc_config_dl_tda(struct NR_PDSCH_TimeDomainResourceAllocationList *pdsch_TimeDomainAllocationList,
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void nr_rrc_config_dl_tda(struct NR_PDSCH_TimeDomainResourceAllocationList *pdsch_TimeDomainAllocationList,
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frame_type_t frame_type,
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frame_type_t frame_type,
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NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,
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NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,
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int curr_bwp) {
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int curr_bwp)
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{
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// coreset duration setting to be improved in the framework of RRC harmonization, potentially using a common function
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// coreset duration setting to be improved in the framework of RRC harmonization, potentially using a common function
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int len_coreset = 1;
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int len_coreset = 1;
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if (curr_bwp < 48)
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if (curr_bwp < 48)
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@@ -1751,7 +1772,7 @@ static NR_BWP_Downlink_t *config_downlinkBWP(const NR_ServingCellConfigCommon_t
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int bwp_size = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int bwp_size = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int bwp_start = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int bwp_start = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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uint64_t ssb_bitmap = get_ssb_bitmap(scc);
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uint64_t ssb_bitmap = get_ssb_bitmap(scc);
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NR_ControlResourceSet_t *coreset = get_coreset_config(bwp->bwp_Id, bwp_start, bwp_size, ssb_bitmap);
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NR_ControlResourceSet_t *coreset = get_coreset_config(bwp->bwp_Id, 0, 0, bwp_start, bwp_size, ssb_bitmap);
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bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet = coreset;
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bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet = coreset;
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bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceZero=NULL;
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bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceZero=NULL;
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@@ -1803,9 +1824,8 @@ static NR_BWP_Downlink_t *config_downlinkBWP(const NR_ServingCellConfigCommon_t
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bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList));
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bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList));
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bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList));
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bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList));
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// coreset2 is identical to coreset above, but reallocated to prevent double
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// coreset2 is identical to coreset above, but reallocated to prevent double frees
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// frees
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NR_ControlResourceSet_t *coreset2 = get_coreset_config(bwp->bwp_Id, 0, 0, bwp_start, bwp_size, ssb_bitmap);
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NR_ControlResourceSet_t *coreset2 = get_coreset_config(bwp->bwp_Id, bwp_start, bwp_size, ssb_bitmap);
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asn1cSeqAdd(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list, coreset2);
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asn1cSeqAdd(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list, coreset2);
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int rrc_num_agg_level_candidates[NUM_PDCCH_AGG_LEVELS];
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int rrc_num_agg_level_candidates[NUM_PDCCH_AGG_LEVELS];
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int num_cces = get_coreset_num_cces(coreset2->frequencyDomainResources.buf, coreset2->duration);
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int num_cces = get_coreset_num_cces(coreset2->frequencyDomainResources.buf, coreset2->duration);
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@@ -2710,6 +2730,17 @@ static BIT_STRING_t bit_string_clone(const BIT_STRING_t *orig)
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return bs;
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return bs;
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}
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}
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void configure_coreset_for_mux23(const NR_ServingCellConfigCommon_t *scc, int offset, int limit, int bwp_start, int bwp_size)
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{
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NR_ControlResourceSet_t *coreset = get_coreset_config(5, offset, limit, bwp_start, bwp_size, get_ssb_bitmap(scc));
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NR_PDCCH_ConfigCommon_t *pdcch_common = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup;
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pdcch_common->commonControlResourceSet = coreset;
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for (int i = 0; i < pdcch_common->commonSearchSpaceList->list.count; i++) {
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*pdcch_common->commonSearchSpaceList->list.array[i]->controlResourceSetId = coreset->controlResourceSetId;
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}
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}
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NR_BCCH_DL_SCH_Message_t *get_SIB1_NR(const NR_ServingCellConfigCommon_t *scc,
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NR_BCCH_DL_SCH_Message_t *get_SIB1_NR(const NR_ServingCellConfigCommon_t *scc,
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const plmn_id_t *plmn,
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const plmn_id_t *plmn,
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uint64_t cellID,
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uint64_t cellID,
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@@ -3336,7 +3367,7 @@ static NR_BWP_DownlinkDedicated_t *configure_initial_dl_bwp(const NR_ServingCell
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NR_BWP_t *genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
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NR_BWP_t *genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
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int bwp_size = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
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int bwp_size = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
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int bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
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int bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
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NR_ControlResourceSet_t *coreset = get_coreset_config(0, bwp_start, bwp_size, bitmap);
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NR_ControlResourceSet_t *coreset = get_coreset_config(0, 0, 0, bwp_start, bwp_size, bitmap);
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asn1cSeqAdd(&pdcch_Config->controlResourceSetToAddModList->list, coreset);
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asn1cSeqAdd(&pdcch_Config->controlResourceSetToAddModList->list, coreset);
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int css_num_agg_level_candidates[NUM_PDCCH_AGG_LEVELS];
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int css_num_agg_level_candidates[NUM_PDCCH_AGG_LEVELS];
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@@ -68,7 +68,7 @@ NR_BCCH_BCH_Message_t *get_new_MIB_NR(const NR_ServingCellConfigCommon_t *scc);
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void free_MIB_NR(NR_BCCH_BCH_Message_t *mib);
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void free_MIB_NR(NR_BCCH_BCH_Message_t *mib);
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int encode_MIB_NR(NR_BCCH_BCH_Message_t *mib, int frame, uint8_t *buf, int buf_size);
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int encode_MIB_NR(NR_BCCH_BCH_Message_t *mib, int frame, uint8_t *buf, int buf_size);
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int encode_MIB_NR_setup(NR_MIB_t *mib, int frame, uint8_t *buf, int buf_size);
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int encode_MIB_NR_setup(NR_MIB_t *mib, int frame, uint8_t *buf, int buf_size);
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void configure_coreset_for_mux23(const NR_ServingCellConfigCommon_t *scc, int offset, int limit, int bwp_start, int bwp_size);
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struct NR_MeasurementTimingConfiguration;
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struct NR_MeasurementTimingConfiguration;
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struct NR_MeasurementTimingConfiguration *get_new_MeasurementTimingConfiguration(const NR_ServingCellConfigCommon_t *scc);
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struct NR_MeasurementTimingConfiguration *get_new_MeasurementTimingConfiguration(const NR_ServingCellConfigCommon_t *scc);
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int encode_MeasurementTimingConfiguration(const struct NR_MeasurementTimingConfiguration *mtc, uint8_t *buf, int buf_len);
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int encode_MeasurementTimingConfiguration(const struct NR_MeasurementTimingConfiguration *mtc, uint8_t *buf, int buf_len);
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