diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 236913d3f8..fc09f23bd6 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -189,7 +189,7 @@ void nr_dlsim_preprocessor(module_id_t module_id, /* the following might override the table that is mandated by RRC * configuration */ current_BWP->mcsTableIdx = g_mcsTableIdx; - sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot); + sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], slot); AssertFatal(sched_pdsch->time_domain_allocation >= 0,"Unable to find PDSCH time domain allocation in list\n"); sched_pdsch->tda_info = get_dl_tda_info(current_BWP, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 5ac48f1374..e2e4139c34 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -1455,7 +1455,7 @@ static void nr_generate_Msg2(module_id_t module_idP, AssertFatal(coreset, "Coreset cannot be null for RA-Msg2\n"); const int coresetid = coreset->controlResourceSetId; // Calculate number of symbols - int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP); + int time_domain_assignment = get_dl_tda(nr_mac, slotP); int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1; NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, @@ -2031,7 +2031,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP, return; } - uint8_t time_domain_assignment = get_dl_tda(nr_mac, scc, slotP); + uint8_t time_domain_assignment = get_dl_tda(nr_mac, slotP); int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1; NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 48a72b527b..c890d6b32b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -52,20 +52,22 @@ #define WORD 32 //#define SIZE_OF_POINTER sizeof (void *) -int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot) +int get_dl_tda(const gNB_MAC_INST *nrmac, int slot) { /* we assume that this function is mutex-protected from outside */ - const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - AssertFatal(tdd || nrmac->common_channels->frame_type == FDD, "Dynamic TDD not handled yet\n"); + const frame_structure_t *fs = &nrmac->frame_structure; // Use special TDA in case of CSI-RS - if(nrmac->UE_info.sched_csirs > 0) + if (nrmac->UE_info.sched_csirs > 0) return 1; - if (tdd && tdd->nrofDownlinkSymbols > 1) { // if there is a mixed slot where we can transmit DL - const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + 1; - if ((slot % nr_slots_period) == tdd->nrofDownlinkSlots) + if (fs->is_tdd) { + int s = get_slot_idx_in_period(slot, fs); + // if there is a mixed slot where we can transmit DL + const tdd_bitmap_t *tdd_slot_bitmap = fs->period_cfg.tdd_slot_bitmap; + if (tdd_slot_bitmap[s].num_dl_symbols > 1 && (tdd_slot_bitmap[s].slot_type == TDD_NR_MIXED_SLOT)) { return 2; + } } return 0; // if FDD or not mixed slot in TDD, for now use default TDA } @@ -447,7 +449,7 @@ static bool allocate_dl_retransmission(module_id_t module_id, int pm_index = (curInfo->nrOfLayers < retInfo->nrOfLayers) ? curInfo->pm_index : retInfo->pm_index; const int coresetid = sched_ctrl->coreset->controlResourceSetId; - const int tda = get_dl_tda(nr_mac, scc, slot); + const int tda = get_dl_tda(nr_mac, slot); AssertFatal(tda >= 0,"Unable to find PDSCH time domain allocation in list\n"); /* Check first whether the old TDA can be reused @@ -761,7 +763,7 @@ static void pf_dl(module_id_t module_id, sched_pdsch->dl_harq_pid = sched_ctrl->available_dl_harq.head; /* MCS has been set above */ - sched_pdsch->time_domain_allocation = get_dl_tda(mac, scc, slot); + sched_pdsch->time_domain_allocation = get_dl_tda(mac, slot); AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n"); const int coresetid = sched_ctrl->coreset->controlResourceSetId; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 26cffef6ac..62cd6ce5a1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -66,7 +66,7 @@ void nr_preprocessor_phytest(module_id_t module_id, return; } - const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot); + const int tda = get_dl_tda(RC.nrmac[module_id], slot); NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, tda, @@ -244,7 +244,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, TYPE_C_RNTI_); - const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot); + const int temp_tda = get_ul_tda(nr_mac, frame, slot); if (temp_tda < 0) return false; AssertFatal(temp_tda < tdaList->list.count, @@ -254,7 +254,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ int K2 = get_K2(tdaList, temp_tda, mu, scc); const int sched_frame = (frame + (slot + K2) / nr_slots_per_frame[mu]) % MAX_FRAME_NUMBER; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; - const int tda = get_ul_tda(nr_mac, scc, sched_frame, sched_slot); + const int tda = get_ul_tda(nr_mac, sched_frame, sched_slot); if (tda < 0) return false; AssertFatal(tda < tdaList->list.count, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index afc8c7e6d9..6de3b61527 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -40,19 +40,22 @@ //#define SRS_IND_DEBUG -int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int frame, int slot) +int get_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot) { /* we assume that this function is mutex-protected from outside */ NR_SCHED_ENSURE_LOCKED(&nrmac->sched_lock); /* there is a mixed slot only when in TDD */ - const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - AssertFatal(tdd || nrmac->common_channels->frame_type == FDD, "Dynamic TDD not handled yet\n"); + frame_structure_t *fs = &nrmac->frame_structure; - if (tdd && tdd->nrofUplinkSymbols > 1) { // if there is uplink symbols in mixed slot - const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + 1; - if ((slot % nr_slots_period) == tdd->nrofDownlinkSlots) + if (fs->is_tdd) { + // if there is uplink symbols in mixed slot + int s = get_slot_idx_in_period(slot, fs); + tdd_bitmap_t *tdd_slot_bitmap = fs->period_cfg.tdd_slot_bitmap; + if ((tdd_slot_bitmap[s].num_ul_symbols > 1) + && (tdd_slot_bitmap[s].slot_type == TDD_NR_MIXED_SLOT)) { return 2; + } } // Avoid slots with the SRS @@ -1856,7 +1859,7 @@ static void pf_ul(module_id_t module_id, LOG_D(NR_MAC,"pf_ul: UE %04x harq_pid %d\n", UE->rnti, sched_pusch->ul_harq_pid); if (sched_pusch->ul_harq_pid >= 0) { /* Allocate retransmission*/ - const int tda = get_ul_tda(nrmac, scc, sched_frame, sched_slot); + const int tda = get_ul_tda(nrmac, sched_frame, sched_slot); bool r = allocate_ul_retransmission(nrmac, frame, slot, @@ -1933,7 +1936,7 @@ static void pf_ul(module_id_t module_id, } sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1; - sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_frame, sched_slot); + sched_pusch->time_domain_allocation = get_ul_tda(nrmac, sched_frame, sched_slot); sched_pusch->tda_info = get_ul_tda_info(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, @@ -2090,7 +2093,7 @@ static void pf_ul(module_id_t module_id, sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1; - sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_frame, sched_slot); + sched_pusch->time_domain_allocation = get_ul_tda(nrmac, sched_frame, sched_slot); sched_pusch->tda_info = get_ul_tda_info(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 7ecb7925e9..5602cc2f80 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -417,8 +417,8 @@ void set_sched_pucch_list(NR_UE_sched_ctrl_t *sched_ctrl, const NR_ServingCellConfigCommon_t *scc); void free_sched_pucch_list(NR_UE_sched_ctrl_t *sched_ctrl); -int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot); -int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int frame, int slot); +int get_dl_tda(const gNB_MAC_INST *nrmac, int slot); +int get_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot); int get_cce_index(const gNB_MAC_INST *nrmac, const int CC_id,