From 18b12187791c83b9578ef14023bd125dfe579402 Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 4 Mar 2021 14:32:41 +0100 Subject: [PATCH] reworking of MAC functions to schedule SSBs, including VRB map occupation and get_type0_PDCCH_CSS_config_parameters --- openair1/PHY/NR_TRANSPORT/nr_dci.c | 5 +- openair2/LAYER2/NR_MAC_COMMON/nr_mac.h | 8 - openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 96 ++-- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h | 15 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 17 +- openair2/LAYER2/NR_MAC_gNB/config.c | 13 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 417 +++++++++++------- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 4 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 5 +- 9 files changed, 337 insertions(+), 243 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 469415908f..665ec8187f 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -30,7 +30,7 @@ * \warning */ -#include + #include "nr_dci.h" #include "nr_dlsch.h" #include "nr_sch_dmrs.h" @@ -87,7 +87,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset); cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB; if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) { - cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB; + // TODO fix this using fapi structures + //cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB; } for (int d=0;dnumDlDci;d++) { diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h index 381dce11b2..10b31930de 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h @@ -418,14 +418,6 @@ typedef enum { NR_RNTI_MCS_C, } nr_rnti_type_t; -typedef enum subcarrier_spacing_e { - scs_15kHz = 0x1, - scs_30kHz = 0x2, - scs_60kHz = 0x4, - scs_120kHz = 0x8, - scs_240kHz = 0x16 -} subcarrier_spacing_t; - typedef enum channel_bandwidth_e { bw_5MHz = 0x1, bw_10MHz = 0x2, diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index 5d1b08bcf6..d04a06b956 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -3117,49 +3117,36 @@ uint32_t get_ssb_slot(uint32_t ssb_index){ // return first_symbol(case, freq, ssb_index) / 14 } -int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, - NR_MIB_t *mib, - uint8_t extra_bits, - uint32_t ssb_length, - uint32_t ssb_index, - uint32_t ssb_offset_point_a) { +void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, + frame_t frameP, + NR_MIB_t *mib, + uint8_t num_slot_per_frame, + uint8_t ssb_subcarrier_offset, + NR_SubcarrierSpacing_t scs_ssb, + frequency_range_t frequency_range, + uint32_t ssb_index, + uint32_t ssb_offset_point_a) { - // deafult for testing - subcarrier_spacing_t scs_ssb = scs_30kHz; - channel_bandwidth_t min_channel_bw = bw_10MHz; - frequency_range_t frequency_range = FR1; - const uint32_t num_slot_per_frame = 20; + NR_SubcarrierSpacing_t scs_pdcch; + + channel_bandwidth_t min_channel_bw = bw_10MHz; // TODO remove hardcoding and implement Table 5.3.5-1 in 38.104 + + if (frequency_range == FR2) { + if(mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60) + scs_pdcch = NR_SubcarrierSpacing_kHz60; + else + scs_pdcch = NR_SubcarrierSpacing_kHz120; + } + else { + frequency_range = FR1; + if(mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60) + scs_pdcch = NR_SubcarrierSpacing_kHz15; + else + scs_pdcch = NR_SubcarrierSpacing_kHz30; + } - type0_PDCCH_CSS_config->ssb_length = ssb_length; type0_PDCCH_CSS_config->ssb_index = ssb_index; - type0_PDCCH_CSS_config->frame = (mib->systemFrameNumber.buf[0] >> mib->systemFrameNumber.bits_unused); - - uint16_t frame_number_4lsb = 0; - for (int i=0; i<4; i++) { - frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i); - } - - uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] - uint8_t ssb_subcarrier_offset = (uint8_t)mib->ssb_SubcarrierOffset; - - type0_PDCCH_CSS_config->frame = type0_PDCCH_CSS_config->frame << 4; - type0_PDCCH_CSS_config->frame = type0_PDCCH_CSS_config->frame | frame_number_4lsb; - - if(type0_PDCCH_CSS_config->ssb_length == 64){ - type0_PDCCH_CSS_config->ssb_index = type0_PDCCH_CSS_config->ssb_index & (( extra_bits >> 2 ) & 0x1C ); // { extra_bits[5:7], ssb_index[2:0] } - }else{ - if(ssb_subcarrier_offset_msb){ - ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10; - } - } - - // assume carrier frequency < 6GHz - subcarrier_spacing_t scs_pdcch; - if(mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){ - scs_pdcch = scs_15kHz; - }else{ //NR_MIB__subCarrierSpacingCommon_scs30or120 - scs_pdcch = scs_30kHz; - } + type0_PDCCH_CSS_config->frame = frameP; uint32_t is_condition_A = (ssb_subcarrier_offset == 0); // 38.213 ch.13 uint32_t index_4msb = (mib->pdcch_ConfigSIB1.controlResourceSetZero); @@ -3170,8 +3157,8 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC type0_PDCCH_CSS_config->rb_offset = -1; // type0-pdcch coreset - switch( (scs_ssb << 5) | scs_pdcch ){ - case (scs_15kHz << 5) | scs_15kHz : + switch( (scs_ssb << 3) | scs_pdcch ){ + case (NR_SubcarrierSpacing_kHz15 << 5) | NR_SubcarrierSpacing_kHz15: AssertFatal(index_4msb < 15, "38.213 Table 13-1 4 MSB out of range\n"); type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; type0_PDCCH_CSS_config->num_rbs = table_38213_13_1_c2[index_4msb]; @@ -3179,7 +3166,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC type0_PDCCH_CSS_config->rb_offset = table_38213_13_1_c4[index_4msb]; break; - case (scs_15kHz << 5) | scs_30kHz: + case (NR_SubcarrierSpacing_kHz15 << 3) | NR_SubcarrierSpacing_kHz30: AssertFatal(index_4msb < 14, "38.213 Table 13-2 4 MSB out of range\n"); type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; type0_PDCCH_CSS_config->num_rbs = table_38213_13_2_c2[index_4msb]; @@ -3187,7 +3174,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC type0_PDCCH_CSS_config->rb_offset = table_38213_13_2_c4[index_4msb]; break; - case (scs_30kHz << 5) | scs_15kHz: + case (NR_SubcarrierSpacing_kHz30 << 3) | NR_SubcarrierSpacing_kHz15: if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ AssertFatal(index_4msb < 9, "38.213 Table 13-3 4 MSB out of range\n"); type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; @@ -3204,7 +3191,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC break; - case (scs_30kHz << 5) | scs_30kHz: + case (NR_SubcarrierSpacing_kHz30 << 3) | NR_SubcarrierSpacing_kHz30: if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){ type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; type0_PDCCH_CSS_config->num_rbs = table_38213_13_4_c2[index_4msb]; @@ -3220,7 +3207,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC }else{ ; } break; - case (scs_120kHz << 5) | scs_60kHz: + case (NR_SubcarrierSpacing_kHz120 << 3) | NR_SubcarrierSpacing_kHz60: AssertFatal(index_4msb < 12, "38.213 Table 13-7 4 MSB out of range\n"); if(index_4msb & 0x7){ type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; @@ -3237,7 +3224,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC } break; - case (scs_120kHz << 5) | scs_120kHz: + case (NR_SubcarrierSpacing_kHz120 << 3) | NR_SubcarrierSpacing_kHz120: AssertFatal(index_4msb < 8, "38.213 Table 13-8 4 MSB out of range\n"); if(index_4msb & 0x3){ type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; @@ -3254,7 +3241,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC } break; - case (scs_240kHz << 5) | scs_60kHz: + case (NR_SubcarrierSpacing_kHz240 << 3) | NR_SubcarrierSpacing_kHz60: AssertFatal(index_4msb < 4, "38.213 Table 13-9 4 MSB out of range\n"); type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; type0_PDCCH_CSS_config->num_rbs = table_38213_13_9_c2[index_4msb]; @@ -3262,7 +3249,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC type0_PDCCH_CSS_config->rb_offset = table_38213_13_9_c4[index_4msb]; break; - case (scs_240kHz << 5) | scs_120kHz: + case (NR_SubcarrierSpacing_kHz240 << 3) | NR_SubcarrierSpacing_kHz120: AssertFatal(index_4msb < 8, "38.213 Table 13-10 4 MSB out of range\n"); if(index_4msb & 0x3){ type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1; @@ -3333,7 +3320,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC type0_PDCCH_CSS_config->number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb]; big_m = table_38213_13_11_c3[index_4lsb]; - uint32_t temp = (uint32_t)(big_o*scs_pdcch) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m); + uint32_t temp = (uint32_t)(big_o*(1<ssb_index*big_m); type0_PDCCH_CSS_config->n_c = temp / num_slot_per_frame; if((temp/num_slot_per_frame) & 0x1){ type0_PDCCH_CSS_config->sfn_c = SFN_C_MOD_2_EQ_1; @@ -3369,7 +3356,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC /// MUX PATTERN 2 if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 2){ - if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_60kHz)){ + if((scs_ssb == NR_SubcarrierSpacing_kHz120) && (scs_pdcch == NR_SubcarrierSpacing_kHz60)){ // 38.213 Table 13-13 AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n"); // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot @@ -3391,7 +3378,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC default: break; } - }else if((scs_ssb == scs_240kHz) && (scs_pdcch == scs_120kHz)){ + }else if((scs_ssb == NR_SubcarrierSpacing_kHz240) && (scs_pdcch == NR_SubcarrierSpacing_kHz120)){ // 38.213 Table 13-14 AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n"); // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot @@ -3433,7 +3420,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC /// MUX PATTERN 3 if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 3){ - if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_120kHz)){ + if((scs_ssb == NR_SubcarrierSpacing_kHz120) && (scs_pdcch == NR_SubcarrierSpacing_kHz120)){ // 38.213 Table 13-15 AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n"); // PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot @@ -3475,8 +3462,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC AssertFatal(type0_PDCCH_CSS_config->sfn_c!=SFN_C_IMPOSSIBLE,""); AssertFatal(type0_PDCCH_CSS_config->n_c!=UINT_MAX,""); - type0_PDCCH_CSS_config->n_0 = ((uint32_t)(big_o*scs_pdcch) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m))%num_slot_per_frame; + type0_PDCCH_CSS_config->n_0 = ((uint32_t)(big_o*(1<ssb_index*big_m))%num_slot_per_frame; type0_PDCCH_CSS_config->cset_start_rb = ssb_offset_point_a - type0_PDCCH_CSS_config->rb_offset; - return 0; } diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h index 087d316567..77e572c128 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h @@ -126,12 +126,15 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table); uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB); -int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, - NR_MIB_t *mib, - uint8_t extra_bits, - uint32_t ssb_length, - uint32_t ssb_index, - uint32_t ssb_offset_point_a); +void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, + frame_t frameP, + NR_MIB_t *mib, + uint8_t num_slot_per_frame, + uint8_t ssb_subcarrier_offset, + NR_SubcarrierSpacing_t scs_ssb, + frequency_range_t frequency_range, + uint32_t ssb_index, + uint32_t ssb_offset_point_a); int16_t get_N_RA_RB (int delta_f_RA_PRACH,int delta_f_PUSCH); diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 64067e9d60..e2bedd8163 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -104,7 +104,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id, LOG_I(MAC,"[L2][MAC] decode mib\n"); NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); - + frequency_range_t frequency_range; nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n"); @@ -120,9 +120,11 @@ int8_t nr_ue_decode_mib(module_id_t module_id, frame = frame << 4; frame = frame | frame_number_4lsb; if(ssb_length == 64){ + frequency_range = FR2; for (int i=0; i<3; i++) ssb_index += (((extra_bits>>(7-i))&0x01)<<(3+i)); }else{ + frequency_range = FR1; if(ssb_subcarrier_offset_msb){ ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10; } @@ -141,10 +143,19 @@ int8_t nr_ue_decode_mib(module_id_t module_id, //storing ssb index in the mac structure mac->mib_ssb = ssb_index; - get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config, mac->mib, extra_bits, ssb_length, ssb_index, + // TODO fix this (it shouldn't be taken from config) + uint8_t scs_ssb = mac->phy_config.config_req.ssb_config.scs_common; + + get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config, + frame, + mac->mib, + nr_slots_per_frame[scs_ssb], + ssb_subcarrier_offset, + scs_ssb, + frequency_range, + ssb_index, mac->phy_config.config_req.ssb_table.ssb_offset_point_a); - ssb_index = mac->type0_PDCCH_CSS_config.ssb_index; // TODO: ssb_index should obtain from L1 in case Lssb != 64 mac->type0_pdcch_ss_mux_pattern = mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern; mac->type0_pdcch_ss_sfn_c = mac->type0_PDCCH_CSS_config.sfn_c; mac->type0_pdcch_ss_n_c = mac->type0_PDCCH_CSS_config.n_c; diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index bce0719556..7d2f849749 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -54,7 +54,7 @@ extern RAN_CONTEXT_t RC; extern void mac_top_init_gNB(void); extern uint8_t nfapi_mode; -void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) { +void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) { nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[Mod_idP]->config[0]; RC.nrmac[Mod_idP]->common_channels[0].ServingCellConfigCommon = scc; @@ -241,6 +241,9 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm cfg->ssb_table.ssb_period.value = *scc->ssb_periodicityServingCell; cfg->ssb_table.ssb_period.tl.tag = NFAPI_NR_CONFIG_SSB_PERIOD_TAG; cfg->num_tlv++; + cfg->ssb_table.ssb_subcarrier_offset.value = ssb_SubcarrierOffset; + cfg->ssb_table.ssb_subcarrier_offset.tl.tag = NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG; + cfg->num_tlv++; switch (scc->ssb_PositionsInBurst->present) { case 1 : @@ -362,6 +365,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n"); config_common(Mod_idP, + ssb_SubcarrierOffset, pdsch_AntennaPorts, scc); LOG_E(MAC, "%s() %s:%d RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req:%p\n", __FUNCTION__, __FILE__, __LINE__, RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req); @@ -374,7 +378,8 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, printf("Waiting for PHY_config_req\n"); } } - + + RC.nrmac[Mod_idP]->ssb_SubcarrierOffset = ssb_SubcarrierOffset; RC.nrmac[Mod_idP]->pusch_target_snrx10 = pusch_tgt_snrx10; RC.nrmac[Mod_idP]->pucch_target_snrx10 = pucch_tgt_snrx10; NR_PHY_Config_t phycfg; @@ -382,10 +387,6 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, phycfg.CC_id = 0; phycfg.cfg = &RC.nrmac[Mod_idP]->config[0]; - phycfg.cfg->ssb_table.ssb_subcarrier_offset.value = ssb_SubcarrierOffset; - phycfg.cfg->ssb_table.ssb_subcarrier_offset.tl.tag = NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG; - phycfg.cfg->num_tlv++; - if (RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req) RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req(&phycfg); find_SSB_and_RO_available(Mod_idP); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 1de46aaea4..6bd68b0300 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -55,24 +55,36 @@ extern RAN_CONTEXT_t RC; extern uint8_t SSB_Table[38]; -void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, uint8_t slots_per_frame){ +// start symbols for SSB types A,B,C,D,E +uint16_t symbol_ssb_AC[8]={2,8,16,22,30,36,44,50}; +uint16_t symbol_ssb_BD[64]={4,8,16,20,32,36,44,48,60,64,72,76,88,92,100,104,144,148,156,160,172,176,184,188,200,204,212,216,228,232,240,244,284,288, + 296,300,312,316,324,328,340,344,352,356,368,372,380,384,424,428,436,440,452,456,464,468,480,484,492,496,508,512,520,524}; +uint16_t symbol_ssb_E[64]={8,12,16,20,32,36,40,44,64,68,72,76,88,92,96,100,120,124,128,132,144,148,152,156,176,180,184,188,200,204,208,212,288,292, + 296,300,312,316,320,324,344,348,352,356,368,372,376,380,400,404,408,412,424,428,432,436,456,460,464,468,480,484,488,492}; - gNB_MAC_INST *gNB = RC.nrmac[module_idP]; - NR_COMMON_channels_t *cc; - - nfapi_nr_dl_tti_request_t *dl_tti_request; - nfapi_nr_dl_tti_request_body_t *dl_req; - nfapi_nr_dl_tti_request_pdu_t *dl_config_pdu; +uint16_t get_ssb_start_symbol(const long band, NR_SubcarrierSpacing_t scs, int i_ssb) { - int mib_sdu_length; - int CC_id; + switch (scs) { + case NR_SubcarrierSpacing_kHz15: + return symbol_ssb_AC[i_ssb]; //type A + case NR_SubcarrierSpacing_kHz30: + if (band == 5 || band == 66) + return symbol_ssb_BD[i_ssb]; //type B + else + return symbol_ssb_AC[i_ssb]; //type C + case NR_SubcarrierSpacing_kHz120: + return symbol_ssb_BD[i_ssb]; //type D + case NR_SubcarrierSpacing_kHz240: + return symbol_ssb_E[i_ssb]; + default: + AssertFatal(1 == 0, "SCS %ld not allowed for SSB \n",scs); + } +} - for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { - cc = &gNB->common_channels[CC_id]; - const long band = *cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]; - const uint32_t ssb_offset0 = *cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB - cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA; - int ratio; - switch (*cc->ServingCellConfigCommon->ssbSubcarrierSpacing) { +uint16_t get_ssboffset_pointa(NR_ServingCellConfigCommon_t *scc,const long band) { + + int ratio; + switch (*scc->ssbSubcarrierSpacing) { case NR_SubcarrierSpacing_kHz15: AssertFatal(band <= 79, "Band %ld is not possible for SSB with 15 kHz SCS\n", @@ -105,133 +117,210 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, break; default: AssertFatal(1 == 0, "SCS %ld not allowed for SSB \n", - *cc->ServingCellConfigCommon->ssbSubcarrierSpacing); - } + *scc->ssbSubcarrierSpacing); + } - // scheduling MIB every 8 frames, PHY repeats it in between + const uint32_t ssb_offset0 = *scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA; + + return (ssb_offset0/(ratio*12) - 10); // absoluteFrequencySSB is the center of SSB + +} + + +void schedule_ssb(NR_ServingCellConfigCommon_t *scc, nfapi_nr_dl_tti_request_body_t *dl_req, int i_ssb, uint8_t scoffset, uint16_t offset_pointa, uint32_t payload) { + + nfapi_nr_dl_tti_request_pdu_t *dl_config_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; + memset((void *) dl_config_pdu, 0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); + dl_config_pdu->PDUType = NFAPI_NR_DL_TTI_SSB_PDU_TYPE; + dl_config_pdu->PDUSize =2 + sizeof(nfapi_nr_dl_tti_ssb_pdu_rel15_t); + + AssertFatal(scc->physCellId!=NULL,"ServingCellConfigCommon->physCellId is null\n"); + dl_config_pdu->ssb_pdu.ssb_pdu_rel15.PhysCellId = *scc->physCellId; + dl_config_pdu->ssb_pdu.ssb_pdu_rel15.BetaPss = 0; + dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = i_ssb; + AssertFatal(scc->downlinkConfigCommon!=NULL,"scc->downlinkConfigCommonL is null\n"); + AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL is null\n"); + AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB is null\n"); + AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count==1,"Frequency Band list does not have 1 element (%d)\n", + scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count); + AssertFatal(scc->ssbSubcarrierSpacing,"ssbSubcarrierSpacing is null\n"); + AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],"band is null\n"); + + dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset = scoffset; //kSSB + dl_config_pdu->ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA = offset_pointa; + dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag = 1; + dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload = payload; + dl_req->nPDUs++; + +} + +void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, uint8_t slots_per_frame){ + + gNB_MAC_INST *gNB = RC.nrmac[module_idP]; + NR_COMMON_channels_t *cc; + + gNB->num_css_config = 0; + + nfapi_nr_dl_tti_request_t *dl_tti_request; + nfapi_nr_dl_tti_request_body_t *dl_req; + NR_MIB_t *mib = RC.nrrrc[module_idP]->carrier.mib.message.choice.mib; + + int mib_sdu_length; + int CC_id; + + for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { + cc = &gNB->common_channels[CC_id]; + NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; + + dl_tti_request = &gNB->DL_req[CC_id]; + dl_req = &dl_tti_request->dl_tti_request_body; + + // get MIB every 8 frames if((slotP == 0) && (frameP & 7) == 0) { - dl_tti_request = &gNB->DL_req[CC_id]; - dl_req = &dl_tti_request->dl_tti_request_body; mib_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, MIBCH, 1, &cc->MIB_pdu.payload[0]); - LOG_D(MAC, "Frame %d, slot %d: BCH PDU length %d\n", frameP, slotP, mib_sdu_length); - - if (mib_sdu_length > 0) { - LOG_D(MAC, - "Frame %d, slot %d: Adding BCH PDU in position %d (length %d)\n", - frameP, - slotP, - dl_req->nPDUs, - mib_sdu_length); - - if ((frameP & 1023) < 80){ - LOG_D(MAC, - "[gNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes\n", - module_idP, - frameP, - CC_id, - mib_sdu_length); - } - - dl_config_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; - memset((void *) dl_config_pdu, 0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); - dl_config_pdu->PDUType = NFAPI_NR_DL_TTI_SSB_PDU_TYPE; - dl_config_pdu->PDUSize =2 + sizeof(nfapi_nr_dl_tti_ssb_pdu_rel15_t); - - AssertFatal(cc->ServingCellConfigCommon->physCellId!=NULL,"cc->ServingCellConfigCommon->physCellId is null\n"); - dl_config_pdu->ssb_pdu.ssb_pdu_rel15.PhysCellId = *cc->ServingCellConfigCommon->physCellId; - dl_config_pdu->ssb_pdu.ssb_pdu_rel15.BetaPss = 0; - dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = 0; - AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon!=NULL,"scc->downlinkConfigCommonL is null\n"); - AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL is null\n"); - AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB is null\n"); - AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count==1,"Frequency Band list does not have 1 element (%d)\n",cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count); - AssertFatal(cc->ServingCellConfigCommon->ssbSubcarrierSpacing,"ssbSubcarrierSpacing is null\n"); - AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],"band is null\n"); - - const nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0]; - dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset = cfg->ssb_table.ssb_subcarrier_offset.value; //kSSB - dl_config_pdu->ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA = ssb_offset0/(ratio*12) - 10; // absoluteFrequencySSB is the center of SSB - dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag = 1; - dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload = (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1); - dl_req->nPDUs++; - } - - // Get type0_PDCCH_CSS_config parameters - NR_DL_FRAME_PARMS *frame_parms = &RC.gNB[module_idP]->frame_parms; - NR_MIB_t *mib = RC.nrrrc[module_idP]->carrier.mib.message.choice.mib; - uint8_t gNB_xtra_byte = 0; - for (int i = 0; i < 8; i++) { - gNB_xtra_byte |= ((RC.gNB[module_idP]->pbch.pbch_a >> (31 - i)) & 1) << (7 - i); - } - get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config, mib, gNB_xtra_byte, frame_parms->Lmax, - frame_parms->ssb_index, frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB); - + LOG_I(MAC, + "[gNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes\n", + module_idP, + frameP, + CC_id, + mib_sdu_length); } - // checking if there is any SSB in slot - const int abs_slot = (slots_per_frame * frameP) + slotP; - const int slot_per_period = (slots_per_frame>>1)<<(*cc->ServingCellConfigCommon->ssb_periodicityServingCell); - int eff_120_slot; - const BIT_STRING_t *shortBitmap = &cc->ServingCellConfigCommon->ssb_PositionsInBurst->choice.shortBitmap; - const BIT_STRING_t *mediumBitmap = &cc->ServingCellConfigCommon->ssb_PositionsInBurst->choice.mediumBitmap; - const BIT_STRING_t *longBitmap = &cc->ServingCellConfigCommon->ssb_PositionsInBurst->choice.longBitmap; - uint8_t buf = 0; - switch (cc->ServingCellConfigCommon->ssb_PositionsInBurst->present) { - case 1: - // presence of ssbs possible in the first 2 slots of ssb period - if ((abs_slot % slot_per_period) < 2 && - (((shortBitmap->buf[0]) >> (6 - (slotP << 1))) & 3) != 0) - fill_ssb_vrb_map(cc, (ssb_offset0 / (ratio * 12) - 10), CC_id); - break; - case 2: - // presence of ssbs possible in the first 4 slots of ssb period - if ((abs_slot % slot_per_period) < 4 && - (((mediumBitmap->buf[0]) >> (6 - (slotP << 1))) & 3) != 0) - fill_ssb_vrb_map(cc, (ssb_offset0 / (ratio * 12) - 10), CC_id); - break; - case 3: - AssertFatal(*cc->ServingCellConfigCommon->ssbSubcarrierSpacing == - NR_SubcarrierSpacing_kHz120, - "240kHZ subcarrier spacing currently not supported for SSBs\n"); - if ((abs_slot % slot_per_period) < 8) { - eff_120_slot = slotP; - buf = longBitmap->buf[0]; - } else if ((abs_slot % slot_per_period) < 17) { - eff_120_slot = slotP - 9; - buf = longBitmap->buf[1]; - } else if ((abs_slot % slot_per_period) < 26) { - eff_120_slot = slotP - 18; - buf = longBitmap->buf[2]; - } else if ((abs_slot % slot_per_period) < 35) { - eff_120_slot = slotP - 27; - buf = longBitmap->buf[3]; - } - if (((buf >> (6 - (eff_120_slot << 1))) & 3) != 0) - fill_ssb_vrb_map(cc, ssb_offset0 / (ratio * 12) - 10, CC_id); - break; - default: - AssertFatal(0, - "SSB bitmap size value %d undefined (allowed values 1,2,3)\n", - cc->ServingCellConfigCommon->ssb_PositionsInBurst->present); + int8_t ssb_period = *scc->ssb_periodicityServingCell; + uint8_t ssb_frame_periodicity = 1; // every how many frames SSB are generated + + if (ssb_period > 1) // 0 is every half frame + ssb_frame_periodicity = 1 << (ssb_period -1); + + if (!(frameP%ssb_frame_periodicity) && + ((slotP<(slots_per_frame>>1)) || (ssb_period == 0))) { + // schedule SSB only for given frames according to SSB periodicity + // and in first half frame unless periodicity of 5ms + int rel_slot; + if (ssb_period == 0) // scheduling every half frame + rel_slot = slotP%(slots_per_frame>>1); + else + rel_slot = slotP; + + NR_SubcarrierSpacing_t scs = *scc->ssbSubcarrierSpacing; + const long band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]; + uint16_t offset_pointa = get_ssboffset_pointa(scc,band); + uint8_t ssbSubcarrierOffset = gNB->ssb_SubcarrierOffset; + + const BIT_STRING_t *shortBitmap = &scc->ssb_PositionsInBurst->choice.shortBitmap; + const BIT_STRING_t *mediumBitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap; + const BIT_STRING_t *longBitmap = &scc->ssb_PositionsInBurst->choice.longBitmap; + + uint16_t ssb_start_symbol; + + switch (scc->ssb_PositionsInBurst->present) { + case 1: + // short bitmap (<3GHz) max 4 SSBs + for (int i_ssb=0; i_ssb<4; i_ssb++) { + if ((shortBitmap->buf[0]>>(7-i_ssb))&0x01) { + ssb_start_symbol = get_ssb_start_symbol(band,scs,i_ssb); + // if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters + if ((ssb_start_symbol/14) == rel_slot){ + schedule_ssb(scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1)); + fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id); + if (get_softmodem_params()->sa == 1) { + get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[gNB->num_css_config], + frameP, + mib, + slots_per_frame, + ssbSubcarrierOffset, + scs, + FR1, + i_ssb, + offset_pointa); + gNB->num_css_config++; + } + } + } + } + break; + case 2: + // medium bitmap (<6GHz) max 8 SSBs + for (int i_ssb=0; i_ssb<8; i_ssb++) { + if ((mediumBitmap->buf[0]>>(7-i_ssb))&0x01) { + ssb_start_symbol = get_ssb_start_symbol(band,scs,i_ssb); + // if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters + if ((ssb_start_symbol/14) == rel_slot){ + schedule_ssb(scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1)); + fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id); + if (get_softmodem_params()->sa == 1) { + get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[gNB->num_css_config], + frameP, + mib, + slots_per_frame, + ssbSubcarrierOffset, + scs, + FR1, + i_ssb, + offset_pointa); + gNB->num_css_config++; + } + } + } + } + break; + case 3: + // long bitmap FR2 max 64 SSBs + for (int i_ssb=0; i_ssb<63; i_ssb++) { + if ((longBitmap->buf[i_ssb/8]>>(7-i_ssb))&0x01) { + ssb_start_symbol = get_ssb_start_symbol(band,scs,i_ssb); + // if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters + if ((ssb_start_symbol/14) == rel_slot){ + schedule_ssb(scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1)); + fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id); + if (get_softmodem_params()->sa == 1) { + get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[gNB->num_css_config], + frameP, + mib, + slots_per_frame, + ssbSubcarrierOffset, + scs, + FR2, + i_ssb, + offset_pointa); + gNB->num_css_config++; + } + } + } + } + break; + default: + AssertFatal(0,"SSB bitmap size value %d undefined (allowed values 1,2,3)\n", + scc->ssb_PositionsInBurst->present); + } } } } + void schedule_nr_SI(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) { //---------------------------------------- } -void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, int CC_id) { +void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, uint16_t symStart, int CC_id) { + + AssertFatal(*cc->ServingCellConfigCommon->ssbSubcarrierSpacing != + NR_SubcarrierSpacing_kHz240, + "240kHZ subcarrier won't work with current VRB map because a single SSB might be across 2 slots\n"); + uint16_t *vrb_map = cc[CC_id].vrb_map; + for (int rb = 0; rb < 20; rb++) - vrb_map[rbStart + rb] = 1; + vrb_map[rbStart + rb] = 15<type0_PDCCH_CSS_config.num_rbs; - int rbStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb; + const uint16_t bwpSize = type0_PDCCH_CSS_config->num_rbs; + int rbStart = type0_PDCCH_CSS_config->cset_start_rb; // Calculate number of symbols struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; @@ -322,6 +411,7 @@ void schedule_control_sib1(module_id_t module_id, void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, nfapi_nr_dl_tti_request_body_t *dl_req, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, uint32_t TBS, int StartSymbolIndex, int NrOfSymbols) { @@ -357,8 +447,8 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, pdsch_pdu_rel15->rnti = SI_RNTI; pdsch_pdu_rel15->pduIndex = gNB_mac->pdu_index[0]++; - pdsch_pdu_rel15->BWPSize = gNB_mac->type0_PDCCH_CSS_config.num_rbs; - pdsch_pdu_rel15->BWPStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb; + pdsch_pdu_rel15->BWPSize = type0_PDCCH_CSS_config->num_rbs; + pdsch_pdu_rel15->BWPStart = type0_PDCCH_CSS_config->cset_start_rb; pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing; if (bwp->bwp_Common->genericParameters.cyclicPrefix) { @@ -415,7 +505,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, // frequency domain assignment dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0( - pdsch_pdu_rel15->rbSize, pdsch_pdu_rel15->rbStart, gNB_mac->type0_PDCCH_CSS_config.num_rbs); + pdsch_pdu_rel15->rbSize, pdsch_pdu_rel15->rbStart, type0_PDCCH_CSS_config->num_rbs); dci_payload.time_domain_assignment.val = gNB_mac->sched_ctrlCommon->time_domain_allocation; dci_payload.mcs = gNB_mac->sched_ctrlCommon->mcs; @@ -470,51 +560,56 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP]; - if( (frameP%2 == gNB_mac->type0_PDCCH_CSS_config.sfn_c) && (slotP == gNB_mac->type0_PDCCH_CSS_config.n_0) && (gNB_mac->type0_PDCCH_CSS_config.num_rbs > 0) ) { + for (int i=0; inum_css_config; i++) { - LOG_D(MAC,"> SIB1 transmission\n"); + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[i]; + if( (frameP%2 == type0_PDCCH_CSS_config->sfn_c) && (slotP == type0_PDCCH_CSS_config->n_0) && (type0_PDCCH_CSS_config->num_rbs > 0) ) { - // Get SIB1 - uint8_t sib1_payload[NR_MAX_SIB_LENGTH/8]; - uint8_t sib1_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, BCCH, 1, sib1_payload); - LOG_D(MAC,"sib1_sdu_length = %i\n", sib1_sdu_length); - LOG_D(MAC,"SIB1: \n"); - for (int i=0;i SIB1 transmission\n"); - // Configure sched_ctrlCommon for SIB1 - schedule_control_sib1(module_idP, CC_id, time_domain_allocation, mcsTableIdx, mcs, sib1_sdu_length); + // Get SIB1 + uint8_t sib1_payload[NR_MAX_SIB_LENGTH/8]; + uint8_t sib1_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, BCCH, 1, sib1_payload); + LOG_D(MAC,"sib1_sdu_length = %i\n", sib1_sdu_length); + LOG_D(MAC,"SIB1: \n"); + for (int i=0;isched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; - const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength; - SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); + // Configure sched_ctrlCommon for SIB1 + schedule_control_sib1(module_idP, CC_id, type0_PDCCH_CSS_config, time_domain_allocation, mcsTableIdx, mcs, sib1_sdu_length); - // Calculate number of PRB_DMRS - uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6; - uint16_t dlDmrsSymbPos = fill_dmrs_mask(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, startSymbolIndex+nrOfSymbols); - uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos); + // Calculate number of symbols + int startSymbolIndex, nrOfSymbols; + struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); - const uint32_t TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx), - nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx), - gNB_mac->sched_ctrlCommon->rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0 ,0 ,1 ) >> 3; + // Calculate number of PRB_DMRS + uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6; + uint16_t dlDmrsSymbPos = fill_dmrs_mask(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup, + gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, startSymbolIndex+nrOfSymbols); + uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos); - nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body; - nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, TBS, startSymbolIndex, nrOfSymbols); + const uint32_t TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx), + nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx), + gNB_mac->sched_ctrlCommon->rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0 ,0 ,1 ) >> 3; - const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs; - nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req]; + nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body; + nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols); - // Data to be transmitted - bzero(tx_req->TLVs[0].value.direct,MAX_NR_DLSCH_PAYLOAD_BYTES); - memcpy(tx_req->TLVs[0].value.direct, sib1_payload, sib1_sdu_length); + const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs; + nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req]; - tx_req->PDU_length = TBS; - tx_req->PDU_index = gNB_mac->pdu_index[0]++; - tx_req->num_TLV = 1; - tx_req->TLVs[0].length = TBS + 2; - gNB_mac->TX_req[CC_id].Number_of_PDUs++; - gNB_mac->TX_req[CC_id].SFN = frameP; - gNB_mac->TX_req[CC_id].Slot = slotP; + // Data to be transmitted + bzero(tx_req->TLVs[0].value.direct,MAX_NR_DLSCH_PAYLOAD_BYTES); + memcpy(tx_req->TLVs[0].value.direct, sib1_payload, sib1_sdu_length); + + tx_req->PDU_length = TBS; + tx_req->PDU_index = gNB_mac->pdu_index[0]++; + tx_req->num_TLV = 1; + tx_req->TLVs[0].length = TBS + 2; + gNB_mac->TX_req[CC_id].Number_of_PDUs++; + gNB_mac->TX_req[CC_id].SFN = frameP; + gNB_mac->TX_req[CC_id].Slot = slotP; + } } } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 3502a11580..ca19cc4904 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -41,6 +41,7 @@ void set_cset_offset(uint16_t); void mac_top_init_gNB(void); void config_common(int Mod_idP, + int ssb_SubcarrierOffset, int pdsch_AntennaPorts, NR_ServingCellConfigCommon_t *scc ); @@ -70,6 +71,7 @@ void nr_schedule_ue_spec(module_id_t module_id, void schedule_control_sib1(module_id_t module_id, int CC_id, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, int time_domain_allocation, uint8_t mcsTableIdx, uint8_t mcs, @@ -360,7 +362,7 @@ int binomial(int n, int k); bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot); -void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, int CC_id); +void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, uint16_t symStart, int CC_id); /* \brief Function to indicate a received SDU on ULSCH. diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 63587d58a4..7485b3715b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -536,6 +536,8 @@ typedef struct gNB_MAC_INST_s { int pusch_target_snrx10; /// Pucch target SNR int pucch_target_snrx10; + /// Subcarrier Offset + int ssb_SubcarrierOffset; /// Common cell resources NR_COMMON_channels_t common_channels[NFAPI_CC_MAX]; /// current PDU index (BCH,DLSCH) @@ -601,7 +603,8 @@ typedef struct gNB_MAC_INST_s { NR_UE_sched_ctrl_t *sched_ctrlCommon; NR_CellGroupConfig_t *secondaryCellGroupCommon; - NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config; + NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config[3]; + uint8_t num_css_config; } gNB_MAC_INST;