Merge remote-tracking branch 'origin/develop-nr' into shortBlockCoding

Conflicts:
	cmake_targets/CMakeLists.txt
	cmake_targets/autotests/test_case_list.xml
	cmake_targets/build_oai
	openair1/PHY/CODING/TESTBENCH/polartest.c
	openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
	openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
	openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
	openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
	openair1/PHY/CODING/nr_polar_init.c
	openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
	openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
	openair1/SIMULATION/NR_PHY/dlschsim.c
	openair1/SIMULATION/NR_PHY/dlsim.c
	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
This commit is contained in:
Raymond Knopp
2019-04-04 09:14:37 +02:00
167 changed files with 16740 additions and 8622 deletions
+1 -1
View File
@@ -361,7 +361,7 @@ typedef struct NRRrcConfigurationReq_s {
lte_prefix_type_t UL_BWP_prefix_type[MAX_NUM_CCs];
long UL_timeAlignmentTimerCommon[MAX_NUM_CCs];
long ServingCellConfigCommon_n_TimingAdvanceOffset[MAX_NUM_CCs];
long ServingCellConfigCommon_ssb_PositionsInBurst_PR[MAX_NUM_CCs];
uint64_t ServingCellConfigCommon_ssb_PositionsInBurst_PR[MAX_NUM_CCs];
long ServingCellConfigCommon_ssb_periodicityServingCell[MAX_NUM_CCs]; //ServingCellConfigCommon
long ServingCellConfigCommon_dmrs_TypeA_Position[MAX_NUM_CCs]; //ServingCellConfigCommon
long NIA_SubcarrierSpacing[MAX_NUM_CCs]; //ServingCellConfigCommon Used only for non-initial access
+18 -15
View File
@@ -103,7 +103,6 @@ void RCconfig_nr_flexran()
*UL_frequencyShift7p5khz, *UL_SCS_SubcarrierSpacing, *UL_BWP_SubcarrierSpacing,
*UL_BWP_prefix_type, *UL_timeAlignmentTimerCommon,
*ServingCellConfigCommon_n_TimingAdvanceOffset,
*ServingCellConfigCommon_ssb_PositionsInBurst_PR,
*NIA_SubcarrierSpacing, *referenceSubcarrierSpacing, *dl_UL_TransmissionPeriodicity,
*rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_choice,
*rach_groupBconfigured, *rach_messagePowerOffsetGroupB,
@@ -118,7 +117,7 @@ void RCconfig_nr_flexran()
*SearchSpace_searchSpaceType, *ue_Specific__dci_Formats,
*RateMatchPatternLTE_CRS_subframeAllocation_choice;
uint64_t downlink_frequency;
uint64_t downlink_frequency, ServingCellConfigCommon_ssb_PositionsInBurst_PR;
int32_t nr_band, uplink_frequency_offset, N_RB_DL, nb_antenna_ports,
MIB_subCarrierSpacingCommon, MIB_ssb_SubcarrierOffset, MIB_dmrs_TypeA_Position,
@@ -484,7 +483,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
char* UL_timeAlignmentTimerCommon = 0;
char* ServingCellConfigCommon_n_TimingAdvanceOffset = 0;
char* ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0;
uint64_t ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0;
int32_t ServingCellConfigCommon_ssb_periodicityServingCell = 0;
int32_t ServingCellConfigCommon_dmrs_TypeA_Position = 0;
char* NIA_SubcarrierSpacing = 0;
@@ -1125,19 +1124,23 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
RC.config_file_name, i, ServingCellConfigCommon_n_TimingAdvanceOffset);
}
if (strcmp(ServingCellConfigCommon_ssb_PositionsInBurst_PR,"shortBitmap")==0) {
NRRRC_CONFIGURATION_REQ (msg_p).ServingCellConfigCommon_ssb_PositionsInBurst_PR[j] = NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap;
}else if (strcmp(ServingCellConfigCommon_ssb_PositionsInBurst_PR,"mediumBitmap")==0) {
NRRRC_CONFIGURATION_REQ (msg_p).ServingCellConfigCommon_ssb_PositionsInBurst_PR[j] = NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap;
}else if (strcmp(ServingCellConfigCommon_ssb_PositionsInBurst_PR,"longBitmap")==0) {
NRRRC_CONFIGURATION_REQ (msg_p).ServingCellConfigCommon_ssb_PositionsInBurst_PR[j] = NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap;
}else if (strcmp(ServingCellConfigCommon_ssb_PositionsInBurst_PR,"NOTHING")==0) {
NRRRC_CONFIGURATION_REQ (msg_p).ServingCellConfigCommon_ssb_PositionsInBurst_PR[j] = NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_NOTHING;
}else {
AssertFatal (0,"Failed to parse gNB configuration file %s, gnb %d unknown value \"%s\" for ServingCellConfigCommon_ssb_PositionsInBurst_PR choice !\n",
RC.config_file_name, i, ServingCellConfigCommon_ssb_PositionsInBurst_PR);
}
uint64_t t_freq;
if(nr_band == 41 || (nr_band > 76 && nr_band < 80))
t_freq = 2400000000;
else
t_freq = 3000000000;
if (downlink_frequency<t_freq && (ServingCellConfigCommon_ssb_PositionsInBurst_PR > 15))
AssertFatal (0,"Failed to parse gNB configuration file %s, gnb %d unvalid value \"%ld\" for ssb_PositionsInBurst at DL frequency %ld !\n",
RC.config_file_name, i, ServingCellConfigCommon_ssb_PositionsInBurst_PR, downlink_frequency);
else {
if(downlink_frequency<6000000000 && (ServingCellConfigCommon_ssb_PositionsInBurst_PR > 255))
AssertFatal (0,"Failed to parse gNB configuration file %s, gnb %d unvalid value \"%ld\" for ssb_PositionsInBurst at DL frequency %ld !\n",
RC.config_file_name, i, ServingCellConfigCommon_ssb_PositionsInBurst_PR, downlink_frequency);
else
NRRRC_CONFIGURATION_REQ (msg_p).ServingCellConfigCommon_ssb_PositionsInBurst_PR[j] = ServingCellConfigCommon_ssb_PositionsInBurst_PR;
}
switch (ServingCellConfigCommon_ssb_periodicityServingCell) {
case 5:
+1 -1
View File
@@ -640,7 +640,7 @@ typedef enum {
{GNB_CONFIG_STRING_UL_BWP_PREFIX_TYPE, NULL, 0, strptr:&UL_BWP_prefix_type, defstrval:"NORMAL", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_UL_TIMEALIGNMENTTIMERCOMMON, NULL, 0, strptr:&UL_timeAlignmentTimerCommon, defstrval:"infinity", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_SERVINGCELLCONFIGCOMMON_N_TIMINGADVANCEOFFSET, NULL, 0, strptr:&ServingCellConfigCommon_n_TimingAdvanceOffset, defstrval:"n0", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_SERVINGCELLCONFIGCOMMON_SSB_POSITIONSINBURST_PR, NULL, 0, strptr:&ServingCellConfigCommon_ssb_PositionsInBurst_PR, defstrval:"shortBitmap", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_SERVINGCELLCONFIGCOMMON_SSB_POSITIONSINBURST_PR, NULL, 0, i64ptr:(int64_t *)&ServingCellConfigCommon_ssb_PositionsInBurst_PR, defint64val:0, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_SERVINGCELLCONFIGCOMMON_SSB_PERIODICITYSERVINGCELL, NULL, 0, iptr:&ServingCellConfigCommon_ssb_periodicityServingCell, defintval:10, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_SERVINGCELLCONFIGCOMMON_DMRS_TYPEA_POSITION, NULL, 0, iptr:&ServingCellConfigCommon_dmrs_TypeA_Position, defintval:0, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_NIA_SUBCARRIERSPACING, NULL, 0, strptr:&NIA_SubcarrierSpacing, defstrval:"kHz15", TYPE_STRING, 0}, \
-4
View File
@@ -58,11 +58,7 @@ extern eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][MAX_MOBILES
#ifndef PHYSIM
#define NB_INST 1
#else
extern unsigned char NB_INST;
#endif
extern unsigned char NB_eNB_INST;
extern unsigned char NB_UE_INST;
extern unsigned char NB_RN_INST;
+4 -4
View File
@@ -43,10 +43,10 @@
/*!\brief UE layer 2 status */
typedef enum {
CONNECTION_OK = 0,
CONNECTION_LOST,
PHY_RESYNCH,
PHY_HO_PRACH
UE_CONNECTION_OK = 0,
UE_CONNECTION_LOST,
UE_PHY_RESYNCH,
UE_PHY_HO_PRACH
} NR_UE_L2_STATE_t;
typedef struct {
+2 -2
View File
@@ -30,8 +30,8 @@
* \warning
*/
#ifndef __LAYER2_MAC_PROTO_H__
#define __LAYER2_MAC_PROTO_H__
#ifndef __LAYER2_MAC_UE_PROTO_H__
#define __LAYER2_MAC_UE_PROTO_H__
#include "mac_defs.h"
#include "mac.h"
+1 -1
View File
@@ -686,7 +686,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
mac->scheduled_response.dl_config = dl_config;
return CONNECTION_OK;
return UE_CONNECTION_OK;
}
//////////////
+11 -105
View File
@@ -49,110 +49,6 @@ extern RAN_CONTEXT_t RC;
extern void mac_top_init_gNB(void);
extern uint8_t nfapi_mode;
int32_t **rxdata;
int32_t **txdata;
typedef struct nr_bandentry_s {
int16_t band;
uint64_t ul_min;
uint64_t ul_max;
uint64_t dl_min;
uint64_t dl_max;
uint64_t N_OFFs_DL;
uint64_t step_size;
} nr_bandentry_t;
typedef struct band_info_s {
int nbands;
nr_bandentry_t band_info[100];
} nr_band_info_t;
static const nr_bandentry_t nr_bandtable[] = {
{1, 1920000, 1980000, 2110000, 2170000, 20, 422000},
{2, 1850000, 1910000, 1930000, 1990000, 20, 386000},
{3, 1710000, 1785000, 1805000, 1880000, 20, 361000},
{5, 824000, 849000, 869000, 894000, 20, 173800},
{7, 2500000, 2570000, 2620000, 2690000, 20, 524000},
{8, 880000, 915000, 925000, 960000, 20, 185000},
{12, 698000, 716000, 728000, 746000, 20, 145800},
{20, 832000, 862000, 791000, 821000, 20, 158200},
{25, 1850000, 1915000, 1930000, 1995000, 20, 386000},
{28, 703000, 758000, 758000, 813000, 20, 151600},
{34, 2010000, 2025000, 2010000, 2025000, 20, 402000},
{38, 2570000, 2620000, 2570000, 2630000, 20, 514000},
{39, 1880000, 1920000, 1880000, 1920000, 20, 376000},
{40, 2300000, 2400000, 2300000, 2400000, 20, 460000},
{41, 2496000, 2690000, 2496000, 2690000, 3, 499200},
{50, 1432000, 1517000, 1432000, 1517000, 20, 286400},
{51, 1427000, 1432000, 1427000, 1432000, 20, 285400},
{66, 1710000, 1780000, 2110000, 2200000, 20, 422000},
{70, 1695000, 1710000, 1995000, 2020000, 20, 399000},
{71, 663000, 698000, 617000, 652000, 20, 123400},
{74, 1427000, 1470000, 1475000, 1518000, 20, 295000},
{75, 000, 000, 1432000, 1517000, 20, 286400},
{76, 000, 000, 1427000, 1432000, 20, 285400},
{77, 3300000, 4200000, 3300000, 4200000, 1, 620000},
{78, 3300000, 3800000, 3300000, 3800000, 1, 620000},
{79, 4400000, 5000000, 4400000, 5000000, 2, 693334},
{80, 1710000, 1785000, 000, 000, 20, 342000},
{81, 860000, 915000, 000, 000, 20, 176000},
{82, 832000, 862000, 000, 000, 20, 166400},
{83, 703000, 748000, 000, 000, 20, 140600},
{84, 1920000, 1980000, 000, 000, 20, 384000},
{86, 1710000, 1785000, 000, 000, 20, 342000}
};
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw)
{
uint64_t dl_CarrierFreq_by_1k = dl_CarrierFreq / 1000;
int bw_kHz = bw / 1000;
int i;
LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
AssertFatal(nr_bandP < 86, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 30 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min,
"Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n",
nr_bandP, bw, (long long unsigned int)dl_CarrierFreq_by_1k,
(long long unsigned int)nr_bandtable[i].dl_min);
AssertFatal(dl_CarrierFreq_by_1k <=
(nr_bandtable[i].dl_max - bw_kHz),
"Band %d, dl_CarrierFreq %llu bw %u: DL carrier frequency %llu kHz > %llu\n",
nr_bandP, (long long unsigned int)dl_CarrierFreq,bw, (long long unsigned int)dl_CarrierFreq_by_1k,
(long long unsigned int)(nr_bandtable[i].dl_max - bw_kHz));
int deltaFglobal;
if (dl_CarrierFreq < 3e9) deltaFglobal = 5;
else deltaFglobal = 15;
// This is equation before Table 5.4.2.1-1 in 38101-1-f30
// F_REF=F_REF_Offs + deltaF_Global(N_REF-NREF_REF_Offs)
return (((dl_CarrierFreq_by_1k - nr_bandtable[i].dl_min)/deltaFglobal) +
nr_bandtable[i].N_OFFs_DL);
}
uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn)
{
int i;
int deltaFglobal;
if (nr_bandP < 77 || nr_bandP > 79) deltaFglobal = 5;
else deltaFglobal = 15;
AssertFatal(nr_bandP < 87, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 31 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL);
return 1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal);
}
void config_nr_mib(int Mod_idP,
int CC_idP,
@@ -184,8 +80,10 @@ void config_nr_mib(int Mod_idP,
void config_common(int Mod_idP,
int CC_idP,
int cellid,
int nr_bandP,
uint64_t dl_CarrierFreqP,
uint64_t ssb_pattern,
uint64_t dl_CarrierFreqP,
uint32_t dl_BandwidthP
){
@@ -193,6 +91,9 @@ void config_common(int Mod_idP,
int mu = 1;
cfg->sch_config.physical_cell_id.value = cellid;
cfg->sch_config.ssb_scg_position_in_burst.value = ssb_pattern;
// FDD
cfg->subframe_config.duplex_mode.value = 1;
cfg->subframe_config.duplex_mode.tl.tag = NFAPI_SUBFRAME_CONFIG_DUPLEX_MODE_TAG;
@@ -232,8 +133,10 @@ void config_common(int Mod_idP,
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int CC_idP,
int cellid,
int p_gNB,
int nr_bandP,
uint64_t ssb_pattern,
uint64_t dl_CarrierFreqP,
int dl_BandwidthP,
NR_BCCH_BCH_Message_t *mib,
@@ -258,10 +161,13 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
);
}// END if( mib != NULL )
if( servingcellconfigcommon != NULL ){
config_common(Mod_idP,
CC_idP,
cellid,
nr_bandP,
ssb_pattern,
dl_CarrierFreqP,
dl_BandwidthP
);
+21 -7
View File
@@ -60,6 +60,7 @@
#endif
#include "assertions.h"
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
#define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_eNB_SCHEDULER 1
@@ -324,6 +325,16 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id];
nfapi_nr_coreset_t coreset = RC.nrmac[module_idP]->coreset[CC_id][1];
nfapi_nr_search_space_t search_space = RC.nrmac[module_idP]->search_space[CC_id][1];
if (nr_is_dci_opportunity(search_space,
coreset,
frameP,
slotP,
*cfg))
nr_schedule_uss_dlsch_phytest(module_idP, frameP, slotP);
rnti = UE_RNTI(module_idP, i);
CC_id = UE_PCCID(module_idP, i);
//int spf = get_spf(cfg);
@@ -384,11 +395,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
}
for (int ii=0; ii<MAX_MOBILES_PER_GNB; ii++) {
NR_gNB_DLSCH_t *dlsch = RC.gNB[module_idP][CC_id]->dlsch[ii][0];
if((dlsch != NULL) && (dlsch->rnti == rnti)){
LOG_I(MAC, "clean_gNB_dlsch UE %x \n", rnti);
clean_gNB_dlsch(dlsch);
}
NR_gNB_DLSCH_t *dlsch = RC.gNB[module_idP][CC_id]->dlsch[ii][0];
if((dlsch != NULL) && (dlsch->rnti == rnti)){
LOG_I(MAC, "clean_eNb_dlsch UE %x \n", rnti);
LOG_E(PHY,"Calling with wrong paramter type\n");
clean_eNb_dlsch(dlsch);
}
}
for(int j = 0; j < 10; j++){
@@ -426,9 +438,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Phytest scheduling/ option not activated because of pending bug
if (slotP==2)
nr_schedule_css_dlsch_phytest(module_idP, frameP, slotP);
/*if (slotP==2)
nr_schedule_css_dlsch_phytest(module_idP, frameP, slotP);*/
if (slotP==1)
nr_schedule_uss_dlsch_phytest(module_idP, frameP, slotP);
/*
// Allocate CCEs for good after scheduling is done
@@ -92,14 +92,15 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
nr_configure_css_dci_initial(params_rel15,
scs, scs, nr_FR1, 0, 0,
scs, scs, nr_FR1, 0, 0, 0,
sfn_sf, slotP,
slots_per_frame,
dl_carrier_bandwidth);
params_rel15->first_slot = 0;
pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value);
pdu_rel15->time_domain_assignment = get_SLIV(dlsch_pdu_rel15->start_symbol, dlsch_pdu_rel15->nb_symbols);
pdu_rel15->time_domain_assignment = 3; // row index used here instead of SLIV
pdu_rel15->vrb_to_prb_mapping = 1;
pdu_rel15->mcs = 9;
pdu_rel15->tb_scaling = 1;
@@ -179,3 +180,145 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
}
}
/*Scheduling of DLSCH with associated DCI in user specific search space
* current version has only a DCI for type 1 PDCCH for C_RNTI*/
void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP)
{
uint8_t CC_id;
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
//NR_COMMON_channels_t *cc = nr_mac->common_channels;
nfapi_nr_dl_config_request_body_t *dl_req;
nfapi_nr_dl_config_request_pdu_t *dl_config_dci_pdu;
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu;
nfapi_tx_request_pdu_t *TX_req;
nfapi_nr_config_request_t *cfg = &nr_mac->config[0];
uint16_t rnti = 0x1234;
uint16_t sfn_sf = frameP << 7 | slotP;
int dl_carrier_bandwidth = cfg->rf_config.dl_carrier_bandwidth.value;
// everything here is hard-coded to 30 kHz
int scs = get_dlscs(cfg);
int slots_per_frame = get_spf(cfg);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_I(MAC, "Scheduling UE specific search space DCI type 1 for CC_id %d\n",CC_id);
nfapi_nr_coreset_t* coreset = &nr_mac->coreset[CC_id][1];
nfapi_nr_search_space_t* search_space = &nr_mac->search_space[CC_id][1];
dl_req = &nr_mac->DL_req[CC_id].dl_config_request_body;
dl_config_dci_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_dci_pdu,0,sizeof(nfapi_nr_dl_config_request_pdu_t));
dl_config_dci_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_dci_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dci_dl_pdu));
dl_config_dlsch_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu+1];
memset((void*)dl_config_dlsch_pdu,0,sizeof(nfapi_nr_dl_config_request_pdu_t));
dl_config_dlsch_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE;
dl_config_dlsch_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dlsch_pdu));
nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &dl_config_dci_pdu->dci_dl_pdu.dci_dl_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &dl_config_dci_pdu->dci_dl_pdu.pdcch_params_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15;
dlsch_pdu_rel15->start_prb = 0;
dlsch_pdu_rel15->n_prb = 50;
dlsch_pdu_rel15->start_symbol = 2;
dlsch_pdu_rel15->nb_symbols = 9;
dlsch_pdu_rel15->rnti = rnti;
dlsch_pdu_rel15->nb_layers =1;
dlsch_pdu_rel15->nb_codewords = 1;
dlsch_pdu_rel15->mcs_idx = 9;
dlsch_pdu_rel15->ndi = 1;
dlsch_pdu_rel15->redundancy_version = 0;
nr_configure_dci_from_pdcch_config(params_rel15,
coreset,
search_space,
*cfg,
dl_carrier_bandwidth);
pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value);
pdu_rel15->time_domain_assignment = 3; // row index used here instead of SLIV;
pdu_rel15->vrb_to_prb_mapping = 1;
pdu_rel15->mcs = 9;
pdu_rel15->tb_scaling = 1;
pdu_rel15->ra_preamble_index = 25;
pdu_rel15->format_indicator = 1;
pdu_rel15->ndi = 1;
pdu_rel15->rv = 0;
pdu_rel15->harq_pid = 0;
pdu_rel15->dai = 2;
pdu_rel15->tpc = 2;
pdu_rel15->pucch_resource_indicator = 7;
pdu_rel15->pdsch_to_harq_feedback_timing_indicator = 7;
LOG_I(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
pdu_rel15->frequency_domain_assignment,
pdu_rel15->time_domain_assignment,
pdu_rel15->vrb_to_prb_mapping,
pdu_rel15->mcs,
pdu_rel15->tb_scaling,
pdu_rel15->ndi,
pdu_rel15->rv);
params_rel15->rnti = rnti;
params_rel15->rnti_type = NFAPI_NR_RNTI_C;
params_rel15->dci_format = NFAPI_NR_DL_DCI_FORMAT_1_0;
//params_rel15->aggregation_level = 1;
LOG_I(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d, config type %d\n \
coreset params: mux_pattern %d, n_rb %d, n_symb %d, rb_offset %d \n \
ss params : first symb %d, ss type %d\n",
params_rel15->rnti,
params_rel15->rnti_type,
params_rel15->config_type,
params_rel15->dci_format,
params_rel15->mux_pattern,
params_rel15->n_rb,
params_rel15->n_symb,
params_rel15->rb_offset,
params_rel15->first_symbol,
params_rel15->search_space_type);
nr_get_tbs(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu, *cfg);
LOG_I(MAC, "DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d\n",
dlsch_pdu_rel15->start_prb,
dlsch_pdu_rel15->n_prb,
dlsch_pdu_rel15->start_symbol,
dlsch_pdu_rel15->nb_symbols,
dlsch_pdu_rel15->nb_layers,
dlsch_pdu_rel15->nb_codewords,
dlsch_pdu_rel15->mcs_idx);
dl_req->number_dci++;
dl_req->number_pdsch_rnti++;
dl_req->number_pdu+=2;
TX_req = &nr_mac->TX_req[CC_id].tx_request_body.tx_pdu_list[nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus];
TX_req->pdu_length = 6;
TX_req->pdu_index = nr_mac->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = 8;
nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
nr_mac->TX_req[CC_id].sfn_sf = sfn_sf;
nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
TX_req = &nr_mac->TX_req[CC_id].tx_request_body.tx_pdu_list[nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus+1];
TX_req->pdu_length = dlsch_pdu_rel15->transport_block_size;
TX_req->pdu_index = nr_mac->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = 8;
nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
nr_mac->TX_req[CC_id].sfn_sf = sfn_sf;
nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
}
}
@@ -21,11 +21,11 @@
/*! \file gNB_scheduler_primitives.c
* \brief primitives used by gNB for BCH, RACH, ULSCH, DLSCH scheduling
* \author Navid Nikaein and Raymond Knopp, WEI-TAI CHEN
* \date 2010 - 2014, 2018
* \email: navid.nikaein@eurecom.fr, kroempa@gmail.com
* \author Raymond Knopp, Guy De Souza
* \date 2018, 2019
* \email: knopp@eurecom.fr, desouza@eurecom.fr
* \version 1.0
* \company Eurecom, NTUST
* \company Eurecom
* @ingroup _mac
*/
@@ -65,23 +65,64 @@ extern RAN_CONTEXT_t RC;
extern int n_active_slices;
// Note the 2 scs values in the table names represent resp. scs_common and pdcch_scs
/// LUT for the number of symbols in the coreset indexed by coreset index (4 MSB rmsi_pdcch_config)
uint8_t nr_coreset_nsymb_pdcch_type_0_b40Mhz[16] = {2,2,2,2,2,3,3,3,3,3,1,1,1,2,2,2}; // below 40Mhz bw
uint8_t nr_coreset_nsymb_pdcch_type_0_a40Mhz[10] = {2,2,3,3,1,1,2,2,3,3}; // above 40Mhz bw
uint8_t nr_coreset_nsymb_pdcch_type_0_scs_15_15[15] = {2,2,2,3,3,3,1,1,2,2,3,3,1,2,3};
uint8_t nr_coreset_nsymb_pdcch_type_0_scs_15_30[14] = {2,2,2,2,3,3,3,3,1,1,2,2,3,3};
uint8_t nr_coreset_nsymb_pdcch_type_0_scs_30_15_b40Mhz[9] = {1,1,2,2,3,3,1,2,3};
uint8_t nr_coreset_nsymb_pdcch_type_0_scs_30_15_a40Mhz[9] = {1,2,3,1,1,2,2,3,3};
uint8_t nr_coreset_nsymb_pdcch_type_0_scs_30_30_b40Mhz[16] = {2,2,2,2,2,3,3,3,3,3,1,1,1,2,2,2}; // below 40Mhz bw
uint8_t nr_coreset_nsymb_pdcch_type_0_scs_30_30_a40Mhz[10] = {2,2,3,3,1,1,2,2,3,3}; // above 40Mhz bw
uint8_t nr_coreset_nsymb_pdcch_type_0_scs_120_60[12] = {1,1,2,2,3,3,1,2,1,1,1,1};
/// LUT for the number of RBs in the coreset indexed by coreset index
uint8_t nr_coreset_rb_offset_pdcch_type_0_b40Mhz[16] = {0,1,2,3,4,0,1,2,3,4,12,14,16,12,14,16};
uint8_t nr_coreset_rb_offset_pdcch_type_0_a40Mhz[10] = {0,4,0,4,0,28,0,28,0,28};
uint8_t nr_coreset_rb_offset_pdcch_type_0_scs_15_15[15] = {0,2,4,0,2,4,12,16,12,16,12,16,38,38,38};
uint8_t nr_coreset_rb_offset_pdcch_type_0_scs_15_30[14] = {5,6,7,8,5,6,7,8,18,20,18,20,18,20};
uint8_t nr_coreset_rb_offset_pdcch_type_0_scs_30_15_b40Mhz[9] = {2,6,2,6,2,6,28,28,28};
uint8_t nr_coreset_rb_offset_pdcch_type_0_scs_30_15_a40Mhz[9] = {4,4,4,0,56,0,56,0,56};
uint8_t nr_coreset_rb_offset_pdcch_type_0_scs_30_30_b40Mhz[16] = {0,1,2,3,4,0,1,2,3,4,12,14,16,12,14,16};
uint8_t nr_coreset_rb_offset_pdcch_type_0_scs_30_30_a40Mhz[10] = {0,4,0,4,0,28,0,28,0,28};
int8_t nr_coreset_rb_offset_pdcch_type_0_scs_120_60[12] = {0,8,0,8,0,8,28,28,-1,49,-1,97};
int8_t nr_coreset_rb_offset_pdcch_type_0_scs_120_120[8] = {0,4,14,14,-1,24,-1,48};
int8_t nr_coreset_rb_offset_pdcch_type_0_scs_240_120[8] = {0,8,0,8,-1,25,-1,49};
/// LUT for monitoring occasions param O indexed by ss index (4 LSB rmsi_pdcch_config)
// Note: scaling is used to avoid decimal values for O and M, original values commented
uint8_t nr_ss_param_O_type_0_mux1_FR1[16] = {0,0,2,2,5,5,7,7,0,5,0,0,2,2,5,5};
uint8_t nr_ss_param_O_type_0_mux1_FR2[14] = {0,0,2.5,2.5,5,5,0,2.5,5,7.5,7.5,7.5,0,5};
uint8_t nr_ss_param_O_type_0_mux1_FR2[14] = {0,0,5,5,5,5,0,5,5,15,15,15,0,5}; //{0,0,2.5,2.5,5,5,0,2.5,5,7.5,7.5,7.5,0,5}
uint8_t nr_ss_scale_O_mux1_FR2[14] = {0,0,1,1,0,0,0,1,0,1,1,1,0,0};
/// LUT for number of SS sets per slot indexed by ss index
uint8_t nr_ss_sets_per_slot_type_0_FR1[16] = {1,2,1,2,1,2,1,2,1,1,1,1,1,1,1,1};
uint8_t nr_ss_sets_per_slot_type_0_FR2[14] = {1,2,1,2,1,2,2,2,2,1,2,2,1,1};
/// LUT for monitoring occasions param M indexed by ss index
uint8_t nr_ss_param_M_type_0_mux1_FR1[16] = {1,0.5,1,0.5,1,0.5,1,0.5,2,2,1,1,1,1,1,1};
uint8_t nr_ss_param_M_type_0_mux1_FR2[14] = {1,0.5,1,0.5,1,0.5,0.5,0.5,0.5,1,0.5,0.5,2,2};
uint8_t nr_ss_param_M_type_0_mux1_FR1[16] = {1,1,1,1,1,1,1,1,2,2,1,1,1,1,1,1}; //{1,0.5,1,0.5,1,0.5,1,0.5,2,2,1,1,1,1,1,1}
uint8_t nr_ss_scale_M_mux1_FR1[16] = {0,1,0,1,0,1,0,1,0,0,0,0,0,0,0,0};
uint8_t nr_ss_param_M_type_0_mux1_FR2[14] = {1,1,1,1,1,1,1,1,1,1,1,1,2,2}; //{1,0.5,1,0.5,1,0.5,0.5,0.5,0.5,1,0.5,0.5,2,2}
uint8_t nr_ss_scale_M_mux1_FR2[14] = {0,1,0,1,0,1,1,1,1,0,1,1,0,0};
/// LUT for SS first symbol index indexed by ss index
uint8_t nr_ss_first_symb_idx_type_0_mux1_FR1[8] = {0,0,1,2,1,2,1,2};
// Mux pattern type 2
uint8_t nr_ss_first_symb_idx_scs_120_60_mux2[4] = {0,1,6,7};
uint8_t nr_ss_first_symb_idx_scs_240_120_set1_mux2[6] = {0,1,2,3,0,1};
// Mux pattern type 3
uint8_t nr_ss_first_symb_idx_scs_120_120_mux3[4] = {4,8,2,6};
/// Search space max values indexed by scs
uint8_t nr_max_number_of_candidates_per_slot[4] = {44, 36, 22, 20};
uint8_t nr_max_number_of_cces_per_slot[4] = {56, 56, 48, 32};
static inline uint8_t get_max_candidates(uint8_t scs) {
AssertFatal(scs<4, "Invalid PDCCH subcarrier spacing %d\n", scs);
return (nr_max_number_of_candidates_per_slot[scs]);
}
static inline uint8_t get_max_cces(uint8_t scs) {
AssertFatal(scs<4, "Invalid PDCCH subcarrier spacing %d\n", scs);
return (nr_max_number_of_cces_per_slot[scs]);
}
int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slot){
@@ -94,69 +135,143 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
nr_frequency_range_e freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint8_t k_ssb,
uint16_t sfn_ssb,
uint8_t n_ssb, /*slot index overlapping the corresponding SSB index*/
uint16_t nb_slots_per_frame,
uint16_t N_RB)
{
uint8_t O, M;
uint8_t ss_idx = rmsi_pdcch_config&0xf;
uint8_t cset_idx = (rmsi_pdcch_config>>4)&0xf;
uint8_t mu;
uint8_t mu = scs_common;
uint8_t O_scale=0, M_scale=0; // used to decide if the values of O and M need to be divided by 2
/// Coreset params
switch(scs_common) {
case kHz15:
mu = 0;
switch(pdcch_scs) {
case kHz15:
AssertFatal(cset_idx<15,"Coreset index %d reserved for scs kHz15/kHz15\n", cset_idx);
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 6)? 24 : (cset_idx < 12)? 48 : 96;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_15_15[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_15_15[cset_idx];
break;
case kHz30:
AssertFatal(cset_idx<14,"Coreset index %d reserved for scs kHz15/kHz30\n", cset_idx);
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 8)? 24 : 48;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_15_30[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_15_15[cset_idx];
break;
default:
AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
}
break;
case kHz30:
mu = 1;
if (N_RB < 106) { // Minimum 40Mhz bandwidth not satisfied
switch(pdcch_scs) {
case kHz15:
AssertFatal(1==0,"kHz15 not supported yet\n");
break;
AssertFatal(cset_idx<9,"Coreset index %d reserved for scs kHz30/kHz15\n", cset_idx);
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 10)? 48 : 96;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_15_b40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_15_b40Mhz[cset_idx];
break;
case kHz30:
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 10)? 24 : 48;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
break;
pdcch_params->n_rb = (cset_idx < 6)? 24 : 48;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_30_b40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_30_b40Mhz[cset_idx];
break;
default:
AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
}
}
else {
AssertFatal(ss_idx<10 ,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
else { // above 40Mhz
switch(pdcch_scs) {
case kHz15:
AssertFatal(1==0,"15 kHz SCS not supported yet\n");
break;
AssertFatal(cset_idx<9,"Coreset index %d reserved for scs kHz30/kHz15\n", cset_idx);
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 3)? 48 : 96;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_15_a40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_15_a40Mhz[cset_idx];
break;
case kHz30:
AssertFatal(cset_idx<10,"Coreset index %d reserved for scs kHz30/kHz30\n", cset_idx);
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 4)? 24 : 48;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
break;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_30_30_a40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_scs_30_30_a40Mhz[cset_idx];
break;
default:
AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
}
}
case kHz60:
mu = 2;
break;
case kHz120:
mu = 3;
switch(pdcch_scs) {
case kHz60:
AssertFatal(cset_idx<12,"Coreset index %d reserved for scs kHz120/kHz60\n", cset_idx);
pdcch_params->mux_pattern = (cset_idx < 8)?NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 : NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2;
pdcch_params->n_rb = (cset_idx < 6)? 48 : (cset_idx < 8)? 96 : (cset_idx < 10)? 48 : 96;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_scs_120_60[cset_idx];
pdcch_params->rb_offset = (nr_coreset_rb_offset_pdcch_type_0_scs_120_60[cset_idx]>0)?nr_coreset_rb_offset_pdcch_type_0_scs_120_60[cset_idx] :
(k_ssb == 0)? -41 : -42;
break;
case kHz120:
AssertFatal(cset_idx<8,"Coreset index %d reserved for scs kHz120/kHz120\n", cset_idx);
pdcch_params->mux_pattern = (cset_idx < 4)?NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 : NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3;
pdcch_params->n_rb = (cset_idx < 2)? 24 : (cset_idx < 4)? 48 : (cset_idx < 6)? 24 : 48;
pdcch_params->n_symb = (cset_idx == 2)? 1 : 2;
pdcch_params->rb_offset = (nr_coreset_rb_offset_pdcch_type_0_scs_120_120[cset_idx]>0)? nr_coreset_rb_offset_pdcch_type_0_scs_120_120[cset_idx] :
(k_ssb == 0)? -20 : -21;
break;
default:
AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
}
break;
case kHz240:
switch(pdcch_scs) {
case kHz60:
AssertFatal(cset_idx<4,"Coreset index %d reserved for scs kHz240/kHz60\n", cset_idx);
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = 96;
pdcch_params->n_symb = (cset_idx < 2)? 1 : 2;
pdcch_params->rb_offset = (cset_idx&1)? 16 : 0;
break;
case kHz120:
AssertFatal(cset_idx<8,"Coreset index %d reserved for scs kHz240/kHz120\n", cset_idx);
pdcch_params->mux_pattern = (cset_idx < 4)? NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 : NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2;
pdcch_params->n_rb = (cset_idx < 4)? 48 : (cset_idx < 6)? 24 : 48;
pdcch_params->n_symb = ((cset_idx==2)||(cset_idx==3))? 2 : 1;
pdcch_params->rb_offset = (nr_coreset_rb_offset_pdcch_type_0_scs_240_120[cset_idx]>0)? nr_coreset_rb_offset_pdcch_type_0_scs_240_120[cset_idx] :
(k_ssb == 0)? -41 : -42;
break;
default:
AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
}
break;
default:
AssertFatal(1==0,"Invalid common subcarrier spacing %d\n", scs_common);
@@ -170,27 +285,50 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
O = nr_ss_param_O_type_0_mux1_FR1[ss_idx];
pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR1[ss_idx];
M = nr_ss_param_M_type_0_mux1_FR1[ss_idx];
pdcch_params->first_symbol = (ss_idx < 8)? ( (ss_idx&1)? pdcch_params->n_symb : 0 ) : nr_ss_first_symb_idx_type_0_mux1_FR1[ss_idx - 8];
M_scale = nr_ss_scale_M_mux1_FR1[ss_idx];
pdcch_params->first_symbol = (ss_idx < 8)? ( (ssb_idx&1)? pdcch_params->n_symb : 0 ) : nr_ss_first_symb_idx_type_0_mux1_FR1[ss_idx - 8];
}
else {
AssertFatal(ss_idx<14 ,"Invalid search space index for multiplexing type 1 and FR2 %d\n", ss_idx);
O = nr_ss_param_O_type_0_mux1_FR2[ss_idx];
O_scale = nr_ss_scale_O_mux1_FR2[ss_idx];
pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR2[ss_idx];
M = nr_ss_param_M_type_0_mux1_FR2[ss_idx];
M_scale = nr_ss_scale_M_mux1_FR2[ss_idx];
pdcch_params->first_symbol = (ss_idx < 12)? ( (ss_idx&1)? 7 : 0 ) : 0;
}
pdcch_params->nb_slots = 2;
pdcch_params->sfn_mod2 = ((uint8_t)(floor( (O*pow(2, mu) + floor(ssb_idx*M)) / nb_slots_per_frame )) & 1)? 1 : 0;
pdcch_params->first_slot = (uint8_t)(O*pow(2, mu) + floor(ssb_idx*M)) % nb_slots_per_frame;
pdcch_params->sfn_mod2 = (CEILIDIV( (((O<<mu)>>O_scale) + ((ssb_idx*M)>>M_scale)), nb_slots_per_frame ) & 1)? 1 : 0;
pdcch_params->first_slot = (((O<<mu)>>O_scale) + ((ssb_idx*M)>>M_scale)) % nb_slots_per_frame;
break;
break;
case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2:
break;
AssertFatal( ((scs_common==kHz120)&&(pdcch_scs==kHz60)) || ((scs_common==kHz240)&&(pdcch_scs==kHz120)),
"Invalid scs_common/pdcch_scs combination %d/%d for Mux type 2\n", scs_common, pdcch_scs );
AssertFatal(ss_idx==0, "Search space index %d reserved for scs_common/pdcch_scs combination %d/%d", ss_idx, scs_common, pdcch_scs);
pdcch_params->nb_slots = 1;
if ((scs_common==kHz120)&&(pdcch_scs==kHz60)) {
pdcch_params->first_symbol = nr_ss_first_symb_idx_scs_120_60_mux2[ssb_idx&3];
// Missing in pdcch_params sfn_C and n_C here and in else case
}
else {
pdcch_params->first_symbol = ((ssb_idx&7)==4)?12 : ((ssb_idx&7)==4)?13 : nr_ss_first_symb_idx_scs_240_120_set1_mux2[ssb_idx&7]; //???
}
break;
case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3:
break;
AssertFatal( (scs_common==kHz120)&&(pdcch_scs==kHz120),
"Invalid scs_common/pdcch_scs combination %d/%d for Mux type 3\n", scs_common, pdcch_scs );
AssertFatal(ss_idx==0, "Search space index %d reserved for scs_common/pdcch_scs combination %d/%d", ss_idx, scs_common, pdcch_scs);
pdcch_params->first_symbol = nr_ss_first_symb_idx_scs_120_120_mux3[ssb_idx&3];
break;
default:
AssertFatal(1==0, "Invalid SSB and coreset multiplexing pattern %d\n", pdcch_params->mux_pattern);
@@ -206,11 +344,91 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
}
void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nfapi_nr_coreset_t* coreset,
nfapi_nr_search_space_t* search_space) {
nfapi_nr_search_space_t* search_space,
nfapi_nr_config_request_t cfg,
uint16_t N_RB) {
/// coreset
//ControlResourceSetId
pdcch_params->config_type = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
//frequencyDomainResources
uint8_t count=0, start=0, start_set=0;
uint64_t bitmap = coreset->frequency_domain_resources;
for (int i=0; i<45; i++)
if ((bitmap>>(44-i))&1) {
count++;
if (!start_set) {
start = i;
start_set = 1;
}
}
pdcch_params->rb_offset = 6*start;
pdcch_params->n_rb = 6*count;
//duration
pdcch_params->n_symb = coreset->duration;
//cce-REG-MappingType
pdcch_params->cr_mapping_type = coreset->cce_reg_mapping_type;
if (pdcch_params->cr_mapping_type == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
pdcch_params->reg_bundle_size = coreset->reg_bundle_size;
pdcch_params->interleaver_size = coreset->interleaver_size;
}
else {
pdcch_params->reg_bundle_size = 0;
pdcch_params->interleaver_size = 0;
}
//shift index
pdcch_params->shift_index = coreset->shift_index;
//precoderGranularity
pdcch_params->precoder_granularity = coreset->precoder_granularity;
//TCI states
// PDCCH params does not yet include information about TCI and QCL (needed for DCI 1.1 and 0.1)
//pdcch-DMRS-ScramblingID
pdcch_params->scrambling_id = coreset->dmrs_scrambling_id;
/// SearchSpace
// first symbol
//AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
for (int i=0; i<get_symbolsperslot(&cfg); i++)
if ((search_space->monitoring_symbols_in_slot>>(15-i))&1) {
pdcch_params->first_symbol=i;
break;
}
//searchSpaceType
pdcch_params->search_space_type = search_space->search_space_type;
pdcch_params->n_RB_BWP = N_RB;
}
int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
nfapi_nr_coreset_t coreset,
uint16_t frame,
uint16_t slot,
nfapi_nr_config_request_t cfg) {
AssertFatal(search_space.coreset_id==coreset.coreset_id, "Invalid association of coreset(%d) and search space(%d)\n",
search_space.search_space_id, coreset.coreset_id);
uint8_t is_dci_opportunity=0;
uint16_t Ks=search_space.slot_monitoring_periodicity;
uint16_t Os=search_space.slot_monitoring_offset;
uint8_t Ts=search_space.duration;
if (((frame*get_spf(&cfg) + slot - Os)%Ks)<Ts)
is_dci_opportunity=1;
return is_dci_opportunity;
}
int get_dlscs(nfapi_nr_config_request_t *cfg) {
@@ -237,3 +455,10 @@ int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot) {
return(get_spf(cfg)*frame) + slot;
}
int get_symbolsperslot(nfapi_nr_config_request_t *cfg) {
return ((cfg->subframe_config.dl_cyclic_prefix_type.value==NFAPI_CP_EXTENDED)?12:14);
}
+22 -2
View File
@@ -60,8 +60,10 @@ void config_common(int Mod_idP,
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int CC_id,
int cellid,
int p_gNB,
int nr_bandP,
uint64_t ssb_pattern,
uint64_t dl_CarrierFreqP,
int dl_BandwidthP,
NR_BCCH_BCH_Message_t *mib,
@@ -94,13 +96,23 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
nr_frequency_range_e freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint8_t k_ssb,
uint16_t sfn_ssb,
uint8_t n_ssb,
uint16_t nb_slots_per_frame,
uint16_t N_RB);
int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
nfapi_nr_coreset_t coreset,
uint16_t frame,
uint16_t slot,
nfapi_nr_config_request_t cfg);
void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nfapi_nr_coreset_t* coreset,
nfapi_nr_search_space_t* search_space);
nfapi_nr_search_space_t* search_space,
nfapi_nr_config_request_t cfg,
uint16_t N_RB);
int get_dlscs(nfapi_nr_config_request_t *cfg);
@@ -110,4 +122,12 @@ int get_spf(nfapi_nr_config_request_t *cfg);
int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot);
int get_symbolsperslot(nfapi_nr_config_request_t *cfg);
void get_band(uint32_t downlink_frequency, uint8_t *current_band, int32_t *current_offset, lte_frame_type_t *current_type);
uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/
+38 -6
View File
@@ -44,6 +44,34 @@
extern RAN_CONTEXT_t RC;
void nr_init_coreset(nfapi_nr_coreset_t *coreset) {
coreset->coreset_id = 1;
coreset->frequency_domain_resources = 0x1E0000000000;//0x1FFFE0000000; // 96 RB starting from CRB0
coreset->duration = 2;
coreset->cce_reg_mapping_type = NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED;
coreset->reg_bundle_size = 6;
coreset->interleaver_size = 2;
coreset->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE;
coreset->tci_present_in_dci = 0;
coreset->dmrs_scrambling_id = 0;
}
void nr_init_search_space(nfapi_nr_search_space_t *search_space) {
search_space->search_space_id = 1;
search_space->coreset_id = 1;
search_space->search_space_type = NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC;
search_space->duration = 5;
search_space->slot_monitoring_periodicity = NFAPI_NR_SS_PERIODICITY_SL10;
search_space->slot_monitoring_offset = 1;
search_space->monitoring_symbols_in_slot = 0xC0000000; // first 2 ofdm symbols
search_space->css_formats_0_0_and_1_0 = 1;
search_space->uss_dci_formats = 0; // enum to be defined-- formats 0.0 and 1.0
for (int i=0; i<NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS; i++)
search_space->number_of_candidates[i] = 4; // TODO
}
void mac_top_init_gNB(void)
{
module_id_t i,j;
@@ -56,24 +84,24 @@ void mac_top_init_gNB(void)
if (RC.nb_nr_macrlc_inst > 0) {
RC.nrmac = (gNB_MAC_INST **) malloc16(RC.nb_nr_macrlc_inst *sizeof(gNB_MAC_INST *));
AssertFatal(RC.nrmac != NULL,"can't ALLOCATE %zu Bytes for %d gNB_MAC_INST with size %zu \n",
RC.nb_nr_macrlc_inst * sizeof(gNB_MAC_INST *),
RC.nb_nr_macrlc_inst, sizeof(gNB_MAC_INST));
for (i = 0; i < RC.nb_nr_macrlc_inst; i++) {
RC.nrmac[i] = (gNB_MAC_INST *) malloc16(sizeof(gNB_MAC_INST));
AssertFatal(RC.nrmac != NULL,"can't ALLOCATE %zu Bytes for %d gNB_MAC_INST with size %zu \n",
RC.nb_nr_macrlc_inst * sizeof(gNB_MAC_INST *),
RC.nb_nr_macrlc_inst, sizeof(gNB_MAC_INST));
LOG_D(MAC,"[MAIN] ALLOCATE %zu Bytes for %d gNB_MAC_INST @ %p\n",sizeof(gNB_MAC_INST), RC.nb_nr_macrlc_inst, RC.mac);
bzero(RC.nrmac[i], sizeof(gNB_MAC_INST));
RC.nrmac[i]->Mod_id = i;
for (j = 0; j < MAX_NUM_CCs; j++) {
RC.nrmac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.nrmac[i]->dl_config_pdu_list[j];
@@ -84,7 +112,11 @@ void mac_top_init_gNB(void)
RC.nrmac[i]->HI_DCI0_req[j].hi_dci0_request_body.hi_dci0_pdu_list = RC.nrmac[i]->hi_dci0_pdu_list[j];
RC.nrmac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.nrmac[i]->tx_request_pdu[j];
RC.nrmac[i]->ul_handle = 0;
RC.nrmac[i]->ul_handle = 0;
// Init PDCCH structures
nr_init_coreset(&RC.nrmac[i]->coreset[j][1]);
nr_init_search_space(&RC.nrmac[i]->search_space[j][1]);
}
+148
View File
@@ -0,0 +1,148 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file nr_mac_common.c
* \brief Common MAC functions for NR UE and gNB
* \author Florian Kaltenberger and Raymond Knopp
* \date 2019
* \version 0.1
* \company Eurecom, NTUST
* \email: florian.kalteberger@eurecom.fr, raymond.knopp@eurecom.fr
* @ingroup _mac
*/
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
nr_bandentry_t nr_bandtable[] = {
{1, 1920000, 1980000, 2110000, 2170000, 20, 422000},
{2, 1850000, 1910000, 1930000, 1990000, 20, 386000},
{3, 1710000, 1785000, 1805000, 1880000, 20, 361000},
{5, 824000, 849000, 869000, 894000, 20, 173800},
{7, 2500000, 2570000, 2620000, 2690000, 20, 524000},
{8, 880000, 915000, 925000, 960000, 20, 185000},
{12, 698000, 716000, 728000, 746000, 20, 145800},
{20, 832000, 862000, 791000, 821000, 20, 158200},
{25, 1850000, 1915000, 1930000, 1995000, 20, 386000},
{28, 703000, 758000, 758000, 813000, 20, 151600},
{34, 2010000, 2025000, 2010000, 2025000, 20, 402000},
{38, 2570000, 2620000, 2570000, 2630000, 20, 514000},
{39, 1880000, 1920000, 1880000, 1920000, 20, 376000},
{40, 2300000, 2400000, 2300000, 2400000, 20, 460000},
{41, 2496000, 2690000, 2496000, 2690000, 3, 499200},
{50, 1432000, 1517000, 1432000, 1517000, 20, 286400},
{51, 1427000, 1432000, 1427000, 1432000, 20, 285400},
{66, 1710000, 1780000, 2110000, 2200000, 20, 422000},
{70, 1695000, 1710000, 1995000, 2020000, 20, 399000},
{71, 663000, 698000, 617000, 652000, 20, 123400},
{74, 1427000, 1470000, 1475000, 1518000, 20, 295000},
{75, 000, 000, 1432000, 1517000, 20, 286400},
{76, 000, 000, 1427000, 1432000, 20, 285400},
{77, 3300000, 4200000, 3300000, 4200000, 1, 620000},
{78, 3300000, 3800000, 3300000, 3800000, 1, 620000},
{79, 4400000, 5000000, 4400000, 5000000, 2, 693334},
{80, 1710000, 1785000, 000, 000, 20, 342000},
{81, 860000, 915000, 000, 000, 20, 176000},
{82, 832000, 862000, 000, 000, 20, 166400},
{83, 703000, 748000, 000, 000, 20, 140600},
{84, 1920000, 1980000, 000, 000, 20, 384000},
{86, 1710000, 1785000, 000, 000, 20, 342000}
};
void get_band(uint32_t downlink_frequency, uint8_t *current_band, int32_t *current_offset, lte_frame_type_t *current_type) {
int ind;
int64_t dl_freq_khz = downlink_frequency/1000;
for ( ind=0;
ind < sizeof(nr_bandtable) / sizeof(nr_bandtable[0]);
ind++) {
*current_band = nr_bandtable[ind].band;
LOG_I(PHY, "Scanning band %d, dl_min %"PRIu64", ul_min %"PRIu64"\n", ind, nr_bandtable[ind].dl_min,nr_bandtable[ind].ul_min);
if ( nr_bandtable[ind].dl_min <= dl_freq_khz && nr_bandtable[ind].dl_max >= dl_freq_khz ) {
*current_offset = (nr_bandtable[ind].ul_min - nr_bandtable[ind].dl_min)*1000;
if (*current_offset == 0)
*current_type = TDD;
else
*current_type = FDD;
LOG_I( PHY, "DL frequency %"PRIu32": band %d, frame_type %d, UL frequency %"PRIu32"\n",
downlink_frequency, *current_band, *current_type, downlink_frequency+*current_offset);
break;
}
}
AssertFatal(ind != (sizeof(nr_bandtable) / sizeof(nr_bandtable[0])),
"Can't find EUTRA band for frequency %d\n", downlink_frequency);
}
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw)
{
uint64_t dl_CarrierFreq_by_1k = dl_CarrierFreq / 1000;
int bw_kHz = bw / 1000;
int i;
LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
AssertFatal(nr_bandP < 86, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 30 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min,
"Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n",
nr_bandP, bw, (long long unsigned int)dl_CarrierFreq_by_1k,
(long long unsigned int)nr_bandtable[i].dl_min);
AssertFatal(dl_CarrierFreq_by_1k <=
(nr_bandtable[i].dl_max - bw_kHz),
"Band %d, dl_CarrierFreq %llu bw %u: DL carrier frequency %llu kHz > %llu\n",
nr_bandP, (long long unsigned int)dl_CarrierFreq,bw, (long long unsigned int)dl_CarrierFreq_by_1k,
(long long unsigned int)(nr_bandtable[i].dl_max - bw_kHz));
int deltaFglobal;
if (dl_CarrierFreq < 3e9) deltaFglobal = 5;
else deltaFglobal = 15;
// This is equation before Table 5.4.2.1-1 in 38101-1-f30
// F_REF=F_REF_Offs + deltaF_Global(N_REF-NREF_REF_Offs)
return (((dl_CarrierFreq_by_1k - nr_bandtable[i].dl_min)/deltaFglobal) +
nr_bandtable[i].N_OFFs_DL);
}
uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn)
{
int i;
int deltaFglobal;
if (nr_bandP < 77 || nr_bandP > 79) deltaFglobal = 5;
else deltaFglobal = 15;
AssertFatal(nr_bandP < 87, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 31 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL);
return 1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal);
}
+4
View File
@@ -138,6 +138,10 @@ typedef struct gNB_MAC_INST_s {
nfapi_tx_request_pdu_t tx_request_pdu[NFAPI_CC_MAX][MAX_NUM_TX_REQUEST_PDU];
/// NFAPI DL PDU structure
nfapi_tx_request_t TX_req[NFAPI_CC_MAX];
/// NFAPI coreset structure
nfapi_nr_coreset_t coreset[NFAPI_CC_MAX][NFAPI_NR_MAX_NB_CORESETS];
/// NFAPI search space structure
nfapi_nr_search_space_t search_space[NFAPI_CC_MAX][NFAPI_NR_MAX_NB_SEARCH_SPACES];
UE_list_t UE_list;
+13 -12
View File
@@ -74,7 +74,7 @@ int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_n
return nr_ue_process_dlsch( module_id,
cc_id,
gNB_index,
&dci_ind,
dci_ind,
pduP,
pdu_len);
@@ -102,13 +102,13 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
0, 0); // TODO check tx/rx frame/slot is need for NR version
switch(ret){
case CONNECTION_OK:
case UE_CONNECTION_OK:
break;
case CONNECTION_LOST:
case UE_CONNECTION_LOST:
break;
case PHY_RESYNCH:
case UE_PHY_RESYNCH:
break;
case PHY_HO_PRACH:
case UE_PHY_HO_PRACH:
break;
default:
break;
@@ -268,11 +268,11 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
// Type0 PDCCH search space
dl_config->number_pdus = 1;
dl_config->dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0x1234; // to be set
uint64_t mask = 0x0;
uint16_t num_rbs=48;
uint16_t rb_offset=47;
uint16_t num_rbs=24;
uint16_t rb_offset=0;
uint16_t cell_id=0;
uint16_t num_symbols=2;
for(int i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
@@ -283,16 +283,16 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset; // additional parameter other than coreset
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.duration = num_symbols;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_INTERLEAVED;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_NON_INTERLEAVED;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 0; // L 38.211 7.3.2.2
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 0; // R 38.211 7.3.2.2
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_shift_index = cell_id;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.pdcch_dmrs_scrambling_id = cell_id;
uint32_t number_of_search_space_per_slot=1;
uint32_t first_symbol_index=0;
uint32_t search_space_duration=1; // element of search space
uint32_t search_space_duration=0; // element of search space
uint32_t coreset_duration; // element of coreset
coreset_duration = num_symbols * number_of_search_space_per_slot;
@@ -308,4 +308,5 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106;
return 0;
}
-6
View File
@@ -44,17 +44,11 @@ extern LogicalChannelConfig_t SRB1_logicalChannelConfig_defaultValue;
extern LogicalChannelConfig_t SRB2_logicalChannelConfig_defaultValue;
#ifndef PHY_EMUL
#ifndef PHYSIM
//#define NB_INST 1
#else
extern unsigned char NB_INST;
#endif
extern unsigned char NB_eNB_INST;
extern unsigned char NB_UE_INST;
extern unsigned short NODE_ID[1];
extern void* bigphys_malloc(int);
#endif
//CONSTANTS
+12 -5
View File
@@ -747,15 +747,21 @@ void do_SERVINGCELLCONFIGCOMMON(uint8_t Mod_id,
//ssb_PositionsInBurst
(*servingcellconfigcommon)->ssb_PositionsInBurst->present = configuration->ServingCellConfigCommon_ssb_PositionsInBurst_PR[CC_id];
if((*servingcellconfigcommon)->ssb_PositionsInBurst->present == NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap){
uint64_t t_freq;
if(configuration->nr_band[CC_id] == 41 || (configuration->nr_band[CC_id] > 76 && configuration->nr_band[CC_id] < 80))
t_freq = 2400000000;
else
t_freq = 3000000000;
if(configuration->downlink_frequency[CC_id]<t_freq){
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.shortBitmap.size = 1;
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.shortBitmap.bits_unused = 4;
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.shortBitmap.buf[0] = 0x0f;
}else if((*servingcellconfigcommon)->ssb_PositionsInBurst->present == NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap){
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.shortBitmap.buf[0] = configuration->ServingCellConfigCommon_ssb_PositionsInBurst_PR[CC_id];
}else if(configuration->downlink_frequency[CC_id]<6000000000){
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.mediumBitmap.size = 1;
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.mediumBitmap.bits_unused = 0;
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.mediumBitmap.buf[0] = 0xff;
}else if((*servingcellconfigcommon)->ssb_PositionsInBurst->present == NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap){
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.mediumBitmap.buf[0] = configuration->ServingCellConfigCommon_ssb_PositionsInBurst_PR[CC_id];
}else {
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.longBitmap.size = 8;
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.longBitmap.bits_unused = 0;
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.longBitmap.buf[0] = 0xff;
@@ -768,6 +774,7 @@ void do_SERVINGCELLCONFIGCOMMON(uint8_t Mod_id,
(*servingcellconfigcommon)->ssb_PositionsInBurst->choice.longBitmap.buf[7] = 0xff;
}
//ssb_periodicityServingCell
*(*servingcellconfigcommon)->ssb_periodicityServingCell = configuration->ServingCellConfigCommon_ssb_periodicityServingCell[CC_id];
//dmrs_TypeA_Position
-6
View File
@@ -43,17 +43,11 @@ extern LogicalChannelConfig_t SRB1_logicalChannelConfig_defaultValue;
extern LogicalChannelConfig_t SRB2_logicalChannelConfig_defaultValue;
#ifndef PHY_EMUL
#ifndef PHYSIM
//#define NB_INST 1
#else
extern unsigned char NB_INST;
#endif
extern unsigned char NB_eNB_INST;
extern unsigned char NB_UE_INST;
extern unsigned short NODE_ID[1];
extern void* bigphys_malloc(int);
#endif
//CONSTANTS
+4 -2
View File
@@ -235,7 +235,7 @@ static void init_NR_SI(const protocol_ctxt_t* const ctxt_pP,
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].Ncp_UL = configuration->UL_prefix_type[CC_id];
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].dl_CarrierFreq = configuration->downlink_frequency[CC_id];
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].ul_CarrierFreq = configuration->downlink_frequency[CC_id]+ configuration->uplink_frequency_offset[CC_id];
///MIB
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].sizeof_MIB = 0;
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].MIB = (uint8_t*) malloc16(4);
@@ -260,11 +260,13 @@ static void init_NR_SI(const protocol_ctxt_t* const ctxt_pP,
LOG_I(NR_RRC,"Done init_NR_SI\n");
rrc_mac_config_req_gNB(ctxt_pP->module_id,
CC_id,
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].physCellId,
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].p_gNB,
configuration->nr_band[CC_id],
configuration->ServingCellConfigCommon_ssb_PositionsInBurst_PR[CC_id],
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].dl_CarrierFreq,
configuration->N_RB_DL[CC_id],
(NR_BCCH_BCH_Message_t *)&RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].mib,
+18 -19
View File
@@ -322,25 +322,24 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
(const void *)bufferP,
buffer_len );
if(bcch_message->message.choice.mib->systemFrameNumber.buf != 0){
if ((dec_rval.code != RC_OK) || (dec_rval.consumed == 0)) {
printf("NR_CellGroupConfig decode error\n");
for (i=0; i<buffer_len; i++){
printf("%02x ",bufferP[i]);
}
printf("\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message, 1 );
return -1;
}
// link to rrc instance
mib = bcch_message->message.choice.mib;
//memcpy( (void *)mib,
// (void *)&bcch_message->message.choice.mib,
// sizeof(NR_MIB_t) );
nr_rrc_mac_config_req_ue( 0, 0, 0, mib, NULL, NULL, NULL);
if ((dec_rval.code != RC_OK) || (dec_rval.consumed == 0)) {
printf("NR_BCCH_BCH decode error\n");
for (i=0; i<buffer_len; i++){
printf("%02x ",bufferP[i]);
}
printf("\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message, 1 );
return -1;
}
else {
// link to rrc instance
mib = bcch_message->message.choice.mib;
//memcpy( (void *)mib,
// (void *)&bcch_message->message.choice.mib,
// sizeof(NR_MIB_t) );
nr_rrc_mac_config_req_ue( 0, 0, 0, mib, NULL, NULL, NULL);
}
return 0;