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Merge branch 'develop' into feature-38-bladerf

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Conflicts:
	targets/RT/USER/lte-softmodem.c
This commit is contained in:
Raymond Knopp
2015-12-27 11:42:41 +01:00
parent 8da8de7297 244699fcfb
commit 1ff2c0d3f4
61 changed files with 6591 additions and 738 deletions
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targets/ARCH/BLADERF/USERSPACE/LIB/bladerf_lib.c
+682 -24
View File
@@ -132,15 +132,16 @@ static int trx_brf_read(openair0_device *device, openair0_timestamp *ptimestamp,
brf->meta_rx.flags = BLADERF_META_FLAG_RX_NOW;
status = bladerf_sync_rx(brf->dev, samples, (unsigned int) nsamps, &brf->meta_rx, 2*brf->rx_timeout_ms);
//printf("Current RX timestampe %u, nsamps %u, actual %u, cc %d\n", brf->meta_rx.timestamp, nsamps, brf->meta_rx.actual_count, cc);
// printf("Current RX timestampe %u, nsamps %u, actual %u, cc %d\n", brf->meta_rx.timestamp, nsamps, brf->meta_rx.actual_count, cc);
if (status != 0) {
fprintf(stderr, "RX failed: %s\n", bladerf_strerror(status));
// printf("RX failed: %s\n", bladerf_strerror(status));
brf->num_rx_errors++;
} else if ( brf->meta_rx.status & BLADERF_META_STATUS_OVERRUN) {
brf->num_overflows++;
fprintf(stderr, "RX overrun (%d) is detected. t=%u. Got %u samples. nsymps %d\n",
brf->num_overflows,brf->meta_rx.timestamp, brf->meta_rx.actual_count, nsamps);
printf("RX overrun (%d) is detected. t=%u. Got %u samples. nsymps %d\n",
brf->num_overflows,brf->meta_rx.timestamp, brf->meta_rx.actual_count, nsamps);
}
//printf("Current RX timestampe %u\n", brf->meta_rx.timestamp);
//printf("[BRF] (buff %p) ts=0x%"PRIu64" %s\n",samples, brf->meta_rx.timestamp,bladerf_strerror(status));
@@ -192,6 +193,23 @@ int trx_brf_stop(openair0_device* device) {
int trx_brf_set_freq(openair0_device* device) {
int status;
brf_state_t *brf = (brf_state_t *)device->priv;
openair0_config_t *openair0_cfg = (openair0_config_t *)device->openair0_cfg;
if ((status=bladerf_set_frequency(brf->dev, BLADERF_MODULE_TX, (unsigned int) openair0_cfg->tx_freq[0])) != 0){
fprintf(stderr,"Failed to set TX frequency: %s\n",bladerf_strerror(status));
brf_error(status);
}else
printf("[BRF] set TX Frequency to %u\n", (unsigned int) openair0_cfg->tx_freq[0]);
if ((status=bladerf_set_frequency(brf->dev, BLADERF_MODULE_RX, (unsigned int) openair0_cfg->rx_freq[0])) != 0){
fprintf(stderr,"Failed to set RX frequency: %s\n",bladerf_strerror(status));
brf_error(status);
} else
printf("[BRF] set RX frequency to %u\n",(unsigned int)openair0_cfg->rx_freq[0]);
return(0);
}
@@ -201,6 +219,609 @@ int trx_brf_set_gains(openair0_device* device) {
}
#define RXDCLENGTH 16384
int16_t cos_fsover8[8] = {2047, 1447, 0, -1448, -2047, -1448, 0, 1447};
int16_t cos_3fsover8[8] = {2047, -1448, 0, 1447, -2047, 1447, 0, -1448};
rx_gain_calib_table_t calib_table_fx4[] = {
{2300000000.0,53.5},
{1880000000.0,57.0},
{816000000.0,73.0},
{-1,0}};
void set_rx_gain_offset(openair0_config_t *openair0_cfg, int chain_index) {
int i=0;
// loop through calibration table to find best adjustment factor for RX frequency
double min_diff = 6e9,diff;
while (openair0_cfg->rx_gain_calib_table[i].freq>0) {
diff = fabs(openair0_cfg->rx_freq[chain_index] - openair0_cfg->rx_gain_calib_table[i].freq);
printf("cal %d: freq %f, offset %f, diff %f\n",
i,
openair0_cfg->rx_gain_calib_table[i].freq,
openair0_cfg->rx_gain_calib_table[i].offset,diff);
if (min_diff > diff) {
min_diff = diff;
openair0_cfg->rx_gain_offset[chain_index] = openair0_cfg->rx_gain_calib_table[i].offset;
}
i++;
}
}
void calibrate_rf(openair0_device *device) {
brf_state_t *brf = (brf_state_t *)device->priv;
openair0_timestamp ptimestamp;
int16_t *calib_buffp,*calib_tx_buffp;
int16_t calib_buff[2*RXDCLENGTH];
int16_t calib_tx_buff[2*RXDCLENGTH];
int i,j,offI,offQ,offIold,offQold,offInew,offQnew,offphase,offphaseold,offphasenew,offgain,offgainold,offgainnew;
int32_t meanI,meanQ,meanIold,meanQold;
int cnt=0,loop;
// put TX on a far-away frequency to avoid interference in RX band
bladerf_set_frequency(brf->dev,BLADERF_MODULE_TX, (unsigned int) device->openair0_cfg->rx_freq[0] + 200e6);
// Set gains to close to max
bladerf_set_gain(brf->dev, BLADERF_MODULE_RX, 60);
bladerf_set_gain(brf->dev, BLADERF_MODULE_TX, 60);
// fill TX buffer with fs/8 complex sinusoid
j=0;
for (i=0;i<RXDCLENGTH;i++) {
calib_tx_buff[j++] = cos_fsover8[i&7];
calib_tx_buff[j++] = cos_fsover8[(i+6)&7]; // sin
}
calib_buffp = &calib_buff[0];
calib_tx_buffp = &calib_tx_buff[0];
// Calibrate RX DC offset
offIold=offQold=2048;
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_LMS_DCOFF_I,offIold);
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_LMS_DCOFF_Q,offQold);
for (i=0;i<10;i++)
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
for (meanIold=meanQold=i=j=0;i<RXDCLENGTH;i++) {
meanIold+=calib_buff[j++];
meanQold+=calib_buff[j++];
}
meanIold/=RXDCLENGTH;
meanQold/=RXDCLENGTH;
printf("[BRF] RX DC: (%d,%d) => (%d,%d)\n",offIold,offQold,meanIold,meanQold);
offI=offQ=-2048;
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_LMS_DCOFF_I,offI);
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_LMS_DCOFF_Q,offQ);
for (i=0;i<10;i++)
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+=calib_buff[j++];
meanQ+=calib_buff[j++];
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
// printf("[BRF] RX DC: (%d,%d) => (%d,%d)\n",offI,offQ,meanI,meanQ);
while (cnt++ < 12) {
offInew=(offIold+offI)>>1;
offQnew=(offQold+offQ)>>1;
if (meanI*meanI < meanIold*meanIold) {
meanIold = meanI;
offIold = offI;
printf("[BRF] *** RX DC: offI %d => %d\n",offIold,meanI);
}
if (meanQ*meanQ < meanQold*meanQold) {
meanQold = meanQ;
offQold = offQ;
printf("[BRF] *** RX DC: offQ %d => %d\n",offQold,meanQ);
}
offI = offInew;
offQ = offQnew;
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_LMS_DCOFF_I,offI);
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_LMS_DCOFF_Q,offQ);
for (i=0;i<10;i++)
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+=calib_buff[j++];
meanQ+=calib_buff[j++];
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
printf("[BRF] RX DC: (%d,%d) => (%d,%d)\n",offI,offQ,meanI,meanQ);
}
printf("[BRF] RX DC: (%d,%d) => (%d,%d)\n",offIold,offQold,meanIold,meanQold);
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_LMS_DCOFF_I,offIold);
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_LMS_DCOFF_Q,offQold);
// TX DC offset
// PUT TX as f_RX + fs/4
// loop back BLADERF_LB_RF_LNA1
bladerf_set_frequency(brf->dev,BLADERF_MODULE_TX, (unsigned int) device->openair0_cfg->rx_freq[0] + (unsigned int) device->openair0_cfg->sample_rate/4);
bladerf_set_loopback (brf->dev,BLADERF_LB_RF_LNA1);
offIold=2048;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_I,offIold);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
for (meanIold=meanQold=i=j=0;i<RXDCLENGTH;i++) {
switch (i&3) {
case 0:
meanIold+=calib_buff[j++];
break;
case 1:
meanQold+=calib_buff[j++];
break;
case 2:
meanIold-=calib_buff[j++];
break;
case 3:
meanQold-=calib_buff[j++];
break;
}
}
// meanIold/=RXDCLENGTH;
// meanQold/=RXDCLENGTH;
printf("[BRF] TX DC (offI): %d => (%d,%d)\n",offIold,meanIold,meanQold);
offI=-2048;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_I,offI);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
switch (i&3) {
case 0:
meanI+=calib_buff[j++];
break;
case 1:
meanQ+=calib_buff[j++];
break;
case 2:
meanI-=calib_buff[j++];
break;
case 3:
meanQ-=calib_buff[j++];
break;
}
}
// meanI/=RXDCLENGTH;
// meanQ/=RXDCLENGTH;
printf("[BRF] TX DC (offI): %d => (%d,%d)\n",offI,meanI,meanQ);
cnt = 0;
while (cnt++ < 12) {
offInew=(offIold+offI)>>1;
if (meanI*meanI+meanQ*meanQ < meanIold*meanIold +meanQold*meanQold) {
printf("[BRF] TX DC (offI): ([%d,%d]) => %d : %d\n",offIold,offI,offInew,meanI*meanI+meanQ*meanQ);
meanIold = meanI;
meanQold = meanQ;
offIold = offI;
}
offI = offInew;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_I,offI);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
switch (i&3) {
case 0:
meanI+=calib_buff[j++];
break;
case 1:
meanQ+=calib_buff[j++];
break;
case 2:
meanI-=calib_buff[j++];
break;
case 3:
meanQ-=calib_buff[j++];
break;
}
}
// meanI/=RXDCLENGTH;
// meanQ/=RXDCLENGTH;
// printf("[BRF] TX DC (offI): %d => (%d,%d)\n",offI,meanI,meanQ);
}
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_I,offIold);
offQold=2048;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_Q,offQold);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on fs/4
for (meanIold=meanQold=i=j=0;i<RXDCLENGTH;i++) {
switch (i&3) {
case 0:
meanIold+=calib_buff[j++];
break;
case 1:
meanQold+=calib_buff[j++];
break;
case 2:
meanIold-=calib_buff[j++];
break;
case 3:
meanQold-=calib_buff[j++];
break;
}
}
// meanIold/=RXDCLENGTH;
// meanQold/=RXDCLENGTH;
printf("[BRF] TX DC (offQ): %d => (%d,%d)\n",offQold,meanIold,meanQold);
offQ=-2048;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_Q,offQ);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
switch (i&3) {
case 0:
meanI+=calib_buff[j++];
break;
case 1:
meanQ+=calib_buff[j++];
break;
case 2:
meanI-=calib_buff[j++];
break;
case 3:
meanQ-=calib_buff[j++];
break;
}
}
// meanI/=RXDCLENGTH;
// meanQ/=RXDCLENGTH;
printf("[BRF] TX DC (offQ): %d => (%d,%d)\n",offQ,meanI,meanQ);
cnt=0;
while (cnt++ < 12) {
offQnew=(offQold+offQ)>>1;
if (meanI*meanI+meanQ*meanQ < meanIold*meanIold +meanQold*meanQold) {
printf("[BRF] TX DC (offQ): ([%d,%d]) => %d : %d\n",offQold,offQ,offQnew,meanI*meanI+meanQ*meanQ);
meanIold = meanI;
meanQold = meanQ;
offQold = offQ;
}
offQ = offQnew;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_Q,offQ);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
switch (i&3) {
case 0:
meanI+=calib_buff[j++];
break;
case 1:
meanQ+=calib_buff[j++];
break;
case 2:
meanI-=calib_buff[j++];
break;
case 3:
meanQ-=calib_buff[j++];
break;
}
}
// meanI/=RXDCLENGTH;
// meanQ/=RXDCLENGTH;
// printf("[BRF] TX DC (offQ): %d => (%d,%d)\n",offQ,meanI,meanQ);
}
printf("[BRF] TX DC: (%d,%d) => (%d,%d)\n",offIold,offQold,meanIold,meanQold);
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_LMS_DCOFF_Q,offQold);
// TX IQ imbalance
for (loop=0;loop<2;loop++) {
offphaseold=4096;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_PHASE,offphaseold);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on fs/8 (Image of TX signal in +ve frequencies)
for (meanIold=meanQold=i=j=0;i<RXDCLENGTH;i++) {
meanIold+= (calib_buff[j]*cos_fsover8[i&7] - calib_buff[j+1]*cos_fsover8[(i+2)&7])>>11;
meanQold+= (calib_buff[j]*cos_fsover8[(i+2)&7] + calib_buff[j+1]*cos_fsover8[i&7])>>11;
j+=2;
}
meanIold/=RXDCLENGTH;
meanQold/=RXDCLENGTH;
printf("[BRF] TX IQ (offphase): %d => (%d,%d)\n",offphaseold,meanIold,meanQold);
offphase=-4096;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_PHASE,offphase);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on fs/8 (Image of TX signal in +ve frequencies)
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+= (calib_buff[j]*cos_fsover8[i&7] - calib_buff[j+1]*cos_fsover8[(i+2)&7])>>11;
meanQ+= (calib_buff[j]*cos_fsover8[(i+2)&7] + calib_buff[j+1]*cos_fsover8[i&7])>>11;
j+=2;
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
printf("[BRF] TX IQ (offphase): %d => (%d,%d)\n",offphase,meanI,meanQ);
cnt=0;
while (cnt++ < 13) {
offphasenew=(offphaseold+offphase)>>1;
printf("[BRF] TX IQ (offphase): ([%d,%d]) => %d : %d\n",offphaseold,offphase,offphasenew,meanI*meanI+meanQ*meanQ);
if (meanI*meanI+meanQ*meanQ < meanIold*meanIold +meanQold*meanQold) {
meanIold = meanI;
meanQold = meanQ;
offphaseold = offphase;
}
offphase = offphasenew;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_PHASE,offphase);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on fs/8 (Image of TX signal in +ve frequencies)
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+= (calib_buff[j]*cos_fsover8[i&7] - calib_buff[j+1]*cos_fsover8[(i+2)&7])>>11;
meanQ+= (calib_buff[j]*cos_fsover8[(i+2)&7] + calib_buff[j+1]*cos_fsover8[i&7])>>11;
j+=2;
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
// printf("[BRF] TX DC (offQ): %d => (%d,%d)\n",offQ,meanI,meanQ);
}
printf("[BRF] TX IQ offphase: %d => (%d,%d)\n",offphaseold,meanIold,meanQold);
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_PHASE,offphaseold);
offgainold=4096;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_GAIN,offgainold);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on fs/8 (Image of TX signal in +ve frequencies)
for (meanIold=meanQold=i=j=0;i<RXDCLENGTH;i++) {
meanIold+= (calib_buff[j]*cos_fsover8[i&7] - calib_buff[j+1]*cos_fsover8[(i+2)&7])>>11;
meanQold+= (calib_buff[j]*cos_fsover8[(i+2)&7] + calib_buff[j+1]*cos_fsover8[i&7])>>11;
j+=2;
}
meanIold/=RXDCLENGTH;
meanQold/=RXDCLENGTH;
printf("[BRF] TX IQ (offgain): %d => (%d,%d)\n",offgainold,meanIold,meanQold);
offgain=-4096;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_GAIN,offgain);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on fs/8 (Image of TX signal in +ve frequencies)
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+= (calib_buff[j]*cos_fsover8[i&7] - calib_buff[j+1]*cos_fsover8[(i+2)&7])>>11;
meanQ+= (calib_buff[j]*cos_fsover8[(i+2)&7] + calib_buff[j+1]*cos_fsover8[i&7])>>11;
j+=2;
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
printf("[BRF] TX IQ (offgain): %d => (%d,%d)\n",offgain,meanI,meanQ);
cnt=0;
while (cnt++ < 13) {
offgainnew=(offgainold+offgain)>>1;
if (meanI*meanI+meanQ*meanQ < meanIold*meanIold +meanQold*meanQold) {
printf("[BRF] TX IQ (offgain): ([%d,%d]) => %d : %d\n",offgainold,offgain,offgainnew,meanI*meanI+meanQ*meanQ);
meanIold = meanI;
meanQold = meanQ;
offgainold = offgain;
}
offgain = offgainnew;
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_GAIN,offgain);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on fs/8 (Image of TX signal in +ve frequencies)
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+= (calib_buff[j]*cos_fsover8[i&7] - calib_buff[j+1]*cos_fsover8[(i+2)&7])>>11;
meanQ+= (calib_buff[j]*cos_fsover8[(i+2)&7] + calib_buff[j+1]*cos_fsover8[i&7])>>11;
j+=2;
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
// printf("[BRF] TX DC (offQ): %d => (%d,%d)\n",offQ,meanI,meanQ);
}
printf("[BRF] TX IQ offgain: %d => (%d,%d)\n",offgainold,meanIold,meanQold);
bladerf_set_correction(brf->dev,BLADERF_MODULE_TX,BLADERF_CORR_FPGA_GAIN,offgainold);
}
// RX IQ imbalance
for (loop=0;loop<2;loop++) {
offphaseold=4096;
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_PHASE,offphaseold);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on -3fs/8 (Image of TX signal in -ve frequencies)
for (meanIold=meanQold=i=j=0;i<RXDCLENGTH;i++) {
meanIold+= (calib_buff[j]*cos_3fsover8[i&7] - calib_buff[j+1]*cos_3fsover8[(i+2)&7])>>11;
meanQold+= (calib_buff[j]*cos_3fsover8[(i+2)&7] + calib_buff[j+1]*cos_3fsover8[i&7])>>11;
j+=2;
}
meanIold/=RXDCLENGTH;
meanQold/=RXDCLENGTH;
printf("[BRF] RX IQ (offphase): %d => (%d,%d)\n",offphaseold,meanIold,meanQold);
offphase=-4096;
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_PHASE,offphase);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on -3fs/8 (Image of TX signal in -ve frequencies)
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+= (calib_buff[j]*cos_3fsover8[i&7] - calib_buff[j+1]*cos_3fsover8[(i+2)&7])>>11;
meanQ+= (calib_buff[j]*cos_3fsover8[(i+2)&7] + calib_buff[j+1]*cos_3fsover8[i&7])>>11;
j+=2;
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
printf("[BRF] RX IQ (offphase): %d => (%d,%d)\n",offphase,meanI,meanQ);
cnt=0;
while (cnt++ < 13) {
offphasenew=(offphaseold+offphase)>>1;
printf("[BRF] RX IQ (offphase): ([%d,%d]) => %d : %d\n",offphaseold,offphase,offphasenew,meanI*meanI+meanQ*meanQ);
if (meanI*meanI+meanQ*meanQ < meanIold*meanIold +meanQold*meanQold) {
meanIold = meanI;
meanQold = meanQ;
offphaseold = offphase;
}
offphase = offphasenew;
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_PHASE,offphase);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on -3fs/8 (Image of TX signal in -ve frequencies)
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+= (calib_buff[j]*cos_3fsover8[i&7] - calib_buff[j+1]*cos_3fsover8[(i+2)&7])>>11;
meanQ+= (calib_buff[j]*cos_3fsover8[(i+2)&7] + calib_buff[j+1]*cos_3fsover8[i&7])>>11;
j+=2;
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
// printf("[BRF] TX DC (offQ): %d => (%d,%d)\n",offQ,meanI,meanQ);
}
printf("[BRF] RX IQ offphase: %d => (%d,%d)\n",offphaseold,meanIold,meanQold);
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_PHASE,offphaseold);
offgainold=4096;
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_GAIN,offgainold);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on -3fs/8 (Image of TX signal in +ve frequencies)
for (meanIold=meanQold=i=j=0;i<RXDCLENGTH;i++) {
meanIold+= (calib_buff[j]*cos_3fsover8[i&7] - calib_buff[j+1]*cos_3fsover8[(i+2)&7])>>11;
meanQold+= (calib_buff[j]*cos_3fsover8[(i+2)&7] + calib_buff[j+1]*cos_3fsover8[i&7])>>11;
j+=2;
}
meanIold/=RXDCLENGTH;
meanQold/=RXDCLENGTH;
printf("[BRF] RX IQ (offgain): %d => (%d,%d)\n",offgainold,meanIold,meanQold);
offgain=-4096;
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_GAIN,offgain);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on 3fs/8 (Image of TX signal in -ve frequencies)
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+= (calib_buff[j]*cos_3fsover8[i&7] - calib_buff[j+1]*cos_3fsover8[(i+2)&7])>>11;
meanQ+= (calib_buff[j]*cos_3fsover8[(i+2)&7] + calib_buff[j+1]*cos_3fsover8[i&7])>>11;
j+=2;
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
printf("[BRF] RX IQ (offgain): %d => (%d,%d)\n",offgain,meanI,meanQ);
cnt=0;
while (cnt++ < 13) {
offgainnew=(offgainold+offgain)>>1;
if (meanI*meanI+meanQ*meanQ < meanIold*meanIold +meanQold*meanQold) {
printf("[BRF] RX IQ (offgain): ([%d,%d]) => %d : %d\n",offgainold,offgain,offgainnew,meanI*meanI+meanQ*meanQ);
meanIold = meanI;
meanQold = meanQ;
offgainold = offgain;
}
offgain = offgainnew;
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_GAIN,offgain);
for (i=0;i<10;i++) {
trx_brf_read(device, &ptimestamp, (void **)&calib_buffp, RXDCLENGTH, 0);
trx_brf_write(device,ptimestamp+5*RXDCLENGTH, (void **)&calib_tx_buffp, RXDCLENGTH, 0);
}
// project on -3fs/8 (Image of TX signal in -ve frequencies)
for (meanI=meanQ=i=j=0;i<RXDCLENGTH;i++) {
meanI+= (calib_buff[j]*cos_3fsover8[i&7] - calib_buff[j+1]*cos_3fsover8[(i+2)&7])>>11;
meanQ+= (calib_buff[j]*cos_3fsover8[(i+2)&7] + calib_buff[j+1]*cos_3fsover8[i&7])>>11;
j+=2;
}
meanI/=RXDCLENGTH;
meanQ/=RXDCLENGTH;
// printf("[BRF] TX DC (offQ): %d => (%d,%d)\n",offQ,meanI,meanQ);
}
printf("[BRF] RX IQ offgain: %d => (%d,%d)\n",offgainold,meanIold,meanQold);
bladerf_set_correction(brf->dev,BLADERF_MODULE_RX,BLADERF_CORR_FPGA_GAIN,offgainold);
}
bladerf_set_frequency(brf->dev,BLADERF_MODULE_TX, (unsigned int) device->openair0_cfg->tx_freq[0]);
bladerf_set_loopback(brf->dev,BLADERF_LB_NONE);
bladerf_set_gain(brf->dev, BLADERF_MODULE_RX, (unsigned int) device->openair0_cfg->rx_gain[0]-device->openair0_cfg[0].rx_gain_offset[0]);
bladerf_set_gain(brf->dev, BLADERF_MODULE_TX, (unsigned int) device->openair0_cfg->tx_gain[0]);
// write_output("blade_rf_test.m","rxs",calib_buff,RXDCLENGTH,1,1);
}
int openair0_dev_init_bladerf(openair0_device *device, openair0_config_t *openair0_cfg) {
int status;
@@ -208,16 +829,45 @@ int openair0_dev_init_bladerf(openair0_device *device, openair0_config_t *openai
brf_state_t *brf = (brf_state_t*)malloc(sizeof(brf_state_t));
memset(brf, 0, sizeof(brf_state_t));
// init required params for [97448.145250] lte-softmodem-n[20648]: segfault at 0 ip (null) sp 00007fff220167b8 error 14 in lte-softmodem-nos1[400000+3bc000]
// init required params
switch ((int)openair0_cfg->sample_rate) {
case 30720000:
openair0_cfg->samples_per_packet = 2048;
openair0_cfg->tx_sample_advance = 0;
openair0_cfg->tx_scheduling_advance = 8*openair0_cfg->samples_per_packet;
break;
case 15360000:
openair0_cfg->samples_per_packet = 2048;
openair0_cfg->tx_sample_advance = 0;
openair0_cfg->tx_scheduling_advance = 4*openair0_cfg->samples_per_packet;
break;
case 7680000:
openair0_cfg->samples_per_packet = 1024;
openair0_cfg->tx_sample_advance = 0;
openair0_cfg->tx_scheduling_advance = 4*openair0_cfg->samples_per_packet;
break;
case 1920000:
openair0_cfg->samples_per_packet = 256;
openair0_cfg->tx_sample_advance = 50;
openair0_cfg->tx_scheduling_advance = 8*openair0_cfg->samples_per_packet;
break;
default:
printf("Error: unknown sampling rate %f\n",openair0_cfg->sample_rate);
exit(-1);
break;
}
openair0_cfg->rx_gain_calib_table = calib_table_fx4;
// The number of buffers to use in the underlying data stream
brf->num_buffers = 128;
// the size of the underlying stream buffers, in samples
brf->buffer_size = (unsigned int) openair0_cfg[card].samples_per_packet;//*sizeof(int32_t); // buffer size = 4096 for sample_len of 1024
brf->buffer_size = (unsigned int) openair0_cfg->samples_per_packet;//*sizeof(int32_t); // buffer size = 4096 for sample_len of 1024
brf->num_transfers = 16;
brf->rx_timeout_ms = 0;
brf->tx_timeout_ms = 0;
brf->sample_rate=(unsigned int)openair0_cfg[card].sample_rate;
brf->sample_rate=(unsigned int)openair0_cfg->sample_rate;
memset(&brf->meta_rx, 0, sizeof(brf->meta_rx));
memset(&brf->meta_tx, 0, sizeof(brf->meta_tx));
@@ -241,57 +891,60 @@ int openair0_dev_init_bladerf(openair0_device *device, openair0_config_t *openai
// RX
// Example of CLI output: RX Frequency: 2539999999Hz
if ((status=bladerf_set_frequency(brf->dev, BLADERF_MODULE_RX, (unsigned int) openair0_cfg[card].rx_freq[0])) != 0){
if ((status=bladerf_set_frequency(brf->dev, BLADERF_MODULE_RX, (unsigned int) openair0_cfg->rx_freq[0])) != 0){
fprintf(stderr,"Failed to set RX frequency: %s\n",bladerf_strerror(status));
brf_error(status);
} else
printf("[BRF] set RX frequency to %u\n",(unsigned int)openair0_cfg[card].rx_freq[0]);
printf("[BRF] set RX frequency to %u\n",(unsigned int)openair0_cfg->rx_freq[0]);
unsigned int actual_value=0;
if ((status=bladerf_set_sample_rate(brf->dev, BLADERF_MODULE_RX, (unsigned int) openair0_cfg[card].sample_rate, &actual_value)) != 0){
if ((status=bladerf_set_sample_rate(brf->dev, BLADERF_MODULE_RX, (unsigned int) openair0_cfg->sample_rate, &actual_value)) != 0){
fprintf(stderr,"Failed to set RX sample rate: %s\n", bladerf_strerror(status));
brf_error(status);
}else
printf("[BRF] set RX sample rate to %u, %u\n", (unsigned int) openair0_cfg[card].sample_rate, actual_value);
printf("[BRF] set RX sample rate to %u, %u\n", (unsigned int) openair0_cfg->sample_rate, actual_value);
if ((status=bladerf_set_bandwidth(brf->dev, BLADERF_MODULE_RX, (unsigned int) openair0_cfg[card].rx_bw*2, &actual_value)) != 0){
if ((status=bladerf_set_bandwidth(brf->dev, BLADERF_MODULE_RX, (unsigned int) openair0_cfg->rx_bw*2, &actual_value)) != 0){
fprintf(stderr,"Failed to set RX bandwidth: %s\n", bladerf_strerror(status));
brf_error(status);
}else
printf("[BRF] set RX bandwidth to %u, %u\n",(unsigned int)openair0_cfg[card].rx_bw*2, actual_value);
printf("[BRF] set RX bandwidth to %u, %u\n",(unsigned int)openair0_cfg->rx_bw*2, actual_value);
if ((status=bladerf_set_gain(brf->dev, BLADERF_MODULE_RX, (int) openair0_cfg[card].rx_gain[0])) != 0) {
set_rx_gain_offset(&openair0_cfg[0],0);
if ((status=bladerf_set_gain(brf->dev, BLADERF_MODULE_RX, (int) openair0_cfg->rx_gain[0]-openair0_cfg[0].rx_gain_offset[0])) != 0) {
fprintf(stderr,"Failed to set RX gain: %s\n",bladerf_strerror(status));
brf_error(status);
} else
printf("[BRF] set RX gain to %d\n",(int)openair0_cfg[card].rx_gain[0]);
printf("[BRF] set RX gain to %d (%d)\n",(int)(openair0_cfg->rx_gain[0]-openair0_cfg[0].rx_gain_offset[0]),(int)openair0_cfg[0].rx_gain_offset[0]);
// TX
if ((status=bladerf_set_frequency(brf->dev, BLADERF_MODULE_TX, (unsigned int) openair0_cfg[card].tx_freq[0])) != 0){
if ((status=bladerf_set_frequency(brf->dev, BLADERF_MODULE_TX, (unsigned int) openair0_cfg->tx_freq[0])) != 0){
fprintf(stderr,"Failed to set TX frequency: %s\n",bladerf_strerror(status));
brf_error(status);
}else
printf("[BRF] set TX Frequenct to %u\n", (unsigned int) openair0_cfg[card].tx_freq[0]);
printf("[BRF] set TX Frequency to %u\n", (unsigned int) openair0_cfg->tx_freq[0]);
if ((status=bladerf_set_sample_rate(brf->dev, BLADERF_MODULE_TX, (unsigned int) openair0_cfg[card].sample_rate, NULL)) != 0){
if ((status=bladerf_set_sample_rate(brf->dev, BLADERF_MODULE_TX, (unsigned int) openair0_cfg->sample_rate, NULL)) != 0){
fprintf(stderr,"Failed to set TX sample rate: %s\n", bladerf_strerror(status));
brf_error(status);
}else
printf("[BRF] set TX sampling rate to %u \n", (unsigned int) openair0_cfg[card].sample_rate);
printf("[BRF] set TX sampling rate to %u \n", (unsigned int) openair0_cfg->sample_rate);
if ((status=bladerf_set_bandwidth(brf->dev, BLADERF_MODULE_TX,(unsigned int)openair0_cfg[card].tx_bw*2, NULL)) != 0){
if ((status=bladerf_set_bandwidth(brf->dev, BLADERF_MODULE_TX,(unsigned int)openair0_cfg->tx_bw*2, NULL)) != 0){
fprintf(stderr, "Failed to set TX bandwidth: %s\n", bladerf_strerror(status));
brf_error(status);
}else
printf("[BRF] set TX bandwidth to %u \n", (unsigned int) openair0_cfg[card].tx_bw*2);
printf("[BRF] set TX bandwidth to %u \n", (unsigned int) openair0_cfg->tx_bw*2);
if ((status=bladerf_set_gain(brf->dev, BLADERF_MODULE_TX, (int) openair0_cfg[card].tx_gain[0])) != 0) {
if ((status=bladerf_set_gain(brf->dev, BLADERF_MODULE_TX, (int) openair0_cfg->tx_gain[0])) != 0) {
fprintf(stderr,"Failed to set TX gain: %s\n",bladerf_strerror(status));
brf_error(status);
}else
printf("[BRF] set the TX gain to %d\n", (int)openair0_cfg[card].tx_gain[0]);
printf("[BRF] set the TX gain to %d\n", (int)openair0_cfg->tx_gain[0]);
/* Configure the device's TX module for use with the sync interface.
@@ -342,7 +995,8 @@ int openair0_dev_init_bladerf(openair0_device *device, openair0_config_t *openai
printf("[BRF] RX module calibrated DC \n");
*/
bladerf_log_set_verbosity(get_brf_log_level(openair0_cfg[card].log_level));
bladerf_log_set_verbosity(get_brf_log_level(openair0_cfg->log_level));
printf("BLADERF: Initializing openair0_device\n");
device->priv = brf;
@@ -356,7 +1010,11 @@ int openair0_dev_init_bladerf(openair0_device *device, openair0_config_t *openai
device->trx_stop_func = trx_brf_stop;
device->trx_set_freq_func = trx_brf_set_freq;
device->trx_set_gains_func = trx_brf_set_gains;
memcpy((void*)&device->openair0_cfg,(void*)openair0_cfg,sizeof(openair0_config_t));
device->openair0_cfg = openair0_cfg;
calibrate_rf(device);
// memcpy((void*)&device->openair0_cfg,(void*)&openair0_cfg[0],sizeof(openair0_config_t));
return 0;
}
targets/ARCH/COMMON/common_lib.c
+1 -1
View File
@@ -52,7 +52,7 @@ int openair0_device_init(openair0_device *device, openair0_config_t *openair0_cf
openair0_dev_init_exmimo(device, openair0_cfg);
printf("openair0_dev_init_exmimo...\n");
#elif OAI_USRP
device->type=USRP_IF;
device->type=USRP_B200_IF;
openair0_dev_init_usrp(device, openair0_cfg);
printf("openair0_dev_init_usrp ...\n");
#elif OAI_BLADERF
targets/ARCH/COMMON/common_lib.h
+20 -7
View File
@@ -60,6 +60,11 @@ typedef enum {
max_gain=0,med_gain,byp_gain
} rx_gain_t;
typedef enum {
duplex_mode_TDD=1,duplex_mode_FDD=0
} duplex_mode_t;
/** @addtogroup _PHY_RF_INTERFACE_
* @{
*/
@@ -76,6 +81,8 @@ typedef struct {
int Mod_id;
// device log level
int log_level;
//! duplexing mode
duplex_mode_t duplex_mode;
//! number of downlink resource blocks
int num_rb_dl;
//! number of samples per frame
@@ -84,10 +91,10 @@ typedef struct {
double sample_rate;
//! number of samples per RX/TX packet (USRP + Ethernet)
int samples_per_packet;
// delay in sending samples (write) due to hardware access, softmodem processing and fronthaul delay if exist
int tx_delay;
//! adjust the position of the samples after delay when sending
unsigned int tx_forward_nsamps;
//! delay in sending samples (write) due to hardware access, softmodem processing and fronthaul delay if exist
int tx_scheduling_advance;
//! offset in samples between TX and RX paths
int tx_sample_advance;
//! number of RX channels (=RX antennas)
int rx_num_channels;
//! number of TX channels (=TX antennas)
@@ -98,6 +105,10 @@ typedef struct {
//! \brief Center frequency in Hz for TX.
//! index: [0..rx_num_channels[ !!! see lte-ue.c:427 FIXME iterates over rx_num_channels
double tx_freq[4];
//! \brief Pointer to Calibration table for RX gains
rx_gain_calib_table_t *rx_gain_calib_table;
//! mode for rxgain (ExpressMIMO2)
rx_gain_t rxg_mode[4];
//! \brief Gain for RX in dB.
@@ -147,8 +158,10 @@ typedef enum {
ETH_IF,
/*!\brief device is ExpressMIMO */
EXMIMO_IF,
/*!\brief device is USRP*/
USRP_IF,
/*!\brief device is USRP B200/B210*/
USRP_B200_IF,
/*!\brief device is USRP X300/X310*/
USRP_X300_IF,
/*!\brief device is BLADE RF*/
BLADERF_IF,
/*!\brief device is NONE*/
@@ -180,7 +193,7 @@ struct openair0_device_t {
func_type_t func_type;
/* RF frontend parameters set by application */
openair0_config_t openair0_cfg;
openair0_config_t *openair0_cfg;
/* Can be used by driver to hold internal structure*/
void *priv;
targets/ARCH/EXMIMO/DEFS/pcie_interface.h
+7
View File
@@ -316,7 +316,9 @@ typedef struct {
//
// In TDD mode, there are two ways to control the RX/TX switch:
// 1. using the LSB from the TX data (TXRXSWITCH_LSB)
// only the LSB from RF chain set in the ACTIVE_RF register controls the switch on all the chains
// 2. using FPGA logic, based on switch_offset[0..3]
// this mode is not tested well and should be used with care
#define DUPLEXMODE_MASK (1<<0)
#define DUPLEXMODE_FDD 0
#define DUPLEXMODE_TDD (1<<0)
@@ -330,6 +332,11 @@ typedef struct {
#define SWITCHSTATE_1 (1<<3)
#define TEST_ADACLOOP_MASK (1<<4)
#define TEST_ADACLOOP_EN (1<<4)
#define RF_ACTIVE_MASK (15<<5)
#define RF_ACTIVE_1 (1<<5)
#define RF_ACTIVE_2 (2<<5)
#define RF_ACTIVE_3 (4<<5)
#define RF_ACTIVE_4 (8<<5)
typedef enum {
BW5,
targets/ARCH/EXMIMO/USERSPACE/LIB/openair0_lib.c
+11 -2
View File
@@ -296,6 +296,7 @@ int openair0_config(openair0_config_t *openair0_cfg, int UE_flag)
int ant, card;
int resampling_factor=2;
int rx_filter=RXLPF25, tx_filter=TXLPF25;
int ACTIVE_RF=0;
exmimo_config_t *p_exmimo_config;
exmimo_id_t *p_exmimo_id;
@@ -315,8 +316,6 @@ int openair0_config(openair0_config_t *openair0_cfg, int UE_flag)
else
p_exmimo_config->framing.eNB_flag = !UE_flag;
p_exmimo_config->framing.tdd_config = DUPLEXMODE_FDD + TXRXSWITCH_LSB;
if (openair0_num_detected_cards==1)
p_exmimo_config->framing.multicard_syncmode=SYNCMODE_FREE;
else if (card==0)
@@ -355,6 +354,7 @@ int openair0_config(openair0_config_t *openair0_cfg, int UE_flag)
for (ant=0; ant<4; ant++) {
if (openair0_cfg[card].rx_freq[ant] || openair0_cfg[card].tx_freq[ant]) {
ACTIVE_RF += (1<<ant)<<5;
p_exmimo_config->rf.rf_mode[ant] = RF_MODE_BASE;
p_exmimo_config->rf.do_autocal[ant] = 1;//openair0_cfg[card].autocal[ant];
printf("card %d, antenna %d, autocal %d\n",card,ant,openair0_cfg[card].autocal[ant]);
@@ -408,6 +408,15 @@ int openair0_config(openair0_config_t *openair0_cfg, int UE_flag)
}
}
if (openair0_cfg[card].duplex_mode==duplex_mode_FDD) {
p_exmimo_config->framing.tdd_config = DUPLEXMODE_FDD;
printf("!!!!!setting FDD (tdd_config=%d)\n",p_exmimo_config->framing.tdd_config);
}
else {
p_exmimo_config->framing.tdd_config = DUPLEXMODE_TDD + TXRXSWITCH_LSB + ACTIVE_RF;
printf("!!!!!setting TDD (tdd_config=%d)\n",p_exmimo_config->framing.tdd_config);
}
ret = ioctl(openair0_fd, openair_DUMP_CONFIG, card);
if (ret!=0)
targets/ARCH/EXMIMO/USERSPACE/OAI_FW_INIT/sdr_expressmimo2_v10
BIN
View File
Binary file not shown.
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+113 -25
View File
@@ -171,31 +171,45 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
#endif
if (cc>1) {
if (device->type == USRP_B200_IF) {
if (cc>1) {
// receive multiple channels (e.g. RF A and RF B)
std::vector<void *> buff_ptrs;
for (int i=0;i<cc;i++) buff_ptrs.push_back(buff_tmp[i]);
samples_received = s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md);
} else {
std::vector<void *> buff_ptrs;
for (int i=0;i<cc;i++) buff_ptrs.push_back(buff_tmp[i]);
samples_received = s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md);
} else {
// receive a single channel (e.g. from connector RF A)
samples_received = s->rx_stream->recv(buff_tmp[0], nsamps, s->rx_md);
}
samples_received = s->rx_stream->recv(buff_tmp[0], nsamps, s->rx_md);
}
// bring RX data into 12 LSBs for softmodem RX
for (int i=0;i<cc;i++) {
for (int j=0; j<nsamps2; j++) {
for (int i=0;i<cc;i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],4);
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],4);
#else
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],4);
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],4);
#endif
#elif defined(__arm__)
((int16x8_t*)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],4);
((int16x8_t*)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],4);
#endif
}
}
} else if (device->type == USRP_X300_IF) {
if (cc>1) {
// receive multiple channels (e.g. RF A and RF B)
std::vector<void *> buff_ptrs;
for (int i=0;i<cc;i++) buff_ptrs.push_back(buff[i]);
samples_received = s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md);
} else {
// receive a single channel (e.g. from connector RF A)
samples_received = s->rx_stream->recv(buff[0], nsamps, s->rx_md);
}
}
if (samples_received < nsamps) {
printf("[recv] received %d samples out of %d\n",samples_received,nsamps);
@@ -279,7 +293,7 @@ int trx_usrp_set_gains(openair0_device* device,
exit(-1);
}
s->usrp->set_rx_gain(openair0_cfg[0].rx_gain[0]-openair0_cfg[0].rx_gain_offset[0]);
printf("Setting USRP RX gain to %f\n", openair0_cfg[0].rx_gain[0]-openair0_cfg[0].rx_gain_offset[0]);
printf("Setting USRP RX gain to %f (rx_gain %f,gain_range.stop() %f)\n", openair0_cfg[0].rx_gain[0]-openair0_cfg[0].rx_gain_offset[0],openair0_cfg[0].rx_gain[0],gain_range.stop());
return(0);
}
@@ -289,7 +303,7 @@ int trx_usrp_stop(int card) {
}
rx_gain_calib_table_t calib_table[] = {
rx_gain_calib_table_t calib_table_b210[] = {
{3500000000.0,46.0},
{2660000000.0,53.0},
{2300000000.0,54.0},
@@ -297,19 +311,29 @@ rx_gain_calib_table_t calib_table[] = {
{816000000.0,62.0},
{-1,0}};
rx_gain_calib_table_t calib_table_x310[] = {
{3500000000.0,77.0},
{2660000000.0,80.0},
{2300000000.0,81.0},
{1880000000.0,82.0},
{816000000.0,85.0},
{-1,0}};
void set_rx_gain_offset(openair0_config_t *openair0_cfg, int chain_index) {
int i=0;
// loop through calibration table to find best adjustment factor for RX frequency
double min_diff = 6e9,diff;
while (calib_table[i].freq>0) {
diff = fabs(openair0_cfg->rx_freq[chain_index] - calib_table[i].freq);
while (openair0_cfg->rx_gain_calib_table[i].freq>0) {
diff = fabs(openair0_cfg->rx_freq[chain_index] - openair0_cfg->rx_gain_calib_table[i].freq);
printf("cal %d: freq %f, offset %f, diff %f\n",
i,calib_table[i].freq,calib_table[i].offset,diff);
i,
openair0_cfg->rx_gain_calib_table[i].freq,
openair0_cfg->rx_gain_calib_table[i].offset,diff);
if (min_diff > diff) {
min_diff = diff;
openair0_cfg->rx_gain_offset[chain_index] = calib_table[i].offset;
openair0_cfg->rx_gain_offset[chain_index] = openair0_cfg->rx_gain_calib_table[i].offset;
}
i++;
}
@@ -372,9 +396,43 @@ int openair0_dev_init_usrp(openair0_device* device, openair0_config_t *openair0_
// lock mboard clocks
s->usrp->set_clock_source("internal");
//Setting device type to USRP X300/X310
device->type=USRP_X300_IF;
// this is not working yet, master clock has to be set via constructor
// set master clock rate and sample rate for tx & rx for streaming
//s->usrp->set_master_clock_rate(usrp_master_clock);
openair0_cfg[0].rx_gain_calib_table = calib_table_x310;
switch ((int)openair0_cfg[0].sample_rate) {
case 30720000:
// from usrp_time_offset
openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 15;
openair0_cfg[0].tx_scheduling_advance = 8*openair0_cfg[0].samples_per_packet;
break;
case 15360000:
openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 45;
openair0_cfg[0].tx_scheduling_advance = 5*openair0_cfg[0].samples_per_packet;
break;
case 7680000:
openair0_cfg[0].samples_per_packet = 1024;
openair0_cfg[0].tx_sample_advance = 50;
openair0_cfg[0].tx_scheduling_advance = 5*openair0_cfg[0].samples_per_packet;
break;
case 1920000:
openair0_cfg[0].samples_per_packet = 256;
openair0_cfg[0].tx_sample_advance = 50;
openair0_cfg[0].tx_scheduling_advance = 8*openair0_cfg[0].samples_per_packet;
break;
default:
printf("Error: unknown sampling rate %f\n",openair0_cfg[0].sample_rate);
exit(-1);
break;
}
} else {
printf("Found USRP B200");
s->usrp = uhd::usrp::multi_usrp::make(args);
@@ -386,16 +444,46 @@ int openair0_dev_init_usrp(openair0_device* device, openair0_config_t *openair0_
// // lock mboard clocks
// s->usrp->set_clock_source("internal");
// set master clock rate and sample rate for tx & rx for streaming
device->type = USRP_B200_IF;
s->usrp->set_master_clock_rate(30.72e6);
openair0_cfg[0].rx_gain_calib_table = calib_table_b210;
switch ((int)openair0_cfg[0].sample_rate) {
case 30720000:
// from usrp_time_offset
openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 115;
openair0_cfg[0].tx_scheduling_advance = 11*openair0_cfg[0].samples_per_packet;
break;
case 15360000:
openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 113;
openair0_cfg[0].tx_scheduling_advance = 5*openair0_cfg[0].samples_per_packet;
break;
case 7680000:
openair0_cfg[0].samples_per_packet = 1024;
openair0_cfg[0].tx_sample_advance = 70;//103;
openair0_cfg[0].tx_scheduling_advance = 5*openair0_cfg[0].samples_per_packet;
break;
case 1920000:
openair0_cfg[0].samples_per_packet = 256;
openair0_cfg[0].tx_sample_advance = 40;
openair0_cfg[0].tx_scheduling_advance = 8*openair0_cfg[0].samples_per_packet;
break;
default:
printf("Error: unknown sampling rate %f\n",openair0_cfg[0].sample_rate);
exit(-1);
break;
}
}
for(i=0;i<s->usrp->get_rx_num_channels();i++) {
if (i<openair0_cfg[0].rx_num_channels) {
s->usrp->set_rx_rate(openair0_cfg[0].sample_rate,i);
s->usrp->set_rx_bandwidth(openair0_cfg[0].rx_bw,i);
printf("Setting rx freq/gain on channel %lu/%lu\n",i,s->usrp->get_rx_num_channels());
printf("Setting rx freq/gain on channel %lu/%lu : BW %f (readback %f)\n",i,s->usrp->get_rx_num_channels(),openair0_cfg[0].rx_bw/1e6,s->usrp->get_rx_bandwidth(i)/1e6);
s->usrp->set_rx_freq(openair0_cfg[0].rx_freq[i],i);
set_rx_gain_offset(&openair0_cfg[0],i);
@@ -416,7 +504,7 @@ int openair0_dev_init_usrp(openair0_device* device, openair0_config_t *openair0_
if (i<openair0_cfg[0].tx_num_channels) {
s->usrp->set_tx_rate(openair0_cfg[0].sample_rate,i);
s->usrp->set_tx_bandwidth(openair0_cfg[0].tx_bw,i);
printf("Setting tx freq/gain on channel %lu/%lu\n",i,s->usrp->get_tx_num_channels());
printf("Setting tx freq/gain on channel %lu/%lu: BW %f (readback %f)\n",i,s->usrp->get_tx_num_channels(),openair0_cfg[0].tx_bw/1e6,s->usrp->get_tx_bandwidth(i)/1e6);
s->usrp->set_tx_freq(openair0_cfg[0].tx_freq[i],i);
s->usrp->set_tx_gain(openair0_cfg[0].tx_gain[i],i);
}
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band38.tm1.exmimo2.conf
+4 -4
View File
@@ -17,7 +17,7 @@ eNBs =
mobile_country_code = "208";
mobile_network_code = "92";
mobile_network_code = "93";
////////// Physical parameters:
@@ -131,7 +131,7 @@ eNBs =
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.13.11";
mme_ip_address = ( { ipv4 = "192.168.12.70";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
@@ -141,10 +141,10 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.10/24";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.212/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.10/24";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.212/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.100PRB.usrpx310.conf
+1 -1
View File
@@ -35,7 +35,7 @@ eNBs =
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 32;
rx_gain = 84;
rx_gain = 116;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.25PRB.usrpx310.epc.remote.conf
+169
View File
@@ -0,0 +1,169 @@
Active_eNBs = ( "eNB_Eurecom_LTEBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
eNBs =
(
{
////////// Identification parameters:
eNB_ID = 0xe00;
cell_type = "CELL_MACRO_ENB";
eNB_name = "eNB_Eurecom_LTEBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = "1";
mobile_country_code = "208";
mobile_network_code = "92";
////////// Physical parameters:
component_carriers = (
{
frame_type = "FDD";
tdd_config = 3;
tdd_config_s = 0;
prefix_type = "NORMAL";
eutra_band = 7;
downlink_frequency = 2660000000L;
uplink_frequency_offset = -120000000;
Nid_cell = 0;
N_RB_DL = 25;
Nid_cell_mbsfn = 0;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 32;
rx_gain = 116;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -16;
pdsch_p_b = 0;
pusch_n_SB = 1;
pusch_enable64QAM = "DISABLE";
pusch_hoppingMode = "interSubFrame";
pusch_hoppingOffset = 0;
pusch_groupHoppingEnabled = "ENABLE";
pusch_groupAssignment = 0;
pusch_sequenceHoppingEnabled = "DISABLE";
pusch_nDMRS1 = 1;
phich_duration = "NORMAL";
phich_resource = "ONESIXTH";
srs_enable = "DISABLE";
/* srs_BandwidthConfig =;
srs_SubframeConfig =;
srs_ackNackST =;
srs_MaxUpPts =;*/
pusch_p0_Nominal = -90;
pusch_alpha = "AL1";
pucch_p0_Nominal = -108;
msg3_delta_Preamble = 6;
pucch_deltaF_Format1 = "deltaF2";
pucch_deltaF_Format1b = "deltaF3";
pucch_deltaF_Format2 = "deltaF0";
pucch_deltaF_Format2a = "deltaF0";
pucch_deltaF_Format2b = "deltaF0";
rach_numberOfRA_Preambles = 64;
rach_preamblesGroupAConfig = "DISABLE";
/*
rach_sizeOfRA_PreamblesGroupA = ;
rach_messageSizeGroupA = ;
rach_messagePowerOffsetGroupB = ;
*/
rach_powerRampingStep = 4;
rach_preambleInitialReceivedTargetPower = -108;
rach_preambleTransMax = 10;
rach_raResponseWindowSize = 10;
rach_macContentionResolutionTimer = 48;
rach_maxHARQ_Msg3Tx = 4;
pcch_default_PagingCycle = 128;
pcch_nB = "oneT";
bcch_modificationPeriodCoeff = 2;
ue_TimersAndConstants_t300 = 1000;
ue_TimersAndConstants_t301 = 1000;
ue_TimersAndConstants_t310 = 1000;
ue_TimersAndConstants_t311 = 10000;
ue_TimersAndConstants_n310 = 20;
ue_TimersAndConstants_n311 = 1;
}
);
srb1_parameters :
{
# timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500]
timer_poll_retransmit = 80;
# timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200]
timer_reordering = 35;
# timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500]
timer_status_prohibit = 0;
# poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)]
poll_pdu = 4;
# poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)]
poll_byte = 99999;
# max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32]
max_retx_threshold = 4;
}
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
log_config :
{
global_log_level ="debug";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
}
);
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.50PRB.usrpx310.conf
+1 -1
View File
@@ -35,7 +35,7 @@ eNBs =
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 32;
rx_gain = 82;
rx_gain = 120;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.bladerfx40.conf
+6 -6
View File
@@ -17,7 +17,7 @@ eNBs =
mobile_country_code = "208";
mobile_network_code = "92";
mobile_network_code = "93";
////////// Physical parameters:
@@ -36,7 +36,7 @@ eNBs =
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 60;
rx_gain = 20;
rx_gain = 120;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
@@ -46,7 +46,7 @@ eNBs =
pucch_nRB_CQI = 1;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -26;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
pusch_enable64QAM = "DISABLE";
@@ -132,7 +132,7 @@ eNBs =
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.13.11";
mme_ip_address = ( { ipv4 = "192.168.12.11";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
@@ -142,10 +142,10 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.10/24";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.212/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.10/24";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.212/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.exmimo2.conf
+7 -7
View File
@@ -17,7 +17,7 @@ eNBs =
mobile_country_code = "208";
mobile_network_code = "92";
mobile_network_code = "93";
////////// Physical parameters:
@@ -31,7 +31,7 @@ eNBs =
downlink_frequency = 2680000000L;
uplink_frequency_offset = -120000000;
Nid_cell = 0;
N_RB_DL = 50;
N_RB_DL = 25;
Nid_cell_mbsfn = 0;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
@@ -131,7 +131,7 @@ eNBs =
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "10.0.1.1";
mme_ip_address = ( { ipv4 = "192.168.12.171";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
@@ -140,11 +140,11 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth3";
ENB_IPV4_ADDRESS_FOR_S1_MME = "10.0.1.229/24";
ENB_INTERFACE_NAME_FOR_S1_MME = "eth2";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.80/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth3";
ENB_IPV4_ADDRESS_FOR_S1U = "10.0.1.229/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth2";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.80/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.conf
+3 -3
View File
@@ -36,7 +36,7 @@ eNBs =
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 120;
rx_gain = 132;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
@@ -143,10 +143,10 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.216/24";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.213/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.216/24";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.213/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.local.conf
+1 -1
View File
@@ -36,7 +36,7 @@ eNBs =
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 120;
rx_gain = 132;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf
+6 -8
View File
@@ -16,7 +16,7 @@ eNBs =
tracking_area_code = "1";
mobile_country_code = "208";
mobile_network_code = "95";
mobile_network_code = "92";
////////// Physical parameters:
@@ -35,7 +35,7 @@ eNBs =
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 120;
rx_gain = 132;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
@@ -130,12 +130,10 @@ eNBs =
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.62";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
mme_ip_address = ( {ipv4 = "192.168.12.26";
ipv6="192:168:30::17";
active="yes";
preference="ipv4";});
NETWORK_INTERFACES :
{
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpx310.conf
+1 -1
View File
@@ -35,7 +35,7 @@ eNBs =
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 32;
rx_gain = 84;
rx_gain = 116;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.usrpb210.conf
+4 -4
View File
@@ -36,7 +36,7 @@ eNBs =
nb_antennas_tx = 2;
nb_antennas_rx = 2;
tx_gain = 90;
rx_gain = 115;
rx_gain = 132;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
@@ -132,7 +132,7 @@ eNBs =
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.13.11";
mme_ip_address = ( { ipv4 = "192.168.12.11";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
@@ -142,10 +142,10 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.10/24";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.213/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.10/24";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.213/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
targets/RT/USER/eNB_transport_IQ.c
+1 -1
View File
@@ -172,7 +172,7 @@ void config_BBU_mod( rrh_module_t *mod_enb, uint8_t RT_flag, uint8_t NRT_flag) {
mod_enb->devs->openair0_cfg.tx_delay = 8;
}
}
else if (mod_enb->devs->type == USRP_IF) {
else if ((mod_enb->devs->type == USRP_B200_IF )||(mod_enb->devs->type == USRP_X300_IF )) {
if ( mod_enb->devs->openair0_cfg.num_rb_dl == 100 ) {
mod_enb->devs->openair0_cfg.samples_per_packet = 2048;
mod_enb->devs->openair0_cfg.tx_forward_nsamps = 175;
targets/RT/USER/lte-softmodem.c
+112 -108
View File
@@ -289,14 +289,12 @@ double bw = 10.0e6;
static int tx_max_power[MAX_NUM_CCs]; /* = {0,0}*/;
int chain_offset=0;
#ifndef EXMIMO
char ref[128] = "internal";
char channels[128] = "0";
//unsigned int samples_per_frame = 307200;
//unsigned int tx_forward_nsamps=0;
//int tx_delay;
#endif
int rx_input_level_dBm;
@@ -318,6 +316,7 @@ static LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
int multi_thread=1;
uint32_t target_dl_mcs = 28; //maximum allowed mcs
uint32_t target_ul_mcs = 10;
uint32_t timing_advance = 0;
uint8_t exit_missed_slots=1;
uint64_t num_missed_slots=0; // counter for the number of missed slots
@@ -422,7 +421,7 @@ void help (void) {
printf(" --ue-txgain set UE TX gain\n");
printf(" --ue-scan_carrier set UE to scan around carrier\n");
printf(" --loop-memory get softmodem (UE) to loop through memory instead of acquiring from HW\n");
printf(" -C Set the downlink frequecny for all Component carrier\n");
printf(" -C Set the downlink frequency for all component carriers\n");
printf(" -d Enable soft scope and L1 and L2 stats (Xforms)\n");
printf(" -F Calibrate the EXMIMO borad, available files: exmimo2_2arxg.lime exmimo2_2brxg.lime \n");
printf(" -g Set the global log level, valide options: (9:trace, 8/7:debug, 6:info, 4:warn, 3:error)\n");
@@ -436,6 +435,7 @@ void help (void) {
printf(" -r Set the PRB, valid values: 6, 25, 50, 100 \n");
printf(" -S Skip the missed slots/subframes \n");
printf(" -t Set the maximum uplink MCS\n");
printf(" -T Set hardware to TDD mode (default: FDD). Used only with -U (otherwise set in config file).\n");
printf(" -U Set the lte softmodem as a UE\n");
printf(" -W Enable L2 wireshark messages on localhost \n");
printf(" -V Enable VCD (generated file will be located atopenair_dump_eNB.vcd, read it with target/RT/USER/eNB.gtkw\n");
@@ -970,6 +970,25 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB)
phy_vars_eNB->lte_eNB_common_vars.txdata[0][aa][tx_offset++] = 0x00010001;
}
}
if ((((phy_vars_eNB->lte_frame_parms.tdd_config==0) ||
(phy_vars_eNB->lte_frame_parms.tdd_config==1) ||
(phy_vars_eNB->lte_frame_parms.tdd_config==2) ||
(phy_vars_eNB->lte_frame_parms.tdd_config==6)) &&
(subframe==0)) || (subframe==5)) {
// turn on tx switch N_TA_offset before
//LOG_D(HW,"subframe %d, time to switch to tx (N_TA_offset %d, slot_offset %d) \n",subframe,phy_vars_eNB->N_TA_offset,slot_offset);
for (i=0; i<phy_vars_eNB->N_TA_offset; i++) {
tx_offset = (int)slot_offset+time_offset[aa]+i-phy_vars_eNB->N_TA_offset/2;
if (tx_offset<0)
tx_offset += LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->lte_frame_parms.samples_per_tti;
if (tx_offset>=(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->lte_frame_parms.samples_per_tti))
tx_offset -= LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->lte_frame_parms.samples_per_tti;
phy_vars_eNB->lte_eNB_common_vars.txdata[0][aa][tx_offset] = 0x00000000;
}
}
}
}
}
@@ -1559,7 +1578,7 @@ static void* eNB_thread( void* arg )
int hw_subframe = 0; // 0..NUM_ENB_THREADS-1 => 0..9
unsigned int rx_pos = 0;
unsigned int tx_pos = 0; //spp*tx_delay;
unsigned int tx_pos = 0;
#endif
int CC_id=0;
struct timespec trx_time0, trx_time1, trx_time2;
@@ -1634,8 +1653,8 @@ static void* eNB_thread( void* arg )
int frame = 0;
#ifndef EXMIMO
spp = openair0_cfg[0].samples_per_packet;
tx_pos=spp*openair0_cfg[0].tx_delay;
spp = openair0_cfg[0].samples_per_packet;
tx_pos = openair0_cfg[0].tx_scheduling_advance;
#endif
while (!oai_exit) {
@@ -1796,11 +1815,10 @@ static void* eNB_thread( void* arg )
// prepare tx buffer pointers
for (i=0; i<PHY_vars_eNB_g[0][0]->lte_frame_parms.nb_antennas_tx; i++)
txp[i] = (void*)&txdata[i][tx_pos];
//printf("tx_pos %d ts %d, ts_offset %d txp[i] %p, ap %d\n", tx_pos, timestamp, (timestamp+(tx_delay*spp)-tx_forward_nsamps),txp[i], i);
// if symb_written < spp ==> error
if (frame > 50) {
openair0.trx_write_func(&openair0,
(timestamp+(openair0_cfg[card].tx_delay*spp)-openair0_cfg[card].tx_forward_nsamps),
(timestamp+(openair0_cfg[card].tx_scheduling_advance)-openair0_cfg[card].tx_sample_advance),
txp,
spp,
PHY_vars_eNB_g[0][0]->lte_frame_parms.nb_antennas_tx,
@@ -1808,7 +1826,7 @@ static void* eNB_thread( void* arg )
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, timestamp&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp+(openair0_cfg[card].tx_delay*spp)-openair0_cfg[card].tx_forward_nsamps)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp+(openair0_cfg[card].tx_scheduling_advance)-openair0_cfg[card].tx_sample_advance)&0xffffffff );
stop_meas( &softmodem_stats_mt );
clock_gettime( CLOCK_MONOTONIC, &trx_time2 );
@@ -1819,7 +1837,8 @@ static void* eNB_thread( void* arg )
rt_sleep_ns(1000000);
#endif
if ((tx_launched == 0) &&
if ((frame>50) &&
(tx_launched == 0) &&
(rx_pos >= (((2*hw_subframe)+1)*PHY_vars_eNB_g[0][0]->lte_frame_parms.samples_per_tti>>1))) {
tx_launched = 1;
@@ -1888,52 +1907,53 @@ static void* eNB_thread( void* arg )
#else
int sf = hw_subframe;
#endif
for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
if (frame>50) {
for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
#ifdef EXMIMO
if (pthread_mutex_lock(&PHY_vars_eNB_g[0][CC_id]->proc[sf].mutex_tx) != 0) {
LOG_E(PHY,"[eNB] ERROR pthread_mutex_lock for eNB TX thread %d (IC %d)\n",sf,PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_tx);
} else {
// LOG_I(PHY,"[eNB] Waking up eNB process %d (IC %d)\n",sf,PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt);
PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_tx++;
pthread_mutex_unlock(&PHY_vars_eNB_g[0][CC_id]->proc[sf].mutex_tx);
if (PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_tx == 0) {
if (pthread_cond_signal(&PHY_vars_eNB_g[0][CC_id]->proc[sf].cond_tx) != 0) {
LOG_E(PHY,"[eNB] ERROR pthread_cond_signal for eNB TX thread %d\n",sf);
if (pthread_mutex_lock(&PHY_vars_eNB_g[0][CC_id]->proc[sf].mutex_tx) != 0) {
LOG_E(PHY,"[eNB] ERROR pthread_mutex_lock for eNB TX thread %d (IC %d)\n",sf,PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_tx);
} else {
// LOG_I(PHY,"[eNB] Waking up eNB process %d (IC %d)\n",sf,PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt);
PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_tx++;
pthread_mutex_unlock(&PHY_vars_eNB_g[0][CC_id]->proc[sf].mutex_tx);
if (PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_tx == 0) {
if (pthread_cond_signal(&PHY_vars_eNB_g[0][CC_id]->proc[sf].cond_tx) != 0) {
LOG_E(PHY,"[eNB] ERROR pthread_cond_signal for eNB TX thread %d\n",sf);
exit_fun("nothing to add");
}
} else {
LOG_W(PHY,"[eNB] Frame %d, eNB TX thread %d busy!!\n",PHY_vars_eNB_g[0][CC_id]->proc[sf].frame_tx,sf);
exit_fun("nothing to add");
}
} else {
LOG_W(PHY,"[eNB] Frame %d, eNB TX thread %d busy!!\n",PHY_vars_eNB_g[0][CC_id]->proc[sf].frame_tx,sf);
exit_fun("nothing to add");
}
}
}
}
#endif
if (pthread_mutex_lock(&PHY_vars_eNB_g[0][CC_id]->proc[sf].mutex_rx) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RX thread %d (IC %d)\n", sf, PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_rx );
exit_fun( "error locking mutex_rx" );
break;
}
int cnt_rx = ++PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_rx;
pthread_mutex_unlock( &PHY_vars_eNB_g[0][CC_id]->proc[sf].mutex_rx );
if (cnt_rx == 0) {
// the thread was presumably waiting where it should and can now be woken up
if (pthread_cond_signal(&PHY_vars_eNB_g[0][CC_id]->proc[sf].cond_rx) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB RX thread %d\n", sf );
exit_fun( "ERROR pthread_cond_signal" );
break;
}
} else {
LOG_W( PHY, "[eNB] Frame %d, eNB RX thread %d busy!! instance_cnt %d CC_id %d\n", PHY_vars_eNB_g[0][CC_id]->proc[sf].frame_rx, sf, PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_rx, CC_id );
exit_fun( "RX thread busy" );
break;
}
if (pthread_mutex_lock(&PHY_vars_eNB_g[0][CC_id]->proc[sf].mutex_rx) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RX thread %d (IC %d)\n", sf, PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_rx );
exit_fun( "error locking mutex_rx" );
break;
}
int cnt_rx = ++PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_rx;
pthread_mutex_unlock( &PHY_vars_eNB_g[0][CC_id]->proc[sf].mutex_rx );
if (cnt_rx == 0) {
// the thread was presumably waiting where it should and can now be woken up
if (pthread_cond_signal(&PHY_vars_eNB_g[0][CC_id]->proc[sf].cond_rx) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB RX thread %d\n", sf );
exit_fun( "ERROR pthread_cond_signal" );
break;
}
} else {
LOG_W( PHY, "[eNB] Frame %d, eNB RX thread %d busy!! instance_cnt %d CC_id %d\n", PHY_vars_eNB_g[0][CC_id]->proc[sf].frame_rx, sf, PHY_vars_eNB_g[0][CC_id]->proc[sf].instance_cnt_rx, CC_id );
exit_fun( "RX thread busy" );
break;
}
}
}
}
@@ -2042,7 +2062,7 @@ static void get_options (int argc, char **argv)
{NULL, 0, NULL, 0}
};
while ((c = getopt_long (argc, argv, "C:dK:g:F:G:hqO:m:SUVRM:r:P:Ws:t:x:",long_options,NULL)) != -1) {
while ((c = getopt_long (argc, argv, "A:a:C:dK:g:F:G:hqO:m:SUVRM:r:P:Ws:t:Tx:",long_options,NULL)) != -1) {
switch (c) {
case LONG_OPTION_MAXPOWER:
tx_max_power[0]=atoi(optarg);
@@ -2117,6 +2137,10 @@ static void get_options (int argc, char **argv)
#endif
break;
case 'A':
timing_advance = atoi (optarg);
break;
case 'C':
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
downlink_frequency[CC_id][0] = atof(optarg); // Use float to avoid issue with frequency over 2^31.
@@ -2130,6 +2154,10 @@ static void get_options (int argc, char **argv)
break;
case 'a':
chain_offset = atoi(optarg);
break;
case 'd':
#ifdef XFORMS
do_forms=1;
@@ -2307,8 +2335,13 @@ static void get_options (int argc, char **argv)
printf("Transmission mode > 2 (%d) not supported for the moment\n",transmission_mode);
exit(-1);
}
break;
case 'T':
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++)
frame_parms[CC_id]->frame_type = TDD;
break;
case 'h':
help ();
exit (-1);
@@ -2468,12 +2501,10 @@ int main( int argc, char **argv )
memset(tx_max_power,0,sizeof(int)*MAX_NUM_CCs);
set_latency_target();
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
frame_parms[CC_id] = (LTE_DL_FRAME_PARMS*) malloc(sizeof(LTE_DL_FRAME_PARMS));
/* Set some default values that may be overwritten while reading options */
frame_parms[CC_id]->frame_type = FDD; /* TDD */
frame_parms[CC_id]->frame_type = FDD;
frame_parms[CC_id]->tdd_config = 3;
frame_parms[CC_id]->tdd_config_S = 0;
frame_parms[CC_id]->N_RB_DL = 100;
@@ -2770,7 +2801,7 @@ int main( int argc, char **argv )
PHY_vars_eNB_g[0] = malloc(sizeof(PHY_VARS_eNB*));
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
PHY_vars_eNB_g[0][CC_id] = init_lte_eNB(frame_parms[CC_id],0,Nid_cell,cooperation_flag,transmission_mode,abstraction_flag);
PHY_vars_eNB_g[0][CC_id] = init_lte_eNB(frame_parms[CC_id],0,frame_parms[CC_id]->Nid_cell,cooperation_flag,transmission_mode,abstraction_flag);
PHY_vars_eNB_g[0][CC_id]->CC_id = CC_id;
#ifndef OPENAIR2
@@ -2821,7 +2852,7 @@ int main( int argc, char **argv )
}
#else
//already taken care of in lte-softmodem
//already taken care of in lte-softmodem.c
PHY_vars_eNB_g[0][CC_id]->N_TA_offset = 0;
#endif
@@ -2847,66 +2878,37 @@ int main( int argc, char **argv )
for (card=0; card<MAX_CARDS; card++) {
if(frame_parms[0]->N_RB_DL == 100) {
sample_rate = 30.72e6;
bw = 10.0e6;
#ifndef EXMIMO
openair0_cfg[card].sample_rate=30.72e6;
openair0_cfg[card].samples_per_packet = 2048;
openair0_cfg[card].samples_per_frame = 307200;
openair0_cfg[card].tx_bw = 10e6;
openair0_cfg[card].rx_bw = 10e6;
// from usrp_time_offset
openair0_cfg[card].tx_forward_nsamps = 175;
openair0_cfg[card].tx_delay = 8;
#endif
} else if(frame_parms[0]->N_RB_DL == 50) {
sample_rate = 15.36e6;
bw = 5.0e6;
#ifndef EXMIMO
openair0_cfg[card].sample_rate=15.36e6;
openair0_cfg[card].samples_per_packet = 2048;
openair0_cfg[card].samples_per_frame = 153600;
openair0_cfg[card].tx_bw = 5e6;
openair0_cfg[card].rx_bw = 5e6;
openair0_cfg[card].tx_forward_nsamps = 95;
openair0_cfg[card].tx_delay = 5;
#endif
} else if (frame_parms[0]->N_RB_DL == 25) {
sample_rate = 7.68e6;
bw = 2.5e6;
#ifndef EXMIMO
openair0_cfg[card].sample_rate=7.68e6;
openair0_cfg[card].samples_per_frame = 76800;
openair0_cfg[card].tx_bw = 2.5e6;
openair0_cfg[card].rx_bw = 2.5e6;
openair0_cfg[card].samples_per_packet = 1024;
#ifdef OAI_USRP
openair0_cfg[card].tx_forward_nsamps = 70;
openair0_cfg[card].tx_delay = 5;
#elif OAI_BLADERF
openair0_cfg[card].tx_forward_nsamps = 0;
openair0_cfg[card].tx_delay = 4;
#endif
#endif
} else if (frame_parms[0]->N_RB_DL == 6) {
sample_rate = 1.92e6;
bw = 0.96e6;
#ifndef EXMIMO
openair0_cfg[card].sample_rate=1.92e6;
openair0_cfg[card].samples_per_packet = 256;
openair0_cfg[card].samples_per_frame = 19200;
openair0_cfg[card].tx_bw = 1.5e6;
openair0_cfg[card].rx_bw = 1.5e6;
openair0_cfg[card].tx_forward_nsamps = 40;
openair0_cfg[card].tx_delay = 8;
#endif
}
if (frame_parms[0]->frame_type==TDD)
openair0_cfg[card].duplex_mode = duplex_mode_TDD;
else //FDD
openair0_cfg[card].duplex_mode = duplex_mode_FDD;
#ifdef ETHERNET
//calib needed
openair0_cfg[card].tx_delay = 0;
openair0_cfg[card].tx_forward_nsamps = 0;
openair0_cfg[card].tx_scheduling_advance = 0;
openair0_cfg[card].tx_sample_advance = 0;
if (frame_parms[0]->N_RB_DL == 6)
openair0_cfg[card].samples_per_packet = 256;
@@ -2917,9 +2919,6 @@ int main( int argc, char **argv )
#endif
#ifndef EXMIMO
openair0_cfg[card].samples_per_packet = openair0_cfg[0].samples_per_packet;
#endif
printf("HW: Configuring card %d, nb_antennas_tx/rx %d/%d\n",card,
((UE_flag==0) ? PHY_vars_eNB_g[0][0]->lte_frame_parms.nb_antennas_tx : PHY_vars_UE_g[0][0]->lte_frame_parms.nb_antennas_tx),
((UE_flag==0) ? PHY_vars_eNB_g[0][0]->lte_frame_parms.nb_antennas_rx : PHY_vars_UE_g[0][0]->lte_frame_parms.nb_antennas_rx));
@@ -2961,26 +2960,31 @@ int main( int argc, char **argv )
openair0_cfg[card].rx_gain[i] = PHY_vars_eNB_g[0][0]->rx_total_gain_eNB_dB;
}
else {
openair0_cfg[card].rx_gain[i] = PHY_vars_UE_g[0][0]->rx_total_gain_dB;// - USRP_GAIN_OFFSET; // calibrated for USRP B210 @ 2.6 GHz, 30.72 MS/s
openair0_cfg[card].rx_gain[i] = PHY_vars_UE_g[0][0]->rx_total_gain_dB;
}
#ifdef OAI_USRP
switch(frame_parms[0]->N_RB_DL) {
case 6:
openair0_cfg[card].rx_gain[i] -= 6;
openair0_cfg[card].rx_gain[i] -= 12;
break;
case 25:
openair0_cfg[card].rx_gain[i] += 6;
openair0_cfg[card].rx_gain[i] -= 6;
break;
case 50:
openair0_cfg[card].rx_gain[i] += 8;
openair0_cfg[card].rx_gain[i] -= 3;
break;
case 100:
openair0_cfg[card].rx_gain[i] -= 0;
break;
default:
break;
}
#endif
}
@@ -3062,13 +3066,13 @@ int main( int argc, char **argv )
for(CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
rf_map[CC_id].card=0;
rf_map[CC_id].chain=CC_id;
rf_map[CC_id].chain=CC_id+chain_offset;
}
// connect the TX/RX buffers
if (UE_flag==1) {
#ifdef OAI_USRP
openair_daq_vars.timing_advance = 160;
openair_daq_vars.timing_advance = timing_advance;
#else
openair_daq_vars.timing_advance = 160;
#endif
targets/RT/USER/lte-ue.c
+37 -13
View File
@@ -400,7 +400,7 @@ static void *UE_thread_synch(void *arg)
case pbch:
LOG_I(PHY,"[UE thread Synch] Running Initial Synch\n");
if (initial_sync( UE, UE->mode ) == 0) {
hw_slot_offset = (UE->rx_offset<<1) / UE->lte_frame_parms.samples_per_tti;
@@ -410,6 +410,7 @@ static void *UE_thread_synch(void *arg)
UE->UE_scan_carrier = 0;
// rerun with new cell parameters and frequency-offset
for (i=0;i<openair0_cfg[0].rx_num_channels;i++) {
openair0_cfg[0].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
openair0_cfg[0].rx_freq[i] -= UE->lte_ue_common_vars.freq_offset;
openair0_cfg[0].tx_freq[i] = openair0_cfg[0].rx_freq[i]+uplink_frequency_offset[0][i];
downlink_frequency[0][i] = openair0_cfg[0].rx_freq[i];
@@ -422,25 +423,33 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[0].sample_rate =1.92e6;
openair0_cfg[0].rx_bw =.96e6;
openair0_cfg[0].tx_bw =.96e6;
#ifdef OAI_USRP
openair0_cfg[0].rx_gain[0] -= 12;
#endif
break;
case 25:
openair0_cfg[0].sample_rate =7.68e6;
openair0_cfg[0].rx_bw =2.5e6;
openair0_cfg[0].tx_bw =2.5e6;
#ifdef OAI_USRP
openair0_cfg[0].rx_gain[0] -= 6;
#endif
break;
case 50:
openair0_cfg[0].sample_rate =15.36e6;
openair0_cfg[0].rx_bw =5.0e6;
openair0_cfg[0].tx_bw =5.0e6;
#ifdef OAI_USRP
openair0_cfg[0].rx_gain[0] -= 3;
#endif
break;
case 100:
openair0_cfg[0].sample_rate=30.72e6;
openair0_cfg[0].rx_bw=10.0e6;
openair0_cfg[0].tx_bw=10.0e6;
#ifdef OAI_USRP
openair0_cfg[0].rx_gain[0] -= 0;
#endif
break;
}
#ifndef EXMIMO
@@ -519,10 +528,6 @@ static void *UE_thread_synch(void *arg)
for (i=0; i<openair0_cfg[card].rx_num_channels; i++) {
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i]+freq_offset;
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i]+freq_offset;
#ifdef OAI_USRP
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
#ifndef EXMIMO
openair0.trx_set_freq_func(&openair0,&openair0_cfg[0],0);
@@ -530,6 +535,12 @@ static void *UE_thread_synch(void *arg)
openair0_set_frequencies(&openair0,&openair0_cfg[0],0);
#endif
#ifdef OAI_USRP
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
switch(UE->lte_frame_parms.N_RB_DL) {
case 6:
openair0_cfg[card].rx_gain[i] -= 12;
@@ -1002,7 +1013,7 @@ void *UE_thread(void *arg)
static int UE_thread_retval;
PHY_VARS_UE *UE = PHY_vars_UE_g[0][0];
int spp = openair0_cfg[0].samples_per_packet;
int slot=1, frame=0, hw_subframe=0, rxpos=0, txpos=spp*openair0_cfg[0].tx_delay;
int slot=1, frame=0, hw_subframe=0, rxpos=0, txpos=openair0_cfg[0].tx_scheduling_advance;
#ifdef __AVX2__
int dummy[2][spp] __attribute__((aligned(32)));
#else
@@ -1019,6 +1030,10 @@ void *UE_thread(void *arg)
openair0_timestamp timestamp;
#ifdef NAS_UE
MessageDef *message_p;
#endif
#ifdef RTAI
RT_TASK *task = rt_task_init_schmod(nam2num("UE thread"), 0, 0, 0, SCHED_FIFO, 0xF);
@@ -1074,6 +1089,11 @@ void *UE_thread(void *arg)
printf("starting UE thread\n");
#ifdef NAS_UE
message_p = itti_alloc_new_message(TASK_NAS_UE, INITIALIZE_MESSAGE);
itti_send_msg_to_task (TASK_NAS_UE, INSTANCE_DEFAULT, message_p);
#endif
T0 = rt_get_time_ns();
first_rx = 1;
rxpos=0;
@@ -1094,10 +1114,10 @@ void *UE_thread(void *arg)
for (int i=0; i<UE->lte_frame_parms.nb_antennas_rx; i++)
rxp[i] = (dummy_dump==0) ? (void*)&rxdata[i][rxpos] : (void*)dummy[i];
/*
if (dummy_dump == 0)
printf("writing %d samples to %d (first_rx %d)\n",spp - ((first_rx==1) ? rx_off_diff : 0),rxpos,first_rx);
*/
/* if (dummy_dump == 0)
printf("writing %d samples to %d (first_rx %d)\n",spp - ((first_rx==1) ? rx_off_diff : 0),rxpos,first_rx);*/
if (UE->mode != loop_through_memory) {
rxs = openair0.trx_read_func(&openair0,
&timestamp,
@@ -1106,8 +1126,11 @@ void *UE_thread(void *arg)
UE->lte_frame_parms.nb_antennas_rx);
if (rxs != (spp- ((first_rx==1) ? rx_off_diff : 0))) {
exit_fun("problem in rx");
return &UE_thread_retval;
printf("rx error: asked %d got %d ",spp - ((first_rx==1) ? rx_off_diff : 0),rxs);
if (UE->is_synchronized == 1) {
exit_fun("problem in rx");
return &UE_thread_retval;
}
}
}
@@ -1127,7 +1150,7 @@ void *UE_thread(void *arg)
txp[i] = (void*)&txdata[i][txpos];
openair0.trx_write_func(&openair0,
(timestamp+spp*openair0_cfg[0].tx_delay-openair0_cfg[0].tx_forward_nsamps),
(timestamp+openair0_cfg[0].tx_scheduling_advance-openair0_cfg[0].tx_sample_advance),
txp,
spp - ((first_rx==1) ? rx_off_diff : 0),
UE->lte_frame_parms.nb_antennas_tx,
@@ -1324,6 +1347,7 @@ void *UE_thread(void *arg)
#ifndef USRP_DEBUG
if (UE->mode != loop_through_memory) {
LOG_I(PHY,"Resynchronizing RX by %d samples\n",UE->rx_offset);
rxs = openair0.trx_read_func(&openair0,
&timestamp,
(void**)rxdata,
targets/RT/USER/rrh_gw.c
+1 -1
View File
@@ -216,7 +216,7 @@ static rrh_module_t new_module (unsigned int id) {
LOG_I(RRH,"Setting RF device to EXMIMO\n");
#elif OAI_USRP
rrh_mod.devs=oai_dv;
rrh_mod.devs->type=USRP_IF;
rrh_mod.devs->type=USRP_B200_IF;
LOG_I(RRH,"Setting RF device to USRP\n");
#elif OAI_BLADERF
rrh_mod.devs=oai_dv;
targets/RT/USER/rrh_gw.h
+1 -1
View File
@@ -51,7 +51,7 @@
/*! \brief RRH supports two types of modules: eNB and UE
each module is associated with an ethernet device (device of ETH_IF)
and optionally with a RF device (device type can be USRP_IF/BLADERF_IF/EXMIMO_IF/NONE_IF)
and optionally with a RF device (device type can be USRP_B200/USRP_X300/BLADERF_IF/EXMIMO_IF/NONE_IF)
UE modules will always have RF device type NONE_IF */
typedef struct {
/*! \brief module id */