minor change in timing for 5 MHz on USRP B210

2016-04-12 12:38:19 +02:00
parent 6ddc7b3bc9
commit 20e2460913
3 changed files with 76 additions and 79 deletions
@@ -627,7 +627,7 @@ extern "C" {
    case 7680000:
      s->usrp->set_master_clock_rate(7.68e6);
      openair0_cfg[0].samples_per_packet    = 1024;
-      openair0_cfg[0].tx_sample_advance     = 70;//103;
+      openair0_cfg[0].tx_sample_advance     = 103;
      openair0_cfg[0].tx_bw                 = 5e6;
      openair0_cfg[0].rx_bw                 = 5e6;
      openair0_cfg[0].tx_scheduling_advance = 5*openair0_cfg[0].samples_per_packet;