diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index 928da7c0fa..fc9322c54b 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -537,24 +537,38 @@ uint8_t getNRBG(uint16_t bwp_size, uint16_t bwp_start, long rbg_size_config) { uint8_t getAntPortBitWidth(NR_SetupRelease_DMRS_DownlinkConfig_t *typeA, NR_SetupRelease_DMRS_DownlinkConfig_t *typeB) { - uint8_t nbitsA, nbitsB, nbits = 0; - if (typeA != NULL) nbitsA = (typeA->choice.setup->maxLength[0]==0) ? 4 : 5; - if (typeB != NULL) nbitsB = (typeB->choice.setup->maxLength[0]==0) ? 5 : 6; - if ((typeA != NULL) && (typeB != NULL)) nbits = (nbitsA > nbitsB) ? nbitsA : nbitsB; + uint8_t nbitsA = 0; + uint8_t nbitsB = 0; + uint8_t type,length,nbits; + if (typeA != NULL) { + type = (typeA->choice.setup->dmrs_Type==NULL) ? 1:2; + length = (typeA->choice.setup->maxLength==NULL) ? 1:2; + nbitsA = type + length + 2; + if (typeB == NULL) return nbitsA; + } + if (typeB != NULL) { + type = (typeB->choice.setup->dmrs_Type==NULL) ? 1:2; + length = (typeB->choice.setup->maxLength==NULL) ? 1:2; + nbitsB = type + length + 2; + if (typeA == NULL) return nbitsB; + } + + nbits = (nbitsA > nbitsB) ? nbitsA : nbitsB; return nbits; } uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup, - dci_pdu_rel15_t *dci_pdu, - nr_dci_format_t format, + dci_pdu_rel15_t *dci_pdu, + nr_dci_format_t format, nr_rnti_type_t rnti_type, - uint16_t N_RB) { + uint16_t N_RB, + int bwp_id) { - NR_PDSCH_Config_t *pdsch_config = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup; uint16_t size = 0; - int bwp_id = 1; NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; + NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]; + NR_PDSCH_Config_t *pdsch_config = bwp->bwp_Dedicated->pdsch_Config->choice.setup; switch(format) { /*Only sizes for 0_0 and 1_0 are correct at the moment*/ @@ -562,7 +576,7 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup, /// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20 size += 20; size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated - size += nr_dci_size(secondaryCellGroup,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB) - size; // Padding to match 1_0 size + size += nr_dci_size(secondaryCellGroup,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id) - size; // Padding to match 1_0 size // UL/SUL indicator assumed to be 0 break; @@ -604,7 +618,10 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup, } // BWP Indicator uint8_t n_dl_bwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count; - dci_pdu->bwp_indicator.nbits = (uint8_t)((n_dl_bwp < 4) ? ceil(log2(n_dl_bwp+1)) : ceil(log2(n_dl_bwp))); + if (n_dl_bwp < 2) + dci_pdu->bwp_indicator.nbits = n_dl_bwp; + else + dci_pdu->bwp_indicator.nbits = 2; size += dci_pdu->bwp_indicator.nbits; // Freq domain assignment long rbg_size_config = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->rbg_Size; @@ -618,49 +635,52 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup, else dci_pdu->frequency_domain_assignment.nbits = ((int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )>numRBG) ? (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )+1 : numRBG+1; size += dci_pdu->frequency_domain_assignment.nbits; - // Time domain assignment - NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_timeDomList = secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + // Time domain assignment (see table 5.1.2.1.1-1 in 38.214 int num_entries; - if (pdsch_timeDomList != NULL) - num_entries = pdsch_timeDomList->list.count; + if (pdsch_config->pdsch_TimeDomainAllocationList==NULL) { + if (bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList==NULL) + num_entries = 16; // num of entries in default table + else + num_entries = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; + } else - num_entries = 16; // num of entries in default table + num_entries = pdsch_config->pdsch_TimeDomainAllocationList->choice.setup->list.count; dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries)); size += dci_pdu->time_domain_assignment.nbits; - // VRB to PRB mapping + // VRB to PRB mapping FIXME (38.212 also says 0 bits if not configured by higher layers if (pdsch_config->resourceAllocation == 1) { dci_pdu->vrb_to_prb_mapping.nbits = 1; size += dci_pdu->vrb_to_prb_mapping.nbits; } // PRB bundling size indicator - if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->prb_BundlingType.present == 2) { + if (pdsch_config->prb_BundlingType.present == NR_PDSCH_Config__prb_BundlingType_PR_dynamicBundling) { dci_pdu->prb_bundling_size_indicator.nbits = 1; size += dci_pdu->prb_bundling_size_indicator.nbits; } // Rate matching indicator - NR_RateMatchPatternGroup_t *group1 = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->rateMatchPatternGroup1; - NR_RateMatchPatternGroup_t *group2 = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->rateMatchPatternGroup2; + NR_RateMatchPatternGroup_t *group1 = pdsch_config->rateMatchPatternGroup1; + NR_RateMatchPatternGroup_t *group2 = pdsch_config->rateMatchPatternGroup2; if ((group1 != NULL) && (group2 != NULL)) dci_pdu->rate_matching_indicator.nbits = 2; if ((group1 != NULL) != (group2 != NULL)) dci_pdu->rate_matching_indicator.nbits = 1; size += dci_pdu->rate_matching_indicator.nbits; // ZP CSI-RS trigger - uint8_t nZP = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList->list.count; + uint8_t nZP = pdsch_config->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList->list.count; dci_pdu->zp_csi_rs_trigger.nbits = (int)ceil(log2(nZP+1)); size += dci_pdu->zp_csi_rs_trigger.nbits; // TB1- MCS 5, NDI 1, RV 2 size += 8; // TB2 - long *maxCWperDCI = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI; + long *maxCWperDCI = pdsch_config->maxNrofCodeWordsScheduledByDCI; if ((maxCWperDCI != NULL) && (*maxCWperDCI == 2)) { size += 8; } // HARQ PID size += 4; // DAI - if (secondaryCellGroup->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook == 1) { // at this point the UE has multiple serving cells - dci_pdu->dai[0].nbits = 4; + if (secondaryCellGroup->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook == NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic) { // FIXME in case of more than one serving cell + dci_pdu->dai[0].nbits = 2; size += dci_pdu->dai[0].nbits; } // TPC PUCCH @@ -668,32 +688,34 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup, // PUCCH resource indicator size += 3; // PDSCH to HARQ timing indicator - uint8_t I = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.count; + uint8_t I = ubwp->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.count; dci_pdu->pdsch_to_harq_feedback_timing_indicator.nbits = (int)ceil(log2(I)); size += dci_pdu->pdsch_to_harq_feedback_timing_indicator.nbits; // Antenna ports - NR_SetupRelease_DMRS_DownlinkConfig_t *typeA = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA; - NR_SetupRelease_DMRS_DownlinkConfig_t *typeB = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB; + NR_SetupRelease_DMRS_DownlinkConfig_t *typeA = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA; + NR_SetupRelease_DMRS_DownlinkConfig_t *typeB = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB; dci_pdu->antenna_ports.nbits = getAntPortBitWidth(typeA,typeB); size += dci_pdu->antenna_ports.nbits; // Tx Config Indication - long *isTciEnable = secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[0]->tci_PresentInDCI; + long *isTciEnable = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1]->tci_PresentInDCI; if (isTciEnable != NULL) { dci_pdu->transmission_configuration_indication.nbits = 3; size += dci_pdu->transmission_configuration_indication.nbits; } // SRS request - if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig==NULL) + if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->supplementaryUplink==NULL) dci_pdu->srs_request.nbits = 2; else dci_pdu->srs_request.nbits = 3; size += dci_pdu->srs_request.nbits; // CBGTI - uint8_t maxCBGperTB = (secondaryCellGroup->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock + 1) * 2; - long *maxCWperDCI_rrc = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI; - uint8_t maxCW = (maxCWperDCI_rrc == NULL) ? 1 : *maxCWperDCI_rrc; - dci_pdu->cbgti.nbits = maxCBGperTB * maxCW; - size += dci_pdu->cbgti.nbits; + if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { + uint8_t maxCBGperTB = (secondaryCellGroup->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock + 1) * 2; + long *maxCWperDCI_rrc = pdsch_config->maxNrofCodeWordsScheduledByDCI; + uint8_t maxCW = (maxCWperDCI_rrc == NULL) ? 1 : *maxCWperDCI_rrc; + dci_pdu->cbgti.nbits = maxCBGperTB * maxCW; + size += dci_pdu->cbgti.nbits; + } // CBGFI if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->codeBlockGroupFlushIndicator) { dci_pdu->cbgfi.nbits = 1; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 87371760d5..11c083ea3f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -267,7 +267,7 @@ int configure_fapi_dl_pdu(int Mod_idP, nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu; int TBS; - int bwp_id=1; + bwp_id=1; int UE_id = 0; NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list; @@ -343,24 +343,37 @@ int configure_fapi_dl_pdu(int Mod_idP, dci_pdu_rel15_t *dci_pdu_rel15 = calloc(MAX_DCI_CORESET,sizeof(dci_pdu_rel15)); - dci_pdu_rel15[0].frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, - pdsch_pdu_rel15->rbStart, - NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275)); + // bwp indicator + int n_dl_bwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count; + if (n_dl_bwp < 4) + dci_pdu_rel15[0].bwp_indicator.val = bwp_id; + else + dci_pdu_rel15[0].bwp_indicator.val = bwp_id - 1; // as per table 7.3.1.1.2-1 in 38.212 + // frequency domain assignment + if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->resourceAllocation==NR_PDSCH_Config__resourceAllocation_resourceAllocationType1) + dci_pdu_rel15[0].frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, + pdsch_pdu_rel15->rbStart, + NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275)); + else + AssertFatal(1==0,"Only frequency resource allocation type 1 is currently supported\n"); + // time domain assignment dci_pdu_rel15[0].time_domain_assignment.val = time_domain_assignment; // row index used here instead of SLIV; - dci_pdu_rel15[0].vrb_to_prb_mapping.val = 1; + // mcs ndi and rv dci_pdu_rel15[0].mcs = pdsch_pdu_rel15->mcsIndex[0]; - dci_pdu_rel15[0].tb_scaling = 1; - - dci_pdu_rel15[0].ra_preamble_index = 25; - dci_pdu_rel15[0].format_indicator = 1; dci_pdu_rel15[0].ndi = 1; dci_pdu_rel15[0].rv = 0; + // harq pid dci_pdu_rel15[0].harq_pid = 0; + // DAI dci_pdu_rel15[0].dai[0].val = (pucch_sched->dai_c-1)&3; - dci_pdu_rel15[0].tpc = 2; + // TPC for PUCCH + dci_pdu_rel15[0].tpc = 1; // table 7.2.1-1 in 38.213 + // PUCCH resource indicator dci_pdu_rel15[0].pucch_resource_indicator = pucch_sched->resource_indicator; + // PDSCH to HARQ TI dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator.val = pucch_sched->timing_indicator; - + // antenna ports + dci_pdu_rel15[0].antenna_ports.val = 0; // nb of cdm groups w/o data 1 and dmrs port 0 LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n", dci_pdu_rel15[0].frequency_domain_assignment.val, @@ -392,7 +405,7 @@ int configure_fapi_dl_pdu(int Mod_idP, dci_formats[0] = NR_DL_DCI_FORMAT_1_0; rnti_types[0] = NR_RNTI_C; - fill_dci_pdu_rel15(secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types); + fill_dci_pdu_rel15(secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,bwp_id); LOG_D(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d\n \ coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n", diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 0feca3a863..996a75d1fc 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -544,24 +544,7 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, } } -void prepare_dci(NR_CellGroupConfig_t *secondaryCellGroup, - dci_pdu_rel15_t *dci_pdu_rel15, - nr_dci_format_t format) { - switch(format) { - case NR_DL_DCI_FORMAT_1_1: - //carrier indicator - //bwp indicator - //vrb to prb mapping - //bundling size indicator - //rate matching indicator - //ZP CSI-RS trigger - //dai - //antenna ports - //srs resource set - break; - } -} // This function configures pucch pdu fapi structure void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, @@ -747,11 +730,75 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, } + +void prepare_dci(NR_CellGroupConfig_t *secondaryCellGroup, + dci_pdu_rel15_t *dci_pdu_rel15, + nr_dci_format_t format, + int bwp_id) { + + NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; + + switch(format) { + case NR_DL_DCI_FORMAT_1_1: + // format indicator + dci_pdu_rel15->format_indicator = 1; + // carrier indicator + if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig != NULL) + AssertFatal(1==0,"Cross Carrier Scheduling Config currently not supported\n"); + //vrb to prb mapping + if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->vrb_ToPRB_Interleaver==NULL) + dci_pdu_rel15->vrb_to_prb_mapping.val = 0; + else + dci_pdu_rel15->vrb_to_prb_mapping.val = 1; + //bundling size indicator + if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->prb_BundlingType.present == NR_PDSCH_Config__prb_BundlingType_PR_dynamicBundling) + AssertFatal(1==0,"Dynamic PRB bundling type currently not supported\n"); + //rate matching indicator + uint16_t msb = (bwp->bwp_Dedicated->pdsch_Config->choice.setup->rateMatchPatternGroup1==NULL)?0:1; + uint16_t lsb = (bwp->bwp_Dedicated->pdsch_Config->choice.setup->rateMatchPatternGroup2==NULL)?0:1; + dci_pdu_rel15->rate_matching_indicator.val = lsb | (msb<<1); + // aperiodic ZP CSI-RS trigger + if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList != NULL) + AssertFatal(1==0,"Aperiodic ZP CSI-RS currently not supported\n"); + // transmission configuration indication + if (bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1]->tci_PresentInDCI != NULL) + AssertFatal(1==0,"TCI in DCI currently not supported\n"); + //srs resource set + if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->carrierSwitching!=NULL) { + NR_SRS_CarrierSwitching_t *cs = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->carrierSwitching->choice.setup; + if (cs->srs_TPC_PDCCH_Group!=NULL){ + switch(cs->srs_TPC_PDCCH_Group->present) { + case NR_SRS_CarrierSwitching__srs_TPC_PDCCH_Group_PR_NOTHING: + dci_pdu_rel15->srs_request.val = 0; + break; + case NR_SRS_CarrierSwitching__srs_TPC_PDCCH_Group_PR_typeA: + AssertFatal(1==0,"SRS TPC PRCCH group type A currently not supported\n"); + break; + case NR_SRS_CarrierSwitching__srs_TPC_PDCCH_Group_PR_typeB: + AssertFatal(1==0,"SRS TPC PRCCH group type B currently not supported\n"); + break; + } + } + else + dci_pdu_rel15->srs_request.val = 0; + } + else + dci_pdu_rel15->srs_request.val = 0; + // CBGTI and CBGFI + if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) + AssertFatal(1==0,"CBG transmission currently not supported\n"); + // dmrs sequence initialization + dci_pdu_rel15->dmrs_sequence_initialization = 0; // FIXME no information on what this bit should be in 38.212 + break; + } +} + void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, int *dci_formats, - int *rnti_types) { + int *rnti_types, + int bwp_id) { uint16_t N_RB = pdcch_pdu_rel15->BWPSize; uint8_t fsize=0, pos=0; @@ -760,10 +807,10 @@ void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup, for (int d=0;dnumDlDci;d++) { uint64_t *dci_pdu = (uint64_t *)pdcch_pdu_rel15->Payload[d]; - int dci_size = nr_dci_size(secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],rnti_types[d],pdcch_pdu_rel15->BWPSize); + int dci_size = nr_dci_size(secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],rnti_types[d],pdcch_pdu_rel15->BWPSize,bwp_id); pdcch_pdu_rel15->PayloadSizeBits[d] = dci_size; AssertFatal(pdcch_pdu_rel15->PayloadSizeBits[d]<=64, "DCI sizes above 64 bits not yet supported"); - prepare_dci(secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d]); + prepare_dci(secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],bwp_id); pos = 0; /// Payload generation diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 3fcd8d5482..a6cd3b1869 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -151,7 +151,13 @@ void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, int *dci_formats, - int *rnti_types); + int *rnti_types, + int bwp_id); + +void prepare_dci(NR_CellGroupConfig_t *secondaryCellGroup, + dci_pdu_rel15_t *dci_pdu_rel15, + nr_dci_format_t format, + int bwp_id); void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, NR_ServingCellConfigCommon_t *scc, @@ -194,7 +200,8 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup, dci_pdu_rel15_t *dci_pdu, nr_dci_format_t format, nr_rnti_type_t rnti_type, - uint16_t N_RB); + uint16_t N_RB, + int bwp_id); int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, int bwp_id,