Enable 4 layers Transmission for PDSCH: tested only for dlsim and RFsim with pmi=0
This commit is contained in:
@@ -66,9 +66,8 @@ extern uint16_t beta_cqi[16];
|
|||||||
void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
|
void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
|
||||||
const NR_DL_FRAME_PARMS *const fp) {
|
const NR_DL_FRAME_PARMS *const fp) {
|
||||||
AssertFatal( pdsch, "pdsch==0" );
|
AssertFatal( pdsch, "pdsch==0" );
|
||||||
pdsch->pmi_ext = (uint8_t *)malloc16_clear( fp->N_RB_DL );
|
|
||||||
pdsch->llr[0] = (int16_t *)malloc16_clear( (8*(3*8*6144))*sizeof(int16_t) );
|
//pdsch->layer_llr[0] = (int16_t *)malloc16_clear( (8*(3*8*6144))*sizeof(int16_t) );
|
||||||
pdsch->layer_llr[0] = (int16_t *)malloc16_clear( (8*(3*8*6144))*sizeof(int16_t) );
|
|
||||||
pdsch->llr128 = (int16_t **)malloc16_clear( sizeof(int16_t *) );
|
pdsch->llr128 = (int16_t **)malloc16_clear( sizeof(int16_t *) );
|
||||||
// FIXME! no further allocation for (int16_t*)pdsch->llr128 !!! expect SIGSEGV
|
// FIXME! no further allocation for (int16_t*)pdsch->llr128 !!! expect SIGSEGV
|
||||||
// FK, 11-3-2015: this is only as a temporary pointer, no memory is stored there
|
// FK, 11-3-2015: this is only as a temporary pointer, no memory is stored there
|
||||||
@@ -80,8 +79,6 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
|
|||||||
pdsch->dl_ch_estimates_ext = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
pdsch->dl_ch_estimates_ext = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
||||||
pdsch->dl_bf_ch_estimates = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
pdsch->dl_bf_ch_estimates = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
||||||
pdsch->dl_bf_ch_estimates_ext = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
pdsch->dl_bf_ch_estimates_ext = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
||||||
//pdsch->dl_ch_rho_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
|
|
||||||
//pdsch->dl_ch_rho2_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
|
|
||||||
pdsch->dl_ch_mag0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
pdsch->dl_ch_mag0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
||||||
pdsch->dl_ch_magb0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
pdsch->dl_ch_magb0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
||||||
pdsch->dl_ch_magr0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
pdsch->dl_ch_magr0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
|
||||||
@@ -110,8 +107,6 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
|
|||||||
pdsch->dl_ch_estimates_ext[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
pdsch->dl_ch_estimates_ext[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
||||||
pdsch->dl_bf_ch_estimates[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * fp->ofdm_symbol_size*7*2);
|
pdsch->dl_bf_ch_estimates[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * fp->ofdm_symbol_size*7*2);
|
||||||
pdsch->dl_bf_ch_estimates_ext[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
pdsch->dl_bf_ch_estimates_ext[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
||||||
//pdsch->dl_ch_rho_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
|
|
||||||
//pdsch->dl_ch_rho2_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
|
|
||||||
pdsch->dl_ch_mag0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
pdsch->dl_ch_mag0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
||||||
pdsch->dl_ch_magb0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
pdsch->dl_ch_magb0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
||||||
pdsch->dl_ch_magr0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
pdsch->dl_ch_magr0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
|
||||||
@@ -325,14 +320,14 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
|
|||||||
}
|
}
|
||||||
|
|
||||||
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
|
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
|
||||||
ue->pdsch_vars[th_id][gNB_id]->llr_shifts = (uint8_t *)malloc16_clear(7*2*fp->N_RB_DL*12);
|
for (int i=0; i<NR_MAX_NB_CODEWORDS; i++) {
|
||||||
ue->pdsch_vars[th_id][gNB_id]->llr_shifts_p = ue->pdsch_vars[0][gNB_id]->llr_shifts;
|
ue->pdsch_vars[th_id][gNB_id]->llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
|
||||||
ue->pdsch_vars[th_id][gNB_id]->llr[1] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );
|
}
|
||||||
ue->pdsch_vars[th_id][gNB_id]->layer_llr[1] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );
|
for (int i=0; i<NR_MAX_NB_LAYERS; i++) {
|
||||||
ue->pdsch_vars[th_id][gNB_id]->llr128_2ndstream = (int16_t **)malloc16_clear( sizeof(int16_t *) );
|
ue->pdsch_vars[th_id][gNB_id]->layer_llr[i] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );//Q_m = 8 bits/Sym, Code_Rate=3, Number of Segments =8, Circular Buffer K_cb = 8448
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
|
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
|
||||||
ue->pdsch_vars[th_id][gNB_id]->dl_ch_rho2_ext = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
|
ue->pdsch_vars[th_id][gNB_id]->dl_ch_rho2_ext = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -3009,26 +3009,12 @@ static int nr_dlsch_llr(NR_UE_PDSCH **pdsch_vars,
|
|||||||
uint8_t nr_slot_rx,
|
uint8_t nr_slot_rx,
|
||||||
uint8_t beamforming_mode)
|
uint8_t beamforming_mode)
|
||||||
{
|
{
|
||||||
|
|
||||||
int16_t *pllr_symbol_cw0;
|
|
||||||
int16_t *pllr_symbol_cw1;
|
|
||||||
int16_t *pllr_symbol_layer0;
|
|
||||||
int16_t *pllr_symbol_layer1;
|
|
||||||
uint32_t llr_offset_symbol;
|
uint32_t llr_offset_symbol;
|
||||||
|
|
||||||
if (first_symbol_flag==1) pdsch_vars[gNB_id]->llr_offset[symbol-1] = 0;
|
if (first_symbol_flag==1)
|
||||||
|
pdsch_vars[gNB_id]->llr_offset[symbol-1] = 0;
|
||||||
llr_offset_symbol = pdsch_vars[gNB_id]->llr_offset[symbol-1];
|
llr_offset_symbol = pdsch_vars[gNB_id]->llr_offset[symbol-1];
|
||||||
//pllr_symbol_cw0_deint = (int8_t*)pdsch_vars[gNB_id]->llr[0];
|
|
||||||
//pllr_symbol_cw1_deint = (int8_t*)pdsch_vars[gNB_id]->llr[1];
|
|
||||||
pllr_symbol_layer0 = pdsch_vars[gNB_id]->layer_llr[0];
|
|
||||||
pllr_symbol_layer1 = pdsch_vars[gNB_id]->layer_llr[1];
|
|
||||||
pllr_symbol_layer0 += llr_offset_symbol;
|
|
||||||
pllr_symbol_layer1 += llr_offset_symbol;
|
|
||||||
pllr_symbol_cw0 = pdsch_vars[gNB_id]->llr[0];
|
|
||||||
pllr_symbol_cw1 = pdsch_vars[gNB_id]->llr[1];
|
|
||||||
pllr_symbol_cw0 += llr_offset_symbol;
|
|
||||||
pllr_symbol_cw1 += llr_offset_symbol;
|
|
||||||
|
|
||||||
pdsch_vars[gNB_id]->llr_offset[symbol] = len*dlsch0_harq->Qm + llr_offset_symbol;
|
pdsch_vars[gNB_id]->llr_offset[symbol] = len*dlsch0_harq->Qm + llr_offset_symbol;
|
||||||
|
|
||||||
/*LOG_I(PHY,"compute LLRs [symbol %d] NbRB %d Qm %d LLRs-Length %d LLR-Offset %d @LLR Buff %x @LLR Buff(symb) %x\n",
|
/*LOG_I(PHY,"compute LLRs [symbol %d] NbRB %d Qm %d LLRs-Length %d LLR-Offset %d @LLR Buff %x @LLR Buff(symb) %x\n",
|
||||||
|
|||||||
@@ -93,7 +93,7 @@
|
|||||||
#define NR_MAX_CSET_DURATION 3
|
#define NR_MAX_CSET_DURATION 3
|
||||||
|
|
||||||
#define NR_MAX_NB_RBG 18
|
#define NR_MAX_NB_RBG 18
|
||||||
#define NR_MAX_NB_LAYERS 2 // 8 // SU-MIMO (3GPP TS 38.211 V15.4.0 section 7.3.1.3)
|
#define NR_MAX_NB_LAYERS 4 // 8 // SU-MIMO (3GPP TS 38.211 V15.4.0 section 7.3.1.3)
|
||||||
#define NR_MAX_NB_CODEWORDS 2
|
#define NR_MAX_NB_CODEWORDS 2
|
||||||
#define NR_MAX_NB_HARQ_PROCESSES 16
|
#define NR_MAX_NB_HARQ_PROCESSES 16
|
||||||
#define NR_MAX_PDSCH_ENCODED_LENGTH (NR_MAX_NB_RB*NR_SYMBOLS_PER_SLOT*NR_NB_SC_PER_RB*8*NR_MAX_NB_LAYERS) // 8 is the maximum modulation order (it was 950984 before !!)
|
#define NR_MAX_PDSCH_ENCODED_LENGTH (NR_MAX_NB_RB*NR_SYMBOLS_PER_SLOT*NR_NB_SC_PER_RB*8*NR_MAX_NB_LAYERS) // 8 is the maximum modulation order (it was 950984 before !!)
|
||||||
|
|||||||
@@ -528,8 +528,8 @@ int main(int argc, char **argv)
|
|||||||
case 'x':
|
case 'x':
|
||||||
g_nrOfLayers=atoi(optarg);
|
g_nrOfLayers=atoi(optarg);
|
||||||
|
|
||||||
if ((g_nrOfLayers!=1) &&
|
if ((g_nrOfLayers==0) ||
|
||||||
(g_nrOfLayers!=2)) {
|
(g_nrOfLayers>4)) {
|
||||||
printf("Unsupported nr Of Layers %d\n",g_nrOfLayers);
|
printf("Unsupported nr Of Layers %d\n",g_nrOfLayers);
|
||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
}
|
||||||
@@ -1170,10 +1170,10 @@ int main(int argc, char **argv)
|
|||||||
frame_length_complex_samples,
|
frame_length_complex_samples,
|
||||||
0);
|
0);
|
||||||
|
|
||||||
double H_awgn_mimo[4][4] ={{1.0, 0.5, 0.25, 0.125},//rx 0
|
double H_awgn_mimo[4][4] ={{1.0, 0.0, 0.0, 0.0}, //rx 0
|
||||||
{0.5, 1.0, 0.5, 0.25}, //rx 1
|
{0.0, 1.0, 0.0, 0.0}, //rx 1
|
||||||
{0.25, 0.5, 1.0, 0.5}, //rx 2
|
{0.0, 0.0, 1.0, 0.0}, //rx 2
|
||||||
{0.125, 0.25, 0.5, 1.0}};//rx 3
|
{0.0, 0.0, 0.0, 1.0}};//rx 3
|
||||||
|
|
||||||
for (i=frame_parms->get_samples_slot_timestamp(slot,frame_parms,0);
|
for (i=frame_parms->get_samples_slot_timestamp(slot,frame_parms,0);
|
||||||
i<frame_parms->get_samples_slot_timestamp(slot+1,frame_parms,0);
|
i<frame_parms->get_samples_slot_timestamp(slot+1,frame_parms,0);
|
||||||
@@ -1228,7 +1228,7 @@ int main(int argc, char **argv)
|
|||||||
TBS = UE_harq_process->TBS;//rel15->TBSize[0];
|
TBS = UE_harq_process->TBS;//rel15->TBSize[0];
|
||||||
uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos);
|
uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos);
|
||||||
uint16_t nb_rb = rel15->rbSize;
|
uint16_t nb_rb = rel15->rbSize;
|
||||||
uint8_t nb_re_dmrs = rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4;
|
uint8_t nb_re_dmrs = rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6*UE_harq_process->n_dmrs_cdm_groups : 4*UE_harq_process->n_dmrs_cdm_groups;
|
||||||
uint8_t mod_order = rel15->qamModOrder[0];
|
uint8_t mod_order = rel15->qamModOrder[0];
|
||||||
uint8_t nb_symb_sch = rel15->NrOfSymbols;
|
uint8_t nb_symb_sch = rel15->NrOfSymbols;
|
||||||
|
|
||||||
|
|||||||
@@ -736,10 +736,10 @@ static int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimest
|
|||||||
CirSize
|
CirSize
|
||||||
);
|
);
|
||||||
else { // no channel modeling
|
else { // no channel modeling
|
||||||
double H_awgn_mimo[4][4] ={{1.0, 0.5, 0.25, 0.125},//rx 0
|
double H_awgn_mimo[4][4] ={{1.0, 0.0, 0.0, 0.0},//rx 0
|
||||||
{0.5, 1.0, 0.5, 0.25}, //rx 1
|
{0.0, 1.0, 0.0, 0.0}, //rx 1
|
||||||
{0.25, 0.5, 1.0, 0.5}, //rx 2
|
{0.0, 0.0, 1.0, 0.0}, //rx 2
|
||||||
{0.125, 0.25, 0.5, 1.0}};//rx 3
|
{0.0, 0.0, 0.0, 1.0}};//rx 3
|
||||||
|
|
||||||
sample_t *out=(sample_t *)samplesVoid[a];
|
sample_t *out=(sample_t *)samplesVoid[a];
|
||||||
int nbAnt_tx = ptr->th.nbAnt;//number of Tx antennas
|
int nbAnt_tx = ptr->th.nbAnt;//number of Tx antennas
|
||||||
|
|||||||
@@ -22,7 +22,7 @@ gNBs =
|
|||||||
////////// Physical parameters:
|
////////// Physical parameters:
|
||||||
|
|
||||||
ssb_SubcarrierOffset = 0;
|
ssb_SubcarrierOffset = 0;
|
||||||
pdsch_AntennaPorts = 1;
|
pdsch_AntennaPorts = 4;
|
||||||
pusch_AntennaPorts = 1;
|
pusch_AntennaPorts = 1;
|
||||||
|
|
||||||
servingCellConfigCommon = (
|
servingCellConfigCommon = (
|
||||||
@@ -225,7 +225,7 @@ L1s = (
|
|||||||
RUs = (
|
RUs = (
|
||||||
{
|
{
|
||||||
local_rf = "yes"
|
local_rf = "yes"
|
||||||
nb_tx = 1
|
nb_tx = 4
|
||||||
nb_rx = 1
|
nb_rx = 1
|
||||||
att_tx = 0
|
att_tx = 0
|
||||||
att_rx = 0;
|
att_rx = 0;
|
||||||
@@ -238,11 +238,11 @@ RUs = (
|
|||||||
## beamforming 1x4 matrix: 1 layer x 4 antennas
|
## beamforming 1x4 matrix: 1 layer x 4 antennas
|
||||||
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
|
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
|
||||||
## beamforming 2x2 matrix:
|
## beamforming 2x2 matrix:
|
||||||
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
|
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
|
||||||
## beamforming 2x4 matrix:
|
## beamforming 2x4 matrix:
|
||||||
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000];
|
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000];
|
||||||
## beamforming 4x4 matrix:
|
## beamforming 4x4 matrix:
|
||||||
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
|
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
|
||||||
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
|
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
|
||||||
clock_src = "external";
|
clock_src = "external";
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user