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Merge branch 'develop' into NR_RRC_PRACH_procedures

Browse Source 
Conflicts:
	executables/nr-ue.c
	openair1/PHY/NR_REFSIG/dmrs_nr.c
	openair1/PHY/NR_TRANSPORT/nr_prach.c
	openair1/PHY/NR_TRANSPORT/nr_transport_common_proto.h
	openair1/PHY/NR_TRANSPORT/nr_transport_proto_common.h
	openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
	openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
	openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
	openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
	openair1/SIMULATION/NR_PHY/prachsim.c
	openair1/SIMULATION/NR_PHY/ulsim.c
	openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h
	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
This commit is contained in:
Thomas Schlichter
2020-06-03 19:50:54 +02:00
parent ce105df4e7 362da7c920
commit 225a500b3e
150 changed files with 1734 additions and 4516 deletions
Download Patch File Download Diff File Expand all files Collapse all files
targets/ARCH/COMMON/common_lib.h
+38 -4
View File
@@ -52,6 +52,9 @@
#define RAU_LOCAL_RADIO_HEAD 0
#define RAU_REMOTE_RADIO_HEAD 1
#define MAX_WRITE_THREAD_PACKAGE 10
#define MAX_WRITE_THREAD_BUFFER_SIZE 8
#ifndef MAX_CARDS
#define MAX_CARDS 8
#endif
@@ -69,13 +72,9 @@ typedef enum {
max_gain=0,med_gain,byp_gain
} rx_gain_t;
#if OCP_FRAMEWORK
#include <enums.h>
#else
typedef enum {
duplex_mode_TDD=1,duplex_mode_FDD=0
} duplex_mode_t;
#endif
/** @addtogroup _GENERIC_PHY_RF_INTERFACE_
@@ -275,8 +274,37 @@ typedef struct {
void *rx;
} if_buffer_t;
typedef struct {
openair0_timestamp timestamp;
void *buff[MAX_WRITE_THREAD_BUFFER_SIZE];// buffer to be write;
int nsamps;
int cc;
signed char first_packet;
signed char last_packet;
int flags_msb;
} openair0_write_package_t;
typedef struct {
openair0_write_package_t write_package[MAX_WRITE_THREAD_PACKAGE];
int start;
int end;
/// \internal This variable is protected by \ref mutex_write
int count_write;
/// pthread struct for trx write thread
pthread_t pthread_write;
/// pthread attributes for trx write thread
pthread_attr_t attr_write;
/// condition varible for trx write thread
pthread_cond_t cond_write;
/// mutex for trx write thread
pthread_mutex_t mutex_write;
} openair0_thread_t;
/*!\brief structure holds the parameters to configure USRP devices */
struct openair0_device_t {
/*!tx write thread*/
openair0_thread_t write_thread;
/*!brief Module ID of this device */
int Mod_id;
@@ -400,6 +428,12 @@ struct openair0_device_t {
* \param arg pointer to capabilities or configuration
*/
void (*configure_rru)(int idx, void *arg);
/*! \brief RRU Configuration callback
* \param idx RU index
* \param arg pointer to capabilities or configuration
*/
int (*trx_write_init)(openair0_device *device);
};
/* type of device init function, implemented in shared lib */
targets/ARCH/ETHERNET/USERSPACE/LIB/if_defs.h
+5 -4
View File
@@ -30,6 +30,9 @@
* \warning
*/
#ifndef __ETHERNET_USERSPACE_LIB_IF_DEFS__H__
#define __ETHERNET_USERSPACE_LIB_IF_DEFS__H__
#include <netinet/ether.h>
#include <stdint.h>
@@ -37,15 +40,11 @@
#include "PHY/LTE_TRANSPORT/if5_tools.h"
// ETH transport preference modes
#ifdef OCP_FRAMEWORK
#include "enums.h"
#else
#define ETH_UDP_MODE 0
#define ETH_RAW_MODE 1
#define ETH_UDP_IF4p5_MODE 2
#define ETH_RAW_IF4p5_MODE 3
#define ETH_RAW_IF5_MOBIPASS 4
#endif
// COMMOM HEADER LENGTHS
@@ -84,3 +83,5 @@
#define RAW_IF5_MOBIPASS_BLOCK_SIZE_BYTES 1280
#define RAW_IF5_MOBIPASS_SIZE_BYTES (MAC_HEADER_SIZE_BYTES + sizeof_IF5_mobipass_header_t + RAW_IF5_MOBIPASS_BLOCK_SIZE_BYTES)
#define PAYLOAD_MOBIPASS_NUM_SAMPLES 640
#endif
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+200 -32
View File
@@ -50,6 +50,8 @@
#include "common_lib.h"
#include "assertions.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include <sys/resource.h>
#ifdef __SSE4_1__
@@ -341,37 +343,13 @@ static int trx_usrp_write(openair0_device *device,
int flags_lsb = flags&0xff;
int flags_msb = (flags>>8)&0xff;
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx[i][j] = _mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#else
buff_tx[i][j] = _mm_slli_epi16(((__m128i *)buff[i])[j],4);
#endif
#elif defined(__arm__)
buff_tx[i][j] = vshlq_n_s16(((int16x8_t *)buff[i])[j],4);
#endif
}
}
int end;
int write_tread = 0;
openair0_thread_t *write_thread = &device->write_thread;
openair0_write_package_t *write_package = write_thread->write_package;
AssertFatal( MAX_WRITE_THREAD_BUFFER_SIZE >= cc,"Do not support more than %d cc number\n", MAX_WRITE_THREAD_BUFFER_SIZE);
boolean_t first_packet_state=false,last_packet_state=false;
@@ -404,7 +382,37 @@ static int trx_usrp_write(openair0_device *device,
last_packet_state = true;
}
if(write_tread == 0){
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx[i][j] = _mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#else
buff_tx[i][j] = _mm_slli_epi16(((__m128i *)buff[i])[j],4);
#endif
#elif defined(__arm__)
buff_tx[i][j] = vshlq_n_s16(((int16x8_t *)buff[i])[j],4);
#endif
}
}
s->tx_md.has_time_spec = true;
s->tx_md.start_of_burst = (s->tx_count==0) ? true : first_packet_state;
s->tx_md.end_of_burst = last_packet_state;
@@ -432,11 +440,170 @@ static int trx_usrp_write(openair0_device *device,
ret = (int)s->tx_stream->send(&(((int16_t *)buff_tx[0])[0]), nsamps, s->tx_md);
}
if (ret != nsamps) LOG_E(HW,"[xmit] tx samples %d != %d\n",ret,nsamps);
if (ret != nsamps) LOG_E(HW,"[xmit] tx samples %d != %d\n",ret,nsamps);
return ret;
}
else{
pthread_mutex_lock(&write_thread->mutex_write);
if(write_thread->count_write >= MAX_WRITE_THREAD_PACKAGE){
LOG_W(HW,"Buffer overflow, count_write = %d, start = %d end = %d, resetting write package\n", write_thread->count_write, write_thread->start, write_thread->end);
write_thread->end = write_thread->start;
write_thread->count_write = 0;
}
end = write_thread->end;
write_package[end].timestamp = timestamp;
write_package[end].nsamps = nsamps;
write_package[end].cc = cc;
write_package[end].first_packet = first_packet_state;
write_package[end].last_packet = last_packet_state;
write_package[end].flags_msb = flags_msb;
for (int i = 0; i < cc; i++)
write_package[end].buff[i] = buff[i];
write_thread->count_write++;
write_thread->end = (write_thread->end + 1)% MAX_WRITE_THREAD_PACKAGE;
pthread_cond_signal(&write_thread->cond_write);
pthread_mutex_unlock(&write_thread->mutex_write);
return 0;
}
return ret;
}
//-----------------------start--------------------------
/*! \brief Called to send samples to the USRP RF target
@param device pointer to the device structure specific to the RF hardware target
@param timestamp The timestamp at which the first sample MUST be sent
@param buff Buffer which holds the samples
@param nsamps number of samples to be sent
@param antenna_id index of the antenna if the device has multiple antennas
@param flags flags must be set to TRUE if timestamp parameter needs to be applied
*/
void *trx_usrp_write_thread(void * arg){
int ret=0;
openair0_device *device=(openair0_device *)arg;
openair0_thread_t *write_thread = &device->write_thread;
openair0_write_package_t *write_package = write_thread->write_package;
usrp_state_t *s;
int nsamps2; // aligned to upper 32 or 16 byte boundary
int start;
openair0_timestamp timestamp;
void **buff;
int nsamps;
int cc;
signed char first_packet;
signed char last_packet;
int flags_msb;
while(1){
pthread_mutex_lock(&write_thread->mutex_write);
while (write_thread->count_write == 0) {
pthread_cond_wait(&write_thread->cond_write,&write_thread->mutex_write); // this unlocks mutex_rxtx while waiting and then locks it again
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_THREAD, 1 );
s = (usrp_state_t *)device->priv;
start = write_thread->start;
timestamp = write_package[start].timestamp;
buff = write_package[start].buff;
nsamps = write_package[start].nsamps;
cc = write_package[start].cc;
first_packet = write_package[start].first_packet;
last_packet = write_package[start].last_packet;
flags_msb = write_package[start].flags_msb;
write_thread->start = (write_thread->start + 1)% MAX_WRITE_THREAD_PACKAGE;
write_thread->count_write--;
pthread_mutex_unlock(&write_thread->mutex_write);
/*if(write_thread->count_write != 0){
LOG_W(HW,"count write = %d, start = %d, end = %d\n", write_thread->count_write, write_thread->start, write_thread->end);
}*/
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx[i][j] = _mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#else
buff_tx[i][j] = _mm_slli_epi16(((__m128i *)buff[i])[j],4);
#endif
#elif defined(__arm__)
buff_tx[i][j] = vshlq_n_s16(((int16x8_t *)buff[i])[j],4);
#endif
}
}
s->tx_md.has_time_spec = true;
s->tx_md.start_of_burst = (s->tx_count==0) ? true : first_packet;
s->tx_md.end_of_burst = last_packet;
s->tx_md.time_spec = uhd::time_spec_t::from_ticks(timestamp, s->sample_rate);
s->tx_count++;
// bit 3 enables gpio (for backward compatibility)
if (flags_msb&8) {
// push GPIO bits 7-9 from flags_msb
int gpio789=(flags_msb&7)<<7;
s->usrp->set_command_time(s->tx_md.time_spec);
s->usrp->set_gpio_attr("FP0", "OUT", gpio789, 0x380);
s->usrp->clear_command_time();
}
if (cc>1) {
std::vector<void *> buff_ptrs;
for (int i=0; i<cc; i++)
buff_ptrs.push_back(&(((int16_t *)buff_tx[i])[0]));
ret = (int)s->tx_stream->send(buff_ptrs, nsamps, s->tx_md);
}
else {
ret = (int)s->tx_stream->send(&(((int16_t *)buff_tx[0])[0]), nsamps, s->tx_md);
}
if (ret != nsamps) LOG_E(HW,"[xmit] tx samples %d != %d\n",ret,nsamps);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_USRP_SEND_RETURN, ret );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_THREAD, 0 );
if(0) break;
}
return NULL;
}
int trx_write_init(openair0_device *device){
uhd::set_thread_priority_safe(1.0);
openair0_thread_t *write_thread = &device->write_thread;
printf("initializing tx write thread\n");
write_thread->start = 0;
write_thread->end = 0;
write_thread->count_write = 0;
printf("end of tx write thread\n");
pthread_create(&write_thread->pthread_write,NULL,trx_usrp_write_thread,(void *)device);
return(0);
}
//---------------------end-------------------------
/*! \brief Receive samples from hardware.
* Read \ref nsamps samples from each channel to buffers. buff[0] is the array for
* the first channel. *ptimestamp is the time at which the first sample
@@ -765,6 +932,7 @@ extern "C" {
device->trx_stop_func = trx_usrp_stop;
device->trx_set_freq_func = trx_usrp_set_freq;
device->trx_set_gains_func = trx_usrp_set_gains;
device->trx_write_init = trx_write_init;
// hotfix! to be checked later
targets/ARCH/rfsimulator/simulator.c
+4
View File
@@ -679,6 +679,9 @@ int rfsimulator_set_freq(openair0_device *device, openair0_config_t *openair0_cf
int rfsimulator_set_gains(openair0_device *device, openair0_config_t *openair0_cfg) {
return 0;
}
int rfsimulator_write_init(openair0_device *device){
return 0;
}
__attribute__((__visibility__("default")))
int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
// to change the log level, use this on command line
@@ -702,6 +705,7 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
device->type = USRP_B200_DEV;
device->openair0_cfg=&openair0_cfg[0];
device->priv = rfsimulator;
device->trx_write_init = rfsimulator_write_init;
for (int i=0; i<FD_SETSIZE; i++)
rfsimulator->buf[i].conn_sock=-1;
targets/COMMON/create_tasks_mbms.h
-32
View File
@@ -1,32 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#ifndef CREATE_TASKS_H_
#define CREATE_TASKS_H_
/* External declaration of L2L1 task that depend on the target */
extern void *l2l1_task(void *arg);
int create_tasks(uint32_t enb_nb);
int create_tasks_ue(uint32_t ue_nb);
int create_tasks_mbms(uint32_t enb_nb);
#endif /* CREATE_TASKS_H_ */
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
+2 -2
View File
@@ -248,8 +248,8 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2";
#clock_src = "external";
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
clock_src = "external";
}
);
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf
+1 -1
View File
@@ -242,7 +242,7 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2";
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
clock_src = "external";
}
);
targets/RT/USER/gNB_usrp.gtkw
+13 -9
View File
@@ -1,21 +1,25 @@
[*]
[*] GTKWave Analyzer v3.3.61 (w)1999-2014 BSI
[*] Tue Dec 17 15:31:51 2019
[*] Wed Mar 4 14:05:43 2020
[*]
[dumpfile] "/tmp/gNB.vcd"
[dumpfile_mtime] "Tue Dec 17 15:25:49 2019"
[dumpfile_size] 6343431
[dumpfile] "/tmp/gNB_trx_thread.vcd"
[dumpfile_mtime] "Wed Mar 4 14:05:10 2020"
[dumpfile_size] 10750468
[savefile] "/home/wangts/openairinterface5g/targets/RT/USER/gNB_usrp.gtkw"
[timestart] 1517712000
[size] 1920 1018
[pos] -9 -33
*-19.276148 1518358451 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[timestart] 31148700000
[size] 1916 1002
[pos] -1 -25
*-23.852516 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 386
[signals_width] 344
[sst_expanded] 1
[sst_vpaned_height] 267
[sst_vpaned_height] 262
@28
functions.trx_read
functions.trx_write_thread
@25
variables.trx_write_flags[63:0]
@28
functions.trx_write
@420
variables.frame_number_TX0_UE[63:0]
targets/RT/USER/lte-enb.c
-4
View File
@@ -851,9 +851,7 @@ void init_eNB_proc(int inst) {
for (CC_id=0; CC_id<RC.nb_CC[inst]; CC_id++) {
eNB = RC.eNB[inst][CC_id];
#ifndef OCP_FRAMEWORK
LOG_I(PHY,"Initializing eNB processes instance:%d CC_id %d \n",inst,CC_id);
#endif
proc = &eNB->proc;
L1_proc = &proc->L1_proc;
L1_proc_tx = &proc->L1_proc_tx;
@@ -1247,9 +1245,7 @@ void init_eNB(int single_thread_flag,
eNB->abstraction_flag = 0;
eNB->single_thread_flag = single_thread_flag;
LOG_I(PHY,"Initializing eNB %d CC_id %d single_thread_flag:%d\n",inst,CC_id,single_thread_flag);
#ifndef OCP_FRAMEWORK
LOG_I(PHY,"Initializing eNB %d CC_id %d\n",inst,CC_id);
#endif
LOG_I(PHY,"Registering with MAC interface module\n");
AssertFatal((eNB->if_inst = IF_Module_init(inst))!=NULL,"Cannot register interface");
eNB->if_inst->schedule_response = schedule_response;
targets/RT/USER/lte-ru.c
-2
View File
@@ -2233,9 +2233,7 @@ void init_RU_proc(RU_t *ru) {
RU_proc_t *proc;
pthread_attr_t *attr_FH=NULL, *attr_FH1=NULL, *attr_prach=NULL, *attr_asynch=NULL, *attr_synch=NULL, *attr_emulateRF=NULL, *attr_ctrl=NULL, *attr_prach_br=NULL;
//pthread_attr_t *attr_fep=NULL;
#ifndef OCP_FRAMEWORK
LOG_I(PHY,"Initializing RU proc %d (%s,%s),\n",ru->idx,NB_functions[ru->function],NB_timing[ru->if_timing]);
#endif
proc = &ru->proc;
memset((void *)proc,0,sizeof(RU_proc_t));
proc->ru = ru;