UE: Add DCI_IND, DL_CONFIG_REQ for DL-SCH
This commit is contained in:
@@ -10,10 +10,32 @@
|
|||||||
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
|
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
|
||||||
|
|
||||||
|
|
||||||
|
/// RX_IND
|
||||||
#define FAPI_NR_RX_PDU_TYPE_MIB 0x01
|
#define FAPI_NR_RX_PDU_TYPE_MIB 0x01
|
||||||
#define FAPI_NR_RX_PDU_TYPE_SIB 0x02
|
#define FAPI_NR_RX_PDU_TYPE_SIB 0x02
|
||||||
#define FAPI_NR_RX_PDU_TYPE_DLSCH 0x03
|
#define FAPI_NR_RX_PDU_TYPE_DLSCH 0x03
|
||||||
|
#define FAPI_NR_DCI_IND 0x04
|
||||||
|
|
||||||
|
#define FAPI_NR_SIBS_MASK_SIB1 0x1
|
||||||
|
|
||||||
|
|
||||||
|
/// DCI_IND
|
||||||
|
#define FAPI_NR_DCI_TYPE_0_0 0x01
|
||||||
|
#define FAPI_NR_DCI_TYPE_0_1 0x02
|
||||||
|
#define FAPI_NR_DCI_TYPE_1_0 0x03
|
||||||
|
#define FAPI_NR_DCI_TYPE_1_1 0x04
|
||||||
|
#define FAPI_NR_DCI_TYPE_2_0 0x05
|
||||||
|
#define FAPI_NR_DCI_TYPE_2_1 0x06
|
||||||
|
#define FAPI_NR_DCI_TYPE_2_2 0x07
|
||||||
|
#define FAPI_NR_DCI_TYPE_2_3 0x08
|
||||||
|
|
||||||
|
|
||||||
|
/// TX_REQ
|
||||||
|
|
||||||
|
|
||||||
|
/// DL_CONFIG_REQ
|
||||||
|
#define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01
|
||||||
|
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
|
||||||
|
|
||||||
#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
|
#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
|
||||||
#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
|
#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
|
||||||
@@ -21,5 +43,6 @@
|
|||||||
#define PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE 0x01
|
#define PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE 0x01
|
||||||
#define PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS 0x02
|
#define PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS 0x02
|
||||||
|
|
||||||
|
/// UL_CONFIG_REQ
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
@@ -116,10 +116,10 @@ typedef struct {
|
|||||||
uint8_t cce_reg_interleaved_interleaver_size; // valid if CCE to REG mapping type is interleaved type
|
uint8_t cce_reg_interleaved_interleaver_size; // valid if CCE to REG mapping type is interleaved type
|
||||||
uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
|
uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
|
||||||
uint8_t precoder_granularity;
|
uint8_t precoder_granularity;
|
||||||
uint8_t tci_state_pdcch;
|
|
||||||
|
|
||||||
uint8_t tci_present_in_dci;
|
|
||||||
uint16_t pdcch_dmrs_scrambling_id;
|
uint16_t pdcch_dmrs_scrambling_id;
|
||||||
|
|
||||||
|
uint8_t tci_state_pdcch;
|
||||||
|
uint8_t tci_present_in_dci;
|
||||||
} fapi_nr_coreset_t;
|
} fapi_nr_coreset_t;
|
||||||
|
|
||||||
//
|
//
|
||||||
@@ -135,19 +135,15 @@ typedef struct {
|
|||||||
typedef struct {
|
typedef struct {
|
||||||
uint16_t rnti;
|
uint16_t rnti;
|
||||||
uint8_t dci_type;
|
uint8_t dci_type;
|
||||||
uint8_t dci_size;
|
|
||||||
fapi_nr_dci_pdu_rel15_t dci;
|
fapi_nr_dci_pdu_rel15_t dci;
|
||||||
} fapi_nr_dci_indication_pdu_t;
|
} fapi_nr_dci_indication_pdu_t;
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
uint16_t number_of_dcis;
|
|
||||||
fapi_nr_dci_indication_pdu_t* dci_list;
|
|
||||||
} fapi_nr_dci_indication_body_t;
|
|
||||||
|
|
||||||
///
|
///
|
||||||
typedef struct {
|
typedef struct {
|
||||||
uint32_t sfn_slot;
|
uint32_t sfn_slot;
|
||||||
fapi_nr_dci_indication_body_t dci_indication_body;
|
uint16_t number_of_dcis;
|
||||||
|
fapi_nr_dci_indication_pdu_t *dci_list;
|
||||||
} fapi_nr_dci_indication_t;
|
} fapi_nr_dci_indication_t;
|
||||||
|
|
||||||
|
|
||||||
@@ -160,12 +156,15 @@ typedef struct {
|
|||||||
uint8_t* pdu; // 3bytes
|
uint8_t* pdu; // 3bytes
|
||||||
uint8_t additional_bits;
|
uint8_t additional_bits;
|
||||||
uint8_t ssb_index;
|
uint8_t ssb_index;
|
||||||
uint8_t l_ssb;
|
uint8_t ssb_length;
|
||||||
|
uint16_t cell_id;
|
||||||
|
|
||||||
} fapi_nr_mib_pdu_t;
|
} fapi_nr_mib_pdu_t;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
uint32_t pdu_length;
|
uint32_t pdu_length;
|
||||||
uint8_t* pdu;
|
uint8_t* pdu;
|
||||||
|
uint32_t sibs_mask;
|
||||||
} fapi_nr_sib_pdu_t;
|
} fapi_nr_sib_pdu_t;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
@@ -255,7 +254,7 @@ typedef struct {
|
|||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
uint8_t pdu_type;
|
uint8_t pdu_type;
|
||||||
uint8_t pdu_size;
|
//uint8_t pdu_size;
|
||||||
union {
|
union {
|
||||||
fapi_nr_dl_config_dci_pdu dci_pdu;
|
fapi_nr_dl_config_dci_pdu dci_pdu;
|
||||||
fapi_nr_dl_config_dlsch_pdu dlsch_pdu;
|
fapi_nr_dl_config_dlsch_pdu dlsch_pdu;
|
||||||
|
|||||||
@@ -700,10 +700,47 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
|
|||||||
printf("[PBCH] decoder_output[%d] = %x\n",i,decoded_output[i]);
|
printf("[PBCH] decoder_output[%d] = %x\n",i,decoded_output[i]);
|
||||||
}
|
}
|
||||||
//#endif
|
//#endif
|
||||||
|
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
|
||||||
|
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
|
||||||
|
ue->rx_ind.number_pdus = ue->rx_ind.number_pdus + 1;
|
||||||
|
ue->rx_ind.rx_request_body = (fapi_nr_rx_request_body_t *)malloc(sizeof(fapi_nr_rx_request_body_t));
|
||||||
|
ue->rx_ind.rx_request_body->pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
|
||||||
|
ue->rx_ind.rx_request_body->mib_pdu.pdu = &decoded_output[1];
|
||||||
|
ue->rx_ind.rx_request_body->mib_pdu.additional_bits = decoded_output[0];
|
||||||
|
ue->rx_ind.rx_request_body->mib_pdu.ssb_index = ssb_index; // confirm with TCL
|
||||||
|
ue->rx_ind.rx_request_body->mib_pdu.ssb_length = Lmax; // confirm with TCL
|
||||||
|
ue->rx_ind.rx_request_body->mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
|
||||||
|
|
||||||
//ue->dl_indication.rx_ind.rx_request_body.pdu_index = FAPI_NR_RX_PDU_BCCH_BCH_TYPE;
|
ue->if_inst->dl_indication(&ue->dl_indication);
|
||||||
//ue->dl_indication.rx_ind.rx_request_body.pdu_length = 3;
|
|
||||||
//ue->dl_indication.rx_ind.rx_request_body.pdu = &decoded_output[0];
|
|
||||||
//ue->if_inst->dl_indication(&ue->dl_indication);
|
|
||||||
|
|
||||||
|
// dci reception part, should be put into dci_nr.c ? TBD
|
||||||
|
#if 0
|
||||||
|
ue->dl_indication.dci_ind = &ue->dci_ind; // hang on rx_ind instance
|
||||||
|
//ue->dci_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
|
||||||
|
uint32_t num_dci = 1;
|
||||||
|
uint32_t ii;
|
||||||
|
|
||||||
|
ue->dci_ind.number_of_dcis = num_dci;
|
||||||
|
ue->dci_ind.dci_list = (fapi_nr_dci_indication_pdu_t *)malloc(num_dci * sizeof(fapi_nr_dci_indication_pdu_t));
|
||||||
|
|
||||||
|
for(ii=0; ii<num_dci; ++ii){
|
||||||
|
//TODO check this part
|
||||||
|
(ue->dci_ind.dci_list+ii)->rnti = 0x0000;
|
||||||
|
(ue->dci_ind.dci_list+ii)->dci_type = 0;
|
||||||
|
|
||||||
|
// TODO to be fill with TCL
|
||||||
|
//ue->dci_ind.dci_list[ii]->dci.
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
ue->if_inst->dl_indication(&ue->dl_indication);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -1036,6 +1036,8 @@ typedef struct {
|
|||||||
nr_ue_if_module_t *if_inst;
|
nr_ue_if_module_t *if_inst;
|
||||||
nr_downlink_indication_t dl_indication;
|
nr_downlink_indication_t dl_indication;
|
||||||
nr_uplink_indication_t ul_indication;
|
nr_uplink_indication_t ul_indication;
|
||||||
|
fapi_nr_rx_indication_t rx_ind;
|
||||||
|
fapi_nr_dci_indication_t dci_ind;
|
||||||
|
|
||||||
// point to the current rxTx thread index
|
// point to the current rxTx thread index
|
||||||
uint8_t current_thread_id[10];
|
uint8_t current_thread_id[10];
|
||||||
|
|||||||
@@ -154,7 +154,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
|
|||||||
if (ue->mac_enabled == 1) {
|
if (ue->mac_enabled == 1) {
|
||||||
|
|
||||||
/* sr_payload = 1 means that this is a positive SR, sr_payload = 0 means that it is a negative SR */
|
/* sr_payload = 1 means that this is a positive SR, sr_payload = 0 means that it is a negative SR */
|
||||||
sr_payload = ue_get_SR(Mod_id,
|
sr_payload = nr_ue_get_SR(Mod_id,
|
||||||
CC_id,
|
CC_id,
|
||||||
frame_tx,
|
frame_tx,
|
||||||
gNB_id,
|
gNB_id,
|
||||||
|
|||||||
@@ -65,7 +65,6 @@ typedef enum {
|
|||||||
SFN_C_EQ_SFN_SSB
|
SFN_C_EQ_SFN_SSB
|
||||||
} SFN_C_TYPE;
|
} SFN_C_TYPE;
|
||||||
|
|
||||||
|
|
||||||
/*!\brief Top level UE MAC structure */
|
/*!\brief Top level UE MAC structure */
|
||||||
typedef struct {
|
typedef struct {
|
||||||
|
|
||||||
@@ -84,6 +83,9 @@ typedef struct {
|
|||||||
SFN_C_TYPE type0_pdcch_ss_sfn_c;
|
SFN_C_TYPE type0_pdcch_ss_sfn_c;
|
||||||
uint32_t type0_pdcch_ss_n_c;
|
uint32_t type0_pdcch_ss_n_c;
|
||||||
|
|
||||||
|
/// Random access parameter
|
||||||
|
uint16_t ra_rnti;
|
||||||
|
|
||||||
|
|
||||||
//// FAPI-like interface message
|
//// FAPI-like interface message
|
||||||
fapi_nr_tx_request_t tx_request;
|
fapi_nr_tx_request_t tx_request;
|
||||||
@@ -100,7 +102,41 @@ typedef struct {
|
|||||||
nr_phy_config_t phy_config;
|
nr_phy_config_t phy_config;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
} NR_UE_MAC_INST_t;
|
} NR_UE_MAC_INST_t;
|
||||||
|
|
||||||
|
typedef enum seach_space_mask_e {
|
||||||
|
type0_pdcch = 0x1,
|
||||||
|
type0a_pdcch = 0x2,
|
||||||
|
type1_pdcch = 0x4,
|
||||||
|
type2_pdcch = 0x8,
|
||||||
|
type3_pdcch = 0x10
|
||||||
|
} search_space_mask_t;
|
||||||
|
|
||||||
|
typedef enum subcarrier_spacing_e {
|
||||||
|
scs_15kHz = 0x1,
|
||||||
|
scs_30kHz = 0x2,
|
||||||
|
scs_60kHz = 0x4,
|
||||||
|
scs_120kHz = 0x8,
|
||||||
|
scs_240kHz = 0x16
|
||||||
|
} subcarrier_spacing_t;
|
||||||
|
|
||||||
|
typedef enum channel_bandwidth_e {
|
||||||
|
bw_5MHz = 0x1,
|
||||||
|
bw_10MHz = 0x2,
|
||||||
|
bw_20MHz = 0x4,
|
||||||
|
bw_40MHz = 0x8,
|
||||||
|
bw_80MHz = 0x16,
|
||||||
|
bw_100MHz = 0x32
|
||||||
|
} channel_bandwidth_t;
|
||||||
|
|
||||||
|
typedef enum frequency_range_e {
|
||||||
|
FR1 = 0,
|
||||||
|
FR2
|
||||||
|
} frequency_range_t;
|
||||||
|
|
||||||
|
#define NUM_SLOT_FRAME 10
|
||||||
|
|
||||||
/*@}*/
|
/*@}*/
|
||||||
#endif /*__LAYER2_MAC_DEFS_H__ */
|
#endif /*__LAYER2_MAC_DEFS_H__ */
|
||||||
|
|||||||
@@ -110,5 +110,13 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
|
|||||||
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
|
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
|
||||||
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe);
|
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe);
|
||||||
|
|
||||||
|
|
||||||
|
int8_t nr_ue_decode_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type);
|
||||||
|
|
||||||
|
uint32_t get_ssb_frame(void);
|
||||||
|
uint32_t get_ssb_slot(uint32_t ssb_index);
|
||||||
|
|
||||||
|
|
||||||
|
uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
|
||||||
#endif
|
#endif
|
||||||
/** @}*/
|
/** @}*/
|
||||||
@@ -38,34 +38,11 @@
|
|||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
#include <math.h>
|
#include <math.h>
|
||||||
|
|
||||||
typedef enum subcarrier_spacing_e {
|
|
||||||
scs_15kHz = 0x1,
|
|
||||||
scs_30kHz = 0x2,
|
|
||||||
scs_60kHz = 0x4,
|
|
||||||
scs_120kHz = 0x8,
|
|
||||||
scs_240kHz = 0x16
|
|
||||||
} subcarrier_spacing_t;
|
|
||||||
|
|
||||||
typedef enum channel_bandwidth_e {
|
|
||||||
bw_5MHz = 0x1,
|
|
||||||
bw_10MHz = 0x2,
|
|
||||||
bw_20MHz = 0x4,
|
|
||||||
bw_40MHz = 0x8,
|
|
||||||
bw_80MHz = 0x16,
|
|
||||||
bw_100MHz = 0x32
|
|
||||||
} channel_bandwidth_t;
|
|
||||||
|
|
||||||
typedef enum frequency_range_e {
|
|
||||||
FR1 = 0,
|
|
||||||
FR2
|
|
||||||
} frequency_range_t;
|
|
||||||
|
|
||||||
uint32_t get_ssb_slot(uint32_t ssb_index){
|
uint32_t get_ssb_slot(uint32_t ssb_index){
|
||||||
// this function now only support f <= 3GHz
|
// this function now only support f <= 3GHz
|
||||||
return ssb_index & 0x3 ;
|
return ssb_index & 0x3 ;
|
||||||
|
|
||||||
// return first_symbol(case, freq, ssb_index) / 14
|
// return first_symbol(case, freq, ssb_index) / 14
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int8_t nr_ue_decode_mib(
|
int8_t nr_ue_decode_mib(
|
||||||
@@ -249,6 +226,7 @@ int8_t nr_ue_decode_mib(
|
|||||||
AssertFatal(rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined");
|
AssertFatal(rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined");
|
||||||
|
|
||||||
uint32_t cell_id = 0; // obtain from L1 later
|
uint32_t cell_id = 0; // obtain from L1 later
|
||||||
|
|
||||||
mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
|
mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
|
||||||
mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
|
mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
|
||||||
//mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
|
//mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
|
||||||
@@ -443,16 +421,10 @@ const uint32_t num_slot_per_frame = 10;
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
typedef enum seach_space_mask_e {
|
|
||||||
type0_pdcch = 0x1,
|
|
||||||
type0a_pdcch = 0x2,
|
|
||||||
type1_pdcch = 0x4,
|
|
||||||
type2_pdcch = 0x8,
|
|
||||||
type3_pdcch = 0x10
|
|
||||||
} search_space_mask_t;
|
|
||||||
|
|
||||||
// TODO: change to UE parameter, scs: 15KHz, slot duration: 1ms
|
// TODO: change to UE parameter, scs: 15KHz, slot duration: 1ms
|
||||||
#define NUM_SLOT_FRAME 10
|
|
||||||
|
|
||||||
uint32_t get_ssb_frame(){
|
uint32_t get_ssb_frame(){
|
||||||
return 0;
|
return 0;
|
||||||
@@ -474,7 +446,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
|
|||||||
|
|
||||||
uint32_t search_space_mask = 0;
|
uint32_t search_space_mask = 0;
|
||||||
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
|
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
|
||||||
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
|
|
||||||
// check type0 from 38.213 13
|
// check type0 from 38.213 13
|
||||||
if(ssb_index != -1){
|
if(ssb_index != -1){
|
||||||
|
|
||||||
@@ -517,11 +489,11 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
|
|||||||
uint8_t format_2_3_monitorying_periodicity;
|
uint8_t format_2_3_monitorying_periodicity;
|
||||||
uint8_t format_2_3_number_of_candidates;
|
uint8_t format_2_3_number_of_candidates;
|
||||||
#endif
|
#endif
|
||||||
|
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
|
||||||
if(search_space_mask & type0_pdcch){
|
if(search_space_mask & type0_pdcch){
|
||||||
|
|
||||||
dl_config->dl_config_request_body[dl_config->number_pdus].dci_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
|
dl_config->dl_config_request_body[dl_config->number_pdus].dci_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
|
||||||
//dl_config->dl_config_request_body[dl_config->number_pdus].pdu_type = ;
|
dl_config->dl_config_request_body[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
|
||||||
dl_config->number_pdus = dl_config->number_pdus + 1;
|
dl_config->number_pdus = dl_config->number_pdus + 1;
|
||||||
|
|
||||||
dl_config->dl_config_request_body[dl_config->number_pdus].dci_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
|
dl_config->dl_config_request_body[dl_config->number_pdus].dci_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
|
||||||
@@ -546,10 +518,18 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
|
|||||||
return CONNECTION_OK;
|
return CONNECTION_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int8_t nr_ue_decode_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){
|
||||||
|
|
||||||
uint32_t
|
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
|
||||||
ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
|
|
||||||
uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe)
|
if(rnti == SI_RNTI){
|
||||||
|
|
||||||
|
}else if(rnti == mac->ra_rnti){
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe)
|
||||||
{
|
{
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|||||||
@@ -32,6 +32,7 @@
|
|||||||
|
|
||||||
#include "NR_IF_Module.h"
|
#include "NR_IF_Module.h"
|
||||||
#include "mac_proto.h"
|
#include "mac_proto.h"
|
||||||
|
#include "assertions.h"
|
||||||
|
|
||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
|
|
||||||
@@ -39,27 +40,29 @@
|
|||||||
|
|
||||||
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
|
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
|
||||||
|
|
||||||
|
// L2 Abstraction Layer
|
||||||
|
int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length){
|
||||||
|
|
||||||
int8_t handle_bcch_bch(uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t l_ssb){
|
return nr_ue_decode_mib( module_id,
|
||||||
|
cc_id,
|
||||||
// pdu_len = 4, 32bits
|
gNB_index,
|
||||||
//uint8_t extra_bits = pduP[0];
|
additional_bits,
|
||||||
nr_ue_decode_mib( (module_id_t)0,
|
ssb_length, // Lssb = 64 is not support
|
||||||
0,
|
ssb_index,
|
||||||
0,
|
pduP );
|
||||||
additional_bits,
|
|
||||||
l_ssb, // Lssb = 64 is not support
|
|
||||||
ssb_index,
|
|
||||||
&pduP[1] );
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
// L2 Abstraction Layer
|
||||||
|
int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len){
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
// L2 Abstraction Layer
|
||||||
|
int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){
|
||||||
|
|
||||||
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP){
|
return nr_ue_decode_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type);
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
|
int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
|
||||||
@@ -99,6 +102,7 @@ int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
|
|||||||
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
|
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
|
||||||
|
|
||||||
int32_t i;
|
int32_t i;
|
||||||
|
uint32_t ret_mask = 0x0;
|
||||||
module_id_t module_id = dl_info->module_id;
|
module_id_t module_id = dl_info->module_id;
|
||||||
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
|
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
|
||||||
|
|
||||||
@@ -109,29 +113,80 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
|
|||||||
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
|
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
|
||||||
switch(dl_info->rx_ind->rx_request_body[i].pdu_type){
|
switch(dl_info->rx_ind->rx_request_body[i].pdu_type){
|
||||||
case FAPI_NR_RX_PDU_TYPE_MIB:
|
case FAPI_NR_RX_PDU_TYPE_MIB:
|
||||||
handle_bcch_bch(dl_info->rx_ind->rx_request_body[i].mib_pdu.pdu, dl_info->rx_ind->rx_request_body[i].mib_pdu.additional_bits, dl_info->rx_ind->rx_request_body[i].mib_pdu.ssb_index, dl_info->rx_ind->rx_request_body[i].mib_pdu.l_ssb);
|
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
|
||||||
|
(dl_info->rx_ind->rx_request_body+i)->mib_pdu.pdu,
|
||||||
|
(dl_info->rx_ind->rx_request_body+i)->mib_pdu.additional_bits,
|
||||||
|
(dl_info->rx_ind->rx_request_body+i)->mib_pdu.ssb_index,
|
||||||
|
(dl_info->rx_ind->rx_request_body+i)->mib_pdu.ssb_length )) << FAPI_NR_RX_PDU_TYPE_MIB;
|
||||||
break;
|
break;
|
||||||
case FAPI_NR_RX_PDU_TYPE_SIB:
|
case FAPI_NR_RX_PDU_TYPE_SIB:
|
||||||
|
ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
|
||||||
|
(dl_info->rx_ind->rx_request_body+i)->sib_pdu.sibs_mask,
|
||||||
|
(dl_info->rx_ind->rx_request_body+i)->sib_pdu.pdu,
|
||||||
|
(dl_info->rx_ind->rx_request_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
|
||||||
break;
|
break;
|
||||||
case FAPI_NR_RX_PDU_TYPE_DLSCH:
|
case FAPI_NR_RX_PDU_TYPE_DLSCH:
|
||||||
|
ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
|
||||||
|
|
||||||
if(dl_info->dci_ind != NULL){
|
if(dl_info->dci_ind != NULL){
|
||||||
|
printf("[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
|
||||||
|
for(i=0; dl_info->dci_ind->number_of_dcis; ++i){
|
||||||
|
fapi_nr_dci_pdu_rel15_t *dci = &(dl_info->dci_ind->dci_list+i)->dci;
|
||||||
|
switch((dl_info->dci_ind->dci_list+i)->dci_type){
|
||||||
|
case FAPI_NR_DCI_TYPE_0_0:
|
||||||
|
case FAPI_NR_DCI_TYPE_0_1:
|
||||||
|
case FAPI_NR_DCI_TYPE_1_1:
|
||||||
|
case FAPI_NR_DCI_TYPE_2_0:
|
||||||
|
case FAPI_NR_DCI_TYPE_2_1:
|
||||||
|
case FAPI_NR_DCI_TYPE_2_2:
|
||||||
|
case FAPI_NR_DCI_TYPE_2_3:
|
||||||
|
AssertFatal(1==0, "Not yet support at this moment!\n");
|
||||||
|
break;
|
||||||
|
|
||||||
|
case FAPI_NR_DCI_TYPE_1_0:
|
||||||
|
|
||||||
|
dl_config->dl_config_request_body[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
|
||||||
|
dl_config->dl_config_request_body[dl_config->number_pdus].dlsch_pdu.dlsch_config_rel15.dci_config = *dci;
|
||||||
|
dl_config->dl_config_request_body[dl_config->number_pdus].dlsch_pdu.dlsch_config_rel15.rnti = 0x0000; // UE-spec
|
||||||
|
dl_config->number_pdus = dl_config->number_pdus + 1;
|
||||||
|
|
||||||
|
ret_mask |= (handle_dci(
|
||||||
|
dl_info->module_id,
|
||||||
|
dl_info->cc_id,
|
||||||
|
dl_info->gNB_index,
|
||||||
|
dci,
|
||||||
|
(dl_info->dci_ind->dci_list+i)->rnti,
|
||||||
|
(dl_info->dci_ind->dci_list+i)->dci_type)) << FAPI_NR_DCI_IND;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
//(dl_info->dci_list+i)->rnti
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if(nr_ue_if_module_inst[module_id] != NULL){
|
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
|
||||||
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
|
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -41,6 +41,8 @@
|
|||||||
typedef struct {
|
typedef struct {
|
||||||
/// module id
|
/// module id
|
||||||
module_id_t module_id;
|
module_id_t module_id;
|
||||||
|
/// gNB index
|
||||||
|
uint32_t gNB_index;
|
||||||
/// component carrier id
|
/// component carrier id
|
||||||
int cc_id;
|
int cc_id;
|
||||||
/// frame
|
/// frame
|
||||||
@@ -179,20 +181,21 @@ int8_t nr_ue_if_module_kill(uint32_t module_id);
|
|||||||
\param dl_info including dci_ind and rx_request messages*/
|
\param dl_info including dci_ind and rx_request messages*/
|
||||||
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
|
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
|
||||||
|
|
||||||
|
// TODO check
|
||||||
/**\brief handle BCCH-BCH message from dl_indication
|
/**\brief handle BCCH-BCH message from dl_indication
|
||||||
\param
|
\param pduP pointer to bch pdu
|
||||||
\param
|
\param additional_bits corresponding to 38.212 ch.7
|
||||||
\param
|
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
|
||||||
\param */
|
\param ssb_length corresponding to L1 parameter L_ssb */
|
||||||
int8_t handle_bcch_bch(uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t l_ssb);
|
int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length);
|
||||||
|
|
||||||
|
|
||||||
|
// TODO check
|
||||||
/**\brief handle BCCH-DL-SCH message from dl_indication
|
/**\brief handle BCCH-DL-SCH message from dl_indication
|
||||||
\param pdu_len length(bytes) of pdu
|
\param pdu_len length(bytes) of pdu
|
||||||
\param pduP pointer to pdu*/
|
\param pduP pointer to pdu*/
|
||||||
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP);
|
int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len);
|
||||||
|
|
||||||
|
int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user