From 24baf08c8717baba9f9eaa1cdb4f82e891631e56 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 17 Apr 2024 17:27:42 +0200 Subject: [PATCH] Load unaligned data for SIMD processing to avoid segv We access G_N at indexes that are not necessarily 32-byte aligned, leading to segfaults. Use simde_mm256_loadu_si256() to load from memory at an unaligned memory address to avoid the segfault. Discovered using clang; it is unclear why gcc did not encounter the same segfault. --- openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c index 335510953f..f411e0c6be 100644 --- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c +++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c @@ -391,8 +391,8 @@ void build_polar_tables(t_nrPolar_params *polarParams) { // this code packs the one bit per byte of G_N into a packed bits G_N_tab for (int i = 0; i < polarParams->N; i++) { for (int j = 0; j < polarParams->N; j += 64) { - const simde__m256i tmp1 = simde_mm256_cmpgt_epi8(*(simde__m256i *)&polarParams->G_N[i][j], zeros); - const simde__m256i tmp2 = simde_mm256_cmpgt_epi8(*(simde__m256i *)&polarParams->G_N[i][j + 32], zeros); + const simde__m256i tmp1 = simde_mm256_cmpgt_epi8(simde_mm256_loadu_si256((simde__m256i *)&polarParams->G_N[i][j]), zeros); + const simde__m256i tmp2 = simde_mm256_cmpgt_epi8(simde_mm256_loadu_si256((simde__m256i *)&polarParams->G_N[i][j + 32]), zeros); // cast directly to uint64_t from int32_t propagates the sign bit (in gcc) const uint32_t part1 = simde_mm256_movemask_epi8(tmp1); const uint32_t part2 = simde_mm256_movemask_epi8(tmp2);