From 276b2d5e0cf7689daeb0ab9ce60a9cf7f4184c9a Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 7 Apr 2022 16:48:05 +0200 Subject: [PATCH] removing calculate_preferred_dl_tda --- openair2/LAYER2/NR_MAC_gNB/config.c | 12 -- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 115 +++--------------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 3 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 6 +- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 2 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 3 - openair2/RRC/NR/nr_rrc_config.c | 5 +- 7 files changed, 23 insertions(+), 123 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index d4cde4f3c3..749318f682 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -591,21 +591,9 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, if (CellGroup) { - if (get_softmodem_params()->sa) { - calculate_preferred_dl_tda(Mod_idP, NULL); - } - const NR_ServingCellConfig_t *servingCellConfig = NULL; if(CellGroup->spCellConfig && CellGroup->spCellConfig->spCellConfigDedicated) { servingCellConfig = CellGroup->spCellConfig->spCellConfigDedicated; - const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = servingCellConfig->downlinkBWP_ToAddModList; - if(bwpList) { - AssertFatal(bwpList->list.count > 0, "downlinkBWP_ToAddModList has no BWPs!\n"); - for (int i = 0; i < bwpList->list.count; ++i) { - const NR_BWP_Downlink_t *bwp = bwpList->list.array[i]; - calculate_preferred_dl_tda(Mod_idP, bwp); - } - } const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList; if(ubwpList) { diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index e2291b9745..a70098aa2b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -53,105 +53,25 @@ #define WORD 32 //#define SIZE_OF_POINTER sizeof (void *) -void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *bwp) { - gNB_MAC_INST *nrmac = RC.nrmac[module_id]; - const int bwp_id = bwp ? bwp->bwp_Id : 0; +const int set_dl_tda(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, int slot) { - if (nrmac->preferred_dl_tda[bwp_id]) - return; - - /* there is a mixed slot only when in TDD */ - NR_ServingCellConfigCommon_t *scc = nrmac->common_channels->ServingCellConfigCommon; - frame_type_t frame_type = nrmac->common_channels->frame_type; const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const NR_TDD_UL_DL_Pattern_t *tdd = - scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; - int symb_dlMixed = 0; - int nr_mix_slots = 0; - int nr_slots_period = n; + scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; if (tdd) { - symb_dlMixed = (1 << tdd->nrofDownlinkSymbols) - 1; - nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; - nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); - } else + int nr_mix_slots = tdd->nrofDownlinkSymbols != 0; // there are dl symbols in mixed slot + if (nr_mix_slots != 0) { // if there is a mixed slot + int nr_slots_period = n/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity); + if ((slot%nr_slots_period) == tdd->nrofDownlinkSlots) + return 1; + } + } + else // if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration AssertFatal(nrmac->common_channels->frame_type == FDD,"Dynamic TDD not handled yet\n"); - int target_ss; - - if (bwp) { - target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; - } else { - target_ss = NR_SearchSpace__searchSpaceType_PR_common; - } - - const NR_SIB1_t *sib1 = nrmac->common_channels[0].sib1 ? nrmac->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL; - NR_SearchSpace_t *search_space = get_searchspace(sib1, - scc, - bwp ? bwp->bwp_Dedicated : NULL, - target_ss); - - NR_ControlResourceSet_t *coreset = get_coreset(module_id, scc, bwp ? bwp->bwp_Dedicated : NULL, search_space, target_ss); - // get coreset symbol "map" - const uint16_t symb_coreset = (1 << coreset->duration) - 1; - - NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList = get_pdsch_TimeDomainAllocationList(bwp, - scc, - sib1); - AssertFatal(tdaList->list.count >= 1, "need to have at least one TDA for DL slots\n"); - - /* check that TDA index 0 fits into DL and does not overlap CORESET */ - const NR_PDSCH_TimeDomainResourceAllocation_t *tdaP_DL = tdaList->list.array[0]; - AssertFatal(!tdaP_DL->k0 || *tdaP_DL->k0 == 0, - "TimeDomainAllocation at index 1: non-null k0 (%ld) is not supported by the scheduler\n", - *tdaP_DL->k0); - int start, len; - SLIV2SL(tdaP_DL->startSymbolAndLength, &start, &len); - const uint16_t symb_tda = ((1 << len) - 1) << start; - // check whether coreset and TDA overlap: then we cannot use it. Note that - // here we assume that the coreset is scheduled every slot (which it - // currently is) and starting at symbol 0 - AssertFatal((symb_coreset & symb_tda) == 0, "TDA index 0 for DL overlaps with CORESET\n"); - /* check that TDA index 1 fits into DL part of mixed slot, if it exists */ - int tdaMi = -1; - - if (frame_type == TDD && tdaList->list.count > 1) { - const NR_PDSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; - AssertFatal(!tdaP_Mi->k0 || *tdaP_Mi->k0 == 0, - "TimeDomainAllocation at index 1: non-null k0 (%ld) is not supported by the scheduler\n", - *tdaP_Mi->k0); - int start, len; - SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len); - const uint16_t symb_tda = ((1 << len) - 1) << start; - - // check whether coreset and TDA overlap: then, we cannot use it. Also, - // check whether TDA is entirely within mixed slot DL. Note that - // here we assume that the coreset is scheduled every slot (which it - // currently is) - if ((symb_coreset & symb_tda) == 0 && (symb_dlMixed & symb_tda) == symb_tda) { - tdaMi = 1; - } else { - LOG_E(MAC, - "TDA index 1 DL overlaps with CORESET or is not entirely in mixed slot (symb_coreset %x symb_dlMixed %x symb_tda %x), won't schedule DL mixed slot\n", - symb_coreset, - symb_dlMixed, - symb_tda); - } - } - - nrmac->preferred_dl_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_dl_tda[bwp_id])); - - for (int i = 0; i < n; ++i) { - nrmac->preferred_dl_tda[bwp_id][i] = -1; - - if (frame_type == FDD || i % nr_slots_period < tdd->nrofDownlinkSlots) - nrmac->preferred_dl_tda[bwp_id][i] = 0; - else if (nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots) - nrmac->preferred_dl_tda[bwp_id][i] = tdaMi; - - LOG_D(MAC, "slot %d preferred_dl_tda %d\n", i, nrmac->preferred_dl_tda[bwp_id][i]); - } + return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) } // Compute and write all MAC CEs and subheaders, and return number of written @@ -536,7 +456,7 @@ bool allocate_dl_retransmission(module_id_t module_id, int current_harq_pid) { gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; - const NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels->ServingCellConfigCommon; + NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels->ServingCellConfigCommon; NR_UE_info_t *UE_info = &nr_mac->UE_info; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_sched_pdsch_t *retInfo = &sched_ctrl->harq_processes[current_harq_pid].sched_pdsch; @@ -566,7 +486,7 @@ bool allocate_dl_retransmission(module_id_t module_id, int rbStart = 0; // start wrt BWPstart NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; int rbSize = 0; - const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot]; + const int tda = set_dl_tda(RC.nrmac[module_id], scc, slot); AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n"); if (tda == retInfo->time_domain_allocation) { @@ -910,7 +830,7 @@ void pf_dl(module_id_t module_id, if (max_num_ue < 0) return; /* MCS has been set above */ - const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot]; + const int tda = set_dl_tda(RC.nrmac[module_id], scc, slot); AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n"); NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch; NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; @@ -982,12 +902,7 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t /* This is temporary and it assumes all UEs have the same BWP and TDA*/ int UE_id = UE_info->list.head; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0; - - if (!RC.nrmac[module_id]->preferred_dl_tda[bwp_id]) - return; - - const int tda = RC.nrmac[module_id]->preferred_dl_tda[bwp_id][slot]; + const int tda = set_dl_tda(RC.nrmac[module_id], scc, slot); int startSymbolIndex, nrOfSymbols; const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList : diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 33dd96d9bf..30ec546a0c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -275,7 +275,8 @@ void nr_preprocessor_phytest(module_id_t module_id, __func__, UE_id); NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1; + + const int tda = set_dl_tda(RC.nrmac[module_id], scc, slot); NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; ps->nrOfLayers = target_dl_Nl; if (ps->time_domain_allocation != tda || ps->nrOfLayers != target_dl_Nl) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 45327eda73..4e0c6dbc5e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -2858,6 +2858,7 @@ void nr_csirs_scheduling(int Mod_idP, void nr_mac_update_timers(module_id_t module_id, frame_t frame, sub_frame_t slot) { + NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; const NR_list_t *UE_list = &UE_info->list; for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { @@ -2894,12 +2895,11 @@ void nr_mac_update_timers(module_id_t module_id, cg->spCellConfig && cg->spCellConfig->spCellConfigDedicated ? cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP : NULL; - int **preferred_dl_tda = RC.nrmac[module_id]->preferred_dl_tda; + NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; const uint8_t layers = set_dl_nrOfLayers(sched_ctrl); - const int tda = bwp && preferred_dl_tda[bwp->bwp_Id][slot] >= 0 ? - preferred_dl_tda[bwp->bwp_Id][slot] : (ps->time_domain_allocation >= 0 ? ps->time_domain_allocation : 0); + const int tda = set_dl_tda(RC.nrmac[module_id], scc, slot); nr_set_pdsch_semi_static(sib1, scc, diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 6d15641592..083a0c8ad9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -522,7 +522,7 @@ void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch, uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl); int get_dci_format(NR_UE_sched_ctrl_t *sched_ctrl); -void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *bwp); +const int set_dl_tda(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, int slot); void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ubwp); bool find_free_CCE(module_id_t module_id, sub_frame_t slot, int UE_id); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 9d8e28da97..dcbdf8f77c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -807,9 +807,6 @@ typedef struct gNB_MAC_INST_s { /// bitmap of DLSCH slots, can hold up to 160 slots uint64_t dlsch_slot_bitmap[3]; - /// Lookup for preferred time domain allocation for BWP, in DL, slots - /// dynamically allocated - int *preferred_dl_tda[MAX_NUM_BWP]; /// bitmap of ULSCH slots, can hold up to 160 slots uint64_t ulsch_slot_bitmap[3]; /// Lookup for preferred time domain allocation for UL BWP, dynamically diff --git a/openair2/RRC/NR/nr_rrc_config.c b/openair2/RRC/NR/nr_rrc_config.c index ef95443a5d..9bc575be9c 100644 --- a/openair2/RRC/NR/nr_rrc_config.c +++ b/openair2/RRC/NR/nr_rrc_config.c @@ -321,8 +321,7 @@ void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc, int len_coreset = 1; if (curr_bwp < 48) len_coreset = 2; - - // setting default TDA for DL with + // setting default TDA for DL with TDA index 0 struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); // k0: Slot offset between DCI and its scheduled PDSCH (see TS 38.214 clause 5.1.2.1) When the field is absent the UE applies the value 0. //timedomainresourceallocation->k0 = calloc(1,sizeof(*timedomainresourceallocation->k0)); @@ -331,10 +330,10 @@ void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc, timedomainresourceallocation->startSymbolAndLength = get_SLIV(len_coreset,14-len_coreset); // basic slot configuration starting in symbol 1 til the end of the slot ASN_SEQUENCE_ADD(&pdsch_TimeDomainAllocationList->list, timedomainresourceallocation); if(frame_type==TDD) { - // TDD if(scc->tdd_UL_DL_ConfigurationCommon) { int dl_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols; if(dl_symb > 1) { + // mixed slot TDA with TDA index 1 timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); // k0: Slot offset between DCI and its scheduled PDSCH (see TS 38.214 clause 5.1.2.1) When the field is absent the UE applies the value 0. //timedomainresourceallocation->k0 = calloc(1,sizeof(*timedomainresourceallocation->k0));