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This commit is contained in:
Laurent THOMAS
2021-12-24 16:23:51 +01:00
parent e0776377c4 264e829922
commit 280533da10
157 changed files with 3481 additions and 3423 deletions
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openair2/LAYER2/NR_MAC_UE/config_ue.c
+1 -38
View File
@@ -44,46 +44,9 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
int nrofUplinkSlots, int nrofUplinkSymbols) {
int slot_number = 0;
int nb_periods_per_frame;
int nb_periods_per_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period);
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<<mu)*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
switch(cfg->tdd_table.tdd_period) {
case 0:
nb_periods_per_frame = 20; // 10ms/0p5ms
break;
case 1:
nb_periods_per_frame = 16; // 10ms/0p625ms
break;
case 2:
nb_periods_per_frame = 10; // 10ms/1ms
break;
case 3:
nb_periods_per_frame = 8; // 10ms/1p25ms
break;
case 4:
nb_periods_per_frame = 5; // 10ms/2ms
break;
case 5:
nb_periods_per_frame = 4; // 10ms/2p5ms
break;
case 6:
nb_periods_per_frame = 2; // 10ms/5ms
break;
case 7:
nb_periods_per_frame = 1; // 10ms/10ms
break;
default:
AssertFatal(1==0,"Undefined tdd period %d\n", cfg->tdd_table.tdd_period);
}
int nb_slots_per_period = ((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
cfg->tdd_table.tdd_period_in_slots = nb_slots_per_period;
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+7 -3
View File
@@ -944,6 +944,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
return -1;
}
if(rnti != ra->ra_rnti && rnti != SI_RNTI)
AssertFatal(1+dci->pdsch_to_harq_feedback_timing_indicator.val>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d).\n",
1+dci->pdsch_to_harq_feedback_timing_indicator.val,DURATION_RX_TO_TX);
// set the harq status at MAC for feedback
set_harq_status(mac,dci->pucch_resource_indicator,
dci->harq_pid,
@@ -1232,7 +1236,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
uint8_t feedback_ti =
ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0];
AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d)\n",
AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d). Min feedback time set in config file (min_rxtxtime).\n",
feedback_ti,DURATION_RX_TO_TX);
// set the harq status at MAC for feedback
@@ -3160,10 +3164,10 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
pos+=fsize;
dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1);
// Time domain assignment 4bit
// Time domain assignment
//pos+=4;
pos+=dci_pdu_rel15->time_domain_assignment.nbits;
dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0x3;
dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->time_domain_assignment.nbits)-1);
// Not supported yet - skip for now
// Frequency hopping flag – 1 bit
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+10 -4
View File
@@ -60,6 +60,12 @@ static prach_association_pattern_t prach_assoc_pattern;
static ssb_list_info_t ssb_list;
void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type){
// clear ul_config for new frame/slot
if ((ul_config->slot != slot_tx || ul_config->sfn != frame_tx) && ul_config->number_pdus != 0) {
LOG_D(MAC, "%d.%d %d.%d f clear ul_config %p t %d pdu %d\n", frame_tx, slot_tx, ul_config->sfn, ul_config->slot, ul_config, pdu_type, ul_config->number_pdus);
ul_config->number_pdus = 0;
memset(ul_config->ul_config_list, 0, sizeof(ul_config->ul_config_list));
}
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = pdu_type;
//ul_config->slot = slot_tx;
//ul_config->sfn = frame_tx;
@@ -125,7 +131,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
}
AssertFatal(k2 >= DURATION_RX_TO_TX,
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n",
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). K2 set according to min_rxtxtime in config file.\n",
k2,DURATION_RX_TO_TX);
LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2);
@@ -933,8 +939,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
} else if (ul_info) {
int cc_id = ul_info->cc_id;
frame_t rx_frame = ul_info->frame_rx;
slot_t rx_slot = ul_info->slot_rx;
//frame_t rx_frame = ul_info->frame_rx;
//slot_t rx_slot = ul_info->slot_rx;
frame_t frame_tx = ul_info->frame_tx;
slot_t slot_tx = ul_info->slot_tx;
module_id_t mod_id = ul_info->module_id;
@@ -1024,7 +1030,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
}
pthread_mutex_unlock(&ul_config->mutex_ul_config); // avoid double lock
fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, mod_id, cc_id, rx_frame, rx_slot, ul_info->thread_id);
fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, mod_id, cc_id, frame_tx, slot_tx, ul_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response);
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+35 -19
View File
@@ -870,9 +870,6 @@ void nr_get_Msg3alloc(module_id_t module_id,
int mu = ubwp ?
ubwp->bwp_Common->genericParameters.subcarrierSpacing :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
int StartSymbolIndex = 0;
int NrOfSymbols = 0;
int startSymbolAndLength = 0;
int temp_slot = 0;
ra->Msg3_tda_id = 16; // initialization to a value above limit
@@ -881,20 +878,29 @@ void nr_get_Msg3alloc(module_id_t module_id,
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
uint8_t k2 = 0;
for (int i=0; i<pusch_TimeDomainAllocationList->list.count; i++) {
startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
// we want to transmit in the uplink symbols of mixed slot
if (NrOfSymbols == scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols) {
lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
if (frame_type == TDD) {
int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = ((1<<mu)*10)/nb_periods_per_frame;
for (int i=0; i<pusch_TimeDomainAllocationList->list.count; i++) {
k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2;
temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) {
ra->Msg3_tda_id = i;
break;
// we want to transmit in the uplink symbols of mixed slot
if ((k2 + DELTA[mu])%nb_slots_per_period == 0) {
temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) {
ra->Msg3_tda_id = i;
break;
}
}
}
}
else {
ra->Msg3_tda_id = 0;
k2 = *pusch_TimeDomainAllocationList->list.array[0]->k2;
temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
}
AssertFatal(ra->Msg3_tda_id<16,"Unable to find Msg3 time domain allocation in list\n");
@@ -915,7 +921,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
tdd_beam_association[num_tdd_period] = ra->beam_id;
}
LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex);
LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id);
uint16_t *vrb_map_UL =
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE];
@@ -972,7 +978,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
pusch_pdu->bwp_size = bwp_size;
pusch_pdu->subcarrier_spacing = scs;
pusch_pdu->cyclic_prefix = 0;
pusch_pdu->mcs_index = 0;
pusch_pdu->mcs_index = 1;
pusch_pdu->mcs_table = 0;
pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table);
pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table);
@@ -1009,11 +1015,14 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
pusch_pdu->pusch_data.harq_process_id = 0;
pusch_pdu->pusch_data.new_data_indicator = 1;
pusch_pdu->pusch_data.num_cb = 0;
int num_dmrs_symb = 0;
for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++)
num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1;
pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order,
pusch_pdu->target_code_rate,
pusch_pdu->rb_size,
pusch_pdu->nr_of_symbols,
12, // nb dmrs set for no data in dmrs symbol
num_dmrs_symb*12, // nb dmrs set for no data in dmrs symbol
0, //nb_rb_oh
0, // to verify tb scaling
pusch_pdu->nrOfLayers)>>3;
@@ -1074,7 +1083,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
fh = ubwp->bwp_Dedicated->pusch_Config->choice.setup->frequencyHopping ? 1 : 0;
}
LOG_D(NR_MAC, "Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n",
LOG_D(NR_MAC, "Frame %d, Slot %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n",
frameP,
slotP,
ra->Msg3_frame,
@@ -1105,7 +1114,12 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
if ((ra->Msg2_frame == frameP) && (ra->Msg2_slot == slotP)) {
uint8_t time_domain_assignment = 1;
//TODO time domain assignment for msg2 needs to be improved
uint8_t time_domain_assignment;
if(cc->frame_type == TDD)
time_domain_assignment = 1;
else
time_domain_assignment = 0;
uint8_t mcsIndex = 0;
int rbStart = 0;
int rbSize = 8;
@@ -1245,6 +1259,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type)
dmrsConfigType = 1;
NR_PDSCH_Config_t *pdsch_config = bwp && bwp->bwp_Dedicated && bwp->bwp_Dedicated->pdsch_Config ? bwp->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
pdsch_pdu_rel15->pduBitmap = 0;
pdsch_pdu_rel15->rnti = ra->RA_rnti;
pdsch_pdu_rel15->pduIndex = pduindex;
@@ -1273,7 +1289,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
pdsch_pdu_rel15->VRBtoPRBMapping = 0;
pdsch_pdu_rel15->StartSymbolIndex = startSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = nrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+1 -1
View File
@@ -351,7 +351,7 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc,
const NR_BWP_Uplink_t *ubwp,
const NR_BWP_UplinkDedicated_t *ubwpd,
const NR_BWP_UplinkDedicated_t *ubwpd,
long dci_format,
int tda,
uint8_t num_dmrs_cdm_grps_no_data,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+21 -21
View File
@@ -104,7 +104,6 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
/* check that TDA index 1 fits into UL slot and does not overlap with PUCCH */
const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
AssertFatal(tdaList->list.count >= 3, "need to have at least three TDAs for UL slots\n");
const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_UL = tdaList->list.array[0];
const int k2 = get_K2(scc, (NR_BWP_Uplink_t*)ubwp,0, mu);
int start, len;
@@ -117,27 +116,28 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
// get largest time domain allocation (TDA) for UL slot and UL in mixed slot
int tdaMi = -1;
const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1];
AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu),
"scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n",
k2,
get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu));
SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len);
const uint16_t symb_tda_mi = ((1 << len) - 1) << start;
// check whether PUCCH and TDA overlap: then, we cannot use it. Also, check
// whether TDA is entirely within mixed slot, UL. Note that here we assume
// that the PUCCH is scheduled in every slot, and on all RBs (which is
// mostly not true, this is a simplification)
if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) {
tdaMi = 1;
} else {
LOG_E(NR_MAC,
"TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n",
symb_pucch,
symb_ulMixed,
symb_tda_mi);
if(tdaList->list.count > 1) {
const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1];
AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu),
"scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n",
k2,
get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu));
SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len);
const uint16_t symb_tda_mi = ((1 << len) - 1) << start;
// check whether PUCCH and TDA overlap: then, we cannot use it. Also, check
// whether TDA is entirely within mixed slot, UL. Note that here we assume
// that the PUCCH is scheduled in every slot, and on all RBs (which is
// mostly not true, this is a simplification)
if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) {
tdaMi = 1;
} else {
LOG_E(NR_MAC,
"TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n",
symb_pucch,
symb_ulMixed,
symb_tda_mi);
}
}
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const int n = slots_per_frame[*scc->ssbSubcarrierSpacing];
nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id]));
openair2/LAYER2/NR_MAC_gNB/main.c
+1 -1
View File
@@ -64,7 +64,7 @@ void *nrmac_stats_thread(void *arg) {
fseek(fd,0,SEEK_SET);
}
fclose(fd);
return (void *)0;
return NULL;
}
void clear_mac_stats(gNB_MAC_INST *gNB) {