From 284c441367f5e8892e253f58436467d262647e3d Mon Sep 17 00:00:00 2001 From: Calvin HSU Date: Thu, 9 Aug 2018 11:53:30 +0200 Subject: [PATCH] UE: Add DCI_IND in phy_procedures_nr_ue. Fill type0-pdcch in scheduled_response --- .../nfapi/public_inc/fapi_nr_ue_constants.h | 5 + .../nfapi/public_inc/fapi_nr_ue_interface.h | 173 +++++++++--------- openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c | 24 --- openair1/PHY/defs_nr_UE.h | 2 + openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 128 +++++++++---- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 13 ++ openair2/LAYER2/NR_MAC_UE/mac.h | 31 +++- openair2/LAYER2/NR_MAC_UE/mac_defs.h | 1 + openair2/LAYER2/NR_MAC_UE/mac_extern.h | 2 +- openair2/LAYER2/NR_MAC_UE/mac_proto.h | 2 +- openair2/LAYER2/NR_MAC_UE/mac_vars.c | 2 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 77 +++++++- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 8 +- 13 files changed, 298 insertions(+), 170 deletions(-) mode change 100755 => 100644 openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c mode change 100755 => 100644 openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c diff --git a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h index b5785eebb4..a76358e346 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h @@ -34,6 +34,9 @@ /// DL_CONFIG_REQ + +#define FAPI_NR_DL_CONFIG_LIST_NUM 10 + #define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01 #define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02 @@ -44,5 +47,7 @@ #define PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS 0x02 /// UL_CONFIG_REQ +#define FAPI_NR_UL_CONFIG_LIST_NUM 10 + #endif \ No newline at end of file diff --git a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h index c8c0c47693..63fea2934f 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h @@ -29,67 +29,75 @@ typedef signed short int16_t; typedef signed char int8_t; typedef struct { - // dci pdu - uint8_t dci_format; - uint8_t frequency_domain_resouce_assignment; // 38.214 chapter 5.1.2.2 - uint8_t time_domain_resource_assignment; // 38.214 chapter 5.1.2.1 - uint8_t frequency_hopping_enabled_flag; - uint8_t frequency_hopping_bits; - uint8_t mcs; - uint8_t new_data_indication; - uint8_t redundancy_version; - uint8_t harq_process; - uint8_t tpc_command; - uint8_t padding_bits; - uint8_t ul_sul_ind; - uint8_t ul_sch_indicator; - - uint8_t random_access_preamble_index; - uint8_t ss_pbch_index; - uint8_t prach_mask_index; - - uint8_t carrier_indicator; - uint8_t bwp_indndicator; - uint8_t vrb_to_prb_mapping; - uint8_t downlink_assignment_index1; - uint8_t downlink_assignment_index2; - uint8_t srs_resource_indicator; - uint8_t precoding_information; - uint8_t antenna_ports; - uint8_t srs_request; - uint8_t cqi_csi_request; - uint8_t cbg_transmission_information; - uint8_t ptrs_dmrs_association; - - uint8_t downlink_assignment_index; - uint8_t pucch_resource_indicator; - uint8_t pdsch_to_harq_feedback_timing_indicator; - - uint8_t short_messages_indicator; - uint8_t short_messages; - uint8_t tb_scaling; - - uint8_t prb_bundling_size_indicator; // 38.214 chapter 5.1.2.3 - uint8_t rate_matching_indicator; - uint8_t zp_csi_rs_trigger; - uint8_t transmission_configuration_indication; - uint8_t cbg_flushing_out_information; - - uint8_t slot_format_count; - uint8_t *slot_format_indicators; // 38.213 chapter 11.1.1 - - uint8_t preemption_indication_count; - uint8_t *preemption_indications; // 38.213 chapter 11.2 - - uint8_t block_number_count; // for F22 and F23 - uint8_t *block_numbers; // for F22 and F23 - uint8_t closed_loop_indicator; - - uint8_t tpc_command_count; - uint8_t *tpc_command_numbers; - uint8_t dci2_3_srs_request; // 38.212 table 7.3.1.1.2-5 - uint8_t dci2_3_tpc_command; - + uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS: + uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213] + uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1: + uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213] + uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits + uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits + uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3 + uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND: + uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND: + uint8_t short_messages ; // 9 SHORT_MESSAGES: + uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered + // (NOTE 1) If DCI format 0_0 is monitored in common search space + // and if the number of information bits in the DCI format 0_0 prior to padding + // is larger than the payload size of the DCI format 1_0 monitored in common search space + // the bitwidth of the frequency domain resource allocation field in the DCI format 0_0 + // is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0 + uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + // where I the number of entries in the higher layer parameter pusch-AllocationList + uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214] + uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set + uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER: + uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 + uint8_t tb1_mcs ; // 18 TB1_MCS: + uint8_t tb1_ndi ; // 19 TB1_NDI: + uint8_t tb1_rv ; // 20 TB1_RV: + uint8_t tb2_mcs ; // 21 TB2_MCS: + uint8_t tb2_ndi ; // 22 TB2_NDI: + uint8_t tb2_rv ; // 23 TB2_RV: + uint8_t mcs ; // 24 MCS: + uint8_t ndi ; // 25 NDI: + uint8_t rv ; // 26 RV: + uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER: + uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + // 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI + // 0 otherwise + uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK + uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks + uint8_t tb_scaling ; // 31 TB_SCALING: + uint8_t tpc_pusch ; // 32 TPC_PUSCH: + uint8_t tpc_pucch ; // 33 TPC_PUCCH: + uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND: + uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: + uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND: + uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS: + uint8_t antenna_ports ; // 38 ANTENNA_PORTS: + uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits + uint8_t srs_request ; // 40 SRS_REQUEST: + uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3: + uint8_t csi_request ; // 42 CSI_REQUEST: + uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH + uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator + uint8_t ptrs_dmrs ; // 45 PTRS_DMRS: + uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND: + uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding + // is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise + uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH + uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space + // and if the number of information bits in the DCI format 0_0 prior to padding + // is less than the payload size of the DCI format 1_0 monitored in common search space + // zeros shall be appended to the DCI format 0_0 + // until the payload size equals that of the DCI format 1_0 + uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0: + uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX: + uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0: + uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX + uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX + uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI } fapi_nr_dci_pdu_rel15_t; typedef struct { @@ -143,7 +151,7 @@ typedef struct { typedef struct { uint32_t sfn_slot; uint16_t number_of_dcis; - fapi_nr_dci_indication_pdu_t *dci_list; + fapi_nr_dci_indication_pdu_t dci_list[10]; } fapi_nr_dci_indication_t; @@ -203,22 +211,27 @@ typedef struct { fapi_nr_tx_request_body_t *tx_request_body; } fapi_nr_tx_request_t; + typedef struct { + + } fapi_nr_ul_config_rach_pdu; + + typedef struct { + + } fapi_nr_ul_config_pucch_pdu; typedef struct { uint8_t pdu_type; - uint8_t pdu_size; union { - + fapi_nr_ul_config_rach_pdu rach_pdu; + fapi_nr_ul_config_pucch_pdu pucch_pdu; }; } fapi_nr_ul_config_request_pdu_t; - typedef struct { - fapi_nr_ul_config_request_pdu_t ul_config_pdu_list; - } fapi_nr_ul_config_request_body_t; /// typedef struct { uint32_t sfn_slot; - fapi_nr_ul_config_request_body_t ul_config_request_body; + uint8_t number_pdus; + fapi_nr_ul_config_request_pdu_t ul_config_list[FAPI_NR_UL_CONFIG_LIST_NUM]; } fapi_nr_ul_config_request_t; @@ -239,22 +252,7 @@ typedef struct { fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15; } fapi_nr_dl_config_dci_pdu; - typedef struct { - uint16_t rnti; - uint8_t format_indicator; //1 bit - uint16_t frequency_domain_assignment; //up to 9 bits - uint8_t time_domain_assignment; // 4 bits - uint8_t vrb_to_prb_mapping; //0 or 1 bit - uint8_t mcs; //5 bits - uint8_t ndi; //1 bit - uint8_t rv; //2 bits - uint8_t harq_pid; //4 bits - uint8_t dai; //0, 2 or 4 bits - uint8_t tpc; //2 bits - uint8_t pucch_resource_indicator; //3 bits - uint8_t pdsch_to_harq_feedback_timing_indicator; //0, 1, 2 or 3 bits - - } fapi_nr_dl_config_dlsch_pdu_rel15_t; + typedef fapi_nr_dl_config_dlsch_pdu_rel15_t fapi_nr_dci_pdu_rel15_t; typedef struct { fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15; @@ -262,17 +260,16 @@ typedef struct { typedef struct { uint8_t pdu_type; - //uint8_t pdu_size; union { - fapi_nr_dl_config_dci_pdu dci_pdu; - fapi_nr_dl_config_dlsch_pdu dlsch_pdu; + fapi_nr_dl_config_dci_pdu dci_config_pdu; + fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu; }; } fapi_nr_dl_config_request_pdu_t; typedef struct { uint32_t sfn_slot; uint8_t number_pdus; - fapi_nr_dl_config_request_pdu_t dl_config_request_body[10]; // TODO MARCO + fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM]; } fapi_nr_dl_config_request_t; diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c b/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c index ede58cd096..510f7dbf9d 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c @@ -713,30 +713,6 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ue->if_inst->dl_indication(&ue->dl_indication); -// dci reception part, should be put into dci_nr.c ? TBD -#if 0 - ue->dl_indication.dci_ind = &ue->dci_ind; // hang on rx_ind instance - //ue->dci_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance() - uint32_t num_dci = 1; - uint32_t ii; - - ue->dci_ind.number_of_dcis = num_dci; - ue->dci_ind.dci_list = (fapi_nr_dci_indication_pdu_t *)malloc(num_dci * sizeof(fapi_nr_dci_indication_pdu_t)); - - for(ii=0; iidci_ind.dci_list+ii)->rnti = 0x0000; - (ue->dci_ind.dci_list+ii)->dci_type = 0; - - // TODO to be fill with TCL - //ue->dci_ind.dci_list[ii]->dci. - - } - - ue->if_inst->dl_indication(&ue->dl_indication); -#endif - - return 0; } diff --git a/openair1/PHY/defs_nr_UE.h b/openair1/PHY/defs_nr_UE.h index 7996dadbd8..0d65df80ae 100644 --- a/openair1/PHY/defs_nr_UE.h +++ b/openair1/PHY/defs_nr_UE.h @@ -921,6 +921,8 @@ typedef struct { // SEARCHSPACE structure, where maximum number of SEARCHSPACEs to be handled is 10 (according to 38.331 V15.1.0) // Each SearchSpace is associated with one ControlResourceSet NR_UE_PDCCH_SEARCHSPACE searchSpace[NR_NBR_SEARCHSPACE_ACT_BWP]; + + uint32_t nb_search_space; #endif } NR_UE_PDCCH; diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index 38c16f2228..a4d030ce0a 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -41,61 +41,109 @@ extern PHY_VARS_NR_UE ***PHY_vars_UE_g; int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ - if(scheduled_response != NULL){ - if(scheduled_response->dl_config != NULL){ + /// module id + module_id_t module_id = scheduled_response->module_id; + /// component carrier id + uint8_t cc_id = scheduled_response->CC_id; + uint32_t i; - } + if(scheduled_response != NULL){ + if(scheduled_response->dl_config != NULL){ + fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config; - if(scheduled_response->ul_config != NULL){ - } + for(i=0; inumber_pdus; ++i){ + if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){ + PHY_vars_UE_g[module_id][cc_id]->nb_search_space = PHY_vars_UE_g[module_id][cc_id]->nb_search_space + 1; + fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15; + + pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config.monitoring_symbols_within_slot; + + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config.number_of_candidates[0]; + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config.number_of_candidates[1]; + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config.number_of_candidates[2]; + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config.number_of_candidates[3]; + pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config.number_of_candidates[4]; - if(scheduled_response->tx_request != NULL){ + pdcch_vars2->coreset[i].duration = dci_config.coreset.duration; + //pdcch_vars2->coreset[i].frequencyDomainResources; + //dci_config.coreset.rb_start; + //dci_config.coreset.rb_end; - } - } + if(dci_config.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){ + pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = cce_reg_interleaved_shift_index; + pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = cce_reg_interleaved_reg_bundle_size; + pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = cce_reg_interleaved_interleaver_size; + }else{ + ; + } + + pdcch_vars2->coreset[i].precoderGranularity = dci_config.precoder_granularity; + //pdcch_vars2->coreset[i].tciStatesPDCCH; + //pdcch_vars2->coreset[i].tciPresentInDCI; + pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config.pdcch_dmrs_scrambling_id; + }else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH + // dlsch config pdu + } + } + }else{ + PHY_vars_UE_g[module_id][cc_id]->nb_search_space = 0; + } - return 0; + if(scheduled_response->ul_config != NULL){ + + }else{ + + } + + if(scheduled_response->tx_request != NULL){ + + }else{ + + } + } + + return 0; } int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){ - if(phy_config != NULL){ - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){ - printf("[L1][IF module][PHY CONFIG]\n"); - printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common); - printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset); - printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position); - printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1); - printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred); - printf("intra frequcney reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection); - printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number); - printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index); - printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit); - printf("-------------------------------\n"); + if(phy_config != NULL){ + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){ + printf("[L1][IF module][PHY CONFIG]\n"); + printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common); + printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset); + printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position); + printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1); + printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred); + printf("intra frequcney reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection); + printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number); + printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index); + printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit); + printf("-------------------------------\n"); - PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number; - } - - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){ - - } + PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number; + } + + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){ + + } - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){ - - } + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){ + + } - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){ - - } + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){ + + } - if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){ - - } - } - + if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){ + + } + } + - return 0; + return 0; } diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index dd74010e5a..827b9ec8d5 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -3432,6 +3432,9 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * //emos_dump_UE.dci_cnt[nr_tti_rx] = dci_cnt; #endif + ue->dci_ind.number_of_dcis = dci_cnt; + ue->dl_indication.dci_ind = &ue->dci_ind; // hang on rx_ind instance + for (i=0; idci_ind.dci_list = (fapi_nr_dci_indication_pdu_t *)malloc(num_dci * sizeof(fapi_nr_dci_indication_pdu_t)); + + ue->dci_ind.dci_list[i].rnti = 0x0000; + ue->dci_ind.dci_list[i].dci_type = 0; + NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted; + memcpy(&ue->dci_ind.dci_list[i].dci, nr_dci_info_extracted, sizeof(fapi_nr_dci_pdu_rel15_t) ); + + // TODO: check where should we send up this message. + //ue->if_inst->dl_indication(&ue->dl_indication); + /* * This is the LTE part to be removed diff --git a/openair2/LAYER2/NR_MAC_UE/mac.h b/openair2/LAYER2/NR_MAC_UE/mac.h index 3c3a6c297f..7957c224a1 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac.h +++ b/openair2/LAYER2/NR_MAC_UE/mac.h @@ -37,9 +37,9 @@ #include #include -#define NR_BCCH_DL_SCH 3 // SI +#define NR_BCCH_DL_SCH 3 // SI -#define NR_BCCH_BCH 5 // MIB +#define NR_BCCH_BCH 5 // MIB /*!\brief UE layer 2 status */ typedef enum { @@ -49,5 +49,32 @@ typedef enum { PHY_HO_PRACH } NR_UE_L2_STATE_t; +typedef struct { + uint8_t LCID:6; // octet 1 [5:0] + uint8_t F:1; // octet 1 [6] + uint8_t R:1; // octet 1 [7] + uint8_t L:8; // octet 2 [7:0] +} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_SHORT; + +typedef struct { + uint8_t LCID:6; // octet 1 [5:0] + uint8_t F:1; // octet 1 [6] + uint8_t R:1; // octet 1 [7] + uint8_t L1:8; // octet 2 [7:0] + uint8_t L2:8; // octet 3 [7:0] +} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_LONG; + +typedef struct { + uint8_t LCID:5; // octet 1 [5:0] + uint8_t R:2; // octet 1 [7:6] +} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_FIXED; + +#define DL_SCH_LCID_CCCH 0x0 +#define DL_SCH_LCID_R_BITRATE 0x2f +#define DL_SCH_LCID_L_DRX 0x3b +#define DL_SCH_LCID_DRX 0x3c +#define DL_SCH_LCID_TA 0x3d +#define DL_SCH_LCID_CONTENTION_RESOLUTION_ID 0x3e +#define DL_SCH_LCID_PADDING 0x3f #endif /*__LAYER2_MAC_DEFS_H__ */ diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index 3638f9926c..dd665b3888 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -81,6 +81,7 @@ typedef struct { uint32_t type0_pdcch_ss_mux_pattern; SFN_C_TYPE type0_pdcch_ss_sfn_c; uint32_t type0_pdcch_ss_n_c; + uint32_t type0_pdcch_consecutive_slots; /// Random access parameter uint16_t ra_rnti; diff --git a/openair2/LAYER2/NR_MAC_UE/mac_extern.h b/openair2/LAYER2/NR_MAC_UE/mac_extern.h index a8b1325fb3..8ece3fca10 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_extern.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_extern.h @@ -80,4 +80,4 @@ extern const float table_38213_13_12_c1[16]; extern const int32_t table_38213_13_12_c2[16]; extern const float table_38213_13_12_c3[16]; -extern const int32_t table_38213_10_1_1_c2[3]; \ No newline at end of file +extern const int32_t table_38213_10_1_1_c2[5]; \ No newline at end of file diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index d4fe270563..a9f1f8ecf2 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -113,7 +113,7 @@ uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe); -int8_t nr_ue_decode_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type); +int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type); uint32_t get_ssb_frame(void); uint32_t get_ssb_slot(uint32_t ssb_index); diff --git a/openair2/LAYER2/NR_MAC_UE/mac_vars.c b/openair2/LAYER2/NR_MAC_UE/mac_vars.c index 9d81067eb5..aa66f20f08 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_vars.c +++ b/openair2/LAYER2/NR_MAC_UE/mac_vars.c @@ -88,4 +88,4 @@ const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7 const int32_t table_38213_13_12_c2[16] = { 1, 2, 1, 2, 1, 2, 2, 2, 2, 1, 2, 2, 1, 1, reserved, reserved}; // index 14-15 reserved const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // M, index 14-15 reserved -const int32_t table_38213_10_1_1_c2[3] = { 4, 2, 1 }; \ No newline at end of file +const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 }; \ No newline at end of file diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c old mode 100755 new mode 100644 index fdc4b91b5d..c842c783ac --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -401,9 +401,11 @@ const uint32_t num_slot_per_frame = 20; coreset_duration = num_symbols * number_of_search_space_per_slot; - mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[0]; // CCE aggregation level = 4 - mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[1]; // CCE aggregation level = 8 - mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 16 + mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0]; + mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1]; + mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4 + mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8 + mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16 mac->type0_pdcch_dci_config.duration = search_space_duration; mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff; @@ -462,9 +464,11 @@ NR_UE_L2_STATE_t nr_ue_scheduler( // 38.213 chapter 13 if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_0) && !(rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; } if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_1) && (rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){ search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; } //if((mac->type0_pdcch_ss_sfn_c == SFN_C_EQ_SFN_SSB) && ( get_ssb_frame() )){ // search_space_mask = search_space_mask | type0_pdcch; @@ -474,12 +478,14 @@ NR_UE_L2_STATE_t nr_ue_scheduler( // 38.213 Table 13-13, 13-14 if((rx_frame == get_ssb_frame()) && (rx_slot == mac->type0_pdcch_ss_n_c)){ search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; } } if(mac->type0_pdcch_ss_mux_pattern == 3){ // 38.213 Table 13-15 if((rx_frame == get_ssb_frame()) && (rx_slot == mac->type0_pdcch_ss_n_c)){ search_space_mask = search_space_mask | type0_pdcch; + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration; } } } @@ -498,13 +504,14 @@ NR_UE_L2_STATE_t nr_ue_scheduler( uint8_t format_2_3_number_of_candidates; #endif fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; - if(search_space_mask & type0_pdcch){ + if((search_space_mask & type0_pdcch) || ( mac->type0_pdcch_consecutive_slots != 0 )){ + mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_consecutive_slots - 1; - dl_config->dl_config_request_body[dl_config->number_pdus].dci_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config; - dl_config->dl_config_request_body[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; + dl_config->dl_config_list[dl_config->number_pdus].dci_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config; + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; dl_config->number_pdus = dl_config->number_pdus + 1; - dl_config->dl_config_request_body[dl_config->number_pdus].dci_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set + dl_config->dl_config_list[dl_config->number_pdus].dci_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set } if(search_space_mask & type0a_pdcch){ @@ -526,7 +533,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler( return CONNECTION_OK; } -int8_t nr_ue_decode_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){ +int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){ NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); @@ -550,4 +557,56 @@ int8_t nr_ue_decode_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fap int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe){ return 0; -} \ No newline at end of file +} + + + +void nr_ue_process_mac_pdu( + module_id_t module_idP, + uint8_t CC_id, + uint8_t *pduP, + uint16_t pdu_len, + uint8_t eNB_index){ + + uint8_t *pdu_ptr = pduP; + uint8_t sub_pdu_len; + + // variable-size MAC CE(known by LCID), padding, MSG3, MAC SDU + // |0|1|2|3|4|5|6|7| bit-wise + // |R|F| LCID | + // | L | + + // variable-size MAC CE(known by LCID), padding, MSG3, MAC SDU + // |0|1|2|3|4|5|6|7| bit-wise + // |R|F| LCID | + // | L | + // | L | + + // fixed-size MAC CE(known by LCID), padding, MSG3 + // |0|1|2|3|4|5|6|7| bit-wise + // |R|R| LCID | + + // LCID: The Logical Channel ID field identifies the logical channel instance of the corresponding MAC SDU or the type of the corresponding MAC CE or padding as described in Tables 6.2.1-1 and 6.2.1-2 for the DL-SCH and UL-SCH respectively. There is one LCID field per MAC subheader. The LCID field size is 6 bits; + // L: The Length field indicates the length of the corresponding MAC SDU or variable-sized MAC CE in bytes. There is one L field per MAC subheader except for subheaders corresponding to fixed-sized MAC CEs and padding. The size of the L field is indicated by the F field; + // F: lenght of L is 8 or 16 bits wide + // R: Reserved bit, set to zero. + + + while (!done) { + + switch(((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID){ + // Control element + case DL_SCH_LCID_PADDING: + done = 1; + // end of MAC PDU, there is nothing right after padding + break; + + // MAC SDU + + default: + printf("[MAC] get lcid: %d which not support yet\n", ((NR_MAC_SUBHEADER_FIXED *)buf_ptr)->LCID); + break; + } + pdu_ptr += sub_pdu_len; + } +} diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c old mode 100755 new mode 100644 index b2e3b3c395..1ca6222411 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -62,7 +62,7 @@ int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, ui // L2 Abstraction Layer int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){ - return nr_ue_decode_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type); + return nr_ue_process_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type); } @@ -157,10 +157,10 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){ case FAPI_NR_DCI_TYPE_1_0: - dl_config->dl_config_request_body[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; // mapping into DL_CONFIG_REQ for DL-SCH - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_request_body[dl_config->number_pdus].dlsch_pdu.dlsch_config_rel15; + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_pdu.dlsch_config_rel15; dlsch_config_pdu->format_indicator = dci->dci_format; dlsch_config_pdu->frequency_domain_assignment = dci->frequency_domain_resouce_assignment; dlsch_config_pdu->time_domain_assignment = dci->time_domain_resource_assignment; @@ -174,7 +174,7 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){ dlsch_config_pdu->pucch_resource_indicator = dci->pucch_resource_indicator; dlsch_config_pdu->pdsch_to_harq_feedback_timing_indicator = dci->pdsch_to_harq_feedback_timing_indicator; - dl_config->dl_config_request_body[dl_config->number_pdus].dlsch_pdu.dlsch_config_rel15.rnti = 0x0000; // TX RNTI: UE-spec + dl_config->dl_config_list[dl_config->number_pdus].dlsch_pdu.dlsch_config_rel15.rnti = 0x0000; // TX RNTI: UE-spec dl_config->number_pdus = dl_config->number_pdus + 1; ret_mask |= (handle_dci(