PDSCH generation start
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@@ -119,6 +119,8 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
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nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdu->dci_dl_pdu.dci_dl_pdu_rel15;
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nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdu->dci_dl_pdu.dci_dl_pdu_rel15;
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nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &pdu->dci_dl_pdu.pdcch_params_rel15;
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nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &pdu->dci_dl_pdu.pdcch_params_rel15;
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nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
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nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
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NR_gNB_DLSCH_t *dlsch = &gNB->dlsch;
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NR_DL_gNB_HARQ_t **harq = dlsch->harq_processes;
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uint16_t N_RB = fp->initial_bwp_dl.N_RB;
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uint16_t N_RB = fp->initial_bwp_dl.N_RB;
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uint16_t N_RB_UL = fp->initial_bwp_ul.N_RB;
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uint16_t N_RB_UL = fp->initial_bwp_ul.N_RB;
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@@ -158,6 +158,42 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
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NR_DL_FRAME_PARMS frame_parms,
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NR_DL_FRAME_PARMS frame_parms,
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nfapi_nr_config_request_t config) {
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nfapi_nr_config_request_t config) {
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NR_DL_gNB_HARQ_t *harq = dlsch.harq_processes[0];
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uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH]={0};
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uint16_t mod_symbs[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>1] = {0};
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uint16_t tx_layers[NR_MAX_NB_LAYERS][NR_MAX_PDSCH_ENCODED_LENGTH>>1];
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/// CRC, coding, interleaving and rate matching
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/// scrambling
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uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? ((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0;
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uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
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for (int q=0; q<harq->n_codewords; q++)
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nr_pdsch_codeword_scrambling(harq->f,
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harq->TBS,
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q,
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Nid,
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n_RNTI,
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scrambled_output[q]);
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/// Modulation
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for (int q=0; q<harq->n_codewords; q++)
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nr_pdsch_codeword_modulation(scrambled_output[q],
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harq->Qm,
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harq->TBS,
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mod_symbs[q]);
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/// Layer mapping
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nr_pdsch_layer_mapping(mod_symbs,
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harq->n_codewords,
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harq->Nl,
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n_symbs,
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tx_layers);
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/// Antenna port mapping -- Not yet necessary
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/// Resource mapping
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return 0;
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return 0;
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}
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}
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+12
-2
@@ -132,16 +132,26 @@ typedef struct {
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uint8_t first_layer;
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uint8_t first_layer;
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/// codeword this transport block is mapped to
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/// codeword this transport block is mapped to
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uint8_t codeword;
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uint8_t codeword;
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/// Number of codewords
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uint8_t n_codewords;
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} NR_DL_gNB_HARQ_t;
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} NR_DL_gNB_HARQ_t;
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typedef struct {
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typedef struct {
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/// Pointers to 8 HARQ processes for the DLSCH
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/// Pointers to 16 HARQ processes for the DLSCH
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NR_DL_gNB_HARQ_t *harq_processes[8];
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NR_DL_gNB_HARQ_t *harq_processes[16];
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nfapi_nr_pdsch_time_domain_alloc_type_e time_alloc_type;
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nfapi_nr_pdsch_time_domain_alloc_type_e time_alloc_type;
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uint8_t time_alloc_list_flag;
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uint8_t time_alloc_list_flag;
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uint8_t rbg_list[NR_MAX_NB_RBG];
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uint8_t rbg_list[NR_MAX_NB_RBG];
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/// Time domain allocation
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uint8_t S;
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uint8_t L;
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/// Freq domain allocation
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uint16_t rb_start;
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uint16_t n_rb;
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/// BWP index
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uint8_t bwp_idx;
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/// TX buffers for UE-spec transmission (antenna ports 5 or 7..14, prior to precoding)
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/// TX buffers for UE-spec transmission (antenna ports 5 or 7..14, prior to precoding)
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int32_t *txdataF[8];
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int32_t *txdataF[8];
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@@ -85,6 +85,7 @@
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#define NR_MAX_CSET_DURATION 3
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#define NR_MAX_CSET_DURATION 3
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#define NR_MAX_NB_RBG 18
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#define NR_MAX_NB_RBG 18
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#define NR_MAX_NB_LAYERS 8
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typedef enum {
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typedef enum {
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NR_MU_0=0,
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NR_MU_0=0,
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@@ -70,8 +70,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
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cfg->rf_config.dl_channel_bandwidth.value);
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cfg->rf_config.dl_channel_bandwidth.value);
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memcpy((void*)params_rel15, (void*)&gNB->pdcch_type0_params, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
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memcpy((void*)params_rel15, (void*)&gNB->pdcch_type0_params, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
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pdu_rel15->frequency_domain_assignment = 5;
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pdu_rel15->frequency_domain_assignment = get_RIV(0, 40, 106);
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pdu_rel15->time_domain_assignment = 3;
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pdu_rel15->time_domain_assignment = get_SLIV(8, 14);
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pdu_rel15->vrb_to_prb_mapping = 1;
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pdu_rel15->vrb_to_prb_mapping = 1;
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pdu_rel15->mcs = 12;
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pdu_rel15->mcs = 12;
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pdu_rel15->tb_scaling = 1;
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pdu_rel15->tb_scaling = 1;
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