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Merge branch 'eurecom-nfapi-nr-arch-mod' into episys/merge_nsa_w_develop

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This commit is contained in:
Melissa Elkadi
2021-08-13 10:27:30 -07:00
parent 3a51e7c352 540d2e2977
commit 2a979f4e2f
189 changed files with 17377 additions and 19130 deletions
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openair1/PHY/CODING/3gpplte_sse.c
+2 -2
View File
@@ -373,10 +373,10 @@ char interleave_compact_byte(short *base_interleaver,unsigned char *input, unsig
short *ptr_intl=base_interleaver;
#if defined(__x86_64) || defined(__i386__)
#ifndef __AVX2__
__m128i tmp;
__m128i tmp={0};
uint16_t *systematic2_ptr=(uint16_t *) output;
#else
__m256i tmp;
__m256i tmp={0};
uint32_t *systematic2_ptr=(uint32_t *) output;
#endif
#elif defined(__arm__)
openair1/PHY/CODING/3gpplte_turbo_decoder_avx2_16bit.c
+1 -1
View File
@@ -933,7 +933,7 @@ unsigned char phy_threegpplte_turbo_decoder16avx2(int16_t *y,
uint32_t db;
__m256i tmp, zeros=_mm256_setzero_si256();
__m256i tmp={0}, zeros=_mm256_setzero_si256();
int offset8_flag=0;
openair1/PHY/CODING/3gpplte_turbo_decoder_sse_16bit.c
+1 -1
View File
@@ -1105,7 +1105,7 @@ uint8_t phy_threegpplte_turbo_decoder16(int16_t *y,
uint8_t temp;
#if defined(__x86_64__) || defined(__i386__)
__m128i *yp128;
__m128i tmp, zeros=_mm_setzero_si128();
__m128i tmp={0}, zeros=_mm_setzero_si128();
__m128i tmpe;
#elif defined(__arm__)
int16x8_t *yp128;
openair1/PHY/CODING/3gpplte_turbo_decoder_sse_8bit.c
+1 -1
View File
@@ -819,7 +819,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
#if defined(__x86_64__) || defined(__i386__)
__m128i *yp128;
__m128i tmp128[(n+8)>>3];
__m128i tmp, zeros=_mm_setzero_si128();
__m128i tmp={0}, zeros=_mm_setzero_si128();
#elif defined(__arm__)
int8x16_t *yp128;
int8x16_t tmp128[(n+8)>>3];
openair1/PHY/INIT/nr_init.c
+20 -15
View File
@@ -121,6 +121,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
int i;
int Ptx=cfg->carrier_config.num_tx_ant.value;
int Prx=cfg->carrier_config.num_rx_ant.value;
int max_ul_mimo_layers = 4;
AssertFatal(Ptx>0 && Ptx<9,"Ptx %d is not supported\n",Ptx);
AssertFatal(Prx>0 && Prx<9,"Prx %d is not supported\n",Prx);
@@ -293,27 +294,30 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
init_prach_list(gNB);
int N_RB_UL = cfg->carrier_config.ul_grid_size[cfg->ssb_config.scs_common.value].value;
int n_buf = Prx*max_ul_mimo_layers;
for (int ULSCH_id=0; ULSCH_id<gNB->number_of_nr_ulsch_max; ULSCH_id++) {
pusch_vars[ULSCH_id] = (NR_gNB_PUSCH *)malloc16_clear( sizeof(NR_gNB_PUSCH) );
pusch_vars[ULSCH_id]->rxdataF_ext = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_ext2 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_ext = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ptrs_phase_per_slot = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_time = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_comp = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag0 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb0 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rho = (int32_t **)malloc16_clear(Prx*sizeof(int32_t*) );
pusch_vars[ULSCH_id]->ul_ch_estimates = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_ext = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_ptrs_estimates_ext = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ptrs_phase_per_slot = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_time = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_comp = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag0 = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb0 = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rho = (int32_t **)malloc16_clear(n_buf*sizeof(int32_t*) );
for (i=0; i<Prx; i++) {
pusch_vars[ULSCH_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
}
for (i=0; i<n_buf; i++) {
pusch_vars[ULSCH_id]->ul_ch_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates_time[i] = (int32_t *)malloc16_clear( 2*sizeof(int32_t)*fp->ofdm_symbol_size );
@@ -339,7 +343,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
//NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
@@ -380,9 +384,11 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(prach_vars->rxsigF[0]);
*/
for (int ULSCH_id=0; ULSCH_id<gNB->number_of_nr_ulsch_max; ULSCH_id++) {
for (int i = 0; i < 2; i++) {
for (int i = 0; i < fp->nb_antennas_rx; i++) {
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext[i]);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2[i]);
}
for (int i = 0; i < 4*fp->nb_antennas_rx; i++) {
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates_time[i]);
@@ -396,7 +402,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_magb[i]);
free_and_zero(pusch_vars[ULSCH_id]->rho[i]);
}
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates);
openair1/PHY/INIT/nr_init_ue.c
+10
View File
@@ -181,6 +181,16 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
}
}
/////////////////////////PUCCH init/////////////////////////
///////////
for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
ue->pucch_vars[th_id][gNB_id] = (NR_UE_PUCCH *)malloc16(sizeof(NR_UE_PUCCH));
for (i=0; i<2; i++)
ue->pucch_vars[th_id][gNB_id]->active[i] = false;
}
}
///////////
////////////////////////////////////////////////////////////////////////////////////////////
openair1/PHY/INIT/nr_parms.c
+1 -2
View File
@@ -198,9 +198,8 @@ int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg,
fp->slots_per_frame = 10* fp->slots_per_subframe;
fp->nb_antenna_ports_gNB = 1; // It corresponds to the number of common antenna ports
fp->nb_antennas_rx = cfg->carrier_config.num_rx_ant.value; // It denotes the number of rx antennas at gNB
fp->nb_antennas_tx = cfg->carrier_config.num_tx_ant.value; // It corresponds to pdsch_AntennaPorts
fp->nb_antennas_tx = cfg->carrier_config.num_tx_ant.value; // It corresponds to pdsch_AntennaPorts (logical antenna ports)
fp->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
fp->samples_per_subframe_wCP = fp->ofdm_symbol_size * fp->symbols_per_slot * fp->slots_per_subframe;
openair1/PHY/LTE_ESTIMATION/lte_ul_channel_estimation.c
-1
View File
@@ -35,7 +35,6 @@ static int16_t ru_90c[2*128] = {32767, 0,32766, -402,32758, -804,32746, -1206,32
#define SCALE 0x3FFF
static const short conjugate[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
//static const short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
extern unsigned short dftsizes[34];
extern int16_t *ul_ref_sigs_rx[30][2][34];
openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
+5 -5
View File
@@ -1234,7 +1234,7 @@ void dlsch_channel_compensation(int **rxdataF_ext,
unsigned short rb;
unsigned char aatx,aarx,symbol_mod,pilots=0;
__m128i *dl_ch128,*dl_ch128_2,*dl_ch_mag128,*dl_ch_mag128b,*rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0};
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
if ((symbol_mod == 0) || (symbol_mod == (4-frame_parms->Ncp))) {
@@ -1657,11 +1657,11 @@ void dlsch_channel_compensation_core(int **rxdataF_ext,
int length_mod8 = 0;
int length2;
__m128i *dl_ch128,*dl_ch_mag128,*dl_ch_mag128b, *dl_ch128_2, *rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0};
int aatx = 0, aarx = 0;
for (aatx=0; aatx<n_tx; aatx++) {
__m128i QAM_amp128b;
__m128i QAM_amp128b={0};
if (mod_order == 4) {
QAM_amp128 = _mm_set1_epi16(QAM16_n1); // 2/sqrt(10)
@@ -2004,7 +2004,7 @@ void dlsch_channel_compensation_TM56(int **rxdataF_ext,
__m128i *dl_ch0_128,*dl_ch1_128,*dl_ch_mag128,*dl_ch_mag128b,*rxdataF128,*rxdataF_comp128;
unsigned char aarx=0,symbol_mod,pilots=0;
int precoded_signal_strength=0;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0};
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
if ((symbol_mod == 0) || (symbol_mod == (4-frame_parms->Ncp)))
@@ -2411,7 +2411,7 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms,
int **rxdataF_comp0 = pdsch_vars->rxdataF_comp0;
int **rxdataF_comp1 = pdsch_vars->rxdataF_comp1[harq_pid][round];
unsigned char *pmi_ext = pdsch_vars->pmi_ext;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp0_128,QAM_amp1_128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp0_128={0},QAM_amp1_128={0};
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
if ((symbol_mod == 0) || (symbol_mod == (4-frame_parms->Ncp)))
openair1/PHY/LTE_UE_TRANSPORT/pmch_ue.c
+2 -2
View File
@@ -328,7 +328,7 @@ void mch_channel_compensation(int **rxdataF_ext,
int aarx,nre,i;
#if defined(__x86_64__) || defined(__i386__)
__m128i *dl_ch128,*dl_ch_mag128,*dl_ch_mag128b,*rxdataF128,*rxdataF_comp128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128,QAM_amp128b;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0},QAM_amp128b={0};
#elif defined(__arm__)
#endif
@@ -455,7 +455,7 @@ void mch_channel_compensation_khz_1dot25(int **rxdataF_ext,
int aarx,nre,i;
#if defined(__x86_64__) || defined(__i386__)
__m128i *dl_ch128,*dl_ch_mag128,*dl_ch_mag128b,*rxdataF128,*rxdataF_comp128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128,QAM_amp128b;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0},QAM_amp128b={0};
#elif defined(__arm__)
#endif
/*if ((symbol == 2) || (symbol == 6) || (symbol == 10))
openair1/PHY/LTE_UE_TRANSPORT/ulsch_coding.c
+218 -272
View File
@@ -52,8 +52,7 @@
void free_ue_ulsch(LTE_UE_ULSCH_t *ulsch)
{
void free_ue_ulsch(LTE_UE_ULSCH_t *ulsch) {
int i;
int r;
@@ -68,6 +67,7 @@ void free_ue_ulsch(LTE_UE_ULSCH_t *ulsch)
free16(ulsch->harq_processes[i]->b,MAX_ULSCH_PAYLOAD_BYTES);
ulsch->harq_processes[i]->b = NULL;
}
for (r=0; r<MAX_NUM_ULSCH_SEGMENTS; r++) {
if (ulsch->harq_processes[i]->c[r]) {
free16(ulsch->harq_processes[i]->c[r],((r==0)?8:0) + 3+768);
@@ -79,51 +79,47 @@ void free_ue_ulsch(LTE_UE_ULSCH_t *ulsch)
ulsch->harq_processes[i] = NULL;
}
}
free16(ulsch,sizeof(LTE_UE_ULSCH_t));
}
}
LTE_UE_ULSCH_t *new_ue_ulsch(unsigned char N_RB_UL, uint8_t abstraction_flag)
{
LTE_UE_ULSCH_t *new_ue_ulsch(unsigned char N_RB_UL, uint8_t abstraction_flag) {
LTE_UE_ULSCH_t *ulsch;
unsigned char exit_flag = 0,i,j,r;
unsigned char bw_scaling =1;
switch (N_RB_UL) {
case 6:
bw_scaling =16;
break;
case 6:
bw_scaling =16;
break;
case 25:
bw_scaling =4;
break;
case 25:
bw_scaling =4;
break;
case 50:
bw_scaling =2;
break;
default:
bw_scaling =1;
break;
case 50:
bw_scaling =2;
break;
default:
bw_scaling =1;
break;
}
ulsch = (LTE_UE_ULSCH_t *)malloc16(sizeof(LTE_UE_ULSCH_t));
if (ulsch) {
memset(ulsch,0,sizeof(LTE_UE_ULSCH_t));
ulsch->Mlimit = 4;
for (i=0; i<8; i++) {
ulsch->harq_processes[i] = (LTE_UL_UE_HARQ_t *)malloc16(sizeof(LTE_UL_UE_HARQ_t));
// printf("ulsch->harq_processes[%d] %p\n",i,ulsch->harq_processes[i]);
if (ulsch->harq_processes[i]) {
memset(ulsch->harq_processes[i], 0, sizeof(LTE_UL_UE_HARQ_t));
ulsch->harq_processes[i]->b = (unsigned char*)malloc16(MAX_ULSCH_PAYLOAD_BYTES/bw_scaling);
ulsch->harq_processes[i]->b = (unsigned char *)malloc16(MAX_ULSCH_PAYLOAD_BYTES/bw_scaling);
if (ulsch->harq_processes[i]->b)
memset(ulsch->harq_processes[i]->b,0,MAX_ULSCH_PAYLOAD_BYTES/bw_scaling);
@@ -134,7 +130,7 @@ LTE_UE_ULSCH_t *new_ue_ulsch(unsigned char N_RB_UL, uint8_t abstraction_flag)
if (abstraction_flag==0) {
for (r=0; r<MAX_NUM_ULSCH_SEGMENTS; r++) {
ulsch->harq_processes[i]->c[r] = (unsigned char*)malloc16(((r==0)?8:0) + 3+768); // account for filler in first segment and CRCs for multiple segment case
ulsch->harq_processes[i]->c[r] = (unsigned char *)malloc16(((r==0)?8:0) + 3+768); // account for filler in first segment and CRCs for multiple segment case
if (ulsch->harq_processes[i]->c[r])
memset(ulsch->harq_processes[i]->c[r],0,((r==0)?8:0) + 3+768);
@@ -167,8 +163,6 @@ LTE_UE_ULSCH_t *new_ue_ulsch(unsigned char N_RB_UL, uint8_t abstraction_flag)
LOG_E(PHY,"new_ue_ulsch exit flag, size of %d , %zu\n",exit_flag, sizeof(LTE_UE_ULSCH_t));
free_ue_ulsch(ulsch);
return(NULL);
}
@@ -179,15 +173,12 @@ uint32_t ulsch_encoding(uint8_t *a,
uint8_t subframe_rx,
uint8_t tmode,
uint8_t control_only_flag,
uint8_t Nbundled)
{
uint8_t Nbundled) {
time_stats_t *seg_stats=&ue->ulsch_segmentation_stats;
time_stats_t *rm_stats=&ue->ulsch_rate_matching_stats;
time_stats_t *te_stats=&ue->ulsch_turbo_encoding_stats;
time_stats_t *i_stats=&ue->ulsch_interleaving_stats;
time_stats_t *m_stats=&ue->ulsch_multiplexing_stats;
// uint16_t offset;
uint32_t crc=1;
uint32_t A;
@@ -237,7 +228,6 @@ uint32_t ulsch_encoding(uint8_t *a,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ULSCH_ENCODING_FILL_CQI, VCD_FUNCTION_IN);
rnti = ue->pdcch_vars[ue->current_thread_id[subframe_rx]][eNB_id]->crnti;
fill_CQI(ulsch,meas,0,harq_pid,ue->frame_parms.N_RB_DL,rnti, tmode,ue->sinr_eff);
LOG_D(PHY,"ULSCH Encoding rnti %x \n", rnti);
print_CQI(ulsch->o,ulsch->uci_format,0,ue->frame_parms.N_RB_DL);
@@ -246,6 +236,7 @@ uint32_t ulsch_encoding(uint8_t *a,
//LOG_I(PHY,"XXX saving pmi for DL %x\n",pmi2hex_2Ar1(((wideband_cqi_rank1_2A_5MHz *)ulsch->o)->pmi));
dlsch[0]->pmi_alloc = ((wideband_cqi_rank1_2A_5MHz *)ulsch->o)->pmi;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ULSCH_ENCODING_FILL_CQI, VCD_FUNCTION_OUT);
}
@@ -268,17 +259,15 @@ uint32_t ulsch_encoding(uint8_t *a,
if (control_only_flag == 0) {
A=ulsch->harq_processes[harq_pid]->TBS;
Q_m = get_Qm_ul(ulsch->harq_processes[harq_pid]->mcs);
ulsch->harq_processes[harq_pid]->control_only = 0;
#ifdef DEBUG_ULSCH_CODING
printf("[PHY][UE] ULSCH coding : A %d, Qm %d, mcs %d, harq_pid %d, round %d, RV %d\n",
ulsch->harq_processes[harq_pid]->TBS,
Q_m,
ulsch->harq_processes[harq_pid]->mcs,
harq_pid,
ulsch->harq_processes[harq_pid]->round,
ulsch->harq_processes[harq_pid]->rvidx);
ulsch->harq_processes[harq_pid]->TBS,
Q_m,
ulsch->harq_processes[harq_pid]->mcs,
harq_pid,
ulsch->harq_processes[harq_pid]->round,
ulsch->harq_processes[harq_pid]->rvidx);
for (i=0; i<ulsch->harq_processes[harq_pid]->O_ACK; i++)
printf("ulsch_coding: o_ACK[%d] %d\n",i,ulsch->o_ACK[i]);
@@ -301,16 +290,13 @@ uint32_t ulsch_encoding(uint8_t *a,
#endif
if (ulsch->harq_processes[harq_pid]->round == 0) { // this is a new packet
start_meas(seg_stats);
// Add 24-bit crc (polynomial A) to payload
crc = crc24a(a,
A)>>8;
a[A>>3] = ((uint8_t*)&crc)[2];
a[1+(A>>3)] = ((uint8_t*)&crc)[1];
a[2+(A>>3)] = ((uint8_t*)&crc)[0];
a[A>>3] = ((uint8_t *)&crc)[2];
a[1+(A>>3)] = ((uint8_t *)&crc)[1];
a[2+(A>>3)] = ((uint8_t *)&crc)[0];
ulsch->harq_processes[harq_pid]->B = A+24;
ulsch->harq_processes[harq_pid]->b = a;
lte_segmentation(ulsch->harq_processes[harq_pid]->b,
@@ -322,7 +308,6 @@ uint32_t ulsch_encoding(uint8_t *a,
&ulsch->harq_processes[harq_pid]->Kplus,
&ulsch->harq_processes[harq_pid]->Kminus,
&ulsch->harq_processes[harq_pid]->F);
stop_meas(seg_stats);
for (r=0; r<ulsch->harq_processes[harq_pid]->C; r++) {
@@ -332,25 +317,20 @@ uint32_t ulsch_encoding(uint8_t *a,
Kr = ulsch->harq_processes[harq_pid]->Kplus;
Kr_bytes = Kr>>3;
#ifdef DEBUG_ULSCH_CODING
printf("Generating Code Segment %d (%d bits)\n",r,Kr);
// generate codewords
printf("bits_per_codeword (Kr)= %d\n",Kr);
printf("N_RB = %d\n",ulsch->harq_processes[harq_pid]->nb_rb);
printf("Ncp %d\n",frame_parms->Ncp);
printf("Qm %d\n",Q_m);
#endif
// offset=0;
start_meas(te_stats);
encoder(ulsch->harq_processes[harq_pid]->c[r],
Kr>>3,
&ulsch->harq_processes[harq_pid]->d[r][96],
(r==0) ? ulsch->harq_processes[harq_pid]->F : 0
Kr>>3,
&ulsch->harq_processes[harq_pid]->d[r][96],
(r==0) ? ulsch->harq_processes[harq_pid]->F : 0
);
stop_meas(te_stats);
#ifdef DEBUG_ULSCH_CODING
@@ -366,7 +346,6 @@ uint32_t ulsch_encoding(uint8_t *a,
ulsch->harq_processes[harq_pid]->w[r]);
stop_meas(i_stats);
}
}
if (ulsch->harq_processes[harq_pid]->C == 0) {
@@ -392,7 +371,6 @@ uint32_t ulsch_encoding(uint8_t *a,
ulsch->harq_processes[harq_pid]->sumKr = sumKr;
// Compute Q_ri (p. 23 36-212)
Qprime = ulsch->O_RI*ulsch->harq_processes[harq_pid]->Msc_initial*ulsch->harq_processes[harq_pid]->Nsymb_initial * ulsch->beta_offset_ri_times8;
if (Qprime > 0) {
@@ -407,7 +385,6 @@ uint32_t ulsch_encoding(uint8_t *a,
Q_RI = Q_m*Qprime;
Qprime_RI = Qprime;
// Compute Q_ack (p. 23 36-212)
Qprime = ulsch->harq_processes[harq_pid]->O_ACK*ulsch->harq_processes[harq_pid]->Msc_initial*ulsch->harq_processes[harq_pid]->Nsymb_initial * ulsch->beta_offset_harqack_times8;
@@ -423,20 +400,18 @@ uint32_t ulsch_encoding(uint8_t *a,
Q_ACK = Qprime * Q_m;
Qprime_ACK = Qprime;
LOG_D(PHY,"UE (%x/%d) O_ACK %d, Mcs_initial %d, Nsymb_initial %d, beta_offset_harqack*8 %d, sum Kr %d, Qprime_ACK %d, Q_ACK %d\n",
rnti, harq_pid,
ulsch->harq_processes[harq_pid]->O_ACK,
ulsch->harq_processes[harq_pid]->Msc_initial,
ulsch->harq_processes[harq_pid]->Nsymb_initial,
ulsch->beta_offset_harqack_times8,
sumKr,
Qprime_ACK,
Q_ACK);
rnti, harq_pid,
ulsch->harq_processes[harq_pid]->O_ACK,
ulsch->harq_processes[harq_pid]->Msc_initial,
ulsch->harq_processes[harq_pid]->Nsymb_initial,
ulsch->beta_offset_harqack_times8,
sumKr,
Qprime_ACK,
Q_ACK);
// Compute Q_cqi, assume O>11, p. 26 36-212
if (control_only_flag == 0) {
if (ulsch->O < 12)
L=0;
else
@@ -446,13 +421,13 @@ uint32_t ulsch_encoding(uint8_t *a,
Qprime = (ulsch->O + L) * ulsch->harq_processes[harq_pid]->Msc_initial*ulsch->harq_processes[harq_pid]->Nsymb_initial * ulsch->beta_offset_cqi_times8;
else
Qprime = 0;
LOG_D(PHY,"Qprime %d, O_RI %d + %d, Msc %d, Nym %d beta %d\n",
Qprime,
ulsch->O, L,
ulsch->harq_processes[harq_pid]->Msc_initial,
ulsch->harq_processes[harq_pid]->Nsymb_initial,
ulsch->beta_offset_cqi_times8);
LOG_D(PHY,"Qprime %d, O_RI %d + %d, Msc %d, Nym %d beta %d\n",
Qprime,
ulsch->O, L,
ulsch->harq_processes[harq_pid]->Msc_initial,
ulsch->harq_processes[harq_pid]->Nsymb_initial,
ulsch->beta_offset_cqi_times8);
if (Qprime > 0) {
if ((Qprime % (8*sumKr)) > 0)
@@ -463,31 +438,29 @@ uint32_t ulsch_encoding(uint8_t *a,
G = ulsch->harq_processes[harq_pid]->nb_rb * (12 * Q_m) * (ulsch->Nsymb_pusch);
LOG_D(PHY,"G: rb %d * ( 12 * Qm %d ) * nsymb %d, Qprime %d, O_RI %d\n", ulsch->harq_processes[harq_pid]->nb_rb, Q_m, ulsch->Nsymb_pusch, Qprime, ulsch->O_RI);
if (Qprime > (G - ulsch->O_RI))
Qprime = G - ulsch->O_RI;
Q_CQI = Q_m * Qprime;
Qprime_CQI = Qprime;
G = G - Q_RI - Q_CQI;
LOG_D(PHY,"new G: %d, Q_RI %d Q_CQI %d\n", G , Q_RI , Q_CQI);
LOG_D(PHY,"new G: %d, Q_RI %d Q_CQI %d\n", G, Q_RI, Q_CQI);
ulsch->harq_processes[harq_pid]->G = G;
/*
LOG_I(PHY,"ULSCH Encoding G %d, Q_RI %d (O_RI%d, Msc_initial %d, Nsymb_initial%d, beta_offset_ri_times8 %d), Q_CQI %d, Q_ACK %d \n",G,Q_RI,ulsch->O_RI,ulsch->harq_processes[harq_pid]->Msc_initial,ulsch->harq_processes[harq_pid]->Nsymb_initial,ulsch->beta_offset_ri_times8,Q_CQI,Q_ACK);
/*
LOG_I(PHY,"ULSCH Encoding G %d, Q_RI %d (O_RI%d, Msc_initial %d, Nsymb_initial%d, beta_offset_ri_times8 %d), Q_CQI %d, Q_ACK %d \n",G,Q_RI,ulsch->O_RI,ulsch->harq_processes[harq_pid]->Msc_initial,ulsch->harq_processes[harq_pid]->Nsymb_initial,ulsch->beta_offset_ri_times8,Q_CQI,Q_ACK);
LOG_I(PHY,"ULSCH Encoding (Nid_cell %d, rnti %x): harq_pid %d round %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d\n",
frame_parms->Nid_cell,ulsch->rnti,
harq_pid,
ulsch->harq_processes[harq_pid]->round,
ulsch->harq_processes[harq_pid]->rvidx,
ulsch->harq_processes[harq_pid]->mcs,
ulsch->O_RI,
ulsch->harq_processes[harq_pid]->O_ACK,
G);
*/
LOG_I(PHY,"ULSCH Encoding (Nid_cell %d, rnti %x): harq_pid %d round %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d\n",
frame_parms->Nid_cell,ulsch->rnti,
harq_pid,
ulsch->harq_processes[harq_pid]->round,
ulsch->harq_processes[harq_pid]->rvidx,
ulsch->harq_processes[harq_pid]->mcs,
ulsch->O_RI,
ulsch->harq_processes[harq_pid]->O_ACK,
G);
*/
if ((int)G < 0) {
LOG_E(PHY,"FATAL: ulsch_coding.c G < 0 (%d) : Q_RI %d, Q_CQI %d, O %d, betaCQI_times8 %d)\n",G,Q_RI,Q_CQI,ulsch->O,ulsch->beta_offset_cqi_times8);
@@ -495,26 +468,21 @@ uint32_t ulsch_encoding(uint8_t *a,
return(-1);
}
// Data and control multiplexing (5.2.2.7 36-212)
H = G + Q_CQI;
Hprime = H/Q_m;
// Fill in the "e"-sequence from 36-212, V8.6 2009-03, p. 16-17 (for each "e") and concatenate the
// outputs for each code segment, see Section 5.1.5 p.20
for (r=0; r<ulsch->harq_processes[harq_pid]->C; r++) {
#ifdef DEBUG_ULSCH_CODING
printf("Rate Matching, Code segment %d (coded bits (G) %d,unpunctured/repeated bits per code segment %d,mod_order %d, nb_rb %d)...\n",
r,
G,
Kr*3,
Q_m,ulsch->harq_processes[harq_pid]->nb_rb);
r,
G,
Kr*3,
Q_m,ulsch->harq_processes[harq_pid]->nb_rb);
#endif
start_meas(rm_stats);
r_offset += lte_rate_matching_turbo(ulsch->harq_processes[harq_pid]->RTC[r],
G,
@@ -529,7 +497,7 @@ uint32_t ulsch_encoding(uint8_t *a,
1,
r,
ulsch->harq_processes[harq_pid]->nb_rb);
//ulsch->harq_processes[harq_pid]->mcs); // r
//ulsch->harq_processes[harq_pid]->mcs); // r
stop_meas(rm_stats);
#ifdef DEBUG_ULSCH_CODING
@@ -544,7 +512,6 @@ uint32_t ulsch_encoding(uint8_t *a,
Hprime = H/Q_m;
}
// Do CQI coding
if ((ulsch->O>1) && (ulsch->O < 12)) {
LOG_E(PHY,"short CQI sizes not supported yet\n");
@@ -558,23 +525,18 @@ uint32_t ulsch_encoding(uint8_t *a,
printf("crc(cqi) tx : %x\n",crc);
#endif
memset((void *)&ulsch->o_d[0],LTE_NULL,96);
ccodelte_encode(ulsch->O,
1,
o_flip,
&ulsch->o_d[96],
0);
o_RCC = sub_block_interleaving_cc(8+ulsch->O,
&ulsch->o_d[96],
ulsch->o_w);
lte_rate_matching_cc(o_RCC,
Q_CQI,
ulsch->o_w,
ulsch->q);
}
i=0;
@@ -582,29 +544,29 @@ uint32_t ulsch_encoding(uint8_t *a,
// Do RI coding
if (ulsch->O_RI == 1) {
switch (Q_m) {
case 2:
ulsch->q_RI[0] = ulsch->o_RI[0];
ulsch->q_RI[1] = PUSCH_y;//ulsch->o_RI[0];
len_RI=2;
break;
case 2:
ulsch->q_RI[0] = ulsch->o_RI[0];
ulsch->q_RI[1] = PUSCH_y;//ulsch->o_RI[0];
len_RI=2;
break;
case 4:
ulsch->q_RI[0] = ulsch->o_RI[0];
ulsch->q_RI[1] = PUSCH_y;//1;
ulsch->q_RI[2] = PUSCH_x;//ulsch->o_RI[0];
ulsch->q_RI[3] = PUSCH_x;//1;
len_RI=4;
break;
case 4:
ulsch->q_RI[0] = ulsch->o_RI[0];
ulsch->q_RI[1] = PUSCH_y;//1;
ulsch->q_RI[2] = PUSCH_x;//ulsch->o_RI[0];
ulsch->q_RI[3] = PUSCH_x;//1;
len_RI=4;
break;
case 6:
ulsch->q_RI[0] = ulsch->o_RI[0];
ulsch->q_RI[1] = PUSCH_y;//1;
ulsch->q_RI[2] = PUSCH_x;//1;
ulsch->q_RI[3] = PUSCH_x;//ulsch->o_RI[0];
ulsch->q_RI[4] = PUSCH_x;//1;
ulsch->q_RI[5] = PUSCH_x;//1;
len_RI=6;
break;
case 6:
ulsch->q_RI[0] = ulsch->o_RI[0];
ulsch->q_RI[1] = PUSCH_y;//1;
ulsch->q_RI[2] = PUSCH_x;//1;
ulsch->q_RI[3] = PUSCH_x;//ulsch->o_RI[0];
ulsch->q_RI[4] = PUSCH_x;//1;
ulsch->q_RI[5] = PUSCH_x;//1;
len_RI=6;
break;
}
} else if (ulsch->O_RI>1) {
LOG_E(PHY,"RI cannot be more than 1 bit yet\n");
@@ -616,35 +578,35 @@ uint32_t ulsch_encoding(uint8_t *a,
wACK_idx = (ulsch->bundling==0) ? 4 : ((Nbundled-1)&3);
#ifdef DEBUG_ULSCH_CODING
printf("ulsch_coding.c: Bundling %d, Nbundled %d, wACK_idx %d\n",
ulsch->bundling,Nbundled,wACK_idx);
ulsch->bundling,Nbundled,wACK_idx);
#endif
// 1-bit ACK/NAK
if (ulsch->harq_processes[harq_pid]->O_ACK == 1) {
switch (Q_m) {
case 2:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->bundling==0)? PUSCH_y : ((ulsch->o_ACK[0]+wACK[wACK_idx][1])&1);//ulsch->o_ACK[0];
len_ACK = 2;
break;
case 2:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->bundling==0)? PUSCH_y : ((ulsch->o_ACK[0]+wACK[wACK_idx][1])&1);//ulsch->o_ACK[0];
len_ACK = 2;
break;
case 4:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->bundling==0)? PUSCH_y : ((ulsch->o_ACK[0]+wACK[wACK_idx][1])&1);
ulsch->q_ACK[2] = PUSCH_x;
ulsch->q_ACK[3] = PUSCH_x;
len_ACK = 4;
break;
case 4:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->bundling==0)? PUSCH_y : ((ulsch->o_ACK[0]+wACK[wACK_idx][1])&1);
ulsch->q_ACK[2] = PUSCH_x;
ulsch->q_ACK[3] = PUSCH_x;
len_ACK = 4;
break;
case 6:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->bundling==0)? PUSCH_y : ((ulsch->o_ACK[0]+wACK[wACK_idx][1])&1);
ulsch->q_ACK[2] = PUSCH_x;
ulsch->q_ACK[3] = PUSCH_x;
ulsch->q_ACK[4] = PUSCH_x;
ulsch->q_ACK[6] = PUSCH_x;
len_ACK = 6;
break;
case 6:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->bundling==0)? PUSCH_y : ((ulsch->o_ACK[0]+wACK[wACK_idx][1])&1);
ulsch->q_ACK[2] = PUSCH_x;
ulsch->q_ACK[3] = PUSCH_x;
ulsch->q_ACK[4] = PUSCH_x;
ulsch->q_ACK[6] = PUSCH_x;
len_ACK = 6;
break;
}
}
@@ -653,56 +615,53 @@ uint32_t ulsch_encoding(uint8_t *a,
ack_parity = (ulsch->o_ACK[0]+ulsch->o_ACK[1])&1;
switch (Q_m) {
case 2:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->o_ACK[1]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[2] = (ack_parity+wACK[wACK_idx][0])&1;
ulsch->q_ACK[3] = (ulsch->o_ACK[0]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[4] = (ulsch->o_ACK[1]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[5] = (ack_parity+wACK[wACK_idx][1])&1;
len_ACK = 6;
break;
case 2:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->o_ACK[1]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[2] = (ack_parity+wACK[wACK_idx][0])&1;
ulsch->q_ACK[3] = (ulsch->o_ACK[0]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[4] = (ulsch->o_ACK[1]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[5] = (ack_parity+wACK[wACK_idx][1])&1;
len_ACK = 6;
break;
case 4:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->o_ACK[1]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[2] = PUSCH_x;
ulsch->q_ACK[3] = PUSCH_x;//1;
ulsch->q_ACK[4] = (ack_parity+wACK[wACK_idx][0])&1;
ulsch->q_ACK[5] = (ulsch->o_ACK[0]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[6] = PUSCH_x;
ulsch->q_ACK[7] = PUSCH_x;//1;
ulsch->q_ACK[8] = (ulsch->o_ACK[1]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[9] = (ack_parity+wACK[wACK_idx][1])&1;
ulsch->q_ACK[10] = PUSCH_x;
ulsch->q_ACK[11] = PUSCH_x;//1;
len_ACK = 12;
break;
case 4:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->o_ACK[1]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[2] = PUSCH_x;
ulsch->q_ACK[3] = PUSCH_x;//1;
ulsch->q_ACK[4] = (ack_parity+wACK[wACK_idx][0])&1;
ulsch->q_ACK[5] = (ulsch->o_ACK[0]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[6] = PUSCH_x;
ulsch->q_ACK[7] = PUSCH_x;//1;
ulsch->q_ACK[8] = (ulsch->o_ACK[1]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[9] = (ack_parity+wACK[wACK_idx][1])&1;
ulsch->q_ACK[10] = PUSCH_x;
ulsch->q_ACK[11] = PUSCH_x;//1;
len_ACK = 12;
break;
case 6:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->o_ACK[1]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[2] = PUSCH_x;
ulsch->q_ACK[3] = PUSCH_x;
ulsch->q_ACK[4] = PUSCH_x;
ulsch->q_ACK[5] = PUSCH_x;
ulsch->q_ACK[6] = (ack_parity+wACK[wACK_idx][0])&1;
ulsch->q_ACK[7] = (ulsch->o_ACK[0]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[8] = PUSCH_x;
ulsch->q_ACK[9] = PUSCH_x;
ulsch->q_ACK[10] = PUSCH_x;
ulsch->q_ACK[11] = PUSCH_x;
ulsch->q_ACK[12] = (ulsch->o_ACK[1]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[13] = (ack_parity+wACK[wACK_idx][1])&1;
ulsch->q_ACK[14] = PUSCH_x;
ulsch->q_ACK[15] = PUSCH_x;
ulsch->q_ACK[16] = PUSCH_x;
ulsch->q_ACK[17] = PUSCH_x;
len_ACK = 18;
break;
case 6:
ulsch->q_ACK[0] = (ulsch->o_ACK[0]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[1] = (ulsch->o_ACK[1]+wACK[wACK_idx][0])&1;
ulsch->q_ACK[2] = PUSCH_x;
ulsch->q_ACK[3] = PUSCH_x;
ulsch->q_ACK[4] = PUSCH_x;
ulsch->q_ACK[5] = PUSCH_x;
ulsch->q_ACK[6] = (ack_parity+wACK[wACK_idx][0])&1;
ulsch->q_ACK[7] = (ulsch->o_ACK[0]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[8] = PUSCH_x;
ulsch->q_ACK[9] = PUSCH_x;
ulsch->q_ACK[10] = PUSCH_x;
ulsch->q_ACK[11] = PUSCH_x;
ulsch->q_ACK[12] = (ulsch->o_ACK[1]+wACK[wACK_idx][1])&1;
ulsch->q_ACK[13] = (ack_parity+wACK[wACK_idx][1])&1;
ulsch->q_ACK[14] = PUSCH_x;
ulsch->q_ACK[15] = PUSCH_x;
ulsch->q_ACK[16] = PUSCH_x;
ulsch->q_ACK[17] = PUSCH_x;
len_ACK = 18;
break;
}
}
@@ -712,23 +671,17 @@ uint32_t ulsch_encoding(uint8_t *a,
return(-1);
}
// channel multiplexing/interleaving
start_meas(m_stats);
Hpp = Hprime + Q_RI;
Cmux = ulsch->Nsymb_pusch;
Rmux = Hpp*Q_m/Cmux;
Rmux_prime = Rmux/Q_m;
Qprime_RI = Q_RI / Q_m;
Qprime_ACK = Q_ACK / Q_m;
Qprime_CQI = Q_CQI / Q_m;
// printf("Qprime_CQI = %d\n",Qprime_CQI);
// RI BITS
memset(y,LTE_NULL,Q_m*Hpp);
if (frame_parms->Ncp == 0)
@@ -747,10 +700,8 @@ uint32_t ulsch_encoding(uint8_t *a,
}
j=(j+3)&3;
}
// CQI and Data bits
j=0;
/*
@@ -775,7 +726,6 @@ uint32_t ulsch_encoding(uint8_t *a,
*/
for (i=0; i<Qprime_CQI; i++) {
while (y[Q_m*j] != LTE_NULL) j++;
for (q=0; q<Q_m; q++) {
@@ -789,47 +739,44 @@ uint32_t ulsch_encoding(uint8_t *a,
j2 = j*Q_m;
switch (Q_m) {
case 2:
for (iprime=0; iprime<(Hprime-Qprime_CQI)<<1; iprime+=2) {
while (y[j2] != LTE_NULL) j2+=2;
case 2:
y[j2] = ulsch->e[iprime];
y[1+j2] = ulsch->e[1+iprime];
j2+=2;
}
for (iprime=0; iprime<(Hprime-Qprime_CQI)<<1; iprime+=2) {
while (y[j2] != LTE_NULL) j2+=2;
break;
y[j2] = ulsch->e[iprime];
y[1+j2] = ulsch->e[1+iprime];
j2+=2;
}
case 4:
for (iprime=0; iprime<(Hprime-Qprime_CQI)<<2; iprime+=4) {
while (y[j2] != LTE_NULL) j2+=4;
break;
y[j2] = ulsch->e[iprime];
y[1+j2] = ulsch->e[1+iprime];
y[2+j2] = ulsch->e[2+iprime];
y[3+j2] = ulsch->e[3+iprime];
j2+=4;
}
case 4:
for (iprime=0; iprime<(Hprime-Qprime_CQI)<<2; iprime+=4) {
while (y[j2] != LTE_NULL) j2+=4;
break;
y[j2] = ulsch->e[iprime];
y[1+j2] = ulsch->e[1+iprime];
y[2+j2] = ulsch->e[2+iprime];
y[3+j2] = ulsch->e[3+iprime];
j2+=4;
}
case 6:
for (iprime=0; iprime<(Hprime-Qprime_CQI)*6; iprime+=6) {
while (y[j2] != LTE_NULL) j2+=6;
break;
case 6:
for (iprime=0; iprime<(Hprime-Qprime_CQI)*6; iprime+=6) {
while (y[j2] != LTE_NULL) j2+=6;
y[j2] = ulsch->e[iprime];
y[1+j2] = ulsch->e[1+iprime];
y[2+j2] = ulsch->e[2+iprime];
y[3+j2] = ulsch->e[3+iprime];
y[4+j2] = ulsch->e[4+iprime];
y[5+j2] = ulsch->e[5+iprime];
j2+=6;
}
break;
y[j2] = ulsch->e[iprime];
y[1+j2] = ulsch->e[1+iprime];
y[2+j2] = ulsch->e[2+iprime];
y[3+j2] = ulsch->e[3+iprime];
y[4+j2] = ulsch->e[4+iprime];
y[5+j2] = ulsch->e[5+iprime];
j2+=6;
}
break;
}
// HARQ-ACK Bits (Note these overwrite some bits)
@@ -848,57 +795,56 @@ uint32_t ulsch_encoding(uint8_t *a,
y[q+(Q_m*((r*Cmux) + columnset[j]))] = ulsch->q_ACK[(q+(Q_m*i))%len_ACK];
#ifdef DEBUG_ULSCH_CODING
printf("ulsch_coding.c: ACK %d => y[%d]=%d (i %d, r*Cmux %d, columnset %d)\n",q+(Q_m*i),
q+(Q_m*((r*Cmux) + columnset[j])),ulsch->q_ACK[(q+(Q_m*i))%len_ACK],
i,r*Cmux,columnset[j]);
q+(Q_m*((r*Cmux) + columnset[j])),ulsch->q_ACK[(q+(Q_m*i))%len_ACK],
i,r*Cmux,columnset[j]);
#endif
}
j=(j+3)&3;
}
// write out buffer
j=0;
switch (Q_m) {
case 2:
for (i=0; i<Cmux; i++)
for (r=0; r<Rmux_prime; r++) {
yptr=&y[((r*Cmux)+i)<<1];
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
}
case 2:
for (i=0; i<Cmux; i++)
for (r=0; r<Rmux_prime; r++) {
yptr=&y[((r*Cmux)+i)<<1];
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
}
break;
break;
case 4:
for (i=0; i<Cmux; i++)
for (r=0; r<Rmux_prime; r++) {
yptr = &y[((r*Cmux)+i)<<2];
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
}
case 4:
for (i=0; i<Cmux; i++)
for (r=0; r<Rmux_prime; r++) {
yptr = &y[((r*Cmux)+i)<<2];
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
}
break;
break;
case 6:
for (i=0; i<Cmux; i++)
for (r=0; r<Rmux_prime; r++) {
yptr = &y[((r*Cmux)+i)*6];
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
}
case 6:
for (i=0; i<Cmux; i++)
for (r=0; r<Rmux_prime; r++) {
yptr = &y[((r*Cmux)+i)*6];
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
ulsch->h[j++] = *yptr++;
}
break;
break;
default:
break;
default:
break;
}
stop_meas(m_stats);
openair1/PHY/NR_ESTIMATION/nr_measurements_gNB.c
+3 -3
View File
@@ -149,7 +149,7 @@ void gNB_I0_measurements(PHY_VARS_gNB *gNB,int first_symb,int num_symb) {
//
// Todo:
// - averaging IIR filter for RX power and noise
void nr_gnb_measurements(PHY_VARS_gNB *gNB, uint8_t ulsch_id, unsigned char harq_pid, unsigned char symbol){
void nr_gnb_measurements(PHY_VARS_gNB *gNB, uint8_t ulsch_id, unsigned char harq_pid, unsigned char symbol, uint8_t nrOfLayers){
int rx_power_tot[NUMBER_OF_NR_ULSCH_MAX];
int rx_power[NUMBER_OF_NR_ULSCH_MAX][NB_ANTENNAS_RX];
@@ -169,9 +169,9 @@ void nr_gnb_measurements(PHY_VARS_gNB *gNB, uint8_t ulsch_id, unsigned char harq
rx_power[ulsch_id][aarx] = 0;
for (int aatx = 0; aatx < fp->nb_antennas_tx; aatx++){
for (int aatx = 0; aatx < nrOfLayers; aatx++){
meas->rx_spatial_power[ulsch_id][aatx][aarx] = (signal_energy_nodc(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][ch_offset], N_RB_UL * NR_NB_SC_PER_RB));
meas->rx_spatial_power[ulsch_id][aatx][aarx] = (signal_energy_nodc(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aatx*fp->nb_antennas_rx+aarx][ch_offset], N_RB_UL * NR_NB_SC_PER_RB));
if (meas->rx_spatial_power[ulsch_id][aatx][aarx] < 0) {
meas->rx_spatial_power[ulsch_id][aatx][aarx] = 0;
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
+8 -6
View File
@@ -129,8 +129,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------//
if (pusch_pdu->transform_precoding == transform_precoder_disabled) {
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch, (pusch_pdu->bwp_start + pusch_pdu->rb_start)*NR_NB_SC_PER_RB, pusch_pdu->dmrs_config_type);
// transform precoding = 1 means disabled
if (pusch_pdu->transform_precoding == 1) {
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
(pusch_pdu->bwp_start + pusch_pdu->rb_start)*NR_NB_SC_PER_RB, pusch_pdu->dmrs_config_type);
}
else { // if transform precoding or SC-FDMA is enabled in Uplink
@@ -171,7 +173,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
ul_ch = (int16_t *)&ul_ch_estimates[p*gNB->frame_parms.nb_antennas_rx+aarx][ch_offset];
re_offset = k;
memset(ul_ch,0,4*(gNB->frame_parms.ofdm_symbol_size));
@@ -370,7 +372,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
// check if PRB crosses DC and improve estimates around DC
if ((bwp_start_subcarrier < gNB->frame_parms.ofdm_symbol_size) && (bwp_start_subcarrier+nb_rb_pusch*12 >= gNB->frame_parms.ofdm_symbol_size)) {
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
ul_ch = (int16_t *)&ul_ch_estimates[p*gNB->frame_parms.nb_antennas_rx+aarx][ch_offset];
uint16_t idxDC = 2*(gNB->frame_parms.ofdm_symbol_size - bwp_start_subcarrier);
uint16_t idxPil = idxDC/2;
re_offset = k;
@@ -421,7 +423,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
}
}
#ifdef DEBUG_PUSCH
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
ul_ch = (int16_t *)&ul_ch_estimates[p*gNB->frame_parms.nb_antennas_rx+aarx][ch_offset];
for(uint16_t idxP=0; idxP<ceil((float)nb_rb_pusch*12/8); idxP++) {
for(uint8_t idxI=0; idxI<16; idxI+=2) {
printf("%d\t%d\t",ul_ch[idxP*16+idxI],ul_ch[idxP*16+idxI+1]);
@@ -511,7 +513,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch_r,
ul_ch);
ul_ch_128 = (__m128i *)&ul_ch_estimates[aarx][ch_offset];
ul_ch_128 = (__m128i *)&ul_ch_estimates[p*gNB->frame_parms.nb_antennas_rx+aarx][ch_offset];
ul_ch_128[0] = _mm_slli_epi16 (ul_ch_128[0], 2);
}
openair1/PHY/NR_ESTIMATION/nr_ul_estimation.h
+1 -1
View File
@@ -51,7 +51,7 @@ void dump_nr_I0_stats(FILE *fd,PHY_VARS_gNB *gNB);
void gNB_I0_measurements(PHY_VARS_gNB *gNB,int first_symb,int num_symb);
void nr_gnb_measurements(PHY_VARS_gNB *gNB, uint8_t ulsch_id, unsigned char harq_pid, unsigned char symbol);
void nr_gnb_measurements(PHY_VARS_gNB *gNB, uint8_t ulsch_id, unsigned char harq_pid, unsigned char symbol, uint8_t nrOfLayers);
int nr_est_timing_advance_pusch(PHY_VARS_gNB* phy_vars_gNB, int UE_id);
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+2 -1
View File
@@ -278,8 +278,9 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n",
start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers);
#endif
for (int ap=0; ap<rel15->nrOfLayers; ap++) {
// DMRS params for this ap
get_Wt(Wt, ap, dmrs_Type);
get_Wf(Wf, ap, dmrs_Type);
openair1/PHY/NR_TRANSPORT/nr_pbch.c
+2 -2
View File
@@ -42,7 +42,7 @@
extern short nr_qpsk_mod_table[8];
uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6, 24, 7, 0, 5, 3, 2, 1, 4,
const uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6, 24, 7, 0, 5, 3, 2, 1, 4,
9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31
};
@@ -141,7 +141,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
return 0;
}
void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
static void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
uint32_t Nid,
uint8_t nushift,
uint16_t M,
openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
+2 -13
View File
@@ -78,19 +78,6 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
\fn int nr_pbch_scrambling
\brief PBCH scrambling function
@param
*/
void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
uint32_t Nid,
uint8_t nushift,
uint16_t M,
uint16_t length,
uint8_t encoded,
uint32_t unscrambling_mask);
/*!
\fn int nr_generate_pbch
\brief Generation of the PBCH
@@ -178,6 +165,7 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
int32_t *avg,
uint8_t symbol,
uint32_t len,
uint8_t nrOfLayers,
unsigned short nb_rb);
/** \brief This function performs channel compensation (matched filtering) on the received RBs for this allocation. In addition, it computes the squared-magnitude of the channel with weightings for 16QAM/64QAM detection as well as dual-stream detection (cross-correlation)
@@ -202,6 +190,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
unsigned char symbol,
uint8_t is_dmrs_symbol,
unsigned char mod_order,
uint8_t nrOfLayers,
unsigned short nb_rb,
unsigned char output_shift);
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+46 -41
View File
@@ -7,6 +7,7 @@
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_ESTIMATION/nr_ul_estimation.h"
#include "PHY/defs_nr_common.h"
#include "common/utils/nr/nr_common.h"
//#define DEBUG_CH_COMP
//#define DEBUG_RB_EXT
@@ -467,6 +468,7 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
int32_t *avg,
uint8_t symbol,
uint32_t len,
uint8_t nrOfLayers,
unsigned short nb_rb)
{
@@ -474,7 +476,6 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
short rb;
unsigned char aatx, aarx;
char nb_antennas_ue_tx = 1;
__m128i *ul_ch128, avg128U;
int16_t x = factor2(len);
@@ -486,12 +487,12 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
int off = 0;
#endif
for (aatx = 0; aatx < nb_antennas_ue_tx; aatx++)
for (aatx = 0; aatx < nrOfLayers; aatx++)
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
//clear average level
avg128U = _mm_setzero_si128();
ul_ch128=(__m128i *)&ul_ch_estimates_ext[(aatx<<1)+aarx][symbol*(off+(nb_rb*12))];
ul_ch128=(__m128i *)&ul_ch_estimates_ext[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
for (rb = 0; rb < len/12; rb++) {
avg128U = _mm_add_epi32(avg128U, _mm_srai_epi32(_mm_madd_epi16(ul_ch128[0], ul_ch128[0]), x));
@@ -500,10 +501,10 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
ul_ch128+=3;
}
avg[(aatx<<1)+aarx] = (((int32_t*)&avg128U)[0] +
((int32_t*)&avg128U)[1] +
((int32_t*)&avg128U)[2] +
((int32_t*)&avg128U)[3] ) / y;
avg[aatx*frame_parms->nb_antennas_rx+aarx] = (((int32_t*)&avg128U)[0] +
((int32_t*)&avg128U)[1] +
((int32_t*)&avg128U)[2] +
((int32_t*)&avg128U)[3]) / y;
}
@@ -519,13 +520,13 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
for (aatx=0; aatx<nrOfLayers; aatx++) {
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
avg128U = vdupq_n_s32(0);
// 5 is always a symbol with no pilots for both normal and extended prefix
ul_ch128 = (int16x4_t *)&ul_ch_estimates_ext[(aatx<<1)+aarx][symbol*frame_parms->N_RB_UL*12];
ul_ch128 = (int16x4_t *)&ul_ch_estimates_ext[aatx*frame_parms->nb_antennas_rx+aarx][symbol*frame_parms->N_RB_UL*12];
for (rb = 0; rb < nb_rb; rb++) {
// printf("rb %d : ",rb);
@@ -535,7 +536,7 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
avg128U = vqaddq_s32(avg128U, vmull_s16(ul_ch128[2], ul_ch128[2]));
avg128U = vqaddq_s32(avg128U, vmull_s16(ul_ch128[3], ul_ch128[3]));
if (((symbol_mod == 0) || (symbol_mod == (frame_parms->Ncp-1)))&&(frame_parms->nb_antenna_ports_gNB!=1)) {
if (((symbol_mod == 0) || (symbol_mod == (frame_parms->Ncp-1)))&&(nrOfLayers!=1)) {
ul_ch128+=4;
} else {
avg128U = vqaddq_s32(avg128U, vmull_s16(ul_ch128[4], ul_ch128[4]));
@@ -557,10 +558,10 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
else
nre=12;
avg[(aatx<<1)+aarx] = (((int32_t*)&avg128U)[0] +
((int32_t*)&avg128U)[1] +
((int32_t*)&avg128U)[2] +
((int32_t*)&avg128U)[3] ) / (nb_rb*nre);
avg[aatx*frame_parms->nb_antennas_rx+aarx] = (((int32_t*)&avg128U)[0] +
((int32_t*)&avg128U)[1] +
((int32_t*)&avg128U)[2] +
((int32_t*)&avg128U)[3]) / (nb_rb*nre);
}
}
#endif
@@ -576,6 +577,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
unsigned char symbol,
uint8_t is_dmrs_symbol,
unsigned char mod_order,
uint8_t nrOfLayers,
unsigned short nb_rb,
unsigned char output_shift) {
@@ -627,12 +629,11 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
unsigned short rb;
unsigned char aatx,aarx;
char nb_antennas_ue_tx = 1;
__m128i *ul_ch128,*ul_ch128_2,*ul_ch_mag128,*ul_ch_mag128b,*rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128,QAM_amp128b;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0},QAM_amp128b={0};
QAM_amp128b = _mm_setzero_si128();
for (aatx=0; aatx<nb_antennas_ue_tx; aatx++) {
for (aatx=0; aatx<nrOfLayers; aatx++) {
if (mod_order == 4) {
QAM_amp128 = _mm_set1_epi16(QAM16_n1); // 2/sqrt(10)
@@ -646,11 +647,11 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
ul_ch128 = (__m128i *)&ul_ch_estimates_ext[(aatx<<1)+aarx][symbol*(off+(nb_rb*12))];
ul_ch_mag128 = (__m128i *)&ul_ch_mag[(aatx<<1)+aarx][symbol*(off+(nb_rb*12))];
ul_ch_mag128b = (__m128i *)&ul_ch_magb[(aatx<<1)+aarx][symbol*(off+(nb_rb*12))];
ul_ch128 = (__m128i *)&ul_ch_estimates_ext[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
ul_ch_mag128 = (__m128i *)&ul_ch_mag[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
ul_ch_mag128b = (__m128i *)&ul_ch_magb[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*(off+(nb_rb*12))];
rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol*(off+(nb_rb*12))];
rxdataF_comp128 = (__m128i *)&rxdataF_comp[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
for (rb=0; rb<nb_rb; rb++) {
@@ -884,7 +885,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
if ((symbol_mod == 0) || (symbol_mod == (4-frame_parms->Ncp))) {
if (frame_parms->nb_antenna_ports_gNB==1) { // 10 out of 12 so don't reduce size
if (nrOfLayers==1) { // 10 out of 12 so don't reduce size
nb_rb=1+(5*nb_rb/6);
}
else {
@@ -892,7 +893,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
}
}
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
for (aatx=0; aatx<nrOfLayers; aatx++) {
if (mod_order == 4) {
QAM_amp128 = vmovq_n_s16(QAM16_n1); // 2/sqrt(10)
QAM_amp128b = vmovq_n_s16(0);
@@ -903,11 +904,11 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
// printf("comp: rxdataF_comp %p, symbol %d\n",rxdataF_comp[0],symbol);
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
ul_ch128 = (int16x4_t*)&ul_ch_estimates_ext[(aatx<<1)+aarx][symbol*frame_parms->N_RB_UL*12];
ul_ch_mag128 = (int16x8_t*)&ul_ch_mag[(aatx<<1)+aarx][symbol*frame_parms->N_RB_UL*12];
ul_ch_mag128b = (int16x8_t*)&ul_ch_magb[(aatx<<1)+aarx][symbol*frame_parms->N_RB_UL*12];
ul_ch128 = (int16x4_t*)&ul_ch_estimates_ext[aatx*frame_parms->nb_antennas_rx+aarx][symbol*frame_parms->N_RB_UL*12];
ul_ch_mag128 = (int16x8_t*)&ul_ch_mag[aatx*frame_parms->nb_antennas_rx+aarx][symbol*frame_parms->N_RB_UL*12];
ul_ch_mag128b = (int16x8_t*)&ul_ch_magb[aatx*frame_parms->nb_antennas_rx+aarx][symbol*frame_parms->N_RB_UL*12];
rxdataF128 = (int16x4_t*)&rxdataF_ext[aarx][symbol*frame_parms->N_RB_UL*12];
rxdataF_comp128 = (int16x4x2_t*)&rxdataF_comp[(aatx<<1)+aarx][symbol*frame_parms->N_RB_UL*12];
rxdataF_comp128 = (int16x4x2_t*)&rxdataF_comp[aatx*frame_parms->nb_antennas_rx+aarx][symbol*frame_parms->N_RB_UL*12];
for (rb=0; rb<nb_rb; rb++) {
if (mod_order>2) {
@@ -1166,10 +1167,10 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t aarx, aatx;
uint32_t nb_re_pusch, bwp_start_subcarrier;
int avgs;
int avg[4];
char nb_antennas_ue_tx = 1;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[ulsch_id][0]->harq_processes[harq_pid]->ulsch_pdu;
int avg[frame_parms->nb_antennas_rx*rel15_ul->nrOfLayers];
gNB->pusch_vars[ulsch_id]->dmrs_symbol = INVALID_VALUE;
gNB->pusch_vars[ulsch_id]->cl_done = 0;
@@ -1189,15 +1190,16 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
if (gNB->pusch_vars[ulsch_id]->dmrs_symbol == INVALID_VALUE)
gNB->pusch_vars[ulsch_id]->dmrs_symbol = symbol;
nr_pusch_channel_estimation(gNB,
slot,
0, // p
symbol,
ulsch_id,
bwp_start_subcarrier,
rel15_ul);
for (int nl=0; nl<rel15_ul->nrOfLayers; nl++)
nr_pusch_channel_estimation(gNB,
slot,
get_dmrs_port(nl,rel15_ul->dmrs_ports),
symbol,
ulsch_id,
bwp_start_subcarrier,
rel15_ul);
nr_gnb_measurements(gNB, ulsch_id, harq_pid, symbol);
nr_gnb_measurements(gNB, ulsch_id, harq_pid, symbol,rel15_ul->nrOfLayers);
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
if (symbol == rel15_ul->start_symbol_index) {
@@ -1278,13 +1280,14 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
avg,
symbol,
nb_re_pusch,
rel15_ul->nrOfLayers,
rel15_ul->rb_size);
avgs = 0;
for (aatx=0;aatx<nb_antennas_ue_tx;aatx++)
for (aatx=0;aatx<rel15_ul->nrOfLayers;aatx++)
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++)
avgs = cmax(avgs,avg[(aatx<<1)+aarx]);
avgs = cmax(avgs,avg[aatx*frame_parms->nb_antennas_rx+aarx]);
gNB->pusch_vars[ulsch_id]->log2_maxh = (log2_approx(avgs)/2)+3;
gNB->pusch_vars[ulsch_id]->cl_done = 1;
@@ -1299,11 +1302,12 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
gNB->pusch_vars[ulsch_id]->ul_ch_mag0,
gNB->pusch_vars[ulsch_id]->ul_ch_magb0,
gNB->pusch_vars[ulsch_id]->rxdataF_comp,
(nb_antennas_ue_tx>1) ? gNB->pusch_vars[ulsch_id]->rho : NULL,
(rel15_ul->nrOfLayers>1) ? gNB->pusch_vars[ulsch_id]->rho : NULL,
frame_parms,
symbol,
dmrs_symbol_flag,
rel15_ul->qam_mod_order,
rel15_ul->nrOfLayers,
rel15_ul->rb_size,
gNB->pusch_vars[ulsch_id]->log2_maxh);
stop_meas(&gNB->ulsch_channel_compensation_stats);
@@ -1317,7 +1321,8 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
rel15_ul->rb_size);
stop_meas(&gNB->ulsch_mrc_stats);
if (rel15_ul->transform_precoding == transform_precoder_enabled) {
// transform precoding = 0 means enabled
if (rel15_ul->transform_precoding == 0) {
#ifdef __AVX2__
// For odd number of resource blocks need byte alignment to multiple of 8
openair1/PHY/NR_TRANSPORT/pucch_rx.c
+2
View File
@@ -49,6 +49,8 @@
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "T.h"
//#define DEBUG_NR_PUCCH_RX 1
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+3 -1
View File
@@ -963,7 +963,8 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
currentPtrDCI);
n_rnti = rel15->rnti;
LOG_D(PHY, "(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d)\n", proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length);
LOG_D(PHY, "(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length);
if (crc == n_rnti) {
LOG_D(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d,payload %llx)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length,*(unsigned long long*)dci_estimation);
@@ -978,6 +979,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
dci_ind->slot = proc->nr_slot_rx;
dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti;
dci_ind->dci_list[dci_ind->number_of_dcis].n_CCE = CCEind;
dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L;
dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].payloadSize = dci_length;
memcpy((void*)dci_ind->dci_list[dci_ind->number_of_dcis].payloadBits,(void*)dci_estimation,8);
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+523 -704
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
+4 -7
View File
@@ -811,7 +811,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
unsigned short rb;
unsigned char aatx,aarx,atx;
__m128i *dl_ch128,*dl_ch128_2,*dl_ch_mag128,*dl_ch_mag128b,*dl_ch_mag128r,*rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128,QAM_amp128b,QAM_amp128r;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0},QAM_amp128b={0},QAM_amp128r={0};
uint32_t nb_rb_0 = length/12 + ((length%12)?1:0);
for (aatx=0; aatx<nb_aatx; aatx++) {
@@ -1303,7 +1303,7 @@ void nr_dlsch_channel_compensation_core(int **rxdataF_ext,
int length_mod8 = 0;
int length2;
__m128i *dl_ch128,*dl_ch_mag128,*dl_ch_mag128b, *dl_ch128_2, *rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128,QAM_amp128b;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0},QAM_amp128b={0};
int aatx = 0, aarx = 0;
for (aatx=0; aatx<n_tx; aatx++) {
@@ -2877,13 +2877,10 @@ uint8_t nr_zero_forcing_rx_2layers(int **rxdataF_comp,
*
*
**************************************************************************/
__m128i *rxdataF_comp128_0,*rxdataF_comp128_1,*determ_fin_128;//*dl_ch_mag128_1,*dl_ch_mag128b_1,*dl_ch_mag128r_1
__m128i *dl_ch_mag128_0 = 0;
__m128i *dl_ch_mag128b_0 = 0;
__m128i *dl_ch_mag128r_0 = 0;
__m128i *rxdataF_comp128_0,*rxdataF_comp128_1,*dl_ch_mag128_0=NULL,*dl_ch_mag128b_0=NULL,*dl_ch_mag128r_0=NULL,*determ_fin_128;//*dl_ch_mag128_1,*dl_ch_mag128b_1,*dl_ch_mag128r_1
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3;
__m128i *after_mf_a_128,*after_mf_b_128, *after_mf_c_128, *after_mf_d_128;
__m128i QAM_amp128,QAM_amp128b,QAM_amp128r;
__m128i QAM_amp128={0},QAM_amp128b={0},QAM_amp128r={0};
determ_fin_128 = (__m128i *)&determ_fin[0];
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
-2
View File
@@ -374,8 +374,6 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, int n_frames)
#endif
//#endif
ue->is_synchronized_on_frame = is; // to notify on which of the two frames sync was successful
if (ue->UE_scan_carrier == 0) {
#if UE_AUTOTEST_TRACE
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+3 -3
View File
@@ -328,7 +328,7 @@ void nr_pbch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
#endif
}
void nr_pbch_unscrambling(NR_UE_PBCH *pbch,
static void nr_pbch_unscrambling(NR_UE_PBCH *pbch,
uint16_t Nid,
uint8_t nushift,
uint16_t M,
@@ -549,7 +549,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_ue_pbch_vars->pbch_a_prime = a_reversed;
//payload un-scrambling
memset(&nr_ue_pbch_vars->pbch_a_interleaved, 0, sizeof(uint32_t) );
nr_ue_pbch_vars->pbch_a_interleaved=0;
M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3);
nushift = ((nr_ue_pbch_vars->pbch_a_prime>>24)&1) ^ (((nr_ue_pbch_vars->pbch_a_prime>>6)&1)<<1);
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_PAYLOAD_BITS,1,unscrambling_mask);
@@ -607,7 +607,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, number_pdus);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus);
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL);
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+7 -5
View File
@@ -1475,11 +1475,13 @@ void nr_get_carrier_frequencies(NR_DL_FRAME_PARMS *fp,
@param dl_Carrier DL carrier to be set
@param freq_offset Freq offset to be set
*/
void nr_rf_card_config(openair0_config_t *openair0_cfg,
double rx_gain_off,
uint64_t ul_Carrier,
uint64_t dl_Carrier,
int freq_offset);
void nr_rf_card_config_gain(openair0_config_t *openair0_cfg,
double rx_gain_off);
void nr_rf_card_config_freq(openair0_config_t *openair0_cfg,
uint64_t ul_Carrier,
uint64_t dl_Carrier,
int freq_offset);
void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL);
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+1 -29
View File
@@ -56,34 +56,6 @@ typedef enum {
RETRANSMISSION_HARQ
} harq_result_t;
//#if defined(UPGRADE_RAT_NR)
#if 1
typedef struct {
/// HARQ process id
uint8_t harq_id;
/// HARQ rx status
harq_result_t rx_status;
/// ACK bits (after decoding) 0:NACK / 1:ACK / 2:DTX
uint8_t ack;
/// send status (for PUCCH)
uint8_t send_harq_status;
/// nCCE (for PUCCH)
uint8_t nCCE;
/// DAI value detected from DCI1/1a/1b/1d/2/2a/2b/2c. 0xff indicates not touched
uint8_t vDAI_DL;
/// DAI value detected from DCI0/4. 0xff indicates not touched
uint8_t vDAI_UL;
/// allow to define pucch parameters TS 38.213 9.2.3 UE procedure for reporting HARQ-ACK
uint8_t pucch_resource_indicator;
/// slot on which feedback ack should be send to network
uint16_t slot_for_feedback_ack;
/// index of a first CCE for the PDCCH reception
uint8_t n_CCE;
/// number of CCEs in a control resource set of a PDCCH reception conveying DCI format 1_0
uint8_t N_CCE;
} NR_UE_HARQ_STATUS_t;
#endif
typedef struct {
/// NDAPI struct for UE
nfapi_nr_ue_pusch_pdu_t pusch_pdu;
@@ -319,7 +291,7 @@ typedef struct {
/// codeword this transport block is mapped to
uint8_t codeword;
/// HARQ-ACKs
NR_UE_HARQ_STATUS_t harq_ack;
uint8_t ack;
/// PTRS Frequency Density
uint8_t PTRSFreqDensity;
/// PTRS Time Density
openair1/PHY/NR_UE_TRANSPORT/nr_ue_rf_helpers.c
+35 -14
View File
@@ -48,11 +48,9 @@ void nr_get_carrier_frequencies(NR_DL_FRAME_PARMS *fp, uint64_t *dl_carrier, uin
}
void nr_rf_card_config(openair0_config_t *openair0_cfg,
double rx_gain_offset,
uint64_t ul_carrier,
uint64_t dl_carrier,
int freq_offset){
void nr_rf_card_config_gain(openair0_config_t *openair0_cfg,
double rx_gain_off){
uint8_t mod_id = 0;
uint8_t cc_id = 0;
@@ -61,6 +59,36 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg,
double rx_gain = ue->rx_total_gain_dB;
double tx_gain = ue->tx_total_gain_dB;
for (int i = rf_chain; i < rf_chain + 4; i++) {
if (tx_gain)
openair0_cfg->tx_gain[i] = tx_gain;
if (rx_gain)
openair0_cfg->rx_gain[i] = rx_gain - rx_gain_off;
openair0_cfg->autocal[i] = 1;
if (i < openair0_cfg->rx_num_channels) {
LOG_I(PHY, "HW: Configuring channel %d (rf_chain %d): setting tx_gain %f, rx_gain %f\n",
i,
rf_chain,
openair0_cfg->tx_gain[i],
openair0_cfg->rx_gain[i]);
}
}
}
void nr_rf_card_config_freq(openair0_config_t *openair0_cfg,
uint64_t ul_carrier,
uint64_t dl_carrier,
int freq_offset){
uint8_t mod_id = 0;
uint8_t cc_id = 0;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[mod_id][cc_id];
int rf_chain = ue->rf_map.chain;
for (int i = rf_chain; i < rf_chain + 4; i++) {
if (i < openair0_cfg->rx_num_channels)
@@ -73,22 +101,15 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg,
else
openair0_cfg->tx_freq[i] = 0.0;
if (tx_gain)
openair0_cfg->tx_gain[i] = tx_gain;
if (rx_gain)
openair0_cfg->rx_gain[i] = rx_gain - rx_gain_offset;
openair0_cfg->autocal[i] = 1;
if (i < openair0_cfg->rx_num_channels) {
LOG_I(PHY, "HW: Configuring channel %d (rf_chain %d): setting tx_gain %f, rx_gain %f, tx_freq %f Hz, rx_freq %f Hz\n",
LOG_I(PHY, "HW: Configuring channel %d (rf_chain %d): setting tx_freq %f Hz, rx_freq %f Hz\n",
i,
rf_chain,
openair0_cfg->tx_gain[i],
openair0_cfg->rx_gain[i],
openair0_cfg->tx_freq[i],
openair0_cfg->rx_freq[i]);
}
}
}
}
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+10 -9
View File
@@ -252,14 +252,15 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t u = 0, v = 0;
int16_t *dmrs_seq = NULL;
if (pusch_pdu->transform_precoding == transform_precoder_enabled) {
// if transform precoding is enbaled (value 0)
if (pusch_pdu->transform_precoding == 0) {
uint32_t nb_re_pusch=nb_rb * NR_NB_SC_PER_RB;
uint32_t y_offset = 0;
uint16_t num_dmrs_res_per_symbol = nb_rb*(NR_NB_SC_PER_RB/2);
// Calculate index to dmrs seq array based on number of DMRS Subcarriers on this symbol
index = get_index_for_dmrs_lowpapr_seq(num_dmrs_res_per_symbol);
index = get_index_for_dmrs_lowpapr_seq(num_dmrs_res_per_symbol);
u = pusch_pdu->dfts_ofdm.low_papr_group_number;
v = pusch_pdu->dfts_ofdm.low_papr_sequence_number;
dmrs_seq = dmrs_lowpaprtype1_ul_ref_sig[u][v][index];
@@ -297,7 +298,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
printf("NR_ULSCH_UE: numSym: %d, num_dmrs_sym: %d", number_of_symbols,number_dmrs_symbols);
for (int ll = 0; ll < (number_of_symbols-number_dmrs_symbols); ll++) {
for (int ll = 0; ll < (number_of_symbols-number_dmrs_symbols); ll++) {
nr_idft(&debug_symbols[offset], nb_re_pusch);
@@ -353,8 +354,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if ((ul_dmrs_symb_pos >> l) & 0x01) {
is_dmrs_sym = 1;
if (pusch_pdu->transform_precoding == transform_precoder_disabled){
// transform precoding disabled (value 1)
if (pusch_pdu->transform_precoding == 1){
if (dmrs_type == pusch_dmrs_type1)
dmrs_idx = (pusch_pdu->bwp_start + start_rb)*6;
@@ -371,9 +372,9 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
} else if (pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
} else if (pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
AssertFatal(pusch_pdu->transform_precoding == transform_precoder_disabled, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
AssertFatal(pusch_pdu->transform_precoding == 1, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1;
@@ -404,8 +405,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
if (is_dmrs == 1) {
if (pusch_pdu->transform_precoding == transform_precoder_enabled) {
// if transform precoding is enabled
if (pusch_pdu->transform_precoding == 0) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15;
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
+94 -88
View File
@@ -54,16 +54,10 @@
void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_slot_tx,
uint8_t m0,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t secondHopPRB) {
fapi_nr_ul_config_pucch_pdu *pucch_pdu) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] start function at slot(nr_slot_tx)=%d\n",nr_slot_tx);
#endif
@@ -97,21 +91,31 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
uint8_t u[2]={0,0},v[2]={0,0};
LOG_D(PHY,"pucch0: nr_symbols %d, start_symbol %d, prb_start %d, second_hop_prb %d, group_hop_flag %d, sequence_hop_flag %d, mcs %d\n",pucch_pdu->nr_of_symbols,pucch_pdu->start_symbol_index,pucch_pdu->prb_start,pucch_pdu->second_hop_prb,pucch_pdu->group_hop_flag,pucch_pdu->sequence_hop_flag,pucch_pdu->mcs);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] sequence generation: variable initialization for test\n");
#endif
// x_n contains the sequence r_u_v_alpha_delta(n)
int16_t x_n_re[2][24],x_n_im[2][24];
uint16_t startingPRB = pucch_pdu->prb_start + pucch_pdu->bwp_start;
pucch_GroupHopping_t pucch_GroupHopping = pucch_pdu->group_hop_flag + (pucch_pdu->sequence_hop_flag<<1);
// we proceed to calculate alpha according to TS 38.211 Subclause 6.3.2.2.2
int prb_offset[2]={startingPRB,startingPRB};
nr_group_sequence_hopping(pucch_GroupHopping,hoppingId,0,nr_slot_tx,&u[0],&v[0]); // calculating u and v value
if (startingPRB!=secondHopPRB) {
nr_group_sequence_hopping(pucch_GroupHopping,hoppingId,1,nr_slot_tx,&u[1],&v[1]); // calculating u and v value
prb_offset[1] = secondHopPRB;
nr_group_sequence_hopping(pucch_GroupHopping,pucch_pdu->hopping_id,0,nr_slot_tx,&u[0],&v[0]); // calculating u and v value
if (pucch_pdu->freq_hop_flag == 1) {
nr_group_sequence_hopping(pucch_GroupHopping,pucch_pdu->hopping_id,1,nr_slot_tx,&u[1],&v[1]); // calculating u and v value
prb_offset[1] = pucch_pdu->second_hop_prb;
}
for (int l=0; l<nrofSymbols; l++) {
alpha = nr_cyclic_shift_hopping(hoppingId,m0,mcs,l,startingSymbolIndex,nr_slot_tx);
for (int l=0; l<pucch_pdu->nr_of_symbols; l++) {
alpha = nr_cyclic_shift_hopping(pucch_pdu->hopping_id,
pucch_pdu->initial_cyclic_shift,
pucch_pdu->mcs,l,
pucch_pdu->start_symbol_index,
nr_slot_tx);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u[l],v[l],alpha,l);
#endif
@@ -135,8 +139,8 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
uint32_t re_offset=0;
uint8_t l2;
for (int l=0; l<nrofSymbols; l++) {
l2=l+startingSymbolIndex;
for (int l=0; l<pucch_pdu->nr_of_symbols; l++) {
l2=l+pucch_pdu->start_symbol_index;
re_offset = (12*prb_offset[l]) + frame_parms->first_carrier_offset;
if (re_offset>= frame_parms->ofdm_symbol_size)
re_offset-=frame_parms->ofdm_symbol_size;
@@ -168,20 +172,20 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit) {
fapi_nr_ul_config_pucch_pdu *pucch_pdu) {
uint16_t m0 = pucch_pdu->initial_cyclic_shift;
uint64_t payload = pucch_pdu->payload;
uint8_t startingSymbolIndex = pucch_pdu->start_symbol_index;
uint8_t nrofSymbols = pucch_pdu->nr_of_symbols;
uint16_t startingPRB = pucch_pdu->prb_start + pucch_pdu->bwp_start;
uint8_t timeDomainOCC = pucch_pdu->time_domain_occ_idx;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] start function at slot(nr_slot_tx)=%d payload=%lu m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d startingPRB_intraSlotHopping=%d timeDomainOCC=%d nr_bit=%d\n",
nr_slot_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
printf("\t [nr_generate_pucch1] start function at slot(nr_slot_tx)=%d payload=%lu m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d second_hop_prb=%d timeDomainOCC=%d nr_bit=%d\n",
nr_slot_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,pucch_pdu->second_hop_prb,timeDomainOCC,pucch_pdu->n_bit);
#endif
/*
* Implement TS 38.211 Subclause 6.3.2.4.1 Sequence modulation
@@ -190,12 +194,12 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
// complex-valued symbol d_re, d_im containing complex-valued symbol d(0):
int16_t d_re=0, d_im=0;
if (nr_bit == 1) { // using BPSK if M_bit=1 according to TC 38.211 Subclause 5.1.2
if (pucch_pdu->n_bit == 1) { // using BPSK if M_bit=1 according to TC 38.211 Subclause 5.1.2
d_re = (payload&1)==0 ? (int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15) : -(int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15);
d_im = (payload&1)==0 ? (int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15) : -(int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15);
}
if (nr_bit == 2) { // using QPSK if M_bit=2 according to TC 38.211 Subclause 5.1.2
if (pucch_pdu->n_bit == 2) { // using QPSK if M_bit=2 according to TC 38.211 Subclause 5.1.2
if (((payload&1)==0) && (((payload>>1)&1)==0)) {
d_re = (int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15); // 32767/sqrt(2) = 23170 (ONE_OVER_SQRT2)
d_im = (int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15);
@@ -256,7 +260,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
//uint8_t PUCCH_Frequency_Hopping = 0 ; // from higher layers
uint8_t intraSlotFrequencyHopping = 0;
if (startingPRB != startingPRB_intraSlotHopping) {
if (pucch_pdu->freq_hop_flag) {
intraSlotFrequencyHopping=1;
}
@@ -287,8 +291,9 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_slot_tx=%d\n",
n_hop,nr_slot_tx);
#endif
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,lprime,nr_slot_tx);
pucch_GroupHopping_t pucch_GroupHopping = pucch_pdu->group_hop_flag + (pucch_pdu->sequence_hop_flag<<1);
nr_group_sequence_hopping(pucch_GroupHopping,pucch_pdu->hopping_id,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(pucch_pdu->hopping_id,m0,mcs,l,lprime,nr_slot_tx);
for (int n=0; n<12; n++) {
r_u_v_alpha_delta_re[n] = (int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15)
@@ -441,7 +446,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
}
if ((intraSlotFrequencyHopping == 1) && (l<floor(nrofSymbols/2))) { // intra-slot hopping enabled, we need to calculate new offset PRB
startingPRB = startingPRB + startingPRB_intraSlotHopping;
startingPRB = startingPRB + pucch_pdu->second_hop_prb;
}
if ((startingPRB < (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is lower band
@@ -834,7 +839,7 @@ inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,
c = (uint8_t)((s>>i)&1);
btildep[i] = (((B>>i)&1) ^ c);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t\t btilde[%d]=%lx from unscrambled bit %d and scrambling %d (%x)\n",i+(iprime<<5),btilde[i],((B>>i)&1),c,s>>i);
printf("\t\t\t btilde[%d]=%x from unscrambled bit %d and scrambling %d (%x)\n",i+(iprime<<5),btilde[i],((B>>i)&1),c,s>>i);
#endif
}
M_bit3-=32;
@@ -848,7 +853,7 @@ inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,
}
void nr_uci_encoding(uint64_t payload,
uint8_t nr_bit,
pucch_format_nr_t fmt,
int fmt,
uint8_t is_pi_over_2_bpsk_enabled,
uint8_t nrofSymbols,
uint8_t nrofPRB,
@@ -868,9 +873,9 @@ void nr_uci_encoding(uint64_t payload,
// E is the rate matching output sequence length as given in TS 38.212 subclause 6.3.1.4.1
uint16_t E=0,E_init;
if (fmt == pucch_format2_nr) E = 16*nrofSymbols*nrofPRB;
if (fmt == 2) E = 16*nrofSymbols*nrofPRB;
if (fmt == pucch_format3_nr) {
if (fmt == 3) {
E_init = (is_pi_over_2_bpsk_enabled == 0) ? 24:12;
if (nrofSymbols == 4) {
@@ -895,7 +900,7 @@ void nr_uci_encoding(uint64_t payload,
}
}
if (fmt == pucch_format4_nr) {
if (fmt == 4) {
E_init = (is_pi_over_2_bpsk_enabled == 0) ? 24:12;
if (nrofSymbols == 4) {
@@ -953,28 +958,24 @@ void nr_uci_encoding(uint64_t payload,
}
//#if 0
void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint16_t crnti,
uint32_t dmrs_scrambling_id,
uint32_t data_scrambling_id,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit) {
fapi_nr_ul_config_pucch_pdu *pucch_pdu) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch2] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n",nr_slot_tx, payload, nr_bit);
printf("\t [nr_generate_pucch2] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n",nr_slot_tx, pucch_pdu->payload, pucch_pdu->n_bit);
#endif
// b is the block of bits transmitted on the physical channel after payload coding
uint64_t b[16]; // limit to 1024-bit encoded length
// M_bit is the number of bits of block b (payload after encoding)
uint16_t M_bit;
nr_uci_encoding(payload,nr_bit,pucch_format2_nr,0,nrofSymbols,nrofPRB,1,0,0,&b[0],&M_bit);
nr_uci_encoding(pucch_pdu->payload,
pucch_pdu->n_bit,
2,0,
pucch_pdu->nr_of_symbols,
pucch_pdu->prb_size,
1,0,0,&b[0],&M_bit);
/*
* Implementing TS 38.211
* Subclauses 6.3.2.5.1 Scrambling (PUCCH format 2)
@@ -989,14 +990,14 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
*/
uint8_t *btilde = malloc(sizeof(int8_t)*M_bit);
// rnti is given by the C-RNTI
uint16_t rnti=crnti;
uint16_t rnti=pucch_pdu->rnti;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch2] rnti = %d ,\n",rnti);
#endif
/*
* Implementing TS 38.211 Subclause 6.3.2.5.1 scrambling format 2
*/
nr_pucch2_3_4_scrambling(M_bit,rnti,data_scrambling_id,&b[0],btilde);
nr_pucch2_3_4_scrambling(M_bit,rnti,pucch_pdu->data_scrambling_id,&b[0],btilde);
/*
* Implementing TS 38.211 Subclause 6.3.2.5.2 modulation format 2
* btilde shall be modulated as described in subclause 5.1 using QPSK
@@ -1042,9 +1043,12 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint32_t x1, x2, s=0;
int i=0;
int m=0;
uint8_t startingSymbolIndex = pucch_pdu->start_symbol_index;
uint16_t startingPRB = pucch_pdu->prb_start + pucch_pdu->bwp_start;
for (int l=0; l<nrofSymbols; l++) {
x2 = (((1<<17)*((14*nr_slot_tx) + (l+startingSymbolIndex) + 1)*((2*dmrs_scrambling_id) + 1)) + (2*dmrs_scrambling_id))%(1U<<31); // c_init calculation according to TS38.211 subclause
for (int l=0; l<pucch_pdu->nr_of_symbols; l++) {
// c_init calculation according to TS38.211 subclause
x2 = (((1<<17)*((14*nr_slot_tx) + (l+startingSymbolIndex) + 1)*((2*pucch_pdu->dmrs_scrambling_id) + 1)) + (2*pucch_pdu->dmrs_scrambling_id))%(1U<<31);
int reset = 1;
for (int ii=0; ii<=(startingPRB>>2); ii++) {
@@ -1052,7 +1056,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
reset = 0;
}
m = 0;
for (int rb=0; rb<nrofPRB; rb++) {
for (int rb=0; rb<pucch_pdu->prb_size; rb++) {
//startingPRB = startingPRB + rb;
if (((rb+startingPRB) < (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is lower band
re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*(rb+startingPRB)) + frame_parms->first_carrier_offset;
@@ -1124,52 +1128,53 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
}
//#if 0
void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint16_t crnti,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4) {
fapi_nr_ul_config_pucch_pdu *pucch_pdu) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch3_4] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n", nr_slot_tx, payload, nr_bit);
printf("\t [nr_generate_pucch3_4] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n", nr_slot_tx, pucch_pdu->payload, pucch_pdu->n_bit);
#endif
// b is the block of bits transmitted on the physical channel after payload coding
uint64_t b[16];
// M_bit is the number of bits of block b (payload after encoding)
uint16_t M_bit;
// parameter PUCCH-F4-preDFT-OCC-length set of {2,4} -> to use table -1 or -2
uint8_t n_SF_PUCCH_s = 2; // in format 4, n_SF_PUCCH_s = {2,4}, provided by higher layer parameter PUCCH-F4-preDFT-OCC-length (in format 3 n_SF_PUCCH_s=1), FIXME!!!
uint8_t is_pi_over_2_bpsk_enabled = 0; // this value has to be provided by higher layers parameter
// in format 4, n_SF_PUCCH_s = {2,4}, provided by higher layer parameter PUCCH-F4-preDFT-OCC-length (in format 3 n_SF_PUCCH_s=1)
uint8_t n_SF_PUCCH_s;
if (pucch_pdu->format_type == 3)
n_SF_PUCCH_s = 1;
else
n_SF_PUCCH_s = pucch_pdu->pre_dft_occ_len;
uint8_t is_pi_over_2_bpsk_enabled = pucch_pdu->pi_2bpsk;
// Intra-slot frequency hopping shall be assumed when the higher-layer parameter intraSlotFrequencyHopping is provided,
// regardless of whether the frequency-hop distance is zero or not,
// otherwise no intra-slot frequency hopping shall be assumed
//uint8_t PUCCH_Frequency_Hopping = 0 ; // from higher layers
uint8_t intraSlotFrequencyHopping = 0;
if (startingPRB != startingPRB_intraSlotHopping) {
if (pucch_pdu->freq_hop_flag) {
intraSlotFrequencyHopping=1;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch3_4] intraSlotFrequencyHopping=%d \n",intraSlotFrequencyHopping);
#endif
}
// add_dmrs indicates if we are using or not Additional DM-RS for formats 3 and 4. From higher layers. FIXME!!!
uint8_t add_dmrs = 0;
uint8_t nrofSymbols = pucch_pdu->nr_of_symbols;
uint16_t nrofPRB = pucch_pdu->prb_size;
uint16_t startingPRB = pucch_pdu->prb_start + pucch_pdu->bwp_start;
uint8_t add_dmrs = pucch_pdu->add_dmrs_flag;
//nrofPRB = 2; // only for test purposes
if (fmt == pucch_format4_nr) nrofPRB = 1;
nr_uci_encoding(payload,nr_bit,fmt,is_pi_over_2_bpsk_enabled,nrofSymbols,nrofPRB,n_SF_PUCCH_s,intraSlotFrequencyHopping,add_dmrs,&b[0],&M_bit);
nr_uci_encoding(pucch_pdu->payload,
pucch_pdu->n_bit,
pucch_pdu->format_type,
is_pi_over_2_bpsk_enabled,
nrofSymbols,nrofPRB,
n_SF_PUCCH_s,
intraSlotFrequencyHopping,
add_dmrs,
&b[0],&M_bit);
/*
* Implementing TS 38.211
* Subclauses 6.3.2.6.1 Scrambling (PUCCH formats 3 and 4)
@@ -1184,7 +1189,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
*/
uint8_t *btilde = malloc(sizeof(int8_t)*M_bit);
// rnti is given by the C-RNTI
uint16_t rnti=crnti, n_id=0;
uint16_t rnti=pucch_pdu->rnti, n_id=0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch3_4] rnti = %d ,\n",rnti);
#endif
@@ -1300,12 +1305,11 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 1, 1, 1, 0, 0, 0,-1,-1,-1}
};
//uint8_t occ_Length = occ_length_format4; // higher layer parameter occ-Length
uint8_t occ_Index = occ_index_format4; // higher layer parameter occ-Index
uint8_t occ_Index = pucch_pdu->pre_dft_occ_idx; // higher layer parameter occ-Index
//occ_Index = 1; //only for testing purposes; to be removed FIXME!!!
if (fmt == pucch_format3_nr) { // no block-wise spreading for format 3
n_SF_PUCCH_s = 1;
if (pucch_pdu->format_type == 3) { // no block-wise spreading for format 3
for (int l=0; l < floor(m_symbol/(12*nrofPRB)); l++) {
for (int k=0; k < (12*nrofPRB); k++) {
@@ -1319,7 +1323,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
}
}
if (fmt == pucch_format4_nr) {
if (pucch_pdu->format_type == 4) {
nrofPRB = 1;
for (int l=0; l < floor((n_SF_PUCCH_s*m_symbol)/(12*nrofPRB)); l++) {
@@ -1414,9 +1418,9 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint8_t m0;
uint8_t mcs=0;
if (fmt == pucch_format3_nr) m0 = 0;
if (pucch_pdu->format_type == 3) m0 = 0;
if (fmt == pucch_format4_nr) {
if (pucch_pdu->format_type == 4) {
if (n_SF_PUCCH_s == 2) {
m0 = (occ_Index == 0) ? 0 : 6;
}
@@ -1456,7 +1460,8 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
for (int l=0; l<nrofSymbols; l++) {
if ((intraSlotFrequencyHopping == 1) && (l >= (int)floor(nrofSymbols/2))) n_hop = 1; // n_hop = 1 for second hop
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
pucch_GroupHopping_t pucch_GroupHopping = pucch_pdu->group_hop_flag + (pucch_pdu->sequence_hop_flag<<1);
nr_group_sequence_hopping(pucch_GroupHopping,pucch_pdu->hopping_id,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
// Next we proceed to calculate base sequence for DM-RS signal, according to TS 38.211 subclause 6.4.1.33
if (nrofPRB >= 3) { // TS 38.211 subclause 5.2.2.1 (Base sequences of length 36 or larger) applies
@@ -1501,12 +1506,13 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
}
}
uint8_t startingSymbolIndex = pucch_pdu->start_symbol_index;
uint16_t j=0;
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,startingSymbolIndex,nr_slot_tx);
alpha = nr_cyclic_shift_hopping(pucch_pdu->hopping_id,m0,mcs,l,startingSymbolIndex,nr_slot_tx);
for (int rb=0; rb<nrofPRB; rb++) {
if ((intraSlotFrequencyHopping == 1) && (l<floor(nrofSymbols/2))) { // intra-slot hopping enabled, we need to calculate new offset PRB
startingPRB = startingPRB + startingPRB_intraSlotHopping;
startingPRB = startingPRB + pucch_pdu->second_hop_prb;
}
//startingPRB = startingPRB + rb;
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h
+4 -39
View File
@@ -49,65 +49,30 @@
void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_slot_tx,
uint8_t m0,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t secondHopPRB);
fapi_nr_ul_config_pucch_pdu *pucch_pdu);
void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit);
fapi_nr_ul_config_pucch_pdu *pucch_pdu);
void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint16_t crnti,
uint32_t dmrs_scrambling_id,
uint32_t data_scrambling_id,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit);
fapi_nr_ul_config_pucch_pdu *pucch_pdu);
void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint16_t crnti,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4);
fapi_nr_ul_config_pucch_pdu *pucch_pdu);
// tables for mcs values for different payloads
static const uint8_t table1_mcs[]={0,6,3,9};
openair1/PHY/TOOLS/nr_phy_scope.c
+1 -1
View File
@@ -894,7 +894,7 @@ void phy_scope_nrUE(OAI_phy_scope_t *form,
static void *nrUEscopeThread(void *arg) {
PHY_VARS_NR_UE *ue=(PHY_VARS_NR_UE *)arg;
size_t stksize;
pthread_attr_t atr;
pthread_attr_t atr={0};
pthread_attr_getstacksize(&atr, &stksize);
pthread_attr_setstacksize(&atr,32*1024*1024 );
int fl_argc=1;
openair1/PHY/defs_nr_UE.h
+7 -7
View File
@@ -235,6 +235,11 @@ typedef struct {
int32_t *txdataF_layers[NR_MAX_NB_LAYERS];
} NR_UE_PUSCH;
typedef struct {
bool active[2];
fapi_nr_ul_config_pucch_pdu pucch_pdu[2];
} NR_UE_PUCCH;
typedef struct {
/// \brief Holds the transmit data in time domain.
/// For IFFT_FPGA this points to the same memory as PHY_vars->tx_vars[a].TX_DMA_BUFFER.
@@ -761,8 +766,6 @@ typedef struct {
int UE_fo_compensation;
/// \brief Indicator that UE is synchronized to a gNB
int is_synchronized;
/// \brief Indicates on which frame is synchronized in a two frame synchronization
int is_synchronized_on_frame;
/// \brief Indicator that UE lost frame synchronization
int lost_sync;
/// Data structure for UE process scheduling
@@ -810,6 +813,7 @@ typedef struct {
NR_UE_PDCCH *pdcch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PRACH *prach_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUSCH *pusch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUCCH *pucch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two RxTx Threads
NR_UE_ULSCH_t *ulsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two code words
NR_UE_DLSCH_t *dlsch_SI[NUMBER_OF_CONNECTED_gNB_MAX];
@@ -957,15 +961,10 @@ typedef struct {
/// PUSCH contention-based access vars
PUSCH_CA_CONFIG_DEDICATED pusch_ca_config_dedicated[NUMBER_OF_eNB_MAX]; // lola
/// PUCCH variables
PUCCH_CONFIG_DEDICATED pucch_config_dedicated[NUMBER_OF_CONNECTED_gNB_MAX];
//#if defined(UPGRADE_RAT_NR)
#if 1
SystemInformationBlockType1_nr_t systemInformationBlockType1_nr;
PUCCH_ConfigCommon_nr_t pucch_config_common_nr[NUMBER_OF_CONNECTED_gNB_MAX];
PUCCH_Config_t pucch_config_dedicated_nr[NUMBER_OF_CONNECTED_gNB_MAX];
#endif
uint8_t ncs_cell[20][7];
@@ -1068,6 +1067,7 @@ typedef struct {
typedef struct nr_rxtx_thread_data_s {
UE_nr_rxtx_proc_t proc;
PHY_VARS_NR_UE *UE;
NR_UE_SCHED_MODE_t ue_sched_mode;
notifiedFIFO_t txFifo;
} nr_rxtx_thread_data_t;
openair1/PHY/impl_defs_nr.h
+2 -14
View File
@@ -427,23 +427,10 @@ typedef struct {
*
************************************************************************/
#define MAX_NR_OF_PUCCH_P0_PER_SET (8)
#define NUMBER_PUCCH_FORMAT_NR (5)
typedef int8_t power_level_t; /* INTEGER (-16..15) */
typedef struct {
uint8_t p0_PUCCH_Id; /* INTEGER (1..8) */
power_level_t p0_PUCCH_Value;
} P0_PUCCH_t;
typedef struct {
power_level_t deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR];
P0_PUCCH_t *p0_Set[MAX_NR_OF_PUCCH_P0_PER_SET];
// pathlossReferenceRSs SEQUENCE (SIZE (1..maxNrofPUCCH-PathlossReferenceRSs)) OF PUCCH-PathlossReferenceRS OPTIONAL, -- Need M
int8_t twoPUCCH_PC_AdjustmentStates;
} PUCCH_PowerControl_t;
/***********************************************************************
*
@@ -633,9 +620,10 @@ typedef struct {
PUCCH_FormatConfig_t *formatConfig[NUMBER_PUCCH_FORMAT_NR-1]; /* format 0 is not there */
uint8_t dl_DataToUL_ACK[NB_DL_DATA_TO_UL_ACK]; /* table TS 38.213 Table 9.2.3-1: Mapping of PSDCH-to-HARQ_feedback timing indicator field values to numbers of slots */
void *spatial_Relation_Info[MAX_NR_OF_SPATIAL_RELATION_INFOS];
PUCCH_PowerControl_t pucch_PowerControl;
} PUCCH_Config_t;
/***********************************************************************
*
* FUNCTIONALITY : Scheduling Request Configuration (SR)
openair1/PHY/types.h
+1 -1
View File
@@ -23,6 +23,6 @@
#define __openair_TYPES_H__
#include <stdint.h>
#define MAKE_VERSION(a,b,c) ((a)*256+(b)*16+c)
#endif /*__openair_TYPES_H__ */
openair1/SCHED/fapi_l1.h
+5 -1
View File
@@ -61,6 +61,8 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,
nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint16_t frame,uint8_t subframe,uint8_t srs_present);
void handle_nfapi_hi_dci0_dci_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_proc_t *proc,
nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu);
void handle_ulsch_harq_pdu(
PHY_VARS_eNB *eNB,
int UE_id,
@@ -68,7 +70,9 @@ void handle_ulsch_harq_pdu(
nfapi_ul_config_ulsch_harq_information *harq_information,
uint16_t frame,
uint8_t subframe);
void handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t *sdu) ;
void handle_ulsch_cqi_ri_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_pdu_t *ul_config_pdu,uint16_t frame,uint8_t subframe);
void handle_uci_harq_information(PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci,nfapi_ul_config_harq_information *harq_information);
openair1/SCHED/nfapi_lte_dummy.c
+4
View File
@@ -17,6 +17,10 @@ void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu){
}
void handle_nfapi_nr_csirs_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
nfapi_nr_dl_tti_csi_rs_pdu *csirs_pdu){
}
int l1_north_init_gNB(void){return 0;}
uint8_t slot_ahead=6;
openair1/SCHED/nfapi_nr_dummy.c
+4
View File
@@ -17,6 +17,10 @@ void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
uint8_t *sdu){
}
void handle_nfapi_nr_csirs_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
nfapi_nr_dl_tti_csi_rs_pdu *csirs_pdu){
}
int l1_north_init_gNB(void){return 0;}
uint8_t slot_ahead=6;
openair1/SCHED_NR/fapi_nr_l1.c
+60 -80
View File
@@ -181,75 +181,64 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
uint8_t number_dl_pdu = (DL_req==NULL) ? 0 : DL_req->dl_tti_request_body.nPDUs;
uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus;
uint8_t number_ul_tti_pdu = (UL_tti_req==NULL) ? 0 : UL_tti_req->n_pdus;
uint8_t number_tx_data_pdu = (TX_req == NULL) ? 0 : TX_req->Number_of_PDUs;
if (DL_req != NULL && TX_req!=NULL)
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d/%d DL_req:SFN/SLO:%04d/%d:dl_pdu:%d tx_req:SFN/SLOT:%04d/%d:pdus:%d;ul_dci %d ul_tti %d\n",
frame,slot,
DL_req->SFN,DL_req->Slot,number_dl_pdu,
TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs,
number_ul_dci_pdu,number_ul_tti_pdu);
if (NFAPI_MODE == NFAPI_MONOLITHIC){
if (DL_req != NULL && TX_req!=NULL)
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d/%d DL_req:SFN/SLO:%04d/%d:dl_pdu:%d tx_req:SFN/SLOT:%04d/%d:pdus:%d;ul_dci %d ul_tti %d\n",
frame,slot,
DL_req->SFN,DL_req->Slot,number_dl_pdu,
TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs,
number_ul_dci_pdu,number_ul_tti_pdu);
int pdcch_received=0;
gNB->num_pdsch_rnti[slot]=0;
for (int i=0; i<gNB->number_of_nr_dlsch_max; i++) {
gNB->dlsch[i][0]->rnti=0;
gNB->dlsch[i][0]->harq_mask=0;
}
int pdcch_received=0;
gNB->num_pdsch_rnti[slot]=0;
for (int i=0; i<gNB->number_of_nr_dlsch_max; i++) {
gNB->dlsch[i][0]->rnti=0;
gNB->dlsch[i][0]->harq_mask=0;
}
for (int i=0;i<number_dl_pdu;i++) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_tti_pdu->PDUType);
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
for (int i=0;i<number_dl_pdu;i++) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_tti_pdu->PDUType);
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
handle_nr_nfapi_ssb_pdu(gNB,frame,slot,
dl_tti_pdu);
break;
if(NFAPI_MODE != NFAPI_MODE_VNF)
handle_nr_nfapi_ssb_pdu(gNB,frame,slot,
dl_tti_pdu);
case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
AssertFatal(pdcch_received == 0, "pdcch_received is not 0, we can only handle one PDCCH PDU per slot\n");
handle_nfapi_nr_pdcch_pdu(gNB,
frame, slot,
&dl_tti_pdu->pdcch_pdu);
pdcch_received = 1;
break;
break;
case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
handle_nfapi_nr_csirs_pdu(gNB,
frame, slot,
&dl_tti_pdu->csi_rs_pdu);
break;
case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
AssertFatal(pdcch_received == 0, "pdcch_received is not 0, we can only handle one PDCCH PDU per slot\n");
if(NFAPI_MODE != NFAPI_MODE_VNF){
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
handle_nfapi_nr_pdcch_pdu(gNB,
frame, slot,
&dl_tti_pdu->pdcch_pdu);
}
pdcch_received = 1;
break;
case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
handle_nfapi_nr_csirs_pdu(gNB,
frame, slot,
&dl_tti_pdu->csi_rs_pdu);
break;
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
{
LOG_I(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
pduIndex,TX_req->pdu_list[pduIndex].num_TLV);
uint8_t *sdu = (uint8_t *)TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
if(NFAPI_MODE != NFAPI_MODE_VNF){
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
handle_nr_nfapi_pdsch_pdu(gNB,frame,slot,&dl_tti_pdu->pdsch_pdu, sdu);
}
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
pduIndex,TX_req->pdu_list[pduIndex].num_TLV);
uint8_t *sdu = (uint8_t *)TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
handle_nr_nfapi_pdsch_pdu(gNB,frame,slot,&dl_tti_pdu->pdsch_pdu, sdu);
break;
}
}
}
// if (UL_tti_req!=NULL) memcpy(&gNB->UL_tti_req,UL_tti_req,sizeof(nfapi_nr_ul_tti_request_t));
if(NFAPI_MODE != NFAPI_MODE_VNF)
for (int i=0;i<number_ul_dci_pdu;i++) {
handle_nfapi_nr_ul_dci_pdu(gNB, frame, slot, &UL_dci_req->ul_dci_pdu_list[i]);
}
if(NFAPI_MODE != NFAPI_MODE_VNF)
for (int i = 0; i < number_ul_tti_pdu; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
@@ -268,31 +257,22 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
break;
}
}
if(NFAPI_MODE != NFAPI_MONOLITHIC && number_ul_tti_pdu>0)
{
oai_nfapi_ul_tti_req(UL_tti_req);
}
if (NFAPI_MODE != NFAPI_MONOLITHIC && Sched_INFO->UL_dci_req->numPdus!=0)
{
oai_nfapi_ul_dci_req(Sched_INFO->UL_dci_req);
if (NFAPI_MODE == NFAPI_MODE_VNF) { //If VNF, oai_nfapi functions send respective p7 msgs to PNF for which nPDUs is greater than 0
if(number_ul_tti_pdu>0)
oai_nfapi_ul_tti_req(UL_tti_req);
if (number_ul_dci_pdu>0)
oai_nfapi_ul_dci_req(UL_dci_req);
if (number_dl_pdu>0)
oai_nfapi_dl_tti_req(DL_req);
if (number_tx_data_pdu>0)
oai_nfapi_tx_data_req(TX_req);
}
if (NFAPI_MODE != NFAPI_MONOLITHIC)
{
if(Sched_INFO->DL_req->dl_tti_request_body.nPDUs>0)
{
Sched_INFO->DL_req->SFN = frame;
Sched_INFO->DL_req->Slot = slot;
printf("DL tti Frame = %d, slot = %d. \n",frame,slot);
oai_nfapi_dl_tti_req(Sched_INFO->DL_req);
}
if (Sched_INFO->TX_req->Number_of_PDUs > 0)
{
oai_nfapi_tx_data_req(Sched_INFO->TX_req);
}
}
}
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+12 -12
View File
@@ -147,14 +147,14 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,1);
if (NFAPI_MODE == NFAPI_MONOLITHIC || NFAPI_MODE == NFAPI_MODE_PNF) {
for (int i=0; i<fp->Lmax; i++) {
if (gNB->ssb[i].active) {
nr_common_signal_procedures(gNB,frame,slot,gNB->ssb[i].ssb_pdu);
gNB->ssb[i].active = false;
}
for (int i=0; i<fp->Lmax; i++) {
if (gNB->ssb[i].active) {
nr_common_signal_procedures(gNB,frame,slot,gNB->ssb[i].ssb_pdu);
gNB->ssb[i].active = false;
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,0);
int pdcch_pdu_id=find_nr_pdcch(frame,slot,gNB,SEARCH_EXIST);
@@ -572,8 +572,8 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
if (NFAPI_MODE == NFAPI_MODE_PNF)
pucch->frame = frame_rx;
if ((pucch->active == 1) &&
(pucch->frame == frame_rx) &&
(pucch->slot == slot_rx) ) {
(pucch->frame == frame_rx) &&
(pucch->slot == slot_rx) ) {
pucch_decode_done = 1;
@@ -594,7 +594,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
LOG_D(PHY,"frame %d, slot %d: PUCCH signal energy %d\n",frame_rx,slot_rx,power_rxF);
nr_decode_pucch0(gNB,
frame_rx,
frame_rx,
slot_rx,
uci_pdu_format0,
pucch_pdu);
@@ -636,9 +636,9 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
(ulsch->rnti > 0)) {
// for for an active HARQ process
for (harq_pid=0;harq_pid<NR_MAX_ULSCH_HARQ_PROCESSES;harq_pid++) {
ulsch_harq = ulsch->harq_processes[harq_pid];
AssertFatal(ulsch_harq!=NULL,"harq_pid %d is not allocated\n",harq_pid);
if ((ulsch_harq->status == NR_ACTIVE) &&
ulsch_harq = ulsch->harq_processes[harq_pid];
AssertFatal(ulsch_harq!=NULL,"harq_pid %d is not allocated\n",harq_pid);
if ((ulsch_harq->status == NR_ACTIVE) &&
(ulsch_harq->frame == frame_rx) &&
(ulsch_harq->slot == slot_rx) &&
(ulsch_harq->handled == 0)){
openair1/SCHED_NR_UE/defs.h
+1
View File
@@ -417,6 +417,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus);
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+17 -55
View File
@@ -212,6 +212,7 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
bool found = false;
if(scheduled_response != NULL){
module_id_t module_id = scheduled_response->module_id;
@@ -224,7 +225,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
NR_UE_PUCCH *pucch_vars = PHY_vars_UE_g[module_id][cc_id]->pucch_vars[thread_id][0];
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
@@ -283,27 +284,19 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq->harq_ack.slot_for_feedback_ack = (slot+dlsch_config_pdu->pdsch_to_harq_feedback_time_ind)%frame_parms.slots_per_frame;
//get nrOfLayers from DCI info
uint8_t Nl = 0;
for (i = 0; i < 4; i++) {
if (dlsch_config_pdu->dmrs_ports[i] >= i) Nl += 1;
}
dlsch0_harq->Nl = Nl;
dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table;
dlsch0_harq->harq_ack.rx_status = downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch0->rnti_type);
dlsch0_harq->status = ACTIVE; //Gokul
downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch0->rnti_type);
if (dlsch0_harq->status != ACTIVE) {
// dlsch0_harq->status not ACTIVE may be due to false retransmission. Reset the
// following flag to skip PDSCH procedures in that case.
dlsch0->active = 0;
dlsch0_harq->harq_ack.ack = 1;
dlsch0_harq->harq_ack.send_harq_status = 1;
}
dlsch0_harq->harq_ack.vDAI_DL = dlsch_config_pdu->dai;
/* PTRS */
dlsch0_harq->PTRSFreqDensity = dlsch_config_pdu->PTRSFreqDensity;
dlsch0_harq->PTRSTimeDensity = dlsch_config_pdu->PTRSTimeDensity;
@@ -311,7 +304,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->nEpreRatioOfPDSCHToPTRS = dlsch_config_pdu->nEpreRatioOfPDSCHToPTRS;
dlsch0_harq->PTRSReOffset = dlsch_config_pdu->PTRSReOffset;
dlsch0_harq->pduBitmap = dlsch_config_pdu->pduBitmap;
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\tpdsch_to_harq_feedback_time_ind = %d\tslot_for_feedback_ack = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs, dlsch_config_pdu->pdsch_to_harq_feedback_time_ind, dlsch0_harq->harq_ack.slot_for_feedback_ack);
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs);
}
}
}
@@ -327,7 +320,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
AssertFatal(ul_config->ul_config_list[i].pdu_type <= FAPI_NR_UL_CONFIG_TYPES,"pdu_type %d out of bounds\n",ul_config->ul_config_list[i].pdu_type);
LOG_D(PHY, "In %s: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config);
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, pucch_resource_id, current_harq_pid, format, gNB_id = 0;
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, current_harq_pid, gNB_id = 0;
/* PRACH */
//NR_PRACH_RESOURCES_t *prach_resources;
fapi_nr_ul_config_prach_pdu *prach_config_pdu;
@@ -335,9 +328,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu;
/* PUCCH */
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu;
PUCCH_ConfigCommon_nr_t *pucch_config_common_nr;
PUCCH_Config_t *pucch_config_dedicated_nr;
PUCCH_format_t *format_params;
switch (pdu_type){
@@ -375,47 +365,19 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
break;
case (FAPI_NR_UL_CONFIG_TYPE_PUCCH):
// pucch config pdu
found = false;
pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
pucch_resource_id = 0; //FIXME!!!
format = 1; // FIXME!!!
pucch_config_common_nr = &PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
pucch_config_dedicated_nr = &PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
format_params = &pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->format_parameters;
format_params->initialCyclicShift = pucch_config_pdu->initialCyclicShift;
format_params->nrofSymbols = pucch_config_pdu->nrofSymbols;
format_params->startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
format_params->nrofPRBs = pucch_config_pdu->nrofPRBs;
format_params->timeDomainOCC = pucch_config_pdu->timeDomainOCC;
format_params->occ_length = pucch_config_pdu->occ_length;
format_params->occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated_nr->formatConfig[format - 1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated_nr->formatConfig[format - 1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common_nr->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common_nr->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common_nr->p0_nominal = pucch_config_pdu->p0_nominal;
/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
for(int j=0; j<2; j++) {
if(pucch_vars->active[j] == false) {
LOG_D(PHY,"%d.%d Copying pucch pdu to UE PHY\n",scheduled_response->frame,slot);
memcpy((void*)&(pucch_vars->pucch_pdu[j]), (void*)pucch_config_pdu, sizeof(fapi_nr_ul_config_pucch_pdu));
pucch_vars->active[j] = true;
found = true;
break;
}
}
if (!found)
LOG_E(PHY, "Couldn't find allocation for PUCCH PDU in PUCCH VARS\n");
break;
case (FAPI_NR_UL_CONFIG_TYPE_PRACH):
openair1/SCHED_NR_UE/harq_nr.c
+7 -143
View File
@@ -98,43 +98,6 @@
#define DL_DCI (1)
#define UL_DCI (0)
/*******************************************************************
*
* NAME : get_dci_info_for_harq
*
* PARAMETERS : pointer to ue context
* id of current gNB
* number of uplink processes
* maximum number of uplink retransmissions
* RETURN : none
*
* DESCRIPTION : update HARQ entity with information from DCI
* TS 38.212 7.3.1.2 DCI formats for scheduling PDSCH
*
*********************************************************************/
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t slot, uint8_t tx_offset)
{
if (nr_dci_info_extracted->identifier_dci_formats == DL_DCI) {
dlsch[0]->current_harq_pid = nr_dci_info_extracted->harq_process_number;
NR_DL_UE_HARQ_t *dl_harq = dlsch[0]->harq_processes[dlsch[0]->current_harq_pid];
dl_harq->harq_ack.vDAI_DL = nr_dci_info_extracted->dai+1;
dl_harq->harq_ack.pucch_resource_indicator = nr_dci_info_extracted->pucch_resource_ind;
dl_harq->harq_ack.slot_for_feedback_ack = (slot + nr_dci_info_extracted->pdsch_to_harq_feedback_time_ind)%ue->frame_parms.slots_per_subframe;
dl_harq->harq_ack.harq_id = nr_dci_info_extracted->harq_process_number;
dl_harq->harq_ack.rx_status = downlink_harq_process(dl_harq, dlsch[0]->current_harq_pid, nr_dci_info_extracted->ndi, dlsch[0]->rnti_type);
}
else if (nr_dci_info_extracted->identifier_dci_formats == UL_DCI) {
/* store harq id for which pusch should be transmitted at rx_slot + tx_offset */
set_tx_harq_id(ulsch, nr_dci_info_extracted->harq_process_number, (slot + tx_offset)%ue->frame_parms.slots_per_subframe);
ulsch->harq_processes[nr_dci_info_extracted->harq_process_number]->tx_status = uplink_harq_process(ulsch, nr_dci_info_extracted->harq_process_number, nr_dci_info_extracted->ndi, ulsch->rnti_type);
}
}
/*******************************************************************
*
@@ -345,96 +308,7 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq)
dl_harq->status = SCH_IDLE;
dl_harq->first_tx = 1;
dl_harq->round = 0;
dl_harq->harq_ack.ack = DL_ACKNACK_NO_SET;
dl_harq->harq_ack.send_harq_status = 0;
dl_harq->harq_ack.vDAI_UL = UL_DAI_NO_SET;
dl_harq->harq_ack.vDAI_DL = DL_DAI_NO_SET;
dl_harq->harq_ack.slot_for_feedback_ack = NR_MAX_SLOTS_PER_FRAME;
dl_harq->harq_ack.pucch_resource_indicator = MAX_PUCCH_RESOURCE_INDICATOR;
dl_harq->harq_ack.n_CCE = 0;
dl_harq->harq_ack.N_CCE = 0;;
}
/*******************************************************************
*
* NAME : config_downlink_harq_process
*
* PARAMETERS : pointer to ue context
* id of current gNB
* number of downlink processes
*
* RETURN : none
*
* DESCRIPTION : configuration of downlink HARQ entity
*
*********************************************************************/
void config_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number, uint8_t number_harq_processes_for_pdsch)
{
NR_UE_DLSCH_t *dlsch;
dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
if (dlsch != NULL) {
memset(dlsch,0,sizeof(NR_UE_DLSCH_t));
ue->dlsch[execution_thread_number][gNB_id][TB_id] = dlsch;
}
else {
LOG_E(PHY, "Fatal memory allocation problem at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}
dlsch->Mdlharq = number_harq_processes_for_pdsch; /* an additional HARQ is reserved for PBCCH */
dlsch->number_harq_processes_for_pdsch = number_harq_processes_for_pdsch;
/* allocation of HARQ process context */
for (int harq_pid = 0; harq_pid < number_harq_processes_for_pdsch; harq_pid++) {
//dlsch->harq_processes[harq_pid] = (NR_DL_UE_HARQ_t *)malloc16(sizeof(NR_DL_UE_HARQ_t));
/*if (dlsch->harq_processes[harq_pid] == NULL) {
LOG_E(PHY, "Fatal memory allocation problem at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}*/
memset(&dlsch->harq_processes[harq_pid],0,sizeof(NR_DL_UE_HARQ_t));
NR_DL_UE_HARQ_t *dl_harq = dlsch->harq_processes[harq_pid];
init_downlink_harq_status(dl_harq);
}
}
/*******************************************************************
*
* NAME : release_downlink_harq_process
*
* PARAMETERS : pointer to ue context
* id of current gNB
* TB_id transport block identity 0 or 1
* execution_thread_number thread number for current downlink processing
* RETURN : none
*
* DESCRIPTION : release of HARQ downlink entity
*
*********************************************************************/
void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number)
{
NR_UE_DLSCH_t *dlsch = ue->dlsch[execution_thread_number][gNB_id][TB_id];
/*for (int process_id = 0; process_id < dlsch->Mdlharq; process_id++) {
free16(dlsch->harq_processes[process_id],sizeof(NR_DL_UE_HARQ_t));
dlsch->harq_processes[process_id] = NULL;
}*/
free16(dlsch,sizeof(NR_UE_DLSCH_t));
ue->dlsch[execution_thread_number][gNB_id][TB_id] = NULL;
dl_harq->ack = DL_ACKNACK_NO_SET;
}
/*******************************************************************
@@ -454,18 +328,15 @@ void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, in
*
*********************************************************************/
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ndi, uint8_t rnti_type)
{
harq_result_t result_harq = RETRANSMISSION_HARQ;
void downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ndi, uint8_t rnti_type) {
if (rnti_type == _CS_RNTI_)
{
if (rnti_type == _CS_RNTI_) {
LOG_E(PHY, "Fatal error in HARQ entity due to not supported CS_RNTI at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
return(NEW_TRANSMISSION_HARQ);
return;
}
else if ((rnti_type != _C_RNTI_) && (rnti_type != _TC_RNTI_)) {
/* harq mechanism is not relevant for other rnti */
return(NEW_TRANSMISSION_HARQ);
return;
}
if (dl_harq->first_tx == 1) {
@@ -474,8 +345,6 @@ harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int
dl_harq->DCINdi = ndi;
//dl_harq->first_tx = 0;
result_harq = NEW_TRANSMISSION_HARQ;
LOG_D(PHY, "[HARQ-DL-PDSCH harqId : %d] first new reception \n", harq_pid);
}
else if (dl_harq->DCINdi != ndi) {
@@ -483,20 +352,15 @@ harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int
dl_harq->status = ACTIVE;
dl_harq->DCINdi = ndi;
result_harq = NEW_TRANSMISSION_HARQ;
LOG_D(PHY, "[HARQ-DL-PDSCH harqId : %d] new reception due to toogle of ndi \n", harq_pid);
}
else {
dl_harq->round++;
if (dl_harq->harq_ack.ack) dl_harq->status = SCH_IDLE;
result_harq = RETRANSMISSION_HARQ;
if (dl_harq->ack) dl_harq->status = SCH_IDLE;
LOG_D(PHY, "[HARQ-DL-PDSCH harqId : %d] reception of a retransmission \n", harq_pid);
}
return (result_harq);
}
openair1/SCHED_NR_UE/harq_nr.h
+1 -33
View File
@@ -46,8 +46,6 @@
#define NR_DEFAULT_DLSCH_HARQ_PROCESSES (8) /* TS 38.214 5.1 */
#define NR_DL_MAX_DAI (4) /* TS 38.213 table 9.1.3-1 Value of counter DAI for DCI format 1_0 and 1_1 */
#define NR_DL_MAX_NB_CW (2) /* number of downlink code word */
#define DL_ACKNACK_NO_SET (2)
#define DL_NACK (0)
#define DL_ACK (1)
@@ -68,18 +66,6 @@
/*************** FUNCTIONS ****************************************/
/** \brief This function updates HARQ context according to dci
@param PHY_VARS_NR_UE ue context
@param nr_dci_info_extracted extracted information from dci
@param dlsch downlink context
@param ulsch uplink context
@param nr_slot_rx rx slot
@param tx_offset slot offset for tx
@returns none */
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_slot_rx, uint8_t tx_offset);
/** \brief This function configures uplink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@@ -127,24 +113,6 @@ harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, u
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq);
/** \brief This function configures downlink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@param TB_id transport block identifier
@param execution_thread_number thread_number
@param number_harq_processes maximum number of downlink HARQ processes
@returns none */
void config_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number, uint8_t number_harq_processes);
/** \brief This function releases downlink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@param TB_id transport block identifier
@param execution_thread_number thread_number
@returns none */
void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number);
/** \brief This function update downlink harq context and return reception type (new transmission or retransmission)
@param dlsch downlink harq context
@@ -152,7 +120,7 @@ void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, in
@param rnti_type type of rnti
@returns retransmission or new transmission */
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dlsch, int harq_pid, int ndi, uint8_t rnti_type);
void downlink_harq_process(NR_DL_UE_HARQ_t *dlsch, int harq_pid, int ndi, uint8_t rnti_type);
#undef EXTERN
#undef INIT_VARIABLES_HARQ_NR_H
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+301 -286
View File
@@ -122,9 +122,10 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus){
int harq_pid;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
if (n_pdus > 1){
@@ -133,11 +134,27 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
switch (pdu_type){
case FAPI_NR_RX_PDU_TYPE_SIB:
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.harq_pid = dlsch0->current_harq_pid;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.ack_nack = dlsch0->harq_processes[dlsch0->current_harq_pid]->ack;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu = dlsch0->harq_processes[dlsch0->current_harq_pid]->b;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu_length = dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS / 8;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
if(dlsch0) {
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.harq_pid = dlsch0->current_harq_pid;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.ack_nack = dlsch0->harq_processes[dlsch0->current_harq_pid]->ack;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu = dlsch0->harq_processes[dlsch0->current_harq_pid]->b;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu_length = dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS / 8;
}
if(dlsch1) {
AssertFatal(1==0,"Second codeword currently not supported\n");
}
break;
case FAPI_NR_RX_PDU_TYPE_RAR:
harq_pid = dlsch0->current_harq_pid;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu = dlsch0->harq_processes[harq_pid]->b;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu_length = dlsch0->harq_processes[harq_pid]->TBS / 8;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.harq_pid = dlsch0->current_harq_pid;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.ack_nack = dlsch0->harq_processes[dlsch0->current_harq_pid]->ack;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu = dlsch0->harq_processes[dlsch0->current_harq_pid]->b;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu_length = dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS / 8;
break;
case FAPI_NR_RX_PDU_TYPE_SSB:
rx_ind->rx_indication_body[n_pdus - 1].ssb_pdu.pdu = ue->pbch_vars[gNB_id]->decoded_output;
@@ -146,6 +163,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
rx_ind->rx_indication_body[n_pdus - 1].ssb_pdu.ssb_length = frame_parms->Lmax;
rx_ind->rx_indication_body[n_pdus - 1].ssb_pdu.cell_id = frame_parms->Nid_cell;
rx_ind->rx_indication_body[n_pdus - 1].ssb_pdu.ssb_start_subcarrier = frame_parms->ssb_start_subcarrier;
rx_ind->rx_indication_body[n_pdus - 1].ssb_pdu.rsrp_dBm = ue->measurements.rsrp_dBm[gNB_id];
break;
default:
break;
@@ -854,13 +872,13 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
}
void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int gNB_id,
PDSCH_t pdsch,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
int *dlsch_errors,
uint8_t dlsch_parallel) {
UE_nr_rxtx_proc_t *proc,
int gNB_id,
PDSCH_t pdsch,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
int *dlsch_errors,
uint8_t dlsch_parallel) {
if (dlsch0==NULL)
AssertFatal(0,"dlsch0 should be defined at this level \n");
@@ -951,17 +969,17 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
dlsch0->harq_processes[harq_pid]->Qm,
dlsch0->harq_processes[harq_pid]->Nl);
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_unscrambling_stats);
start_meas(&ue->dlsch_unscrambling_stats);
#endif
nr_dlsch_unscrambling(pdsch_vars->llr[0],
dlsch0->harq_processes[harq_pid]->G,
0,
ue->frame_parms.Nid_cell,
dlsch0->rnti);
nr_dlsch_unscrambling(pdsch_vars->llr[0],
dlsch0->harq_processes[harq_pid]->G,
0,
ue->frame_parms.Nid_cell,
dlsch0->rnti);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_unscrambling_stats);
stop_meas(&ue->dlsch_unscrambling_stats);
#endif
#if 0
@@ -976,79 +994,99 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
start_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
#endif
if( dlsch_parallel)
{
ret = nr_dlsch_decoding_mthread(ue,
proc,
gNB_id,
pdsch_vars->llr[0],
&ue->frame_parms,
dlsch0,
dlsch0->harq_processes[harq_pid],
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid,
pdsch==PDSCH?1:0,
dlsch0->harq_processes[harq_pid]->TBS>256?1:0);
LOG_T(PHY,"dlsch decoding is parallelized, ret = %d\n", ret);
if( dlsch_parallel) {
ret = nr_dlsch_decoding_mthread(ue,
proc,
gNB_id,
pdsch_vars->llr[0],
&ue->frame_parms,
dlsch0,
dlsch0->harq_processes[harq_pid],
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid,
pdsch==PDSCH?1:0,
dlsch0->harq_processes[harq_pid]->TBS>256?1:0);
LOG_T(PHY,"dlsch decoding is parallelized, ret = %d\n", ret);
}
else
{
ret = nr_dlsch_decoding(ue,
proc,
gNB_id,
pdsch_vars->llr[0],
&ue->frame_parms,
dlsch0,
dlsch0->harq_processes[harq_pid],
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid,
pdsch==PDSCH?1:0,
dlsch0->harq_processes[harq_pid]->TBS>256?1:0);
else {
ret = nr_dlsch_decoding(ue,
proc,
gNB_id,
pdsch_vars->llr[0],
&ue->frame_parms,
dlsch0,
dlsch0->harq_processes[harq_pid],
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid,
pdsch==PDSCH?1:0,
dlsch0->harq_processes[harq_pid]->TBS>256?1:0);
LOG_T(PHY,"Sequential dlsch decoding , ret = %d\n", ret);
}
}
switch (pdsch) {
case RA_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_RAR, gNB_id, ue, dlsch0, NULL, number_pdus);
ue->UE_mode[gNB_id] = RA_RESPONSE;
break;
case PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_DLSCH, gNB_id, ue, dlsch0, NULL, number_pdus);
break;
case SI_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SIB, gNB_id, ue, dlsch0, NULL, number_pdus);
break;
default:
break;
}
LOG_D(PHY, "In %s DL PDU length in bits: %d, in bytes: %d \n", __FUNCTION__, dlsch0->harq_processes[harq_pid]->TBS, dlsch0->harq_processes[harq_pid]->TBS / 8);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
#if DISABLE_LOG_X
printf(" --> Unscrambling for CW0 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
printf("AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
printf(" --> Unscrambling for CW0 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
printf("AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
#else
LOG_I(PHY, " --> Unscrambling for CW0 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
LOG_I(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
LOG_I(PHY, " --> Unscrambling for CW0 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
LOG_I(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
#endif
#endif
if(is_cw1_active)
{
// start ldpc decode for CW 1
dlsch1->harq_processes[harq_pid]->G = nr_get_G(dlsch1->harq_processes[harq_pid]->nb_rb,
nb_symb_sch,
nb_re_dmrs,
dmrs_len,
dlsch1->harq_processes[harq_pid]->Qm,
dlsch1->harq_processes[harq_pid]->Nl);
if(is_cw1_active) {
// start ldpc decode for CW 1
dlsch1->harq_processes[harq_pid]->G = nr_get_G(dlsch1->harq_processes[harq_pid]->nb_rb,
nb_symb_sch,
nb_re_dmrs,
dmrs_len,
dlsch1->harq_processes[harq_pid]->Qm,
dlsch1->harq_processes[harq_pid]->Nl);
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_unscrambling_stats);
start_meas(&ue->dlsch_unscrambling_stats);
#endif
nr_dlsch_unscrambling(pdsch_vars->llr[1],
dlsch1->harq_processes[harq_pid]->G,
0,
ue->frame_parms.Nid_cell,
dlsch1->rnti);
nr_dlsch_unscrambling(pdsch_vars->llr[1],
dlsch1->harq_processes[harq_pid]->G,
0,
ue->frame_parms.Nid_cell,
dlsch1->rnti);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_unscrambling_stats);
stop_meas(&ue->dlsch_unscrambling_stats);
#endif
#if 0
@@ -1062,228 +1100,203 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
start_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
#endif
if(dlsch_parallel)
{
ret1 = nr_dlsch_decoding_mthread(ue,
proc,
gNB_id,
pdsch_vars->llr[1],
&ue->frame_parms,
dlsch1,
dlsch1->harq_processes[harq_pid],
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid,
pdsch==PDSCH?1:0,
dlsch1->harq_processes[harq_pid]->TBS>256?1:0);
LOG_T(PHY,"CW dlsch decoding is parallelized, ret1 = %d\n", ret1);
}
else
{
ret1 = nr_dlsch_decoding(ue,
proc,
gNB_id,
pdsch_vars->llr[1],
&ue->frame_parms,
dlsch1,
dlsch1->harq_processes[harq_pid],
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid,
pdsch==PDSCH?1:0,//proc->decoder_switch,
dlsch1->harq_processes[harq_pid]->TBS>256?1:0);
LOG_T(PHY,"CWW sequential dlsch decoding, ret1 = %d\n", ret1);
}
if(dlsch_parallel) {
ret1 = nr_dlsch_decoding_mthread(ue,
proc,
gNB_id,
pdsch_vars->llr[1],
&ue->frame_parms,
dlsch1,
dlsch1->harq_processes[harq_pid],
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid,
pdsch==PDSCH?1:0,
dlsch1->harq_processes[harq_pid]->TBS>256?1:0);
LOG_T(PHY,"CW dlsch decoding is parallelized, ret1 = %d\n", ret1);
}
else {
ret1 = nr_dlsch_decoding(ue,
proc,
gNB_id,
pdsch_vars->llr[1],
&ue->frame_parms,
dlsch1,
dlsch1->harq_processes[harq_pid],
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid,
pdsch==PDSCH?1:0,//proc->decoder_switch,
dlsch1->harq_processes[harq_pid]->TBS>256?1:0);
LOG_T(PHY,"CWW sequential dlsch decoding, ret1 = %d\n", ret1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
#if DISABLE_LOG_X
printf(" --> Unscrambling for CW1 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
printf("AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
printf(" --> Unscrambling for CW1 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
printf("AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
#else
LOG_D(PHY, " --> Unscrambling for CW1 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
LOG_D(PHY, " --> Unscrambling for CW1 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
#endif
#endif
LOG_I(PHY,"AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
LOG_D(PHY,"AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch1: %d \n", harq_pid, dlsch1->harq_processes[harq_pid]->TBS);
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch1: %d \n", harq_pid, dlsch1->harq_processes[harq_pid]->TBS);
}
LOG_D(PHY," ------ end ldpc decoder for AbsSubframe %d.%d ------ decoded in %d \n", frame_rx, nr_slot_rx, ret);
// send to mac
if (ue->if_inst && ue->if_inst->dl_indication) {
ue->if_inst->dl_indication(&dl_indication, ul_time_alignment);
}
if (ue->mac_enabled == 1) { // TODO: move this from PHY to MAC layer!
/* Time Alignment procedure
// - UE processing capability 1
// - Setting the TA update to be applied after the reception of the TA command
// - Timing adjustment computed according to TS 38.213 section 4.2
// - Durations of N1 and N2 symbols corresponding to PDSCH and PUSCH are
// computed according to sections 5.3 and 6.4 of TS 38.214 */
const int numerology = ue->frame_parms.numerology_index;
const int ofdm_symbol_size = ue->frame_parms.ofdm_symbol_size;
const int nb_prefix_samples = ue->frame_parms.nb_prefix_samples;
const int samples_per_subframe = ue->frame_parms.samples_per_subframe;
const int slots_per_frame = ue->frame_parms.slots_per_frame;
const int slots_per_subframe = ue->frame_parms.slots_per_subframe;
const double tc_factor = 1.0 / samples_per_subframe;
const uint16_t bw_scaling = get_bw_scaling(ofdm_symbol_size);
const int Ta_max = 3846; // Max value of 12 bits TA Command
const double N_TA_max = Ta_max * bw_scaling * tc_factor;
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (mac->ULbwp[0] &&
mac->ULbwp[0]->bwp_Dedicated &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
}
LOG_D(PHY," ------ end ldpc decoder for AbsSubframe %d.%d ------ decoded in %d \n", frame_rx, nr_slot_rx, ret);
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch0: %d \n",harq_pid, dlsch0->harq_processes[harq_pid]->TBS);
if(ret<dlsch0->max_ldpc_iterations+1){
switch (pdsch) {
case RA_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_RAR, gNB_id, ue, dlsch0, number_pdus);
ue->UE_mode[gNB_id] = RA_RESPONSE;
break;
case PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_DLSCH, gNB_id, ue, dlsch0, number_pdus);
break;
case SI_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SIB, gNB_id, ue, dlsch0, number_pdus);
break;
default:
break;
}
LOG_D(PHY, "In %s DL PDU length in bits: %d, in bytes: %d \n", __FUNCTION__, dlsch0->harq_processes[harq_pid]->TBS, dlsch0->harq_processes[harq_pid]->TBS / 8);
// send to mac
if (ue->if_inst && ue->if_inst->dl_indication) {
ue->if_inst->dl_indication(&dl_indication, ul_time_alignment);
}
else if (mac->ULbwp[0] &&
mac->ULbwp[0]->bwp_Common &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
else if (mac->scc_SIB &&
mac->scc_SIB->uplinkConfigCommon &&
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon &&
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup &&
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA;
if (ue->mac_enabled == 1) { // TODO: move this from PHY to MAC layer!
NR_PDSCH_Config_t *pdsch_Config = (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
/* Time Alignment procedure
// - UE processing capability 1
// - Setting the TA update to be applied after the reception of the TA command
// - Timing adjustment computed according to TS 38.213 section 4.2
// - Durations of N1 and N2 symbols corresponding to PDSCH and PUSCH are
// computed according to sections 5.3 and 6.4 of TS 38.214 */
const int numerology = ue->frame_parms.numerology_index;
const int ofdm_symbol_size = ue->frame_parms.ofdm_symbol_size;
const int nb_prefix_samples = ue->frame_parms.nb_prefix_samples;
const int samples_per_subframe = ue->frame_parms.samples_per_subframe;
const int slots_per_frame = ue->frame_parms.slots_per_frame;
const int slots_per_subframe = ue->frame_parms.slots_per_subframe;
const double tc_factor = 1.0 / samples_per_subframe;
const uint16_t bw_scaling = get_bw_scaling(ofdm_symbol_size);
const int Ta_max = 3846; // Max value of 12 bits TA Command
const double N_TA_max = Ta_max * bw_scaling * tc_factor;
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (mac->ULbwp[0] &&
mac->ULbwp[0]->bwp_Dedicated &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
}
else if (mac->ULbwp[0] &&
mac->ULbwp[0]->bwp_Common &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
else if (mac->scc_SIB &&
mac->scc_SIB->uplinkConfigCommon &&
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon &&
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup &&
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_PDSCH_Config_t *pdsch_Config = (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_DMRS_DownlinkConfig_t *NR_DMRS_dlconfig = NULL;
if (pdsch_Config) {
if (mapping_type_dl == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA)
NR_DMRS_dlconfig = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
else
NR_DMRS_dlconfig = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
}
pdsch_dmrs_AdditionalPosition_t add_pos_dl = pdsch_dmrs_pos2;
if (NR_DMRS_dlconfig && NR_DMRS_dlconfig->dmrs_AdditionalPosition)
add_pos_dl = *NR_DMRS_dlconfig->dmrs_AdditionalPosition;
/* PDSCH decoding time N_1 for processing capability 1 */
int N_1;
if (add_pos_dl == pdsch_dmrs_pos0)
N_1 = pdsch_N_1_capability_1[numerology][1];
else if (add_pos_dl == pdsch_dmrs_pos1 || add_pos_dl == pdsch_dmrs_pos2)
N_1 = pdsch_N_1_capability_1[numerology][2];
else
N_1 = pdsch_N_1_capability_1[numerology][3];
/* PUSCH preapration time N_2 for processing capability 1 */
const int N_2 = pusch_N_2_timing_capability_1[numerology][1];
/* d_1_1 depending on the number of PDSCH symbols allocated */
const int d = 0; // TODO number of overlapping symbols of the scheduling PDCCH and the scheduled PDSCH
int d_1_1 = 0;
NR_DMRS_DownlinkConfig_t *NR_DMRS_dlconfig = NULL;
if (pdsch_Config) {
if (mapping_type_dl == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA)
if (nb_symb_sch + start_symbol < 7)
d_1_1 = 7 - (nb_symb_sch + start_symbol);
else
d_1_1 = 0;
else // mapping type B
switch (nb_symb_sch){
case 7: d_1_1 = 0; break;
case 4: d_1_1 = 3; break;
case 2: d_1_1 = 3 + d; break;
default: break;
}
/* d_2_1 */
int d_2_1;
if (mapping_type_ul == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB && start_symbol != 0)
d_2_1 = 0;
NR_DMRS_dlconfig = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
else
d_2_1 = 1;
/* d_2_2 */
const double d_2_2 = 0.0; // set to 0 because there is only 1 BWP: TODO this should corresponds to the switching time as defined in TS 38.133
/* N_t_1 time duration in msec of N_1 symbols corresponding to a PDSCH reception time
// N_t_2 time duration in msec of N_2 symbols corresponding to a PUSCH preparation time */
double N_t_1 = (N_1 + d_1_1) * (ofdm_symbol_size + nb_prefix_samples) * tc_factor;
double N_t_2 = (N_2 + d_2_1) * (ofdm_symbol_size + nb_prefix_samples) * tc_factor;
if (N_t_2 < d_2_2) N_t_2 = d_2_2;
/* Time alignment procedure */
// N_t_1 + N_t_2 + N_TA_max must be in msec
const double t_subframe = 1.0; // subframe duration of 1 msec
const int ul_tx_timing_adjustment = 1 + (int)ceil(slots_per_subframe*(N_t_1 + N_t_2 + N_TA_max + 0.5)/t_subframe);
if (ul_time_alignment->apply_ta == 1){
ul_time_alignment->ta_slot = (nr_slot_rx + ul_tx_timing_adjustment) % slots_per_frame;
if (nr_slot_rx + ul_tx_timing_adjustment > slots_per_frame){
ul_time_alignment->ta_frame = (frame_rx + 1) % 1024;
} else {
ul_time_alignment->ta_frame = frame_rx;
}
// reset TA flag
ul_time_alignment->apply_ta = 0;
LOG_D(PHY,"Frame %d slot %d -- Starting UL time alignment procedures. TA update will be applied at frame %d slot %d\n", frame_rx, nr_slot_rx, ul_time_alignment->ta_frame, ul_time_alignment->ta_slot);
}
NR_DMRS_dlconfig = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
}
pdsch_dmrs_AdditionalPosition_t add_pos_dl = pdsch_dmrs_pos2;
if (NR_DMRS_dlconfig && NR_DMRS_dlconfig->dmrs_AdditionalPosition)
add_pos_dl = *NR_DMRS_dlconfig->dmrs_AdditionalPosition;
/* PDSCH decoding time N_1 for processing capability 1 */
int N_1;
if (add_pos_dl == pdsch_dmrs_pos0)
N_1 = pdsch_N_1_capability_1[numerology][1];
else if (add_pos_dl == pdsch_dmrs_pos1 || add_pos_dl == pdsch_dmrs_pos2)
N_1 = pdsch_N_1_capability_1[numerology][2];
else
N_1 = pdsch_N_1_capability_1[numerology][3];
/* PUSCH preapration time N_2 for processing capability 1 */
const int N_2 = pusch_N_2_timing_capability_1[numerology][1];
/* d_1_1 depending on the number of PDSCH symbols allocated */
const int d = 0; // TODO number of overlapping symbols of the scheduling PDCCH and the scheduled PDSCH
int d_1_1 = 0;
if (mapping_type_dl == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA)
if (nb_symb_sch + start_symbol < 7)
d_1_1 = 7 - (nb_symb_sch + start_symbol);
else
d_1_1 = 0;
else // mapping type B
switch (nb_symb_sch){
case 7: d_1_1 = 0; break;
case 4: d_1_1 = 3; break;
case 2: d_1_1 = 3 + d; break;
default: break;
}
/* d_2_1 */
int d_2_1;
if (mapping_type_ul == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB && start_symbol != 0)
d_2_1 = 0;
else
d_2_1 = 1;
/* d_2_2 */
const double d_2_2 = 0.0; // set to 0 because there is only 1 BWP: TODO this should corresponds to the switching time as defined in TS 38.133
/* N_t_1 time duration in msec of N_1 symbols corresponding to a PDSCH reception time
// N_t_2 time duration in msec of N_2 symbols corresponding to a PUSCH preparation time */
double N_t_1 = (N_1 + d_1_1) * (ofdm_symbol_size + nb_prefix_samples) * tc_factor;
double N_t_2 = (N_2 + d_2_1) * (ofdm_symbol_size + nb_prefix_samples) * tc_factor;
if (N_t_2 < d_2_2) N_t_2 = d_2_2;
/* Time alignment procedure */
// N_t_1 + N_t_2 + N_TA_max must be in msec
const double t_subframe = 1.0; // subframe duration of 1 msec
const int ul_tx_timing_adjustment = 1 + (int)ceil(slots_per_subframe*(N_t_1 + N_t_2 + N_TA_max + 0.5)/t_subframe);
if (ul_time_alignment->apply_ta == 1){
ul_time_alignment->ta_slot = (nr_slot_rx + ul_tx_timing_adjustment) % slots_per_frame;
if (nr_slot_rx + ul_tx_timing_adjustment > slots_per_frame){
ul_time_alignment->ta_frame = (frame_rx + 1) % 1024;
} else {
ul_time_alignment->ta_frame = frame_rx;
}
// reset TA flag
ul_time_alignment->apply_ta = 0;
LOG_D(PHY,"Frame %d slot %d -- Starting UL time alignment procedures. TA update will be applied at frame %d slot %d\n",
frame_rx, nr_slot_rx, ul_time_alignment->ta_frame, ul_time_alignment->ta_slot);
}
}
}
}
@@ -1811,6 +1824,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
nr_rxtx_thread_data_t *curMsg=(nr_rxtx_thread_data_t *)NotifiedFifoData(newElt);
curMsg->proc = *proc;
curMsg->UE = ue;
curMsg->ue_sched_mode = ONLY_PUSCH;
pushTpool(&(get_nrUE_params()->Tpool), newElt);
#if UE_TIMING_TRACE
@@ -1819,13 +1833,14 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
// do procedures for C-RNTI
int ret_pdsch = 0;
if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_C, VCD_FUNCTION_IN);
ret_pdsch = nr_ue_pdsch_procedures(ue,
proc,
gNB_id,
PDSCH,
ue->dlsch[proc->thread_id][gNB_id][0],
NULL);
proc,
gNB_id,
PDSCH,
ue->dlsch[proc->thread_id][gNB_id][0],
NULL);
nr_ue_measurement_procedures(2, ue, proc, gNB_id, nr_slot_rx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_C, VCD_FUNCTION_OUT);
openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c
-220
View File
@@ -1,220 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/************************************************************************
*
* MODULE : PUCCH power control for UE NR
*
* DESCRIPTION : functions related to PUCCH Transmit power
* TS 38.213 7.2.1 UE behaviour
*
**************************************************************************/
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/pucch_uci_ue_nr.h"
#include "SCHED_NR_UE/pucch_power_control_ue_nr.h"
#include <openair1/PHY/LTE_ESTIMATION/lte_estimation.h>
#include <openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h>
/**************** defines **************************************/
/**************** variables **************************************/
/**************** functions **************************************/
/*******************************************************************
*
* NAME : get_pucch_tx_power_ue
*
* PARAMETERS : ue context
* gNB_id identity
* slots for rx and tx
* pucch_format_nr_t pucch format
* nb_of_prbs number of prb allocated to pucch
* N_sc_ctrl_RB subcarrier control rb related to current pucch format
* N_symb_PUCCH number of pucch symbols excluding those reserved for dmrs
* O_UCI number of bits for UCI Uplink Control Information
* O_SR number of bits for SR scheduling Request
* O_UCI number of bits for CSI Channel State Information
* O_ACK number of bits for HARQ-ACK
* O_CRC number of bits for CRC
* n_HARQ_ACK use for obtaining a PUCCH transmission power
*
* RETURN : pucch power level in dBm
*
* DESCRIPTION : determines pucch transmission power in dBm
* TS 38.213 7.2.1 UE behaviour
*
*********************************************************************/
int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
UE_nr_rxtx_proc_t *proc,
pucch_format_nr_t pucch_format,
int nb_of_prbs,
int N_sc_ctrl_RB,
int N_symb_PUCCH,
int O_UCI,
int O_SR,
int O_CSI,
int O_ACK,
int O_CRC,
int n_HARQ_ACK) {
int16_t P_O_NOMINAL_PUCCH = ue->pucch_config_common_nr[gNB_id].p0_nominal;
PUCCH_PowerControl_t *power_config = &ue->pucch_config_dedicated_nr[gNB_id].pucch_PowerControl;
int16_t P_O_UE_PUCCH;
int16_t G_b_f_c = 0;
if (ue->pucch_config_dedicated_nr[gNB_id].spatial_Relation_Info[0] != NULL) { /* FFS TODO NR */
LOG_E(PHY,"PUCCH Spatial relation infos are not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
if (power_config->p0_Set[0] != NULL) {
P_O_UE_PUCCH = power_config->p0_Set[0]->p0_PUCCH_Value; /* get from index 0 if no spatial relation set */
G_b_f_c = 0;
}
else {
G_b_f_c = ue->dlsch[proc->thread_id][gNB_id][0]->g_pucch;
LOG_D(PHY,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
int P_O_PUCCH = P_O_NOMINAL_PUCCH + P_O_UE_PUCCH;
int16_t PL = get_nr_PL(ue->Mod_id, ue->CC_id, gNB_id); /* LTE function because NR path loss not yet implemented FFS TODO NR */
int16_t delta_F_PUCCH = power_config->deltaF_PUCCH_f[pucch_format];
int DELTA_TF;
uint16_t N_ref_PUCCH;
/* computing of pucch transmission power adjustment */
switch (pucch_format) {
case pucch_format0_nr:
{
N_ref_PUCCH = 2;
DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH);
break;
}
case pucch_format1_nr:
{
N_ref_PUCCH = N_SYMB_SLOT;
DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH);
break;
}
case pucch_format2_nr:
case pucch_format3_nr:
case pucch_format4_nr:
{
float N_RE = nb_of_prbs * N_sc_ctrl_RB * N_symb_PUCCH;
float K1 = 6;
/* initial phase so no higher layer parameters */
if (ue->UE_mode[gNB_id] != PUSCH) {
if (O_ACK == 0) {
n_HARQ_ACK = 0;
}
else {
n_HARQ_ACK = 1;
}
}
if (O_UCI < 12) {
DELTA_TF = 10 * log10((double)(((K1 * (n_HARQ_ACK + O_SR + O_CSI))/N_RE)));
}
else {
float K2 = 2.4;
float BPRE = (O_ACK + O_SR + O_CSI + O_CRC)/N_RE;
DELTA_TF = 10 * log10((double)(pow(2,(K2*BPRE)) - 1));
}
break;
}
default:
{
LOG_E(PHY,"PUCCH unknown pucch format : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (0);
}
}
if (power_config->twoPUCCH_PC_AdjustmentStates > 1) {
LOG_E(PHY,"PUCCH power control adjustment states with 2 states not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
#if 0
int k2;
/* response to a detection by the UE of a DCI format 1_0 or DCI format 1_1 */
//int K_PUCCH = 0;
if (O_ACK != 0) {
/* it assumes that PDCCH is in the first symbol of receive slot FFS TDDO NR */
//int slots_gap = (proc->nr_slot_tx > proc->nr_slot_rx ? (proc->nr_slot_tx - proc->nr_slot_rx - 1) : ((proc->nr_slot_tx + ue->frame_parms.slots_per_subframe) - proc->nr_slot_rx - 1));
//K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_tti)) - 1;
}
else {
/* field k2 is not present - to check k2 of pucch from upper layer FFS TDDO NR */
if (ue->pusch_config.pusch_TimeDomainResourceAllocation[0] == NULL) {
if (ue->frame_parms.numerology_index == 0) {
k2 = 1;
}
else {
k2 = ue->frame_parms.numerology_index;
}
}
else
{
/* get minimum value of k2 */
int i = 0;
int k2_min = 32; /* max value of k2 */
do {
k2 = ue->pusch_config.pusch_TimeDomainResourceAllocation[i]->k2;
if (k2 < k2_min) {
k2_min = k2;
}
i++;
if (i >= MAX_NR_OF_UL_ALLOCATIONS) {
break;
}
} while(ue->pusch_config.pusch_TimeDomainResourceAllocation[i] != NULL);
k2 = k2_min;
}
//K_PUCCH = N_SYMB_SLOT * k2; /* the product of a number of symbols per slot and the minimum of the values provided by higher layer parameter k2 */
}
#endif
int contributor = (10 * log10((double)(pow(2,(ue->frame_parms.numerology_index)) * nb_of_prbs)));
int16_t pucch_power = P_O_PUCCH + contributor + PL + delta_F_PUCCH + DELTA_TF + G_b_f_c;
if (pucch_power > ue->tx_power_max_dBm) {
pucch_power = ue->tx_power_max_dBm;
}
NR_TST_PHY_PRINTF("PUCCH ( Tx power : %d dBm ) ( 10Log(...) : %d ) ( from Path Loss : %d ) ( delta_F_PUCCH : %d ) ( DELTA_TF : %d ) ( G_b_f_c : %d ) \n",
pucch_power, contributor, PL, delta_F_PUCCH, DELTA_TF, G_b_f_c);
return (pucch_power);
}
openair1/SCHED_NR_UE/pucch_power_control_ue_nr.h
-65
View File
@@ -1,65 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/************************************************************************
*
* MODULE : PUCCH power control for UE NR
*
* DESCRIPTION : functions related to PUCCH Transmit power
* TS 38.213 7.2.1 UE behaviour
*
**************************************************************************/
#ifndef PUCCH_POWER_CONTROL_H
#define PUCCH_POWER_CONTROL_H
/*************** INCLUDE *******************************************/
/*************** DEFINE ********************************************/
#define PUCCH_POWER_DEFAULT (0) /* in dBm */
/*************** VARIABLES *****************************************/
/*************** FUNCTIONS *****************************************/
/** \brief This function returns pucch power level in dBm
@param ue context
@param gNB_id identity
@param slots for rx and tx
@param pucch_format_nr_t pucch format
@param nb_of_prbs number of prb allocated to pucch
@param N_sc_ctrl_RB subcarrier control rb related to current pucch format
@param N_symb_PUCCH number of pucch symbols excluding those reserved for dmrs
@param O_UCI number of bits for UCI Uplink Control Information
@param O_SR number of bits for SR scheduling Request
@param int O_UCI number of bits for CSI Channel State Information
@param O_ACK number of bits for HARQ-ACK
@param O_CRC number of bits for CRC
@param n_HARQ_ACK use for obtaining a PUCCH transmission power
@returns pucch power level in dBm */
int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, pucch_format_nr_t pucch_format,
int nb_of_prbs, int N_sc_ctrl_RB, int N_symb_PUCCH, int O_UCI, int O_SR, int O_CSI, int O_ACK,
int O_CRC, int n_HARQ_ACK);
#endif /* PUCCH_POWER_CONTROL_H */
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
+67 -1151
View File
File diff suppressed because it is too large Load Diff
openair1/SCHED_NR_UE/pucch_uci_ue_nr.h
+3 -50
View File
@@ -58,51 +58,12 @@
#define BITS_PER_SYMBOL_BPSK (1) /* 1 bit per symbol for bpsk modulation */
#define BITS_PER_SYMBOL_QPSK (2) /* 2 bits per symbol for bpsk modulation */
/************** VARIABLES *****************************************/
#define NB_SYMBOL_MINUS_FOUR (11)
#define I_PUCCH_NO_ADDITIONAL_DMRS (0)
#define I_PUCCH_ADDITIONAL_DMRS (1)
#define I_PUCCH_NO_HOPPING (0)
#define I_PUCCH_HOPING (1)
/*************** FUNCTIONS ****************************************/
bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, bool reset_harq);
/** \brief This function return number of downlink acknowledgement and its bitmap
@param ue context
@param gNB_id identity
@param slots for rx and tx
@param o_ACK HARQ-ACK information bits
@param n_HARQ_ACK use for obtaining a PUCCH transmission power
@param do_reset reset downlink HARQ context
@returns number of bits of o_ACK */
uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, uint32_t *o_ACK,
int *n_HARQ_ACK, bool do_reset);
/** \brief This function selects a pucch resource
@param ue context
@param gNB_id identity
@param uci size number of uci bits
@param pucch_resource_indicator is from downlink DCI
@param initial_pucch_id pucch resource id for initial phase
@param resource_set_id pucch resource set if any
@param resource_id pucch resource id if any
@returns TRUE a pucch resource has been found FALSE no valid pucch resource */
boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size, int pucch_resource_indicator,
int *initial_pucch_id, int *resource_set_id, int *resource_id, NR_UE_HARQ_STATUS_t *harq_status);
/** \brief This function select a pucch resource set
@param ue context
@param gNB_id identity
@param uci size number of uci bits
@returns number of the pucch resource set */
int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size);
void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
UE_nr_rxtx_proc_t *proc);
/** \brief This function check pucch format
@param ue context
@@ -115,14 +76,6 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size)
boolean_t check_pucch_format(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, pucch_format_nr_t format_pucch, int nb_symbols_for_tx,
int uci_size);
/** \brief This function selects a pucch resource
@param ue context
@param gNB_id identity
@param slots for rx and tx
@returns TRUE a scheduling request is triggered */
int trigger_periodic_scheduling_request(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc);
/** \brief This function reads current CSI
@param ue context
@param gNB_id identity
openair1/SIMULATION/ETH_TRANSPORT/emu_transport.c
-1
View File
@@ -231,7 +231,6 @@ void clear_UE_transport_info(uint8_t nb_UE)
for (UE_id=0; UE_id<nb_UE; UE_id++)
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
UE_transport_info_TB_index[UE_id][CC_id]=0;
memset((void *)&UE_transport_info[UE_id][CC_id].cntl,0,sizeof(UE_cntl));
}
openair1/SIMULATION/ETH_TRANSPORT/extern.h
-1
View File
@@ -57,7 +57,6 @@ extern eNB_transport_info_t eNB_transport_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs];
extern uint16_t eNB_transport_info_TB_index[NUMBER_OF_eNB_MAX][MAX_NUM_CCs];
extern UE_transport_info_t UE_transport_info[NUMBER_OF_UE_MAX][MAX_NUM_CCs];
extern uint16_t UE_transport_info_TB_index[NUMBER_OF_UE_MAX][MAX_NUM_CCs];
extern UE_cntl ue_cntl_delay[NUMBER_OF_UE_MAX][MAX_NUM_CCs][2];
openair1/SIMULATION/ETH_TRANSPORT/vars.h
-1
View File
@@ -58,7 +58,6 @@ eNB_transport_info_t eNB_transport_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs];
uint16_t eNB_transport_info_TB_index[NUMBER_OF_eNB_MAX][MAX_NUM_CCs];
UE_transport_info_t UE_transport_info[NUMBER_OF_UE_MAX][MAX_NUM_CCs];
uint16_t UE_transport_info_TB_index[NUMBER_OF_UE_MAX][MAX_NUM_CCs];
UE_cntl ue_cntl_delay[NUMBER_OF_UE_MAX][MAX_NUM_CCs][2];
openair1/SIMULATION/NR_PHY/dlsim.c
+10 -6
View File
@@ -87,7 +87,6 @@ uint16_t sl_ahead=0;
uint64_t downlink_frequency[MAX_NUM_CCs][4];
THREAD_STRUCT thread_struct;
nfapi_ue_release_request_body_t release_rntis;
msc_interface_t msc_interface;
uint32_t N_RB_DL = 106;
// dummy functions
@@ -227,12 +226,17 @@ int DU_send_INITIAL_UL_RRC_MESSAGE_TRANSFER(module_id_t module_idP,
void processSlotTX(void *arg) {}
//nFAPI P7 dummy functions
//nFAPI P7 dummy functions to avoid linking errors
int oai_nfapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req) { return(0); }
int oai_nfapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req){ return(0); }
int oai_nfapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req){ return(0); }
int oai_nfapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req){ return(0); }
int oai_nfapi_nr_rx_data_indication(nfapi_nr_rx_data_indication_t *ind) { return(0); }
int oai_nfapi_nr_crc_indication(nfapi_nr_crc_indication_t *ind) { return(0); }
int oai_nfapi_nr_srs_indication(nfapi_nr_srs_indication_t *ind) { return(0); }
int oai_nfapi_nr_uci_indication(nfapi_nr_uci_indication_t *ind) { return(0); }
int oai_nfapi_nr_rach_indication(nfapi_nr_rach_indication_t *ind) { return(0); }
// needed for some functions
openair0_config_t openair0_cfg[MAX_CARDS];
@@ -758,7 +762,7 @@ int main(int argc, char **argv)
prepare_scd(scd);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0);
/* RRC parameter validation for secondaryCellGroup */
fix_scd(scd);
@@ -1003,12 +1007,12 @@ int main(int argc, char **argv)
NR_gNB_DLSCH_t *gNB_dlsch = gNB->dlsch[0][0];
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &gNB_dlsch->harq_process.pdsch_pdu.pdsch_pdu_rel15;
UE_harq_process->harq_ack.ack = 0;
UE_harq_process->ack = 0;
round = 0;
UE_harq_process->round = round;
UE_harq_process->first_tx = 1;
while ((round<num_rounds) && (UE_harq_process->harq_ack.ack==0)) {
while ((round<num_rounds) && (UE_harq_process->ack==0)) {
memset(RC.nrmac[0]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int));
memset(RC.nrmac[0]->cce_list[1][1],0,MAX_NUM_CCE*sizeof(int));
clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot);
@@ -1242,7 +1246,7 @@ int main(int argc, char **argv)
printf("errors_bit = %u (trial %d)\n", errors_bit, trial);
}
roundStats[snrRun]+=((float)round);
if (UE_harq_process->harq_ack.ack==1) effRate += ((float)TBS)/round;
if (UE_harq_process->ack==1) effRate += ((float)TBS)/round;
} // noise trials
blerStats[snrRun] = (float) n_errors / (float) n_trials;
openair1/SIMULATION/NR_PHY/nr_dummy_functions.c
+7
View File
@@ -8,6 +8,12 @@ int oai_nfapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req) { return(0);
int oai_nfapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req){ return(0); }
int oai_nfapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req){ return(0); }
int oai_nfapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req){ return(0); }
int oai_nfapi_nr_rx_data_indication(nfapi_nr_rx_data_indication_t *ind) { return(0); }
int oai_nfapi_nr_crc_indication(nfapi_nr_crc_indication_t *ind) { return(0); }
int oai_nfapi_nr_srs_indication(nfapi_nr_srs_indication_t *ind) { return(0); }
int oai_nfapi_nr_uci_indication(nfapi_nr_uci_indication_t *ind) { return(0); }
int oai_nfapi_nr_rach_indication(nfapi_nr_rach_indication_t *ind) { return(0); }
int32_t get_uldl_offset(int nr_bandP) { return(0); }
NR_IF_Module_t *NR_IF_Module_init(int Mod_id) {return(NULL);}
nfapi_mode_t nfapi_mod;
@@ -27,4 +33,5 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus) {}
openair1/SIMULATION/NR_PHY/nr_dummy_functions_prach.c
+9 -3
View File
@@ -3,9 +3,15 @@ int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req) { re
int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req) { return(0); }
int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0); }
int oai_nfapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req) { return(0); }
int oai_nfapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req){ return(0); }
int oai_nfapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req){ return(0); }
int oai_nfapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req){ return(0); }
int oai_nfapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req){ return(0); }
int oai_nfapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req){ return(0); }
int oai_nfapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req){ return(0); }
int oai_nfapi_nr_rx_data_indication(nfapi_nr_rx_data_indication_t *ind) { return(0); }
int oai_nfapi_nr_crc_indication(nfapi_nr_crc_indication_t *ind) { return(0); }
int oai_nfapi_nr_srs_indication(nfapi_nr_srs_indication_t *ind) { return(0); }
int oai_nfapi_nr_uci_indication(nfapi_nr_uci_indication_t *ind) { return(0); }
int oai_nfapi_nr_rach_indication(nfapi_nr_rach_indication_t *ind) { return(0); }
int32_t get_uldl_offset(int nr_bandP) { return(0); }
NR_IF_Module_t *NR_IF_Module_init(int Mod_id) {return(NULL);}
int dummy_nr_ue_dl_indication(nr_downlink_indication_t *dl_info) { return(0); }
openair1/SIMULATION/NR_PHY/prachsim.c
+6 -1
View File
@@ -81,6 +81,11 @@ int oai_nfapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req) { return(0);
int oai_nfapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req){ return(0); }
int oai_nfapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req){ return(0); }
int oai_nfapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req){ return(0); }
int oai_nfapi_nr_rx_data_indication(nfapi_nr_rx_data_indication_t *ind) { return(0); }
int oai_nfapi_nr_crc_indication(nfapi_nr_crc_indication_t *ind) { return(0); }
int oai_nfapi_nr_srs_indication(nfapi_nr_srs_indication_t *ind) { return(0); }
int oai_nfapi_nr_uci_indication(nfapi_nr_uci_indication_t *ind) { return(0); }
int oai_nfapi_nr_rach_indication(nfapi_nr_rach_indication_t *ind) { return(0); }
void
rrc_data_ind(
@@ -216,7 +221,7 @@ int main(int argc, char **argv){
char c;
double sigma2, sigma2_dB = 0, SNR, snr0 = -2.0, snr1 = 0.0, ue_speed0 = 0.0, ue_speed1 = 0.0;
double **s_re, **s_im, **r_re, **r_im, iqim = 0.0, delay_avg = 0, ue_speed = 0, fs, bw;
double **s_re, **s_im, **r_re, **r_im, iqim = 0.0, delay_avg = 0, ue_speed = 0, fs=-1, bw;
int i, l, aa, aarx, **txdata, trial, n_frames = 1, prach_start, rx_prach_start; //, ntrials=1;
int N_RB_UL = 106, delay = 0, NCS_config = 13, rootSequenceIndex = 1, threequarter_fs = 0, mu = 1, fd_occasion = 0, loglvl = OAILOG_INFO, numRA = 0, prachStartSymbol = 0;
uint8_t snr1set = 0, ue_speed1set = 0, transmission_mode = 1, n_tx = 1, n_rx = 1, awgn_flag = 0, msg1_frequencystart = 0, num_prach_fd_occasions = 1, prach_format=0;
openair1/SIMULATION/NR_PHY/pucchsim.c
+75 -27
View File
@@ -457,32 +457,8 @@ int main(int argc, char **argv)
bzero(rxdataF[i],14*frame_parms->ofdm_symbol_size*sizeof(int));
}
//configure UE
UE = malloc(sizeof(PHY_VARS_NR_UE));
memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
UE->pucch_config_common_nr->hoppingId = Nid_cell;
//phy_init_nr_top(UE); //called from init_nr_ue_signal
UE->perfect_ce = 0;
if(eps!=0.0)
UE->UE_fo_compensation = 1; // if a frequency offset is set then perform fo estimation and compensation
if (init_nr_ue_signal(UE, 1, 0) != 0)
{
printf("Error at UE NR initialisation\n");
exit(-1);
}
uint8_t mcs=0;
startingPRB_intraSlotHopping=N_RB_DL-1;
pucch_GroupHopping_t PUCCH_GroupHopping=UE->pucch_config_common_nr->pucch_GroupHopping;
uint32_t hopping_id=UE->pucch_config_common_nr->hoppingId;
uint32_t dmrs_scrambling_id = 0, data_scrambling_id=0;
//t_nrPolar_params *currentPtr;
int shift = 0;
if(format==0){
if (sr_flag)
shift = 1<<nr_bit;
@@ -496,6 +472,63 @@ int main(int argc, char **argv)
}
else if (format == 2 && nr_bit > 11) gNB->uci_polarParams = nr_polar_params(2, nr_bit, nrofPRB, 1, NULL);
startingPRB_intraSlotHopping=N_RB_DL-1;
uint32_t hopping_id=Nid_cell;
uint32_t dmrs_scrambling_id = 0, data_scrambling_id=0;
//configure UE
UE = malloc(sizeof(PHY_VARS_NR_UE));
memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
fapi_nr_ul_config_pucch_pdu pucch_tx_pdu;
if (format==0) {
pucch_tx_pdu.format_type = 0;
pucch_tx_pdu.nr_of_symbols = nrofSymbols;
pucch_tx_pdu.start_symbol_index = startingSymbolIndex;
pucch_tx_pdu.bwp_start = 0;
pucch_tx_pdu.prb_start = startingPRB;
pucch_tx_pdu.hopping_id = hopping_id;
pucch_tx_pdu.group_hop_flag = 0;
pucch_tx_pdu.sequence_hop_flag = 0;
pucch_tx_pdu.freq_hop_flag = 0;
pucch_tx_pdu.mcs = mcs;
pucch_tx_pdu.initial_cyclic_shift = 0;
pucch_tx_pdu.second_hop_prb = startingPRB_intraSlotHopping;
}
if (format==2) {
pucch_tx_pdu.format_type = 2;
pucch_tx_pdu.rnti = 0x1234;
pucch_tx_pdu.n_bit = nr_bit;
pucch_tx_pdu.payload = actual_payload;
pucch_tx_pdu.nr_of_symbols = nrofSymbols;
pucch_tx_pdu.start_symbol_index = startingSymbolIndex;
pucch_tx_pdu.bwp_start = 0;
pucch_tx_pdu.prb_start = startingPRB;
pucch_tx_pdu.prb_size = nrofPRB;
pucch_tx_pdu.hopping_id = hopping_id;
pucch_tx_pdu.group_hop_flag = 0;
pucch_tx_pdu.sequence_hop_flag = 0;
pucch_tx_pdu.freq_hop_flag = 0;
pucch_tx_pdu.dmrs_scrambling_id = dmrs_scrambling_id;
pucch_tx_pdu.data_scrambling_id = data_scrambling_id;
pucch_tx_pdu.second_hop_prb = startingPRB_intraSlotHopping;
}
UE->perfect_ce = 0;
if(eps!=0.0)
UE->UE_fo_compensation = 1; // if a frequency offset is set then perform fo estimation and compensation
if (init_nr_ue_signal(UE, 1, 0) != 0)
{
printf("Error at UE NR initialisation\n");
exit(-1);
}
pucch_GroupHopping_t PUCCH_GroupHopping = pucch_tx_pdu.group_hop_flag + (pucch_tx_pdu.sequence_hop_flag<<1);
//t_nrPolar_params *currentPtr;
for(SNR=snr0;SNR<=snr1;SNR=SNR+1){
ack_nack_errors=0;
sr_errors=0;
@@ -503,13 +536,28 @@ int main(int argc, char **argv)
for (trial=0; trial<n_trials; trial++) {
bzero(txdataF[aa],frame_parms->ofdm_symbol_size*sizeof(int));
if(format==0){
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_slot_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB, 0);
nr_generate_pucch0(UE,
txdataF,
frame_parms,
amp,
nr_slot_tx,
&pucch_tx_pdu);
}
else if (format == 1){
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit);
nr_generate_pucch1(UE,
txdataF,
frame_parms,
amp,
nr_slot_tx,
&pucch_tx_pdu);
}
else {
nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit);
nr_generate_pucch2(UE,
txdataF,
frame_parms,
amp,
nr_slot_tx,
&pucch_tx_pdu);
}
int txlev = signal_energy(&txdataF[aa][startingSymbolIndex*frame_parms->ofdm_symbol_size],
openair1/SIMULATION/NR_PHY/ulsim.c
+16 -9
View File
@@ -83,7 +83,6 @@ double cpuf;
uint64_t downlink_frequency[MAX_NUM_CCs][4];
THREAD_STRUCT thread_struct;
nfapi_ue_release_request_body_t release_rntis;
msc_interface_t msc_interface;
uint32_t N_RB_DL = 106;
extern void fix_scd(NR_ServingCellConfig_t *scd);// forward declaration
@@ -213,6 +212,11 @@ int oai_nfapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req) { return(0);
int oai_nfapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req){ return(0); }
int oai_nfapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req){ return(0); }
int oai_nfapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req){ return(0); }
int oai_nfapi_nr_rx_data_indication(nfapi_nr_rx_data_indication_t *ind) { return(0); }
int oai_nfapi_nr_crc_indication(nfapi_nr_crc_indication_t *ind) { return(0); }
int oai_nfapi_nr_srs_indication(nfapi_nr_srs_indication_t *ind) { return(0); }
int oai_nfapi_nr_uci_indication(nfapi_nr_uci_indication_t *ind) { return(0); }
int oai_nfapi_nr_rach_indication(nfapi_nr_rach_indication_t *ind) { return(0); }
int nr_derive_key(int alg_type, uint8_t alg_id,
const uint8_t key[32], uint8_t **out)
@@ -286,7 +290,7 @@ int main(int argc, char **argv)
int gNB_id = 0;
int ap;
int tx_offset;
int32_t txlev;
int32_t txlev=0;
int start_rb = 0;
int UE_id =0; // [hna] only works for UE_id = 0 because NUMBER_OF_NR_UE_MAX is set to 1 (phy_init_nr_gNB causes segmentation fault)
float target_error_rate = 0.01;
@@ -309,7 +313,7 @@ int main(int argc, char **argv)
uint16_t ptrsSymbPerSlot = 0;
uint16_t ptrsRePerSymb = 0;
uint8_t transform_precoding = transform_precoder_disabled; // 0 - ENABLE, 1 - DISABLE
uint8_t transform_precoding = 1; // 0 - ENABLE, 1 - DISABLE
uint8_t num_dmrs_cdm_grps_no_data = 1;
uint8_t mcs_table = 0;
@@ -566,7 +570,7 @@ int main(int argc, char **argv)
case 'Z':
transform_precoding = transform_precoder_enabled;
transform_precoding = 0; // enabled
num_dmrs_cdm_grps_no_data = 2;
mcs_table = 3;
@@ -697,7 +701,7 @@ int main(int argc, char **argv)
prepare_scd(scd);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0);
// xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
@@ -840,7 +844,8 @@ int main(int argc, char **argv)
uint16_t number_dmrs_symbols = get_dmrs_symbols_in_slot(l_prime_mask, nb_symb_sch);
uint8_t nb_re_dmrs = (dmrs_config_type == pusch_dmrs_type1) ? 6 : 4;
if (transform_precoding == transform_precoder_enabled) {
// if transform precoding is enabled
if (transform_precoding == 0) {
AssertFatal(enable_ptrs == 0, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
@@ -1045,7 +1050,8 @@ int main(int argc, char **argv)
pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t));
pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0;
if (transform_precoding == transform_precoder_enabled) {
// if transform precoding is enabled
if (transform_precoding == 0) {
pusch_pdu->dfts_ofdm.low_papr_group_number = *scc->physCellId % 30; // U as defined in 38.211 section 6.4.1.1.1.2
pusch_pdu->dfts_ofdm.low_papr_sequence_number = 0; // V as defined in 38.211 section 6.4.1.1.1.2
@@ -1105,7 +1111,8 @@ int main(int argc, char **argv)
ul_config.ul_config_list[0].pusch_config_pdu.transform_precoding = transform_precoding;
if (transform_precoding == transform_precoder_enabled) {
// if transform precoding is enabled
if (transform_precoding == 0) {
ul_config.ul_config_list[0].pusch_config_pdu.dfts_ofdm.low_papr_group_number = *scc->physCellId % 30;// U as defined in 38.211 section 6.4.1.1.1.2
ul_config.ul_config_list[0].pusch_config_pdu.dfts_ofdm.low_papr_sequence_number = 0;// V as defined in 38.211 section 6.4.1.1.1.2
@@ -1215,7 +1222,7 @@ int main(int argc, char **argv)
}
if (n_trials == 1 && round==0) {
if (n_trials == 1 && round==0) {
#ifdef __AVX2__
__attribute__((unused))
int off = ((nb_rb&1) == 1)? 4:0;
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c
+5
View File
@@ -146,6 +146,11 @@ int oai_nfapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req) { return(0);
int oai_nfapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req){ return(0); }
int oai_nfapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req){ return(0); }
int oai_nfapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req){ return(0); }
int oai_nfapi_nr_rx_data_indication(nfapi_nr_rx_data_indication_t *ind) { return(0); }
int oai_nfapi_nr_crc_indication(nfapi_nr_crc_indication_t *ind) { return(0); }
int oai_nfapi_nr_srs_indication(nfapi_nr_srs_indication_t *ind) { return(0); }
int oai_nfapi_nr_uci_indication(nfapi_nr_uci_indication_t *ind) { return(0); }
int oai_nfapi_nr_rach_indication(nfapi_nr_rach_indication_t *ind) { return(0); }
int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req) { return(0); }
openair1/SIMULATION/TOOLS/channel_sim.c
+8 -8
View File
@@ -70,16 +70,16 @@ void do_DL_sig(sim_t *sim,
double s_re0[30720];
double s_re1[30720];
double *s_re[2];
double *s_re[RC.nb_RU];
double s_im0[30720];
double s_im1[30720];
double *s_im[2];
double *s_im[RC.nb_RU];
double r_re00[30720];
double r_re01[30720];
double *r_re0[2];
double *r_re0[RC.nb_RU];
double r_im00[30720];
double r_im01[30720];
double *r_im0[2];
double *r_im0[RC.nb_RU];
LTE_DL_FRAME_PARMS *frame_parms;
s_re[0] = s_re0;
@@ -320,16 +320,16 @@ void do_UL_sig(sim_t *sim,
double s_re0[30720];
double s_re1[30720];
double *s_re[2];
double *s_re[NB_UE_INST];
double s_im0[30720];
double s_im1[30720];
double *s_im[2];
double *s_im[NB_UE_INST];
double r_re00[30720];
double r_re01[30720];
double *r_re0[2];
double *r_re0[NB_UE_INST];
double r_im00[30720];
double r_im01[30720];
double *r_im0[2];
double *r_im0[NB_UE_INST];
s_re[0] = s_re0;
s_im[0] = s_im0;
openair1/SIMULATION/TOOLS/corr_mat.m
+2 -2
View File
@@ -57,11 +57,11 @@ R22_sqrt_int(2:2:end,:,:) = imag(R22_sqrt);
%%
fid = fopen('scm_corrmat.h','w');
fprintf(fid,'double R22_sqrt[][] = {\n');
fprintf(fid,'static double R22_sqrt[][] = {\n');
for i=1:size(Gamma,3)
fprintf(fid,'{');
fprintf(fid,'%f, ',R22_sqrt_int(:,:,i));
fprintf(fid,'\b\b},\n');
end
fprintf(fid,'};\n');
fclose(fid)
fclose(fid)
openair1/SIMULATION/TOOLS/random_channel.c
+40 -61
View File
@@ -72,7 +72,7 @@ void fill_channel_desc(channel_desc_t *chan_desc,
uint8_t channel_length,
double *amps,
double *delays,
struct complex **R_sqrt,
struct complex *R_sqrt,
double Td,
double sampling_rate,
double channel_bandwidth,
@@ -155,7 +155,7 @@ void fill_channel_desc(channel_desc_t *chan_desc,
//chan_desc->R_sqrt[i] = (struct complex*) calloc(nb_tx*nb_rx*nb_tx*nb_rx,sizeof(struct complex));
//chan_desc->R_sqrt = (struct complex*)&R_sqrt[i][0];
/* all chan_desc share the same R_sqrt, coming from caller */
chan_desc->R_sqrt[i] = R_sqrt[0];
chan_desc->R_sqrt[i] = R_sqrt;
}
}
@@ -177,13 +177,13 @@ void fill_channel_desc(channel_desc_t *chan_desc,
reset_meas(&chan_desc->convolution);
}
double mbsfn_delays[] = {0,.03,.15,.31,.37,1.09,12.490,12.52,12.64,12.80,12.86,13.58,27.49,27.52,27.64,27.80,27.86,28.58};
double mbsfn_amps_dB[] = {0,-1.5,-1.4,-3.6,-0.6,-7.0,-10,-11.5,-11.4,-13.6,-10.6,-17.0,-20,-21.5,-21.4,-23.6,-20.6,-27};
static double mbsfn_delays[] = {0,.03,.15,.31,.37,1.09,12.490,12.52,12.64,12.80,12.86,13.58,27.49,27.52,27.64,27.80,27.86,28.58};
static double mbsfn_amps_dB[] = {0,-1.5,-1.4,-3.6,-0.6,-7.0,-10,-11.5,-11.4,-13.6,-10.6,-17.0,-20,-21.5,-21.4,-23.6,-20.6,-27};
double scm_c_delays[] = {0, 0.0125, 0.0250, 0.3625, 0.3750, 0.3875, 0.2500, 0.2625, 0.2750, 1.0375, 1.0500, 1.0625, 2.7250, 2.7375, 2.7500, 4.6000, 4.6125, 4.6250};
double scm_c_amps_dB[] = {0.00, -2.22, -3.98, -1.86, -4.08, -5.84, -1.08, -3.30, -5.06, -9.08, -11.30, -13.06, -15.14, -17.36, -19.12, -20.64, -22.85, -24.62};
static double scm_c_delays[] = {0, 0.0125, 0.0250, 0.3625, 0.3750, 0.3875, 0.2500, 0.2625, 0.2750, 1.0375, 1.0500, 1.0625, 2.7250, 2.7375, 2.7500, 4.6000, 4.6125, 4.6250};
static double scm_c_amps_dB[] = {0.00, -2.22, -3.98, -1.86, -4.08, -5.84, -1.08, -3.30, -5.06, -9.08, -11.30, -13.06, -15.14, -17.36, -19.12, -20.64, -22.85, -24.62};
double tdl_a_delays[] = {0.0000,
static double tdl_a_delays[] = {0.0000,
0.3819,
0.4025,
0.5868,
@@ -207,7 +207,7 @@ double tdl_a_delays[] = {0.0000,
5.3043,
9.6586
};
double tdl_a_amps_dB[] = {-13.4,
static double tdl_a_amps_dB[] = {-13.4,
0,
-2.2,
-4,
@@ -232,7 +232,7 @@ double tdl_a_amps_dB[] = {-13.4,
-29.7
};
double tdl_b_delays[] = {0.0000,
static double tdl_b_delays[] = {0.0000,
0.1072,
0.2155,
0.2095,
@@ -257,7 +257,7 @@ double tdl_b_delays[] = {0.0000,
4.7834
};
double tdl_b_amps_dB[] = {0,
static double tdl_b_amps_dB[] = {0,
-2.2,
-4,
-3.2,
@@ -282,7 +282,7 @@ double tdl_b_amps_dB[] = {0,
-11.3
};
double tdl_c_delays[] = {0,
static double tdl_c_delays[] = {0,
0.2099,
0.2219,
0.2329,
@@ -308,7 +308,7 @@ double tdl_c_delays[] = {0,
8.6523
};
double tdl_c_amps_dB[] = {-4.4,
static double tdl_c_amps_dB[] = {-4.4,
-1.2,
-3.5,
-5.2,
@@ -334,7 +334,7 @@ double tdl_c_amps_dB[] = {-4.4,
-22.8
};
double tdl_d_delays[] = {//0,
static double tdl_d_delays[] = {//0,
0,
0.035,
0.612,
@@ -350,7 +350,7 @@ double tdl_d_delays[] = {//0,
12.525
};
double tdl_d_amps_dB[] = {//-0.2,
static double tdl_d_amps_dB[] = {//-0.2,
//-13.5,
-.00147,
-18.8,
@@ -369,7 +369,7 @@ double tdl_d_amps_dB[] = {//-0.2,
#define TDL_D_RICEAN_FACTOR .046774
double tdl_e_delays[] = {0,
static double tdl_e_delays[] = {0,
0.5133,
0.5440,
0.5630,
@@ -385,7 +385,7 @@ double tdl_e_delays[] = {0,
20.6519
};
double tdl_e_amps_dB[] = {//-0.03,
static double tdl_e_amps_dB[] = {//-0.03,
//-22.03,
-.00433,
-15.8,
@@ -405,102 +405,78 @@ double tdl_e_amps_dB[] = {//-0.03,
#define TDL_E_RICEAN_FACTOR 0.0063096
double epa_delays[] = { 0,.03,.07,.09,.11,.19,.41};
double epa_amps_dB[] = {0.0,-1.0,-2.0,-3.0,-8.0,-17.2,-20.8};
static double epa_delays[] = { 0,.03,.07,.09,.11,.19,.41};
static double epa_amps_dB[] = {0.0,-1.0,-2.0,-3.0,-8.0,-17.2,-20.8};
double eva_delays[] = { 0,.03,.15,.31,.37,.71,1.09,1.73,2.51};
double eva_amps_dB[] = {0.0,-1.5,-1.4,-3.6,-0.6,-9.1,-7.0,-12.0,-16.9};
static double eva_delays[] = { 0,.03,.15,.31,.37,.71,1.09,1.73,2.51};
static double eva_amps_dB[] = {0.0,-1.5,-1.4,-3.6,-0.6,-9.1,-7.0,-12.0,-16.9};
double etu_delays[] = { 0,.05,.12,.2,.23,.5,1.6,2.3,5.0};
double etu_amps_dB[] = {-1.0,-1.0,-1.0,0.0,0.0,0.0,-3.0,-5.0,-7.0};
static double etu_delays[] = { 0,.05,.12,.2,.23,.5,1.6,2.3,5.0};
static double etu_amps_dB[] = {-1.0,-1.0,-1.0,0.0,0.0,0.0,-3.0,-5.0,-7.0};
double default_amps_lin[] = {0.3868472, 0.3094778, 0.1547389, 0.0773694, 0.0386847, 0.0193424, 0.0096712, 0.0038685};
double default_amp_lin[] = {1};
double ts_shift_delays[] = {0, 1/7.68};
double ts_shift_amps[] = {0, 1};
static double default_amps_lin[] = {0.3868472, 0.3094778, 0.1547389, 0.0773694, 0.0386847, 0.0193424, 0.0096712, 0.0038685};
static double default_amp_lin[] = {1};
//correlation matrix for a 2x2 channel with full Tx correlation
struct complex R_sqrt_22_corr_tap[16] = {{0.70711,0}, {0.0, 0.0}, {0.70711,0}, {0.0, 0.0},
static struct complex R_sqrt_22_corr[16] = {{0.70711,0}, {0.0, 0.0}, {0.70711,0}, {0.0, 0.0},
{0.0, 0.0}, {0.70711,0}, {0.0, 0.0}, {0.70711,0},
{0.70711,0}, {0.0, 0.0}, {0.70711,0}, {0.0, 0.0},
{0.0, 0.0}, {0.70711,0}, {0.0, 0.0}, {0.70711,0}
};
struct complex *R_sqrt_22_corr[1] = {R_sqrt_22_corr_tap};
//correlation matrix for a fully correlated 2x1 channel (h1==h2)
struct complex R_sqrt_21_corr_tap[4] = {{0.70711,0}, {0.70711,0}, {0.70711,0}, {0.70711,0}};
struct complex *R_sqrt_21_corr[1] = {R_sqrt_21_corr_tap};
static struct complex R_sqrt_21_corr[] = {{0.70711,0}, {0.70711,0}, {0.70711,0}, {0.70711,0}};
//correlation matrix for a 2x2 channel with full Tx anti-correlation
struct complex R_sqrt_22_anticorr_tap[16] = {{0.70711,0}, {0.0, 0.0}, {-0.70711,0}, {0.0, 0.0},
static struct complex R_sqrt_22_anticorr[16] = {{0.70711,0}, {0.0, 0.0}, {-0.70711,0}, {0.0, 0.0},
{0.0, 0.0}, {0.70711,0}, {0.0, 0.0}, {-0.70711,0},
{-0.70711,0}, {0.0, 0.0}, {0.70711,0}, {0.0, 0.0},
{0.0, 0.0}, {-0.70711,0}, {0.0, 0.0}, {0.70711,0}
};
struct complex *R_sqrt_22_anticorr[1] = {R_sqrt_22_anticorr_tap};
//correlation matrix for a fully anti-correlated 2x1 channel (h1==-h2)
struct complex R_sqrt_21_anticorr_tap[4] = {{0.70711,0}, {-0.70711,0}, {-0.70711,0}, {0.70711,0}};
struct complex *R_sqrt_21_anticorr[1] = {R_sqrt_21_anticorr_tap};
struct complex **R_sqrt_ptr2;
static struct complex R_sqrt_21_anticorr[4] = {{0.70711,0}, {-0.70711,0}, {-0.70711,0}, {0.70711,0}};
// full correlation matrix in vectorized form for 2x2 channel, where h1 is perfectly orthogonal to h2
struct complex R_sqrt_22_orthogonal_tap[16] = {{0.70711,0.0}, {0.0, 0.0}, {0.0,0.0}, {0.0, 0.0},
static struct complex R_sqrt_22_orthogonal[16] = {{0.70711,0.0}, {0.0, 0.0}, {0.0,0.0}, {0.0, 0.0},
{0.0, 0.0}, {0.0,0.0}, {0.0, 0.0}, {0.0,0.0},
{0.0,0.0}, {0.0, 0.0}, {0.0,0.0}, {0.0, 0.0},
{0.0, 0.0}, {0.0,0.0}, {0.0, 0.0}, {0.70711,0.0}
};
struct complex *R_sqrt_22_orthogonal[1] = {R_sqrt_22_orthogonal_tap};
// full correlation matrix for TM4 to make orthogonal effective channel
struct complex R_sqrt_22_orth_eff_ch_TM4_prec_real_tap[16] = {{0.70711,0.0}, {0.0, 0.0}, {0.70711,0.0}, {0.0, 0.0},
static struct complex R_sqrt_22_orth_eff_ch_TM4_prec_real[16] = {{0.70711,0.0}, {0.0, 0.0}, {0.70711,0.0}, {0.0, 0.0},
{0.0, 0.0}, {0.70711,0.0}, {0.0, 0.0}, {-0.70711,0.0},
{0.70711,0.0}, {0.0, 0.0}, {0.70711,0.0}, {0.0, 0.0},
{0.0, 0.0}, {-0.70711,0.0}, {0.0, 0.0}, {0.70711,0.0}
};
struct complex *R_sqrt_22_orth_eff_ch_TM4_prec_real[1] = {R_sqrt_22_orth_eff_ch_TM4_prec_real_tap};
struct complex R_sqrt_22_orth_eff_ch_TM4_prec_imag_tap[16] = {{0.70711,0.0}, {0.0,0.0}, {0.0, -0.70711}, {0.0,0.0},
static struct complex R_sqrt_22_orth_eff_ch_TM4_prec_imag[16] = {{0.70711,0.0}, {0.0,0.0}, {0.0, -0.70711}, {0.0,0.0},
{0.0, 0.0}, {0.70711,0.0}, {0.0, 0.0}, {0.0,0.70711},
{0.0,-0.70711}, {0.0, 0.0}, {-0.70711,0.0}, {0.0, 0.0},
{0.0, 0.0}, {0.0,0.70711}, {0.0, 0.0}, {-0.70711,0.0}
};
struct complex *R_sqrt_22_orth_eff_ch_TM4_prec_imag[1] = {R_sqrt_22_orth_eff_ch_TM4_prec_imag_tap};
//Correlation matrix for EPA channel
struct complex R_sqrt_22_EPA_low_tap[16] = {{1.0,0.0}, {0.0,0.0}, {0.0,0.0}, {0.0,0.0},
static struct complex R_sqrt_22_EPA_low[16] = {{1.0,0.0}, {0.0,0.0}, {0.0,0.0}, {0.0,0.0},
{0.0,0.0}, {1.0,0.0}, {0.0,0.0}, {0.0,0.0},
{0.0,0.0}, {0.0,0.0}, {1.0,0.0}, {0.0,0.0},
{0.0,0.0}, {0.0,0.0}, {0.0,0.0}, {1.0,0.0}
};
struct complex *R_sqrt_22_EPA_low[1] = {R_sqrt_22_EPA_low_tap};
struct complex R_sqrt_22_EPA_high_tap[16] = {
static struct complex R_sqrt_22_EPA_high[16] = {
{0.7179,0.0}, {0.4500,0.0}, {0.4500,0.0}, {0.2821,0.0},
{0.4500,0.0}, {0.7179,0.0}, {0.2821,0.0}, {0.4500,0.0},
{0.4500,0.0}, {0.2821,0.0}, {0.7179,0.0}, {0.4500,0.0},
{0.2821,0.0}, {0.4500,0.0}, {0.4500,0.0}, {0.7179,0.0}
};
struct complex *R_sqrt_22_EPA_high[1] = {R_sqrt_22_EPA_high_tap};
struct complex R_sqrt_22_EPA_medium_tap[16] = {{0.8375,0.0}, {0.5249,0.0}, {0.1286,0.0}, {0.0806,0.0},
static struct complex R_sqrt_22_EPA_medium[16] = {{0.8375,0.0}, {0.5249,0.0}, {0.1286,0.0}, {0.0806,0.0},
{0.5249,0.0}, {0.8375,0.0}, {0.0806,0.0}, {0.1286,0.0},
{0.1286,0.0}, {0.0806,0.0}, {0.8375,0.0}, {0.5249,0.0},
{0.0806,0.0}, {0.1286,0.0}, {0.5249,0.0}, {0.8375,0.0}
};
struct complex *R_sqrt_22_EPA_medium[1] = {R_sqrt_22_EPA_medium_tap};
//Rayleigh1_orth_eff_ch_TM4
@@ -600,6 +576,7 @@ channel_desc_t *new_channel_desc_scm(uint8_t nb_tx,
double sum_amps;
double aoa,ricean_factor,Td,maxDoppler;
int channel_length,nb_taps;
struct complex *R_sqrt_ptr2;
chan_desc->modelid = channel_model;
chan_desc->nb_tx = nb_tx;
chan_desc->nb_rx = nb_rx;
@@ -880,7 +857,7 @@ channel_desc_t *new_channel_desc_scm(uint8_t nb_tx,
chan_desc->R_sqrt = (struct complex **) malloc(chan_desc->nb_taps*sizeof(struct complex **));
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->R_sqrt[i] = R_sqrt_22_EPA_low[0];
chan_desc->R_sqrt[i] = R_sqrt_22_EPA_low;
} else {
printf("Correlation matrices are implemented for 2 x 2 only");
}
@@ -935,7 +912,7 @@ channel_desc_t *new_channel_desc_scm(uint8_t nb_tx,
chan_desc->R_sqrt = (struct complex **) malloc(chan_desc->nb_taps*sizeof(struct complex **));
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->R_sqrt[i] = R_sqrt_22_EPA_high[0];
chan_desc->R_sqrt[i] = R_sqrt_22_EPA_high;
} else {
printf("Correlation matrices are implemented for 2 x 2 only");
}
@@ -990,7 +967,7 @@ channel_desc_t *new_channel_desc_scm(uint8_t nb_tx,
chan_desc->R_sqrt = (struct complex **) malloc(chan_desc->nb_taps*sizeof(struct complex **));
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->R_sqrt[i] = R_sqrt_22_EPA_medium[0];
chan_desc->R_sqrt[i] = R_sqrt_22_EPA_medium;
} else {
printf("Correlation matrices are implemented for 2 x 2 only");
}
@@ -1397,11 +1374,13 @@ channel_desc_t *new_channel_desc_scm(uint8_t nb_tx,
case TS_SHIFT:
nb_taps = 2;
double ts_shift_delays[] = {0, 1/7.68};
Td = ts_shift_delays[1];
channel_length = 10;
ricean_factor = 0.0;
aoa = 0.0;
maxDoppler = 0;
double ts_shift_amps[] = {0, 1};
fill_channel_desc(chan_desc,nb_tx,
nb_rx,
nb_taps,
openair1/SIMULATION/TOOLS/scm_corrmat.h
+3 -3
View File
@@ -19,7 +19,7 @@
* contact@openairinterface.org
*/
double R22_sqrt[6][32] = {
static double R22_sqrt[6][32] = {
{0.921700, -0.000000, 0.010380, -0.027448, -0.250153, 0.294754, 0.005961, 0.010769, 0.010380, 0.027448, 0.921700, 0.000000, -0.011595, -0.004130, -0.250153, 0.294754, -0.250153, -0.294754, -0.011595, 0.004130, 0.921700, 0.000000, 0.010380, -0.027448, 0.005961, -0.010769, -0.250153, -0.294754, 0.010380, 0.027448, 0.921700, 0.000000},
{0.923810, 0.000000, 0.004069, 0.027832, 0.151730, 0.350180, -0.009882, 0.006114, 0.004069, -0.027832, 0.923810, 0.000000, 0.011218, -0.003029, 0.151730, 0.350180, 0.151730, -0.350180, 0.011218, 0.003029, 0.923810, -0.000000, 0.004069, 0.027832, -0.009882, -0.006114, 0.151730, -0.350180, 0.004069, -0.027832, 0.923810, 0.000000},
{0.927613, 0.000000, 0.014253, 0.025767, -0.061171, -0.367133, 0.009258, -0.007340, 0.014253, -0.025767, 0.927613, -0.000000, -0.011138, -0.003942, -0.061171, -0.367133, -0.061171, 0.367133, -0.011138, 0.003942, 0.927613, 0.000000, 0.014253, 0.025767, 0.009258, 0.007340, -0.061171, 0.367133, 0.014253, -0.025767, 0.927613, 0.000000},
@@ -27,7 +27,7 @@ double R22_sqrt[6][32] = {
{0.919726, -0.000000, 0.038700, -0.111146, 0.217804, 0.300925, 0.045531, -0.013659, 0.038700, 0.111146, 0.919726, 0.000000, -0.027201, 0.038983, 0.217804, 0.300925, 0.217804, -0.300925, -0.027201, -0.038983, 0.919726, 0.000000, 0.038700, -0.111146, 0.045531, 0.013659, 0.217804, -0.300925, 0.038700, 0.111146, 0.919726, 0.000000},
{0.867608, -0.000000, 0.194097, -0.112414, -0.418811, 0.095938, -0.081264, 0.075727, 0.194097, 0.112414, 0.867608, -0.000000, -0.106125, -0.032801, -0.418811, 0.095938, -0.418811, -0.095938, -0.106125, 0.032801, 0.867608, 0.000000, 0.194097, -0.112414, -0.081264, -0.075727, -0.418811, -0.095938, 0.194097, 0.112414, 0.867608, 0.000000},
};
double R21_sqrt[6][8] = {
static double R21_sqrt[6][8] = {
{0.922167, 0.000000,-0.250280, 0.294903,-0.250280, -0.294903,0.922167, 0.000000},
{0.924238, 0.000000,0.151801, 0.350342,0.151801, -0.350342,0.924238, 0.000000},
{0.928080, 0.000000,-0.061202, -0.367318,-0.061202, 0.367318,0.928080, 0.000000},
@@ -35,7 +35,7 @@ double R21_sqrt[6][8] = {
{0.927225, 0.000000,0.219580, 0.303378,0.219580, -0.303378,0.927225, 0.000000},
{0.896133, 0.000000,-0.432581, 0.099092,-0.432581, -0.099092,0.896133, 0.000000},
};
double R12_sqrt[6][8] = {
static double R12_sqrt[6][8] = {
{0.999494, 0.000000,0.011256, -0.029765,0.011256, 0.029765,0.999494, 0.000000},
{0.999537, 0.000000,0.004402, 0.030114,0.004402, -0.030114,0.999537, 0.000000},
{0.999497, 0.000000,0.015358, 0.027764,0.015358, -0.027764,0.999497, 0.000000},