fix CU assert and bugs discovered after
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@@ -32,16 +32,15 @@ gNBs =
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});
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nr_cellid = 12345678L
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# tr_s_preference = "local_mac"
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nr_cellid = 12345678L;
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////////// Physical parameters:
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ssb_SubcarrierOffset = 0;
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pdsch_AntennaPorts = 1;
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pusch_AntennaPorts = 1;
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sib1_tda = 1;
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min_rxtxtime = 6;
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sib1_tda = 0;
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pdcch_ConfigSIB1 = (
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{
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@@ -72,26 +71,22 @@ gNBs =
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#initialDownlinkBWP
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#genericParameters
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# this is RBstart=27,L=48 (275*(L-1))+RBstart
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initialDLBWPlocationAndBandwidth = 12952;
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initialDLBWPlocationAndBandwidth = 28875; # 6366 12925 12956 28875 12952
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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initialDLBWPsubcarrierSpacing = 1;
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#pdcch-ConfigCommon
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initialDLBWPcontrolResourceSetZero = 11;
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initialDLBWPcontrolResourceSetZero = 12;
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initialDLBWPsearchSpaceZero = 0;
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#pdsch-ConfigCommon
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#pdschTimeDomainAllocationList (up to 16 entries)
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initialDLBWPk0_0 = 0;
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#initialULBWPmappingType
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#0=typeA,1=typeB
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initialDLBWPmappingType_0 = 0;
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#this is SS=1,L=13
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initialDLBWPstartSymbolAndLength_0 = 40;
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initialDLBWPk0_0 = 0; #for DL slot
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initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
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initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
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initialDLBWPk0_1 = 0;
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initialDLBWPk0_1 = 0; #for mixed slot
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initialDLBWPmappingType_1 = 0;
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#this is SS=2,L=12
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initialDLBWPstartSymbolAndLength_1 = 57;
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initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
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#uplinkConfigCommon
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#frequencyInfoUL
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@@ -105,7 +100,7 @@ gNBs =
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pMax = 20;
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#initialUplinkBWP
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#genericParameters
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initialULBWPlocationAndBandwidth = 12952;
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initialULBWPlocationAndBandwidth = 28875;
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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initialULBWPsubcarrierSpacing = 1;
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@@ -117,7 +112,7 @@ gNBs =
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prach_msg1_FDM = 0;
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prach_msg1_FrequencyStart = 0;
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zeroCorrelationZoneConfig = 13;
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preambleReceivedTargetPower = -118;
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preambleReceivedTargetPower = -96;
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#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
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preambleTransMax = 6;
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#powerRampingStep
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@@ -147,20 +142,17 @@ gNBs =
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restrictedSetConfig = 0,
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# pusch-ConfigCommon (up to 16 elements)
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initialULBWPk2_0 = 6;
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initialULBWPk2_0 = 6; # used for UL slot
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initialULBWPmappingType_0 = 1
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# this is SS=0 L=11
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initialULBWPstartSymbolAndLength_0 = 41;
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initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
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initialULBWPk2_1 = 6;
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initialULBWPk2_1 = 6; # used for mixed slot
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initialULBWPmappingType_1 = 1;
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# this is SS=0 L=12
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initialULBWPstartSymbolAndLength_1 = 52;
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initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4
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initialULBWPk2_2 = 7;
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initialULBWPk2_2 = 7; # used for Msg.3 during RA
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initialULBWPmappingType_2 = 1;
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# this is SS=10 L=4
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initialULBWPstartSymbolAndLength_2 = 52;
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initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
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msg3_DeltaPreamble = 1;
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p0_NominalWithGrant =-90;
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@@ -239,6 +231,9 @@ L1s = (
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num_cc = 1;
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tr_n_preference = "local_mac";
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pusch_proc_threads = 8;
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prach_dtx_threshold = 120;
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pucch0_dtx_threshold = 150;
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ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
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}
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);
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@@ -249,21 +244,13 @@ RUs = (
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nb_rx = 1
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att_tx = 0
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att_rx = 0;
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bands = [7];
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bands = [78];
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max_pdschReferenceSignalPower = -27;
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max_rxgain = 75;
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max_rxgain = 114;
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eNB_instances = [0];
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##beamforming 1x2 matrix: 1 layer x 2 antennas
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bf_weights = [0x00007fff, 0x0000];
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##beamforming 1x4 matrix: 1 layer x 4 antennas
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#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
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## beamforming 2x2 matrix:
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# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
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## beamforming 4x4 matrix:
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#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
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sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
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clock_src = "external";
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#beamforming 1x4 matrix:
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bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
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clock_src = "internal";
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}
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);
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@@ -277,6 +264,10 @@ THREAD_STRUCT = (
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);
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rfsimulator: {
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serveraddr = "server";
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serverport = "4043";
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options = (); #("saviq"); or/and "chanmod"
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modelname = "AWGN";
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IQfile = "/tmp/rfsimulator.iqs"
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}
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log_config :
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