bugfixing for UL. Remaining problems: CCE allocations in subframe 5 lead to occasional illegal DCI allocations (affects UL DCI which is missed by UE). waveform compliance with CQI in ULSCH.

This commit is contained in:
Raymond Knopp
2016-04-10 23:25:58 +02:00
parent 15cd4ab077
commit 2dfe84a7e4
16 changed files with 810 additions and 1216 deletions
+12
View File
@@ -184,6 +184,12 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
size_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
size_bits = sizeof_DCI1A_1_5MHz_FDD_t;
break;
case 15:/*
((DCI1A_2_5MHz_FDD_t*)DLSCH_dci)->type = 1;
((DCI1A_2_5MHz_FDD_t*)DLSCH_dci)->rballoc = 31;
size_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
size_bits = sizeof_DCI1A_1_5MHz_FDD_t;*/
break;
case 25:
((DCI1A_5MHz_FDD_t*)DLSCH_dci)->type = 1;
((DCI1A_5MHz_FDD_t*)DLSCH_dci)->rballoc = 511;
@@ -196,6 +202,12 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
size_bytes = sizeof(DCI1A_10MHz_FDD_t);
size_bits = sizeof_DCI1A_10MHz_FDD_t;
break;
case 75:
/* ((DCI1A_15MHz_FDD_t*)DLSCH_dci)->type = 1;
((DCI1A_15MHz_FDD_t*)DLSCH_dci)->rballoc = 2047;
size_bytes = sizeof(DCI1A_10MHz_FDD_t);
size_bits = sizeof_DCI1A_10MHz_FDD_t;*/
break;
case 100:
((DCI1A_20MHz_FDD_t*)DLSCH_dci)->type = 1;
((DCI1A_20MHz_FDD_t*)DLSCH_dci)->rballoc = 8191;
+3 -14
View File
@@ -183,21 +183,10 @@ void rx_sdu(
UE_list->UE_template[CC_idP][UE_id].bsr_info[lcgid] = (payload_ptr[0] & 0x3f);
// update buffer info
// old_buffer_info = UE_list->UE_template[CC_idP][UE_id].ul_buffer_info[lcgid];
UE_list->UE_template[CC_idP][UE_id].ul_buffer_info[lcgid]=BSR_TABLE[UE_list->UE_template[CC_idP][UE_id].bsr_info[lcgid]];
UE_list->UE_template[CC_idP][UE_id].ul_total_buffer+= UE_list->UE_template[CC_idP][UE_id].ul_buffer_info[lcgid];
/*
if (UE_list->UE_template[CC_idP][UE_id].ul_total_buffer >= old_buffer_info)
UE_list->UE_template[CC_idP][UE_id].ul_total_buffer -= old_buffer_info;
else
UE_list->UE_template[CC_idP][UE_id].ul_total_buffer = 0;
*/
if (UE_list->UE_template[CC_idP][UE_id].ul_total_buffer >= 300000)
UE_list->UE_template[CC_idP][UE_id].ul_total_buffer = 300000;
UE_list->UE_template[CC_idP][UE_id].ul_total_buffer= UE_list->UE_template[CC_idP][UE_id].ul_buffer_info[lcgid];
PHY_vars_eNB_g[enb_mod_idP][CC_idP]->pusch_stats_bsr[UE_id][(frameP*10)+subframeP] = (payload_ptr[0] & 0x3f);
if (UE_id == UE_list->head)
@@ -784,7 +773,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
UE_sched_ctrl->ul_failure_timer);
// reset the scheduling request
UE_template->ul_SR = 0;
aggregation = process_ue_cqi(module_idP,UE_id); // =2 by default!!
aggregation = process_ue_cqi(module_idP,UE_id);
status = mac_eNB_get_rrc_status(module_idP,rnti);
if (status < RRC_CONNECTED)
cqi_req = 0;
@@ -838,7 +827,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power=target_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1=UE_template->pre_assigned_mcs_ul;
mcs = cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
if ((cqi_req==1) && (mcs==20)) {
if ((cqi_req==1) && (mcs>19)) {
mcs=19;
}
if (UE_template->pre_allocated_rb_table_index_ul >=0) {
+18
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@@ -119,6 +119,7 @@ const char* eurecomVariablesNames[] = {
"mp_free",
"ue_inst_cnt_rx",
"ue_inst_cnt_tx",
"dci_info",
"ue0_BSR",
"ue0_BO",
"ue0_scheduled",
@@ -133,6 +134,14 @@ const char* eurecomVariablesNames[] = {
"ue0_rssi5",
"ue0_rssi6",
"ue0_rssi7",
"ue0_res0",
"ue0_res1",
"ue0_res2",
"ue0_res3",
"ue0_res4",
"ue0_res5",
"ue0_res6",
"ue0_res7",
"ue0_MCS0",
"ue0_MCS1",
"ue0_MCS2",
@@ -157,6 +166,14 @@ const char* eurecomVariablesNames[] = {
"ue0_ROUND5",
"ue0_ROUND6",
"ue0_ROUND7",
"ue0_SFN0",
"ue0_SFN1",
"ue0_SFN2",
"ue0_SFN3",
"ue0_SFN4",
"ue0_SFN5",
"ue0_SFN6",
"ue0_SFN7",
};
const char* eurecomFunctionsNames[] = {
@@ -238,6 +255,7 @@ const char* eurecomFunctionsNames[] = {
"macxface_phy_config_sib2_eNB",
"macxface_phy_config_dedicated_eNB",
"phy_ue_compute_prach",
"phy_enb_ulsch_msg3",
"phy_enb_ulsch_decoding0",
"phy_enb_ulsch_decoding1",
"phy_enb_ulsch_decoding2",
+18
View File
@@ -91,6 +91,7 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLE_MP_FREE,
VCD_SIGNAL_DUMPER_VARIABLES_UE_INST_CNT_RX,
VCD_SIGNAL_DUMPER_VARIABLES_UE_INST_CNT_TX,
VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_BSR,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_SCHEDULED,
@@ -105,6 +106,14 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RSSI5,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RSSI6,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RSSI7,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES0,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES1,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES2,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES3,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES4,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES5,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES6,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES7,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_MCS0,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_MCS1,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_MCS2,
@@ -129,6 +138,14 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_UE0_ROUND5,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_ROUND6,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_ROUND7,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN0,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN1,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN2,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN3,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN4,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN5,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN6,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN7,
VCD_SIGNAL_DUMPER_VARIABLES_LAST,
VCD_SIGNAL_DUMPER_VARIABLES_END = VCD_SIGNAL_DUMPER_VARIABLES_LAST,
} vcd_signal_dump_variables;
@@ -212,6 +229,7 @@ typedef enum {
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_CONFIG_SIB2_ENB,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_CONFIG_DEDICATED_ENB,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_COMPUTE_PRACH,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_ULSCH_MSG3,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_ULSCH_DECODING0,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_ULSCH_DECODING1,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_ULSCH_DECODING2,