Merge remote-tracking branch 'origin/develop-NR_SA_F1AP_5GRECORDS-abs' into NR_UE_SA

This commit is contained in:
francescomani
2021-07-14 10:35:09 +02:00
582 changed files with 18721 additions and 10036 deletions
+2 -1
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@@ -40,7 +40,8 @@
#include "assertions.h"
#include "common/utils/load_module_shlib.h"
#include "common/utils/LOG/log.h"
#include "targets/RT/USER/lte-softmodem.h"
//#include "targets/RT/USER/lte-softmodem.h"
#include "executables/softmodem-common.h"
char *get_devname(int devtype) {
char *devnames[MAX_RF_DEV_TYPE]=DEVTYPE_NAMES;
+3
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@@ -561,7 +561,10 @@ extern int read_recplayconfig(recplay_conf_t **recplay_conf, recplay_state_t **r
extern void iqrecorder_end(openair0_device *device);
#include <unistd.h>
#ifndef gettid
#define gettid() syscall(__NR_gettid)
#endif
/*@}*/
@@ -45,7 +45,6 @@
#include "common_lib.h"
#include "ethernet_lib.h"
#include "common/ran_context.h"
//#define DEBUG 1
@@ -414,7 +413,7 @@ int trx_eth_read_udp(openair0_device *device, openair0_timestamp *timestamp, voi
char *temp_rx0 = ((char *)&temp_rx[1])-APP_HEADER_SIZE_BYTES;
#endif
#elif defined(__arm__) || defined(__aarch64__)
int nsamps2 = (payload_size>>4)+1
int nsamps2 = (payload_size>>4)+1;
int16x8_t temp_rx[nsamps2];
char *temp_rx0 = ((char *)&temp_rx[1])-APP_HEADER_SIZE_BYTES;
#else
@@ -42,6 +42,7 @@
#include <unistd.h>
#include <errno.h>
#include <linux/sysctl.h>
#include <sys/sysctl.h>
#include "common_lib.h"
#include "ethernet_lib.h"
+54 -34
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@@ -385,14 +385,14 @@ static int trx_usrp_write(openair0_device *device,
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
__m256i buff_tx[cc<2?2:cc][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
__m128i buff_tx[cc<2?2:cc][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
int16x8_t buff_tx[cc<2?2:cc][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
@@ -464,6 +464,7 @@ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_BEAM_SWITCHI
write_package[end].buff[i] = buff[i];
write_thread->count_write++;
write_thread->end = (write_thread->end + 1)% MAX_WRITE_THREAD_PACKAGE;
LOG_D(HW,"Signaling TX TS %llu\n",(unsigned long long)timestamp);
pthread_cond_signal(&write_thread->cond_write);
pthread_mutex_unlock(&write_thread->mutex_write);
return 0;
@@ -522,14 +523,14 @@ void *trx_usrp_write_thread(void * arg){
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
__m256i buff_tx[cc<2?2:cc][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
__m128i buff_tx[cc<2?2:cc][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
int16x8_t buff_tx[cc<2?2:cc][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
@@ -623,40 +624,53 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tmp[2][nsamps2];
__m256i buff_tmp[cc<2 ? 2 : cc][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tmp[2][nsamps2];
__m128i buff_tmp[cc<2 ? 2 : cc][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tmp[2][nsamps2];
int16x8_t buff_tmp[cc<2 ? 2 : cc][nsamps2];
#endif
if (cc>1) {
int rxshift;
switch (device->type) {
case USRP_B200_DEV:
rxshift=4;
break;
case USRP_X300_DEV:
case USRP_N300_DEV:
rxshift=2;
break;
default:
AssertFatal(1==0,"Shouldn't be here\n");
}
samples_received=0;
while (samples_received != nsamps) {
if (cc>1) {
// receive multiple channels (e.g. RF A and RF B)
std::vector<void *> buff_ptrs;
std::vector<void *> buff_ptrs;
for (int i=0; i<cc; i++) buff_ptrs.push_back(buff_tmp[i]);
for (int i=0; i<cc; i++) buff_ptrs.push_back(buff_tmp[i]+samples_received);
samples_received = s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md);
} else {
samples_received += s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md);
} else {
// receive a single channel (e.g. from connector RF A)
samples_received=0;
while (samples_received != nsamps) {
samples_received += s->rx_stream->recv((void*)((int32_t*)buff_tmp[0]+samples_received),
nsamps-samples_received, s->rx_md);
if ((s->wait_for_first_pps == 0) && (s->rx_md.error_code!=uhd::rx_metadata_t::ERROR_CODE_NONE))
break;
if ((s->wait_for_first_pps == 1) && (samples_received != nsamps)) {
printf("sleep...\n"); //usleep(100);
}
}
if (samples_received == nsamps) s->wait_for_first_pps=0;
if ((s->wait_for_first_pps == 0) && (s->rx_md.error_code!=uhd::rx_metadata_t::ERROR_CODE_NONE))
break;
if ((s->wait_for_first_pps == 1) && (samples_received != nsamps)) {
printf("sleep...\n"); //usleep(100);
}
}
if (samples_received == nsamps) s->wait_for_first_pps=0;
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
@@ -666,17 +680,17 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
// FK: in some cases the buffer might not be 32 byte aligned, so we cannot use avx2
if ((((uintptr_t) buff[i])&0x1F)==0) {
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],4);
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],rxshift);
} else {
((__m128i *)buff[i])[2*j] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j],4);
((__m128i *)buff[i])[2*j+1] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j+1],4);
((__m128i *)buff[i])[2*j] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j],rxshift);
((__m128i *)buff[i])[2*j+1] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j+1],rxshift);
}
#else
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],4);
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],rxshift);
#endif
#elif defined(__arm__)
((int16x8_t *)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],4);
((int16x8_t *)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],rxshift);
#endif
}
}
@@ -1239,10 +1253,14 @@ extern "C" {
set_rx_gain_offset(&openair0_cfg[0],i,bw_gain_adjust);
::uhd::gain_range_t gain_range = s->usrp->get_rx_gain_range(i);
// limit to maximum gain
AssertFatal( openair0_cfg[0].rx_gain[i]-openair0_cfg[0].rx_gain_offset[i] <= gain_range.stop(),
"RX Gain too high, lower by %f dB\n",
openair0_cfg[0].rx_gain[i]-openair0_cfg[0].rx_gain_offset[i] - gain_range.stop());
s->usrp->set_rx_gain(openair0_cfg[0].rx_gain[i]-openair0_cfg[0].rx_gain_offset[i],i);
double gain=openair0_cfg[0].rx_gain[i]-openair0_cfg[0].rx_gain_offset[i];
if ( gain > gain_range.stop()) {
LOG_E(HW,"RX Gain too high, lower by %f dB\n",
gain - gain_range.stop());
gain=gain_range.stop();
}
s->usrp->set_rx_gain(gain,i);
LOG_I(HW,"RX Gain %d %f (%f) => %f (max %f)\n",i,
openair0_cfg[0].rx_gain[i],openair0_cfg[0].rx_gain_offset[i],
openair0_cfg[0].rx_gain[i]-openair0_cfg[0].rx_gain_offset[i],gain_range.stop());
@@ -1284,8 +1302,10 @@ extern "C" {
LOG_I(HW,"rx_max_num_samps %zu\n",
s->usrp->get_rx_stream(stream_args_rx)->get_max_num_samps());
for (int i = 0; i<openair0_cfg[0].rx_num_channels; i++)
for (int i = 0; i<openair0_cfg[0].rx_num_channels; i++) {
LOG_I(HW,"setting rx channel %d\n",i);
stream_args_rx.channels.push_back(i);
}
s->rx_stream = s->usrp->get_rx_stream(stream_args_rx);
uhd::stream_args_t stream_args_tx("sc16", "sc16");
-3
View File
@@ -61,10 +61,7 @@
#define MAX_SIMULATION_CONNECTED_NODES 5
#define GENERATE_CHANNEL 10 //each frame in DL
// Fixme: datamodel, external variables in .h files, ...
#include <common/ran_context.h>
extern RAN_CONTEXT_t RC;
//
#define RFSIMU_SECTION "rfsimulator"
+19 -3
View File
@@ -6,23 +6,39 @@
# define NUMBER_OF_gNB_MAX 1
# define NUMBER_OF_RU_MAX 2
# define NUMBER_OF_NR_RU_MAX 2
# define NUMBER_OF_UCI_MAX 16
# define NUMBER_OF_ULSCH_MAX 8
# define NUMBER_OF_DLSCH_MAX 8
# define NUMBER_OF_SRS_MAX 16
# define NUMBER_OF_NR_ULSCH_MAX 8
# define NUMBER_OF_NR_DLSCH_MAX 8
# define NUMBER_OF_NR_UCI_MAX 16
# define nUMBER_OF_NR_SRS_MAX 16
# define NUMBER_OF_SCH_STATS_MAX 16
# define NUMBER_OF_NR_SCH_STATS_MAX 16
# define NUMBER_OF_NR_PUCCH_MAX 16
# define NUMBER_OF_NR_SR_MAX 16
# define NUMBER_OF_NR_PDCCH_MAX 16
#define MAX_MANAGED_ENB_PER_MOBILE 2
#define MAX_MANAGED_GNB_PER_MOBILE 2
# ifndef PHYSIM
# ifndef UE_EXPANSION
# define NUMBER_OF_UE_MAX 4
# define NUMBER_OF_NR_UE_MAX 4
# define NUMBER_OF_UCI_VARS_MAX 14
# define NUMBER_OF_CONNECTED_eNB_MAX 1
# define NUMBER_OF_CONNECTED_gNB_MAX 1
# else
# define NUMBER_OF_UE_MAX 256
# define NUMBER_OF_UCI_VARS_MAX 256
# define NUMBER_OF_CONNECTED_eNB_MAX 1
# define NUMBER_OF_CONNECTED_gNB_MAX 1
# endif
# else
# define NUMBER_OF_UE_MAX 4
# define NUMBER_OF_NR_UE_MAX 4
# define NUMBER_OF_UCI_VARS_MAX 56
# define NUMBER_OF_CONNECTED_eNB_MAX 1
# define NUMBER_OF_CONNECTED_gNB_MAX 1
# endif
@@ -15,7 +15,8 @@ gNBs =
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 222; mnc = 01; mnc_length = 2;});
#plmn_list = ({mcc = 222; mnc = 01; mnc_length = 2;});
plmn_list = ({mcc = 208; mnc = 99; mnc_length = 2;});
tr_s_preference = "local_mac"
@@ -92,9 +93,9 @@ gNBs =
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 74;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -118;
#preambleReceivedTargetPower = -118;
#preambleReceivedTargetPower = -104;
#preambleReceivedTargetPower = -108;
preambleReceivedTargetPower = -108;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
@@ -124,13 +125,13 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
@@ -196,7 +197,7 @@ gNBs =
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.18.99";
mme_ip_address = ( { ipv4 = "192.168.18.150"; #"192.168.18.99";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
@@ -1,289 +0,0 @@
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 208; mnc = 93; mnc_length = 2;});
tr_s_preference = "local_mac"
////////// Physical parameters:
component_carriers = (
{
node_function = "3GPP_gNODEB";
node_timing = "synch_to_ext_device";
node_synch_ref = 0;
frame_type = "TDD";
DL_prefix_type = "NORMAL";
UL_prefix_type = "NORMAL";
eutra_band = 78;
downlink_frequency = 3510000000L;
uplink_frequency_offset = -120000000;
Nid_cell = 0;
N_RB_DL = 106;
nb_antenna_ports = 1;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 125;
MIB_subCarrierSpacingCommon = 30;
MIB_ssb_SubcarrierOffset = 0;
MIB_dmrs_TypeA_Position = 2;
pdcch_ConfigSIB1 = 0;
SIB1_frequencyOffsetSSB = "khz5";
SIB1_ssb_PeriodicityServingCell = 5;
SIB1_ss_PBCH_BlockPower = -60;
absoluteFrequencySSB = 0;
DL_FreqBandIndicatorNR = 15;
DL_absoluteFrequencyPointA = 15;
DL_offsetToCarrier = 15;
DL_SCS_SubcarrierSpacing = "kHz30";
DL_SCS_SpecificCarrier_k0 = 0;
DL_carrierBandwidth = 15;
DL_locationAndBandwidth = 15;
DL_BWP_SubcarrierSpacing = "kHz30";
DL_BWP_prefix_type = "NORMAL";
UL_FreqBandIndicatorNR = 15;
UL_absoluteFrequencyPointA = 13;
UL_additionalSpectrumEmission = 3;
UL_p_Max = -1;
UL_frequencyShift7p5khz = "TRUE";
UL_offsetToCarrier = 10;
UL_SCS_SubcarrierSpacing = "kHz30";
UL_SCS_SpecificCarrier_k0 = 0;
UL_carrierBandwidth = 15;
UL_locationAndBandwidth = 15;
UL_BWP_SubcarrierSpacing = "kHz30";
UL_BWP_prefix_type = "NORMAL";
UL_timeAlignmentTimerCommon = "infinity";
ServingCellConfigCommon_n_TimingAdvanceOffset = "n0"
ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0x01;
ServingCellConfigCommon_ssb_periodicityServingCell = 10;
ServingCellConfigCommon_dmrs_TypeA_Position = 2;
NIA_SubcarrierSpacing = "kHz15";
ServingCellConfigCommon_ss_PBCH_BlockPower = -60;
referenceSubcarrierSpacing = "kHz15";
dl_UL_TransmissionPeriodicity = "ms0p5";
nrofDownlinkSlots = 10;
nrofDownlinkSymbols = 10;
nrofUplinkSlots = 10;
nrofUplinkSymbols = 10;
rach_totalNumberOfRA_Preambles = 63;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_choice = "oneEighth";
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneEighth = 4;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneFourth = 8;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneHalf = 16;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_one = 24;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_two = 32;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_four = 8;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_eight = 4;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_sixteen = 2;
rach_groupBconfigured = "ENABLE";
rach_ra_Msg3SizeGroupA = 56;
rach_messagePowerOffsetGroupB = "dB0";
rach_numberOfRA_PreamblesGroupA = 32;
rach_ra_ContentionResolutionTimer = 8;
rsrp_ThresholdSSB = 64;
rsrp_ThresholdSSB_SUL = 64;
prach_RootSequenceIndex_choice = "l839";
prach_RootSequenceIndex_l839 = 0;
prach_RootSequenceIndex_l139 = 0;
prach_msg1_SubcarrierSpacing = "kHz30";
restrictedSetConfig = "unrestrictedSet";
msg3_transformPrecoding = "ENABLE";
prach_ConfigurationIndex = 10;
prach_msg1_FDM = "one";
prach_msg1_FrequencyStart = 10;
zeroCorrelationZoneConfig = 10;
preambleReceivedTargetPower = -150;
preambleTransMax = 6;
powerRampingStep = "dB0";
ra_ResponseWindow = 8;
groupHoppingEnabledTransformPrecoding = "ENABLE";
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = 0;
PUSCH_TimeDomainResourceAllocation_k2 = 0;
PUSCH_TimeDomainResourceAllocation_mappingType = "typeA";
PUSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0;
pucch_ResourceCommon = 0;
pucch_GroupHopping = "neither";
hoppingId = 0;
p0_nominal = -30;
PDSCH_TimeDomainResourceAllocation_k0 = 2;
PDSCH_TimeDomainResourceAllocation_mappingType = "typeA";
PDSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0;
rateMatchPatternId = 0;
RateMatchPattern_patternType = "bitmaps";
symbolsInResourceBlock = "oneSlot";
periodicityAndPattern = 2;
RateMatchPattern_controlResourceSet = 5;
RateMatchPattern_subcarrierSpacing = "kHz30";
RateMatchPattern_mode = "dynamic";
controlResourceSetZero = 0;
searchSpaceZero = 0;
searchSpaceSIB1 = 10;
searchSpaceOtherSystemInformation = 10;
pagingSearchSpace = 10;
ra_SearchSpace = 10;
PDCCH_common_controlResourceSetId = 5;
PDCCH_common_ControlResourceSet_duration = 2;
PDCCH_cce_REG_MappingType = "nonInterleaved";
PDCCH_reg_BundleSize = 3;
PDCCH_interleaverSize = 3;
PDCCH_shiftIndex = 10;
PDCCH_precoderGranularity = "sameAsREG-bundle";
PDCCH_TCI_StateId = 32;
tci_PresentInDCI = "ENABLE";
PDCCH_DMRS_ScramblingID = 0;
SearchSpaceId = 10;
commonSearchSpaces_controlResourceSetId = 5;
SearchSpace_monitoringSlotPeriodicityAndOffset_choice = "sl1";
SearchSpace_monitoringSlotPeriodicityAndOffset_value = 0;
SearchSpace_duration = 2;
SearchSpace_nrofCandidates_aggregationLevel1 = 0;
SearchSpace_nrofCandidates_aggregationLevel2 = 0;
SearchSpace_nrofCandidates_aggregationLevel4 = 0;
SearchSpace_nrofCandidates_aggregationLevel8 = 0;
SearchSpace_nrofCandidates_aggregationLevel16 = 0;
SearchSpace_searchSpaceType = "common";
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel1 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel2 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel4 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel8 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel16 = 1;
Common_dci_Format2_3_monitoringPeriodicity = 1;
Common_dci_Format2_3_nrofPDCCH_Candidates = 1;
ue_Specific__dci_Formats = "formats0-0-And-1-0";
RateMatchPatternLTE_CRS_carrierFreqDL = 6;
RateMatchPatternLTE_CRS_carrierBandwidthDL = 6;
RateMatchPatternLTE_CRS_nrofCRS_Ports = 1;
RateMatchPatternLTE_CRS_v_Shift = 0;
RateMatchPatternLTE_CRS_radioframeAllocationPeriod = 1;
RateMatchPatternLTE_CRS_radioframeAllocationOffset = 0;
RateMatchPatternLTE_CRS_subframeAllocation_choice = "oneFrame";
}
);
srb1_parameters :
{
# timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500]
timer_poll_retransmit = 80;
# timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200]
timer_reordering = 35;
# timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500]
timer_status_prohibit = 0;
# poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)]
poll_pdu = 4;
# poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)]
poll_byte = 99999;
# max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32]
max_retx_threshold = 4;
}
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_S1_MME = "eth0";
GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2,mgmt_addr=192.168.100.8";
}
);
NETWORK_CONTROLLER :
{
FLEXRAN_ENABLED = "no";
FLEXRAN_INTERFACE_NAME = "lo";
FLEXRAN_IPV4_ADDRESS = "127.0.0.1";
FLEXRAN_PORT = 2210;
FLEXRAN_CACHE = "/mnt/oai_agent_cache";
FLEXRAN_AWAIT_RECONF = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
@@ -58,27 +58,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 261;
@@ -135,8 +122,7 @@ gNBs =
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
@@ -58,27 +58,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
@@ -133,20 +120,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 4;
initialULBWPk2_2 = 4; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -56,22 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot (but is not used here)
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
@@ -126,15 +118,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot (not used here)
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
@@ -58,27 +58,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 261;
@@ -133,20 +120,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 4;
initialULBWPk2_2 = 4; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -56,27 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 66;
@@ -132,20 +119,18 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7;
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -56,27 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 66;
@@ -132,20 +119,18 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7;
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -56,22 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
@@ -126,16 +118,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -56,27 +56,13 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4
initialDLBWPstartSymbolAndLength_3 = 57;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -132,21 +118,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7;
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -56,22 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot (but not used here)
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
@@ -126,16 +118,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 63; # this is SS=7 L=5
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 91; # this is SS=7 L=7
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -56,27 +56,13 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4
initialDLBWPstartSymbolAndLength_3 = 57;
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -134,8 +120,7 @@ gNBs =
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
@@ -1,288 +0,0 @@
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 208; mnc = 93; mnc_length = 2;});
tr_s_preference = "local_mac"
////////// Physical parameters:
component_carriers = (
{
node_function = "3GPP_gNODEB";
node_timing = "synch_to_ext_device";
node_synch_ref = 0;
frame_type = "TDD";
DL_prefix_type = "NORMAL";
UL_prefix_type = "NORMAL";
eutra_band = 78;
downlink_frequency = 3510000000L;
uplink_frequency_offset = 0;
Nid_cell = 0;
N_RB_DL = 106;
nb_antenna_ports = 1;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 125;
MIB_subCarrierSpacingCommon = 30;
MIB_ssb_SubcarrierOffset = 0;
MIB_dmrs_TypeA_Position = 2;
pdcch_ConfigSIB1 = 0;
SIB1_frequencyOffsetSSB = "khz5";
SIB1_ssb_PeriodicityServingCell = 5;
SIB1_ss_PBCH_BlockPower = -60;
absoluteFrequencySSB = 0;
DL_FreqBandIndicatorNR = 15;
DL_absoluteFrequencyPointA = 15;
DL_offsetToCarrier = 15;
DL_SCS_SubcarrierSpacing = "kHz30";
DL_SCS_SpecificCarrier_k0 = 0;
DL_carrierBandwidth = 15;
DL_locationAndBandwidth = 15;
DL_BWP_SubcarrierSpacing = "kHz30";
DL_BWP_prefix_type = "NORMAL";
UL_FreqBandIndicatorNR = 15;
UL_absoluteFrequencyPointA = 13;
UL_additionalSpectrumEmission = 3;
UL_p_Max = -1;
UL_frequencyShift7p5khz = "TRUE";
UL_offsetToCarrier = 10;
UL_SCS_SubcarrierSpacing = "kHz30";
UL_SCS_SpecificCarrier_k0 = 0;
UL_carrierBandwidth = 15;
UL_locationAndBandwidth = 15;
UL_BWP_SubcarrierSpacing = "kHz30";
UL_BWP_prefix_type = "NORMAL";
UL_timeAlignmentTimerCommon = "infinity";
ServingCellConfigCommon_n_TimingAdvanceOffset = "n0"
ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0x01;
ServingCellConfigCommon_ssb_periodicityServingCell = 10;
ServingCellConfigCommon_dmrs_TypeA_Position = 2;
NIA_SubcarrierSpacing = "kHz15";
ServingCellConfigCommon_ss_PBCH_BlockPower = -60;
referenceSubcarrierSpacing = "kHz15";
dl_UL_TransmissionPeriodicity = "ms0p5";
nrofDownlinkSlots = 10;
nrofDownlinkSymbols = 10;
nrofUplinkSlots = 10;
nrofUplinkSymbols = 10;
rach_totalNumberOfRA_Preambles = 63;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_choice = "oneEighth";
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneEighth = 4;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneFourth = 8;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneHalf = 16;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_one = 24;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_two = 32;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_four = 8;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_eight = 4;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_sixteen = 2;
rach_groupBconfigured = "ENABLE";
rach_ra_Msg3SizeGroupA = 56;
rach_messagePowerOffsetGroupB = "dB0";
rach_numberOfRA_PreamblesGroupA = 32;
rach_ra_ContentionResolutionTimer = 8;
rsrp_ThresholdSSB = 64;
rsrp_ThresholdSSB_SUL = 64;
prach_RootSequenceIndex_choice = "l839";
prach_RootSequenceIndex_l839 = 0;
prach_RootSequenceIndex_l139 = 0;
prach_msg1_SubcarrierSpacing = "kHz30";
restrictedSetConfig = "unrestrictedSet";
msg3_transformPrecoding = "ENABLE";
prach_ConfigurationIndex = 10;
prach_msg1_FDM = "one";
prach_msg1_FrequencyStart = 10;
zeroCorrelationZoneConfig = 10;
preambleReceivedTargetPower = -150;
preambleTransMax = 6;
powerRampingStep = "dB0";
ra_ResponseWindow = 8;
groupHoppingEnabledTransformPrecoding = "ENABLE";
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = 0;
PUSCH_TimeDomainResourceAllocation_k2 = 0;
PUSCH_TimeDomainResourceAllocation_mappingType = "typeA";
PUSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0;
pucch_ResourceCommon = 0;
pucch_GroupHopping = "neither";
hoppingId = 0;
p0_nominal = -30;
PDSCH_TimeDomainResourceAllocation_k0 = 2;
PDSCH_TimeDomainResourceAllocation_mappingType = "typeA";
PDSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0;
rateMatchPatternId = 0;
RateMatchPattern_patternType = "bitmaps";
symbolsInResourceBlock = "oneSlot";
periodicityAndPattern = 2;
RateMatchPattern_controlResourceSet = 5;
RateMatchPattern_subcarrierSpacing = "kHz30";
RateMatchPattern_mode = "dynamic";
controlResourceSetZero = 0;
searchSpaceZero = 0;
searchSpaceSIB1 = 10;
searchSpaceOtherSystemInformation = 10;
pagingSearchSpace = 10;
ra_SearchSpace = 10;
PDCCH_common_controlResourceSetId = 5;
PDCCH_common_ControlResourceSet_duration = 2;
PDCCH_cce_REG_MappingType = "nonInterleaved";
PDCCH_reg_BundleSize = 3;
PDCCH_interleaverSize = 3;
PDCCH_shiftIndex = 10;
PDCCH_precoderGranularity = "sameAsREG-bundle";
PDCCH_TCI_StateId = 32;
tci_PresentInDCI = "ENABLE";
PDCCH_DMRS_ScramblingID = 0;
SearchSpaceId = 10;
commonSearchSpaces_controlResourceSetId = 5;
SearchSpace_monitoringSlotPeriodicityAndOffset_choice = "sl1";
SearchSpace_monitoringSlotPeriodicityAndOffset_value = 0;
SearchSpace_duration = 2;
SearchSpace_nrofCandidates_aggregationLevel1 = 0;
SearchSpace_nrofCandidates_aggregationLevel2 = 0;
SearchSpace_nrofCandidates_aggregationLevel4 = 0;
SearchSpace_nrofCandidates_aggregationLevel8 = 0;
SearchSpace_nrofCandidates_aggregationLevel16 = 0;
SearchSpace_searchSpaceType = "common";
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel1 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel2 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel4 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel8 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel16 = 1;
Common_dci_Format2_3_monitoringPeriodicity = 1;
Common_dci_Format2_3_nrofPDCCH_Candidates = 1;
ue_Specific__dci_Formats = "formats0-0-And-1-0";
RateMatchPatternLTE_CRS_carrierFreqDL = 6;
RateMatchPatternLTE_CRS_carrierBandwidthDL = 6;
RateMatchPatternLTE_CRS_nrofCRS_Ports = 1;
RateMatchPatternLTE_CRS_v_Shift = 0;
RateMatchPatternLTE_CRS_radioframeAllocationPeriod = 1;
RateMatchPatternLTE_CRS_radioframeAllocationOffset = 0;
RateMatchPatternLTE_CRS_subframeAllocation_choice = "oneFrame";
}
);
srb1_parameters :
{
# timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500]
timer_poll_retransmit = 80;
# timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200]
timer_reordering = 35;
# timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500]
timer_status_prohibit = 0;
# poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)]
poll_pdu = 4;
# poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)]
poll_byte = 99999;
# max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32]
max_retx_threshold = 4;
}
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_S1_MME = "eth0";
GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2,mgmt_addr=192.168.100.8";
}
);
NETWORK_CONTROLLER :
{
FLEXRAN_ENABLED = "no";
FLEXRAN_INTERFACE_NAME = "lo";
FLEXRAN_IPV4_ADDRESS = "127.0.0.1";
FLEXRAN_PORT = 2210;
FLEXRAN_CACHE = "/mnt/oai_agent_cache";
FLEXRAN_AWAIT_RECONF = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
@@ -56,22 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
@@ -126,16 +118,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -33,7 +33,7 @@ gNBs =
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP), points to Subcarrier 0 of RB#10 of SSB block
absoluteFrequencySSB = 641032;
dl_frequencyBand = 78;
# this is 3600 MHz
@@ -46,37 +46,23 @@ gNBs =
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=41,L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6368;
# this is RBstart=33 (Start RB of SSB block),L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6358; #6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0; #12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; # used for (full) DL slot
initialDLBWPmappingType_0 = 0; # 0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; # this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
initialDLBWPk0_1 = 0; # used for DL part mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; # this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -90,7 +76,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 6368;
initialULBWPlocationAndBandwidth = 6358;#6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -132,20 +118,17 @@ gNBs =
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPk2_0 = 6; # used for (full) UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPk2_1 = 6; # used for UL part mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7;
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -33,7 +33,7 @@ gNBs =
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP). points to Subcarrier 0 of RB#10 of SSB block
absoluteFrequencySSB = 641032;
dl_frequencyBand = 78;
# this is 3600 MHz
@@ -46,37 +46,24 @@ gNBs =
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6368;
# this is RBstart=33 (Start RB of SSB block),L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6358; #6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
@@ -90,7 +77,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 6368;
initialULBWPlocationAndBandwidth = 6358; #6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -132,20 +119,17 @@ gNBs =
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7;
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -33,7 +33,7 @@ gNBs =
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 84 PRBs@30kHz SCS (same as initial BWP)
# this is 3600 MHz + 84 PRBs@30kHz SCS (same as initial BWP). Points to Subcarrier 0 of RB#10 of SSB block
absoluteFrequencySSB = 642016;#642364;
dl_frequencyBand = 78;
# this is 3600 MHz
@@ -46,37 +46,24 @@ gNBs =
dl_carrierBandwidth = 217;
#initialDownlinkBWP
#genericParameters
# this is RBstart=84,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13559;
# this is RBstart=74 (Start RB of SSB block),L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
@@ -89,7 +76,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 13559;
initialULBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -131,21 +118,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; #2;
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6; #2;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7;
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -250,6 +233,7 @@ L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
}
);
@@ -292,7 +276,7 @@ log_config :
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="debug";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
@@ -46,37 +46,24 @@ gNBs =
dl_carrierBandwidth = 217;
#initialDownlinkBWP
#genericParameters
# this is RBstart=84,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13559;
# this is RBstart=74,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
@@ -89,7 +76,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 13559;
initialULBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -131,16 +118,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -229,6 +217,7 @@ L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
}
);
@@ -56,27 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
@@ -134,17 +121,14 @@ gNBs =
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
@@ -56,27 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
@@ -134,17 +121,14 @@ gNBs =
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
@@ -56,27 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
@@ -134,17 +121,14 @@ gNBs =
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
@@ -46,37 +46,24 @@ gNBs =
dl_carrierBandwidth = 273;
#initialDownlinkBWP
#genericParameters
# this is RBstart=84,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13559;
# this is RBstart=74,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
@@ -89,7 +76,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 13559;
initialULBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -131,21 +118,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;#2;
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6;#2;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7;
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -234,6 +217,7 @@ L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
}
);
@@ -240,7 +240,7 @@ MACRLCs = (
THREAD_STRUCT = (
{
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
worker_config = "ENABLE";
worker_config = "WORKER_ENABLE";
}
);
@@ -241,7 +241,7 @@ MACRLCs = (
THREAD_STRUCT = (
{
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
worker_config = "ENABLE";
worker_config = "WORKER_ENABLE";
}
);
@@ -58,27 +58,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
@@ -133,20 +120,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_2 = 7;
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -135,8 +135,8 @@ gNBs =
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_0 = 55;
# this is SS=0 L=13
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
@@ -56,27 +56,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
@@ -131,20 +118,17 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_2 = 7;
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -7,15 +7,28 @@ gNBs =
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 208; mnc = 92; mnc_length = 2;});
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
sd = 0x1; // 0 false, else true
},
{
sst = 1;
sd = 0x112233; // 0 false, else true
}
);
tr_s_preference = "local_mac"
});
nr_cellid = 12345678L;
////////// Physical parameters:
@@ -52,8 +65,8 @@ gNBs =
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=41,L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 12952; # 6366 12925 12956 28875
# this is RBstart=27,L=48 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 12952; # 6366 12925 12956 28875 12952
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
@@ -62,27 +75,13 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -138,20 +137,17 @@ gNBs =
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4
initialULBWPk2_2 = 7;
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -209,35 +205,21 @@ gNBs =
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
amf_ip_address = ( { ipv4 = "192.168.70.132";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
///X2
enable_x2 = "no";
t_reloc_prep = 1000; /* unit: millisecond */
tx2_reloc_overall = 2000; /* unit: millisecond */
t_dc_prep = 1000; /* unit: millisecond */
t_dc_overall = 2000; /* unit: millisecond */
target_enb_x2_ip_address = (
{ ipv4 = "CI_FR1_CTL_ENB_IP_ADDR";
ipv6 = "192:168:30::17";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_S1_MME = "eth0";
GNB_IPV4_ADDRESS_FOR_S1_MME = "CI_GNB_IP_ADDR";
GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "CI_GNB_IP_ADDR";
GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24";
GNB_INTERFACE_NAME_FOR_NGU = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
GNB_IPV4_ADDRESS_FOR_X2C = "CI_GNB_IP_ADDR";
GNB_PORT_FOR_X2C = 36422; # Spec 36422
};
}
@@ -256,7 +238,7 @@ L1s = (
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
}
}
);
RUs = (
@@ -310,5 +292,7 @@ rfsimulator :
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
};
@@ -7,8 +7,6 @@ gNBs =
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
@@ -17,20 +15,20 @@ gNBs =
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
snssaiList = (
{
sst = 1;
sd = 0x010203; // 0 false, else true
sd = 0x1; // 0 false, else true
},
{
{
sst = 1;
sd = 0x112233; // 0 false, else true
}
);
});
tr_s_preference = "local_mac"
nr_cellid = 12345678L;
////////// Physical parameters:
@@ -77,27 +75,13 @@ gNBs =
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
@@ -153,20 +137,17 @@ gNBs =
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4
initialULBWPk2_2 = 7;
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -224,35 +205,21 @@ gNBs =
////////// MME parameters:
amf_ip_address = ( { ipv4 = "192.168.69.131";
amf_ip_address = ( { ipv4 = "192.168.70.132";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
///X2
enable_x2 = "no";
t_reloc_prep = 1000; /* unit: millisecond */
tx2_reloc_overall = 2000; /* unit: millisecond */
t_dc_prep = 1000; /* unit: millisecond */
t_dc_overall = 2000; /* unit: millisecond */
target_enb_x2_ip_address = (
{ ipv4 = "CI_FR1_CTL_ENB_IP_ADDR";
ipv6 = "192:168:30::17";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "eth0";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.18.198/24";
GNB_INTERFACE_NAME_FOR_NGU = "eth0";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.18.198/24";
GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24";
GNB_INTERFACE_NAME_FOR_NGU = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
GNB_IPV4_ADDRESS_FOR_X2C = "192.168.18.198/24";
GNB_PORT_FOR_X2C = 36422; # Spec 36422
};
}
+14 -9
View File
@@ -1,13 +1,13 @@
[*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Sun May 19 21:39:57 2019
[*] Tue Jan 26 21:45:57 2021
[*]
[dumpfile] "/tmp/openair_dump_eNB.vcd"
[dumpfile_mtime] "Sun May 19 21:30:25 2019"
[dumpfile_size] 11590554
[savefile] "/home/sphex/raymond/openairinterface5g/targets/RT/USER/eNB_usrp.gtkw"
[timestart] 7629910000
[size] 1840 795
[dumpfile] "/home/eurecom/raymond/gtkw/openair_dump_eNB.vcd"
[dumpfile_mtime] "Tue Jan 26 21:26:33 2021"
[dumpfile_size] 180869253
[savefile] "/home/eurecom/raymond/openairinterface5g_2/openairinterface5g/targets/RT/USER/eNB_usrp.gtkw"
[timestart] 11468800000
[size] 1693 785
[pos] -1 -1
*-21.832302 7639830000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 386
@@ -16,17 +16,22 @@
[sst_vpaned_height] 303
@28
functions.trx_read
@29
functions.trx_write_thread
@28
functions.trx_write
@24
variables.trx_ts[63:0]
variables.trx_tst[63:0]
variables.trx_write_flags[63:0]
@28
functions.eNB_thread_rxtx0
@420
variables.l1_proc_tx_ic[63:0]
variables.l1_proc_ic[63:0]
@24
variables.frame_number_RX0_RU[63:0]
@25
variables.tti_number_RX0_RU[63:0]
@24
variables.frame_number_TX0_RU[63:0]
variables.tti_number_TX0_RU[63:0]
@28
+79 -62
View File
@@ -70,6 +70,7 @@
#include "PHY/LTE_TRANSPORT/if4_tools.h"
#include "PHY/LTE_TRANSPORT/if5_tools.h"
#include "PHY/LTE_ESTIMATION/lte_estimation.h"
#include "PHY/phy_extern.h"
@@ -96,6 +97,9 @@
#include "T.h"
#include "common/ran_context.h"
extern RAN_CONTEXT_t RC;
//#define DEBUG_THREADS 1
//#define USRP_DEBUG 1
@@ -261,7 +265,7 @@ static inline int rxtx(PHY_VARS_eNB *eNB,
eNB->UL_INFO.subframe = proc->subframe_rx;
eNB->UL_INFO.module_id = eNB->Mod_id;
eNB->UL_INFO.CC_id = eNB->CC_id;
eNB->if_inst->UL_indication(&eNB->UL_INFO, proc);
eNB->if_inst->UL_indication(&eNB->UL_INFO, (void*)proc);
AssertFatal((ret= pthread_mutex_unlock(&eNB->UL_INFO_mutex))==0,"error unlocking UL_INFO_mutex, return %d\n",ret);
/* this conflict resolution may be totally wrong, to be tested */
/* CONFLICT RESOLUTION: BEGIN */
@@ -323,7 +327,7 @@ static inline int rxtx(PHY_VARS_eNB *eNB,
static void *L1_thread_tx(void *param) {
L1_proc_t *eNB_proc = (L1_proc_t *)param;
L1_rxtx_proc_t *proc = &eNB_proc->L1_proc_tx;
PHY_VARS_eNB *eNB = RC.eNB[0][proc->CC_id];
PHY_VARS_eNB *eNB = eNB_proc->eNB;
char thread_name[100];
sprintf(thread_name,"TXnp4_%d\n",&eNB->proc.L1_proc == proc ? 0 : 1);
thread_top_init(thread_name,1,470000,500000,500000);
@@ -331,6 +335,7 @@ static void *L1_thread_tx(void *param) {
//wait_sync("tx_thread");
proc->respEncode = eNB->proc.L1_proc.respEncode;
while (!oai_exit) {
LOG_D(PHY,"Waiting for TX (IC %d)\n",proc->instance_cnt);
@@ -351,21 +356,19 @@ static void *L1_thread_tx(void *param) {
LOG_D(PHY,"L1 TX processing %d.%d\n",proc->frame_tx,proc->subframe_tx);
phy_procedures_eNB_TX(eNB, proc, 1);
AssertFatal((ret= pthread_mutex_lock( &proc->mutex ))==0,"error locking L1_proc_tx mutex, return %d\n",ret);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_L1_PROC_TX_IC,proc->instance_cnt);
int subframe_tx = proc->subframe_tx;
int frame_tx = proc->frame_tx;
uint64_t timestamp_tx = proc->timestamp_tx;
proc->instance_cnt = -1;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_L1_PROC_TX_IC,proc->instance_cnt);
LOG_D(PHY,"L1 TX signaling done for %d.%d\n",proc->frame_tx,proc->subframe_tx);
// the thread can now be woken up
LOG_D(PHY,"L1_thread_tx: signaling completion in %d.%d\n",proc->frame_tx,proc->subframe_tx);
if (pthread_cond_signal(&proc->cond) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB TXnp4 thread\n");
exit_fun( "ERROR pthread_cond_signal" );
}
AssertFatal((ret=pthread_cond_signal(&proc->cond))== 0, "ERROR pthread_cond_signal for eNB TXnp4 thread ret %d\n",ret);
AssertFatal((ret= pthread_mutex_unlock( &proc->mutex ))==0,"error unlocking L1_proc_tx mutex, return %d\n",ret);
wakeup_txfh(eNB,proc,frame_tx,subframe_tx,timestamp_tx);
}
@@ -391,6 +394,8 @@ static void *L1_thread( void *param ) {
}
PHY_VARS_eNB *eNB = RC.eNB[0][proc->CC_id];
char thread_name[100];
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
@@ -402,7 +407,7 @@ static void *L1_thread( void *param ) {
LOG_I(PHY,"thread rxtx created id=%ld\n", syscall(__NR_gettid));
while (!oai_exit) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_RXTX0+(proc->subframe_rx&1), 0 );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_RXTX0, 0 );
T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->subframe_rx));
LOG_D(PHY,"L1RX waiting for RU RX\n");
@@ -410,7 +415,7 @@ static void *L1_thread( void *param ) {
LOG_D(PHY,"L1RX starting in %d.%d\n",proc->frame_rx,proc->subframe_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_CPUID_ENB_THREAD_RXTX,sched_getcpu());
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_RXTX0+(proc->subframe_rx&1), 1 );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_RXTX0, 1 );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_ENB,proc->subframe_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_ENB,proc->subframe_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_ENB,proc->frame_tx);
@@ -424,6 +429,8 @@ static void *L1_thread( void *param ) {
LOG_D(PHY,"L1 RX %d.%d done\n",proc->frame_rx,proc->subframe_rx);
if (release_thread(&proc->mutex,&proc->instance_cnt,thread_name)<0) break;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_L1_PROC_IC, proc->instance_cnt);
if (NFAPI_MODE!=NFAPI_MODE_VNF) {
if(get_thread_parallel_conf() == PARALLEL_RU_L1_TRX_SPLIT) wakeup_tx(eNB,proc->frame_rx,proc->subframe_rx,proc->frame_tx,proc->subframe_tx,proc->timestamp_tx);
else if(get_thread_parallel_conf() == PARALLEL_RU_L1_SPLIT) {
@@ -432,9 +439,7 @@ static void *L1_thread( void *param ) {
}
}
if (release_thread(&proc->mutex,&proc->instance_cnt,thread_name)<0) break;
} // while !oai_exit
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_RXTX0+(proc->subframe_rx&1), 0 );
LOG_D(PHY, " *** Exiting eNB thread RXn_TXnp4\n");
eNB_thread_rxtx_status = 0;
@@ -530,6 +535,7 @@ int wakeup_txfh(PHY_VARS_eNB *eNB,
AssertFatal(pthread_cond_signal(&ru_proc->cond_eNBs) == 0,
"[eNB] ERROR pthread_cond_signal for eNB TXnp4 thread\n");
AssertFatal((ret=pthread_mutex_unlock(&ru_proc->mutex_eNBs))==0,"mutex_unlock returned %d\n",ret);
}
return(0);
@@ -542,19 +548,19 @@ int wakeup_tx(PHY_VARS_eNB *eNB,
int frame_tx,
int subframe_tx,
uint64_t timestamp_tx) {
L1_rxtx_proc_t *L1_proc = &eNB->proc.L1_proc;
L1_rxtx_proc_t *L1_proc_tx = &eNB->proc.L1_proc_tx;
int ret;
LOG_D(PHY,"ENTERED wakeup_tx (IC %d)\n",L1_proc_tx->instance_cnt);
// check if subframe is a has TX else return
if (subframe_select(&eNB->frame_parms,subframe_tx) == SF_UL) return 0;
AssertFatal((ret = pthread_mutex_lock(&L1_proc_tx->mutex))==0,"mutex_lock returns %d\n",ret);
LOG_D(PHY,"L1 RX %d.%d Waiting to wake up L1 TX %d.%d (IC L1TX %d)\n",L1_proc->frame_rx,L1_proc->subframe_rx,L1_proc->frame_tx,L1_proc->subframe_tx,L1_proc_tx->instance_cnt);
LOG_D(PHY,"L1 RX %d.%d Waiting to wake up L1 TX %d.%d (IC L1TX %d)\n",frame_rx,subframe_rx,frame_tx,subframe_tx,L1_proc_tx->instance_cnt);
while(L1_proc_tx->instance_cnt == 0) {
pthread_cond_wait(&L1_proc_tx->cond,&L1_proc_tx->mutex);
}
LOG_D(PHY,"L1 RX Got signal that TX %d.%d is done\n",L1_proc_tx->frame_tx,L1_proc_tx->subframe_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_L1_PROC_TX_IC,L1_proc_tx->instance_cnt);
L1_proc_tx->instance_cnt = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_L1_PROC_TX_IC,L1_proc_tx->instance_cnt);
L1_proc_tx->subframe_rx = subframe_rx;
@@ -563,9 +569,11 @@ int wakeup_tx(PHY_VARS_eNB *eNB,
L1_proc_tx->frame_tx = frame_tx;
L1_proc_tx->timestamp_tx = timestamp_tx;
// the thread can now be woken up
LOG_D(PHY,"L1 RX Waking up L1 TX %d.%d\n",L1_proc->frame_tx,L1_proc->subframe_tx);
LOG_D(PHY,"L1 RX Waking up L1 TX %d.%d\n",frame_tx,subframe_tx);
AssertFatal(pthread_cond_signal(&L1_proc_tx->cond) == 0, "ERROR pthread_cond_signal for eNB L1 thread tx\n");
AssertFatal((ret=pthread_mutex_unlock(&L1_proc_tx->mutex))==0,"mutex_unlock returns %d\n",ret);
return(0);
}
@@ -585,10 +593,16 @@ int wakeup_rxtx(PHY_VARS_eNB *eNB,
if (L1_proc->instance_cnt == 0) { // L1_thread is busy so abort the subframe
AssertFatal((ret=pthread_mutex_unlock( &L1_proc->mutex))==0,"mutex_unlock return %d\n",ret);
LOG_W(PHY,"L1_thread isn't ready in %d.%d, aborting RX processing\n",ru_proc->frame_rx,ru_proc->tti_rx);
/* AssertFatal(1==0,"L1_thread isn't ready in %d.%d (L1RX %d.%d), aborting RX, exiting\n",
ru_proc->frame_rx,ru_proc->tti_rx,L1_proc->frame_rx,L1_proc->subframe_rx);
*/
return(0);
}
++L1_proc->instance_cnt;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_L1_PROC_IC, L1_proc->instance_cnt);
// We have just received and processed the common part of a subframe, say n.
// TS_rx is the last received timestamp (start of 1st slot), TS_tx is the desired
// transmitted timestamp of the next TX slot (first).
@@ -606,14 +620,12 @@ int wakeup_rxtx(PHY_VARS_eNB *eNB,
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_WAKEUP_RXTX_TX_RU+ru->idx, L1_proc->frame_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_WAKEUP_RXTX_TX_RU+ru->idx, L1_proc->subframe_tx);
// the thread can now be woken up
if (pthread_cond_signal(&L1_proc->cond) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB RXn-TXnp4 thread\n");
exit_fun( "ERROR pthread_cond_signal" );
return(-1);
}
// the thread can now be woken up
AssertFatal((ret=pthread_cond_signal(&L1_proc->cond))== 0, "ERROR pthread_cond_signal for eNB RXn-TXnp4 thread, ret %d\n",ret);
AssertFatal((ret=pthread_mutex_unlock( &L1_proc->mutex))==0,"mutex_unlock return %d\n",ret);
return(0);
}
@@ -837,6 +849,21 @@ static void *process_stats_thread(void *param) {
return(NULL);
}
void *L1_stats_thread(void *param) {
PHY_VARS_eNB *eNB = (PHY_VARS_eNB *)param;
wait_sync("L1_stats_thread");
FILE *fd;
while (!oai_exit) {
sleep(1);
fd=fopen("L1_stats.log","w");
AssertFatal(fd!=NULL,"Cannot open L1_stats.log\n");
dump_I0_stats(fd,eNB);
dump_ulsch_stats(fd,eNB,eNB->proc.L1_proc_tx.frame_tx);
dump_uci_stats(fd,eNB,eNB->proc.L1_proc_tx.frame_tx);
fclose(fd);
}
return(NULL);
}
void init_eNB_proc(int inst) {
/*int i=0;*/
@@ -858,6 +885,7 @@ void init_eNB_proc(int inst) {
L1_proc_tx->instance_cnt = -1;
L1_proc->instance_cnt_RUs = 0;
L1_proc_tx->instance_cnt_RUs = 0;
proc->eNB = eNB;
proc->instance_cnt_prach = -1;
proc->instance_cnt_asynch_rxtx = -1;
proc->instance_cnt_synch = -1;
@@ -930,6 +958,7 @@ void init_eNB_proc(int inst) {
AssertFatal(proc->instance_cnt_prach == -1,"instance_cnt_prach = %d\n",proc->instance_cnt_prach);
if (opp_enabled == 1) pthread_create(&proc->process_stats_thread,NULL,process_stats_thread,(void *)eNB);
pthread_create(&proc->L1_stats_thread,NULL,L1_stats_thread,(void*)eNB);
}
//for multiple CCs: setup master and slaves
@@ -1060,60 +1089,47 @@ void print_opp_meas(void) {
void free_transport(PHY_VARS_eNB *eNB) {
for (int i=0; i<NUMBER_OF_UE_MAX; i++) {
LOG_D(PHY, "Freeing Transport Channel Buffers for DLSCH, UE %d\n",i);
for (int i=0; i<NUMBER_OF_DLSCH_MAX; i++) {
LOG_D(PHY, "Freeing Transport Channel Buffers for DLSCH %d\n",i);
for (int j=0; j<2; j++) free_eNB_dlsch(eNB->dlsch[i][j]);
LOG_D(PHY, "Freeing Transport Channel Buffer for ULSCH, UE %d\n",i);
free_eNB_ulsch(eNB->ulsch[1+i]);
}
free_eNB_ulsch(eNB->ulsch[0]);
for (int i=0;i<NUMBER_OF_ULSCH_MAX;i++) {
LOG_D(PHY, "Freeing Transport Channel Buffer for ULSCH %d\n",i);
free_eNB_ulsch(eNB->ulsch[i]);
}
}
void init_transport(PHY_VARS_eNB *eNB) {
int i;
int j;
LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms;
LOG_I(PHY, "Initialise transport\n");
if (NFAPI_MODE!=NFAPI_MODE_VNF) {
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
LOG_D(PHY,"Allocating Transport Channel Buffers for DLSCH, UE %d\n",i);
for (int i=0;i<NUMBER_OF_DLSCH_MAX; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffers for DLSCH %d/%d/%d\n",i,NUMBER_OF_DLSCH_MAX,(i-NUMBER_OF_DLSCH_MAX)<0);
for (j=0; j<2; j++) {
for (int j=0; j<2; j++) {
eNB->dlsch[i][j] = new_eNB_dlsch(1,8,NSOFT,fp->N_RB_DL,0,fp);
LOG_I(PHY,"eNB->dlsch[%d][%d] %p\n",i,j,eNB->dlsch[i][j]);
if (!eNB->dlsch[i][j]) {
LOG_E(PHY,"Can't get eNB dlsch structures for UE %d \n", i);
LOG_E(PHY,"Can't get eNB dlsch structures for DLSCH %d \n", i);
exit(-1);
} else {
eNB->dlsch[i][j]->rnti=0;
LOG_D(PHY,"dlsch[%d][%d] => %p rnti:%d\n",i,j,eNB->dlsch[i][j], eNB->dlsch[i][j]->rnti);
}
}
}
for (int i=0;i<NUMBER_OF_ULSCH_MAX; i++) {
LOG_D(PHY,"Allocating Transport Channel Buffer for ULSCH, UE %d\n",i);
eNB->ulsch[1+i] = new_eNB_ulsch(MAX_TURBO_ITERATIONS,fp->N_RB_UL, 0);
LOG_I(PHY,"Allocating Transport Channel Buffer for ULSCH %d/%d\n",i,NUMBER_OF_ULSCH_MAX);
eNB->ulsch[i] = new_eNB_ulsch(MAX_TURBO_ITERATIONS,fp->N_RB_UL, 0);
if (!eNB->ulsch[1+i]) {
if (!eNB->ulsch[i]) {
LOG_E(PHY,"Can't get eNB ulsch structures\n");
exit(-1);
}
// this is the transmission mode for the signalling channels
// this will be overwritten with the real transmission mode by the RRC once the UE is connected
eNB->transmission_mode[i] = fp->nb_antenna_ports_eNB==1 ? 1 : 2;
}
// ULSCH for RA
eNB->ulsch[0] = new_eNB_ulsch(MAX_TURBO_ITERATIONS, fp->N_RB_UL, 0);
if (!eNB->ulsch[0]) {
LOG_E(PHY,"Can't get eNB ulsch structures\n");
exit(-1);
}
eNB->dlsch_SI = new_eNB_dlsch(1,8,NSOFT,fp->N_RB_DL, 0, fp);
@@ -1126,7 +1142,7 @@ void init_transport(PHY_VARS_eNB *eNB) {
eNB->rx_total_gain_dB=130;
for(i=0; i<NUMBER_OF_UE_MAX; i++)
for(int i=0; i<NUMBER_OF_UE_MAX; i++)
eNB->mu_mimo_mode[i].dl_pow_off = 2;
eNB->check_for_total_transmissions = 0;
@@ -1134,11 +1150,13 @@ void init_transport(PHY_VARS_eNB *eNB) {
eNB->FULL_MUMIMO_transmissions = 0;
eNB->check_for_SUMIMO_transmissions = 0;
fp->pucch_config_common.deltaPUCCH_Shift = 1;
if (eNB->use_DTX == 0) fill_subframe_mask(eNB);
}
void init_eNB_afterRU(void) {
int inst,CC_id,ru_id,i,aa;
int inst,CC_id,i;
PHY_VARS_eNB *eNB;
LOG_I(PHY,"%s() RC.nb_inst:%d\n", __FUNCTION__, RC.nb_inst);
@@ -1148,13 +1166,14 @@ void init_eNB_afterRU(void) {
for (CC_id=0; CC_id<RC.nb_CC[inst]; CC_id++) {
LOG_I(PHY,"RC.nb_CC[inst:%d][CC_id:%d]:%p\n", inst, CC_id, RC.eNB[inst][CC_id]);
eNB = RC.eNB[inst][CC_id];
phy_init_lte_eNB(eNB,0,0);
// map antennas and PRACH signals to eNB RX
if (0) AssertFatal(eNB->num_RU>0,"Number of RU attached to eNB %d is zero\n",eNB->Mod_id);
// map antennas and PRACH signals to eNB RX
LOG_I(PHY,"Mapping RX ports from %d RUs to eNB %d\n",eNB->num_RU,eNB->Mod_id);
eNB->frame_parms.nb_antennas_rx = 0;
LOG_I(PHY,"eNB->num_RU:%d\n", eNB->num_RU);
if (NFAPI_MODE==NFAPI_MODE_PNF) AssertFatal(eNB->num_RU>0,"Number of RU attached to eNB %d is zero\n",eNB->Mod_id);
for (int ru_id=0; ru_id<eNB->num_RU; ru_id++)
eNB->frame_parms.nb_antennas_rx += eNB->RU_list[ru_id]->nb_rx;
phy_init_lte_eNB(eNB,0,0);
LOG_I(PHY,"Overwriting eNB->prach_vars.rxsigF[0]:%p\n", eNB->prach_vars.rxsigF[0]);
eNB->prach_vars.rxsigF[0] = (int16_t **)malloc16(64*sizeof(int16_t *));
@@ -1163,10 +1182,8 @@ void init_eNB_afterRU(void) {
eNB->prach_vars_br.rxsigF[ce_level] = (int16_t **)malloc16(64*sizeof(int16_t *));
}
LOG_I(PHY,"eNB->num_RU:%d\n", eNB->num_RU);
for (ru_id=0,aa=0; ru_id<eNB->num_RU; ru_id++) {
eNB->frame_parms.nb_antennas_rx += eNB->RU_list[ru_id]->nb_rx;
for (int ru_id=0,aa=0; ru_id<eNB->num_RU; ru_id++) {
AssertFatal(eNB->RU_list[ru_id]->common.rxdataF!=NULL,
"RU %d : common.rxdataF is NULL\n",
@@ -1214,7 +1231,7 @@ void init_eNB_afterRU(void) {
init_eNB_proc(inst);
}
for (ru_id=0; ru_id<RC.nb_RU; ru_id++) {
for (int ru_id=0; ru_id<RC.nb_RU; ru_id++) {
AssertFatal(RC.ru[ru_id]!=NULL,"ru_id %d is null\n",ru_id);
RC.ru[ru_id]->wakeup_rxtx = wakeup_rxtx;
RC.ru[ru_id]->wakeup_prach_eNB = wakeup_prach_eNB;
+280 -260
View File
File diff suppressed because it is too large Load Diff
+26 -15
View File
@@ -103,9 +103,6 @@ pthread_cond_t nfapi_sync_cond;
pthread_mutex_t nfapi_sync_mutex;
int nfapi_sync_var=-1; //!< protected by mutex \ref nfapi_sync_mutex
msc_interface_t msc_interface;
uint16_t sf_ahead=4;
pthread_cond_t sync_cond;
@@ -166,12 +163,16 @@ void sendFs6Ulharq(enum pckType type, int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *
AssertFatal(false, "Must not be called in this context\n");
}
RU_t **RCconfig_RU(int nb_RU,int nb_L1_inst,PHY_VARS_eNB ***eNB,uint64_t *ru_mask,pthread_mutex_t *ru_mutex,pthread_cond_t *ru_cond);
extern void reset_opp_meas(void);
extern void print_opp_meas(void);
extern void init_eNB_afterRU(void);
RU_t **RCconfig_RU(int nb_RU,int nb_L1_inst,PHY_VARS_eNB ***eNB,uint64_t *ru_mask,pthread_mutex_t *ru_mutex,pthread_cond_t *ru_cond);
int transmission_mode=1;
int emulate_rf = 0;
int numerology = 0;
@@ -429,7 +430,6 @@ int stop_L1L2(module_id_t enb_id) {
* Restart the lte-softmodem after it has been soft-stopped with stop_L1L2()
*/
int restart_L1L2(module_id_t enb_id) {
RU_t *ru = RC.ru[enb_id];
int cc_id;
MessageDef *msg_p = NULL;
LOG_W(ENB_APP, "restarting lte-softmodem\n");
@@ -440,10 +440,12 @@ int restart_L1L2(module_id_t enb_id) {
for (cc_id = 0; cc_id < RC.nb_L1_CC[enb_id]; cc_id++) {
RC.eNB[enb_id][cc_id]->configured = 0;
for (int ru_id=0;ru_id<RC.eNB[enb_id][cc_id]->num_RU;ru_id++) {
int ru_idx = RC.eNB[enb_id][cc_id]->RU_list[ru_id]->idx;
RC.ru_mask |= (1 << ru_idx);
set_function_spec_param(RC.ru[ru_idx]);
}
}
RC.ru_mask |= (1 << ru->idx);
set_function_spec_param(RC.ru[enb_id]);
/* reset the list of connected UEs in the MAC, since in this process with
* loose all UEs (have to reconnect) */
init_UE_info(&RC.mac[enb_id]->UE_info);
@@ -464,9 +466,15 @@ int restart_L1L2(module_id_t enb_id) {
/* TODO XForms might need to be restarted, but it is currently (09/02/18)
* broken, so we cannot test it */
wait_eNBs();
init_RU_proc(ru);
ru->rf_map.card = 0;
ru->rf_map.chain = 0; /* CC_id + chain_offset;*/
for (int cc_id=0;cc_id<RC.nb_L1_CC[enb_id]; cc_id++) {
for (int ru_id=0;ru_id<RC.eNB[enb_id][cc_id]->num_RU;ru_id++) {
int ru_idx = RC.eNB[enb_id][cc_id]->RU_list[ru_id]->idx;
init_RU_proc(RC.ru[ru_idx]);
RC.ru[ru_idx]->rf_map.card = 0;
RC.ru[ru_idx]->rf_map.chain = 0; /* CC_id + chain_offset;*/
}
}
wait_RUs();
init_eNB_afterRU();
printf("Sending sync to all threads\n");
@@ -579,7 +587,7 @@ int main ( int argc, char **argv )
/* We need to read RU configuration before FlexRAN starts so it knows what
* splits to report. Actual RU start comes later. */
if (RC.nb_RU > 0 && NFAPI_MODE != NFAPI_MODE_VNF) {
RCconfig_RU();
RC.ru = RCconfig_RU(RC.nb_RU,RC.nb_L1_inst,RC.eNB,&RC.ru_mask,&RC.ru_mutex,&RC.ru_cond);
LOG_I(PHY,
"number of L1 instances %d, number of RU %d, number of CPU cores %d\n",
RC.nb_L1_inst, RC.nb_RU, get_nprocs());
@@ -656,6 +664,7 @@ int main ( int argc, char **argv )
for (int x=0; x < RC.nb_L1_inst; x++)
for (int CC_id=0; CC_id<RC.nb_L1_CC[x]; CC_id++) {
L1_rxtx_proc_t *L1proc= &RC.eNB[x][CC_id]->proc.L1_proc;
L1_rxtx_proc_t *L1proctx= &RC.eNB[x][CC_id]->proc.L1_proc_tx;
L1proc->threadPool=(tpool_t*)malloc(sizeof(tpool_t));
L1proc->respEncode=(notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
L1proc->respDecode=(notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
@@ -663,9 +672,11 @@ int main ( int argc, char **argv )
initTpool(get_softmodem_params()->threadPoolConfig, L1proc->threadPool, true);
else
initTpool("n", L1proc->threadPool, true);
initNotifiedFIFO(L1proc->respEncode);
initNotifiedFIFO(L1proc->respDecode);
RC.eNB[x][CC_id]->proc.L1_proc_tx.threadPool = L1proc->threadPool;
initNotifiedFIFO(L1proc->respEncode);
initNotifiedFIFO(L1proc->respDecode);
L1proctx->threadPool=L1proc->threadPool;
L1proctx->respEncode=L1proc->respEncode;
L1proctx->nbEncode=L1proc->nbEncode;
}
@@ -680,7 +691,7 @@ int main ( int argc, char **argv )
// some initialization is necessary and init_ru_vnf do this.
if (RC.nb_RU >0 && NFAPI_MODE!=NFAPI_MODE_VNF) {
printf("Initializing RU threads\n");
init_RU(get_softmodem_params()->rf_config_file,get_softmodem_params()->send_dmrs_sync);
init_RU(RC.ru,RC.nb_RU,RC.eNB,RC.nb_L1_inst,RC.nb_L1_CC,get_softmodem_params()->rf_config_file,get_softmodem_params()->send_dmrs_sync);
for (ru_id=0; ru_id<RC.nb_RU; ru_id++) {
RC.ru[ru_id]->rf_map.card=0;
+1 -4
View File
@@ -78,7 +78,6 @@
#define CONFIG_HLP_UESCAN "set UE to scan around carrier\n"
#define CONFIG_HLP_EMULIFACE "Set the interface name for the multicast transport for emulation mode (e.g. eth0, lo, etc.) \n"
#define CONFIG_HLP_PRB "Set the PRB, valid values: 6, 25, 50, 100 \n"
#define CONFIG_HLP_SSC "Set the start subcarrier \n"
#define CONFIG_HLP_DLSHIFT "dynamic shift for LLR compuation for TM3/4 (default 0)\n"
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
#define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n"
@@ -98,7 +97,6 @@
/*-------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_UEPARAMS_DESC { \
{"siml1", CONFIG_HLP_SIML1, PARAMFLAG_BOOL, iptr:&simL1flag, defintval:0, TYPE_INT, 0}, \
{"U", CONFIG_HLP_NUMUE, 0, u16ptr:&NB_UE_INST, defuintval:1, TYPE_UINT16, 0}, \
{"ue-rxgain", CONFIG_HLP_UERXG, 0, dblptr:&(rx_gain[0][0]), defdblval:130, TYPE_DOUBLE, 0}, \
{"ue-rxgain-off", CONFIG_HLP_UERXGOFF, 0, dblptr:&rx_gain_off, defdblval:0, TYPE_DOUBLE, 0}, \
@@ -172,7 +170,7 @@ extern void init_RU_proc(RU_t *ru);
extern void stop_RU(int nb_ru);
extern void kill_RU_proc(RU_t *ru);
extern void set_function_spec_param(RU_t *ru);
extern void init_RU(char *, int send_dmrssync);
extern void init_RU(RU_t **rup,int nb_RU,PHY_VARS_eNB ***eNBp,int nb_L1,int *nb_CC,char *rf_config_file, int send_dmrssync);
// In lte-ue.c
extern int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg);
@@ -200,7 +198,6 @@ extern void init_te_thread(PHY_VARS_eNB *);
extern void kill_td_thread(PHY_VARS_eNB *);
extern void kill_te_thread(PHY_VARS_eNB *);
extern void RCConfig_sim(void);
extern void init_ocm(void);
extern void init_ue_devices(PHY_VARS_UE *);
+20 -20
View File
@@ -32,6 +32,7 @@
#include "lte-softmodem.h"
#include "rt_wrapper.h"
#include "system.h"
#include "LAYER2/MAC/mac.h"
#include "RRC/LTE/rrc_extern.h"
@@ -230,14 +231,23 @@ void init_thread(int sched_runtime,
}
#else
int settingPriority = 1;
if (CPU_COUNT(cpuset) > 0)
AssertFatal( 0 == pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), cpuset), "");
if (checkIfFedoraDistribution())
if (checkIfGenericKernelOnFedora())
if (checkIfInsideContainer())
settingPriority = 0;
if (settingPriority) {
if (CPU_COUNT(cpuset) > 0)
AssertFatal( 0 == pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), cpuset), "");
struct sched_param sp;
sp.sched_priority = sched_fifo;
AssertFatal(pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp)==0,
"Can't set thread priority, Are you root?\n");
}
struct sched_param sp;
sp.sched_priority = sched_fifo;
AssertFatal(pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp)==0,
"Can't set thread priority, Are you root?\n");
/* Check the actual affinity mask assigned to the thread */
cpu_set_t *cset=CPU_ALLOC(CPU_SETSIZE);
@@ -283,13 +293,7 @@ void init_UE(int nb_inst,
LOG_I(PHY,"Allocating UE context %d\n",inst);
if ( !IS_SOFTMODEM_SIML1 ) PHY_vars_UE_g[inst][0] = init_ue_vars(fp0,inst,0);
else {
// needed for memcopy below. these are not used in the RU, but needed for UE
RC.ru[0]->frame_parms->nb_antennas_rx = fp0->nb_antennas_rx;
RC.ru[0]->frame_parms->nb_antennas_tx = fp0->nb_antennas_tx;
PHY_vars_UE_g[inst][0] = init_ue_vars(RC.ru[0]->frame_parms,inst,0);
}
PHY_vars_UE_g[inst][0] = init_ue_vars(fp0,inst,0);
// turn off timing control loop in UE
PHY_vars_UE_g[inst][0]->no_timing_correction = timing_correction;
@@ -371,17 +375,13 @@ void init_UE(int nb_inst,
*/
UE->N_TA_offset = 0;
if (IS_SOFTMODEM_SIML1 ) init_ue_devices(UE);
LOG_I(PHY,"Intializing UE Threads for instance %d (%p,%p)...\n",inst,PHY_vars_UE_g[inst],PHY_vars_UE_g[inst][0]);
init_UE_threads(inst);
if (!IS_SOFTMODEM_SIML1 ) {
ret = openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]);
ret = openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]);
if (ret !=0) {
exit_fun("Error loading device library");
}
if (ret !=0) {
exit_fun("Error loading device library");
}
UE->rfdevice.host_type = RAU_HOST;
+3 -16
View File
@@ -86,7 +86,6 @@
#include "lte-softmodem.h"
msc_interface_t msc_interface;
/* temporary compilation wokaround (UE/eNB split */
uint16_t sf_ahead;
@@ -193,6 +192,9 @@ int oaisim_flag=0;
*/
uint8_t abstraction_flag=0;
// needed for pdcp.c
RAN_CONTEXT_t RC;
/* forward declarations */
void set_default_frame_parms(LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
@@ -286,7 +288,6 @@ static void get_options(void) {
int dumpframe=0;
int timingadv=0;
uint8_t nfapi_mode = NFAPI_MONOLITHIC;
int simL1flag =0;
set_default_frame_parms(frame_parms);
CONFIG_SETRTFLAG(CONFIG_NOEXITONHELP);
@@ -300,8 +301,6 @@ static void get_options(void) {
config_process_cmdline( cmdline_ueparams,sizeof(cmdline_ueparams)/sizeof(paramdef_t),NULL);
nfapi_setmode(nfapi_mode);
if (simL1flag)
set_softmodem_optmask(SOFTMODEM_SIML1_BIT);
if (loopfile != NULL) {
printf("Input file for hardware emulation: %s",loopfile);
@@ -574,11 +573,6 @@ int main( int argc, char **argv ) {
EPC_MODE_ENABLED = !IS_SOFTMODEM_NOS1;
printf("Running with %d UE instances\n",NB_UE_INST);
if (NB_UE_INST > 1 && (!IS_SOFTMODEM_SIML1) && NFAPI_MODE!=NFAPI_UE_STUB_PNF) {
printf("Running with more than 1 UE instance and simL1 is not active, this will result in undefined behaviour for now, exiting.\n");
abort();
}
// Checking option of nums_ue_thread.
if(NB_THREAD_INST < 1) {
printf("Running with 0 UE rxtx thread, exiting.\n");
@@ -649,9 +643,6 @@ int main( int argc, char **argv ) {
}
} else init_openair0(frame_parms[0],(int)rx_gain[0][0]);
if (IS_SOFTMODEM_SIML1 ) {
RCConfig_sim();
}
cpuf=get_cpu_freq_GHz();
@@ -753,10 +744,6 @@ int main( int argc, char **argv ) {
//p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX;
if (IS_SOFTMODEM_SIML1 ) {
init_ocm();
PHY_vars_UE_g[0][0]->no_timing_correction = 1;
}
if(IS_SOFTMODEM_DOSCOPE)
load_softscope("ue",NULL);
-40
View File
@@ -1,40 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#ifndef __RFSIM__H__
#define __RFSIM__H__
#include "lte-softmodem.h"
#include "openair1/SIMULATION/TOOLS/sim.h"
#include "platform_constants.h"
#include "common/ran_context.h"
#include "PHY/defs_UE.h"
#include "PHY/defs_eNB.h"
void init_ocm(void);
void update_ocm(double snr_dB,double sinr_dB);
//extern pthread_mutex_t async_server_lock;
//extern pthread_cond_t async_server_notify;
//extern int async_server_shutdown;
void init_channel_vars(void);
#endif
+31 -22
View File
@@ -43,6 +43,7 @@
#include <getopt.h>
#include <sys/sysinfo.h>
#include "rt_wrapper.h"
#include "system.h"
#include <errno.h>
#include <common/utils/msc/msc.h>
@@ -294,6 +295,7 @@ void thread_top_init(char *thread_name,
struct sched_param sparam;
char cpu_affinity[1024];
cpu_set_t cpuset;
int settingPriority = 1;
/* Set affinity mask to include CPUs 2 to MAX_CPUS */
/* CPU 0 is reserved for UHD threads */
@@ -340,30 +342,37 @@ void thread_top_init(char *thread_name,
}
}
memset(&sparam, 0, sizeof(sparam));
sparam.sched_priority = sched_get_priority_max(SCHED_FIFO);
policy = SCHED_FIFO ;
s = pthread_setschedparam(pthread_self(), policy, &sparam);
if (s != 0) {
perror("pthread_setschedparam : ");
exit_fun("Error setting thread priority");
}
s = pthread_getschedparam(pthread_self(), &policy, &sparam);
if (s != 0) {
perror("pthread_getschedparam : ");
exit_fun("Error getting thread priority");
}
if (checkIfFedoraDistribution())
if (checkIfGenericKernelOnFedora())
if (checkIfInsideContainer())
settingPriority = 0;
pthread_setname_np(pthread_self(), thread_name);
if (settingPriority) {
memset(&sparam, 0, sizeof(sparam));
sparam.sched_priority = sched_get_priority_max(SCHED_FIFO);
policy = SCHED_FIFO;
s = pthread_setschedparam(pthread_self(), policy, &sparam);
if (s != 0) {
perror("pthread_setschedparam : ");
exit_fun("Error setting thread priority");
}
s = pthread_getschedparam(pthread_self(), &policy, &sparam);
if (s != 0) {
perror("pthread_getschedparam : ");
exit_fun("Error getting thread priority");
}
LOG_I(HW, "[SCHED][eNB] %s started on CPU %d, sched_policy = %s , priority = %d, CPU Affinity=%s \n",thread_name,sched_getcpu(),
(policy == SCHED_FIFO) ? "SCHED_FIFO" :
(policy == SCHED_RR) ? "SCHED_RR" :
(policy == SCHED_OTHER) ? "SCHED_OTHER" :
"???",
sparam.sched_priority, cpu_affinity );
pthread_setname_np(pthread_self(), thread_name);
LOG_I(HW, "[SCHED][eNB] %s started on CPU %d, sched_policy = %s , priority = %d, CPU Affinity=%s \n",thread_name,sched_getcpu(),
(policy == SCHED_FIFO) ? "SCHED_FIFO" :
(policy == SCHED_RR) ? "SCHED_RR" :
(policy == SCHED_OTHER) ? "SCHED_OTHER" :
"???",
sparam.sched_priority, cpu_affinity );
}
#endif //LOW_LATENCY
+22 -38
View File
@@ -61,30 +61,17 @@
#include "PHY/LTE_TRANSPORT/if4_tools.h"
#include "PHY/LTE_TRANSPORT/if5_tools.h"
#include "PHY/phy_extern.h"
#include "LAYER2/MAC/mac_extern.h"
#include "PHY/LTE_TRANSPORT/transport_proto.h"
#include "SCHED/sched_eNB.h"
#include "PHY/LTE_ESTIMATION/lte_estimation.h"
#include "PHY/INIT/phy_init.h"
#include "LAYER2/MAC/mac.h"
#include "LAYER2/MAC/mac_extern.h"
#include "LAYER2/MAC/mac_proto.h"
#include "RRC/LTE/rrc_extern.h"
#include "PHY_INTERFACE/phy_interface.h"
#include "common/utils/LOG/log.h"
#include "UTIL/OTG/otg_tx.h"
#include "UTIL/OTG/otg_externs.h"
#include "UTIL/MATH/oml.h"
#include "UTIL/OPT/opt.h"
#include "enb_config.h"
int attach_rru(RU_t *ru);
void configure_ru(int idx, void *arg);
void configure_rru(int idx, void *arg);
void configure_ru(RU_t *ru, void *arg);
void configure_rru(RU_t *ru, void *arg);
void fill_rf_config(RU_t *ru, char *rf_config_file);
void* ru_thread_control( void* param );
@@ -164,7 +151,7 @@ int send_capab(RU_t *ru)
cap->FH_fmt = MBP_IF5;
break;
default:
AssertFatal(1==0,"RU_function is unknown %d\n",RC.ru[0]->function);
AssertFatal(1==0,"RU_function is unknown %d\n",ru->function);
break;
}
cap->num_bands = ru->num_bands;
@@ -224,7 +211,7 @@ int attach_rru(RU_t *ru)
LOG_E(PHY,"Received incorrect message %d from RRU %d\n",rru_config_msg.type,ru->idx);
}
}
configure_ru(ru->idx,
configure_ru(ru,
(RRU_capabilities_t *)&rru_config_msg.msg[0]);
rru_config_msg.type = RRU_config;
@@ -296,7 +283,7 @@ int connect_rau(RU_t *ru)
cap->FH_fmt = MBP_IF5;
break;
default:
AssertFatal(1==0,"RU_function is unknown %d\n",RC.ru[0]->function);
AssertFatal(1==0,"RU_function is unknown %d\n",ru->function);
break;
}
cap->num_bands = ru->num_bands;
@@ -335,7 +322,7 @@ int connect_rau(RU_t *ru)
((RRU_config_t *)&rru_config_msg.msg[0])->prach_FreqOffset[0],
((RRU_config_t *)&rru_config_msg.msg[0])->prach_ConfigIndex[0]);
configure_rru(ru->idx,
configure_rru(ru,
(void*)&rru_config_msg.msg[0]);
configuration_received = 1;
}
@@ -388,21 +375,20 @@ int check_capabilities(RU_t *ru,
return(-1);
}
void configure_ru(int idx,
void configure_ru(RU_t *ru,
void *arg)
{
RU_t *ru = RC.ru[idx];
RRU_config_t *config = (RRU_config_t *)arg;
RRU_capabilities_t *capabilities = (RRU_capabilities_t*)arg;
int ret;
LOG_I(PHY, "Received capabilities from RRU %d\n",idx);
LOG_I(PHY, "Received capabilities from RRU %d\n",ru->idx);
if (capabilities->FH_fmt < MAX_FH_FMTs) LOG_I(PHY, "RU FH options %s\n",rru_format_options[capabilities->FH_fmt]);
AssertFatal((ret=check_capabilities(ru,capabilities)) == 0,
"Cannot configure RRU %d, check_capabilities returned %d\n", idx,ret);
"Cannot configure RRU %d, check_capabilities returned %d\n", ru->idx,ret);
// take antenna capabilities of RRU
ru->nb_tx = capabilities->nb_tx[0];
ru->nb_rx = capabilities->nb_rx[0];
@@ -440,11 +426,10 @@ void configure_ru(int idx,
phy_init_RU(ru);
}
void configure_rru(int idx,
void configure_rru(RU_t *ru,
void *arg)
{
RRU_config_t *config = (RRU_config_t *)arg;
RU_t *ru = RC.ru[idx];
ru->frame_parms->eutra_band = config->band_list[0];
ru->frame_parms->dl_CarrierFreq = config->tx_freq[0];
@@ -486,7 +471,6 @@ void configure_rru(int idx,
static int send_update_rru(RU_t * ru, LTE_DL_FRAME_PARMS * fp){
//ssize_t msg_len/*,len*/;
int i;
//LTE_DL_FRAME_PARMS *fp = &RC.eNB[0][0]->frame_parms;
RRU_CONFIG_msg_t rru_config_msg;
memset((void *)&rru_config_msg,0,sizeof(rru_config_msg));
rru_config_msg.type = RRU_config_update;
@@ -535,7 +519,7 @@ void* ru_thread_control( void* param )
send_tick(ru);
if (ru->state == RU_RUN && ru->if_south != LOCAL_RF){
LTE_DL_FRAME_PARMS *fp = &RC.eNB[0][0]->frame_parms;
LTE_DL_FRAME_PARMS *fp = &ru->eNB_list[0]->frame_parms;
LOG_D(PHY,"Check MBSFN SF changes\n");
if(fp->num_MBSFN_config != ru_sf_update){
ru_sf_update = fp->num_MBSFN_config;
@@ -579,7 +563,7 @@ void* ru_thread_control( void* param )
((RRU_capabilities_t*)&rru_config_msg.msg[0])->nb_tx[0],
((RRU_capabilities_t*)&rru_config_msg.msg[0])->nb_rx[0]);
configure_ru(ru->idx,(RRU_capabilities_t *)&rru_config_msg.msg[0]);
configure_ru(ru,(RRU_capabilities_t *)&rru_config_msg.msg[0]);
// send config
if (send_config(ru,rru_config_msg) == 0) ru->state = RU_CONFIG;
@@ -603,7 +587,7 @@ void* ru_thread_control( void* param )
((RRU_config_t *)&rru_config_msg.msg[0])->prach_ConfigIndex[0]);
ru->frame_parms = calloc(1, sizeof(*ru->frame_parms));
configure_rru(ru->idx, (void*)&rru_config_msg.msg[0]);
configure_rru(ru, (void*)&rru_config_msg.msg[0]);
fill_rf_config(ru,ru->rf_config_file);
@@ -652,10 +636,10 @@ void* ru_thread_control( void* param )
LOG_I(PHY, "Signaling main thread that RU %d (is_slave %d) is ready in state %s\n",ru->idx,ru->is_slave,ru_states[ru->state]);
pthread_mutex_lock(&RC.ru_mutex);
RC.ru_mask &= ~(1<<ru->idx);
pthread_cond_signal(&RC.ru_cond);
pthread_mutex_unlock(&RC.ru_mutex);
pthread_mutex_lock(ru->ru_mutex);
*ru->ru_mask &= ~(1<<ru->idx);
pthread_cond_signal(ru->ru_cond);
pthread_mutex_unlock(ru->ru_mutex);
wait_sync("ru_thread_control");
@@ -710,10 +694,10 @@ void* ru_thread_control( void* param )
if (ru->state == RU_READY){
LOG_I(PHY, "Signaling main thread that RU %d is ready\n",ru->idx);
pthread_mutex_lock(&RC.ru_mutex);
RC.ru_mask &= ~(1<<ru->idx);
pthread_cond_signal(&RC.ru_cond);
pthread_mutex_unlock(&RC.ru_mutex);
pthread_mutex_lock(ru->ru_mutex);
*ru->ru_mask &= ~(1<<ru->idx);
pthread_cond_signal(ru->ru_cond);
pthread_mutex_unlock(ru->ru_mutex);
wait_sync("ru_thread_control");
@@ -736,7 +720,7 @@ void* ru_thread_control( void* param )
break;
case RRU_sync_ok: //RAU
if (ru->if_south == LOCAL_RF) LOG_E(PHY,"Received RRU_config_ok msg...Ignoring\n");
if (ru->if_south == LOCAL_RF) LOG_E(PHY,"Received RRU_sync_ok msg...Ignoring\n");
else{
if (ru->is_slave == 1){
printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Received RRU_sync_ok from RRU %d\n",ru->idx);