Merge branch 'bandwidth-testing' of https://gitlab.eurecom.fr/oai/openairinterface5g into bandwidth-testing
This commit is contained in:
@@ -220,8 +220,6 @@ void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch)
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ulsch->harq_processes[i]->rar_alloc=0;
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ulsch->harq_processes[i]->rar_alloc=0;
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ulsch->harq_processes[i]->status=NR_SCH_IDLE;
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ulsch->harq_processes[i]->status=NR_SCH_IDLE;
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ulsch->harq_processes[i]->subframe_scheduling_flag=0;
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ulsch->harq_processes[i]->subframe_scheduling_flag=0;
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ulsch->harq_processes[i]->phich_active=0;
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ulsch->harq_processes[i]->phich_ACK=0;
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ulsch->harq_processes[i]->previous_first_rb=0;
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ulsch->harq_processes[i]->previous_first_rb=0;
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ulsch->harq_processes[i]->handled=0;
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ulsch->harq_processes[i]->handled=0;
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ulsch->harq_processes[i]->delta_TF=0;
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ulsch->harq_processes[i]->delta_TF=0;
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@@ -506,8 +504,9 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_ULSCH_DECODING,1);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_ULSCH_DECODING,1);
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harq_process->TBS = pusch_pdu->pusch_data.tb_size;
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harq_process->TBS = pusch_pdu->pusch_data.tb_size;
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harq_process->round = nr_rv_round_map[pusch_pdu->pusch_data.rv_index];
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// harq_process->round = nr_rv_round_map[pusch_pdu->pusch_data.rv_index];
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if (pusch_pdu->pusch_data.rv_index == 0) harq_process->round = 0;
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A = (harq_process->TBS)<<3;
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A = (harq_process->TBS)<<3;
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LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d\n",harq_pid,A,G, mcs, n_layers, nb_rb, Qm, n_layers);
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LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d\n",harq_pid,A,G, mcs, n_layers, nb_rb, Qm, n_layers);
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@@ -1118,7 +1118,7 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
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int off = 0;
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int off = 0;
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#endif
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#endif
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if (0/*frame_parms->nb_antennas_rx>1*/) {
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if (frame_parms->nb_antennas_rx>1) {
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#if defined(__x86_64__) || defined(__i386__)
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#if defined(__x86_64__) || defined(__i386__)
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int nb_re = nb_rb*12;
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int nb_re = nb_rb*12;
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for (int aa=0;aa<frame_parms->nb_antennas_rx;aa++) {
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for (int aa=0;aa<frame_parms->nb_antennas_rx;aa++) {
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@@ -314,7 +314,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
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}
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}
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}
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}
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LOG_D(PHY,"PUCCH IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[0],corr_im[0],10*log10((double)corr_re[0]*corr_re[0] + (double)corr_im[0]*corr_im[0]));
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LOG_I(PHY,"PUCCH IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[0],corr_im[0],10*log10((double)corr_re[0]*corr_re[0] + (double)corr_im[0]*corr_im[0]));
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if (l>1) LOG_D(PHY,"PUCCH 2nd symbol IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[1],corr_im[1],10*log10((double)corr_re[1]*corr_re[1] + (double)corr_im[1]*corr_im[1]));
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if (l>1) LOG_D(PHY,"PUCCH 2nd symbol IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[1],corr_im[1],10*log10((double)corr_re[1]*corr_re[1] + (double)corr_im[1]*corr_im[1]));
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if (pucch_pdu->freq_hop_flag == 0 && l==1) // non-coherent correlation
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if (pucch_pdu->freq_hop_flag == 0 && l==1) // non-coherent correlation
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@@ -56,7 +56,7 @@ void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
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uint8_t *sdu);
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uint8_t *sdu);
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void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t harq_pid, uint8_t crc_flag);
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void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t harq_pid, uint8_t crc_flag,int dtx_flag);
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//added
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//added
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void handle_nfapi_nr_ul_dci_pdu(PHY_VARS_gNB *gNB,
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void handle_nfapi_nr_ul_dci_pdu(PHY_VARS_gNB *gNB,
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@@ -261,6 +261,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
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}
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}
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}
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}
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int dumpsig=0;
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// if all segments are done
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// if all segments are done
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if (rdata->nbSegments == ulsch_harq->processedSegments) {
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if (rdata->nbSegments == ulsch_harq->processedSegments) {
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if (decodeSuccess) {
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if (decodeSuccess) {
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@@ -271,11 +272,13 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
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ulsch->harq_mask &= ~(1 << rdata->harq_pid);
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ulsch->harq_mask &= ~(1 << rdata->harq_pid);
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LOG_D(PHY, "ULSCH received ok \n");
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LOG_D(PHY, "ULSCH received ok \n");
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nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0);
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nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0,0);
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dumpsig=1;
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} else {
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} else {
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LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, TBS %d) r %d\n",
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LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, TBS %d) r %d\n",
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gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot,
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gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot,
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rdata->harq_pid,pusch_pdu->pusch_data.new_data_indicator,ulsch_harq->status, ulsch_harq->round,ulsch_harq->TBS,r);
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rdata->harq_pid,pusch_pdu->pusch_data.new_data_indicator,ulsch_harq->status, ulsch_harq->round, ulsch_harq->ulsch_pdu.pusch_data.rv_index,ulsch_harq->TBS,r);
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ulsch_harq->round++;
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if (ulsch_harq->round >= ulsch->Mlimit) {
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if (ulsch_harq->round >= ulsch->Mlimit) {
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ulsch_harq->status = SCH_IDLE;
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ulsch_harq->status = SCH_IDLE;
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ulsch_harq->round = 0;
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ulsch_harq->round = 0;
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@@ -285,10 +288,10 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
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ulsch_harq->handled = 1;
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ulsch_harq->handled = 1;
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LOG_D(PHY, "ULSCH %d in error\n",rdata->ulsch_id);
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LOG_D(PHY, "ULSCH %d in error\n",rdata->ulsch_id);
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nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 1);
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nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 1,0);
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}
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}
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/*
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/*
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if (ulsch_harq->ulsch_pdu.mcs_index == 9) {
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if (ulsch_harq->ulsch_pdu.mcs_index == 9 && dumpsig==1) {
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#ifdef __AVX2__
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#ifdef __AVX2__
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int off = ((ulsch_harq->ulsch_pdu.rb_size&1) == 1)? 4:0;
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int off = ((ulsch_harq->ulsch_pdu.rb_size&1) == 1)? 4:0;
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#else
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#else
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@@ -402,7 +405,7 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
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}
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}
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void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id, uint8_t harq_pid, uint8_t crc_flag) {
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void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id, uint8_t harq_pid, uint8_t crc_flag, int dtx_flag) {
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pthread_mutex_lock(&gNB->UL_INFO_mutex);
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pthread_mutex_lock(&gNB->UL_INFO_mutex);
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@@ -427,7 +430,15 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
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if (timing_advance_update > 63) timing_advance_update = 63;
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if (timing_advance_update > 63) timing_advance_update = 63;
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if (crc_flag == 0) LOG_I(PHY, "%d.%d : Received PUSCH : Estimated timing advance PUSCH is = %d, timing_advance_update is %d \n", frame,slot_rx,sync_pos,timing_advance_update);
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if (crc_flag == 0) LOG_I(PHY, "%d.%d : Received PUSCH : Estimated timing advance PUSCH is = %d, timing_advance_update is %d \n", frame,slot_rx,sync_pos,timing_advance_update);
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else if (harq_process->round>0 || dtx_flag == 0) { // increment round if crc_flag == 1 and not(dtx_flag ==1 and round==0)
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harq_process->round++;
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if (harq_process->round >= ulsch->Mlimit) {
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harq_process->status = SCH_IDLE;
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harq_process->round = 0;
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harq_process->handled = 0;
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ulsch->harq_mask &= ~(1 << harq_pid);
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}
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}
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// estimate UL_CQI for MAC
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// estimate UL_CQI for MAC
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int SNRtimes10 = dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_power_tot) -
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int SNRtimes10 = dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_power_tot) -
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@@ -488,7 +499,7 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
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gNB->crc_pdu_list[num_crc].ul_cqi = cqi;
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gNB->crc_pdu_list[num_crc].ul_cqi = cqi;
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gNB->crc_pdu_list[num_crc].timing_advance = timing_advance_update;
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gNB->crc_pdu_list[num_crc].timing_advance = timing_advance_update;
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// in terms of dBFS range -128 to 0 with 0.1 step
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// in terms of dBFS range -128 to 0 with 0.1 step
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gNB->crc_pdu_list[num_crc].rssi = 1280 - (10*dB_fixed(32767*32767)-dB_fixed_times10(gNB->pusch_vars[ULSCH_id]->ulsch_power[0]));
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gNB->crc_pdu_list[num_crc].rssi = (dtx_flag==0) ? 1280 - (10*dB_fixed(32767*32767)-dB_fixed_times10(gNB->pusch_vars[ULSCH_id]->ulsch_power[0])) : 0;
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gNB->UL_INFO.crc_ind.number_crcs++;
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gNB->UL_INFO.crc_ind.number_crcs++;
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@@ -502,7 +513,7 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
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gNB->rx_pdu_list[num_rx].harq_id = harq_pid;
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gNB->rx_pdu_list[num_rx].harq_id = harq_pid;
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gNB->rx_pdu_list[num_rx].ul_cqi = cqi;
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gNB->rx_pdu_list[num_rx].ul_cqi = cqi;
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gNB->rx_pdu_list[num_rx].timing_advance = timing_advance_update;
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gNB->rx_pdu_list[num_rx].timing_advance = timing_advance_update;
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gNB->rx_pdu_list[num_rx].rssi = 1280 - (10*dB_fixed(32767*32767)-dB_fixed_times10(gNB->pusch_vars[ULSCH_id]->ulsch_power[0]));
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gNB->rx_pdu_list[num_rx].rssi = gNB->crc_pdu_list[num_crc].rssi;
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if (crc_flag)
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if (crc_flag)
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gNB->rx_pdu_list[num_rx].pdu_length = 0;
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gNB->rx_pdu_list[num_rx].pdu_length = 0;
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else {
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else {
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@@ -744,7 +755,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
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no_sig = nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, harq_pid);
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no_sig = nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, harq_pid);
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if (no_sig) {
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if (no_sig) {
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LOG_D(PHY, "PUSCH not detected in frame %d, slot %d\n", frame_rx, slot_rx);
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LOG_D(PHY, "PUSCH not detected in frame %d, slot %d\n", frame_rx, slot_rx);
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nr_fill_indication(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid, 1);
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nr_fill_indication(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid, 1,1);
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return 1;
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return 1;
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}
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}
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gNB->pusch_vars[ULSCH_id]->ulsch_power_tot=0;
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gNB->pusch_vars[ULSCH_id]->ulsch_power_tot=0;
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@@ -755,7 +766,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
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gNB->pusch_vars[ULSCH_id]->ulsch_noise_power[aarx]/=num_dmrs;
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gNB->pusch_vars[ULSCH_id]->ulsch_noise_power[aarx]/=num_dmrs;
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gNB->pusch_vars[ULSCH_id]->ulsch_noise_power_tot += gNB->pusch_vars[ULSCH_id]->ulsch_noise_power[aarx];
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gNB->pusch_vars[ULSCH_id]->ulsch_noise_power_tot += gNB->pusch_vars[ULSCH_id]->ulsch_noise_power[aarx];
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}
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}
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/*if (dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_power_tot) <
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if (dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_power_tot) <
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dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_noise_power_tot) + gNB->pusch_thres) {
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dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_noise_power_tot) + gNB->pusch_thres) {
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NR_gNB_SCH_STATS_t *stats=get_ulsch_stats(gNB,ulsch);
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NR_gNB_SCH_STATS_t *stats=get_ulsch_stats(gNB,ulsch);
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@@ -763,11 +774,11 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
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dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_power_tot),
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dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_power_tot),
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dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_noise_power_tot),gNB->pusch_thres);
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dB_fixed_x10(gNB->pusch_vars[ULSCH_id]->ulsch_noise_power_tot),gNB->pusch_thres);
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gNB->pusch_vars[ULSCH_id]->ulsch_power_tot = gNB->pusch_vars[ULSCH_id]->ulsch_noise_power_tot;
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gNB->pusch_vars[ULSCH_id]->ulsch_power_tot = gNB->pusch_vars[ULSCH_id]->ulsch_noise_power_tot;
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nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1);
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nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1,1);
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gNB->pusch_vars[ULSCH_id]->DTX=1;
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gNB->pusch_vars[ULSCH_id]->DTX=1;
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if (stats) stats->DTX++;
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if (stats) stats->DTX++;
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return 1;
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return 1;
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} else*/ gNB->pusch_vars[ULSCH_id]->DTX=0;
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} else gNB->pusch_vars[ULSCH_id]->DTX=0;
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stop_meas(&gNB->rx_pusch_stats);
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stop_meas(&gNB->rx_pusch_stats);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RX_PUSCH,0);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RX_PUSCH,0);
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@@ -85,17 +85,27 @@ void dump_mac_stats(gNB_MAC_INST *gNB)
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UE_info->num_UEs,
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UE_info->num_UEs,
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UE_info->UE_sched_ctrl[UE_id].ph,
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UE_info->UE_sched_ctrl[UE_id].ph,
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UE_info->UE_sched_ctrl[UE_id].pcmax);
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UE_info->UE_sched_ctrl[UE_id].pcmax);
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stroff+=sprintf(output+stroff,"UE ID %d RNTI %04x (%d/%d) PH %d dB PCMAX %d dBm\n",
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UE_id,
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UE_info->rnti[UE_id],
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num++,
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UE_info->num_UEs,
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UE_info->UE_sched_ctrl[UE_id].ph,
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UE_info->UE_sched_ctrl[UE_id].pcmax);
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NR_mac_stats_t *stats = &UE_info->mac_stats[UE_id];
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NR_mac_stats_t *stats = &UE_info->mac_stats[UE_id];
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const int avg_rsrp = stats->num_rsrp_meas > 0 ? stats->cumul_rsrp / stats->num_rsrp_meas : 0;
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const int avg_rsrp = stats->num_rsrp_meas > 0 ? stats->cumul_rsrp / stats->num_rsrp_meas : 0;
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stroff+=sprintf(output+stroff,"UE %d: dlsch_rounds %d/%d/%d/%d, dlsch_errors %d, average RSRP %d (%d meas)\n",
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stroff+=sprintf(output+stroff,"UE %d: dlsch_rounds %d/%d/%d/%d, dlsch_errors %d, pucch0_DTX %d average RSRP %d (%d meas)\n",
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UE_id,
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UE_id,
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stats->dlsch_rounds[0], stats->dlsch_rounds[1],
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stats->dlsch_rounds[0], stats->dlsch_rounds[1],
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stats->dlsch_rounds[2], stats->dlsch_rounds[3], stats->dlsch_errors,
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stats->dlsch_rounds[2], stats->dlsch_rounds[3], stats->dlsch_errors,
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stats->pucch0_DTX,
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avg_rsrp, stats->num_rsrp_meas);
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avg_rsrp, stats->num_rsrp_meas);
|
||||||
LOG_D(NR_MAC, "UE %d: dlsch_rounds %d/%d/%d/%d, dlsch_errors %d, average RSRP %d (%d meas)\n",
|
LOG_D(NR_MAC, "UE %d: dlsch_rounds %d/%d/%d/%d, dlsch_errors %d, pucch0_DTX %d, average RSRP %d (%d meas)\n",
|
||||||
UE_id,
|
UE_id,
|
||||||
stats->dlsch_rounds[0], stats->dlsch_rounds[1],
|
stats->dlsch_rounds[0], stats->dlsch_rounds[1],
|
||||||
stats->dlsch_rounds[2], stats->dlsch_rounds[3], stats->dlsch_errors,
|
stats->dlsch_rounds[2], stats->dlsch_rounds[3], stats->dlsch_errors,
|
||||||
|
stats->pucch0_DTX,
|
||||||
avg_rsrp, stats->num_rsrp_meas);
|
avg_rsrp, stats->num_rsrp_meas);
|
||||||
stats->num_rsrp_meas = 0;
|
stats->num_rsrp_meas = 0;
|
||||||
stats->cumul_rsrp = 0 ;
|
stats->cumul_rsrp = 0 ;
|
||||||
|
|||||||
@@ -1541,7 +1541,12 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
ra->state = Msg4;
|
// ra->state = Msg4;
|
||||||
|
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) Received Nak of RA-Msg4. CBRA procedure failed!\n", UE_id, ra->rnti);
|
||||||
|
mac_remove_nr_ue(module_id,ra->rnti);
|
||||||
|
nr_clear_ra_proc(module_id, CC_id, frame, ra);
|
||||||
|
UE_info->active[UE_id] = false;
|
||||||
|
UE_info->Msg4_ACKed[UE_id] = false;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -543,7 +543,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
|
|||||||
slot);
|
slot);
|
||||||
int cid = sched_ctrl->coreset->controlResourceSetId;
|
int cid = sched_ctrl->coreset->controlResourceSetId;
|
||||||
UE_info->num_pdcch_cand[UE_id][cid]--;
|
UE_info->num_pdcch_cand[UE_id][cid]--;
|
||||||
int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id][cid];
|
int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp?sched_ctrl->active_bwp->bwp_Id:0][cid];
|
||||||
for (int i = 0; i < sched_ctrl->aggregation_level; i++)
|
for (int i = 0; i < sched_ctrl->aggregation_level; i++)
|
||||||
cce_list[sched_ctrl->cce_index + i] = 0;
|
cce_list[sched_ctrl->cce_index + i] = 0;
|
||||||
return false;
|
return false;
|
||||||
@@ -743,6 +743,8 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
|
|||||||
if (UE_info->num_UEs == 0)
|
if (UE_info->num_UEs == 0)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
|
if (slot!=11) return;
|
||||||
|
|
||||||
const int CC_id = 0;
|
const int CC_id = 0;
|
||||||
|
|
||||||
|
|
||||||
@@ -813,6 +815,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
|||||||
if (!is_xlsch_in_slot(gNB_mac->dlsch_slot_bitmap[slot / 64], slot))
|
if (!is_xlsch_in_slot(gNB_mac->dlsch_slot_bitmap[slot / 64], slot))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
|
|
||||||
/* PREPROCESSOR */
|
/* PREPROCESSOR */
|
||||||
gNB_mac->pre_processor_dl(module_id, frame, slot);
|
gNB_mac->pre_processor_dl(module_id, frame, slot);
|
||||||
|
|
||||||
@@ -884,7 +887,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
|||||||
UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
|
UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
|
||||||
|
|
||||||
LOG_I(NR_MAC,
|
LOG_I(NR_MAC,
|
||||||
"%4d.%2d [DLSCH/PDSCH/PUCCH] RNTI %04x start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d NDI %d dl_data_to_ULACK %d (%d.%d)\n",
|
"%4d.%2d [DLSCH/PDSCH/PUCCH] RNTI %04x start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) TPC %d\n",
|
||||||
frame,
|
frame,
|
||||||
slot,
|
slot,
|
||||||
rnti,
|
rnti,
|
||||||
@@ -897,10 +900,12 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
|||||||
TBS,
|
TBS,
|
||||||
current_harq_pid,
|
current_harq_pid,
|
||||||
harq->round,
|
harq->round,
|
||||||
|
nr_rv_round_map[harq->round],
|
||||||
harq->ndi,
|
harq->ndi,
|
||||||
pucch->timing_indicator,
|
pucch->timing_indicator,
|
||||||
pucch->frame,
|
pucch->frame,
|
||||||
pucch->ul_slot);
|
pucch->ul_slot,
|
||||||
|
sched_ctrl->tpc1);
|
||||||
|
|
||||||
NR_BWP_Downlink_t *bwp = sched_ctrl->active_bwp;
|
NR_BWP_Downlink_t *bwp = sched_ctrl->active_bwp;
|
||||||
|
|
||||||
@@ -1160,7 +1165,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
|||||||
0,
|
0,
|
||||||
0);
|
0);
|
||||||
|
|
||||||
LOG_D(NR_MAC,
|
LOG_I(NR_MAC,
|
||||||
"%4d.%2d RNTI %04x: %d bytes from %s %d (ndata %d, remaining size %d)\n",
|
"%4d.%2d RNTI %04x: %d bytes from %s %d (ndata %d, remaining size %d)\n",
|
||||||
frame,
|
frame,
|
||||||
slot,
|
slot,
|
||||||
|
|||||||
@@ -238,7 +238,7 @@ bool nr_find_nb_rb(uint16_t Qm,
|
|||||||
return true;
|
return true;
|
||||||
|
|
||||||
/* is the minimum enough? */
|
/* is the minimum enough? */
|
||||||
*nb_rb = 1;
|
*nb_rb = 5;
|
||||||
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3;
|
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3;
|
||||||
if (bytes <= *tbs)
|
if (bytes <= *tbs)
|
||||||
return true;
|
return true;
|
||||||
|
|||||||
@@ -1090,6 +1090,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
|
|||||||
const int8_t pid = sched_ctrl->feedback_dl_harq.head;
|
const int8_t pid = sched_ctrl->feedback_dl_harq.head;
|
||||||
remove_front_nr_list(&sched_ctrl->feedback_dl_harq);
|
remove_front_nr_list(&sched_ctrl->feedback_dl_harq);
|
||||||
handle_dl_harq(mod_id, UE_id, pid, harq_value == 1 && harq_confidence == 0);
|
handle_dl_harq(mod_id, UE_id, pid, harq_value == 1 && harq_confidence == 0);
|
||||||
|
if (harq_confidence == 1) UE_info->mac_stats[UE_id].pucch0_DTX++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1103,7 +1104,8 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
|
|||||||
// tpc (power control) only if we received AckNack or positive SR. For a
|
// tpc (power control) only if we received AckNack or positive SR. For a
|
||||||
// negative SR, the UE won't have sent anything, and the SNR is not valid
|
// negative SR, the UE won't have sent anything, and the SNR is not valid
|
||||||
if (((uci_01->pduBitmap >> 1) & 0x1) || sched_ctrl->SR) {
|
if (((uci_01->pduBitmap >> 1) & 0x1) || sched_ctrl->SR) {
|
||||||
sched_ctrl->tpc1 = nr_get_tpc(RC.nrmac[mod_id]->pucch_target_snrx10, uci_01->ul_cqi, 30);
|
if (uci_01->harq->harq_confidence_level==0) sched_ctrl->tpc1 = nr_get_tpc(RC.nrmac[mod_id]->pucch_target_snrx10, uci_01->ul_cqi, 30);
|
||||||
|
else sched_ctrl->tpc1 = 3;
|
||||||
sched_ctrl->pucch_snrx10 = uci_01->ul_cqi * 5 - 640;
|
sched_ctrl->pucch_snrx10 = uci_01->ul_cqi * 5 - 640;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -624,7 +624,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
|
|||||||
T_BUFFER(sduP, sdu_lenP));
|
T_BUFFER(sduP, sdu_lenP));
|
||||||
|
|
||||||
UE_info->mac_stats[UE_id].ulsch_total_bytes_rx += sdu_lenP;
|
UE_info->mac_stats[UE_id].ulsch_total_bytes_rx += sdu_lenP;
|
||||||
LOG_D(NR_MAC, "[gNB %d][PUSCH %d] CC_id %d %d.%d Received ULSCH sdu from PHY (rnti %x, UE_id %d) ul_cqi %d TA %d sduP %p\n",
|
LOG_I(NR_MAC, "[gNB %d][PUSCH %d] CC_id %d %d.%d Received ULSCH sdu from PHY (rnti %x, UE_id %d) ul_cqi %d TA %d sduP %p, rssi %d\n",
|
||||||
gnb_mod_idP,
|
gnb_mod_idP,
|
||||||
harq_pid,
|
harq_pid,
|
||||||
CC_idP,
|
CC_idP,
|
||||||
@@ -634,19 +634,21 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
|
|||||||
UE_id,
|
UE_id,
|
||||||
ul_cqi,
|
ul_cqi,
|
||||||
timing_advance,
|
timing_advance,
|
||||||
sduP);
|
sduP,
|
||||||
|
rssi);
|
||||||
|
|
||||||
// if not missed detection (10dB threshold for now)
|
// if not missed detection (10dB threshold for now)
|
||||||
if (UE_scheduling_control->raw_rssi < 100 + rssi) {
|
if (rssi>0) {
|
||||||
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10,ul_cqi,30);
|
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10,ul_cqi,30);
|
||||||
if (timing_advance != 0xffff)
|
if (timing_advance != 0xffff)
|
||||||
UE_scheduling_control->ta_update = timing_advance;
|
UE_scheduling_control->ta_update = timing_advance;
|
||||||
UE_scheduling_control->raw_rssi = rssi;
|
UE_scheduling_control->raw_rssi = rssi;
|
||||||
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640;
|
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640;
|
||||||
LOG_D(NR_MAC, "[UE %d] PUSCH TPC %d and TA %d\n",UE_id,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update);
|
LOG_I(NR_MAC, "[UE %d] PUSCH TPC %d and TA %d\n",UE_id,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update);
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
UE_scheduling_control->tpc0 = 1;
|
LOG_I(NR_MAC,"[UE %d] Detected DTX : increasing UE TX power\n",UE_id);
|
||||||
|
UE_scheduling_control->tpc0 = 3;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
|
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
|
||||||
@@ -767,6 +769,14 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
|
|||||||
UE_id,
|
UE_id,
|
||||||
ra->rnti);
|
ra->rnti);
|
||||||
|
|
||||||
|
NR_UE_sched_ctrl_t *UE_scheduling_control = &UE_info->UE_sched_ctrl[UE_id];
|
||||||
|
|
||||||
|
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10,ul_cqi,30);
|
||||||
|
if (timing_advance != 0xffff)
|
||||||
|
UE_scheduling_control->ta_update = timing_advance;
|
||||||
|
UE_scheduling_control->raw_rssi = rssi;
|
||||||
|
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640;
|
||||||
|
LOG_I(NR_MAC, "[UE %d] PUSCH TPC %d and TA %d\n",UE_id,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update);
|
||||||
if(ra->cfra) {
|
if(ra->cfra) {
|
||||||
|
|
||||||
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) CFRA procedure succeeded!\n", UE_id, ra->rnti);
|
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) CFRA procedure succeeded!\n", UE_id, ra->rnti);
|
||||||
@@ -1440,7 +1450,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
|
|||||||
sched_ctrl->last_ul_slot = sched_pusch->slot;
|
sched_ctrl->last_ul_slot = sched_pusch->slot;
|
||||||
|
|
||||||
LOG_I(NR_MAC,
|
LOG_I(NR_MAC,
|
||||||
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d\n",
|
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
|
||||||
frame,
|
frame,
|
||||||
slot,
|
slot,
|
||||||
rnti,
|
rnti,
|
||||||
@@ -1459,7 +1469,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
|
|||||||
cur_harq->ndi,
|
cur_harq->ndi,
|
||||||
sched_ctrl->estimated_ul_buffer,
|
sched_ctrl->estimated_ul_buffer,
|
||||||
sched_ctrl->sched_ul_bytes,
|
sched_ctrl->sched_ul_bytes,
|
||||||
sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes);
|
sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes,
|
||||||
|
sched_ctrl->tpc0);
|
||||||
|
|
||||||
|
|
||||||
/* PUSCH in a later slot, but corresponding DCI now! */
|
/* PUSCH in a later slot, but corresponding DCI now! */
|
||||||
|
|||||||
@@ -614,6 +614,7 @@ typedef struct {
|
|||||||
int ulsch_total_bytes_scheduled;
|
int ulsch_total_bytes_scheduled;
|
||||||
int ulsch_total_bytes_rx;
|
int ulsch_total_bytes_rx;
|
||||||
int ulsch_current_bytes;
|
int ulsch_current_bytes;
|
||||||
|
int pucch0_DTX;
|
||||||
int cumul_rsrp;
|
int cumul_rsrp;
|
||||||
uint8_t num_rsrp_meas;
|
uint8_t num_rsrp_meas;
|
||||||
} NR_mac_stats_t;
|
} NR_mac_stats_t;
|
||||||
|
|||||||
@@ -1188,7 +1188,7 @@ void fill_initial_SpCellConfig(rnti_t rnti,
|
|||||||
long *delay[8];
|
long *delay[8];
|
||||||
for (int i=0;i<8;i++) {
|
for (int i=0;i<8;i++) {
|
||||||
delay[i] = calloc(1,sizeof(*delay[i]));
|
delay[i] = calloc(1,sizeof(*delay[i]));
|
||||||
*delay[i] = (i+2+4);
|
*delay[i] = (i+2/*+4*/);
|
||||||
ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]);
|
ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -940,7 +940,7 @@ extern "C" {
|
|||||||
LOG_I(HW, "openair0_cfg[0].sdr_addrs == '%s'\n", openair0_cfg[0].sdr_addrs);
|
LOG_I(HW, "openair0_cfg[0].sdr_addrs == '%s'\n", openair0_cfg[0].sdr_addrs);
|
||||||
LOG_I(HW, "openair0_cfg[0].clock_source == '%d' (internal = %d, external = %d)\n", openair0_cfg[0].clock_source,internal,external);
|
LOG_I(HW, "openair0_cfg[0].clock_source == '%d' (internal = %d, external = %d)\n", openair0_cfg[0].clock_source,internal,external);
|
||||||
usrp_state_t *s ;
|
usrp_state_t *s ;
|
||||||
int choffset = 0;
|
int choffset = 1;
|
||||||
|
|
||||||
if ( device->priv == NULL) {
|
if ( device->priv == NULL) {
|
||||||
s=(usrp_state_t *)calloc(sizeof(usrp_state_t),1);
|
s=(usrp_state_t *)calloc(sizeof(usrp_state_t),1);
|
||||||
|
|||||||
Reference in New Issue
Block a user