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Bug fix: dci0_ongoing timer ok, now impossible to set ul_SR when dci0 is ongoing.

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This commit is contained in:
Louis Adrien Dufrene
2019-04-16 08:22:54 +02:00
parent d7cddc2825
commit 36cd05bcba
2 changed files with 1 additions and 4 deletions
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openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+1 -1
View File
@@ -4954,7 +4954,7 @@ SR_indication(module_id_t mod_idP,
UE_scheduling_ctrl = &(UE_list->UE_sched_ctrl[UE_id]); UE_scheduling_ctrl = &(UE_list->UE_sched_ctrl[UE_id]);
if ((UE_scheduling_ctrl->cdrx_configured == TRUE) && if ((UE_scheduling_ctrl->cdrx_configured == TRUE) &&
(UE_scheduling_ctrl->dci0_ongoing_timer > 4) && (UE_scheduling_ctrl->dci0_ongoing_timer > 0) &&
(UE_scheduling_ctrl->dci0_ongoing_timer < 8)) { (UE_scheduling_ctrl->dci0_ongoing_timer < 8)) {
LOG_D(MAC, "[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d. \ LOG_D(MAC, "[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d. \
The SR is not set do to ongoing DCI0 with CDRX activated\n", The SR is not set do to ongoing DCI0 with CDRX activated\n",
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
-3
View File
@@ -241,9 +241,6 @@ rx_sdu(const module_id_t enb_mod_idP,
* Note: in case of asynchronous UL HARQ process restart here relevant RTT timer. * Note: in case of asynchronous UL HARQ process restart here relevant RTT timer.
* Start corresponding CDRX ULRetransmission timer. * Start corresponding CDRX ULRetransmission timer.
*/ */
unsigned long active_time_condition = 10;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DRX_ACTIVE_TIME_CONDITION, (unsigned long) active_time_condition);
} }
first_rb = UE_template_ptr->first_rb_ul[harq_pid]; first_rb = UE_template_ptr->first_rb_ul[harq_pid];