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fembms: new FeMBMS/eMBMS MCH eNB/UE scheduler implemented

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- MBMS scheduler re-worked to enable dedicated MBMS serving cells
	- added support for multiple eMBMS MCH sessions
	- added support for multiple FeMBMS MCH sessions

Signed-off-by: Javier Morgade <javier.morgade@ieee.org>
This commit is contained in:
Javier Morgade
2020-07-21 18:16:46 +02:00
parent 9b37dcecdb
commit 3aaa152e4e
7 changed files with 1388 additions and 580 deletions
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openair2/LAYER2/MAC/eNB_scheduler.c
+18 -3
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@@ -904,6 +904,7 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} }
#endif #endif
int do_fembms_si=0;
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
if (cc[CC_id].MBMS_flag > 0) { if (cc[CC_id].MBMS_flag > 0) {
start_meas(&RC.mac[module_idP]->schedule_mch); start_meas(&RC.mac[module_idP]->schedule_mch);
@@ -914,6 +915,10 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} }
stop_meas(&RC.mac[module_idP]->schedule_mch); stop_meas(&RC.mac[module_idP]->schedule_mch);
} }
if (cc[CC_id].FeMBMS_flag > 0) {
do_fembms_si = 1;
}
} }
static int debug_flag = 0; static int debug_flag = 0;
@@ -935,12 +940,22 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} }
/* This schedules MIB */ /* This schedules MIB */
if ((subframeP == 0) && (frameP & 3) == 0) if(!do_fembms_si/*get_softmodem_params()->fembms*/){
schedule_mib(module_idP, frameP, subframeP); if ((subframeP == 0) && (frameP & 3) == 0)
schedule_mib(module_idP, frameP, subframeP);
}else{
if ((subframeP == 0) && (frameP & 15) == 0 ){
schedule_fembms_mib(module_idP, frameP, subframeP);
//schedule_SI_MBMS(module_idP, frameP, subframeP);
}
}
if (get_softmodem_params()->phy_test == 0) { if (get_softmodem_params()->phy_test == 0) {
/* This schedules SI for legacy LTE and eMTC starting in subframeP */ /* This schedules SI for legacy LTE and eMTC starting in subframeP */
schedule_SI(module_idP, frameP, subframeP); if(!do_fembms_si/*get_softmodem_params()->fembms*/)
schedule_SI(module_idP, frameP, subframeP);
else
schedule_SI_MBMS(module_idP, frameP, subframeP);
/* This schedules Paging in subframeP */ /* This schedules Paging in subframeP */
schedule_PCH(module_idP,frameP,subframeP); schedule_PCH(module_idP,frameP,subframeP);
/* This schedules Random-Access for legacy LTE and eMTC starting in subframeP */ /* This schedules Random-Access for legacy LTE and eMTC starting in subframeP */
openair2/LAYER2/MAC/eNB_scheduler_bch.c
+59
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@@ -731,6 +731,7 @@ schedule_SI_MBMS(module_id_t module_idP, frame_t frameP,
if (subframeP == 0) { if (subframeP == 0) {
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
cc = &eNB->common_channels[CC_id]; cc = &eNB->common_channels[CC_id];
//printf("*cc->sib1_MBMS->si_WindowLength_r14 %d \n", *cc->sib1_MBMS->si_WindowLength_r14);
vrb_map = (void *) &cc->vrb_map; vrb_map = (void *) &cc->vrb_map;
N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth); N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth);
dl_config_request = &eNB->DL_req[CC_id]; dl_config_request = &eNB->DL_req[CC_id];
@@ -911,6 +912,64 @@ schedule_SI_MBMS(module_id_t module_idP, frame_t frameP,
stop_meas(&eNB->schedule_si_mbms); stop_meas(&eNB->schedule_si_mbms);
} }
void
schedule_fembms_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) {
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc;
nfapi_dl_config_request_pdu_t *dl_config_pdu;
nfapi_tx_request_pdu_t *TX_req;
int mib_sdu_length;
int CC_id;
nfapi_dl_config_request_t *dl_config_request;
nfapi_dl_config_request_body_t *dl_req;
uint16_t sfn_sf = frameP << 4 | subframeP;
AssertFatal(subframeP == 0, "Subframe must be 0\n");
AssertFatal((frameP & 15) == 0, "Frame must be a multiple of 16\n");
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
dl_config_request = &eNB->DL_req[CC_id];
dl_req = &dl_config_request->dl_config_request_body;
cc = &eNB->common_channels[CC_id];
mib_sdu_length = mac_rrc_data_req(module_idP, CC_id, frameP, MIBCH_MBMS, 0xFFFF, 1, &cc->MIB_pdu.payload[0], 0); // not used in this case
LOG_D(MAC, "Frame %d, subframe %d: BCH PDU length %d\n", frameP, subframeP, mib_sdu_length);
if (mib_sdu_length > 0) {
LOG_D(MAC, "Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n", frameP, subframeP, dl_req->number_pdu, mib_sdu_length);
if ((frameP & 1023) < 40)
LOG_D(MAC,
"[eNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes (cc->mib->message.schedulingInfoSIB1_BR_r13 %d)\n",
module_idP, frameP, CC_id, mib_sdu_length,
(int) cc->mib->message.schedulingInfoSIB1_BR_r13);
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void *) dl_config_pdu, 0,
sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_BCH_PDU_TYPE, dl_config_pdu->pdu_size =
2 + sizeof(nfapi_dl_config_bch_pdu);
dl_config_pdu->bch_pdu.bch_pdu_rel8.tl.tag = NFAPI_DL_CONFIG_REQUEST_BCH_PDU_REL8_TAG;
dl_config_pdu->bch_pdu.bch_pdu_rel8.length = mib_sdu_length;
dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index = eNB->pdu_index[CC_id];
dl_config_pdu->bch_pdu.bch_pdu_rel8.transmission_power = 6000;
dl_req->tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
dl_req->number_pdu++;
dl_config_request->header.message_id = NFAPI_DL_CONFIG_REQUEST;
dl_config_request->sfn_sf = sfn_sf;
LOG_D(MAC, "eNB->DL_req[0].number_pdu %d (%p)\n", dl_req->number_pdu, &dl_req->number_pdu);
// DL request
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
TX_req->pdu_length = 3;
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = 3;
TX_req->segments[0].segment_data = cc[CC_id].MIB_pdu.payload;
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
eNB->TX_req[CC_id].sfn_sf = sfn_sf;
eNB->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
eNB->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
}
}
}
void void
schedule_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) { schedule_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) {
openair2/LAYER2/MAC/eNB_scheduler_mch.c
+684 -565
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File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/mac.h
+7 -2
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@@ -56,6 +56,7 @@
#include "LTE_MobilityControlInfo.h" #include "LTE_MobilityControlInfo.h"
#include "LTE_MBSFN-AreaInfoList-r9.h" #include "LTE_MBSFN-AreaInfoList-r9.h"
#include "LTE_MBSFN-SubframeConfigList.h" #include "LTE_MBSFN-SubframeConfigList.h"
#include "LTE_MBSFNAreaConfiguration-r9.h"
#include "LTE_PMCH-InfoList-r9.h" #include "LTE_PMCH-InfoList-r9.h"
#include "LTE_SCellToAddMod-r10.h" #include "LTE_SCellToAddMod-r10.h"
#include "LTE_SystemInformationBlockType1-v1310-IEs.h" #include "LTE_SystemInformationBlockType1-v1310-IEs.h"
@@ -412,9 +413,11 @@ typedef struct {
/*!\brief Values of BCCH SIB_BR logical channel (fake) */ /*!\brief Values of BCCH SIB_BR logical channel (fake) */
#define BCCH_SI_BR 7 // SI-BR #define BCCH_SI_BR 7 // SI-BR
/*!\brief Values of BCCH SIB1_MBMS logical channel (fake) */ /*!\brief Values of BCCH SIB1_MBMS logical channel (fake) */
#define BCCH_SIB1_MBMS 60 // SIB1_MBMS //TODO better armonize index #define MIBCH_MBMS 10 // SIB1_MBMS //TODO better armonize index
#define BCCH_SIB1_MBMS 12 // SIB1_MBMS //TODO better armonize index
/*!\brief Values of BCCH SI_MBMS logical channel (fake) */ /*!\brief Values of BCCH SI_MBMS logical channel (fake) */
#define BCCH_SI_MBMS 61 // SIB_MBMS //TODO better armonize index #define BCCH_SI_MBMS 13 // SIB_MBMS //TODO better armonize index
#define MCCH_COUNTING 14
/*!\brief Value of CCCH / SRB0 logical channel */ /*!\brief Value of CCCH / SRB0 logical channel */
#define CCCH 0 // srb0 #define CCCH 0 // srb0
/*!\brief DCCH / SRB1 logical channel */ /*!\brief DCCH / SRB1 logical channel */
@@ -1312,6 +1315,8 @@ typedef struct {
/// MBSFN SubframeConfig /// MBSFN SubframeConfig
struct LTE_MBSFN_SubframeConfig *mbsfn_SubframeConfig[8]; struct LTE_MBSFN_SubframeConfig *mbsfn_SubframeConfig[8];
struct LTE_NonMBSFN_SubframeConfig_r14 *non_mbsfn_SubframeConfig; struct LTE_NonMBSFN_SubframeConfig_r14 *non_mbsfn_SubframeConfig;
struct LTE_MBSFN_SubframeConfig *commonSF_Alloc_r9_mbsfn_SubframeConfig[8]; // FIXME replace 8 by MAX_MBSFN_AREA?
uint8_t commonSF_AllocPeriod_r9;
/// number of subframe allocation pattern available for MBSFN sync area /// number of subframe allocation pattern available for MBSFN sync area
uint8_t num_sf_allocation_pattern; uint8_t num_sf_allocation_pattern;
/// MBMS Flag /// MBMS Flag
openair2/LAYER2/MAC/mac_proto.h
+17 -1
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@@ -33,6 +33,16 @@
#include "PHY/defs_common.h" // for PRACH_RESOURCES_t and lte_subframe_t #include "PHY/defs_common.h" // for PRACH_RESOURCES_t and lte_subframe_t
#include "openair2/COMMON/mac_messages_types.h" #include "openair2/COMMON/mac_messages_types.h"
/** \fn void schedule_fembms_mib(module_id_t module_idP,frame_t frameP,sub_frame_t subframe);
\brief MIB scheduling for PBCH. This function requests the MIB from RRC and provides it to L1.
@param Mod_id Instance ID of eNB
@param frame Frame index
@param subframe Subframe number on which to act
*/
void schedule_fembms_mib(module_id_t module_idP,
frame_t frameP, sub_frame_t subframeP);
/** \addtogroup _mac /** \addtogroup _mac
* @{ * @{
@@ -534,6 +544,10 @@ int ue_query_mch(module_id_t Mod_id, uint8_t CC_id, uint32_t frame,
sub_frame_t subframe, uint8_t eNB_index, sub_frame_t subframe, uint8_t eNB_index,
uint8_t *sync_area, uint8_t *mcch_active); uint8_t *sync_area, uint8_t *mcch_active);
int ue_query_mch_fembms(module_id_t Mod_id, uint8_t CC_id, uint32_t frame,
sub_frame_t subframe, uint8_t eNB_index,
uint8_t * sync_area, uint8_t * mcch_active);
/* \brief Called by PHY to get sdu for PUSCH transmission. It performs the following operations: Checks BSR for DCCH, DCCH1 and DTCH corresponding to previous values computed either in SR or BSR procedures. It gets rlc status indications on DCCH,DCCH1 and DTCH and forms BSR elements and PHR in MAC header. CRNTI element is not supported yet. It computes transport block for up to 3 SDUs and generates header and forms the complete MAC SDU. /* \brief Called by PHY to get sdu for PUSCH transmission. It performs the following operations: Checks BSR for DCCH, DCCH1 and DTCH corresponding to previous values computed either in SR or BSR procedures. It gets rlc status indications on DCCH,DCCH1 and DTCH and forms BSR elements and PHR in MAC header. CRNTI element is not supported yet. It computes transport block for up to 3 SDUs and generates header and forms the complete MAC SDU.
@param Mod_id Instance id of UE in machine @param Mod_id Instance id of UE in machine
@@ -900,6 +914,7 @@ int generate_dlsch_header(unsigned char *mac_header,
@param non_MBSFN_SubframeConfig pointer to FeMBMS Non MBSFN Subframe Config @param non_MBSFN_SubframeConfig pointer to FeMBMS Non MBSFN Subframe Config
@param sib1_mbms_r14_fembms pointer SI Scheduling infomration for SI-MBMS @param sib1_mbms_r14_fembms pointer SI Scheduling infomration for SI-MBMS
@param mbsfn_AreaInfoList_fembms pointer to FeMBMS MBSFN Area Info list from SIB1-MBMS @param mbsfn_AreaInfoList_fembms pointer to FeMBMS MBSFN Area Info list from SIB1-MBMS
@param mbms_AreaConfiguration pointer to eMBMS MBSFN Area Configuration
*/ */
int rrc_mac_config_req_eNB(module_id_t module_idP, int rrc_mac_config_req_eNB(module_id_t module_idP,
@@ -936,7 +951,8 @@ int rrc_mac_config_req_eNB(module_id_t module_idP,
LTE_SchedulingInfo_MBMS_r14_t *schedulingInfo_fembms, LTE_SchedulingInfo_MBMS_r14_t *schedulingInfo_fembms,
struct LTE_NonMBSFN_SubframeConfig_r14 *nonMBSFN_SubframeConfig, struct LTE_NonMBSFN_SubframeConfig_r14 *nonMBSFN_SubframeConfig,
LTE_SystemInformationBlockType1_MBMS_r14_t *sib1_mbms_r14_fembms, LTE_SystemInformationBlockType1_MBMS_r14_t *sib1_mbms_r14_fembms,
LTE_MBSFN_AreaInfoList_r9_t *mbsfn_AreaInfoList_fembms LTE_MBSFN_AreaInfoList_r9_t *mbsfn_AreaInfoList_fembms,
LTE_MBSFNAreaConfiguration_r9_t * mbms_AreaConfiguration
); );
/** \brief RRC eNB Configuration primitive for PHY/MAC. Allows configuration of PHY/MAC resources based on System Information (SI), RRCConnectionSetup and RRCConnectionReconfiguration messages. /** \brief RRC eNB Configuration primitive for PHY/MAC. Allows configuration of PHY/MAC resources based on System Information (SI), RRCConnectionSetup and RRCConnectionReconfiguration messages.
openair2/LAYER2/MAC/ue_procedures.c
+602 -8
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@@ -72,7 +72,10 @@ extern UL_IND_t *UL_INFO;
extern int next_ra_frame; extern int next_ra_frame;
extern module_id_t next_Mod_id; extern module_id_t next_Mod_id;
int mbms_rab_id = 2047; int mbms_rab_id=2047;//[8] = {2047,2047,2047,2047,2047,2047,2047,2047};
static int mbms_mch_i=0;
static int num_msi_per_CSA[28];
/* /*
* *
@@ -753,13 +756,14 @@ ue_send_mch_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
LOG_E(MAC,"MCH Scheduling Information MAC Control Element should have an even size\n"); LOG_E(MAC,"MCH Scheduling Information MAC Control Element should have an even size\n");
} }
LOG_D(MAC,"MCH Scheduling Information, len(%d)\n",rx_lengths[i]);
LOG_D(MAC,"MCH Scheduling Information, len(%d)\n",rx_lengths[i]);
for (j=0; j<rx_lengths[i]/2; j++) { for (j=0; j<rx_lengths[i]/2; j++) {
uint16_t stop_mtch_val = ((uint16_t)(payload_ptr[2*j] & 0x07) << 8) | (uint16_t)payload_ptr[2*j+1]; uint16_t stop_mtch_val = ((uint16_t)(payload_ptr[2*j] & 0x07) << 8) | (uint16_t)payload_ptr[2*j+1];
UE_mac_inst[module_idP].pmch_lcids[j] = (payload_ptr[2*j] & 0xF8) >> 3; UE_mac_inst[module_idP].pmch_lcids[j] = (payload_ptr[2*j] & 0xF8) >> 3;
UE_mac_inst[module_idP].pmch_stop_mtch[j] = stop_mtch_val; UE_mac_inst[module_idP].pmch_stop_mtch[j] = stop_mtch_val;
LOG_D(MAC,"lcid(%d),stop_mtch_val %d frameP(%d)\n", UE_mac_inst[module_idP].pmch_lcids[j], stop_mtch_val, frameP); LOG_I(MAC,"lcid(%d),stop_mtch_val %d frameP(%d)\n", UE_mac_inst[module_idP].pmch_lcids[j], stop_mtch_val, frameP);
if ((stop_mtch_val >= 2043) && (stop_mtch_val <= 2046)) { if ((stop_mtch_val >= 2043) && (stop_mtch_val <= 2046)) {
LOG_D(MAC,"(reserved)\n"); LOG_D(MAC,"(reserved)\n");
@@ -768,7 +772,7 @@ ue_send_mch_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
UE_mac_inst[module_idP].msi_status_v[j] = 0; UE_mac_inst[module_idP].msi_status_v[j] = 0;
if (UE_mac_inst[module_idP].mcch_status==1) { if (UE_mac_inst[module_idP].mcch_status==1) {
LOG_D(MAC,"[UE %d] Frame %d : MCH->MSI for sync area %d (eNB %d, %d bytes), i(%d)\n", module_idP, frameP, sync_area, eNB_index, rx_lengths[i], UE_mac_inst[module_idP].pmch_stop_mtch[j]); LOG_I(MAC,"[UE %d] Frame %d : MCH->MSI for sync area %d (eNB %d, %d bytes), LCID(%d)(%d)\n", module_idP, frameP, sync_area, eNB_index, rx_lengths[i], UE_mac_inst[module_idP].pmch_lcids[j] , UE_mac_inst[module_idP].pmch_stop_mtch[j]);
if (UE_mac_inst[module_idP].pmch_stop_mtch[j] < 2043) { if (UE_mac_inst[module_idP].pmch_stop_mtch[j] < 2043) {
UE_mac_inst[module_idP].pmch_stop_mtch[j] += UE_mac_inst[module_idP].msi_current_alloc; UE_mac_inst[module_idP].pmch_stop_mtch[j] += UE_mac_inst[module_idP].msi_current_alloc;
@@ -777,7 +781,7 @@ ue_send_mch_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
} }
} }
} else if (rx_lcids[i] == MCCH_LCHANID) { } else if (rx_lcids[i] == MCCH_LCHANID) {
LOG_D(MAC,"[UE %d] Frame %d : SDU %d MCH->MCCH for sync area %d (eNB %d, %d bytes)\n",module_idP,frameP, i, sync_area, eNB_index, rx_lengths[i]); LOG_I(MAC,"[UE %d] Frame %d : SDU %d MCH->MCCH for sync area %d (eNB %d, %d bytes)\n",module_idP,frameP, i, sync_area, eNB_index, rx_lengths[i]);
mac_rrc_data_ind_ue(module_idP, mac_rrc_data_ind_ue(module_idP,
CC_id, CC_id,
frameP,0, // unknown subframe frameP,0, // unknown subframe
@@ -794,7 +798,7 @@ ue_send_mch_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
} }
if (j<28 && UE_mac_inst[module_idP].msi_status_v[j]==1) { if (j<28 && UE_mac_inst[module_idP].msi_status_v[j]==1) {
LOG_D(MAC,"[UE %d] Frame %d : MCH->MTCH for sync area %d (eNB %d, %d bytes), j=%d\n", module_idP, frameP, sync_area, eNB_index, rx_lengths[i], j); LOG_D(MAC,"[UE %d] Frame %d : MCH->MTCH for sync area %d (eNB %d, %d bytes), j=%d lcid %d\n", module_idP, frameP, sync_area, eNB_index, rx_lengths[i], j,rx_lcids[i]);
//This sucks I know ... workaround ! //This sucks I know ... workaround !
mbms_rab_id = rx_lcids[i]; mbms_rab_id = rx_lcids[i];
//end sucks :-( //end sucks :-(
@@ -951,7 +955,9 @@ int ue_query_p_mch_info(module_id_t module_idP, uint32_t frameP, uint32_t subfra
} }
} else { //more that one MCH ?? check better this condition } else { //more that one MCH ?? check better this condition
//msi and mtch are mutally excluded then the break is safe //msi and mtch are mutally excluded then the break is safe
//TODO
if ((num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[i-1]->sf_AllocEnd_r9 + 1) && (sf_AllocEnd_r9 >= (num_sf_alloc+1))) { if ((num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[i-1]->sf_AllocEnd_r9 + 1) && (sf_AllocEnd_r9 >= (num_sf_alloc+1))) {
//if ((num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[i-1]->sf_AllocEnd_r9) && (sf_AllocEnd_r9 >= (num_sf_alloc))) {
//msi should be just after //msi should be just after
msi_flag = 1; msi_flag = 1;
LOG_D(MAC,"msi(%d) should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),sf_AllocEnd_r9(%d),common_num_sf_alloc(%d)\n",i,frameP,subframe,num_sf_alloc,sf_AllocEnd_r9, LOG_D(MAC,"msi(%d) should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),sf_AllocEnd_r9(%d),common_num_sf_alloc(%d)\n",i,frameP,subframe,num_sf_alloc,sf_AllocEnd_r9,
@@ -986,6 +992,458 @@ int ue_query_p_mch_info(module_id_t module_idP, uint32_t frameP, uint32_t subfra
return mtch_mcs; return mtch_mcs;
} }
//static int common_num_sf_alloc=0;
//static int x=0;
int ue_query_mch_fembms(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_t subframe, uint8_t eNB_index,uint8_t *sync_area, uint8_t *mcch_active) {
int i = 0, j = 0,/* ii = 0,*/ msi_pos = -1, mcch_mcs = -1, mtch_mcs = -1, l=0,ii=0;
int mcch_flag = 0, mtch_flag = 0, msi_flag = 0;
int alloc_offset=0;
uint32_t period;
//uint16_t num_non_mbsfn_SubframeConfig=0;
long mch_scheduling_period = -1;
uint8_t mch_lcid = 0;
int first_pos=0;
if(UE_mac_inst[module_idP].non_mbsfn_SubframeConfig == NULL )
return -1;
int non_mbsfn_SubframeConfig = (UE_mac_inst[module_idP].non_mbsfn_SubframeConfig->subframeAllocation_r14.buf[0]<<1 | UE_mac_inst[module_idP].non_mbsfn_SubframeConfig->subframeAllocation_r14.buf[0]>>7);
period = 4<<UE_mac_inst[module_idP].non_mbsfn_SubframeConfig->radioFrameAllocationPeriod_r14;
alloc_offset = UE_mac_inst[module_idP].non_mbsfn_SubframeConfig->radioFrameAllocationOffset_r14;
long mcch_period = 32 << UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_RepetitionPeriod_r9;
long mcch_offset = UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9;
if (UE_mac_inst[module_idP].pmch_Config[0]) {
mch_scheduling_period = 8 << UE_mac_inst[module_idP].pmch_Config[0]->mch_SchedulingPeriod_r9;
}
// for(l=0;l<8;l++){
// if(UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]!=NULL){
// if(frameP%(4<<UE_mac_inst[module_idP].commonSF_AllocPeriod_r9)==0){
// first_pos=0;
// if((frameP&3)==0)
// first_pos++;
// while((non_mbsfn_SubframeConfig & (0x100 >> msi_pos)) == (0x100>>msi_pos))
// first_pos++;
// if(first_pos == subframe){
// ii=0;
// while(UE_mac_inst[module_idP].pmch_Config[ii]!=NULL){
// num_msi_per_CSA[ii]= ( ( 4 << UE_mac_inst[module_idP].commonSF_AllocPeriod_r9) / (8 << UE_mac_inst[module_idP].pmch_Config[ii]->mch_SchedulingPeriod_r9) );
// ii++;
// LOG_D(MAC,"frameP %d subframe %d num_msi_per_CSA[%d] %d\n",frameP,subframe,ii,num_msi_per_CSA[ii]);
// }
// }
//
// }
// }
// }
//
// get the real MCS value
switch (UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.signallingMCS_r9) {
case 0:
mcch_mcs = 2;
break;
case 1:
mcch_mcs = 7;
break;
case 2:
mcch_mcs = 13;
break;
case 3:
mcch_mcs = 19;
break;
}
LOG_D(MAC,"frameP %d subframe %d period %d alloc_offset %d mcch_mcs %d mcch_period %ld mcch_offset %ld buf %x mch_scheduling_period %ld\n",frameP, subframe, period, alloc_offset,mcch_mcs, mcch_period, mcch_offset,(UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0]),mch_scheduling_period);
if((frameP % period ) == alloc_offset){
switch(subframe){
case 0:
return (-1);
break;
case 1:
if ((non_mbsfn_SubframeConfig & 0x100) > 0)
return (-1);
break;
case 2:
if ((non_mbsfn_SubframeConfig & 0x80) > 0)
return (-1);
break;
case 3:
if ((non_mbsfn_SubframeConfig & 0x40) > 0)
return (-1);
break;
case 4:
if ((non_mbsfn_SubframeConfig & 0x20) > 0)
return (-1);
break;
case 5:
if ((non_mbsfn_SubframeConfig & 0x10) > 0)
return (-1);
break;
case 6:
if ((non_mbsfn_SubframeConfig & 0x8) > 0)
return (-1);
break;
case 7:
if ((non_mbsfn_SubframeConfig & 0x4) > 0)
return (-1);
break;
case 8:
if ((non_mbsfn_SubframeConfig & 0x2) > 0)
return (-1);
break;
case 9:
if ((non_mbsfn_SubframeConfig & 0x1) > 0)
return (-1);
break;
}
}
if (UE_mac_inst[module_idP].pmch_Config[0]) {
// Find the first subframe in this MCH to transmit MSI
if (frameP % 1 == 0) {
if (frameP % mch_scheduling_period == 0) {
msi_pos=0;
if((frameP&3)==0)
msi_pos++;
while((non_mbsfn_SubframeConfig & (0x100 >> msi_pos)) == (0x100>>msi_pos))
msi_pos++;
if(msi_pos == subframe){
UE_mac_inst[module_idP].common_num_sf_alloc=0;
mbms_mch_i=0;
//LOG_W(MAC,"MSP, frameP %d subframeP %d msi_pos(%d) mbms_mch_i %d\n",frameP, subframe, msi_pos,mbms_mch_i);
}
}
}
}
if(UE_mac_inst[module_idP].pmch_Config[mbms_mch_i+1]!=NULL){
if( UE_mac_inst[module_idP].common_num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->sf_AllocEnd_r9){
msi_pos=subframe;
mbms_mch_i++;
// LOG_W(MAC,"MSP, frameP %d subframeP %d msi_pos(%d) mbms_mch_i %d\n",frameP, subframe, msi_pos,mbms_mch_i);
}
}
// Check if the subframe is for MSI, MCCH or MTCHs and Set the correspoding flag to 1
switch (subframe) {
case 0:
if (msi_pos == 0) {
msi_flag = 1;
}
mtch_flag = 1;
break;
case 1:
if (msi_pos == 1) {
msi_flag = 1;
}
if ((frameP % mcch_period == mcch_offset) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1)) {
mcch_flag = 1;
}
mtch_flag = 1;
break;
case 2:
if (msi_pos == 2) {
msi_flag = 1;
}
if ((frameP % mcch_period == mcch_offset) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2)) {
mcch_flag = 1;
}
mtch_flag = 1;
break;
case 3:
if (msi_pos == 3) {
msi_flag = 1;
}
if ((frameP % mcch_period == mcch_offset) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3)) {
mcch_flag = 1;
}
mtch_flag = 1;
break;
case 4:
if (msi_pos == 4) {
msi_flag = 1;
}
mtch_flag = 1;
break;
case 5:
if (msi_pos == 5) {
msi_flag = 1;
}
mtch_flag = 1;
break;
case 6:
if (msi_pos == 6) {
msi_flag = 1;
}
if ((frameP % mcch_period == mcch_offset) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6)) {
mcch_flag = 1;
}
mtch_flag = 1;
break;
case 7:
if (msi_pos == 7) {
msi_flag = 1;
}
if ((frameP % mcch_period == mcch_offset) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7)) {
mcch_flag = 1;
}
mtch_flag = 1;
break;
case 8:
if (msi_pos == 8) {
msi_flag = 1;
}
if ((frameP % mcch_period == mcch_offset) &&
((UE_mac_inst[module_idP].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8)) {
mcch_flag = 1;
}
mtch_flag = 1;
break;
case 9:
if (msi_pos == 9) {
msi_flag = 1;
}
mtch_flag = 1;
break;
}// end switch
if( (msi_flag == 1) || (mcch_flag == 1) || (mtch_flag == 1) ){
UE_mac_inst[module_idP].common_num_sf_alloc++;
//if( (msi_flag!=1 && mcch_flag!=1) || (msi_flag!=1 && mcch_flag!=1 && mtch_flag!=1) ){
//UE_mac_inst[module_idP].common_num_sf_alloc++;
//if(msi_flag == 1)
// if((num_msi_per_CSA[mbms_mch_i]--)==0){
// LOG_E(MAC,"Both MSI and MTCH Should be reset?\n");
// msi_flag=0;
//}
//}
}
#ifdef OLD
// Acount for sf_allocable in CSA
int num_sf_alloc = 0;
for (l = 0; l < 8; l++) {
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l] == NULL)
continue;
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->subframeAllocation.present != LTE_MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame)
continue;
uint32_t common_mbsfn_SubframeConfig = UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->subframeAllocation.choice.oneFrame.buf[0];
for (j = 0; j < 6; j++)
num_sf_alloc += ((common_mbsfn_SubframeConfig & (0x80 >> j)) == (0x80 >> j));
//num_sf_alloc=1;
}
num_sf_alloc = 10;
num_non_mbsfn_SubframeConfig = (UE_mac_inst[module_idP].non_mbsfn_SubframeConfig->subframeAllocation_r14.buf[0]<<1 | UE_mac_inst[module_idP].non_mbsfn_SubframeConfig->subframeAllocation_r14.buf[0]>>7);
int ones=0;
for(j=0; j < 16; j++){
if(num_non_mbsfn_SubframeConfig & 1)
ones++;
num_non_mbsfn_SubframeConfig>>=1;
}
for (l = 0; l < 28; l++) {
if (UE_mac_inst[module_idP].pmch_stop_mtch[l] >= 1/*num_sf_alloc*/) {
if (UE_mac_inst[module_idP].pmch_stop_mtch[l] != 2047) {
if (UE_mac_inst[module_idP].pmch_Config[UE_mac_inst[module_idP].msi_pmch] != NULL){
mtch_mcs = UE_mac_inst[module_idP].pmch_Config[UE_mac_inst[module_idP].msi_pmch]->dataMCS_r9;
//int common_mbsfn_alloc_offset = UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[0]->radioframeAllocationOffset;
long common_mbsfn_period = 1 << UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[0]->radioframeAllocationPeriod;
long commonSF_AllocPeriod = 4 << UE_mac_inst[module_idP].commonSF_AllocPeriod_r9;
if(UE_mac_inst[module_idP].common_num_sf_alloc >= UE_mac_inst[module_idP].pmch_stop_mtch[l]){
//LOG_E(MAC,"Attemp to UE_mac_inst[module_idP].common_num_sf_alloc %d\n",UE_mac_inst[module_idP].common_num_sf_alloc);
mtch_mcs = -1;
}/*else
OG_W(MAC,"Attemp to UE_mac_inst[module_idP].common_num_sf_alloc %d\n",UE_mac_inst[module_idP].common_num_sf_alloc);*/
LOG_D(MAC,"Attemp to UE_mac_inst[module_idP].common_num_sf_alloc %d num_sf_alloc %d commonSF_AllocPeriod %ld, common_mbsfn_period %ld num_non_mbsfn_SubframeConfig %x ones %d\n",UE_mac_inst[module_idP].common_num_sf_alloc,num_sf_alloc, commonSF_AllocPeriod,common_mbsfn_period,num_non_mbsfn_SubframeConfig,ones);
UE_mac_inst[module_idP].common_num_sf_alloc++;
UE_mac_inst[module_idP].common_num_sf_alloc = UE_mac_inst[module_idP].common_num_sf_alloc % (num_sf_alloc * commonSF_AllocPeriod / common_mbsfn_period-(1+ones)*(commonSF_AllocPeriod/4)); //TODO
}
else
mtch_mcs = -1;
mch_lcid = (uint8_t)l;
break;
}
}
}
#endif
{
// Acount for sf_allocable in Common SF Allocation
int num_sf_alloc = 0;
for (l = 0; l < 8; l++) {
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l] == NULL)
continue;
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->subframeAllocation.present != LTE_MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame)
continue;
//int common_mbsfn_alloc_offset = UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->radioframeAllocationOffset;
long common_mbsfn_period = 1 << UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->radioframeAllocationPeriod;
long commonSF_AllocPeriod = 4 << UE_mac_inst[module_idP].commonSF_AllocPeriod_r9;
num_sf_alloc =10*commonSF_AllocPeriod/common_mbsfn_period;
num_sf_alloc -=1*((commonSF_AllocPeriod/common_mbsfn_period)/4); //CAS sfs
uint32_t num_non_mbsfn_SubframeConfig2 = (UE_mac_inst[module_idP].non_mbsfn_SubframeConfig->subframeAllocation_r14.buf[0]<<1 | UE_mac_inst[module_idP].non_mbsfn_SubframeConfig->subframeAllocation_r14.buf[0]>>7);
for (j = 0; j < 10; j++)
num_sf_alloc -= ((num_non_mbsfn_SubframeConfig2 & (0x200 >> j)) == (0x200 >> j))*((commonSF_AllocPeriod/common_mbsfn_period)/period);
}
for (l = 0; l < 8; l++) {
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l] == NULL)
continue;
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->subframeAllocation.present != LTE_MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame)
continue;
//int common_mbsfn_alloc_offset = UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->radioframeAllocationOffset;
long common_mbsfn_period = 1 << UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->radioframeAllocationPeriod;
//long commonSF_AllocPeriod = 4 << UE_mac_inst[module_idP].commonSF_AllocPeriod_r9;
if(msi_flag==1 && UE_mac_inst[module_idP].pmch_Config[mbms_mch_i] != NULL){
LOG_D(MAC,"msi(%d) should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),sf_AllocEnd_r9(%ld),common_num_sf_alloc(%d)\n",mbms_mch_i,frameP,subframe,num_sf_alloc,UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->sf_AllocEnd_r9,
UE_mac_inst[module_idP].common_num_sf_alloc);
UE_mac_inst[module_idP].msi_current_alloc = UE_mac_inst[module_idP].common_num_sf_alloc;//num_sf_alloc;
UE_mac_inst[module_idP].msi_pmch = mbms_mch_i;
}else if(UE_mac_inst[module_idP].pmch_Config[mbms_mch_i] != NULL){
if (UE_mac_inst[module_idP].pmch_stop_mtch[mbms_mch_i] >= UE_mac_inst[module_idP].common_num_sf_alloc/*num_sf_alloc*/) {
if (UE_mac_inst[module_idP].pmch_stop_mtch[mbms_mch_i] != 2047) {
mtch_flag = 1;
if (UE_mac_inst[module_idP].pmch_Config[UE_mac_inst[module_idP].msi_pmch] != NULL)
mtch_mcs = UE_mac_inst[module_idP].pmch_Config[UE_mac_inst[module_idP].msi_pmch]->dataMCS_r9;
else
mtch_mcs = -1;
mch_lcid = (uint8_t)mbms_mch_i;
LOG_D(MAC,"mtch should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),mtch_mcs(%d),pmch_stop_mtch(%d),lcid(%d),msi_pmch(%d)\n",frameP,subframe,num_sf_alloc,mtch_mcs,
UE_mac_inst[module_idP].pmch_stop_mtch[mbms_mch_i],UE_mac_inst[module_idP].pmch_lcids[mbms_mch_i],UE_mac_inst[module_idP].msi_pmch);
}
}
}
UE_mac_inst[module_idP].common_num_sf_alloc = UE_mac_inst[module_idP].common_num_sf_alloc % ((num_sf_alloc-mbms_mch_i) /** commonSF_AllocPeriod *// common_mbsfn_period);//48;
if(mtch_flag)
break;
}
if(msi_flag==1){
for (l = 0; l < 8; l++) {
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l] == NULL)
continue;
if ( (/*AJ*/ (/*V*/ ( /*U*/ (frameP %(4 << UE_mac_inst[module_idP].commonSF_AllocPeriod_r9)) ) / 8 ) % ((8 <<UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->mch_SchedulingPeriod_r9) / 8 ) ) != 0 ){
msi_flag=0;
LOG_D(MAC,"frameP %d subframeP %d reset(%d)\n",frameP, subframe, mbms_mch_i);
}
}
}
}
// sf allocation is non-overlapping
if ((msi_flag==1) || (mcch_flag==1) || (mtch_flag==1)) {
LOG_D(MAC,"[UE %d] Frame %d Subframe %d: sync area %d SF alloc %d: msi flag %d, mcch flag %d, mtch flag %d\n",
module_idP, frameP, subframe,l,j,msi_flag,mcch_flag,mtch_flag);
*sync_area=i;
}
//if(msi_flag == 1)
// if((num_msi_per_CSA[mbms_mch_i]--)==0){
// LOG_E(MAC,"Both MSI and MTCH Should be reset?\n");
// msi_flag=mtch_flag=0;
//}
if ((mcch_flag == 1)) { // || (msi_flag==1))
*mcch_active = 1;
}
if ( (mcch_flag==1) || ((msi_flag==1) && (UE_mac_inst[module_idP].mcch_status==1)) ) {
if (msi_flag!=1) {
for (i=0; i<8; i++)
UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[i] = NULL;
for (i=0; i<15; i++)
UE_mac_inst[module_idP].pmch_Config[i] = NULL;
for (i=0; i<28 ; i++) {
UE_mac_inst[module_idP].pmch_lcids[i] = -1;
UE_mac_inst[module_idP].pmch_stop_mtch[i] = 2047;
UE_mac_inst[module_idP].msi_status_v[i] = 0;
}
} else {
for (i=0; i<28; i++) {
UE_mac_inst[module_idP].pmch_lcids[i] = -1;
UE_mac_inst[module_idP].pmch_stop_mtch[i] = 2047;
UE_mac_inst[module_idP].msi_status_v[i] = 0;
}
}
return mcch_mcs;
} else if ((mtch_flag==1) && (UE_mac_inst[module_idP].msi_status_v[(mch_lcid > 27) ? 27 : mch_lcid] == 1)) {
return mtch_mcs;
} else {
return -1;
}
// if(mcch_flag == 1 || msi_flag == 1 ){
// *mcch_active = 1;
// return (mcch_mcs);
// }else if(mtch_flag == 1){
// mtch_mcs=-1;
// return (mtch_mcs);
// }
// return -1;
}
int ue_query_p_mch(module_id_t module_idP, uint32_t frameP, uint32_t subframe, int *mtch_active, int *msi_active, uint8_t *mch_lcid) { int ue_query_p_mch(module_id_t module_idP, uint32_t frameP, uint32_t subframe, int *mtch_active, int *msi_active, uint8_t *mch_lcid) {
int i, j, mtch_mcs = -1; int i, j, mtch_mcs = -1;
int mtch_flag = 0; int mtch_flag = 0;
@@ -1100,6 +1558,7 @@ int ue_query_p_mch(module_id_t module_idP, uint32_t frameP, uint32_t subframe, i
return mtch_mcs; return mtch_mcs;
} }
int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_t subframe, uint8_t eNB_index,uint8_t *sync_area, uint8_t *mcch_active) { int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_t subframe, uint8_t eNB_index,uint8_t *sync_area, uint8_t *mcch_active) {
int i = 0, j = 0, ii = 0, jj = 0, msi_pos = 0, mcch_mcs = -1, mtch_mcs = -1; int i = 0, j = 0, ii = 0, jj = 0, msi_pos = 0, mcch_mcs = -1, mtch_mcs = -1;
int l =0; int l =0;
@@ -1162,6 +1621,11 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
ii = UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & (0x80 >> msi_pos); ii = UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & (0x80 >> msi_pos);
msi_pos++; msi_pos++;
} }
if(msi_pos == subframe){
UE_mac_inst[module_idP].common_num_sf_alloc=0;
mbms_mch_i=0;
LOG_D(MAC,"MSP, frameP %d subframeP %d msi_pos(%d) mbms_mch_i %d\n",frameP, subframe, msi_pos,mbms_mch_i);
}
} }
} }
@@ -1170,6 +1634,14 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
case 1: case 1:
if (UE_mac_inst[module_idP].tdd_Config == NULL) { if (UE_mac_inst[module_idP].tdd_Config == NULL) {
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) { if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) {
if(UE_mac_inst[module_idP].pmch_Config[mbms_mch_i+1]!=NULL){
if( UE_mac_inst[module_idP].common_num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->sf_AllocEnd_r9){
msi_pos=1;
mbms_mch_i++;
LOG_D(MAC,"MSP, frameP %d subframeP %d msi_pos(%d) mbms_mch_i %d\n",frameP, subframe, msi_pos,mbms_mch_i);
}
}
if (msi_pos == 1) { if (msi_pos == 1) {
msi_flag = 1; msi_flag = 1;
} }
@@ -1188,6 +1660,14 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
case 2: case 2:
if (UE_mac_inst[module_idP].tdd_Config == NULL) { if (UE_mac_inst[module_idP].tdd_Config == NULL) {
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) { if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) {
if(UE_mac_inst[module_idP].pmch_Config[mbms_mch_i+1]!=NULL){
if( UE_mac_inst[module_idP].common_num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->sf_AllocEnd_r9){
msi_pos=2;
mbms_mch_i++;
LOG_D(MAC,"MSP, frameP %d subframeP %d msi_pos(%d) mbms_mch_i %d\n",frameP, subframe, msi_pos,mbms_mch_i);
}
}
if (msi_pos == 2) { if (msi_pos == 2) {
msi_flag = 1; msi_flag = 1;
} }
@@ -1219,6 +1699,14 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
} }
} else { // FDD } else { // FDD
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) { if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) {
if(UE_mac_inst[module_idP].pmch_Config[mbms_mch_i+1]!=NULL){
if( UE_mac_inst[module_idP].common_num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->sf_AllocEnd_r9){
msi_pos=3;
mbms_mch_i++;
LOG_D(MAC,"MSP, frameP %d subframeP %d msi_pos(%d) mbms_mch_i %d\n",frameP, subframe, msi_pos,mbms_mch_i);
}
}
if (msi_pos == 3) { if (msi_pos == 3) {
msi_flag = 1; msi_flag = 1;
} }
@@ -1255,6 +1743,14 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
case 6: case 6:
if (UE_mac_inst[module_idP].tdd_Config == NULL) { if (UE_mac_inst[module_idP].tdd_Config == NULL) {
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) { if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) {
if(UE_mac_inst[module_idP].pmch_Config[mbms_mch_i+1]!=NULL){
if( UE_mac_inst[module_idP].common_num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->sf_AllocEnd_r9){
msi_pos=6;
mbms_mch_i++;
LOG_D(MAC,"MSP, frameP %d subframeP %d msi_pos(%d) mbms_mch_i %d\n",frameP, subframe, msi_pos,mbms_mch_i);
}
}
if (msi_pos == 4) { if (msi_pos == 4) {
msi_flag = 1; msi_flag = 1;
} }
@@ -1286,6 +1782,14 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
} }
} else { // FDD } else { // FDD
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) { if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) {
if(UE_mac_inst[module_idP].pmch_Config[mbms_mch_i+1]!=NULL){
if( UE_mac_inst[module_idP].common_num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->sf_AllocEnd_r9){
msi_pos=5;
mbms_mch_i++;
LOG_D(MAC,"MSP, frameP %d subframeP %d msi_pos(%d) mbms_mch_i %d\n",frameP, subframe, msi_pos,mbms_mch_i);
}
}
if (msi_pos == 5) { if (msi_pos == 5) {
msi_flag = 1; msi_flag = 1;
} }
@@ -1317,6 +1821,13 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
} }
} else { // FDD } else { // FDD
if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) { if ((UE_mac_inst[module_idP].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) {
if(UE_mac_inst[module_idP].pmch_Config[mbms_mch_i+1]!=NULL){
if( UE_mac_inst[module_idP].common_num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->sf_AllocEnd_r9){
msi_pos=6;
mbms_mch_i++;
LOG_D(MAC,"MSP, frameP %d subframeP %d msi_pos(%d) mbms_mch_i %d\n",frameP, subframe, msi_pos,mbms_mch_i);
}
}
if (msi_pos == 6) { if (msi_pos == 6) {
msi_flag = 1; msi_flag = 1;
} }
@@ -1351,6 +1862,14 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
break; break;
}// end switch }// end switch
if( (msi_flag == 1) || (mcch_flag == 1) || (mtch_flag == 1) ){
UE_mac_inst[module_idP].common_num_sf_alloc++;
//if( (msi_flag!=1 && mcch_flag!=1) || (msi_flag!=1 && mcch_flag!=1 && mtch_flag!=1) ){
//UE_mac_inst[module_idP].common_num_sf_alloc++;
//}
}
#ifdef OLD
// Acount for sf_allocable in CSA // Acount for sf_allocable in CSA
int num_sf_alloc = 0; int num_sf_alloc = 0;
@@ -1392,11 +1911,86 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
} }
} }
} }
#endif
{
// Acount for sf_allocable in Common SF Allocation
int num_sf_alloc = 0;
for (l = 0; l < 8; l++) {
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l] == NULL)
continue;
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->subframeAllocation.present != LTE_MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame)
continue;
//int common_mbsfn_alloc_offset = UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->radioframeAllocationOffset;
//long common_mbsfn_period = 1 << UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->radioframeAllocationPeriod;
//long commonSF_AllocPeriod = 4 << UE_mac_inst[module_idP].commonSF_AllocPeriod_r9;
uint32_t common_mbsfn_SubframeConfig = UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->subframeAllocation.choice.oneFrame.buf[0];
for (j = 0; j < 6; j++)
num_sf_alloc += ((common_mbsfn_SubframeConfig & (0x80 >> j)) == (0x80 >> j));
}
for (l = 0; l < 8; l++) {
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l] == NULL)
continue;
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->subframeAllocation.present != LTE_MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame)
continue;
//int common_mbsfn_alloc_offset = UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->radioframeAllocationOffset;
long common_mbsfn_period = 1 << UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l]->radioframeAllocationPeriod;
long commonSF_AllocPeriod = 4 << UE_mac_inst[module_idP].commonSF_AllocPeriod_r9;
if(msi_flag==1 && UE_mac_inst[module_idP].pmch_Config[mbms_mch_i] != NULL){
LOG_D(MAC,"msi(%d) should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),sf_AllocEnd_r9(%ld),common_num_sf_alloc(%d)\n",mbms_mch_i,frameP,subframe,num_sf_alloc,UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->sf_AllocEnd_r9,
UE_mac_inst[module_idP].common_num_sf_alloc);
UE_mac_inst[module_idP].msi_current_alloc = UE_mac_inst[module_idP].common_num_sf_alloc;//num_sf_alloc;
UE_mac_inst[module_idP].msi_pmch = mbms_mch_i;
}else if(UE_mac_inst[module_idP].pmch_Config[mbms_mch_i] != NULL){
if (UE_mac_inst[module_idP].pmch_stop_mtch[mbms_mch_i] >= UE_mac_inst[module_idP].common_num_sf_alloc/*num_sf_alloc*/) {
if (UE_mac_inst[module_idP].pmch_stop_mtch[mbms_mch_i] != 2047) {
mtch_flag = 1;
if (UE_mac_inst[module_idP].pmch_Config[UE_mac_inst[module_idP].msi_pmch] != NULL)
mtch_mcs = UE_mac_inst[module_idP].pmch_Config[UE_mac_inst[module_idP].msi_pmch]->dataMCS_r9;
else
mtch_mcs = -1;
mch_lcid = (uint8_t)mbms_mch_i;
LOG_D(MAC,"mtch should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),mtch_mcs(%d),pmch_stop_mtch(%d),lcid(%d),msi_pmch(%d)\n",frameP,subframe,num_sf_alloc,mtch_mcs,
UE_mac_inst[module_idP].pmch_stop_mtch[mbms_mch_i],UE_mac_inst[module_idP].pmch_lcids[mbms_mch_i],UE_mac_inst[module_idP].msi_pmch);
}
}
}
//LOG_D(MAC,"UE_mac_inst[module_idP].common_num_sf_alloc: %d num_sf_alloc %d mbms_mch_i %d commonSF_AllocPeriod %d common_mbsfn_period %d\n",UE_mac_inst[module_idP].common_num_sf_alloc,num_sf_alloc,mbms_mch_i,commonSF_AllocPeriod,common_mbsfn_period);
UE_mac_inst[module_idP].common_num_sf_alloc = UE_mac_inst[module_idP].common_num_sf_alloc % ((num_sf_alloc* commonSF_AllocPeriod-mbms_mch_i) / common_mbsfn_period);//48;
if(mtch_flag)
break;
}
if(msi_flag==1){
for (l = 0; l < 8; l++) {
if (UE_mac_inst[module_idP].commonSF_Alloc_r9_mbsfn_SubframeConfig[l] == NULL)
continue;
if ( (/*AJ*/ (/*V*/ ( /*U*/ (frameP %(4 << UE_mac_inst[module_idP].commonSF_AllocPeriod_r9)) ) / 8 ) % ((8 <<UE_mac_inst[module_idP].pmch_Config[mbms_mch_i]->mch_SchedulingPeriod_r9) / 8 ) ) != 0 ){
msi_flag=0;
LOG_D(MAC,"frameP %d subframeP %d reset(%d)\n",frameP, subframe, mbms_mch_i);
}
}
}
}
// sf allocation is non-overlapping // sf allocation is non-overlapping
if ((msi_flag==1) || (mcch_flag==1) || (mtch_flag==1)) { if ((msi_flag==1) || (mcch_flag==1) || (mtch_flag==1)) {
LOG_D(MAC,"[UE %d] Frame %d Subframe %d: sync area %d SF alloc %d: msi flag %d, mcch flag %d, mtch flag %d\n", LOG_D(MAC,"[UE %d] Frame %d Subframe %d: sync area %d SF alloc %d: msi flag %d, mcch flag %d, mtch flag %d x %d\n",
module_idP, frameP, subframe,l,j,msi_flag,mcch_flag,mtch_flag); module_idP, frameP, subframe,l,j,msi_flag,mcch_flag,mtch_flag,UE_mac_inst[module_idP].common_num_sf_alloc);
*sync_area=i; *sync_area=i;
break; break;
} }
openair2/LAYER2/PDCP_v10.1.0/pdcp_fifo.c
+1 -1
View File
@@ -308,7 +308,7 @@ int pdcp_fifo_read_input_mbms_sdus_fromtun (const protocol_ctxt_t *const ctxt_p
ctxt.module_id, ctxt.rnti, ctxt.enb_flag); ctxt.module_id, ctxt.rnti, ctxt.enb_flag);
if (h_rc == HASH_TABLE_OK) { if (h_rc == HASH_TABLE_OK) {
LOG_I(PDCP, "[FRAME %5u][UE][NETLINK][IP->PDCP] INST %d: Received socket with length %d on Rab %ld \n", LOG_D(PDCP, "[FRAME %5u][UE][NETLINK][IP->PDCP] INST %d: Received socket with length %d on Rab %ld \n",
ctxt.frame, ctxt.instance, len, rab_id); ctxt.frame, ctxt.instance, len, rab_id);
LOG_D(PDCP, "[FRAME %5u][UE][IP][INSTANCE %u][RB %ld][--- PDCP_DATA_REQ / %d Bytes --->][PDCP][MOD %u][UE %04x][RB %ld]\n", LOG_D(PDCP, "[FRAME %5u][UE][IP][INSTANCE %u][RB %ld][--- PDCP_DATA_REQ / %d Bytes --->][PDCP][MOD %u][UE %04x][RB %ld]\n",
ctxt.frame, ctxt.instance, rab_id, len, ctxt.module_id, ctxt.frame, ctxt.instance, rab_id, len, ctxt.module_id,