Merge remote-tracking branch 'origin/develop' into NR_SA_10MHz

This commit is contained in:
francescomani
2022-02-21 09:12:21 +01:00
130 changed files with 4016 additions and 1515 deletions
+1
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@@ -417,6 +417,7 @@ typedef struct NRRrcConfigurationReq_s {
int pusch_AntennaPorts;
int minRXTXTIME;
int do_CSIRS;
int do_SRS;
int pusch_TargetSNRx10;
int pucch_TargetSNRx10;
} gNB_RrcConfigurationReq;
+20 -12
View File
@@ -31,6 +31,7 @@
#include <inttypes.h>
#include "common/utils/LOG/log.h"
#include "common/utils/nr/nr_common.h"
#include "common/utils/LOG/log_extern.h"
#include "assertions.h"
#include "gnb_config.h"
@@ -47,7 +48,6 @@
// #include "SystemInformationBlockType2.h"
// #include "LAYER2/MAC/extern.h"
// #include "LAYER2/MAC/proto.h"
#include "PHY/phy_extern.h"
#include "PHY/INIT/phy_init.h"
#include "targets/ARCH/ETHERNET/USERSPACE/LIB/ethernet_lib.h"
#include "nfapi_vnf.h"
@@ -346,9 +346,16 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) {
// prepare DL Allocation lists
nr_rrc_config_dl_tda(scc);
if (scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity > 320 ) {
free(scc->tdd_UL_DL_ConfigurationCommon->pattern2);
scc->tdd_UL_DL_ConfigurationCommon->pattern2=NULL;
lte_frame_type_t frame_type = get_frame_type((int)*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
if (frame_type == FDD) {
ASN_STRUCT_FREE(asn_DEF_NR_TDD_UL_DL_ConfigCommon, scc->tdd_UL_DL_ConfigurationCommon);
scc->tdd_UL_DL_ConfigurationCommon = NULL;
} else { // TDD
if (scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity > 320 ) {
free(scc->tdd_UL_DL_ConfigurationCommon->pattern2);
scc->tdd_UL_DL_ConfigurationCommon->pattern2 = NULL;
}
}
if ((int)*scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing == -1) {
@@ -998,8 +1005,6 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
if (num_gnbs>0) {
// Output a list of all gNBs. ////////// Identification parameters
config_getlist( &GNBParamList,GNBParams,sizeof(GNBParams)/sizeof(paramdef_t),NULL);
@@ -1155,20 +1160,22 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
(NRRRC_CONFIGURATION_REQ (msg_p).mnc_digit_length[l] == 3),"BAD MNC DIGIT LENGTH %d",
NRRRC_CONFIGURATION_REQ (msg_p).mnc_digit_length[l]);
}
printf("SSB SCO %d\n",*GNBParamList.paramarray[i][GNB_SSB_SUBCARRIEROFFSET_IDX].iptr);
LOG_I(RRC,"SSB SCO %d\n",*GNBParamList.paramarray[i][GNB_SSB_SUBCARRIEROFFSET_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = *GNBParamList.paramarray[i][GNB_SSB_SUBCARRIEROFFSET_IDX].iptr;
printf("pdsch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr);
LOG_I(RRC,"pdsch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr;
printf("pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr);
LOG_I(RRC,"pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr;
printf("minTXRXTIME %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr);
LOG_I(RRC,"minTXRXTIME %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIME = *GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr;
LOG_I(RRC,"SIB1 TDA %d\n",*GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).sib1_tda = *GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr;
printf("Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr);
LOG_I(RRC,"Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr;
printf("Do SRS %d\n",*GNBParamList.paramarray[i][GNB_DO_SRS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).do_SRS = *GNBParamList.paramarray[i][GNB_DO_SRS_IDX].iptr;
NRRRC_CONFIGURATION_REQ (msg_p).scc = scc;
NRRRC_CONFIGURATION_REQ (msg_p).scd = scd;
}//
}//End for (k=0; k <num_gnbs ; k++)
@@ -2033,6 +2040,7 @@ void configure_gnb_du_mac(int inst) {
rrc->configuration.pdsch_AntennaPorts,
rrc->configuration.pusch_AntennaPorts,
rrc->configuration.sib1_tda,
rrc->configuration.minRXTXTIME,
rrc->configuration.scc,
NULL,
0,
+6 -3
View File
@@ -118,6 +118,7 @@ typedef enum {
#define GNB_CONFIG_STRING_PUSCHANTENNAPORTS "pusch_AntennaPorts"
#define GNB_CONFIG_STRING_SIB1TDA "sib1_tda"
#define GNB_CONFIG_STRING_DOCSIRS "do_CSIRS"
#define GNB_CONFIG_STRING_DOSRS "do_SRS"
#define GNB_CONFIG_STRING_NRCELLID "nr_cellid"
#define GNB_CONFIG_STRING_MINRXTXTIME "min_rxtxtime"
#define GNB_CONFIG_STRING_ULPRBBLACKLIST "ul_prbblacklist"
@@ -147,6 +148,7 @@ typedef enum {
{GNB_CONFIG_STRING_PUSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_SIB1TDA, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_DOSRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NRCELLID, NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_MINRXTXTIME, NULL, 0, iptr:NULL, defintval:2, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_ULPRBBLACKLIST, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0} \
@@ -171,9 +173,10 @@ typedef enum {
#define GNB_PUSCH_ANTENNAPORTS_IDX 16
#define GNB_SIB1_TDA_IDX 17
#define GNB_DO_CSIRS_IDX 18
#define GNB_NRCELLID_IDX 19
#define GNB_MINRXTXTIME_IDX 20
#define GNB_ULPRBBLACKLIST_IDX 21
#define GNB_DO_SRS_IDX 19
#define GNB_NRCELLID_IDX 20
#define GNB_MINRXTXTIME_IDX 21
#define GNB_ULPRBBLACKLIST_IDX 22
#define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD}
#define GNBPARAMS_CHECK { \
+22 -8
View File
@@ -220,6 +220,11 @@ void dlsch_scheduler_pre_ue_select_fairRR(
continue;
}
if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0
|| UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
if(mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED) {
continue;
}
@@ -335,6 +340,10 @@ void dlsch_scheduler_pre_ue_select_fairRR(
if (rnti == NOT_A_RNTI)
continue;
if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0
|| UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
if(mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED) {
continue;
}
@@ -459,6 +468,10 @@ void dlsch_scheduler_pre_ue_select_fairRR(
if (rnti == NOT_A_RNTI)
continue;
if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0
|| UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
if(mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED) {
continue;
}
@@ -2241,7 +2254,8 @@ void ulsch_scheduler_pre_ue_select_fairRR(
if (UE_info->UE_template[CC_id][UE_id].configured == FALSE)
continue;
if (UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0
|| UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
// UL DCI
@@ -2403,7 +2417,8 @@ void ulsch_scheduler_pre_ue_select_fairRR(
if (UE_info->UE_template[CC_id][UE_id].configured == FALSE)
continue;
if (UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
if (UE_info->UE_sched_ctrl[UE_id].ul_failure_timer > 0
|| UE_info->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
if ( (ulsch_ue_select[CC_id].ue_num >= ulsch_ue_max_num[CC_id]) || (cc_id_flag[CC_id] == 1) ) {
@@ -2769,13 +2784,12 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 5;
UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = 10;
} else {
// assigne RBS( 3 RBs)
/*
first_rb[CC_id] = first_rb[CC_id] + 3;
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 3;
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 2;
// assigne RBS( 5 RBs)
first_rb[CC_id] = first_rb[CC_id] + 5;
UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 5;
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 4;
UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = 10;
*/ }
}
}
} else if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ue_priority == SCH_UL_INACTIVE ) {
// assigne RBS( 3 RBs)
+3 -2
View File
@@ -68,7 +68,7 @@ void *mac_stats_thread(void *param) {
else {
total_bler = (double)UE_scheduling_control->pusch_rx_error_num[CC_id] / (double)(UE_scheduling_control->pusch_rx_error_num[CC_id] + UE_scheduling_control->pusch_rx_num[CC_id]) * 100;
}
fprintf(fd,"MAC UE rnti %x : %s, PHR %d DLCQI %d PUSCH %d PUCCH %d RLC disc %d UL-stat rcv %lu err %lu bler %lf (%lf/%lf) total_bler %lf mcsoff %d pre_allocated nb_rb %d, mcs %d, bsr %u sched %u tbs %lu cnt %u , DL-stat tbs %lu cnt %u rb %u buf %u 1st %u ret %u ri %d\n",
fprintf(fd,"MAC UE rnti %x : %s, PHR %d DLCQI %d PUSCH %d PUCCH %d RLC disc %d UL-stat rcv %lu err %lu bler %lf (%lf/%lf) total_bler %lf mcsoff %d pre_allocated nb_rb %d, mcs %d, bsr %u sched %u tbs %lu cnt %u , DL-stat tbs %lu cnt %u rb %u buf %u 1st %u ret %u ri %d inactivity timer %d\n",
rnti,
UE_scheduling_control->ul_out_of_sync == 0 ? "in synch" : "out of sync",
UE_info->UE_template[CC_id][UE_id].phr_info,
@@ -97,7 +97,8 @@ void *mac_stats_thread(void *param) {
#endif
UE_scheduling_control->first_cnt[CC_id],
UE_scheduling_control->ret_cnt[CC_id],
UE_scheduling_control->aperiodic_ri_received[CC_id]
UE_scheduling_control->aperiodic_ri_received[CC_id],
UE_scheduling_control->ul_inactivity_timer
);
fprintf(fd," ULSCH rounds %d/%d/%d/%d, DLSCH rounds %d/%d/%d/%d, ULSCH errors %d, DLSCH errors %d\n",
UE_info->eNB_UE_stats[CC_id][UE_id].ulsch_rounds[0],
@@ -51,7 +51,7 @@ uint32_t nr_compute_tbs(uint16_t Qm,
uint32_t Ninfo, Np_info, C;
uint8_t n, scale;
LOG_D(NR_MAC,"nb_symb_sch %d, nb_dmrs_prb %d, nb_rb_oh %d\n",nb_symb_sch,nb_dmrs_prb,nb_rb_oh);
LOG_D(NR_MAC, "In %s: nb_symb_sch %d, nb_dmrs_prb %d, nb_rb %d, nb_rb_oh %d, tb_scaling %d Nl %d\n", __FUNCTION__, nb_symb_sch, nb_dmrs_prb, nb_rb, nb_rb_oh, tb_scaling, Nl);
nbp_re = NR_NB_SC_PER_RB * nb_symb_sch - nb_dmrs_prb - nb_rb_oh;
nb_re = min(156, nbp_re) * nb_rb;
@@ -86,7 +86,7 @@ uint32_t nr_compute_tbs(uint16_t Qm,
}
}
LOG_D(NR_MAC, "In %s: Ninfo %d nbp_re %d nb_re %d Qm %d, R %d, tbs %d\n", __FUNCTION__, Ninfo, nbp_re, nb_re, Qm, R, nr_tbs);
LOG_D(NR_MAC, "In %s: Ninfo %d nbp_re %d nb_re %d Qm %d, R %d, tbs %d bits\n", __FUNCTION__, Ninfo, nbp_re, nb_re, Qm, R, nr_tbs);
return nr_tbs;
+67 -3
View File
@@ -1724,9 +1724,11 @@ int get_nr_prach_info_from_index(uint8_t index,
subframe = slot >> mu;
s_map = table_6_3_3_2_2_prachConfig_Index[index][4];
if ( (s_map>>subframe)&0x01 ) {
*N_RA_slot = table_6_3_3_2_2_prachConfig_Index[index][6]; // Number of RACH slots within a subframe
if (mu == 1) {
if ( (table_6_3_3_2_2_prachConfig_Index[index][6] <= 1) && (slot%2 == 0) )
if ((*N_RA_slot <= 1) && (slot % 2 == 0)){
return 0; // no prach in even slots @ 30kHz for 1 prach per subframe
}
}
for(int i = 0; i <= subframe ; i++) {
if ( (s_map >> i) & 0x01) {
@@ -1735,6 +1737,7 @@ int get_nr_prach_info_from_index(uint8_t index,
}
if (start_symbol != NULL && N_t_slot != NULL && N_dur != NULL && format != NULL){
*start_symbol = table_6_3_3_2_2_prachConfig_Index[index][5];
*config_period = x;
*N_t_slot = table_6_3_3_2_2_prachConfig_Index[index][7];
*N_dur = table_6_3_3_2_2_prachConfig_Index[index][8];
if (table_6_3_3_2_2_prachConfig_Index[index][1] != -1)
@@ -2395,7 +2398,14 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr
uint8_t row, colomn;
int32_t l_prime;
LOG_D(NR_MAC, "PUSCH: NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", duration_in_symbols, start_symbol, mapping_type, dmrs_typeA_position);
LOG_D(NR_MAC, "In %s: PUSCH NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d additional_pos:%d, pusch_maxLength:%d\n",
__FUNCTION__,
duration_in_symbols,
start_symbol,
mapping_type,
dmrs_typeA_position,
additional_pos,
pusch_maxLength);
// Section 6.4.1.1.3 in Spec 38.211
// For PDSCH Mapping TypeA, ld is duration between first OFDM of the slot and last OFDM symbol of the scheduled PUSCH resources
@@ -2494,6 +2504,61 @@ uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB) {
return 4;
}
/*******************************************************************
*
* NAME : get_nr_srs_offset
*
* PARAMETERS : periodicityAndOffset for SRS
*
* RETURN : the offset parameter for SRS
*
*********************************************************************/
uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset) {
switch(periodicityAndOffset.present) {
case NR_SRS_PeriodicityAndOffset_PR_sl1:
return periodicityAndOffset.choice.sl1;
case NR_SRS_PeriodicityAndOffset_PR_sl2:
return periodicityAndOffset.choice.sl2;
case NR_SRS_PeriodicityAndOffset_PR_sl4:
return periodicityAndOffset.choice.sl4;
case NR_SRS_PeriodicityAndOffset_PR_sl5:
return periodicityAndOffset.choice.sl5;
case NR_SRS_PeriodicityAndOffset_PR_sl8:
return periodicityAndOffset.choice.sl8;
case NR_SRS_PeriodicityAndOffset_PR_sl10:
return periodicityAndOffset.choice.sl10;
case NR_SRS_PeriodicityAndOffset_PR_sl16:
return periodicityAndOffset.choice.sl16;
case NR_SRS_PeriodicityAndOffset_PR_sl20:
return periodicityAndOffset.choice.sl20;
case NR_SRS_PeriodicityAndOffset_PR_sl32:
return periodicityAndOffset.choice.sl32;
case NR_SRS_PeriodicityAndOffset_PR_sl40:
return periodicityAndOffset.choice.sl40;
case NR_SRS_PeriodicityAndOffset_PR_sl64:
return periodicityAndOffset.choice.sl64;
case NR_SRS_PeriodicityAndOffset_PR_sl80:
return periodicityAndOffset.choice.sl80;
case NR_SRS_PeriodicityAndOffset_PR_sl160:
return periodicityAndOffset.choice.sl160;
case NR_SRS_PeriodicityAndOffset_PR_sl320:
return periodicityAndOffset.choice.sl320;
case NR_SRS_PeriodicityAndOffset_PR_sl640:
return periodicityAndOffset.choice.sl640;
case NR_SRS_PeriodicityAndOffset_PR_sl1280:
return periodicityAndOffset.choice.sl1280;
case NR_SRS_PeriodicityAndOffset_PR_sl2560:
return periodicityAndOffset.choice.sl2560;
case NR_SRS_PeriodicityAndOffset_PR_NOTHING:
LOG_W(NR_MAC,"NR_SRS_PeriodicityAndOffset_PR_NOTHING\n");
return 0;
default:
return 0;
}
}
// Set the transform precoding status according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16:
// - "UE procedure for applying transform precoding on PUSCH"
uint8_t get_transformPrecoding(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
@@ -4096,4 +4161,3 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
}
return valid;
}
@@ -119,6 +119,8 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr
uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table);
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset);
void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
frame_t frameP,
NR_MIB_t *mib,
+39 -57
View File
@@ -38,16 +38,18 @@
#include "common/utils/nr/nr_common.h"
#include "executables/softmodem-common.h"
int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
int mu,
int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols) {
void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
int mu,
NR_TDD_UL_DL_ConfigCommon_t *tdd_config) {
const int nrofDownlinkSlots = tdd_config->pattern1.nrofDownlinkSlots;
const int nrofDownlinkSymbols = tdd_config->pattern1.nrofDownlinkSymbols;
const int nrofUplinkSlots = tdd_config->pattern1.nrofUplinkSlots;
const int nrofUplinkSymbols = tdd_config->pattern1.nrofUplinkSymbols;
int slot_number = 0;
int nb_periods_per_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period);
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<<mu)*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_per_period = ((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
const int nb_periods_per_frame = get_nb_periods_per_frame(tdd_config->pattern1.dl_UL_TransmissionPeriodicity);
const int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<<mu)*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
const int nb_slots_per_period = ((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
cfg->tdd_table.tdd_period_in_slots = nb_slots_per_period;
if ( (nrofDownlinkSymbols + nrofUplinkSymbols) == 0 )
@@ -103,7 +105,15 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
}
}
return (0);
if (tdd_config->pattern1.ext1 == NULL) {
cfg->tdd_table.tdd_period = tdd_config->pattern1.dl_UL_TransmissionPeriodicity;
} else {
AssertFatal(tdd_config->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, "scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n");
cfg->tdd_table.tdd_period = *tdd_config->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
}
LOG_I(NR_MAC, "TDD has been properly configured\n");
}
@@ -191,27 +201,10 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
}
// TDD Table Configuration
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL)
cfg->tdd_table.tdd_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
else {
AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL,
"scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n");
cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
}
if(cfg->cell_config.frame_duplex_type == TDD){
LOG_I(MAC,"Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period);
int return_tdd = set_tdd_config_nr_ue(cfg,
scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols
);
if (return_tdd !=0)
LOG_E(PHY,"TDD configuration can not be done\n");
else
LOG_I(PHY,"TDD has been properly configurated\n");
if (cfg->cell_config.frame_duplex_type == TDD){
set_tdd_config_nr_ue(cfg,
scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon);
}
// PRACH configuration
@@ -374,31 +367,13 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
}
// TDD Table Configuration
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL)
cfg->tdd_table.tdd_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
else {
AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL,
"scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n");
cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
if (cfg->cell_config.frame_duplex_type == TDD){
set_tdd_config_nr_ue(cfg,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon);
}
if(cfg->cell_config.frame_duplex_type == TDD){
LOG_I(MAC,"Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period);
int return_tdd = set_tdd_config_nr_ue(cfg,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols
);
if (return_tdd !=0)
LOG_E(PHY,"TDD configuration can not be done\n");
else
LOG_I(PHY,"TDD has been properly configurated\n");
}
// PRACH configuration
uint8_t nb_preambles = 64;
if(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles != NULL)
nb_preambles = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles;
@@ -603,6 +578,7 @@ int nr_rrc_mac_config_req_ue(
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
RA_config_t *ra = &mac->ra;
fapi_nr_config_request_t *cfg = &mac->phy_config.config_req;
// TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc.
@@ -617,11 +593,17 @@ int nr_rrc_mac_config_req_ue(
if (sccP != NULL) {
mac->scc_SIB=sccP;
LOG_D(MAC,"Keeping ServingCellConfigCommonSIB\n");
LOG_D(NR_MAC, "In %s: Keeping ServingCellConfigCommonSIB\n", __FUNCTION__);
config_common_ue_sa(mac,module_id,cc_idP);
int num_slots_ul = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0) num_slots_ul++;
LOG_I(MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul);
int num_slots_ul = nr_slots_per_frame[mac->mib->subCarrierSpacingCommon];
if(cfg->cell_config.frame_duplex_type == TDD){
num_slots_ul = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0) {
num_slots_ul++;
}
}
LOG_I(NR_MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul);
mac->ul_config_request = (fapi_nr_ul_config_request_t *)calloc(num_slots_ul, sizeof(fapi_nr_ul_config_request_t));
for (int i=0; i<num_slots_ul; i++)
pthread_mutex_init(&(mac->ul_config_request[i].mutex_ul_config), NULL);
+3 -3
View File
@@ -284,9 +284,9 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
uint8_t *ulsch_buffer,
uint16_t buflen);
int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int mu,
int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols);
void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
int mu,
NR_TDD_UL_DL_ConfigCommon_t *tdd_config);
void set_harq_status(NR_UE_MAC_INST_t *mac,
uint8_t pucch_id,
+5 -3
View File
@@ -70,10 +70,12 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst) {
// point to a list of structures (one for each UL slot) to store PUSCH scheduling parameters
// received from UL DCI.
if (nr_ue_mac_inst->scc) {
int num_slots_ul = nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0)
NR_TDD_UL_DL_ConfigCommon_t *tdd = nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon;
int num_slots_ul = tdd ? tdd->pattern1.nrofUplinkSlots : nr_slots_per_frame[*nr_ue_mac_inst->scc->ssbSubcarrierSpacing];
if (tdd && nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0) {
num_slots_ul++;
LOG_D(MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul);
}
LOG_D(NR_MAC, "In %s: Initializing ul_config_request. num_slots_ul = %d\n", __FUNCTION__, num_slots_ul);
nr_ue_mac_inst->ul_config_request = (fapi_nr_ul_config_request_t *)calloc(num_slots_ul, sizeof(fapi_nr_ul_config_request_t));
for (int i=0; i<num_slots_ul; i++)
pthread_mutex_init(&(nr_ue_mac_inst->ul_config_request[i].mutex_ul_config), NULL);
@@ -38,7 +38,6 @@
#include "LAYER2/NR_MAC_UE/nr_l1_helpers.h"
#include "NR_P-Max.h"
// Implementation of 6.2.4 Configured ransmitted power
// 3GPP TS 38.101-1 version 16.5.0 Release 16
// -
+1 -1
View File
@@ -1257,7 +1257,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
feedback_ti,
dci->dai[0].val,
dci_ind->n_CCE,dci_ind->N_CCE,
0, frame,slot);
0,frame,slot);
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
+143 -9
View File
@@ -57,6 +57,8 @@
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
//#define SRS_DEBUG
static prach_association_pattern_t prach_assoc_pattern;
static ssb_list_info_t ssb_list;
@@ -164,12 +166,14 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
int mu = mac->ULbwp[0] ?
mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing :
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing;
NR_TDD_UL_DL_Pattern_t *tdd_pattern = &tdd_config->pattern1;
const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0);
const int n = nr_slots_per_frame[mu];
const int num_slots_per_tdd = tdd_config ? (n >> (7 - tdd_config->pattern1.dl_UL_TransmissionPeriodicity)) : n;
const int num_slots_ul = tdd_config ? (tdd_config->pattern1.nrofUplinkSlots + (tdd_config->pattern1.nrofUplinkSymbols != 0)) : n;
int index = slot % num_slots_ul;
LOG_D(NR_MAC, "In %s slots per tdd %d, num_slots_ul %d, index %d\n", __FUNCTION__,
LOG_D(NR_MAC, "In %s slots per %s: %d, num_slots_ul %d, index %d\n",
__FUNCTION__,
tdd_config ? "TDD" : "FDD",
num_slots_per_tdd,
num_slots_ul,
index);
@@ -630,7 +634,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->nr_of_symbols = NrOfSymbols;
l_prime_mask = get_l_prime(NrOfSymbols, mappingtype, add_pos, dmrslength, StartSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position);
LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask);
LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask);
#ifdef DEBUG_MSG3
LOG_D(NR_MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size);
@@ -894,6 +898,133 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
}
// Periodic SRS scheduling
bool nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slot) {
bool srs_scheduled = false;
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
NR_SRS_Config_t *srs_config = NULL;
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
srs_config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
} else {
return false;
}
for(int rs = 0; rs < srs_config->srs_ResourceSetToAddModList->list.count; rs++) {
// Find periodic resource set
NR_SRS_ResourceSet_t *srs_resource_set = srs_config->srs_ResourceSetToAddModList->list.array[rs];
if(srs_resource_set->resourceType.present != NR_SRS_ResourceSet__resourceType_PR_periodic) {
continue;
}
// Find the corresponding srs resource
NR_SRS_Resource_t *srs_resource = NULL;
for(int r1 = 0; r1 < srs_resource_set->srs_ResourceIdList->list.count; r1++) {
for (int r2 = 0; r2 < srs_config->srs_ResourceToAddModList->list.count; r2++) {
if ((*srs_resource_set->srs_ResourceIdList->list.array[r1] == srs_config->srs_ResourceToAddModList->list.array[r2]->srs_ResourceId) &&
(srs_config->srs_ResourceToAddModList->list.array[r2]->resourceType.present == NR_SRS_Resource__resourceType_PR_periodic)) {
srs_resource = srs_config->srs_ResourceToAddModList->list.array[r2];
break;
}
}
}
if(srs_resource == NULL) {
continue;
}
NR_BWP_t ubwp = mac->ULbwp[0] ?
mac->ULbwp[0]->bwp_Common->genericParameters :
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters;
uint16_t period = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present];
uint16_t offset = get_nr_srs_offset(srs_resource->resourceType.choice.periodic->periodicityAndOffset_p);
int n_slots_frame = nr_slots_per_frame[ubwp.subcarrierSpacing];
// Check if UE should transmit the SRS
if((frame*n_slots_frame+slot-offset)%period == 0) {
fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot);
fapi_nr_ul_config_srs_pdu *srs_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].srs_config_pdu;
srs_config_pdu->rnti = mac->crnti;
srs_config_pdu->handle = 0;
srs_config_pdu->bwp_size = NRRIV2BW(ubwp.locationAndBandwidth, MAX_BWP_SIZE);;
srs_config_pdu->bwp_start = NRRIV2PRBOFFSET(ubwp.locationAndBandwidth, MAX_BWP_SIZE);;
srs_config_pdu->subcarrier_spacing = ubwp.subcarrierSpacing;
srs_config_pdu->cyclic_prefix = 0;
srs_config_pdu->num_ant_ports = srs_resource->nrofSRS_Ports;
srs_config_pdu->num_symbols = srs_resource->resourceMapping.nrofSymbols;
srs_config_pdu->num_repetitions = srs_resource->resourceMapping.repetitionFactor;
srs_config_pdu->time_start_position = srs_resource->resourceMapping.startPosition;
srs_config_pdu->config_index = srs_resource->freqHopping.c_SRS;
srs_config_pdu->sequence_id = srs_resource->sequenceId;
srs_config_pdu->bandwidth_index = srs_resource->freqHopping.b_SRS;
srs_config_pdu->comb_size = srs_resource->transmissionComb.present - 1;
switch(srs_resource->transmissionComb.present) {
case NR_SRS_Resource__transmissionComb_PR_n2:
srs_config_pdu->comb_offset = srs_resource->transmissionComb.choice.n2->combOffset_n2;
srs_config_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n2->cyclicShift_n2;
break;
case NR_SRS_Resource__transmissionComb_PR_n4:
srs_config_pdu->comb_offset = srs_resource->transmissionComb.choice.n4->combOffset_n4;
srs_config_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n4->cyclicShift_n4;
break;
default:
LOG_W(NR_MAC, "Invalid or not implemented comb_size!\n");
}
srs_config_pdu->frequency_position = srs_resource->freqDomainPosition;
srs_config_pdu->frequency_shift = srs_resource->freqDomainShift;
srs_config_pdu->frequency_hopping = srs_resource->freqHopping.b_hop;
srs_config_pdu->group_or_sequence_hopping = srs_resource->groupOrSequenceHopping;
srs_config_pdu->resource_type = srs_resource->resourceType.present - 1;
srs_config_pdu->t_srs = period;
srs_config_pdu->t_offset = offset;
#ifdef SRS_DEBUG
LOG_I(NR_MAC,"Frame = %i, slot = %i\n", frame, slot);
LOG_I(NR_MAC,"srs_config_pdu->rnti = 0x%04x\n", srs_config_pdu->rnti);
LOG_I(NR_MAC,"srs_config_pdu->handle = %u\n", srs_config_pdu->handle);
LOG_I(NR_MAC,"srs_config_pdu->bwp_size = %u\n", srs_config_pdu->bwp_size);
LOG_I(NR_MAC,"srs_config_pdu->bwp_start = %u\n", srs_config_pdu->bwp_start);
LOG_I(NR_MAC,"srs_config_pdu->subcarrier_spacing = %u\n", srs_config_pdu->subcarrier_spacing);
LOG_I(NR_MAC,"srs_config_pdu->cyclic_prefix = %u (0: Normal; 1: Extended)\n", srs_config_pdu->cyclic_prefix);
LOG_I(NR_MAC,"srs_config_pdu->num_ant_ports = %u (0 = 1 port, 1 = 2 ports, 2 = 4 ports)\n", srs_config_pdu->num_ant_ports);
LOG_I(NR_MAC,"srs_config_pdu->num_symbols = %u (0 = 1 symbol, 1 = 2 symbols, 2 = 4 symbols)\n", srs_config_pdu->num_symbols);
LOG_I(NR_MAC,"srs_config_pdu->num_repetitions = %u (0 = 1, 1 = 2, 2 = 4)\n", srs_config_pdu->num_repetitions);
LOG_I(NR_MAC,"srs_config_pdu->time_start_position = %u\n", srs_config_pdu->time_start_position);
LOG_I(NR_MAC,"srs_config_pdu->config_index = %u\n", srs_config_pdu->config_index);
LOG_I(NR_MAC,"srs_config_pdu->sequence_id = %u\n", srs_config_pdu->sequence_id);
LOG_I(NR_MAC,"srs_config_pdu->bandwidth_index = %u\n", srs_config_pdu->bandwidth_index);
LOG_I(NR_MAC,"srs_config_pdu->comb_size = %u (0 = comb size 2, 1 = comb size 4, 2 = comb size 8)\n", srs_config_pdu->comb_size);
LOG_I(NR_MAC,"srs_config_pdu->comb_offset = %u\n", srs_config_pdu->comb_offset);
LOG_I(NR_MAC,"srs_config_pdu->cyclic_shift = %u\n", srs_config_pdu->cyclic_shift);
LOG_I(NR_MAC,"srs_config_pdu->frequency_position = %u\n", srs_config_pdu->frequency_position);
LOG_I(NR_MAC,"srs_config_pdu->frequency_shift = %u\n", srs_config_pdu->frequency_shift);
LOG_I(NR_MAC,"srs_config_pdu->frequency_hopping = %u\n", srs_config_pdu->frequency_hopping);
LOG_I(NR_MAC,"srs_config_pdu->group_or_sequence_hopping = %u (0 = No hopping, 1 = Group hopping groupOrSequenceHopping, 2 = Sequence hopping)\n", srs_config_pdu->group_or_sequence_hopping);
LOG_I(NR_MAC,"srs_config_pdu->resource_type = %u (0: aperiodic, 1: semi-persistent, 2: periodic)\n", srs_config_pdu->resource_type);
LOG_I(NR_MAC,"srs_config_pdu->t_srs = %u\n", srs_config_pdu->t_srs);
LOG_I(NR_MAC,"srs_config_pdu->t_offset = %u\n", srs_config_pdu->t_offset);
#endif
fill_ul_config(ul_config, frame, slot, FAPI_NR_UL_CONFIG_TYPE_SRS);
srs_scheduled = true;
}
}
return srs_scheduled;
}
// Performs :
// 1. TODO: Call RRC for link status return to PHY
// 2. TODO: Perform SR/BSR procedures for scheduling feedback
@@ -962,6 +1093,10 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
if (!ul_config) {
LOG_E(NR_MAC, "mac->ul_config is null!\n");
}
// Periodic SRS scheduling
nr_ue_periodic_srs_scheduling(mod_id, frame_tx, slot_tx);
// Schedule ULSCH only if the current frame and slot match those in ul_config_req
// AND if a UL grant (UL DCI or Msg3) has been received (as indicated by num_pdus)
if (ul_config){
@@ -1052,7 +1187,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
}
if (dl_info) {
return (CONNECTION_OK);
return (UE_CONNECTION_OK);
}
module_id_t mod_id = ul_info->module_id;
frame_t txFrameP = ul_info->frame_tx;
@@ -1438,7 +1573,7 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
// Calculate TX slot and frame
*slot_tx = (current_slot + k2) % nr_slots_per_frame[mu];
*frame_tx = ((current_slot + k2) > nr_slots_per_frame[mu]) ? (current_frame + 1) % 1024 : current_frame;
*frame_tx = ((current_slot + k2) > (nr_slots_per_frame[mu]-1)) ? (current_frame + 1) % 1024 : current_frame;
}
@@ -2127,8 +2262,7 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in
}
// CSI
if (mac->ra.ra_state == RA_SUCCEEDED ||
get_softmodem_params()->phy_test == 1)
if (mac->ra.ra_state == RA_SUCCEEDED || get_softmodem_params()->phy_test == 1)
O_CSI = nr_get_csi_measurements(mac, frameP, slotP, pucch);
// ACKNACK
+45 -33
View File
@@ -58,6 +58,7 @@ void process_rlcBearerConfig(struct NR_CellGroupConfig__rlc_BearerToAddModList *
struct NR_CellGroupConfig__rlc_BearerToReleaseList *rlc_bearer2release_list,
NR_UE_sched_ctrl_t *sched_ctrl) {
if (rlc_bearer2add_list)
// keep lcids
for (int i=0;i<rlc_bearer2add_list->list.count;i++) {
@@ -135,6 +136,7 @@ void process_CellGroup(NR_CellGroupConfig_t *CellGroup, NR_UE_sched_ctrl_t *sche
process_rlcBearerConfig(CellGroup->rlc_BearerToAddModList,CellGroup->rlc_BearerToReleaseList,sched_ctrl);
}
void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts, int pusch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) {
nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[Mod_idP]->config[0];
@@ -394,18 +396,17 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts
cfg->num_tlv++;
// TDD Table Configuration
//cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG;
cfg->num_tlv++;
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL)
cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
else {
AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL,
"scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n");
cfg->tdd_table.tdd_period.value = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
}
if(cfg->cell_config.frame_duplex_type.value == TDD){
LOG_I(NR_MAC,"Setting TDD configuration period to %d\n",cfg->tdd_table.tdd_period.value);
if (cfg->cell_config.frame_duplex_type.value == TDD){
cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG;
cfg->num_tlv++;
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1 == NULL) {
cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
} else {
AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL,
"In %s: scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n", __FUNCTION__);
cfg->tdd_table.tdd_period.value = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
}
LOG_I(NR_MAC, "Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period.value);
int periods_per_frame = set_tdd_config_nr(cfg,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
@@ -423,12 +424,13 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts
}
extern uint16_t sl_ahead;
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int ssb_SubcarrierOffset,
int pdsch_AntennaPorts,
int pusch_AntennaPorts,
int sib1_tda,
int minRXTXTIMEpdsch,
NR_ServingCellConfigCommon_t *scc,
NR_BCCH_BCH_Message_t *mib,
int add_ue,
@@ -439,24 +441,21 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
AssertFatal((scc->ssb_PositionsInBurst->present > 0) && (scc->ssb_PositionsInBurst->present < 4), "SSB Bitmap type %d is not valid\n",scc->ssb_PositionsInBurst->present);
/* dimension UL_tti_req_ahead for number of slots in frame */
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const int n = slots_per_frame[*scc->ssbSubcarrierSpacing];
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
RC.nrmac[Mod_idP]->UL_tti_req_ahead[0] = calloc(n, sizeof(nfapi_nr_ul_tti_request_t));
AssertFatal(RC.nrmac[Mod_idP]->UL_tti_req_ahead[0],
"could not allocate memory for RC.nrmac[]->UL_tti_req_ahead[]\n");
/* fill in slot/frame numbers: slot is fixed, frame will be updated by
* scheduler */
/* fill in slot/frame numbers: slot is fixed, frame will be updated by scheduler
extern sf_ahead is initialized in ru_thread but that function is not executed yet here*/
const uint16_t sf_ahead = (uint16_t) ceil((float)6/(0x01<<(*scc->ssbSubcarrierSpacing)));
const uint16_t sl_ahead = sf_ahead * (0x01<<(*scc->ssbSubcarrierSpacing));
/* consider that scheduler runs sl_ahead: the first sl_ahead slots are
* already "in the past" and thus we put frame 1 instead of 0!*/
for (int i = 0; i < n; ++i) {
nfapi_nr_ul_tti_request_t *req = &RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][i];
/* consider that scheduler runs sl_ahead: the first sl_ahead slots are
* already "in the past" and thus we put frame 1 instead of 0! Note that
* variable sl_ahead seems to not be correctly initialized, but I leave
* it for information purposes here (the fix would always put 0, what
* happens now, too) */
req->SFN = i < sl_ahead;
req->SFN = i < (sl_ahead-1);
req->Slot = i;
}
RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL =
calloc(n * MAX_BWP_SIZE, sizeof(uint16_t));
AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL,
@@ -480,6 +479,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
}
}
RC.nrmac[Mod_idP]->ssb_SubcarrierOffset = ssb_SubcarrierOffset;
RC.nrmac[Mod_idP]->minRXTXTIMEpdsch = minRXTXTIMEpdsch;
NR_PHY_Config_t phycfg;
phycfg.Mod_id = Mod_idP;
@@ -490,19 +490,31 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
find_SSB_and_RO_available(Mod_idP);
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots;
const int nr_dlmix_slots = tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0);
const int nr_ulstart_slot = tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0);
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
int nr_slots_period = n;
int nr_dl_slots = n;
int nr_ulstart_slot = 0;
if (tdd) {
nr_dl_slots = tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0);
nr_ulstart_slot = tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0);
nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
}
else
// if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration
AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].frame_type == FDD,"Dynamic TDD not handled yet\n");
for (int slot = 0; slot < n; ++slot) {
/* FIXME: it seems there is a problem with slot 0/10/slots right after UL:
* we just get retransmissions. Thus, do not schedule such slots in DL */
if (slot % nr_slots_period != 0)
RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) < nr_dlmix_slots) << (slot % 64);
* we just get retransmissions. Thus, do not schedule such slots in DL in TDD */
if (RC.nrmac[Mod_idP]->common_channels[0].frame_type == FDD ||
(slot % nr_slots_period != 0)){
RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) < nr_dl_slots) << (slot % 64);
}
RC.nrmac[Mod_idP]->ulsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) >= nr_ulstart_slot) << (slot % 64);
LOG_D(NR_MAC, "slot %d DL %d UL %d\n",
LOG_I(NR_MAC, "In %s: slot %d DL %d UL %d\n",
__FUNCTION__,
slot,
(RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] & ((uint64_t)1 << (slot % 64))) != 0,
(RC.nrmac[Mod_idP]->ulsch_slot_bitmap[slot / 64] & ((uint64_t)1 << (slot % 64))) != 0);
+10 -7
View File
@@ -36,6 +36,7 @@
#include "NR_MAC_gNB/mac_proto.h"
#include "common/utils/LOG/log.h"
#include "common/utils/nr/nr_common.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
#include "OCG.h"
@@ -89,7 +90,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
/* advance last round's future UL_tti_req to be ahead of current frame/slot */
future_ul_tti_req->SFN = (slotP == 0 ? frameP : frameP + 1) % 1024;
LOG_D(MAC,"Future_ul_tti SFN = %d for slot %d \n", future_ul_tti_req->SFN, (slotP + num_slots - 1) % num_slots);
LOG_D(NR_MAC, "In %s: UL_tti_req_ahead SFN.slot = %d.%d for slot %d \n", __FUNCTION__, future_ul_tti_req->SFN, future_ul_tti_req->Slot, (slotP + num_slots - 1) % num_slots);
/* future_ul_tti_req->Slot is fixed! */
future_ul_tti_req->n_pdus = 0;
future_ul_tti_req->n_ulsch = 0;
@@ -273,7 +274,6 @@ bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) {
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frame,
sub_frame_t slot){
//pthread_mutex_lock(&mutextest);
protocol_ctxt_t ctxt={0};
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP);
@@ -285,12 +285,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
if (slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) {
//FR2
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots;
const int nb_periods_per_frame = n / nr_slots_period;
// re-initialization of tdd_beam_association at beginning of frame (only for FR2)
AssertFatal(tdd,"Dynamic TDD not handled yet\n");
const int nb_periods_per_frame = get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
// re-initialization of tdd_beam_association at beginning of frame
for (int i=0; i<nb_periods_per_frame; i++)
gNB->tdd_beam_association[i] = -1;
}
@@ -379,6 +378,10 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (slot == 0)
nr_csi_meas_reporting(module_idP, frame, slot);
// Schedule SRS: check in slot 0 for the whole frame
if (slot == 0)
nr_schedule_srs(module_idP, frame);
// This schedule RA procedure if not in phy_test mode
// Otherwise already consider 5G already connected
if (get_softmodem_params()->phy_test == 0) {
+49 -31
View File
@@ -397,6 +397,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
uint16_t *msg2_frame, uint16_t *msg2_slot,
NR_ServingCellConfigCommon_t *scc,
lte_frame_type_t frame_type,
uint16_t monitoring_slot_period,
uint16_t monitoring_offset,uint8_t beam_index,
uint8_t num_active_ssb,
@@ -404,18 +405,25 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
// preferentially we schedule the msg2 in the mixed slot or in the last dl slot
// if they are allowed by search space configuration
uint8_t mu = *scc->ssbSubcarrierSpacing;
uint8_t response_window = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow;
uint8_t slot_window;
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
// number of mixed slot or of last dl slot if there is no mixed slot
uint8_t last_dl_slot_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
uint8_t last_dl_slot_period = n_slots_frame-1;
// lenght of tdd period in slots
uint8_t tdd_period_slot = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols == 0)
last_dl_slot_period--;
if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))
tdd_period_slot++;
uint8_t tdd_period_slot = n_slots_frame;
if (tdd) {
last_dl_slot_period = tdd->nrofDownlinkSymbols == 0? (tdd->nrofDownlinkSlots-1) : tdd->nrofDownlinkSlots;
tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
}
else{
if(frame_type == TDD)
AssertFatal(frame_type == FDD, "Dynamic TDD not handled yet\n");
}
switch(response_window){
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1:
@@ -449,7 +457,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
// slot and frame limit to transmit msg2 according to response window
uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame[mu];
uint8_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1);
uint16_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1);
// computing start of next period
@@ -478,9 +486,21 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
// go to previous slot if the current scheduled slot is beyond the response window
// and if the slot is not among the PDCCH monitored ones (38.213 10.1)
while (((*msg2_slot>slot_limit)&&(*msg2_frame>frame_limit)) || ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) {
if((*msg2_slot%tdd_period_slot) > 0)
(*msg2_slot)--;
while (*msg2_frame > frame_limit
|| (*msg2_frame == frame_limit && *msg2_slot > slot_limit)
|| ((*msg2_frame * nr_slots_per_frame[mu] + *msg2_slot - monitoring_offset) % monitoring_slot_period != 0)) {
if((frame_type == FDD) || ((*msg2_slot%tdd_period_slot) > 0)) {
if (*msg2_slot==0) {
if(*msg2_frame != 0)
(*msg2_frame)--;
else
*msg2_frame = 1023;
*msg2_slot = nr_slots_per_frame[mu] - 1;
}
else
(*msg2_slot)--;
}
else
AssertFatal(1==0,"No available DL slot to schedule msg2 has been found");
}
@@ -503,6 +523,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
lte_frame_type_t frame_type = cc->frame_type;
uint8_t total_RApreambles = MAX_NUM_NR_PRACH_PREAMBLES;
uint8_t num_ssb_per_RO = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present;
@@ -624,6 +645,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
&msg2_frame,
&msg2_slot,
scc,
frame_type,
monitoring_slot_period,
monitoring_offset,
beam_index,
@@ -734,10 +756,13 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
// beam association for FR2
int16_t *tdd_beam_association = nr_mac->tdd_beam_association;
if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
uint8_t tdd_period_slot = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))
tdd_period_slot++;
// FR2
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
AssertFatal(tdd,"Dynamic TDD not handled yet\n");
uint8_t tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
int num_tdd_period = sched_slot/tdd_period_slot;
if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id))
return; // can't schedule retransmission in this slot
else
@@ -898,6 +923,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
uint16_t msg3_nb_rb = 8; // sdu has 6 or 8 bytes
lte_frame_type_t frame_type = RC.nrmac[module_id]->common_channels->frame_type;
int mu = ubwp ?
ubwp->bwp_Common->genericParameters.subcarrierSpacing :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
@@ -908,8 +935,9 @@ void nr_get_Msg3alloc(module_id_t module_id,
ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList:
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
const int n_slots_frame = nr_slots_per_frame[mu];
uint8_t k2 = 0;
lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
if (frame_type == TDD) {
int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = ((1<<mu)*10)/nb_periods_per_frame;
@@ -935,16 +963,15 @@ void nr_get_Msg3alloc(module_id_t module_id,
AssertFatal(ra->Msg3_tda_id<16,"Unable to find Msg3 time domain allocation in list\n");
if (nr_slots_per_frame[mu]>temp_slot)
if (n_slots_frame > temp_slot)
ra->Msg3_frame = current_frame;
else
ra->Msg3_frame = (current_frame + (temp_slot/nr_slots_per_frame[mu]))%1024;
ra->Msg3_frame = (current_frame + (temp_slot / n_slots_frame)) % 1024;
// beam association for FR2
if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
uint8_t tdd_period_slot = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))
tdd_period_slot++;
AssertFatal(tdd,"Dynamic TDD not handled yet\n");
uint8_t tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
int num_tdd_period = ra->Msg3_slot/tdd_period_slot;
if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id))
AssertFatal(1==0,"Cannot schedule MSG3\n");
@@ -1000,6 +1027,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
int start_symbol_index,nr_of_symbols;
SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols);
int mcsindex = -1; // init value
@@ -1018,14 +1046,13 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
pusch_pdu->ul_dmrs_symb_pos = get_l_prime(nr_of_symbols,mappingtype,pusch_dmrs_pos2,pusch_len1,start_symbol_index, scc->dmrs_TypeA_Position);
LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , ul_dmrs_symb_pos:%x\n", start_symbol_index, nr_of_symbols, mappingtype, pusch_pdu->ul_dmrs_symb_pos);
LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, ul_dmrs_symb_pos:%x\n", start_symbol_index, nr_of_symbols, mappingtype, pusch_pdu->ul_dmrs_symb_pos);
pusch_pdu->dmrs_config_type = 0;
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
pusch_pdu->dmrs_ports = 1; // 6.2.2 in 38.214 only port 0 to be used
pusch_pdu->num_dmrs_cdm_grps_no_data = 2; // no data in dmrs symbols as in 6.2.2 in 38.214
pusch_pdu->resource_alloc = 1; //type 1
pusch_pdu->rb_start = msg3_first_rb;
if (msg3_nb_rb > pusch_pdu->bwp_size)
AssertFatal(1==0,"MSG3 allocated number of RBs exceed the BWP size\n");
@@ -2042,25 +2069,16 @@ void nr_fill_rar(uint8_t Mod_idP,
rar->UL_GRANT_4 = (uint8_t) ul_grant & 0xff;
#ifdef DEBUG_RAR
//LOG_I(NR_MAC, "rarbi->E = 0x%x\n", rarbi->E);
//LOG_I(NR_MAC, "rarbi->T = 0x%x\n", rarbi->T);
//LOG_I(NR_MAC, "rarbi->R = 0x%x\n", rarbi->R);
//LOG_I(NR_MAC, "rarbi->BI = 0x%x\n", rarbi->BI);
LOG_I(NR_MAC, "rarh->E = 0x%x\n", rarh->E);
LOG_I(NR_MAC, "rarh->T = 0x%x\n", rarh->T);
LOG_I(NR_MAC, "rarh->RAPID = 0x%x (%i)\n", rarh->RAPID, rarh->RAPID);
LOG_I(NR_MAC, "rar->R = 0x%x\n", rar->R);
LOG_I(NR_MAC, "rar->TA1 = 0x%x\n", rar->TA1);
LOG_I(NR_MAC, "rar->TA2 = 0x%x\n", rar->TA2);
LOG_I(NR_MAC, "rar->UL_GRANT_1 = 0x%x\n", rar->UL_GRANT_1);
LOG_I(NR_MAC, "rar->UL_GRANT_2 = 0x%x\n", rar->UL_GRANT_2);
LOG_I(NR_MAC, "rar->UL_GRANT_3 = 0x%x\n", rar->UL_GRANT_3);
LOG_I(NR_MAC, "rar->UL_GRANT_4 = 0x%x\n", rar->UL_GRANT_4);
LOG_I(NR_MAC, "rar->TCRNTI_1 = 0x%x\n", rar->TCRNTI_1);
LOG_I(NR_MAC, "rar->TCRNTI_2 = 0x%x\n", rar->TCRNTI_2);
#endif
@@ -267,8 +267,9 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1));
fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id);
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots;
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
// FR2 is only TDD, to be fixed for flexible TDD
const int nr_slots_period = tdd ? n_slots_frame/get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity) : n_slots_frame;
num_tdd_period = rel_slot/nr_slots_period;
gNB->tdd_beam_association[num_tdd_period]=i_ssb;
num_ssb++;
@@ -62,9 +62,22 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *
/* there is a mixed slot only when in TDD */
NR_ServingCellConfigCommon_t *scc = nrmac->common_channels->ServingCellConfigCommon;
lte_frame_type_t frame_type = nrmac->common_channels->frame_type;
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const NR_TDD_UL_DL_Pattern_t *tdd =
scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
const int symb_dlMixed = tdd ? (1 << tdd->nrofDownlinkSymbols) - 1 : 0;
int symb_dlMixed = 0;
int nr_mix_slots = 0;
int nr_slots_period = n;
if (tdd) {
symb_dlMixed = (1 << tdd->nrofDownlinkSymbols) - 1;
nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
}
else
// if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration
AssertFatal(nrmac->common_channels->frame_type == FDD,"Dynamic TDD not handled yet\n");
int target_ss;
if (bwp) {
@@ -97,7 +110,7 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *
/* check that TDA index 1 fits into DL part of mixed slot, if it exists */
int tdaMi = -1;
if (tdaList->list.count > 1) {
if (frame_type == TDD && tdaList->list.count > 1) {
const NR_PDSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1];
AssertFatal(!tdaP_Mi->k0 || *tdaP_Mi->k0 == 0,
"TimeDomainAllocation at index 1: non-null k0 (%ld) is not supported by the scheduler\n",
@@ -120,17 +133,13 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *
}
}
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const int n = slots_per_frame[*scc->ssbSubcarrierSpacing];
nrmac->preferred_dl_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_dl_tda[bwp_id]));
const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0;
const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n;
for (int i = 0; i < n; ++i) {
nrmac->preferred_dl_tda[bwp_id][i] = -1;
if (!tdd || i % nr_slots_period < tdd->nrofDownlinkSlots)
if (frame_type == FDD || i % nr_slots_period < tdd->nrofDownlinkSlots)
nrmac->preferred_dl_tda[bwp_id][i] = 0;
else if (tdd && nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots)
else if (nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots)
nrmac->preferred_dl_tda[bwp_id][i] = tdaMi;
LOG_D(MAC, "slot %d preferred_dl_tda %d\n", i, nrmac->preferred_dl_tda[bwp_id][i]);
}
@@ -886,7 +895,10 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
/* This is temporary and it assumes all UEs have the same BWP and TDA*/
int UE_id = UE_info->list.head;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
if (!RC.nrmac[module_id]->preferred_dl_tda[bwp_id])
return;
const int tda = RC.nrmac[module_id]->preferred_dl_tda[bwp_id][slot];
int startSymbolIndex, nrOfSymbols;
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_bwp ?
sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList :
@@ -2038,6 +2038,11 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
sched_ctrl->pucch_consecutive_dtx_cnt = 0;
sched_ctrl->pusch_consecutive_dtx_cnt = 0;
sched_ctrl->ul_failure = 0;
sched_ctrl->sched_srs.frame = -1;
sched_ctrl->sched_srs.slot = -1;
sched_ctrl->sched_srs.srs_scheduled = false;
/* set illegal time domain allocation to force recomputation of all fields */
sched_ctrl->pdsch_semi_static.time_domain_allocation = -1;
sched_ctrl->pusch_semi_static.time_domain_allocation = -1;
@@ -2266,12 +2271,12 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
}
AssertFatal(found==1,"Couldn't find a ue specific searchspace\n");
if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) {
for (int i=0; i<8; i++) {
pdsch_to_harq_feedback[i] = i+1;
if(pdsch_to_harq_feedback[i]>*max_fb_time)
*max_fb_time = pdsch_to_harq_feedback[i];
}
}
else {
@@ -0,0 +1,186 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file gNB_scheduler_srs.c
* \brief MAC procedures related to SRS
* \date 2021
* \version 1.0
*/
#include <softmodem-common.h>
#include "NR_MAC_gNB/nr_mac_gNB.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "NR_MAC_gNB/mac_proto.h"
#include "common/ran_context.h"
#include "nfapi/oai_integration/vendor_ext.h"
extern RAN_CONTEXT_t RC;
void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int module_id, int CC_id, int UE_id, NR_SRS_Resource_t *srs_resource) {
gNB_MAC_INST *nrmac = RC.nrmac[module_id];
NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
NR_UE_info_t *UE_info = &nrmac->UE_info;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
NR_BWP_t ubwp = sched_ctrl->active_ubwp ?
sched_ctrl->active_ubwp->bwp_Common->genericParameters :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
srs_pdu->rnti = UE_info->rnti[UE_id];
srs_pdu->handle = 0;
srs_pdu->bwp_size = NRRIV2BW(ubwp.locationAndBandwidth, MAX_BWP_SIZE);;
srs_pdu->bwp_start = NRRIV2PRBOFFSET(ubwp.locationAndBandwidth, MAX_BWP_SIZE);;
srs_pdu->subcarrier_spacing = ubwp.subcarrierSpacing;
srs_pdu->cyclic_prefix = 0;
srs_pdu->num_ant_ports = srs_resource->nrofSRS_Ports;
srs_pdu->num_symbols = srs_resource->resourceMapping.nrofSymbols;
srs_pdu->num_repetitions = srs_resource->resourceMapping.repetitionFactor;
srs_pdu->time_start_position = srs_resource->resourceMapping.startPosition;
srs_pdu->config_index = srs_resource->freqHopping.c_SRS;
srs_pdu->sequence_id = srs_resource->sequenceId;
srs_pdu->bandwidth_index = srs_resource->freqHopping.b_SRS;
srs_pdu->comb_size = srs_resource->transmissionComb.present - 1;
switch(srs_resource->transmissionComb.present) {
case NR_SRS_Resource__transmissionComb_PR_n2:
srs_pdu->comb_offset = srs_resource->transmissionComb.choice.n2->combOffset_n2;
srs_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n2->cyclicShift_n2;
break;
case NR_SRS_Resource__transmissionComb_PR_n4:
srs_pdu->comb_offset = srs_resource->transmissionComb.choice.n4->combOffset_n4;
srs_pdu->cyclic_shift = srs_resource->transmissionComb.choice.n4->cyclicShift_n4;
break;
default:
LOG_W(NR_MAC, "Invalid or not implemented comb_size!\n");
}
srs_pdu->frequency_position = srs_resource->freqDomainPosition;
srs_pdu->frequency_shift = srs_resource->freqDomainShift;
srs_pdu->frequency_hopping = srs_resource->freqHopping.b_hop;
srs_pdu->group_or_sequence_hopping = srs_resource->groupOrSequenceHopping;
srs_pdu->resource_type = srs_resource->resourceType.present - 1;
srs_pdu->t_srs = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present];
srs_pdu->t_offset = get_nr_srs_offset(srs_resource->resourceType.choice.periodic->periodicityAndOffset_p);
}
void nr_fill_nfapi_srs(int module_id, int CC_id, int UE_id, sub_frame_t slot, NR_SRS_Resource_t *srs_resource) {
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][slot];
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE;
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_srs_pdu_t);
nfapi_nr_srs_pdu_t *srs_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].srs_pdu;
memset(srs_pdu, 0, sizeof(nfapi_nr_srs_pdu_t));
future_ul_tti_req->n_pdus += 1;
nr_configure_srs(srs_pdu, module_id, CC_id, UE_id, srs_resource);
}
/*******************************************************************
*
* NAME : nr_schedule_srs
*
* PARAMETERS : module id
* frame number for possible SRS reception
*
* DESCRIPTION : It informs the PHY layer that has an SRS to receive.
* Only for periodic scheduling yet.
*
*********************************************************************/
void nr_schedule_srs(int module_id, frame_t frame) {
gNB_MAC_INST *nrmac = RC.nrmac[module_id];
NR_UE_info_t *UE_info = &nrmac->UE_info;
const NR_list_t *UE_list = &UE_info->list;
for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
const int CC_id = 0;
NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[CC_id].ServingCellConfigCommon;
NR_CellGroupConfig_t *cg = UE_info->CellGroup[UE_id];
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
sched_ctrl->sched_srs.frame = -1;
sched_ctrl->sched_srs.slot = -1;
sched_ctrl->sched_srs.srs_scheduled = false;
if(!UE_info->Msg4_ACKed[UE_id]) {
continue;
}
NR_SRS_Config_t *srs_config = NULL;
if (cg &&
cg->spCellConfig &&
cg->spCellConfig->spCellConfigDedicated &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
srs_config = cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
} else {
continue;
}
for(int rs = 0; rs < srs_config->srs_ResourceSetToAddModList->list.count; rs++) {
// Find periodic resource set
NR_SRS_ResourceSet_t *srs_resource_set = srs_config->srs_ResourceSetToAddModList->list.array[rs];
if (srs_resource_set->resourceType.present != NR_SRS_ResourceSet__resourceType_PR_periodic) {
continue;
}
// Find the corresponding srs resource
NR_SRS_Resource_t *srs_resource = NULL;
for (int r1 = 0; r1 < srs_resource_set->srs_ResourceIdList->list.count; r1++) {
for (int r2 = 0; r2 < srs_config->srs_ResourceToAddModList->list.count; r2++) {
if ((*srs_resource_set->srs_ResourceIdList->list.array[r1] ==
srs_config->srs_ResourceToAddModList->list.array[r2]->srs_ResourceId) &&
(srs_config->srs_ResourceToAddModList->list.array[r2]->resourceType.present ==
NR_SRS_Resource__resourceType_PR_periodic)) {
srs_resource = srs_config->srs_ResourceToAddModList->list.array[r2];
break;
}
}
}
if (srs_resource == NULL) {
continue;
}
NR_BWP_t ubwp = sched_ctrl->active_ubwp ?
sched_ctrl->active_ubwp->bwp_Common->genericParameters :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
uint16_t period = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present];
uint16_t offset = get_nr_srs_offset(srs_resource->resourceType.choice.periodic->periodicityAndOffset_p);
int n_slots_frame = nr_slots_per_frame[ubwp.subcarrierSpacing];
// Check if UE will transmit the SRS in this frame
if ( ((frame - offset/n_slots_frame)*n_slots_frame)%period == 0) {
LOG_D(NR_MAC,"Scheduling SRS reception for %d.%d\n", frame, offset%n_slots_frame);
nr_fill_nfapi_srs(module_id, CC_id, UE_id, offset%n_slots_frame, srs_resource);
sched_ctrl->sched_srs.frame = frame;
sched_ctrl->sched_srs.slot = offset%n_slots_frame;
sched_ctrl->sched_srs.srs_scheduled = true;
}
}
}
}
+36 -26
View File
@@ -32,6 +32,7 @@
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "NR_MAC_gNB/mac_proto.h"
#include "common/ran_context.h"
#include "common/utils/nr/nr_common.h"
#include "nfapi/oai_integration/vendor_ext.h"
extern RAN_CONTEXT_t RC;
@@ -1184,21 +1185,25 @@ int nr_acknack_scheduling(int mod_id,
int r_pucch,
int is_common) {
const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon;
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots;
const int first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period);
const int first_ul_slot_period = tdd->nrofDownlinkSlots;
const int CC_id = 0;
NR_sched_pucch_t *csi_pucch;
const int minfbtime = RC.nrmac[mod_id]->minRXTXTIMEpdsch;
const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels[CC_id].ServingCellConfigCommon;
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
// initializing the values for FDD
int nr_slots_period = n_slots_frame;
int first_ul_slot_tdd = slot + minfbtime;
int first_ul_slot_period = 0;
if(tdd){
nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period);
first_ul_slot_period = tdd->nrofDownlinkSlots;
}
else
// if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration
AssertFatal(RC.nrmac[mod_id]->common_channels[CC_id].frame_type == FDD,"Dynamic TDD not handled yet\n");
AssertFatal(slot < first_ul_slot_tdd + (tdd->nrofUplinkSymbols != 0),
"cannot handle multiple TDD periods (yet): slot %d first_ul_slot_tdd %d nrofUplinkSlots %ld\n",
slot,
first_ul_slot_tdd,
tdd->nrofUplinkSlots);
NR_sched_pucch_t *csi_pucch;
/* for the moment, we consider:
* * only pucch_sched[0] holds HARQ (and SR)
@@ -1208,19 +1213,21 @@ int nr_acknack_scheduling(int mod_id,
* * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */
NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id];
NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0];
LOG_D(NR_MAC,"pucch_acknak %d.%d Trying to allocate pucch, current DAI %d\n",frame,slot,pucch->dai_c);
LOG_D(NR_MAC, "In %s: %d.%d Trying to allocate pucch, current DAI %d\n", __FUNCTION__, frame, slot, pucch->dai_c);
pucch->r_pucch=r_pucch;
AssertFatal(pucch->csi_bits == 0,
"%s(): csi_bits %d in sched_pucch[0]\n",
__func__,
pucch->csi_bits);
/* if the currently allocated PUCCH of this UE is full, allocate it */
if (pucch->dai_c == 2) {
/* advance the UL slot information in PUCCH by one so we won't schedule in
* the same slot again */
const int f = pucch->frame;
const int s = pucch->ul_slot;
LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI = 2 pucch currently in %d.%d, advancing by 1 slot\n",frame,slot,f,s);
LOG_D(NR_MAC, "In %s: %d.%d DAI = 2 pucch currently in %d.%d, advancing by 1 slot\n", __FUNCTION__, frame, slot, f, s);
nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
memset(pucch, 0, sizeof(*pucch));
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
@@ -1247,7 +1254,7 @@ int nr_acknack_scheduling(int mod_id,
}
}
LOG_D(NR_MAC,"pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
LOG_D(NR_MAC, "In %s: pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n", __FUNCTION__, frame, slot, pucch->frame, pucch->ul_slot, pucch->dai_c);
// this is hardcoded for now as ue specific only if we are not on the initialBWP (to be fixed to allow ue_Specific also on initialBWP
NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id];
@@ -1268,7 +1275,7 @@ int nr_acknack_scheduling(int mod_id,
int max_fb_time = 0;
get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, pdsch_to_harq_feedback);
LOG_D(NR_MAC,"pucch_acknak 1b. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
LOG_D(NR_MAC, "In %s: 1b. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
/* there is a HARQ. Check whether we can use it for this ACKNACK */
if (pucch->dai_c > 0) {
/* this UE already has a PUCCH occasion */
@@ -1278,7 +1285,8 @@ int nr_acknack_scheduling(int mod_id,
int diff = pucch->ul_slot - slot;
if (diff<0)
diff += n_slots_frame;
if (pdsch_to_harq_feedback[i] == diff)
if (pdsch_to_harq_feedback[i] == diff &&
pdsch_to_harq_feedback[i] >= minfbtime)
break;
++i;
}
@@ -1287,7 +1295,7 @@ int nr_acknack_scheduling(int mod_id,
const int f = pucch->frame;
const int s = pucch->ul_slot;
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI > 0, cannot reach timing for pucch in %d.%d, advancing slot by 1 and trying again\n",frame,slot,f,s);
LOG_D(NR_MAC, "In %s: %d.%d DAI > 0, cannot reach timing for pucch in %d.%d, advancing slot by 1 and trying again\n", __FUNCTION__, frame, slot, f, s);
nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
memset(pucch, 0, sizeof(*pucch));
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
@@ -1301,11 +1309,11 @@ int nr_acknack_scheduling(int mod_id,
pucch->timing_indicator = i;
pucch->dai_c++;
// retain old resource indicator, and we are good
LOG_D(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator);
LOG_D(NR_MAC, "In %s: %d.%d. DAI > 0, pucch allocated for %d.%d (index %d)\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator);
return 0;
}
LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI = 0, looking for new pucch occasion\n",frame,slot);
LOG_D(NR_MAC, "In %s: %d.%d DAI = 0, looking for new pucch occasion\n", __FUNCTION__, frame, slot);
/* we need to find a new PUCCH occasion */
/*(Re)Inizialization of timing information*/
@@ -1315,8 +1323,9 @@ int nr_acknack_scheduling(int mod_id,
AssertFatal(pucch->sr_flag + pucch->dai_c == 0,
"expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n",
UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot);
pucch->frame = frame;
pucch->ul_slot = first_ul_slot_tdd;
const int s = first_ul_slot_tdd;
pucch->frame = (s < n_slots_frame - 1) ? frame : (frame + 1) % 1024;
pucch->ul_slot = s % n_slots_frame;
}
// Find the right timing_indicator value.
@@ -1325,12 +1334,13 @@ int nr_acknack_scheduling(int mod_id,
while ((n_slots_frame + pucch->ul_slot - slot) % n_slots_frame <= max_fb_time) {
int i = 0;
while (i < 8) {
LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n",
LOG_D(NR_MAC, "In %s: pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", __FUNCTION__,
i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot);
int diff = pucch->ul_slot - slot;
if (diff<0)
diff += n_slots_frame;
if (pdsch_to_harq_feedback[i] == diff) {
if (pdsch_to_harq_feedback[i] == diff &&
pdsch_to_harq_feedback[i] >= minfbtime) {
ind_found = i;
break;
}
@@ -1393,7 +1403,7 @@ int nr_acknack_scheduling(int mod_id,
pucch->timing_indicator = ind_found; // index in the list of timing indicators
LOG_D(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator);
LOG_D(NR_MAC, "In %s: 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator);
pucch->dai_c++;
pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources
@@ -60,11 +60,23 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
/* there is a mixed slot only when in TDD */
NR_ServingCellConfigCommon_t *scc = nrmac->common_channels->ServingCellConfigCommon;
lte_frame_type_t frame_type = nrmac->common_channels->frame_type;
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
const NR_TDD_UL_DL_Pattern_t *tdd =
scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
/* Uplink symbols are at the end of the slot */
const int symb_ulMixed = tdd ? ((1 << tdd->nrofUplinkSymbols) - 1) << (14 - tdd->nrofUplinkSymbols) : 0;
int symb_ulMixed = 0;
int nr_mix_slots = 0;
int nr_slots_period = n;
if (tdd) {
symb_ulMixed = ((1 << tdd->nrofUplinkSymbols) - 1) << (14 - tdd->nrofUplinkSymbols);
nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
}
else
// if TDD configuration is not present and the band is not FDD, it means it is a dynamic TDD configuration
AssertFatal(nrmac->common_channels->frame_type == FDD,"Dynamic TDD not handled yet\n");
const struct NR_PUCCH_Config__resourceToAddModList *resList = ubwp->bwp_Dedicated->pucch_Config->choice.setup->resourceToAddModList;
// for the moment, just block any symbol that might hold a PUCCH, regardless
@@ -117,7 +129,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
// get largest time domain allocation (TDA) for UL slot and UL in mixed slot
int tdaMi = -1;
if(tdaList->list.count > 1) {
if (nr_mix_slots>0) {
const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1];
AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu),
"scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n",
@@ -139,27 +151,25 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
symb_tda_mi);
}
}
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const int n = slots_per_frame[*scc->ssbSubcarrierSpacing];
nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id]));
const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0;
const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n;
for (int slot = 0; slot < n; ++slot) {
const int sched_slot = (slot + k2) % n;
nrmac->preferred_ul_tda[bwp_id][slot] = -1;
if (!tdd || sched_slot % nr_slots_period >= tdd->nrofDownlinkSlots + nr_mix_slots)
if (frame_type == FDD || sched_slot % nr_slots_period >= tdd->nrofDownlinkSlots + nr_mix_slots)
nrmac->preferred_ul_tda[bwp_id][slot] = 0;
else if (tdd && nr_mix_slots && sched_slot % nr_slots_period == tdd->nrofDownlinkSlots)
else if (nr_mix_slots && sched_slot % nr_slots_period == tdd->nrofDownlinkSlots)
nrmac->preferred_ul_tda[bwp_id][slot] = tdaMi;
LOG_D(MAC, "DL slot %d UL slot %d preferred_ul_tda %d\n", slot, sched_slot, nrmac->preferred_ul_tda[bwp_id][slot]);
}
if (k2 < tdd->nrofUplinkSlots)
if (tdd && k2 < tdd->nrofUplinkSlots) {
LOG_W(NR_MAC,
"k2 %d < tdd->nrofUplinkSlots %ld: not all UL slots can be scheduled\n",
k2,
tdd->nrofUplinkSlots);
}
}
// For both UL-SCH except:
@@ -903,8 +913,7 @@ long get_K2(NR_ServingCellConfigCommon_t *scc,NR_BWP_Uplink_t *ubwp, int time_do
bool nr_UE_is_to_be_scheduled(module_id_t mod_id, int CC_id, int UE_id, frame_t frame, sub_frame_t slot)
{
const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon;
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const int n = slots_per_frame[*scc->ssbSubcarrierSpacing];
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int now = frame * n + slot;
const struct gNB_MAC_INST_s *nrmac = RC.nrmac[mod_id];
@@ -1401,13 +1410,27 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot))
return false;
bool is_mixed_slot = is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[sched_slot / 64], sched_slot) &&
is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot);
bool is_mixed_slot = false;
const NR_TDD_UL_DL_Pattern_t *tdd =
scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
if (tdd)
is_mixed_slot = is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[sched_slot / 64], sched_slot) &&
is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot);
// FIXME: Avoid mixed slots for initialUplinkBWP
if (sched_ctrl->active_ubwp==NULL && is_mixed_slot)
return false;
// Avoid slots with the SRS
const NR_list_t *UE_list = &UE_info->list;
for (int UE_idx = UE_list->head; UE_idx >= 0; UE_idx = UE_list->next[UE_idx]) {
NR_sched_srs_t sched_srs = UE_info->UE_sched_ctrl[UE_idx].sched_srs;
if(sched_srs.srs_scheduled && sched_srs.frame==sched_frame && sched_srs.slot==sched_slot) {
return false;
}
}
sched_ctrl->sched_pusch.slot = sched_slot;
sched_ctrl->sched_pusch.frame = sched_frame;
for (UE_id = UE_info->list.next[UE_id]; UE_id >= 0; UE_id = UE_info->list.next[UE_id]) {
@@ -1649,7 +1672,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
future_ul_tti_req->n_pdus += 1;
LOG_D(NR_MAC, "%4d.%2d Scheduling UE specific PUSCH for sched %d.%d, ul_tto_req %d.%d\n", frame, slot,
LOG_D(NR_MAC, "%4d.%2d Scheduling UE specific PUSCH for sched %d.%d, ul_tti_req %d.%d\n", frame, slot,
sched_pusch->frame,sched_pusch->slot,future_ul_tti_req->SFN,future_ul_tti_req->Slot);
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
+5 -2
View File
@@ -50,10 +50,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int pdsch_AntennaPorts,
int pusch_AntennaPorts,
int sib1_tda,
int minRXTXTIMEpdsch,
NR_ServingCellConfigCommon_t *scc,
NR_BCCH_BCH_Message_t *mib,
int add_ue,
uint32_t rnti,
int add_ue,
uint32_t rnti,
NR_CellGroupConfig_t *CellGroup);
void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
@@ -190,6 +191,8 @@ void nr_schedule_pucch(int Mod_idP,
frame_t frameP,
sub_frame_t slotP);
void nr_schedule_srs(int module_id, frame_t frame);
void nr_csirs_scheduling(int Mod_idP,
frame_t frame,
sub_frame_t slot,
+11 -1
View File
@@ -378,6 +378,12 @@ typedef struct NR_sched_pusch {
int time_domain_allocation;
} NR_sched_pusch_t;
typedef struct NR_sched_srs {
int frame;
int slot;
bool srs_scheduled;
} NR_sched_srs_t;
/* PDSCH semi-static configuratio: as long as the TDA/DMRS/mcsTable remains the
* same, there is no need to recalculate all S/L or DMRS-related parameters
* over and over again. Hence, we store them in this struct for easy
@@ -565,9 +571,12 @@ typedef struct {
/// PUSCH semi-static configuration: is not cleared across TTIs
NR_pusch_semi_static_t pusch_semi_static;
/// Sched PDSCH: scheduling decisions, copied into HARQ and cleared every TTI
/// Sched PUSCH: scheduling decisions, copied into HARQ and cleared every TTI
NR_sched_pusch_t sched_pusch;
/// Sched SRS: scheduling decisions
NR_sched_srs_t sched_srs;
/// uplink bytes that are currently scheduled
int sched_ul_bytes;
/// estimation of the UL buffer size
@@ -708,6 +717,7 @@ typedef struct gNB_MAC_INST_s {
int ssb_SubcarrierOffset;
/// SIB1 Time domain allocation
int sib1_tda;
int minRXTXTIMEpdsch;
/// Common cell resources
NR_COMMON_channels_t common_channels[NFAPI_CC_MAX];
/// current PDU index (BCH,DLSCH)
+1 -1
View File
@@ -4293,7 +4293,7 @@ ssize_t do_nrMeasurementReport(uint8_t *buffer,
LTE_MeasResultListEUTRA_t *measResultListEUTRA2=&measResultNeighCells->choice.measResultListEUTRA;
asn1cSequenceAdd(measResultListEUTRA2->list, struct LTE_MeasResultEUTRA, measresulteutra_list);
measresulteutra_list->physCellId = phy_id;
asn1cCalloc(measresulteutra_list->cgi_Info, measresult_cgi2);
//asn1cCalloc(measresulteutra_list->cgi_Info, measresult_cgi2);
//measresult_cgi2->cellGlobalId= {0};
//measresult_cgi2->trackingAreaCode= {0};
struct LTE_MeasResultEUTRA__measResult* measResult= &measresulteutra_list->measResult;
+9 -9
View File
@@ -325,7 +325,15 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
NR_ServingCellConfigCommon_t *scc=RC.nrrrc[module_idP]->carrier.servingcellconfigcommon;
memset(&cellGroupConfig,0,sizeof(cellGroupConfig));
fill_initial_cellGroupConfig(rntiP,&cellGroupConfig,scc,&RC.nrrrc[module_idP]->carrier);
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_allocate_new_UE_context(RC.nrrrc[module_idP]);
ue_context_p->ue_id_rnti = rntiP;
ue_context_p->ue_context.rnti = rntiP;
ue_context_p->ue_context.random_ue_identity = rntiP;
ue_context_p->ue_context.Srb0.Active = 1;
RB_INSERT(rrc_nr_ue_tree_s, &RC.nrrrc[module_idP]->rrc_ue_head, ue_context_p);
fill_initial_cellGroupConfig(ue_context_p->local_uid,&cellGroupConfig,scc,&RC.nrrrc[module_idP]->carrier);
MessageDef* tmp=itti_alloc_new_message_sized(TASK_RRC_GNB, 0, F1AP_INITIAL_UL_RRC_MESSAGE, sizeof(f1ap_initial_ul_rrc_message_t) + sdu_lenP);
f1ap_initial_ul_rrc_message_t *msg = &F1AP_INITIAL_UL_RRC_MESSAGE(tmp);
@@ -346,14 +354,6 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
memcpy(msg->rrc_container, sduP, sdu_lenP);
msg->rrc_container_length=sdu_lenP;
itti_send_msg_to_task(TASK_DU_F1, 0, tmp);
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_allocate_new_UE_context(RC.nrrrc[module_idP]);
ue_context_p->ue_id_rnti = rntiP;
ue_context_p->ue_context.rnti = rntiP;
ue_context_p->ue_context.random_ue_identity = rntiP;
ue_context_p->ue_context.Srb0.Active = 1;
RB_INSERT(rrc_nr_ue_tree_s, &RC.nrrrc[module_idP]->rrc_ue_head, ue_context_p);
return(0);
}
+80 -25
View File
@@ -39,6 +39,7 @@
#include <asn_application.h>
#include <asn_internal.h> /* for _ASN_DEFAULT_STACK_MAX */
#include <per_encoder.h>
#include <nr/nr_common.h>
#include "asn1_msg.h"
#include "../nr_rrc_proto.h"
@@ -598,10 +599,12 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
}
ServCellCom->ssb_PeriodicityServingCell = *configuration->scc->ssb_periodicityServingCell;
ServCellCom->tdd_UL_DL_ConfigurationCommon = CALLOC(1,sizeof(struct NR_TDD_UL_DL_ConfigCommon));
ServCellCom->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing = configuration->scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing;
ServCellCom->tdd_UL_DL_ConfigurationCommon->pattern1 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern1;
ServCellCom->tdd_UL_DL_ConfigurationCommon->pattern2 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern2;
if (configuration->scc->tdd_UL_DL_ConfigurationCommon) {
ServCellCom->tdd_UL_DL_ConfigurationCommon = CALLOC(1,sizeof(struct NR_TDD_UL_DL_ConfigCommon));
ServCellCom->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing = configuration->scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing;
ServCellCom->tdd_UL_DL_ConfigurationCommon->pattern1 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern1;
ServCellCom->tdd_UL_DL_ConfigurationCommon->pattern2 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern2;
}
ServCellCom->ss_PBCH_BlockPower = configuration->scc->ss_PBCH_BlockPower;
// ims-EmergencySupport
@@ -976,10 +979,41 @@ uint8_t do_RRCReject(uint8_t Mod_id,
return((enc_rval.encoded+7)/8);
}
void fill_initial_SpCellConfig(rnti_t rnti,
// TODO: Implement to b_SRS = 1 and b_SRS = 2
long rrc_get_max_nr_csrs(uint8_t max_rbs, long b_SRS) {
if(b_SRS>0) {
LOG_E(NR_RRC,"rrc_get_max_nr_csrs(): Not implemented yet for b_SRS>0\n");
return 0; // This c_srs is always valid
}
const uint16_t m_SRS[64] = { 4, 8, 12, 16, 16, 20, 24, 24, 28, 32, 36, 40, 48, 48, 52, 56, 60, 64, 72, 72, 76, 80, 88,
96, 96, 104, 112, 120, 120, 120, 128, 128, 128, 132, 136, 144, 144, 144, 144, 152, 160,
160, 160, 168, 176, 184, 192, 192, 192, 192, 208, 216, 224, 240, 240, 240, 240, 256, 256,
256, 264, 272, 272, 272 };
long c_srs = 0;
uint16_t m = 4;
for(int c = 1; c<64; c++) {
if(m_SRS[c]>m && m_SRS[c]<max_rbs) {
c_srs = c;
m = m_SRS[c];
}
}
return c_srs;
}
void fill_initial_SpCellConfig(int uid,
NR_SpCellConfig_t *SpCellConfig,
NR_ServingCellConfigCommon_t *scc,
rrc_gNB_carrier_data_t *carrier) {
// This assert will never happen in the current implementation because NUMBER_OF_UE_MAX = 4.
// However, if in the future NUMBER_OF_UE_MAX is increased, it will be necessary to improve the allocation of SRS resources,
// where the startPosition = 2 or 3 and sl160 = 17, 17, 27 ... 157 only give us 30 different allocations.
AssertFatal(uid>=0 && uid<30, "gNB cannot allocate the SRS resources\n");
int curr_bwp = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,MAX_BWP_SIZE);
SpCellConfig->servCellIndex = NULL;
SpCellConfig->reconfigurationWithSync = NULL;
@@ -1009,9 +1043,8 @@ void fill_initial_SpCellConfig(rnti_t rnti,
// one symbol (13)
NR_PUCCH_Resource_t *pucchres0=calloc(1,sizeof(*pucchres0));
pucchres0->pucch_ResourceId=0;
//pucchres0->startingPRB=0;
pucchres0->startingPRB=(8+rnti) % curr_bwp;
LOG_D(NR_RRC, "pucchres0->startPRB %ld rnti %d curr_bwp %d\n", pucchres0->startingPRB, rnti, curr_bwp);
pucchres0->startingPRB=(8+uid) % curr_bwp;
LOG_D(NR_RRC, "pucchres0->startPRB %ld uid %d curr_bwp %d\n", pucchres0->startingPRB, uid, curr_bwp);
pucchres0->intraSlotFrequencyHopping=NULL;
pucchres0->secondHopPRB=NULL;
pucchres0->format.present= NR_PUCCH_Resource__format_PR_format0;
@@ -1058,7 +1091,7 @@ void fill_initial_SpCellConfig(rnti_t rnti,
pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList = calloc(1,sizeof(*pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList));
NR_PUSCH_PathlossReferenceRS_t *plrefRS = calloc(1,sizeof(*plrefRS));
plrefRS->pusch_PathlossReferenceRS_Id=0;
plrefRS->referenceSignal.present = NR_PathlossReferenceRS_Config_PR_ssb_Index;
plrefRS->referenceSignal.present = NR_PUSCH_PathlossReferenceRS__referenceSignal_PR_ssb_Index;
plrefRS->referenceSignal.choice.ssb_Index = 0;
ASN_SEQUENCE_ADD(&pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList->list,plrefRS);
pusch_Config->pusch_PowerControl->pathlossReferenceRSToReleaseList = NULL;
@@ -1105,13 +1138,21 @@ void fill_initial_SpCellConfig(rnti_t rnti,
*srs_resset0_id=0;
ASN_SEQUENCE_ADD(&srs_resset0->srs_ResourceIdList->list,srs_resset0_id);
srs_Config->srs_ResourceToReleaseList=NULL;
srs_resset0->resourceType.present = NR_SRS_ResourceSet__resourceType_PR_aperiodic;
srs_resset0->resourceType.choice.aperiodic = calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic));
srs_resset0->resourceType.choice.aperiodic->aperiodicSRS_ResourceTrigger=1;
srs_resset0->resourceType.choice.aperiodic->csi_RS=NULL;
srs_resset0->resourceType.choice.aperiodic->slotOffset= calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic->slotOffset));
*srs_resset0->resourceType.choice.aperiodic->slotOffset=2;
srs_resset0->resourceType.choice.aperiodic->ext1=NULL;
if(carrier->do_SRS) {
srs_resset0->resourceType.present = NR_SRS_ResourceSet__resourceType_PR_periodic;
srs_resset0->resourceType.choice.periodic = calloc(1,sizeof(*srs_resset0->resourceType.choice.periodic));
srs_resset0->resourceType.choice.periodic->associatedCSI_RS = NULL;
} else {
srs_resset0->resourceType.present = NR_SRS_ResourceSet__resourceType_PR_aperiodic;
srs_resset0->resourceType.choice.aperiodic = calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic));
srs_resset0->resourceType.choice.aperiodic->aperiodicSRS_ResourceTrigger=1;
srs_resset0->resourceType.choice.aperiodic->csi_RS=NULL;
srs_resset0->resourceType.choice.aperiodic->slotOffset= calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic->slotOffset));
*srs_resset0->resourceType.choice.aperiodic->slotOffset=2;
srs_resset0->resourceType.choice.aperiodic->ext1=NULL;
}
srs_resset0->usage=NR_SRS_ResourceSet__usage_codebook;
srs_resset0->alpha = calloc(1,sizeof(*srs_resset0->alpha));
*srs_resset0->alpha = NR_Alpha_alpha1;
@@ -1130,17 +1171,28 @@ void fill_initial_SpCellConfig(rnti_t rnti,
srs_res0->transmissionComb.choice.n2=calloc(1,sizeof(*srs_res0->transmissionComb.choice.n2));
srs_res0->transmissionComb.choice.n2->combOffset_n2=0;
srs_res0->transmissionComb.choice.n2->cyclicShift_n2=0;
srs_res0->resourceMapping.startPosition=2;
srs_res0->resourceMapping.startPosition = 2 + uid%2;
srs_res0->resourceMapping.nrofSymbols=NR_SRS_Resource__resourceMapping__nrofSymbols_n1;
srs_res0->resourceMapping.repetitionFactor=NR_SRS_Resource__resourceMapping__repetitionFactor_n1;
srs_res0->freqDomainPosition=0;
srs_res0->freqDomainShift=0;
srs_res0->freqHopping.c_SRS = 0;
srs_res0->freqHopping.b_SRS=0;
srs_res0->freqHopping.b_hop=0;
srs_res0->freqHopping.c_SRS = rrc_get_max_nr_csrs(
NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, 275),
srs_res0->freqHopping.b_SRS);
srs_res0->groupOrSequenceHopping=NR_SRS_Resource__groupOrSequenceHopping_neither;
srs_res0->resourceType.present= NR_SRS_Resource__resourceType_PR_aperiodic;
srs_res0->resourceType.choice.aperiodic=calloc(1,sizeof(*srs_res0->resourceType.choice.aperiodic));
if(carrier->do_SRS) {
srs_res0->resourceType.present= NR_SRS_Resource__resourceType_PR_periodic;
srs_res0->resourceType.choice.periodic=calloc(1,sizeof(*srs_res0->resourceType.choice.periodic));
srs_res0->resourceType.choice.periodic->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl160;
srs_res0->resourceType.choice.periodic->periodicityAndOffset_p.choice.sl160 = 17 + (uid>1)*10; // 17/17/.../147/157 are mixed slots
} else {
srs_res0->resourceType.present= NR_SRS_Resource__resourceType_PR_aperiodic;
srs_res0->resourceType.choice.aperiodic=calloc(1,sizeof(*srs_res0->resourceType.choice.aperiodic));
}
srs_res0->sequenceId=40;
srs_res0->spatialRelationInfo=calloc(1,sizeof(*srs_res0->spatialRelationInfo));
srs_res0->spatialRelationInfo->servingCellId=NULL;
@@ -1162,8 +1214,11 @@ void fill_initial_SpCellConfig(rnti_t rnti,
// Check for above configuration and exit for now if it is not the case
AssertFatal(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing==NR_SubcarrierSpacing_kHz30,
"SCS != 30kHz\n");
AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity==NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5,
"TDD period != 5ms : %ld\n",scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
if (scc->tdd_UL_DL_ConfigurationCommon) {
AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity == NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5,
"TDD period != 5ms : %ld\n", scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
}
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl40 = 8;
schedulingRequestResourceConfig->resource = calloc(1,sizeof(*schedulingRequestResourceConfig->resource));
@@ -1396,7 +1451,7 @@ void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGr
ASN_SEQUENCE_ADD(&ue_context_mastercellGroup->rlc_BearerToAddModList->list, rlc_BearerConfig_drb);
}
void fill_initial_cellGroupConfig(rnti_t rnti,
void fill_initial_cellGroupConfig(int uid,
NR_CellGroupConfig_t *cellGroupConfig,
NR_ServingCellConfigCommon_t *scc,
rrc_gNB_carrier_data_t *carrier) {
@@ -1490,7 +1545,7 @@ void fill_initial_cellGroupConfig(rnti_t rnti,
cellGroupConfig->spCellConfig = calloc(1,sizeof(*cellGroupConfig->spCellConfig));
fill_initial_SpCellConfig(rnti,cellGroupConfig->spCellConfig,scc,carrier);
fill_initial_SpCellConfig(uid,cellGroupConfig->spCellConfig,scc,carrier);
cellGroupConfig->sCellToAddModList = NULL;
cellGroupConfig->sCellToReleaseList = NULL;
@@ -1569,7 +1624,7 @@ uint8_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
}
else {
cellGroupConfig = calloc(1, sizeof(NR_CellGroupConfig_t));
fill_initial_cellGroupConfig(ue_context_pP->ue_context.rnti,cellGroupConfig,scc,carrier);
fill_initial_cellGroupConfig(ue_context_pP->local_uid,cellGroupConfig,scc,carrier);
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CellGroupConfig,
NULL,
+2 -2
View File
@@ -100,12 +100,12 @@ void do_SpCellConfig(gNB_RRC_INST *rrc,
uint8_t do_RRCReject(uint8_t Mod_id,
uint8_t *const buffer);
void fill_initial_SpCellConfig(rnti_t rnti,
void fill_initial_SpCellConfig(int uid,
NR_SpCellConfig_t *SpCellConfig,
NR_ServingCellConfigCommon_t *scc,
rrc_gNB_carrier_data_t *carrier);
void fill_initial_cellGroupConfig(rnti_t rnti,
void fill_initial_cellGroupConfig(int uid,
NR_CellGroupConfig_t *cellGroupConfig,
NR_ServingCellConfigCommon_t *scc,
rrc_gNB_carrier_data_t *carrier);
+1
View File
@@ -451,6 +451,7 @@ typedef struct {
int pusch_AntennaPorts;
int minRXTXTIME;
int do_CSIRS;
int do_SRS;
NR_BCCH_DL_SCH_Message_t *siblock1;
NR_ServingCellConfigCommon_t *servingcellconfigcommon;
NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1;
+2
View File
@@ -81,6 +81,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
int dl_antenna_ports,
int minRXTXTIMEpdsch,
int do_csirs,
int do_srs,
int initial_csi_index,
int uid);
@@ -93,6 +94,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
int dl_antenna_ports,
int minRXTXTIMEpdsch,
int do_csirs,
int do_srs,
int initial_csi_index,
int uid);
+5
View File
@@ -187,6 +187,7 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
rrc->carrier.minRXTXTIME,
(NR_ServingCellConfigCommon_t *)rrc->carrier.servingcellconfigcommon,
&rrc->carrier.mib,
0,
@@ -239,6 +240,7 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu
rrc->carrier.minRXTXTIME = configuration->minRXTXTIME;
rrc->carrier.sib1_tda = configuration->sib1_tda;
rrc->carrier.do_CSIRS = configuration->do_CSIRS;
rrc->carrier.do_SRS = configuration->do_SRS;
nr_rrc_config_ul_tda(configuration->scc,configuration->minRXTXTIME);
/// System Information INIT
pthread_mutex_init(&rrc->cell_info_mutex,NULL);
@@ -299,6 +301,7 @@ void apply_macrlc_config(gNB_RRC_INST *rrc,
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
rrc->carrier.minRXTXTIME,
NULL,
NULL,
0,
@@ -492,6 +495,7 @@ rrc_gNB_generate_RRCSetup_for_RRCReestablishmentRequest(
rrc_instance_p->carrier.pdsch_AntennaPorts,
rrc_instance_p->carrier.pusch_AntennaPorts,
rrc_instance_p->carrier.sib1_tda,
rrc_instance_p->carrier.minRXTXTIME,
(NR_ServingCellConfigCommon_t *)rrc_instance_p->carrier.servingcellconfigcommon,
&rrc_instance_p->carrier.mib,
0,
@@ -1257,6 +1261,7 @@ rrc_gNB_process_RRCReconfigurationComplete(
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
rrc->carrier.minRXTXTIME,
NULL,
NULL,
0,
+20 -16
View File
@@ -263,24 +263,26 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
}
if (ue_context_p->ue_context.spCellConfig) {
fill_default_reconfig(carrier->servingcellconfigcommon,
ue_context_p->ue_context.spCellConfig->spCellConfigDedicated,
reconfig_ies,
ue_context_p->ue_context.secondaryCellGroup,
carrier->pdsch_AntennaPorts,
carrier->minRXTXTIME,
carrier->do_CSIRS,
carrier->initial_csi_index[ue_context_p->local_uid + 1],
ue_context_p->local_uid);
ue_context_p->ue_context.spCellConfig->spCellConfigDedicated,
reconfig_ies,
ue_context_p->ue_context.secondaryCellGroup,
carrier->pdsch_AntennaPorts,
carrier->minRXTXTIME,
carrier->do_CSIRS,
carrier->do_SRS,
carrier->initial_csi_index[ue_context_p->local_uid + 1],
ue_context_p->local_uid);
} else {
fill_default_reconfig(carrier->servingcellconfigcommon,
NULL,
reconfig_ies,
ue_context_p->ue_context.secondaryCellGroup,
carrier->pdsch_AntennaPorts,
carrier->minRXTXTIME,
carrier->do_CSIRS,
carrier->initial_csi_index[ue_context_p->local_uid + 1],
ue_context_p->local_uid);
NULL,
reconfig_ies,
ue_context_p->ue_context.secondaryCellGroup,
carrier->pdsch_AntennaPorts,
carrier->minRXTXTIME,
carrier->do_CSIRS,
carrier->do_SRS,
carrier->initial_csi_index[ue_context_p->local_uid + 1],
ue_context_p->local_uid);
}
ue_context_p->ue_id_rnti = ue_context_p->ue_context.secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity;
NR_CG_Config_t *CG_Config = calloc(1,sizeof(*CG_Config));
@@ -382,6 +384,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
rrc->carrier.minRXTXTIME,
rrc->carrier.servingcellconfigcommon,
&rrc->carrier.mib,
1, // add_ue flag
@@ -393,6 +396,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
rrc->carrier.pdsch_AntennaPorts,
rrc->carrier.pusch_AntennaPorts,
rrc->carrier.sib1_tda,
rrc->carrier.minRXTXTIME,
NULL,
NULL,
1, // add_ue flag
+38 -13
View File
@@ -57,11 +57,17 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
int dl_antenna_ports,
int minRXTXTIME,
int do_csirs,
int do_srs,
int initial_csi_index,
int uid) {
AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n");
AssertFatal(secondaryCellGroup!=NULL,"secondaryCellGroup is null\n");
// This assert will never happen in the current implementation because NUMBER_OF_UE_MAX = 4.
// However, if in the future NUMBER_OF_UE_MAX is increased, it will be necessary to improve the allocation of SRS resources,
// where the startPosition = 2 or 3 and sl160 = 17, 17, 27 ... 157 only give us 30 different allocations.
AssertFatal(uid>=0 && uid<30, "gNB cannot allocate the SRS resources\n");
uint64_t bitmap=0;
switch (servingcellconfigcommon->ssb_PositionsInBurst->present) {
case 1 :
@@ -797,13 +803,21 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
*srs_resset0_id=0;
ASN_SEQUENCE_ADD(&srs_resset0->srs_ResourceIdList->list,srs_resset0_id);
srs_Config->srs_ResourceToReleaseList=NULL;
srs_resset0->resourceType.present = NR_SRS_ResourceSet__resourceType_PR_aperiodic;
srs_resset0->resourceType.choice.aperiodic = calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic));
srs_resset0->resourceType.choice.aperiodic->aperiodicSRS_ResourceTrigger=1;
srs_resset0->resourceType.choice.aperiodic->csi_RS=NULL;
srs_resset0->resourceType.choice.aperiodic->slotOffset= calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic->slotOffset));
*srs_resset0->resourceType.choice.aperiodic->slotOffset=2;
srs_resset0->resourceType.choice.aperiodic->ext1=NULL;
if(do_srs) {
srs_resset0->resourceType.present = NR_SRS_ResourceSet__resourceType_PR_periodic;
srs_resset0->resourceType.choice.periodic = calloc(1,sizeof(*srs_resset0->resourceType.choice.periodic));
srs_resset0->resourceType.choice.periodic->associatedCSI_RS = NULL;
} else {
srs_resset0->resourceType.present = NR_SRS_ResourceSet__resourceType_PR_aperiodic;
srs_resset0->resourceType.choice.aperiodic = calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic));
srs_resset0->resourceType.choice.aperiodic->aperiodicSRS_ResourceTrigger=1;
srs_resset0->resourceType.choice.aperiodic->csi_RS=NULL;
srs_resset0->resourceType.choice.aperiodic->slotOffset= calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic->slotOffset));
*srs_resset0->resourceType.choice.aperiodic->slotOffset=2;
srs_resset0->resourceType.choice.aperiodic->ext1=NULL;
}
srs_resset0->usage=NR_SRS_ResourceSet__usage_codebook;
srs_resset0->alpha = calloc(1,sizeof(*srs_resset0->alpha));
*srs_resset0->alpha = NR_Alpha_alpha1;
@@ -822,17 +836,28 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
srs_res0->transmissionComb.choice.n2=calloc(1,sizeof(*srs_res0->transmissionComb.choice.n2));
srs_res0->transmissionComb.choice.n2->combOffset_n2=0;
srs_res0->transmissionComb.choice.n2->cyclicShift_n2=0;
srs_res0->resourceMapping.startPosition=2;
srs_res0->resourceMapping.startPosition = 2 + uid%2;
srs_res0->resourceMapping.nrofSymbols=NR_SRS_Resource__resourceMapping__nrofSymbols_n1;
srs_res0->resourceMapping.repetitionFactor=NR_SRS_Resource__resourceMapping__repetitionFactor_n1;
srs_res0->freqDomainPosition=0;
srs_res0->freqDomainShift=0;
srs_res0->freqHopping.c_SRS = 0;
srs_res0->freqHopping.b_SRS=0;
srs_res0->freqHopping.b_hop=0;
srs_res0->freqHopping.c_SRS = rrc_get_max_nr_csrs(
NRRIV2BW(servingcellconfigcommon->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, 275),
srs_res0->freqHopping.b_SRS);
srs_res0->groupOrSequenceHopping=NR_SRS_Resource__groupOrSequenceHopping_neither;
srs_res0->resourceType.present= NR_SRS_Resource__resourceType_PR_aperiodic;
srs_res0->resourceType.choice.aperiodic=calloc(1,sizeof(*srs_res0->resourceType.choice.aperiodic));
if(do_srs) {
srs_res0->resourceType.present= NR_SRS_Resource__resourceType_PR_periodic;
srs_res0->resourceType.choice.periodic=calloc(1,sizeof(*srs_res0->resourceType.choice.periodic));
srs_res0->resourceType.choice.periodic->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl160;
srs_res0->resourceType.choice.periodic->periodicityAndOffset_p.choice.sl160 = 17 + (uid>1)*10; // 17/17/.../147/157 are mixed slots
} else {
srs_res0->resourceType.present= NR_SRS_Resource__resourceType_PR_aperiodic;
srs_res0->resourceType.choice.aperiodic=calloc(1,sizeof(*srs_res0->resourceType.choice.aperiodic));
}
srs_res0->sequenceId=40;
srs_res0->spatialRelationInfo=calloc(1,sizeof(*srs_res0->spatialRelationInfo));
srs_res0->spatialRelationInfo->servingCellId=NULL;
@@ -889,9 +914,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
pucch_Config->resourceToAddModList = calloc(1,sizeof(*pucch_Config->resourceToAddModList));
pucch_Config->resourceToReleaseList = NULL;
NR_PUCCH_Resource_t *pucchres0=calloc(1,sizeof(*pucchres0));
NR_PUCCH_Resource_t *pucchres1=calloc(1,sizeof(*pucchres1));
NR_PUCCH_Resource_t *pucchres2=calloc(1,sizeof(*pucchres2));
NR_PUCCH_Resource_t *pucchres3=calloc(1,sizeof(*pucchres3));
pucchres0->pucch_ResourceId=1;
pucchres0->startingPRB= (8 + uid) % curr_bwp;
@@ -1351,6 +1374,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
int dl_antenna_ports,
int minRXTXTIME,
int do_csirs,
int do_srs,
int initial_csi_index,
int uid) {
AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n");
@@ -1367,6 +1391,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
dl_antenna_ports,
minRXTXTIME,
do_csirs,
do_srs,
initial_csi_index,
uid);