From 3c753aec7150267f46a0d781cc710e1a1fbf3855 Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 23 May 2022 18:41:10 +0200 Subject: [PATCH] fix in calling get_ul_tda --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 19 +++++++++++++------ .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 18 ++++++++++-------- 2 files changed, 23 insertions(+), 14 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 47775aaf05..8cca07a51a 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -436,18 +436,25 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - const int tda = get_ul_tda(nr_mac, scc, slot); - if (tda < 0) - return false; const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + const int temp_tda = get_ul_tda(nr_mac, scc, slot); + if (temp_tda < 0) + return false; + AssertFatal(temp_tda < tdaList->list.count, + "time domain assignment %d >= %d\n", + temp_tda, + tdaList->list.count); + int K2 = get_K2(scc,NULL,sched_ctrl->active_ubwp, temp_tda, mu); + const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]); + const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; + const int tda = get_ul_tda(nr_mac, scc, sched_slot); + if (tda < 0) + return false; AssertFatal(tda < tdaList->list.count, "time domain assignment %d >= %d\n", tda, tdaList->list.count); - int K2 = get_K2(scc,NULL,sched_ctrl->active_ubwp, tda, mu); - const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]); - const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; /* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE * limitations). Note that if K2 or the TDD configuration is changed, below * conditions might exclude each other and never be true */ diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 92823afa9b..e22f84272f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -54,7 +54,7 @@ const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon if (tdd && tdd->nrofUplinkSymbols > 1) { // if there is uplink symbols in mixed slot const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + 1; - if ((slot%nr_slots_period) == tdd->nrofUplinkSlots) + if ((slot%nr_slots_period) == tdd->nrofDownlinkSlots) return 1; } return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) @@ -860,7 +860,7 @@ bool allocate_ul_retransmission(module_id_t module_id, const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE); const uint8_t nrOfLayers = 1; const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_bwp || ubwpd) ? 1 : 2; - const int tda = get_ul_tda(nr_mac, scc, slot); + const int tda = get_ul_tda(nr_mac, scc, retInfo->slot); LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda); LOG_D(NR_MAC,"num_dmrs_cdm_grps_no_data %d, tbs %d\n",num_dmrs_cdm_grps_no_data, retInfo->tb_size); if (tda == retInfo->time_domain_allocation) { @@ -1129,7 +1129,7 @@ void pf_ul(module_id_t module_id, const uint8_t nrOfLayers = 1; const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2; int dci_format = get_dci_format(sched_ctrl); - const int tda = get_ul_tda(nrmac, scc, slot); + const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot); if (ps->time_domain_allocation != tda || ps->dci_format != dci_format || ps->nrOfLayers != nrOfLayers @@ -1269,7 +1269,7 @@ void pf_ul(module_id_t module_id, const uint8_t nrOfLayers = 1; const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2; int dci_format = get_dci_format(sched_ctrl); - const int tda = get_ul_tda(nrmac, scc, slot); + const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot); if (ps->time_domain_allocation != tda || ps->dci_format != dci_format || ps->nrOfLayers != nrOfLayers @@ -1362,12 +1362,14 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t * schedule now (slot + k2 is not UL slot) */ int UE_id = UE_info->list.head; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; - const int tda = get_ul_tda(nr_mac, scc, slot); - if (tda < 0) - return false; - int K2 = get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, tda, mu); + const int temp_tda = get_ul_tda(nr_mac, scc, slot); + int K2 = get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, temp_tda, mu); const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; + const int tda = get_ul_tda(nr_mac, scc, sched_slot); + if (tda < 0) + return false; + DevAssert(K2 == get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, tda, mu)); if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) return false;