symbol-wise vrb map occupation for dl
This commit is contained in:
@@ -1144,13 +1144,19 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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BWPSize = type0_PDCCH_CSS_config->num_rbs;
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BWPSize = type0_PDCCH_CSS_config->num_rbs;
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}
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}
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// Calculate number of symbols
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int startSymbolIndex, nrOfSymbols;
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const int startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength;
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n");
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coreset = get_coreset(module_idP, scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common);
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coreset = get_coreset(module_idP, scc, bwp, ss, NR_SearchSpace__searchSpaceType_PR_common);
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AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg2\n");
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AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg2\n");
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uint16_t *vrb_map = cc[CC_id].vrb_map;
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uint16_t *vrb_map = cc[CC_id].vrb_map;
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for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) {
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for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) {
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if (vrb_map[BWPStart + rbStart + i]) {
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if (vrb_map[BWPStart + rbStart + i]&(((1<<nrOfSymbols)-1)<<startSymbolIndex)) {
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rbStart += i;
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rbStart += i;
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i = 0;
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i = 0;
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}
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}
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@@ -1182,12 +1188,6 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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return;
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return;
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}
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}
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// Calculate number of symbols
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int startSymbolIndex, nrOfSymbols;
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const int startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength;
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n");
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LOG_D(NR_MAC,"Msg2 startSymbolIndex.nrOfSymbols %d.%d\n",startSymbolIndex,nrOfSymbols);
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LOG_D(NR_MAC,"Msg2 startSymbolIndex.nrOfSymbols %d.%d\n",startSymbolIndex,nrOfSymbols);
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int mappingtype = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType;
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int mappingtype = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType;
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@@ -1362,9 +1362,9 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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nr_mac->TX_req[CC_id].Number_of_PDUs++;
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nr_mac->TX_req[CC_id].Number_of_PDUs++;
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nr_mac->TX_req[CC_id].Slot = slotP;
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nr_mac->TX_req[CC_id].Slot = slotP;
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// Mark the corresponding RBs as used
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// Mark the corresponding symbols RBs as used
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for (int rb = 0; rb < rbSize; rb++) {
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for (int rb = 0; rb < rbSize; rb++) {
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vrb_map[BWPStart + rb + rbStart] = 1;
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vrb_map[BWPStart + rb + rbStart] = ((1<<nrOfSymbols)-1)<<startSymbolIndex;
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}
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}
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ra->state = WAIT_Msg3;
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ra->state = WAIT_Msg3;
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@@ -1547,7 +1547,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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int i = 0;
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int i = 0;
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while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) {
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while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) {
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if (vrb_map[BWPStart + rbStart + i]) {
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if (vrb_map[BWPStart + rbStart + i]&(((1<<nrOfSymbols)-1)<<startSymbolIndex)) {
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rbStart += i+1;
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rbStart += i+1;
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i = 0;
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i = 0;
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} else {
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} else {
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@@ -1721,9 +1721,9 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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nr_mac->TX_req[CC_id].Number_of_PDUs++;
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nr_mac->TX_req[CC_id].Number_of_PDUs++;
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nr_mac->TX_req[CC_id].Slot = slotP;
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nr_mac->TX_req[CC_id].Slot = slotP;
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// Mark the corresponding RBs as used
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// Mark the corresponding symbols and RBs as used
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for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) {
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for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) {
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vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] = 1;
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vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] = ((1<<nrOfSymbols)-1)<<startSymbolIndex;
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}
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}
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LOG_D(NR_MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
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LOG_D(NR_MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
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@@ -384,7 +384,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
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int rbSize = 0;
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int rbSize = 0;
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uint32_t TBS = 0;
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uint32_t TBS = 0;
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do {
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do {
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if(rbSize < bwpSize && !vrb_map[rbStart + rbSize])
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if(rbSize < bwpSize && !(vrb_map[rbStart + rbSize]&(((1<<nrOfSymbols)-1)<<startSymbolIndex)))
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rbSize++;
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rbSize++;
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else{
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else{
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if (gNB_mac->sched_ctrlCommon->sched_pdsch.mcs<10)
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if (gNB_mac->sched_ctrlCommon->sched_pdsch.mcs<10)
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@@ -411,10 +411,9 @@ uint32_t schedule_control_sib1(module_id_t module_id,
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LOG_D(MAC,"dmrs_length %d\n",dmrs_length);
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LOG_D(MAC,"dmrs_length %d\n",dmrs_length);
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LOG_D(MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS);
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LOG_D(MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS);
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LOG_D(MAC,"mappingtype = %d\n", mappingtype);
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LOG_D(MAC,"mappingtype = %d\n", mappingtype);
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// Mark the corresponding RBs as used
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// Mark the corresponding RBs as used
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for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) {
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for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) {
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vrb_map[rb + rbStart] = 1;
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vrb_map[rb + rbStart] = ((1<<nrOfSymbols)-1)<<startSymbolIndex;
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}
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}
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return TBS;
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return TBS;
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}
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}
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@@ -531,7 +531,7 @@ void nr_store_dlsch_buffer(module_id_t module_id,
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bool allocate_dl_retransmission(module_id_t module_id,
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bool allocate_dl_retransmission(module_id_t module_id,
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frame_t frame,
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frame_t frame,
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sub_frame_t slot,
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sub_frame_t slot,
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uint8_t *rballoc_mask,
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uint16_t *rballoc_mask,
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int *n_rb_sched,
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int *n_rb_sched,
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int UE_id,
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int UE_id,
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int current_harq_pid) {
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int current_harq_pid) {
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@@ -561,13 +561,16 @@ bool allocate_dl_retransmission(module_id_t module_id,
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while (rbSize < retInfo->rbSize) {
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while (rbSize < retInfo->rbSize) {
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rbStart += rbSize; /* last iteration rbSize was not enough, skip it */
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rbStart += rbSize; /* last iteration rbSize was not enough, skip it */
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rbSize = 0;
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rbSize = 0;
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while (rbStart < bwpSize && !rballoc_mask[rbStart])
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while (rbStart < bwpSize &&
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!(rballoc_mask[rbStart]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)))
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rbStart++;
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rbStart++;
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if (rbStart >= bwpSize) {
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if (rbStart >= bwpSize) {
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LOG_D(NR_MAC, "cannot allocate retransmission for UE %d/RNTI %04x: no resources\n", UE_id, UE_info->rnti[UE_id]);
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LOG_D(NR_MAC, "cannot allocate retransmission for UE %d/RNTI %04x: no resources\n", UE_id, UE_info->rnti[UE_id]);
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return false;
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return false;
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}
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}
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while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize] && rbSize < retInfo->rbSize)
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while (rbStart + rbSize < bwpSize &&
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(rballoc_mask[rbStart + rbSize]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)) &&
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rbSize < retInfo->rbSize)
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rbSize++;
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rbSize++;
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}
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}
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/* check whether we need to switch the TDA allocation since the last
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/* check whether we need to switch the TDA allocation since the last
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@@ -577,13 +580,15 @@ bool allocate_dl_retransmission(module_id_t module_id,
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} else {
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} else {
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/* the retransmission will use a different time domain allocation, check
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/* the retransmission will use a different time domain allocation, check
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* that we have enough resources */
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* that we have enough resources */
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while (rbStart < bwpSize && !rballoc_mask[rbStart])
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rbStart++;
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while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize])
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rbSize++;
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NR_pdsch_semi_static_t temp_ps;
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NR_pdsch_semi_static_t temp_ps;
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temp_ps.nrOfLayers = 1;
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temp_ps.nrOfLayers = 1;
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nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps);
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nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps);
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while (rbStart < bwpSize &&
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!(rballoc_mask[rbStart]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)))
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rbStart++;
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while (rbStart + rbSize < bwpSize &&
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(rballoc_mask[rbStart + rbSize]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)))
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rbSize++;
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uint32_t new_tbs;
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uint32_t new_tbs;
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uint16_t new_rbSize;
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uint16_t new_rbSize;
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bool success = nr_find_nb_rb(retInfo->Qm,
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bool success = nr_find_nb_rb(retInfo->Qm,
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@@ -642,7 +647,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
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/* retransmissions: directly allocate */
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/* retransmissions: directly allocate */
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*n_rb_sched -= sched_ctrl->sched_pdsch.rbSize;
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*n_rb_sched -= sched_ctrl->sched_pdsch.rbSize;
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for (int rb = 0; rb < sched_ctrl->sched_pdsch.rbSize; rb++)
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for (int rb = 0; rb < sched_ctrl->sched_pdsch.rbSize; rb++)
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rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] = 0;
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rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] -= (((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex);
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return true;
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return true;
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}
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}
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@@ -655,7 +660,7 @@ void pf_dl(module_id_t module_id,
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NR_list_t *UE_list,
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NR_list_t *UE_list,
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int max_num_ue,
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int max_num_ue,
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int n_rb_sched,
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int n_rb_sched,
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uint8_t *rballoc_mask) {
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uint16_t *rballoc_mask) {
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gNB_MAC_INST *mac = RC.nrmac[module_id];
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gNB_MAC_INST *mac = RC.nrmac[module_id];
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NR_UE_info_t *UE_info = &mac->UE_info;
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NR_UE_info_t *UE_info = &mac->UE_info;
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@@ -769,13 +774,6 @@ void pf_dl(module_id_t module_id,
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return;
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return;
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}
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}
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// Freq-demain allocation
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while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
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uint16_t max_rbSize = 1;
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while (rbStart + max_rbSize < bwpSize && rballoc_mask[rbStart + max_rbSize])
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max_rbSize++;
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/* MCS has been set above */
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/* MCS has been set above */
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const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
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const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
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@@ -785,6 +783,17 @@ void pf_dl(module_id_t module_id,
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const long f = (sched_ctrl->active_bwp || bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
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const long f = (sched_ctrl->active_bwp || bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
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if (ps->time_domain_allocation != tda)
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if (ps->time_domain_allocation != tda)
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nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps);
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nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps);
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// Freq-demain allocation
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while (rbStart < bwpSize &&
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!(rballoc_mask[rbStart]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)))
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rbStart++;
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uint16_t max_rbSize = 1;
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while (rbStart + max_rbSize < bwpSize &&
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(rballoc_mask[rbStart + max_rbSize]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)))
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max_rbSize++;
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sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
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sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
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sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
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sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
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sched_pdsch->pucch_allocation = alloc;
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sched_pdsch->pucch_allocation = alloc;
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@@ -806,7 +815,7 @@ void pf_dl(module_id_t module_id,
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/* transmissions: directly allocate */
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/* transmissions: directly allocate */
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n_rb_sched -= sched_pdsch->rbSize;
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n_rb_sched -= sched_pdsch->rbSize;
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for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
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for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
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rballoc_mask[rb + sched_pdsch->rbStart] = 0;
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rballoc_mask[rb + sched_pdsch->rbStart] -= (((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex);
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}
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}
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}
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}
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@@ -819,9 +828,18 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon;
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const int CC_id = 0;
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const int CC_id = 0;
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/* Get bwpSize from the first UE */
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/* Get bwpSize and TDAfrom the first UE */
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/* This is temporary and it assumes all UEs have the same BWP and TDA*/
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int UE_id = UE_info->list.head;
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int UE_id = UE_info->list.head;
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
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int startSymbolIndex, nrOfSymbols;
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const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_bwp ?
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sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList :
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scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
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AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
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const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp ?
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const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp ?
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sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth:
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sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth:
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@@ -833,13 +851,16 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
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MAX_BWP_SIZE);
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MAX_BWP_SIZE);
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uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
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uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
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uint8_t rballoc_mask[bwpSize];
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uint16_t rballoc_mask[bwpSize];
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int n_rb_sched = 0;
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int n_rb_sched = 0;
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for (int i = 0; i < bwpSize; i++) {
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for (int i = 0; i < bwpSize; i++) {
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// calculate mask: init with "NOT" vrb_map:
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// calculate mask: init with "NOT" vrb_map:
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// if any RB in vrb_map is blocked (1), the current RBG will be 0
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// if any RB in vrb_map is blocked (1), the current RBG will be 0
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rballoc_mask[i] = !vrb_map[i+BWPStart];
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rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols
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n_rb_sched += rballoc_mask[i];
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// if all the pdsch symbols are free
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if((rballoc_mask[i]&(((1<<nrOfSymbols)-1)<<startSymbolIndex)) ==
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((1<<nrOfSymbols)-1)<<startSymbolIndex)
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n_rb_sched++;
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}
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}
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/* Retrieve amount of data to send for this UE */
|
/* Retrieve amount of data to send for this UE */
|
||||||
|
|||||||
@@ -278,6 +278,14 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
|||||||
__func__,
|
__func__,
|
||||||
UE_id);
|
UE_id);
|
||||||
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
|
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
|
||||||
|
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
|
||||||
|
const long f = sched_ctrl->active_bwp ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
|
||||||
|
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
|
||||||
|
ps->nrOfLayers = target_dl_Nl;
|
||||||
|
if (ps->time_domain_allocation != tda)
|
||||||
|
nr_set_pdsch_semi_static(
|
||||||
|
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, f, ps);
|
||||||
|
|
||||||
/* find largest unallocated chunk */
|
/* find largest unallocated chunk */
|
||||||
const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||||
const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||||
@@ -289,11 +297,14 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
|||||||
/* loop ensures that we allocate exactly target_dl_bw, or return */
|
/* loop ensures that we allocate exactly target_dl_bw, or return */
|
||||||
while (true) {
|
while (true) {
|
||||||
/* advance to first free RB */
|
/* advance to first free RB */
|
||||||
while (rbStart < bwpSize && vrb_map[rbStart + BWPStart])
|
while (rbStart < bwpSize &&
|
||||||
|
(vrb_map[rbStart + BWPStart]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)))
|
||||||
rbStart++;
|
rbStart++;
|
||||||
rbSize = 1;
|
rbSize = 1;
|
||||||
/* iterate until we are at target_dl_bw or no available RBs */
|
/* iterate until we are at target_dl_bw or no available RBs */
|
||||||
while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize + BWPStart] && rbSize < target_dl_bw)
|
while (rbStart + rbSize < bwpSize &&
|
||||||
|
!(vrb_map[rbStart + rbSize + BWPStart]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)) &&
|
||||||
|
rbSize < target_dl_bw)
|
||||||
rbSize++;
|
rbSize++;
|
||||||
/* found target_dl_bw? */
|
/* found target_dl_bw? */
|
||||||
if (rbSize == target_dl_bw)
|
if (rbSize == target_dl_bw)
|
||||||
@@ -369,16 +380,9 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
|||||||
// rnti, frame, slot);
|
// rnti, frame, slot);
|
||||||
|
|
||||||
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
|
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
|
||||||
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
|
|
||||||
sched_pdsch->pucch_allocation = alloc;
|
sched_pdsch->pucch_allocation = alloc;
|
||||||
sched_pdsch->rbStart = rbStart;
|
sched_pdsch->rbStart = rbStart;
|
||||||
sched_pdsch->rbSize = rbSize;
|
sched_pdsch->rbSize = rbSize;
|
||||||
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
|
|
||||||
const long f = sched_ctrl->active_bwp ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
|
|
||||||
ps->nrOfLayers = target_dl_Nl;
|
|
||||||
if (ps->time_domain_allocation != tda)
|
|
||||||
nr_set_pdsch_semi_static(
|
|
||||||
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, f, ps);
|
|
||||||
|
|
||||||
sched_pdsch->mcs = target_dl_mcs;
|
sched_pdsch->mcs = target_dl_mcs;
|
||||||
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
|
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
|
||||||
@@ -398,7 +402,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
|||||||
|
|
||||||
/* mark the corresponding RBs as used */
|
/* mark the corresponding RBs as used */
|
||||||
for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
|
for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
|
||||||
vrb_map[rb + sched_pdsch->rbStart + BWPStart] = 1;
|
vrb_map[rb + sched_pdsch->rbStart + BWPStart] = ((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex;
|
||||||
|
|
||||||
if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize);
|
if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize);
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user