changing back the rxtx thread and add another worker thread for coding
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@@ -71,7 +71,7 @@ schedule_ue_spec_phy_test(
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uint16_t rnti = 0x1235;
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uint32_t rb_alloc = 0x1FFFFFFF;
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int32_t tpc = 1;
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int32_t mcs = 28;
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int32_t mcs = 22;
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int32_t cqi = 15;
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int32_t ndi = subframeP/5;
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int32_t dai = 0;
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@@ -94,7 +94,7 @@ schedule_ue_spec_phy_test(
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nb_rb = conv_nprb(0,rb_alloc,N_RB_DL);
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TBS = get_TBS_DL(mcs,nb_rb);
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LOG_D(PHY,"schedule_ue_spec_phy_test: subframe %d: nb_rb=%d, TBS=%d, mcs=%d (rb_alloc=%x, N_RB_DL=%d)\n",subframeP,nb_rb,TBS,mcs,rb_alloc,N_RB_DL);
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LOG_D(PHY,"schedule_ue_spec_phy_test: subframe %d/%d: nb_rb=%d, TBS=%d, mcs=%d (rb_alloc=%x, N_RB_DL=%d)\n",frameP,subframeP,nb_rb,TBS,mcs,rb_alloc,N_RB_DL);
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dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
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memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
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@@ -183,5 +183,8 @@ schedule_ue_spec_phy_test(
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eNB->pdu_index[CC_id],
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eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0]);
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}
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else {
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LOG_W(MAC,"[eNB_scheduler_phytest] DCI allocation infeasible!\n");
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}
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}
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}
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