From 432e00a0c1438cec79484e9ef1db60388ef97169 Mon Sep 17 00:00:00 2001 From: rmagueta Date: Wed, 29 Sep 2021 15:56:13 +0100 Subject: [PATCH] General tda selection --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 12 +++---- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 3 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 33 +++++++++++++++++++ openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 2 ++ 4 files changed, 41 insertions(+), 9 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 2d0fbcabfb..7825a34e13 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -491,10 +491,8 @@ bool allocate_dl_retransmission(module_id_t module_id, const long f = (sched_ctrl->active_bwp ||bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0; const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_bwp ||bwpd) ? (f ? 1 : (ps->nrOfSymbols == 2 ? 1 : 2)) : (ps->nrOfSymbols == 2 ? 1 : 2); int rbSize = 0; - bool is_mixed_slot = is_xlsch_in_slot(RC.nrmac[module_id]->dlsch_slot_bitmap[slot / 64], slot) && - is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[slot / 64], slot); - - const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : (0+(is_mixed_slot?1:0)); + const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : nr_find_default_tda(module_id, slot); + AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n"); if (tda == retInfo->time_domain_allocation) { /* Check that there are enough resources for retransmission */ while (rbSize < retInfo->rbSize) { @@ -718,10 +716,8 @@ void pf_dl(module_id_t module_id, /* MCS has been set above */ - bool is_mixed_slot = is_xlsch_in_slot(RC.nrmac[module_id]->dlsch_slot_bitmap[slot / 64], slot) && - is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[slot / 64], slot); - - const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : (0+(is_mixed_slot?1:0)); + const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : nr_find_default_tda(module_id, slot); + AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n"); NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch; NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; const long f = (sched_ctrl->active_bwp || bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index d5272d5cfc..4cd381327e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -371,7 +371,8 @@ void nr_preprocessor_phytest(module_id_t module_id, sched_pdsch->pucch_allocation = alloc; sched_pdsch->rbStart = rbStart; sched_pdsch->rbSize = rbSize; - const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1; + const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : nr_find_default_tda(module_id, slot); + AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n"); const uint8_t num_dmrs_cdm_grps_no_data = 1; const long f = 1; ps->nrOfLayers = target_dl_Nl; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index d33c7300c1..81b5e2a196 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -295,6 +295,39 @@ bool nr_find_nb_rb(uint16_t Qm, return *tbs >= bytes && *nb_rb <= nb_rb_max; } +int nr_find_default_tda(module_id_t module_id, sub_frame_t slot) { + + int tda = -1; + const NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels->ServingCellConfigCommon; + NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = + scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + + bool is_mixed_slot = is_xlsch_in_slot(RC.nrmac[module_id]->dlsch_slot_bitmap[slot / 64], slot) && + is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[slot / 64], slot); + + int startSymbolAndLength = 0; + int StartSymbolIndex = 0; + int NrOfSymbols = 0; + int NrOfSymbols_sel = -1; + for (int i=0; ilist.count; i++) { + startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; + SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); + if (is_mixed_slot) { + if(StartSymbolIndex + NrOfSymbols <= scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols && NrOfSymbols>NrOfSymbols_sel) { + NrOfSymbols_sel = NrOfSymbols; + tda = i; + } + } else { + if(NrOfSymbols>NrOfSymbols_sel) { + NrOfSymbols_sel = NrOfSymbols; + tda = i; + } + } + } + + return tda; +} + void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc, const NR_CellGroupConfig_t *secondaryCellGroup, const NR_BWP_Downlink_t *bwp, diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 321476d513..ea853f9989 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -284,6 +284,8 @@ NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc, long get_K2(NR_ServingCellConfigCommon_t *scc, NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu); +int nr_find_default_tda(module_id_t module_id, sub_frame_t slot); + void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc, const NR_CellGroupConfig_t *secondaryCellGroup, const NR_BWP_Downlink_t *bwp,