Merge remote-tracking branch 'origin/develop' into 5g-nr-low-snr-performance
This commit is contained in:
@@ -128,7 +128,6 @@ void rx_func(void *param) {
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int slot_rx = info->slot_rx;
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int frame_tx = info->frame_tx;
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int slot_tx = info->slot_tx;
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sl_ahead = sf_ahead*gNB->frame_parms.slots_per_subframe;
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nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
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start_meas(&softmodem_stats_rxtx_sf);
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@@ -457,6 +456,7 @@ void init_gNB_Tpool(int inst) {
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for (int i=0; i < 2; i++) {
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notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t),0,gNB->L1_tx_out,tx_func);
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processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx);
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memset(msgDataTx,0, sizeof(processingData_L1tx_t));
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init_DLSCH_struct(gNB, msgDataTx);
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memset(msgDataTx->ssb, 0, 64*sizeof(NR_gNB_SSB_t));
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pushNotifiedFIFO(gNB->L1_tx_free,msgL1Tx); // to unblock the process in the beginning
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+17
-16
@@ -99,9 +99,6 @@ int attach_rru(RU_t *ru);
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int connect_rau(RU_t *ru);
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static void NRRCconfig_RU(void);
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uint16_t sf_ahead;
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uint16_t slot_ahead;
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uint16_t sl_ahead;
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extern int emulate_rf;
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extern int numerology;
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@@ -372,8 +369,8 @@ void fh_if4p5_south_in(RU_t *ru,
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proc->frame_rx = f;
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proc->timestamp_rx = (proc->frame_rx * fp->samples_per_subframe * 10) + fp->get_samples_slot_timestamp(proc->tti_rx, fp, 0);
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// proc->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_subframe);
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proc->tti_tx = (sl+(fp->slots_per_subframe*sf_ahead))%fp->slots_per_frame;
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proc->frame_tx = (sl>(fp->slots_per_frame-1-(fp->slots_per_subframe*sf_ahead))) ? (f+1)&1023 : f;
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proc->tti_tx = (sl+ru->sl_ahead)%fp->slots_per_frame;
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proc->frame_tx = (sl>(fp->slots_per_frame-1-(ru->sl_ahead))) ? (f+1)&1023 : f;
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if (proc->first_rx == 0) {
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if (proc->tti_rx != *slot) {
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@@ -1300,8 +1297,7 @@ void *ru_thread( void *param ) {
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}
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}
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sf_ahead = (uint16_t) ceil((float)6/(0x01<<fp->numerology_index));
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LOG_I(PHY, "Signaling main thread that RU %d is ready, sf_ahead %d\n",ru->idx,sf_ahead);
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LOG_I(PHY, "Signaling main thread that RU %d is ready, sl_ahead %d\n",ru->idx,ru->sl_ahead);
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pthread_mutex_lock(&RC.ru_mutex);
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RC.ru_mask &= ~(1<<ru->idx);
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pthread_cond_signal(&RC.ru_cond);
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@@ -1319,6 +1315,7 @@ void *ru_thread( void *param ) {
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else LOG_I(PHY,"RU %d rf device ready\n",ru->idx);
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} else LOG_I(PHY,"RU %d no rf device\n",ru->idx);
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LOG_I(PHY,"RU %d RF started\n",ru->idx);
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// start trx write thread
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if(usrp_tx_thread == 1) {
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if (ru->start_write_thread) {
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@@ -1386,9 +1383,12 @@ void *ru_thread( void *param ) {
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opp_enabled = opp_enabled0;
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}
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if (initial_wait == 0 && ru->rx_fhaul.trials > 1000) reset_meas(&ru->rx_fhaul);
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proc->timestamp_tx = proc->timestamp_rx + (sf_ahead*fp->samples_per_subframe);
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proc->frame_tx = (proc->tti_rx > (fp->slots_per_frame-1-(fp->slots_per_subframe*sf_ahead))) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
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proc->tti_tx = (proc->tti_rx + (fp->slots_per_subframe*sf_ahead))%fp->slots_per_frame;
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proc->timestamp_tx = proc->timestamp_rx;
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int sl=proc->tti_tx;
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for (int slidx=0;slidx<ru->sl_ahead;slidx++)
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proc->timestamp_tx += fp->get_samples_per_slot((sl+slidx)%fp->slots_per_frame,fp);
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proc->frame_tx = (proc->tti_rx > (fp->slots_per_frame-1-(ru->sl_ahead))) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
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proc->tti_tx = (proc->tti_rx + ru->sl_ahead)%fp->slots_per_frame;
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LOG_D(PHY,"AFTER fh_south_in - SFN/SL:%d%d RU->proc[RX:%d.%d TX:%d.%d] RC.gNB[0]:[RX:%d%d TX(SFN):%d]\n",
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frame,slot,
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proc->frame_rx,proc->tti_rx,
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@@ -1419,7 +1419,6 @@ void *ru_thread( void *param ) {
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// Do PRACH RU processing
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int prach_id=find_nr_prach_ru(ru,proc->frame_rx,proc->tti_rx,SEARCH_EXIST);
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uint8_t prachStartSymbol,N_dur;
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if (prach_id>=0) {
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T(T_GNB_PHY_PRACH_INPUT_SIGNAL, T_INT(proc->frame_rx), T_INT(proc->tti_rx), T_INT(0),
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T_BUFFER(&ru->common.rxdata[0][fp->get_samples_slot_timestamp(proc->tti_rx-1,fp,0)]/*-ru->N_TA_offset*/, fp->get_samples_per_slot(proc->tti_rx,fp)*4*2));
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@@ -2091,9 +2090,7 @@ static void NRRCconfig_RU(void) {
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RC.ru[j]->max_pdschReferenceSignalPower = *(RUParamList.paramarray[j][RU_MAX_RS_EPRE_IDX].uptr);;
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RC.ru[j]->max_rxgain = *(RUParamList.paramarray[j][RU_MAX_RXGAIN_IDX].uptr);
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RC.ru[j]->num_bands = RUParamList.paramarray[j][RU_BAND_LIST_IDX].numelt;
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RC.ru[j]->sf_extension = *(RUParamList.paramarray[j][RU_SF_EXTENSION_IDX].uptr);
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for (i=0; i<RC.ru[j]->num_bands; i++) RC.ru[j]->band[i] = RUParamList.paramarray[j][RU_BAND_LIST_IDX].iptr[i];
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} //strcmp(local_rf, "yes") == 0
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else {
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printf("RU %d: Transport %s\n",j,*(RUParamList.paramarray[j][RU_TRANSPORT_PREFERENCE_IDX].strptr));
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@@ -2113,8 +2110,6 @@ static void NRRCconfig_RU(void) {
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RC.ru[j]->if_south = REMOTE_IF5;
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RC.ru[j]->function = NGFI_RAU_IF5;
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RC.ru[j]->eth_params.transp_preference = ETH_UDP_IF5_ECPRI_MODE;
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} else if (strcmp(*(RUParamList.paramarray[j][RU_TRANSPORT_PREFERENCE_IDX].strptr), "udp_ecpri_if5") == 0) {
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RC.ru[j]->if_south = REMOTE_IF5;
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} else if (strcmp(*(RUParamList.paramarray[j][RU_TRANSPORT_PREFERENCE_IDX].strptr), "raw") == 0) {
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RC.ru[j]->if_south = REMOTE_IF5;
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RC.ru[j]->function = NGFI_RAU_IF5;
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@@ -2137,7 +2132,13 @@ static void NRRCconfig_RU(void) {
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RC.ru[j]->if_frequency = *(RUParamList.paramarray[j][RU_IF_FREQUENCY].u64ptr);
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RC.ru[j]->if_freq_offset = *(RUParamList.paramarray[j][RU_IF_FREQ_OFFSET].iptr);
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RC.ru[j]->do_precoding = *(RUParamList.paramarray[j][RU_DO_PRECODING].iptr);
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RC.ru[j]->sl_ahead = *(RUParamList.paramarray[j][RU_SL_AHEAD].iptr);
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RC.ru[j]->num_bands = RUParamList.paramarray[j][RU_BAND_LIST_IDX].numelt;
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for (i=0; i<RC.ru[j]->num_bands; i++) RC.ru[j]->band[i] = RUParamList.paramarray[j][RU_BAND_LIST_IDX].iptr[i];
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RC.ru[j]->openair0_cfg.nr_flag = *(RUParamList.paramarray[j][RU_NR_FLAG].iptr);
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RC.ru[j]->openair0_cfg.nr_band = RC.ru[j]->band[0];
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RC.ru[j]->openair0_cfg.nr_scs_for_raster = *(RUParamList.paramarray[j][RU_NR_SCS_FOR_RASTER].iptr);
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printf("[RU %d] Setting nr_flag %d, nr_band %d, nr_scs_for_raster %d\n",j,RC.ru[j]->openair0_cfg.nr_flag,RC.ru[j]->openair0_cfg.nr_band,RC.ru[j]->openair0_cfg.nr_scs_for_raster);
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if (config_isparamset(RUParamList.paramarray[j], RU_BF_WEIGHTS_LIST_IDX)) {
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RC.ru[j]->nb_bfw = RUParamList.paramarray[j][RU_BF_WEIGHTS_LIST_IDX].numelt;
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@@ -51,7 +51,6 @@
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#define CONFIG_HLP_UEFO "set UE to enable estimation and compensation of frequency offset\n"
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#define CONFIG_HLP_DUMPFRAME "dump UE received frame to rxsig_frame0.dat and exit\n"
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#define CONFIG_HLP_DLSHIFT "dynamic shift for LLR compuation for TM3/4 (default 0)\n"
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#define CONFIG_HLP_UELOOP "get softmodem (UE) to loop through memory instead of acquiring from HW\n"
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#define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n"
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#define CONFIG_HLP_DORA "test gNB and UE with RA procedures\n"
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#define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n"
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@@ -67,6 +66,7 @@
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#define CONFIG_HLP_ITTIL "Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n"
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#define CONFIG_HLP_DLMCS_PHYTEST "Set the downlink MCS for PHYTEST mode\n"
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#define CONFIG_HLP_DLNL_PHYTEST "Set the downlink nrOfLayers for PHYTEST mode\n"
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#define CONFIG_HLP_ULNL_PHYTEST "Set the uplink nrOfLayers for PHYTEST mode\n"
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#define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n"
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#define CONFIG_HLP_MSLOTS "Skip the missed slots/subframes \n"
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#define CONFIG_HLP_ULMCS_PHYTEST "Set the uplink MCS for PHYTEST mode\n"
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@@ -732,7 +732,7 @@ int main( int argc, char **argv ) {
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printf("wait_gNBs()\n");
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wait_gNBs();
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printf("About to Init RU threads RC.nb_RU:%d\n", RC.nb_RU);
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int sl_ahead=6;
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if (RC.nb_RU >0) {
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printf("Initializing RU threads\n");
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init_NR_RU(get_softmodem_params()->rf_config_file);
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@@ -740,7 +740,10 @@ int main( int argc, char **argv ) {
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for (ru_id=0; ru_id<RC.nb_RU; ru_id++) {
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RC.ru[ru_id]->rf_map.card=0;
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RC.ru[ru_id]->rf_map.chain=CC_id+chain_offset;
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if (ru_id==0) sl_ahead = RC.ru[ru_id]->sl_ahead;
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else AssertFatal(RC.ru[ru_id]->sl_ahead != RC.ru[0]->sl_ahead,"RU %d has different sl_ahead %d than RU 0 %d\n",ru_id,RC.ru[ru_id]->sl_ahead,RC.ru[0]->sl_ahead);
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}
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}
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config_sync_var=0;
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@@ -757,6 +760,7 @@ int main( int argc, char **argv ) {
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// once all RUs are ready initialize the rest of the gNBs ((dependence on final RU parameters after configuration)
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printf("ALL RUs ready - init gNBs\n");
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for (int idx=0;idx<RC.nb_nr_L1_inst;idx++) RC.gNB[idx]->if_inst->sl_ahead = sl_ahead;
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if(IS_SOFTMODEM_DOSCOPE) {
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sleep(1);
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scopeParms_t p;
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@@ -835,10 +839,10 @@ int main( int argc, char **argv ) {
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}
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for (int inst = 0; inst < NB_RU; inst++) {
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kill_NR_RU_proc(inst);
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nr_phy_free_RU(RC.ru[inst]);
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}
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free_lte_top();
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pthread_cond_destroy(&sync_cond);
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pthread_mutex_destroy(&sync_mutex);
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pthread_cond_destroy(&nfapi_sync_cond);
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@@ -22,6 +22,7 @@
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{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
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{"m" , CONFIG_HLP_DLMCS_PHYTEST,0, uptr:&target_dl_mcs, defintval:0, TYPE_UINT, 0}, \
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{"l" , CONFIG_HLP_DLNL_PHYTEST,0, uptr:&target_dl_Nl, defintval:0, TYPE_UINT, 0}, \
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{"L" , CONFIG_HLP_ULNL_PHYTEST,0, uptr:&target_ul_Nl, defintval:0, TYPE_UINT, 0}, \
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{"t" , CONFIG_HLP_ULMCS_PHYTEST,0, uptr:&target_ul_mcs, defintval:0, TYPE_UINT, 0}, \
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{"M" , CONFIG_HLP_DLBW_PHYTEST,0, uptr:&target_dl_bw, defintval:0, TYPE_UINT, 0}, \
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{"T" , CONFIG_HLP_ULBW_PHYTEST,0, uptr:&target_ul_bw, defintval:0, TYPE_UINT, 0}, \
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@@ -36,6 +37,7 @@
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extern threads_t threads;
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extern uint32_t target_dl_mcs;
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extern uint32_t target_dl_Nl;
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extern uint32_t target_ul_Nl;
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extern uint32_t target_ul_mcs;
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extern uint32_t target_dl_bw;
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extern uint32_t target_ul_bw;
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+13
-23
@@ -573,17 +573,7 @@ static void UE_synch(void *arg) {
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openair0_cfg[UE->rf_map.card].rx_freq[0],
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openair0_cfg[UE->rf_map.card].tx_freq[0]);
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if (UE->mode != loop_through_memory) {
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UE->rfdevice.trx_set_freq_func(&UE->rfdevice,&openair0_cfg[0],0);
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//UE->rfdevice.trx_set_gains_func(&openair0,&openair0_cfg[0]);
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//UE->rfdevice.trx_stop_func(&UE->rfdevice);
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// sleep(1);
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/*if (UE->rfdevice.trx_start_func(&UE->rfdevice) != 0 ) {
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LOG_E(HW,"Could not start the device\n");
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oai_exit=1;
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}*/
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}
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UE->rfdevice.trx_set_freq_func(&UE->rfdevice,&openair0_cfg[0],0);
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if (UE->UE_scan_carrier == 1) {
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UE->UE_scan_carrier = 0;
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} else {
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@@ -602,8 +592,7 @@ static void UE_synch(void *arg) {
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LOG_I(PHY, "Initial sync failed: trying carrier off %d Hz\n", freq_offset);
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if (UE->mode != loop_through_memory)
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UE->rfdevice.trx_set_freq_func(&UE->rfdevice,&openair0_cfg[0],0);
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UE->rfdevice.trx_set_freq_func(&UE->rfdevice,&openair0_cfg[0],0);
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}
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break;
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@@ -624,7 +613,7 @@ void processSlotTX(void *arg) {
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int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
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uint8_t gNB_id = 0;
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LOG_D(PHY,"%d.%d => slot type %d\n",proc->frame_tx,proc->nr_slot_tx,tx_slot_type);
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LOG_D(PHY,"processSlotTX %d.%d => slot type %d\n",proc->frame_tx,proc->nr_slot_tx,tx_slot_type);
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if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){
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// trigger L2 to run ue_scheduler thru IF module
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@@ -648,7 +637,7 @@ void processSlotTX(void *arg) {
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stop_meas(&UE->ue_ul_indication_stats);
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}
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if ((UE->mode != loop_through_memory) && (rxtxD->ue_sched_mode != NOT_PUSCH)) {
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if (rxtxD->ue_sched_mode != NOT_PUSCH) {
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phy_procedures_nrUE_TX(UE,proc,0);
|
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}
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}
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@@ -663,6 +652,7 @@ void processSlotRX(void *arg) {
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||||
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_slot_rx);
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int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
|
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uint8_t gNB_id = 0;
|
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NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
|
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|
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if (IS_SOFTMODEM_NOS1 || get_softmodem_params()->sa) {
|
||||
/* send tick to RLC and PDCP every ms */
|
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@@ -678,7 +668,7 @@ void processSlotRX(void *arg) {
|
||||
|
||||
if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
|
||||
nr_downlink_indication_t dl_indication;
|
||||
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, gNB_id);
|
||||
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, gNB_id, &phy_pdcch_config);
|
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UE->if_inst->dl_indication(&dl_indication, NULL);
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}
|
||||
|
||||
@@ -687,7 +677,7 @@ void processSlotRX(void *arg) {
|
||||
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, no_relay, NULL );
|
||||
#else
|
||||
uint64_t a=rdtsc_oai();
|
||||
phy_procedures_nrUE_RX(UE, proc, gNB_id, get_nrUE_params()->nr_dlsch_parallel, &rxtxD->txFifo);
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||||
phy_procedures_nrUE_RX(UE, proc, gNB_id, get_nrUE_params()->nr_dlsch_parallel, &phy_pdcch_config, &rxtxD->txFifo);
|
||||
LOG_D(PHY, "In %s: slot %d, time %llu\n", __FUNCTION__, proc->nr_slot_rx, (rdtsc_oai()-a)/3500);
|
||||
#endif
|
||||
|
||||
@@ -723,7 +713,8 @@ void processSlotRX(void *arg) {
|
||||
LOG_D(PHY, "Sending Uplink data \n");
|
||||
nr_ue_pusch_common_procedures(UE,
|
||||
proc->nr_slot_tx,
|
||||
&UE->frame_parms,1);
|
||||
&UE->frame_parms,
|
||||
UE->frame_parms.nb_antennas_tx);
|
||||
}
|
||||
|
||||
if (UE->UE_mode[gNB_id] > NOT_SYNCHED && UE->UE_mode[gNB_id] < PUSCH) {
|
||||
@@ -737,9 +728,10 @@ void processSlotRX(void *arg) {
|
||||
|
||||
void dummyWrite(PHY_VARS_NR_UE *UE,openair0_timestamp timestamp, int writeBlockSize) {
|
||||
void *dummy_tx[UE->frame_parms.nb_antennas_tx];
|
||||
|
||||
int16_t dummy_tx_data[UE->frame_parms.nb_antennas_tx][2*writeBlockSize]; // 2 because the function we call use pairs of int16_t implicitly as complex numbers
|
||||
memset(dummy_tx_data, 0, sizeof(dummy_tx_data));
|
||||
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
|
||||
dummy_tx[i]=malloc16_clear(writeBlockSize*4);
|
||||
dummy_tx[i]=dummy_tx_data[i];
|
||||
|
||||
AssertFatal( writeBlockSize ==
|
||||
UE->rfdevice.trx_write_func(&UE->rfdevice,
|
||||
@@ -749,8 +741,6 @@ void dummyWrite(PHY_VARS_NR_UE *UE,openair0_timestamp timestamp, int writeBlockS
|
||||
UE->frame_parms.nb_antennas_tx,
|
||||
4),"");
|
||||
|
||||
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
|
||||
free(dummy_tx[i]);
|
||||
}
|
||||
|
||||
void readFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp, bool toTrash) {
|
||||
@@ -792,7 +782,7 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
|
||||
*timestamp += UE->frame_parms.get_samples_per_slot(1,&UE->frame_parms);
|
||||
for ( int size=UE->rx_offset ; size > 0 ; size -= UE->frame_parms.samples_per_subframe ) {
|
||||
int unitTransfer=size>UE->frame_parms.samples_per_subframe ? UE->frame_parms.samples_per_subframe : size ;
|
||||
// we write before read becasue gNB waits for UE to write and both executions halt
|
||||
// we write before read because gNB waits for UE to write and both executions halt
|
||||
// this happens here as the read size is samples_per_subframe which is very much larger than samp_per_slot
|
||||
if (IS_SOFTMODEM_RFSIM) dummyWrite(UE,*timestamp, unitTransfer);
|
||||
AssertFatal(unitTransfer ==
|
||||
|
||||
@@ -245,14 +245,17 @@ nrUE_params_t *get_nrUE_params(void) {
|
||||
}
|
||||
/* initialie thread pools used for NRUE processing paralleliation */
|
||||
void init_tpools(uint8_t nun_dlsch_threads) {
|
||||
char *params = NULL;
|
||||
params = calloc(1,(NR_RX_NB_TH*NR_NB_TH_SLOT*3)+1);
|
||||
char params[NR_RX_NB_TH*NR_NB_TH_SLOT*3+1]={0};
|
||||
for (int i=0; i<NR_RX_NB_TH*NR_NB_TH_SLOT; i++) {
|
||||
memcpy(params+(i*3),"-1,",3);
|
||||
}
|
||||
initTpool(params, &(nrUE_params.Tpool), false);
|
||||
free(params);
|
||||
init_dlsch_tpool( nun_dlsch_threads);
|
||||
if (getenv("noThreads")) {
|
||||
initTpool("n", &(nrUE_params.Tpool), false);
|
||||
init_dlsch_tpool(0);
|
||||
} else {
|
||||
initTpool(params, &(nrUE_params.Tpool), false);
|
||||
init_dlsch_tpool( nun_dlsch_threads);
|
||||
}
|
||||
}
|
||||
static void get_options(void) {
|
||||
|
||||
|
||||
@@ -53,7 +53,6 @@ extern "C"
|
||||
|
||||
|
||||
#define CONFIG_HLP_DUMPFRAME "dump UE received frame to rxsig_frame0.dat and exit\n"
|
||||
#define CONFIG_HLP_UELOOP "get softmodem (UE) to loop through memory instead of acquiring from HW\n"
|
||||
#define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n"
|
||||
#define CONFIG_HLP_DORA "test gNB and UE with RA procedures\n"
|
||||
#define CONFIG_HLP_SA "run gNB in standalone mode\n"
|
||||
|
||||
Reference in New Issue
Block a user