PreProc IF: save MCS-info per UE
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@@ -416,6 +416,35 @@ void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_
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UL_info->uci_ind.num_ucis = 0;
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UL_info->uci_ind.num_ucis = 0;
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}
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}
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int getNrOfSymbols(NR_BWP_Downlink_t *bwp, int tda) {
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struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
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bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
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AssertFatal(tda < tdaList->list.count,
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"time_domain_allocation %d>=%d\n",
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tda,
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tdaList->list.count);
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const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
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int startSymbolIndex, nrOfSymbols;
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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return nrOfSymbols;
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}
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nfapi_nr_dmrs_type_e getDmrsConfigType(NR_BWP_Downlink_t *bwp) {
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return bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
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}
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uint8_t getN_PRB_DMRS(NR_BWP_Downlink_t *bwp, int numDmrsCdmGrpsNoData) {
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const nfapi_nr_dmrs_type_e dmrsConfigType = getDmrsConfigType(bwp);
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if (dmrsConfigType == NFAPI_NR_DMRS_TYPE1) {
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// if no data in dmrs cdm group is 1 only even REs have no data
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// if no data in dmrs cdm group is 2 both odd and even REs have no data
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return numDmrsCdmGrpsNoData * 6;
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} else {
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return numDmrsCdmGrpsNoData * 4;
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}
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}
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void nr_simple_dlsch_preprocessor(module_id_t module_id,
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void nr_simple_dlsch_preprocessor(module_id_t module_id,
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frame_t frame,
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frame_t frame,
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sub_frame_t slot,
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sub_frame_t slot,
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@@ -486,6 +515,28 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
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const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
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const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
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sched_ctrl->rbSize = bwpSize;
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sched_ctrl->rbSize = bwpSize;
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sched_ctrl->rbStart = 0;
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sched_ctrl->rbStart = 0;
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// modulation scheme
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sched_ctrl->mcsTableIdx = 0;
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sched_ctrl->mcs = 9;
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sched_ctrl->numDmrsCdmGrpsNoData = 1;
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uint8_t N_PRB_DMRS =
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getN_PRB_DMRS(sched_ctrl->active_bwp, sched_ctrl->numDmrsCdmGrpsNoData);
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int nrOfSymbols = getNrOfSymbols(sched_ctrl->active_bwp,
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sched_ctrl->time_domain_allocation);
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const uint32_t TBS =
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nr_compute_tbs(nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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sched_ctrl->rbSize,
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nrOfSymbols,
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N_PRB_DMRS, // FIXME // This should be multiplied by the
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// number of dmrs symbols
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0 /* N_PRB_oh, 0 for initialBWP */,
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0 /* tb_scaling */,
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1 /* nrOfLayers */)
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>> 3;
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AssertFatal(TBS != 0, "TBS is zero but requested %d RBs!\n", sched_ctrl->rbSize);
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}
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}
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void nr_schedule_ue_spec(module_id_t module_id,
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void nr_schedule_ue_spec(module_id_t module_id,
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@@ -508,11 +559,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
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if (sched_ctrl->rbSize < 0 && !get_softmodem_params()->phy_test)
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if (sched_ctrl->rbSize < 0 && !get_softmodem_params()->phy_test)
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return;
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return;
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const uint8_t mcs = 9;
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/* POST processing */
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const int nrOfLayers = 1;
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const uint8_t numDmrsCdmGrpsNoData = 1;
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const nfapi_nr_dmrs_type_e dmrsConfigType = sched_ctrl->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
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struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
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struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
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sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
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sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
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AssertFatal(sched_ctrl->time_domain_allocation < tdaList->list.count,
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AssertFatal(sched_ctrl->time_domain_allocation < tdaList->list.count,
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@@ -525,43 +572,20 @@ void nr_schedule_ue_spec(module_id_t module_id,
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int startSymbolIndex, nrOfSymbols;
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int startSymbolIndex, nrOfSymbols;
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
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const uint16_t N_PRB_oh = 0; // overhead should be 0 for initialBWP
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uint8_t N_PRB_DMRS =
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uint8_t N_PRB_DMRS;
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getN_PRB_DMRS(sched_ctrl->active_bwp, sched_ctrl->numDmrsCdmGrpsNoData);
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if (dmrsConfigType == NFAPI_NR_DMRS_TYPE1) {
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// if no data in dmrs cdm group is 1 only even REs have no data
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// if no data in dmrs cdm group is 2 both odd and even REs have no data
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N_PRB_DMRS = numDmrsCdmGrpsNoData * 6;
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} else {
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N_PRB_DMRS = numDmrsCdmGrpsNoData * 4;
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}
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const uint8_t N_sh_symb = nrOfSymbols;
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const uint8_t table_idx = 0;
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const uint16_t R = nr_get_code_rate_dl(mcs, table_idx);
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const uint8_t Qm = nr_get_Qm_dl(mcs, table_idx);
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const uint32_t TBS =
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const uint32_t TBS =
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nr_compute_tbs(Qm,
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nr_compute_tbs(nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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R,
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nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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sched_ctrl->rbSize,
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sched_ctrl->rbSize,
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N_sh_symb,
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nrOfSymbols,
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N_PRB_DMRS, // FIXME // This should be multiplied by the
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N_PRB_DMRS, // FIXME // This should be multiplied by the
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// number of dmrs symbols
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// number of dmrs symbols
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N_PRB_oh,
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0 /* N_PRB_oh, 0 for initialBWP */,
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0 /* tb_scaling */,
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0 /* tb_scaling */,
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nrOfLayers)
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1 /* nrOfLayers */)
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>> 3;
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>> 3;
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AssertFatal(TBS != 0, "TBS is zero but requested %d RBs!\n", sched_ctrl->rbSize);
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LOG_D(MAC,
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"TBS %d bytes: N_PRB_DMRS %d N_sh_symb %d N_PRB_oh %d R %d Qm %d table %d",
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TBS,
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N_PRB_DMRS,
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N_sh_symb,
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N_PRB_oh,
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R,
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Qm,
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table_idx);
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/* POST processing */
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/* Get RLC data TODO: remove random data retrieval */
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/* Get RLC data TODO: remove random data retrieval */
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int header_length_total = 0;
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int header_length_total = 0;
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int header_length_last = 0;
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int header_length_last = 0;
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@@ -668,15 +692,15 @@ void nr_schedule_ue_spec(module_id_t module_id,
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sched_ctrl->coreset,
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sched_ctrl->coreset,
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dl_req,
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dl_req,
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pucch,
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pucch,
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nrOfLayers,
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1 /* nrOfLayers */,
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mcs,
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sched_ctrl->mcs,
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sched_ctrl->rbSize,
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sched_ctrl->rbSize,
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sched_ctrl->rbStart,
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sched_ctrl->rbStart,
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numDmrsCdmGrpsNoData,
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sched_ctrl->numDmrsCdmGrpsNoData,
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dmrsConfigType,
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getDmrsConfigType(sched_ctrl->active_bwp),
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table_idx,
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sched_ctrl->mcsTableIdx,
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R,
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nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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Qm,
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nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
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TBS,
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TBS,
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sched_ctrl->time_domain_allocation,
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sched_ctrl->time_domain_allocation,
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startSymbolIndex,
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startSymbolIndex,
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@@ -308,6 +308,11 @@ typedef struct {
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// time-domain allocation for scheduled RBs
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// time-domain allocation for scheduled RBs
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int time_domain_allocation;
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int time_domain_allocation;
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/// MCS-related infos
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uint8_t mcsTableIdx;
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uint8_t mcs;
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uint8_t numDmrsCdmGrpsNoData;
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uint16_t ta_timer;
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uint16_t ta_timer;
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int16_t ta_update;
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int16_t ta_update;
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uint8_t tpc0;
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uint8_t tpc0;
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