From acf6b957b304618e9c96264290bcd8b8fb5f31d5 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Sun, 29 Jun 2025 21:29:56 +0200 Subject: [PATCH 01/34] Refactor post processor into post_process_ulsch() Introduce an array with information on FAPI structures to save resource allocation into. It's in nr_mac_gNB.h because the next commit reuses this for all preprocessors. --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 438 +++++++++--------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 11 + 2 files changed, 224 insertions(+), 225 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index e0638e97cf..f6badf62eb 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -2356,6 +2356,217 @@ nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti return pusch_pdu; } +static void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE_info_t *UE, NR_sched_pusch_t *sched_pusch) +{ + frame_t frame = pusch->frame; + slot_t slot = pusch->slot; + + NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels[0].ServingCellConfigCommon; + NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; + NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP; + + /* the UE now has the grant for the request */ + sched_ctrl->SR = false; + + int8_t harq_id = sched_pusch->ul_harq_pid; + if (harq_id < 0) { + /* PP has not selected a specific HARQ Process, get a new one */ + harq_id = sched_ctrl->available_ul_harq.head; + AssertFatal(harq_id >= 0, "no free HARQ process available for UE %04x\n", UE->rnti); + remove_front_nr_list(&sched_ctrl->available_ul_harq); + sched_pusch->ul_harq_pid = harq_id; + } else { + /* PP selected a specific HARQ process. Check whether it will be a new + * transmission or a retransmission, and remove from the corresponding + * list */ + if (sched_ctrl->ul_harq_processes[harq_id].round == 0) + remove_nr_list(&sched_ctrl->available_ul_harq, harq_id); + else + remove_nr_list(&sched_ctrl->retrans_ul_harq, harq_id); + } + NR_UE_ul_harq_t *cur_harq = &sched_ctrl->ul_harq_processes[harq_id]; + DevAssert(!cur_harq->is_waiting); + if (nr_mac->radio_config.disable_harq) { + finish_nr_ul_harq(sched_ctrl, harq_id); + } else { + add_tail_nr_list(&sched_ctrl->feedback_ul_harq, harq_id); + cur_harq->feedback_slot = sched_pusch->slot; + cur_harq->is_waiting = true; + } + + /* Statistics */ + AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max, "Indexing ulsch_rounds[%d] is out of bounds\n", cur_harq->round); + UE->mac_stats.ul.rounds[cur_harq->round]++; + if (cur_harq->round == 0) { + UE->mac_stats.ulsch_total_bytes_scheduled += sched_pusch->tb_size; + /* Save information on MCS, TBS etc for the current initial transmission + * so we have access to it when retransmitting */ + cur_harq->sched_pusch = *sched_pusch; + /* save which time allocation and nrOfLayers have been used, to be used on + * retransmissions */ + cur_harq->sched_pusch.time_domain_allocation = sched_pusch->time_domain_allocation; + cur_harq->sched_pusch.nrOfLayers = sched_pusch->nrOfLayers; + cur_harq->sched_pusch.tpmi = sched_pusch->tpmi; + sched_ctrl->sched_ul_bytes += sched_pusch->tb_size; + UE->mac_stats.ul.total_rbs += sched_pusch->rbSize; + + } else { + UE->mac_stats.ul.total_rbs_retx += sched_pusch->rbSize; + } + UE->mac_stats.ul.current_bytes = sched_pusch->tb_size; + UE->mac_stats.ul.current_rbs = sched_pusch->rbSize; + sched_ctrl->last_ul_frame = sched_pusch->frame; + sched_ctrl->last_ul_slot = sched_pusch->slot; + + LOG_D(NR_MAC, + "ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS " + "Table %2d MCS %2d nrOfLayers %2d num_dmrs_cdm_grps_no_data %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched " + "%6d est BSR %6d TPC %d\n", + frame, + slot, + UE->rnti, + sched_pusch->frame, + sched_pusch->slot, + sched_ctrl->aggregation_level, + sched_pusch->rbStart, + sched_pusch->rbSize, + sched_pusch->tda_info.startSymbolIndex, + sched_pusch->tda_info.nrOfSymbols, + sched_pusch->dmrs_info.ul_dmrs_symb_pos, + current_BWP->mcs_table, + sched_pusch->mcs, + sched_pusch->nrOfLayers, + sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data, + sched_pusch->tb_size, + harq_id, + cur_harq->round, + nr_get_rv(cur_harq->round % 4), + cur_harq->ndi, + sched_ctrl->estimated_ul_buffer, + sched_ctrl->sched_ul_bytes, + sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, + sched_ctrl->tpc0); + + /* PUSCH in a later slot, but corresponding DCI now! */ + const int index = ul_buffer_index(sched_pusch->frame, + sched_pusch->slot, + nr_mac->frame_structure.numb_slots_frame, + nr_mac->UL_tti_req_ahead_size); + nfapi_nr_ul_tti_request_t *req = &nr_mac->UL_tti_req_ahead[0][index]; + if (req->SFN != sched_pusch->frame || req->Slot != sched_pusch->slot) + LOG_W(NR_MAC, + "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", + frame, + slot, + req->SFN, + req->Slot, + sched_pusch->frame, + sched_pusch->slot); + AssertFatal(req->n_pdus < sizeof(req->pdus_list) / sizeof(req->pdus_list[0]), + "Invalid UL_tti_req_ahead->n_pdus %d\n", + req->n_pdus); + + req->pdus_list[req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; + req->pdus_list[req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); + nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(req, + UE, + scc, + sched_pusch, + current_BWP->transform_precoding, + harq_id, + cur_harq->round, + current_BWP->pusch_Config && current_BWP->pusch_Config->frequencyHopping, + UE->rnti); + req->n_pdus += 1; + + // Calculate the normalized tx_power for PHR + long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL; + int tbs_bits = pusch_pdu->pusch_data.tb_size << 3; + sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs, + tbs_bits, + sched_pusch->rbSize, + sched_pusch->nrOfLayers, + sched_pusch->tda_info.nrOfSymbols, + sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb, + deltaMCS, + false); + + /* a PDCCH PDU groups DCIs per BWP and CORESET. Save a pointer to each + * allocated PDCCH so we can easily allocate UE's DCIs independent of any + * CORESET order */ + NR_SearchSpace_t *ss = sched_ctrl->search_space; + NR_ControlResourceSet_t *coreset = sched_ctrl->coreset; + const int coresetid = coreset->controlResourceSetId; + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = pusch->pdcch_pdu_coreset[coresetid]; + if (!pdcch_pdu) { + nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &pusch->ul_dci_req->ul_dci_pdu_list[pusch->ul_dci_req->numPdus]; + memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); + ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; + ul_dci_request_pdu->PDUSize = (uint8_t)(4 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); + pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; + pusch->ul_dci_req->numPdus += 1; + nr_configure_pdcch(pdcch_pdu, coreset, &sched_ctrl->sched_pdcch); + pusch->pdcch_pdu_coreset[coresetid] = pdcch_pdu; + } + + LOG_D(NR_MAC, "Configuring ULDCI/PDCCH in %d.%d at CCE %d, rnti %04x\n", frame, slot, sched_ctrl->cce_index, UE->rnti); + + /* Fill PDCCH DL DCI PDU */ + nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu, + scc, + ss, + coreset, + sched_ctrl->aggregation_level, + sched_ctrl->cce_index, + UE->UE_beam_index, + UE->rnti); + pdcch_pdu->numDlDci++; + + dci_pdu_rel15_t uldci_payload; + memset(&uldci_payload, 0, sizeof(uldci_payload)); + if (current_BWP->dci_format == NR_UL_DCI_FORMAT_0_1) + LOG_D(NR_MAC_DCI, + "add ul dci harq %d for %d.%d %d.%d round %d\n", + harq_id, + frame, + slot, + sched_pusch->frame, + sched_pusch->slot, + sched_ctrl->ul_harq_processes[harq_id].round); + + // If nrOfLayers is the same as in srs_feedback, we use the best TPMI, i.e. the one in srs_feedback. + // Otherwise, we use the valid TPMI that we saved in the first transmission. + int *tpmi = NULL; + if (pusch_pdu->nrOfLayers != (sched_ctrl->srs_feedback.ul_ri + 1)) + tpmi = &sched_pusch->tpmi; + config_uldci(&UE->sc_info, + pusch_pdu, + &uldci_payload, + &sched_ctrl->srs_feedback, + tpmi, + sched_pusch->time_domain_allocation, + UE->UE_sched_ctrl.tpc0, + cur_harq->ndi, + current_BWP, + ss->searchSpaceType->present); + + // Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR + UE->UE_sched_ctrl.tpc0 = 1; + + fill_dci_pdu_rel15(&UE->sc_info, + &UE->current_DL_BWP, + current_BWP, + dci_pdu, + &uldci_payload, + current_BWP->dci_format, + TYPE_C_RNTI_, + current_BWP->bwp_id, + ss, + coreset, + UE->pdsch_HARQ_ACK_Codebook, + nr_mac->cset0_bwp_size); +} + static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, slot_t slot) { gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; @@ -2442,21 +2653,14 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ ul_dci_req->SFN = frame; ul_dci_req->Slot = slot; - /* a PDCCH PDU groups DCIs per BWP and CORESET. Save a pointer to each - * allocated PDCCH so we can easily allocate UE's DCIs independent of any - * CORESET order */ - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_coreset[MAX_NUM_CORESET] = {0}; + post_process_pusch_t pusch = { frame, slot, ul_dci_req }; - - NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels[0].ServingCellConfigCommon; NR_UEs_t *UE_info = &nr_mac->UE_info; UE_iterator(UE_info->connected_ue_list, UE) { NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; if (sched_ctrl->ul_failure && !get_softmodem_params()->phy_test) continue; - NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP; - UE->mac_stats.ul.current_bytes = 0; UE->mac_stats.ul.current_rbs = 0; @@ -2467,223 +2671,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ if (sched_pusch->rbSize <= 0) continue; - uint16_t rnti = UE->rnti; - sched_ctrl->SR = false; - int8_t harq_id = sched_pusch->ul_harq_pid; - if (harq_id < 0) { - /* PP has not selected a specific HARQ Process, get a new one */ - harq_id = sched_ctrl->available_ul_harq.head; - AssertFatal(harq_id >= 0, - "no free HARQ process available for UE %04x\n", - UE->rnti); - remove_front_nr_list(&sched_ctrl->available_ul_harq); - sched_pusch->ul_harq_pid = harq_id; - } else { - /* PP selected a specific HARQ process. Check whether it will be a new - * transmission or a retransmission, and remove from the corresponding - * list */ - if (sched_ctrl->ul_harq_processes[harq_id].round == 0) - remove_nr_list(&sched_ctrl->available_ul_harq, harq_id); - else - remove_nr_list(&sched_ctrl->retrans_ul_harq, harq_id); - } - NR_UE_ul_harq_t *cur_harq = &sched_ctrl->ul_harq_processes[harq_id]; - DevAssert(!cur_harq->is_waiting); - if (nr_mac->radio_config.disable_harq) { - finish_nr_ul_harq(sched_ctrl, harq_id); - } else { - add_tail_nr_list(&sched_ctrl->feedback_ul_harq, harq_id); - cur_harq->feedback_slot = sched_pusch->slot; - cur_harq->is_waiting = true; - } - - /* Statistics */ - AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max, "Indexing ulsch_rounds[%d] is out of bounds\n", cur_harq->round); - UE->mac_stats.ul.rounds[cur_harq->round]++; - if (cur_harq->round == 0) { - UE->mac_stats.ulsch_total_bytes_scheduled += sched_pusch->tb_size; - /* Save information on MCS, TBS etc for the current initial transmission - * so we have access to it when retransmitting */ - cur_harq->sched_pusch = *sched_pusch; - /* save which time allocation and nrOfLayers have been used, to be used on - * retransmissions */ - cur_harq->sched_pusch.time_domain_allocation = sched_pusch->time_domain_allocation; - cur_harq->sched_pusch.nrOfLayers = sched_pusch->nrOfLayers; - cur_harq->sched_pusch.tpmi = sched_pusch->tpmi; - sched_ctrl->sched_ul_bytes += sched_pusch->tb_size; - UE->mac_stats.ul.total_rbs += sched_pusch->rbSize; - - } else { - LOG_D(NR_MAC, - "%d.%2d UL retransmission RNTI %04x sched %d.%2d HARQ PID %d round %d NDI %d\n", - frame, - slot, - rnti, - sched_pusch->frame, - sched_pusch->slot, - harq_id, - cur_harq->round, - cur_harq->ndi); - UE->mac_stats.ul.total_rbs_retx += sched_pusch->rbSize; - } - UE->mac_stats.ul.current_bytes = sched_pusch->tb_size; - UE->mac_stats.ul.current_rbs = sched_pusch->rbSize; - sched_ctrl->last_ul_frame = sched_pusch->frame; - sched_ctrl->last_ul_slot = sched_pusch->slot; - - LOG_D(NR_MAC, - "ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS Table %2d MCS %2d nrOfLayers %2d num_dmrs_cdm_grps_no_data %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n", - frame, - slot, - rnti, - sched_pusch->frame, - sched_pusch->slot, - sched_ctrl->aggregation_level, - sched_pusch->rbStart, - sched_pusch->rbSize, - sched_pusch->tda_info.startSymbolIndex, - sched_pusch->tda_info.nrOfSymbols, - sched_pusch->dmrs_info.ul_dmrs_symb_pos, - current_BWP->mcs_table, - sched_pusch->mcs, - sched_pusch->nrOfLayers, - sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data, - sched_pusch->tb_size, - harq_id, - cur_harq->round, - nr_get_rv(cur_harq->round % 4), - cur_harq->ndi, - sched_ctrl->estimated_ul_buffer, - sched_ctrl->sched_ul_bytes, - sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, - sched_ctrl->tpc0); - - /* PUSCH in a later slot, but corresponding DCI now! */ - const int index = ul_buffer_index(sched_pusch->frame, - sched_pusch->slot, - nr_mac->frame_structure.numb_slots_frame, - nr_mac->UL_tti_req_ahead_size); - nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nr_mac->UL_tti_req_ahead[0][index]; - if (future_ul_tti_req->SFN != sched_pusch->frame || future_ul_tti_req->Slot != sched_pusch->slot) - LOG_W(NR_MAC, - "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n", - frame, slot, - future_ul_tti_req->SFN, - future_ul_tti_req->Slot, - sched_pusch->frame, - sched_pusch->slot); - AssertFatal(future_ul_tti_req->n_pdus < - sizeof(future_ul_tti_req->pdus_list) / sizeof(future_ul_tti_req->pdus_list[0]), - "Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus); - - future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE; - future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t); - nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(future_ul_tti_req, - UE, - scc, - sched_pusch, - current_BWP->transform_precoding, - harq_id, - cur_harq->round, - current_BWP->pusch_Config && current_BWP->pusch_Config->frequencyHopping, - rnti); - future_ul_tti_req->n_pdus += 1; - - LOG_D(NR_MAC, - "%4d.%2d Scheduling UE specific PUSCH for sched %d.%d, ul_tti_req %d.%d\n", - frame, - slot, - sched_pusch->frame, - sched_pusch->slot, - future_ul_tti_req->SFN, - future_ul_tti_req->Slot); - - - // Calacualte the normalized tx_power for PHR - long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL; - int tbs_bits = pusch_pdu->pusch_data.tb_size << 3; - sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs, - tbs_bits, - sched_pusch->rbSize, - sched_pusch->nrOfLayers, - sched_pusch->tda_info.nrOfSymbols, - sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb, - deltaMCS, - false); - - /* look up the PDCCH PDU for this BWP and CORESET. If it does not exist, - * create it */ - NR_SearchSpace_t *ss = sched_ctrl->search_space; - NR_ControlResourceSet_t *coreset = sched_ctrl->coreset; - const int coresetid = coreset->controlResourceSetId; - nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = pdcch_pdu_coreset[coresetid]; - if (!pdcch_pdu) { - nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus]; - memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t)); - ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; - ul_dci_request_pdu->PDUSize = (uint8_t)(4+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); - pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; - ul_dci_req->numPdus += 1; - nr_configure_pdcch(pdcch_pdu, coreset, &sched_ctrl->sched_pdcch); - pdcch_pdu_coreset[coresetid] = pdcch_pdu; - } - - LOG_D(NR_MAC,"Configuring ULDCI/PDCCH in %d.%d at CCE %d, rnti %04x\n", frame,slot,sched_ctrl->cce_index,rnti); - - /* Fill PDCCH DL DCI PDU */ - nfapi_nr_dl_dci_pdu_t *dci_pdu = prepare_dci_pdu(pdcch_pdu, - scc, - ss, - coreset, - sched_ctrl->aggregation_level, - sched_ctrl->cce_index, - UE->UE_beam_index, - rnti); - pdcch_pdu->numDlDci++; - - dci_pdu_rel15_t uldci_payload; - memset(&uldci_payload, 0, sizeof(uldci_payload)); - if (current_BWP->dci_format == NR_UL_DCI_FORMAT_0_1) - LOG_D(NR_MAC_DCI, - "add ul dci harq %d for %d.%d %d.%d round %d\n", - harq_id, - frame, - slot, - sched_pusch->frame, - sched_pusch->slot, - sched_ctrl->ul_harq_processes[harq_id].round); - - // If nrOfLayers is the same as in srs_feedback, we use the best TPMI, i.e. the one in srs_feedback. - // Otherwise, we use the valid TPMI that we saved in the first transmission. - int *tpmi = NULL; - if (pusch_pdu->nrOfLayers != (sched_ctrl->srs_feedback.ul_ri + 1)) - tpmi = &sched_pusch->tpmi; - config_uldci(&UE->sc_info, - pusch_pdu, - &uldci_payload, - &sched_ctrl->srs_feedback, - tpmi, - sched_pusch->time_domain_allocation, - UE->UE_sched_ctrl.tpc0, - cur_harq->ndi, - current_BWP, - ss->searchSpaceType->present); - - // Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR - UE->UE_sched_ctrl.tpc0 = 1; - - fill_dci_pdu_rel15(&UE->sc_info, - &UE->current_DL_BWP, - current_BWP, - dci_pdu, - &uldci_payload, - current_BWP->dci_format, - TYPE_C_RNTI_, - current_BWP->bwp_id, - ss, - coreset, - UE->pdsch_HARQ_ACK_Codebook, - nr_mac->cset0_bwp_size); + post_process_ulsch(nr_mac, &pusch, UE, sched_pusch); memset(sched_pusch, 0, sizeof(*sched_pusch)); } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 84be6f4b5a..38ce8c2080 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -797,6 +797,17 @@ typedef struct { #define UE_iterator(BaSe, VaR) NR_UE_info_t ** VaR##pptr=BaSe, *VaR; while ((VaR=*(VaR##pptr++))) +typedef struct { + /// current frame for DCI + frame_t frame; + /// current slot for DCI + slot_t slot; + /// FAPI UL_DCI.request in which allocations are to be made + nfapi_nr_ul_dci_request_t *ul_dci_req; + /// group PDCCH PDU per CORESET + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_coreset[MAX_NUM_CORESET]; +} post_process_pusch_t; + typedef void (*nr_pp_impl_dl)(module_id_t mod_id, frame_t frame, slot_t slot); typedef bool (*nr_pp_impl_ul)(module_id_t mod_id, frame_t frame, slot_t slot); From fcebec09adce9c25efee1c792f9bb49884a533b8 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 09:20:31 +0200 Subject: [PATCH 02/34] Read TX power from HARQ.sched_pusch A later commit will remove sched_ctrl->sched_pusch. Instead, the TX power is also stored for each HARQ process (as they contain sched_pusch). Read it from there, which should have the same effect. --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index f6badf62eb..50958e0643 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -660,6 +660,7 @@ static void nr_rx_ra_sdu(const module_id_t mod_id, rnti_t rnti, uint8_t *sdu, const uint32_t sdu_len, + uint8_t harq_pid, const uint16_t timing_advance, const uint8_t ul_cqi, const uint16_t rssi) @@ -725,9 +726,11 @@ static void nr_rx_ra_sdu(const module_id_t mod_id, LOG_A(NR_MAC, "%4d.%2d PUSCH with TC_RNTI 0x%04x received correctly\n", frame, slot, rnti); NR_UE_sched_ctrl_t *UE_scheduling_control = &UE->UE_sched_ctrl; + DevAssert(harq_pid >= 0 && harq_pid < 8); if (ul_cqi != 0xff) { - UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, ul_cqi, 30, UE_scheduling_control->sched_pusch.phr_txpower_calc); - UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640 - UE_scheduling_control->sched_pusch.phr_txpower_calc * 10; + NR_UE_ul_harq_t *harq = &UE_scheduling_control->ul_harq_processes[harq_pid]; + UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, ul_cqi, 30, harq->sched_pusch.phr_txpower_calc); + UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640 - harq->sched_pusch.phr_txpower_calc * 10; } if (timing_advance != 0xffff) UE_scheduling_control->ta_update = timing_advance; @@ -943,7 +946,7 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP, } handle_nr_ul_harq(gNB_mac, UE, frameP, slotP, current_rnti, harq_pid, sduP == NULL); } else { - nr_rx_ra_sdu(gnb_mod_idP, CC_idP, frameP, slotP, current_rnti, sduP, sdu_lenP, timing_advance, ul_cqi, rssi); + nr_rx_ra_sdu(gnb_mod_idP, CC_idP, frameP, slotP, current_rnti, sduP, sdu_lenP, harq_pid, timing_advance, ul_cqi, rssi); } } From 243e956ee9793df6b98f5cadf9421c7085193f64 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 10:46:56 +0200 Subject: [PATCH 03/34] Remove unused parameter from sched_pusch --- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 1 - 1 file changed, 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 38ce8c2080..ea7d80a214 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -403,7 +403,6 @@ typedef struct NR_pusch_dmrs { typedef struct NR_sched_pusch { int frame; int slot; - int mu; /// RB allocation within active uBWP uint16_t rbSize; From f3068caa3774e121fb815ee2e9dbd3a6bc970f93 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 10:38:44 +0200 Subject: [PATCH 04/34] Store selected MCS in UE iterator PF uses MCS and average throughput to decide which UE to schedule. Thus, the first loop selects the MCS, and the second does the main UE allocation after sorting by priority, depending on the MCS. A follow-up commit will remove sched_pusch from NR_UE_sched_ctrl_t. Thus, we cannot rely on sched_ctrl to store the MCS in the first loop, and look it up from there in the second. Instead, store it as part of the UE iterator data, and take it from there. --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 50958e0643..aaabf7847e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1839,6 +1839,7 @@ static uint32_t ul_pf_tbs[5][29]; // pre-computed, approximate TBS values for PF typedef struct UEsched_s { float coef; NR_UE_info_t * UE; + int selected_mcs; } UEsched_t; static int comparator(const void *p, const void *q) { @@ -1964,12 +1965,12 @@ static void pf_ul(module_id_t module_id, const NR_bler_options_t *bo = &nrmac->ul_bler; const int max_mcs_table = (current_BWP->mcs_table == 0 || current_BWP->mcs_table == 2) ? 28 : 27; const int max_mcs = min(bo->max_mcs, max_mcs_table); /* no per-user maximum MCS yet */ + int selected_mcs; if (bo->harq_round_max == 1) { - sched_pusch->mcs = max_mcs; - sched_ctrl->ul_bler_stats.mcs = sched_pusch->mcs; + selected_mcs = sched_ctrl->ul_bler_stats.mcs = max_mcs; } else { - sched_pusch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->ul_bler_stats, max_mcs, frame); - LOG_D(NR_MAC, "%d.%d starting mcs %d bler %f\n", frame, slot, sched_pusch->mcs, sched_ctrl->ul_bler_stats.bler); + selected_mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->ul_bler_stats, max_mcs, frame); + LOG_D(NR_MAC, "%d.%d starting mcs %d bler %f\n", frame, slot, selected_mcs, sched_ctrl->ul_bler_stats.bler); } /* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled * based on data to transmit) */ @@ -2032,6 +2033,7 @@ static void pf_ul(module_id_t module_id, fill_pdcch_vrb_map(nrmac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, dci_beam.idx); NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; + sched_pusch->mcs = selected_mcs; update_ul_ue_R_Qm(sched_pusch->mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched_pusch->R, &sched_pusch->Qm); sched_pusch->rbStart = rbStart; sched_pusch->rbSize = min_rb; @@ -2077,7 +2079,7 @@ static void pf_ul(module_id_t module_id, /* Create UE_sched for UEs eligibale for new data transmission*/ /* Calculate coefficient*/ - const uint32_t tbs = ul_pf_tbs[current_BWP->mcs_table][sched_pusch->mcs]; + const uint32_t tbs = ul_pf_tbs[current_BWP->mcs_table][selected_mcs]; float coeff_ue = (float) tbs / UE->ul_thr_ue; LOG_D(NR_MAC, "[UE %04x][%4d.%2d] b %d, ul_thr_ue %f, tbs %d, coeff_ue %f\n", UE->rnti, @@ -2089,6 +2091,7 @@ static void pf_ul(module_id_t module_id, coeff_ue); UE_sched[curUE].coef = coeff_ue; UE_sched[curUE].UE = UE; + UE_sched[curUE].selected_mcs = selected_mcs; curUE++; } @@ -2192,6 +2195,7 @@ static void pf_ul(module_id_t module_id, /* Calculate the current scheduling bytes */ const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0); + sched_pusch->mcs = iterator->selected_mcs; /* adjust rbSize and MCS according to PHR and BPRE */ if(sched_ctrl->pcmax != 0 || sched_ctrl->ph != 0) // verify if the PHR related parameter have been initialized nr_ue_max_mcs_min_rb(current_BWP->scs, sched_ctrl->ph, sched_pusch, current_BWP, min_rb, B, &max_rbSize, &sched_pusch->mcs); From 81b66fae5e7fb6f9090aec83d26af07ba57dac7d Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 10:51:56 +0200 Subject: [PATCH 05/34] UL harq PID: similar to parent, reduce scope of sched_pusch --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index aaabf7847e..4007d0edea 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1826,6 +1826,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, sched_pusch->bwp_info = bwp_info; sched_pusch->rbStart = rbStart; + sched_pusch->ul_harq_pid = harq_pid; /* no need to recompute the TBS, it will be the same */ /* Mark the corresponding RBs as used */ @@ -1908,9 +1909,9 @@ static void pf_ul(module_id_t module_id, uint16_t *rballoc_mask = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE]; /* Check if retransmission is necessary */ - sched_pusch->ul_harq_pid = sched_ctrl->retrans_ul_harq.head; - LOG_D(NR_MAC,"pf_ul: UE %04x harq_pid %d\n", UE->rnti, sched_pusch->ul_harq_pid); - if (sched_pusch->ul_harq_pid >= 0) { + int ul_harq_pid = sched_ctrl->retrans_ul_harq.head; + LOG_D(NR_MAC,"pf_ul: UE %04x harq_pid %d\n", UE->rnti, ul_harq_pid); + if (ul_harq_pid >= 0) { /* Allocate retransmission*/ const int tda = get_ul_tda(nrmac, sched_frame, sched_slot); bool r = allocate_ul_retransmission(nrmac, @@ -1920,7 +1921,7 @@ static void pf_ul(module_id_t module_id, &n_rb_sched[beam.idx], dci_beam.idx, UE, - sched_pusch->ul_harq_pid, + ul_harq_pid, scc, tda); if (!r) { @@ -1936,6 +1937,7 @@ static void pf_ul(module_id_t module_id, remainUEs[beam.idx]--; continue; } + DevAssert(ul_harq_pid == -1); // all other allocations must be new ones /* skip this UE if there are no free HARQ processes. This can happen e.g. * if the UE disconnected in L2sim, in which case the gNB is not notified @@ -2040,6 +2042,7 @@ static void pf_ul(module_id_t module_id, sched_pusch->bwp_info = bwp_info; sched_pusch->frame = sched_frame; sched_pusch->slot = sched_slot; + sched_pusch->ul_harq_pid = -1; // new transmission sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm, sched_pusch->R, sched_pusch->rbSize, @@ -2236,6 +2239,7 @@ static void pf_ul(module_id_t module_id, sched_pusch->bwp_info = bwp_info; sched_pusch->frame = sched_frame; sched_pusch->slot = sched_slot; + sched_pusch->ul_harq_pid = -1; // new transmission LOG_D(NR_MAC, "rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n", rbSize, From 5b39baacc3cfd0d8e034c75ef4d3def506278b2b Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 11:02:59 +0200 Subject: [PATCH 06/34] Refactor inactivity-based PUSCH allocation Write a single NR_sched_pusch_t structure in a single statement (where possible). Assign to sched_ctrl->sched_pusch in one place, where the post-processing functionality will be called in a follow-up commit. --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 104 +++++++++--------- 1 file changed, 53 insertions(+), 51 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 4007d0edea..afa7bb5a68 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1879,7 +1879,6 @@ static void pf_ul(module_id_t module_id, LOG_D(NR_MAC,"pf_ul: preparing UL scheduling for UE %04x\n",UE->rnti); NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP; - NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; const NR_mac_dir_stats_t *stats = &UE->mac_stats.ul; /* Calculate throughput */ @@ -1995,29 +1994,21 @@ static void pf_ul(module_id_t module_id, continue; } - sched_pusch->nrOfLayers = get_ul_nrOfLayers(sched_ctrl, current_BWP->dci_format); - sched_pusch->time_domain_allocation = get_ul_tda(nrmac, sched_frame, sched_slot); - sched_pusch->tda_info = get_ul_tda_info(current_BWP, + int tda = get_ul_tda(nrmac, sched_frame, sched_slot); + NR_tda_info_t tda_info = get_ul_tda_info(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, TYPE_C_RNTI_, - sched_pusch->time_domain_allocation); - AssertFatal(sched_pusch->tda_info.valid_tda, "Invalid TDA from get_ul_tda_info\n"); - sched_pusch->dmrs_info = get_ul_dmrs_params(scc, current_BWP, &sched_pusch->tda_info, sched_pusch->nrOfLayers); + tda); + AssertFatal(tda_info.valid_tda, "Invalid TDA from get_ul_tda_info\n"); int rbStart = 0; // wrt BWP start - LOG_D(NR_MAC, - "Looking for min_rb %d RBs, starting at %d num_dmrs_cdm_grps_no_data %d\n", - min_rb, - rbStart, - sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data); - bwp_info_t bwp_info = get_pusch_bwp_start_size(UE); - const uint32_t bwpStart = bwp_info.bwpStart; - const uint32_t bwpSize = bwp_info.bwpSize; - const uint16_t slbitmap = SL_to_bitmap(sched_pusch->tda_info.startSymbolIndex, sched_pusch->tda_info.nrOfSymbols); - while (rbStart < bwpSize && (rballoc_mask[rbStart + bwpStart] & slbitmap)) + LOG_D(NR_MAC, "Looking for min_rb %d RBs, starting at %d\n", min_rb, rbStart); + bwp_info_t bi = get_pusch_bwp_start_size(UE); + const uint16_t slbitmap = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); + while (rbStart < bi.bwpSize && (rballoc_mask[rbStart + bi.bwpStart] & slbitmap)) rbStart++; - if (rbStart + min_rb > bwpSize) { + if (rbStart + min_rb > bi.bwpSize) { LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not allocate continuous UL data: no resources (rbStart %d, min_rb %d, bwpSize %d)\n", UE->rnti, @@ -2025,7 +2016,7 @@ static void pf_ul(module_id_t module_id, slot, rbStart, min_rb, - bwpSize); + bi.bwpSize); reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam); reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam); continue; @@ -2034,47 +2025,58 @@ static void pf_ul(module_id_t module_id, sched_ctrl->cce_index = CCEIndex; fill_pdcch_vrb_map(nrmac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, dci_beam.idx); - NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; - sched_pusch->mcs = selected_mcs; - update_ul_ue_R_Qm(sched_pusch->mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched_pusch->R, &sched_pusch->Qm); - sched_pusch->rbStart = rbStart; - sched_pusch->rbSize = min_rb; - sched_pusch->bwp_info = bwp_info; - sched_pusch->frame = sched_frame; - sched_pusch->slot = sched_slot; - sched_pusch->ul_harq_pid = -1; // new transmission - sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm, - sched_pusch->R, - sched_pusch->rbSize, - sched_pusch->tda_info.nrOfSymbols, - sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb, - 0, // nb_rb_oh - 0, - sched_pusch->nrOfLayers) >> 3; + int nrOfLayers = get_ul_nrOfLayers(sched_ctrl, current_BWP->dci_format); + NR_sched_pusch_t sched = { + .frame = sched_frame, + .slot = sched_slot, + .rbSize = min_rb, + .rbStart = rbStart, + .mcs = selected_mcs, + // R, Qm, tb_size below + .ul_harq_pid = -1, // new transmission + .nrOfLayers = nrOfLayers, + // tpmi in post-process + .time_domain_allocation = tda, + .tda_info = tda_info, + .dmrs_info = get_ul_dmrs_params(scc, current_BWP, &tda_info, nrOfLayers), + .bwp_info = bi, + // phr_txpower_calc below + }; + update_ul_ue_R_Qm(sched.mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched.R, &sched.Qm); + sched.tb_size = nr_compute_tbs(sched.Qm, + sched.R, + sched.rbSize, + sched.tda_info.nrOfSymbols, + sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, + 0, // nb_rb_oh + 0, + sched.nrOfLayers) + >> 3; long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL; - sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs, - sched_pusch->tb_size << 3, - sched_pusch->rbSize, - sched_pusch->nrOfLayers, - sched_pusch->tda_info.nrOfSymbols, - sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb, - deltaMCS, - false); + sched.phr_txpower_calc = compute_ph_factor(current_BWP->scs, + sched.tb_size << 3, + sched.rbSize, + sched.nrOfLayers, + sched.tda_info.nrOfSymbols, + sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, + deltaMCS, + false); + sched_ctrl->sched_pusch = sched; LOG_D(NR_MAC, "pf_ul %d.%d UE %x Scheduling PUSCH (no data) nrb %d mcs %d tbs %d bits phr_txpower %d\n", frame, slot, UE->rnti, - sched_pusch->rbSize, - sched_pusch->mcs, - sched_pusch->tb_size << 3, - sched_pusch->phr_txpower_calc); + sched.rbSize, + sched.mcs, + sched.tb_size << 3, + sched.phr_txpower_calc); /* Mark the corresponding RBs as used */ - n_rb_sched[beam.idx] -= sched_pusch->rbSize; - for (int rb = bwpStart; rb < sched_ctrl->sched_pusch.rbSize; rb++) - rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] |= slbitmap; + n_rb_sched[beam.idx] -= sched.rbSize; + for (int rb = bi.bwpStart; rb < sched.rbSize; rb++) + rballoc_mask[rb + sched.rbStart] |= slbitmap; remainUEs[beam.idx]--; continue; From a469f420857141563588c5cacc3ad0f674b6af63 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 11:32:45 +0200 Subject: [PATCH 07/34] Refactor retransmission's NR_sched_pusch_t usage Avoid to overwrite the existing retInfo. Instead, create a new NR_sched_pusch_t and assign to sched_ctrl->sched_pusch in one place. A follow-up commit will directly trigger the post processor here. --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 49 ++++++++++--------- 1 file changed, 25 insertions(+), 24 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index afa7bb5a68..c5f74fe25e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1712,7 +1712,9 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, { const int CC_id = 0; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; - NR_sched_pusch_t *retInfo = &sched_ctrl->ul_harq_processes[harq_pid].sched_pusch; + /* Get previous PUSCH field info */ + const NR_sched_pusch_t *retInfo = &sched_ctrl->ul_harq_processes[harq_pid].sched_pusch; + NR_sched_pusch_t new_sched = *retInfo; // potential new allocation NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP; int rbStart = 0; // wrt BWP start @@ -1721,7 +1723,6 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, const uint32_t bwpStart = bwp_info.bwpStart; const uint8_t nrOfLayers = retInfo->nrOfLayers; LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda); - LOG_D(NR_MAC,"tbs %d\n",retInfo->tb_size); NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, @@ -1730,6 +1731,13 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, if (!tda_info.valid_tda) return false; + /* mark when retransmission will happen */ + int slots_frame = nrmac->frame_structure.numb_slots_frame; + new_sched.frame = (frame + (slot + tda_info.k2 + get_NTN_Koffset(scc)) / slots_frame) % MAX_FRAME_NUMBER; + new_sched.slot = (slot + tda_info.k2 + get_NTN_Koffset(scc)) % slots_frame; + new_sched.bwp_info = bwp_info; + DevAssert(new_sched.ul_harq_pid == harq_pid); + bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == tda_info.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= tda_info.nrOfSymbols); if (reuse_old_tda && nrOfLayers == retInfo->nrOfLayers) { /* Check the resource is enough for retransmission */ @@ -1746,6 +1754,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, bwpSize); return false; } + new_sched.rbStart = rbStart; LOG_D(NR_MAC, "Retransmission keeping TDA %d and TBS %d\n", tda, retInfo->tb_size); } else { NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, nrOfLayers); @@ -1782,11 +1791,12 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, LOG_D(NR_MAC, "Retransmission with TDA %d->%d and TBS %d -> %d\n", retInfo->time_domain_allocation, tda, retInfo->tb_size, new_tbs); /* we can allocate it. Overwrite the time_domain_allocation, the number * of RBs, and the new TB size. The rest is done below */ - retInfo->tb_size = new_tbs; - retInfo->rbSize = new_rbSize; - retInfo->time_domain_allocation = tda; - retInfo->dmrs_info = dmrs_info; - retInfo->tda_info = tda_info; + new_sched.rbSize = new_rbSize; + new_sched.rbStart = rbStart; + new_sched.tb_size = new_tbs; + new_sched.time_domain_allocation = tda; + new_sched.tda_info = tda_info; + new_sched.dmrs_info = dmrs_info; } /* Find a free CCE */ @@ -1808,31 +1818,22 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, sched_ctrl->cce_index = CCEIndex; fill_pdcch_vrb_map(nrmac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, dci_beam_idx); - int slots_frame = nrmac->frame_structure.numb_slots_frame; - retInfo->frame = (frame + (slot + tda_info.k2 + get_NTN_Koffset(scc)) / slots_frame) % MAX_FRAME_NUMBER; - retInfo->slot = (slot + tda_info.k2 + get_NTN_Koffset(scc)) % slots_frame; - /* Get previous PSUCH field info */ - sched_ctrl->sched_pusch = *retInfo; - NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; + // signal new allocation + sched_ctrl->sched_pusch = new_sched; LOG_D(NR_MAC, "%4d.%2d Allocate UL retransmission RNTI %04x sched %4d.%2d (%d RBs)\n", frame, slot, UE->rnti, - sched_pusch->frame, - sched_pusch->slot, - sched_pusch->rbSize); - - sched_pusch->bwp_info = bwp_info; - sched_pusch->rbStart = rbStart; - sched_pusch->ul_harq_pid = harq_pid; - /* no need to recompute the TBS, it will be the same */ + new_sched.frame, + new_sched.slot, + new_sched.rbSize); /* Mark the corresponding RBs as used */ - n_rb_sched -= sched_pusch->rbSize; - for (int rb = bwpStart; rb < sched_ctrl->sched_pusch.rbSize; rb++) - rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] |= SL_to_bitmap(sched_pusch->tda_info.startSymbolIndex, sched_pusch->tda_info.nrOfSymbols); + n_rb_sched -= new_sched.rbSize; + for (int rb = bwpStart; rb < new_sched.rbSize; rb++) + rballoc_mask[rb + new_sched.rbStart] |= SL_to_bitmap(new_sched.tda_info.startSymbolIndex, new_sched.tda_info.nrOfSymbols); return true; } From 4772dd889ebf1323c7278ea2409a37d15603855d Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 11:51:23 +0200 Subject: [PATCH 08/34] Refactor ULSCH main allocation procedure Write a single NR_sched_pusch_t structure in a single statement (where possible). Assign to sched_ctrl->sched_pusch in one place, where the post-processing functionality will be called in a follow-up commit. --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 118 +++++++++--------- 1 file changed, 61 insertions(+), 57 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index c5f74fe25e..493c2a37e0 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -2108,7 +2108,6 @@ static void pf_ul(module_id_t module_id, while (iterator->UE != NULL) { NR_UE_UL_BWP_t *current_BWP = &iterator->UE->current_UL_BWP; NR_UE_sched_ctrl_t *sched_ctrl = &iterator->UE->UE_sched_ctrl; - NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame); if (beam.idx < 0) { @@ -2152,33 +2151,28 @@ static void pf_ul(module_id_t module_id, LOG_D(NR_MAC, "%4d.%2d free CCE for UL DCI UE %04x\n", frame, slot, iterator->UE->rnti); - - sched_pusch->nrOfLayers = get_ul_nrOfLayers(sched_ctrl, current_BWP->dci_format); - sched_pusch->time_domain_allocation = get_ul_tda(nrmac, sched_frame, sched_slot); - sched_pusch->tda_info = get_ul_tda_info(current_BWP, - sched_ctrl->coreset->controlResourceSetId, - sched_ctrl->search_space->searchSpaceType->present, - TYPE_C_RNTI_, - sched_pusch->time_domain_allocation); - AssertFatal(sched_pusch->tda_info.valid_tda, "Invalid TDA from get_ul_tda_info\n"); - sched_pusch->dmrs_info = get_ul_dmrs_params(scc, current_BWP, &sched_pusch->tda_info, sched_pusch->nrOfLayers); + int tda = get_ul_tda(nrmac, sched_frame, sched_slot); + NR_tda_info_t tda_info = get_ul_tda_info(current_BWP, + sched_ctrl->coreset->controlResourceSetId, + sched_ctrl->search_space->searchSpaceType->present, + TYPE_C_RNTI_, + tda); + AssertFatal(tda_info.valid_tda, "Invalid TDA from get_ul_tda_info\n"); const int index = ul_buffer_index(sched_frame, sched_slot, slots_per_frame, nrmac->vrb_map_UL_size); uint16_t *rballoc_mask = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE]; + /* find maximum amount of RBs that we can schedule starting from first free RB */ int rbStart = 0; - const uint16_t slbitmap = SL_to_bitmap(sched_pusch->tda_info.startSymbolIndex, sched_pusch->tda_info.nrOfSymbols); - bwp_info_t bwp_info = get_pusch_bwp_start_size(iterator->UE); - const uint32_t bwpStart = bwp_info.bwpStart; - const uint32_t bwpSize = bwp_info.bwpSize; - while (rbStart < bwpSize && (rballoc_mask[rbStart + bwpStart] & slbitmap)) + const uint16_t slbitmap = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); + bwp_info_t bi = get_pusch_bwp_start_size(iterator->UE); + while (rbStart < bi.bwpSize && (rballoc_mask[rbStart + bi.bwpStart] & slbitmap)) rbStart++; - sched_pusch->rbStart = rbStart; uint16_t max_rbSize = 1; - while (rbStart + max_rbSize < bwpSize && !(rballoc_mask[rbStart + bwpStart + max_rbSize] & slbitmap)) + while (rbStart + max_rbSize < bi.bwpSize && !(rballoc_mask[rbStart + bi.bwpStart + max_rbSize] & slbitmap)) max_rbSize++; - if (rbStart + min_rb > bwpSize || max_rbSize < min_rb) { + if (rbStart + min_rb > bi.bwpSize || max_rbSize < min_rb) { reset_beam_status(&nrmac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, dci_beam.new_beam); reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam); LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not allocate UL data: no resources (rbStart %d, min_rb %d, bwpSize %d)\n", @@ -2187,7 +2181,7 @@ static void pf_ul(module_id_t module_id, slot, rbStart, min_rb, - bwpSize); + bi.bwpSize); iterator++; continue; } else @@ -2197,72 +2191,82 @@ static void pf_ul(module_id_t module_id, rbStart, min_rb, max_rbSize, - bwpSize); + bi.bwpSize); + + int nrOfLayers = get_ul_nrOfLayers(sched_ctrl, current_BWP->dci_format); + NR_sched_pusch_t sched = { + .frame = sched_frame, + .slot = sched_slot, + // rbSize set further below + .rbStart = rbStart, + .mcs = iterator->selected_mcs, + // R, Qm, tb_size set further below + .ul_harq_pid = -1, // new transmission + .nrOfLayers = nrOfLayers, + // tpmi in post-process + .time_domain_allocation = tda, + .tda_info = tda_info, + .dmrs_info = get_ul_dmrs_params(scc, current_BWP, &tda_info, nrOfLayers), + .bwp_info = bi, + // phr_txpower_calc below + }; /* Calculate the current scheduling bytes */ const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0); - sched_pusch->mcs = iterator->selected_mcs; /* adjust rbSize and MCS according to PHR and BPRE */ if(sched_ctrl->pcmax != 0 || sched_ctrl->ph != 0) // verify if the PHR related parameter have been initialized - nr_ue_max_mcs_min_rb(current_BWP->scs, sched_ctrl->ph, sched_pusch, current_BWP, min_rb, B, &max_rbSize, &sched_pusch->mcs); + nr_ue_max_mcs_min_rb(current_BWP->scs, sched_ctrl->ph, &sched, current_BWP, min_rb, B, &max_rbSize, &sched.mcs); - if (sched_pusch->mcs < sched_ctrl->ul_bler_stats.mcs) - sched_ctrl->ul_bler_stats.mcs = sched_pusch->mcs; /* force estimated MCS down */ + if (sched.mcs < sched_ctrl->ul_bler_stats.mcs) + sched_ctrl->ul_bler_stats.mcs = sched.mcs; /* force estimated MCS down */ - update_ul_ue_R_Qm(sched_pusch->mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched_pusch->R, &sched_pusch->Qm); - uint16_t rbSize = 0; - uint32_t TBS = 0; - nr_find_nb_rb(sched_pusch->Qm, - sched_pusch->R, + update_ul_ue_R_Qm(sched.mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched.R, &sched.Qm); + nr_find_nb_rb(sched.Qm, + sched.R, current_BWP->transform_precoding, - sched_pusch->nrOfLayers, - sched_pusch->tda_info.nrOfSymbols, - sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb, + sched.nrOfLayers, + sched.tda_info.nrOfSymbols, + sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, B, min_rb, max_rbSize, - &TBS, - &rbSize); + &sched.tb_size, + &sched.rbSize); // Calacualte the normalized tx_power for PHR long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL; - int tbs_bits = TBS << 3; + int tbs_bits = sched.tb_size << 3; - sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs, - tbs_bits, - rbSize, - sched_pusch->nrOfLayers, - sched_pusch->tda_info.nrOfSymbols, - sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb, - deltaMCS, - false); + sched.phr_txpower_calc = compute_ph_factor(current_BWP->scs, + tbs_bits, + sched.rbSize, + sched.nrOfLayers, + sched.tda_info.nrOfSymbols, + sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, + deltaMCS, + false); - sched_pusch->rbSize = rbSize; - sched_pusch->tb_size = TBS; - sched_pusch->bwp_info = bwp_info; - sched_pusch->frame = sched_frame; - sched_pusch->slot = sched_slot; - sched_pusch->ul_harq_pid = -1; // new transmission LOG_D(NR_MAC, "rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n", - rbSize, + sched.rbSize, max_rbSize, - sched_pusch->tb_size, + sched.tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B, sched_ctrl->cce_index, - sched_pusch->dmrs_info.num_dmrs_symb, - sched_pusch->dmrs_info.N_PRB_DMRS); + sched.dmrs_info.num_dmrs_symb, + sched.dmrs_info.N_PRB_DMRS); /* Mark the corresponding RBs as used */ sched_ctrl->cce_index = CCEIndex; fill_pdcch_vrb_map(nrmac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, dci_beam.idx); - n_rb_sched[beam.idx] -= sched_pusch->rbSize; - for (int rb = bwpStart; rb < sched_ctrl->sched_pusch.rbSize; rb++) - rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] |= slbitmap; + sched_ctrl->sched_pusch = sched; + n_rb_sched[beam.idx] -= sched.rbSize; + for (int rb = bi.bwpStart; rb < sched.rbSize; rb++) + rballoc_mask[rb + sched.rbStart] |= slbitmap; /* reduce max_num_ue once we are sure UE can be allocated, i.e., has CCE */ remainUEs[beam.idx]--; From d71cec79586c266c3a691ee719de8632bcc60ba1 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 12:08:13 +0200 Subject: [PATCH 09/34] Refactor ULSCH phy-test scheduler Write a single NR_sched_pusch_t structure in a single statement (where possible). Assign to sched_ctrl->sched_pusch later, where the post-processing functionality will be called in a follow-up commit. --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 81 +++++++++---------- 1 file changed, 37 insertions(+), 44 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index a470c48bc4..deaae2affb 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -232,6 +232,11 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo return false; } + const int bw = ul_bwp->BWPSize; + const int BWPStart = ul_bwp->BWPStart; + uint16_t rbStart = 0; + uint16_t rbSize = min(bw, target_ul_bw); + NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, @@ -259,17 +264,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo if (!is_xlsch_in_slot(ulsch_slot_bitmap, slot_period)) return false; - uint16_t rbStart = 0; - uint16_t rbSize; - - const int bw = ul_bwp->BWPSize; - const int BWPStart = ul_bwp->BWPStart; - - if (target_ul_bw>bw) - rbSize = bw; - else - rbSize = target_ul_bw; - NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, @@ -277,8 +271,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo tda); if (!tda_info.valid_tda) return false; - sched_ctrl->sched_pusch.tda_info = tda_info; - sched_ctrl->sched_pusch.time_domain_allocation = tda; // TODO implement beam procedures for phy-test mode int beam = 0; @@ -292,9 +284,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo } } - sched_ctrl->sched_pusch.slot = sched_slot; - sched_ctrl->sched_pusch.frame = sched_frame; - int CCEIndex = get_cce_index(nr_mac, CC_id, slot, UE->rnti, &sched_ctrl->aggregation_level, @@ -311,40 +300,44 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo sched_ctrl->cce_index = CCEIndex; - const int mcs = target_ul_mcs; - NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; - sched_pusch->mcs = mcs; - sched_ctrl->ul_bler_stats.mcs = mcs; /* for logging output */ - sched_pusch->rbStart = rbStart; - sched_pusch->rbSize = rbSize; - /* get the PID of a HARQ process awaiting retransmission, or -1 for "any new" */ - sched_pusch->ul_harq_pid = sched_ctrl->retrans_ul_harq.head; + NR_sched_pusch_t sched = { + .frame = sched_frame, + .slot = sched_slot, + .rbSize = rbSize, + .rbStart = rbStart, + .mcs = target_ul_mcs, + // R, Qm, tb_size set further below + // PID of a HARQ process awaiting retransmission, or -1 for "any new" + .ul_harq_pid = sched_ctrl->retrans_ul_harq.head, + .nrOfLayers = target_ul_Nl, + // tpmi in post-process + .time_domain_allocation = tda, + .tda_info = tda_info, + .dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, target_ul_Nl), + .bwp_info = get_pusch_bwp_start_size(UE), + }; + sched_ctrl->ul_bler_stats.mcs = sched.mcs; /* for logging output */ /* Calculate TBS from MCS */ - sched_pusch->nrOfLayers = target_ul_Nl; - sched_pusch->R = nr_get_code_rate_ul(mcs, ul_bwp->mcs_table); - sched_pusch->Qm = nr_get_Qm_ul(mcs, ul_bwp->mcs_table); + sched.R = nr_get_code_rate_ul(sched.mcs, ul_bwp->mcs_table); + sched.Qm = nr_get_Qm_ul(sched.mcs, ul_bwp->mcs_table); if (ul_bwp->pusch_Config->tp_pi2BPSK - && ((ul_bwp->mcs_table == 3 && mcs < 2) || (ul_bwp->mcs_table == 4 && mcs < 6))) { - sched_pusch->R >>= 1; - sched_pusch->Qm <<= 1; + && ((ul_bwp->mcs_table == 3 && sched.mcs < 2) || (ul_bwp->mcs_table == 4 && sched.mcs < 6))) { + sched.R >>= 1; + sched.Qm <<= 1; } - NR_pusch_dmrs_t dmrs = get_ul_dmrs_params(scc, - ul_bwp, - &tda_info, - sched_pusch->nrOfLayers); - sched_ctrl->sched_pusch.dmrs_info = dmrs; + sched.tb_size = nr_compute_tbs(sched.Qm, + sched.R, + sched.rbSize, + tda_info.nrOfSymbols, + sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, + 0, // nb_rb_oh + 0, + sched.nrOfLayers /* NrOfLayers */) + >> 3; - sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm, - sched_pusch->R, - sched_pusch->rbSize, - tda_info.nrOfSymbols, - dmrs.N_PRB_DMRS * dmrs.num_dmrs_symb, - 0, // nb_rb_oh - 0, - sched_pusch->nrOfLayers /* NrOfLayers */) - >> 3; + sched_ctrl->sched_pusch = sched; /* mark the corresponding RBs as used */ fill_pdcch_vrb_map(nr_mac, From dd9803020227a230a799f22b29c167beedc0f842 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 17:23:52 +0200 Subject: [PATCH 10/34] Refactor to call post-processor in place Remove sched_ctrl->sched_ulsch, and call the post-processing function post_process_ulsch() in the places where sched_ctrl->sched_ulsch has been assigned. This will have two effects: - it is not necessary to have the final loop over all UEs, which might be costly especially towards many UEs. - till now, there is only a single sched_ulsch; however, a later commit will allow to schedule multiple PUSCH transmissions from a single (DL) slot. This would require to make sched_ctrl->sched_ulsch, and also iterate through all sched_ulsch. In this new scheme, we can simply call post_process_ulsch() multiple times, which is simpler (and therefore, implicitly handleded as of this commit). --- .../RAN_FUNCTION/CUSTOMIZED/ran_func_mac.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 27 +++--- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 1 - .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 92 ++++++++----------- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 4 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 9 +- 6 files changed, 62 insertions(+), 73 deletions(-) diff --git a/openair2/E2AP/RAN_FUNCTION/CUSTOMIZED/ran_func_mac.c b/openair2/E2AP/RAN_FUNCTION/CUSTOMIZED/ran_func_mac.c index 5a451cff01..13b6306a1c 100644 --- a/openair2/E2AP/RAN_FUNCTION/CUSTOMIZED/ran_func_mac.c +++ b/openair2/E2AP/RAN_FUNCTION/CUSTOMIZED/ran_func_mac.c @@ -66,7 +66,7 @@ bool read_mac_sm(void* data) } if (is_ul_slot(rd->slot, &RC.nrmac[mod_id]->frame_structure)) { rd->ul_curr_tbs = UE->mac_stats.ul.current_bytes; - rd->ul_sched_rb = sched_ctrl->sched_pusch.rbSize; + rd->ul_sched_rb = UE->mac_stats.ul.current_rbs; } rd->rnti = UE->rnti; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index deaae2affb..6323ab4c6a 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -208,9 +208,11 @@ uint32_t target_ul_mcs = 9; uint32_t target_ul_bw = 50; uint32_t target_ul_Nl = 1; uint64_t ulsch_slot_bitmap = (1 << 8); -bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot) +void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_pusch) { - gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; + int frame = pp_pusch->frame; + int slot = pp_pusch->slot; + /* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */ NR_COMMON_channels_t *cc = nr_mac->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; @@ -219,7 +221,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo AssertFatal(nr_mac->UE_info.connected_ue_list[1] == NULL, "cannot handle more than one UE\n"); if (UE == NULL) - return false; + return; const int CC_id = 0; @@ -229,7 +231,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo /* return if all UL HARQ processes wait for feedback */ if (sched_ctrl->retrans_ul_harq.head == -1 && sched_ctrl->available_ul_harq.head == -1) { LOG_D(NR_MAC, "[UE %04x][%4d.%2d] UE has no free UL HARQ process, skipping\n", UE->rnti, frame, slot); - return false; + return; } const int bw = ul_bwp->BWPSize; @@ -243,7 +245,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo TYPE_C_RNTI_); const int temp_tda = get_ul_tda(nr_mac, frame, slot); if (temp_tda < 0) - return false; + return; AssertFatal(temp_tda < tdaList->list.count, "time domain assignment %d >= %d\n", temp_tda, tdaList->list.count); const int mu = ul_bwp->scs; int K2 = get_K2(tdaList, temp_tda, mu, scc); @@ -252,17 +254,18 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo const int sched_slot = (slot + K2) % slots_frame; const int tda = get_ul_tda(nr_mac, sched_frame, sched_slot); if (tda < 0) - return false; + return; AssertFatal(tda < tdaList->list.count, "time domain assignment %d >= %d\n", tda, tdaList->list.count); + /* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE * limitations). Note that if K2 or the TDD configuration is changed, below * conditions might exclude each other and never be true */ int slot_period = sched_slot % nr_mac->frame_structure.numb_slots_period; if (!is_xlsch_in_slot(ulsch_slot_bitmap, slot_period)) - return false; + return; NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, sched_ctrl->coreset->controlResourceSetId, @@ -270,7 +273,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo TYPE_C_RNTI_, tda); if (!tda_info.valid_tda) - return false; + return; // TODO implement beam procedures for phy-test mode int beam = 0; @@ -280,7 +283,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo for (int i = rbStart; i < rbStart + rbSize; ++i) { if ((vrb_map_UL[i+BWPStart] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) != 0) { LOG_E(MAC, "%4d.%2d RB %d is already reserved, cannot schedule UE\n", frame, slot, i); - return false; + return; } } @@ -295,7 +298,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo 0); if (CCEIndex < 0) { LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); - return false; + return; } sched_ctrl->cce_index = CCEIndex; @@ -337,7 +340,8 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo sched.nrOfLayers /* NrOfLayers */) >> 3; - sched_ctrl->sched_pusch = sched; + /* save allocation to FAPI structures */ + post_process_ulsch(nr_mac, pp_pusch, UE, &sched); /* mark the corresponding RBs as used */ fill_pdcch_vrb_map(nr_mac, @@ -349,5 +353,4 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slo for (int rb = rbStart; rb < rbStart + rbSize; rb++) vrb_map_UL[rb+BWPStart] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); - return true; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index f8c842706c..a6de5b987d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -2692,7 +2692,6 @@ NR_UE_info_t *get_new_nr_ue_inst(uid_allocator_t *uia, rnti_t rnti, NR_CellGroup /* set illegal time domain allocation to force recomputation of all fields */ sched_ctrl->sched_pdsch.time_domain_allocation = -1; - sched_ctrl->sched_pusch.time_domain_allocation = -1; /* Set default BWPs */ AssertFatal(UE->sc_info.n_ul_bwp <= NR_MAX_NUM_BWP, "uplinkBWP_ToAddModList has %d BWP!\n", UE->sc_info.n_ul_bwp); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 493c2a37e0..4e8bce0392 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1700,17 +1700,18 @@ static void nr_ue_max_mcs_min_rb(int mu, } static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, - frame_t frame, - slot_t slot, - uint16_t *rballoc_mask, - int *n_rb_sched, - int dci_beam_idx, - NR_UE_info_t* UE, - int harq_pid, - const NR_ServingCellConfigCommon_t *scc, - const int tda) + post_process_pusch_t *pp_pusch, + uint16_t *rballoc_mask, + int *n_rb_sched, + int dci_beam_idx, + NR_UE_info_t *UE, + int harq_pid, + const NR_ServingCellConfigCommon_t *scc, + const int tda) { const int CC_id = 0; + int frame = pp_pusch->frame; + int slot = pp_pusch->slot; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; /* Get previous PUSCH field info */ const NR_sched_pusch_t *retInfo = &sched_ctrl->ul_harq_processes[harq_pid].sched_pusch; @@ -1820,7 +1821,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, fill_pdcch_vrb_map(nrmac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, dci_beam_idx); // signal new allocation - sched_ctrl->sched_pusch = new_sched; + post_process_ulsch(nrmac, pp_pusch, UE, &new_sched); LOG_D(NR_MAC, "%4d.%2d Allocate UL retransmission RNTI %04x sched %4d.%2d (%d RBs)\n", frame, @@ -1848,9 +1849,8 @@ static int comparator(const void *p, const void *q) { return ((UEsched_t*)p)->coef < ((UEsched_t*)q)->coef; } -static void pf_ul(module_id_t module_id, - frame_t frame, - int slot, +static void pf_ul(gNB_MAC_INST *nrmac, + post_process_pusch_t *pp_pusch, frame_t sched_frame, int sched_slot, NR_UE_info_t *UE_list[], @@ -1859,7 +1859,8 @@ static void pf_ul(module_id_t module_id, int n_rb_sched[num_beams]) { const int CC_id = 0; - gNB_MAC_INST *nrmac = RC.nrmac[module_id]; + int frame = pp_pusch->frame; + int slot = pp_pusch->slot; NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon; int slots_per_frame = nrmac->frame_structure.numb_slots_frame; const int min_rb = nrmac->min_grant_prb; @@ -1880,13 +1881,16 @@ static void pf_ul(module_id_t module_id, LOG_D(NR_MAC,"pf_ul: preparing UL scheduling for UE %04x\n",UE->rnti); NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP; - const NR_mac_dir_stats_t *stats = &UE->mac_stats.ul; + NR_mac_dir_stats_t *stats = &UE->mac_stats.ul; /* Calculate throughput */ const float a = 0.01f; const uint32_t b = stats->current_bytes; UE->ul_thr_ue = (1 - a) * UE->ul_thr_ue + a * b; + stats->current_bytes = 0; + stats->current_rbs = 0; + int total_rem_ues = 0; for (int i = 0; i < num_beams; i++) total_rem_ues += remainUEs[i]; @@ -1915,8 +1919,7 @@ static void pf_ul(module_id_t module_id, /* Allocate retransmission*/ const int tda = get_ul_tda(nrmac, sched_frame, sched_slot); bool r = allocate_ul_retransmission(nrmac, - frame, - slot, + pp_pusch, rballoc_mask, &n_rb_sched[beam.idx], dci_beam.idx, @@ -2063,7 +2066,8 @@ static void pf_ul(module_id_t module_id, sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, deltaMCS, false); - sched_ctrl->sched_pusch = sched; + /* save allocation to FAPI structures */ + post_process_ulsch(nrmac, pp_pusch, UE, &sched); LOG_D(NR_MAC, "pf_ul %d.%d UE %x Scheduling PUSCH (no data) nrb %d mcs %d tbs %d bits phr_txpower %d\n", frame, @@ -2263,7 +2267,9 @@ static void pf_ul(module_id_t module_id, sched_ctrl->cce_index = CCEIndex; fill_pdcch_vrb_map(nrmac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, dci_beam.idx); - sched_ctrl->sched_pusch = sched; + /* save allocation to FAPI structures */ + post_process_ulsch(nrmac, pp_pusch, iterator->UE, &sched); + n_rb_sched[beam.idx] -= sched.rbSize; for (int rb = bi.bwpStart; rb < sched.rbSize; rb++) rballoc_mask[rb + sched.rbStart] |= slbitmap; @@ -2374,7 +2380,7 @@ nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti return pusch_pdu; } -static void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE_info_t *UE, NR_sched_pusch_t *sched_pusch) +void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE_info_t *UE, NR_sched_pusch_t *sched_pusch) { frame_t frame = pusch->frame; slot_t slot = pusch->slot; @@ -2585,12 +2591,14 @@ static void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch nr_mac->cset0_bwp_size); } -static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, slot_t slot) +static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_pusch) { - gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; + int frame = pp_pusch->frame; + int slot = pp_pusch->slot; + // no UEs if (nr_mac->UE_info.connected_ue_list[0] == NULL) - return false; + return; NR_COMMON_channels_t *cc = nr_mac->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; @@ -2603,7 +2611,7 @@ static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, slot_t s const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER; const int sched_slot = (slot + K2) % slots_frame; if (!is_ul_slot(sched_slot, &nr_mac->frame_structure)) - return false; + return; int num_beams = nr_mac->beam_info.beam_allocation ? nr_mac->beam_info.beams_per_period : 1; int bw = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth; @@ -2618,8 +2626,7 @@ static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, slot_t s max_sched_ues = min(max_sched_ues, MAX_DCI_CORESET); /* proportional fair scheduling algorithm */ - pf_ul(module_id, frame, slot, sched_frame, sched_slot, nr_mac->UE_info.connected_ue_list, max_sched_ues, num_beams, len); - return true; + pf_ul(nr_mac, pp_pusch, sched_frame, sched_slot, nr_mac->UE_info.connected_ue_list, max_sched_ues, num_beams, len); } nr_pp_impl_ul nr_init_ulsch_preprocessor(int CC_id) @@ -2659,38 +2666,15 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ /* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */ NR_SCHED_ENSURE_LOCKED(&nr_mac->sched_lock); + ul_dci_req->SFN = frame; + ul_dci_req->Slot = slot; + post_process_pusch_t pusch = { .frame = frame, .slot = slot, .ul_dci_req = ul_dci_req, .pdcch_pdu_coreset = {NULL}, }; + /* Uplink data ONLY can be scheduled when the current slot is downlink slot, * because we have to schedule the DCI0 first before schedule uplink data */ if (!is_dl_slot(slot, &nr_mac->frame_structure)) { LOG_D(NR_MAC, "Current slot %d is NOT DL slot, cannot schedule DCI0 for UL data\n", slot); return; } - bool do_sched = nr_mac->pre_processor_ul(module_id, frame, slot); - if (!do_sched) - return; - - ul_dci_req->SFN = frame; - ul_dci_req->Slot = slot; - post_process_pusch_t pusch = { frame, slot, ul_dci_req }; - - NR_UEs_t *UE_info = &nr_mac->UE_info; - UE_iterator(UE_info->connected_ue_list, UE) { - NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; - if (sched_ctrl->ul_failure && !get_softmodem_params()->phy_test) - continue; - - UE->mac_stats.ul.current_bytes = 0; - UE->mac_stats.ul.current_rbs = 0; - - /* dynamic PUSCH values (RB alloc, MCS, hence R, Qm, TBS) that change in - * every TTI are pre-populated by the preprocessor and used below */ - NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; - LOG_D(NR_MAC,"UE %04x : sched_pusch->rbSize %d\n",UE->rnti,sched_pusch->rbSize); - if (sched_pusch->rbSize <= 0) - continue; - - post_process_ulsch(nr_mac, &pusch, UE, sched_pusch); - - memset(sched_pusch, 0, sizeof(*sched_pusch)); - } + nr_mac->pre_processor_ul(nr_mac, &pusch); } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 66a9262f22..2c9e1a2a43 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -149,7 +149,7 @@ uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs); void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot); /* \brief UL preprocessor for phytest: schedules UE_id 0 with fixed MCS on a * fixed set of resources */ -bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot); +void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_pusch); void handle_nr_uci_pucch_0_1(module_id_t mod_id, frame_t frame, @@ -498,4 +498,6 @@ void prepare_du_configuration_update(gNB_MAC_INST *mac, const NR_BCCH_DL_SCH_Message_t *sib1); void nr_mac_clean_cellgroup(NR_CellGroupConfig_t *cell_group); + +void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE_info_t *UE, NR_sched_pusch_t *sched_pusch); #endif /*__LAYER2_NR_MAC_PROTO_H__*/ diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index ea7d80a214..1778d0507f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -598,9 +598,6 @@ typedef struct { NR_sched_pucch_t *sched_pucch; int sched_pucch_size; - /// Sched PUSCH: scheduling decisions, copied into HARQ and cleared every TTI - NR_sched_pusch_t sched_pusch; - /// Sched SRS: scheduling decisions NR_sched_srs_t sched_srs; @@ -807,8 +804,12 @@ typedef struct { nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_coreset[MAX_NUM_CORESET]; } post_process_pusch_t; +/* forward declaration to use in nr_pp_impl_dl */ +struct gNB_MAC_INST_s; +typedef struct gNB_MAC_INST_s gNB_MAC_INST; + typedef void (*nr_pp_impl_dl)(module_id_t mod_id, frame_t frame, slot_t slot); -typedef bool (*nr_pp_impl_ul)(module_id_t mod_id, frame_t frame, slot_t slot); +typedef void (*nr_pp_impl_ul)(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_pusch); typedef struct f1_config_t { f1ap_setup_req_t *setup_req; From 7ee8e8eaba7fd620f23d8bd329d023dbdf161b95 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 7 Jul 2025 12:26:55 +0200 Subject: [PATCH 11/34] Fix bug: only sort relevant part of list This reduces the amount of elements to compare. --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 4e8bce0392..95a410373e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1869,7 +1869,7 @@ static void pf_ul(gNB_MAC_INST *nrmac, int remainUEs[num_beams]; for (int i = 0; i < num_beams; i++) remainUEs[i] = max_num_ue; - int curUE = 0; + int numUE = 0; /* Loop UE_list to calculate throughput and coeff */ UE_iterator(UE_list, UE) { @@ -2099,13 +2099,13 @@ static void pf_ul(gNB_MAC_INST *nrmac, UE->ul_thr_ue, tbs, coeff_ue); - UE_sched[curUE].coef = coeff_ue; - UE_sched[curUE].UE = UE; - UE_sched[curUE].selected_mcs = selected_mcs; - curUE++; + UE_sched[numUE].coef = coeff_ue; + UE_sched[numUE].UE = UE; + UE_sched[numUE].selected_mcs = selected_mcs; + numUE++; } - qsort(UE_sched, sizeofArray(UE_sched), sizeof(UEsched_t), comparator); + qsort(UE_sched, numUE, sizeof(UEsched_t), comparator); UEsched_t *iterator=UE_sched; /* Loop UE_sched to find max coeff and allocate transmission */ From 62e4025bc8464ae516898cea806700aae49d8706 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 14:12:41 +0200 Subject: [PATCH 12/34] Integrate inactivity scheduling into main allocation loop Scheduling for inactivity only deviates in details from the main scheduling logic: we simply allocate a fixed number of RBs instead of making it dependent of data. In this commit, add an additional flag to sort UEs that are scheduled for inactivity in front of "normal" UEs (with traffic). Then, schedule those UEs by limiting/fixing the amount of RBs to schedule to min_grant_prb. Update the comparator() to properly sort UEs based on this flag and the coefficient by applying a consistent logic of -1/0/1 (see man qsort) for smaller/equal/larger. The inactivity flag, if set, will always have higher priority over the coefficient to schedule these UEs first, as was the case prior to this commit. --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 198 ++++++------------ 1 file changed, 63 insertions(+), 135 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 95a410373e..ecb4887c53 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1841,12 +1841,27 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, static uint32_t ul_pf_tbs[5][29]; // pre-computed, approximate TBS values for PF coefficient typedef struct UEsched_s { float coef; + bool sched_inactive; NR_UE_info_t * UE; int selected_mcs; } UEsched_t; -static int comparator(const void *p, const void *q) { - return ((UEsched_t*)p)->coef < ((UEsched_t*)q)->coef; +static int comparator(const void *p, const void *q) +{ + const UEsched_t *pp = p; + const UEsched_t *qq = q; + if (pp->sched_inactive && qq->sched_inactive) + return 0; + else if (pp->sched_inactive) + return -1; + else if (qq->sched_inactive) + return 1; + /* both UEs are !sched_inactive */ + if (pp->coef < qq->coef) + return 1; + else if (pp->coef > qq->coef) + return -1; + return 0; } static void pf_ul(gNB_MAC_INST *nrmac, @@ -1977,129 +1992,23 @@ static void pf_ul(gNB_MAC_INST *nrmac, selected_mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->ul_bler_stats, max_mcs, frame); LOG_D(NR_MAC, "%d.%d starting mcs %d bler %f\n", frame, slot, selected_mcs, sched_ctrl->ul_bler_stats.bler); } - /* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled - * based on data to transmit) */ - if (B == 0 && do_sched) { - /* if no data, pre-allocate 5RB */ - /* Find a free CCE */ - int CCEIndex = get_cce_index(nrmac, - CC_id, slot, UE->rnti, - &sched_ctrl->aggregation_level, - dci_beam.idx, - sched_ctrl->search_space, - sched_ctrl->coreset, - &sched_ctrl->sched_pdcch, - false, - sched_ctrl->pdcch_cl_adjust); - if (CCEIndex < 0) { - LOG_D(NR_MAC, "[UE %04x][%4d.%2d] no free CCE for UL DCI (BSR 0)\n", UE->rnti, frame, slot); - reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam); - reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam); - continue; - } - - int tda = get_ul_tda(nrmac, sched_frame, sched_slot); - NR_tda_info_t tda_info = get_ul_tda_info(current_BWP, - sched_ctrl->coreset->controlResourceSetId, - sched_ctrl->search_space->searchSpaceType->present, - TYPE_C_RNTI_, - tda); - AssertFatal(tda_info.valid_tda, "Invalid TDA from get_ul_tda_info\n"); - - int rbStart = 0; // wrt BWP start - LOG_D(NR_MAC, "Looking for min_rb %d RBs, starting at %d\n", min_rb, rbStart); - bwp_info_t bi = get_pusch_bwp_start_size(UE); - const uint16_t slbitmap = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); - while (rbStart < bi.bwpSize && (rballoc_mask[rbStart + bi.bwpStart] & slbitmap)) - rbStart++; - if (rbStart + min_rb > bi.bwpSize) { - LOG_D(NR_MAC, - "[UE %04x][%4d.%2d] could not allocate continuous UL data: no resources (rbStart %d, min_rb %d, bwpSize %d)\n", - UE->rnti, - frame, - slot, - rbStart, - min_rb, - bi.bwpSize); - reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam); - reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam); - continue; - } - - sched_ctrl->cce_index = CCEIndex; - fill_pdcch_vrb_map(nrmac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, dci_beam.idx); - - int nrOfLayers = get_ul_nrOfLayers(sched_ctrl, current_BWP->dci_format); - NR_sched_pusch_t sched = { - .frame = sched_frame, - .slot = sched_slot, - .rbSize = min_rb, - .rbStart = rbStart, - .mcs = selected_mcs, - // R, Qm, tb_size below - .ul_harq_pid = -1, // new transmission - .nrOfLayers = nrOfLayers, - // tpmi in post-process - .time_domain_allocation = tda, - .tda_info = tda_info, - .dmrs_info = get_ul_dmrs_params(scc, current_BWP, &tda_info, nrOfLayers), - .bwp_info = bi, - // phr_txpower_calc below - }; - update_ul_ue_R_Qm(sched.mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched.R, &sched.Qm); - sched.tb_size = nr_compute_tbs(sched.Qm, - sched.R, - sched.rbSize, - sched.tda_info.nrOfSymbols, - sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, - 0, // nb_rb_oh - 0, - sched.nrOfLayers) - >> 3; - long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL; - - sched.phr_txpower_calc = compute_ph_factor(current_BWP->scs, - sched.tb_size << 3, - sched.rbSize, - sched.nrOfLayers, - sched.tda_info.nrOfSymbols, - sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, - deltaMCS, - false); - /* save allocation to FAPI structures */ - post_process_ulsch(nrmac, pp_pusch, UE, &sched); - LOG_D(NR_MAC, - "pf_ul %d.%d UE %x Scheduling PUSCH (no data) nrb %d mcs %d tbs %d bits phr_txpower %d\n", - frame, - slot, - UE->rnti, - sched.rbSize, - sched.mcs, - sched.tb_size << 3, - sched.phr_txpower_calc); - - /* Mark the corresponding RBs as used */ - n_rb_sched[beam.idx] -= sched.rbSize; - for (int rb = bi.bwpStart; rb < sched.rbSize; rb++) - rballoc_mask[rb + sched.rbStart] |= slbitmap; - - remainUEs[beam.idx]--; - continue; - } /* Create UE_sched for UEs eligibale for new data transmission*/ /* Calculate coefficient*/ const uint32_t tbs = ul_pf_tbs[current_BWP->mcs_table][selected_mcs]; float coeff_ue = (float) tbs / UE->ul_thr_ue; - LOG_D(NR_MAC, "[UE %04x][%4d.%2d] b %d, ul_thr_ue %f, tbs %d, coeff_ue %f\n", + bool sched_inactive = B == 0 && do_sched; + LOG_D(NR_MAC, "[UE %04x][%4d.%2d] b %d, ul_thr_ue %f, tbs %d, coeff_ue %f, sched_inactive %d\n", UE->rnti, frame, slot, b, UE->ul_thr_ue, tbs, - coeff_ue); + coeff_ue, + sched_inactive); UE_sched[numUE].coef = coeff_ue; + UE_sched[numUE].sched_inactive = sched_inactive; UE_sched[numUE].UE = UE; UE_sched[numUE].selected_mcs = selected_mcs; numUE++; @@ -2172,11 +2081,14 @@ static void pf_ul(gNB_MAC_INST *nrmac, bwp_info_t bi = get_pusch_bwp_start_size(iterator->UE); while (rbStart < bi.bwpSize && (rballoc_mask[rbStart + bi.bwpStart] & slbitmap)) rbStart++; - uint16_t max_rbSize = 1; - while (rbStart + max_rbSize < bi.bwpSize && !(rballoc_mask[rbStart + bi.bwpStart + max_rbSize] & slbitmap)) - max_rbSize++; + /* if it's for inactivity, min_grant_prb is enough, otherwise check what + * would be the maximum */ + uint16_t max_rbSize = iterator->sched_inactive ? min_rb : bi.bwpSize; + uint16_t available_rb = 1; + while (rbStart + available_rb < bi.bwpSize && !(rballoc_mask[rbStart + bi.bwpStart + available_rb] & slbitmap) && available_rb < max_rbSize) + available_rb++; - if (rbStart + min_rb > bi.bwpSize || max_rbSize < min_rb) { + if (rbStart + min_rb > bi.bwpSize || available_rb < min_rb) { reset_beam_status(&nrmac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, dci_beam.new_beam); reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam); LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not allocate UL data: no resources (rbStart %d, min_rb %d, bwpSize %d)\n", @@ -2190,11 +2102,11 @@ static void pf_ul(gNB_MAC_INST *nrmac, continue; } else LOG_D(NR_MAC, - "allocating UL data for RNTI %04x (rbStart %d, min_rb %d, max_rbSize %d, bwpSize %d)\n", + "allocating UL data for RNTI %04x (rbStart %d, min_rb %d, available_rb %d, bwpSize %d)\n", iterator->UE->rnti, rbStart, min_rb, - max_rbSize, + available_rb, bi.bwpSize); int nrOfLayers = get_ul_nrOfLayers(sched_ctrl, current_BWP->dci_format); @@ -2217,25 +2129,41 @@ static void pf_ul(gNB_MAC_INST *nrmac, /* Calculate the current scheduling bytes */ const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0); - /* adjust rbSize and MCS according to PHR and BPRE */ - if(sched_ctrl->pcmax != 0 || sched_ctrl->ph != 0) // verify if the PHR related parameter have been initialized - nr_ue_max_mcs_min_rb(current_BWP->scs, sched_ctrl->ph, &sched, current_BWP, min_rb, B, &max_rbSize, &sched.mcs); + /* adjust rbSize and MCS according to PHR and BPRE, only if there is data */ + if((sched_ctrl->pcmax != 0 || sched_ctrl->ph != 0) && B > 0) + nr_ue_max_mcs_min_rb(current_BWP->scs, sched_ctrl->ph, &sched, current_BWP, min_rb, B, &available_rb, &sched.mcs); if (sched.mcs < sched_ctrl->ul_bler_stats.mcs) sched_ctrl->ul_bler_stats.mcs = sched.mcs; /* force estimated MCS down */ update_ul_ue_R_Qm(sched.mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched.R, &sched.Qm); - nr_find_nb_rb(sched.Qm, - sched.R, - current_BWP->transform_precoding, - sched.nrOfLayers, - sched.tda_info.nrOfSymbols, - sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, - B, - min_rb, - max_rbSize, - &sched.tb_size, - &sched.rbSize); + if (!iterator->sched_inactive) { + // this UE has data, find optimal number of RB for data and in range + // [min_rb,available_rb] + nr_find_nb_rb(sched.Qm, + sched.R, + current_BWP->transform_precoding, + sched.nrOfLayers, + sched.tda_info.nrOfSymbols, + sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, + B, + min_rb, + available_rb, + &sched.tb_size, + &sched.rbSize); + } else { + // this UE is scheduled due to SR or inactivity and no data + sched.rbSize = min_rb; + sched.tb_size = nr_compute_tbs(sched.Qm, + sched.R, + sched.rbSize, + sched.tda_info.nrOfSymbols, + sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb, + 0, // nb_rb_oh + 0, + sched.nrOfLayers) + >> 3; + } // Calacualte the normalized tx_power for PHR long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL; @@ -2251,9 +2179,9 @@ static void pf_ul(gNB_MAC_INST *nrmac, false); LOG_D(NR_MAC, - "rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n", + "rbSize %d (available_rb %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n", sched.rbSize, - max_rbSize, + available_rb, sched.tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, From 8cded62df0aad41a7b2db68ab867bceebeecbc76 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 13 Jun 2025 17:20:23 +0200 Subject: [PATCH 13/34] Refactor TDA allocation Make it simpler to see, in function nr_rrc_config_ul_tda(), which UL TDAs we allocate for a UE. --- openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c | 55 ++++++-------------- 1 file changed, 17 insertions(+), 38 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c index eba1152cd0..6e111ded06 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c +++ b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c @@ -1048,58 +1048,34 @@ void nr_rrc_config_dl_tda(struct NR_PDSCH_TimeDomainResourceAllocationList *pdsc } } -static struct NR_PUSCH_TimeDomainResourceAllocation *set_TimeDomainResourceAllocation(const int k2, uint8_t index, int ul_symb) +static struct NR_PUSCH_TimeDomainResourceAllocation *set_TimeDomainResourceAllocation(const int k2, long sliv) { struct NR_PUSCH_TimeDomainResourceAllocation *puschTdrAlloc = calloc_or_fail(1, sizeof(*puschTdrAlloc)); puschTdrAlloc->k2 = calloc_or_fail(1, sizeof(*puschTdrAlloc->k2)); *puschTdrAlloc->k2 = k2; puschTdrAlloc->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - switch (index) { - case 0: - puschTdrAlloc->startSymbolAndLength = get_SLIV(0, 13); - break; - case 1: - puschTdrAlloc->startSymbolAndLength = get_SLIV(0, 12); - break; - case 2: - // UL TDA index 2 for mixed slot (TDD) - puschTdrAlloc->startSymbolAndLength = - get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); // starting in fist ul symbol til the last but one - break; - case 3: { - // UL TDA index 3 for msg3 in the mixed slot (TDD) - int no_mix_slot = ul_symb < 3 ? 1 : 0; // we need at least 2 symbols for scheduling Msg3 - *puschTdrAlloc->k2 += no_mix_slot; - if (no_mix_slot) - puschTdrAlloc->startSymbolAndLength = get_SLIV(0, 13); // full allocation if there is no mixed slot - else - puschTdrAlloc->startSymbolAndLength = - get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); // starting in fist ul symbol til the last but one - } - break; - default: - break; - } + puschTdrAlloc->startSymbolAndLength = sliv; return puschTdrAlloc; } void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) { - //TODO change to accomodate for SRS - - const NR_PUSCH_TimeDomainResourceAllocationList_t *tda = + NR_PUSCH_TimeDomainResourceAllocationList_t *tda_list = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - AssertFatal(tda->list.count == 0, "already have pusch_TimeDomainAllocationList members\n"); + AssertFatal(tda_list->list.count == 0, "already have pusch_TimeDomainAllocationList members\n"); const int k2 = min_fb_delay; + int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; - struct NR_SetupRelease_PUSCH_ConfigCommon *pusch_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon; // UL TDA index 0 is basic slot configuration starting in symbol 0 til the last but one symbol - asn1cSeqAdd(&pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list, set_TimeDomainResourceAllocation(k2, 0, 0)); + NR_PUSCH_TimeDomainResourceAllocation_t *tda; + tda = set_TimeDomainResourceAllocation(k2, get_SLIV(0, 13)); + asn1cSeqAdd(&tda_list->list, tda); // UL TDA index 1 in case of SRS - asn1cSeqAdd(&pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list, set_TimeDomainResourceAllocation(k2, 1, 0)); + tda = set_TimeDomainResourceAllocation(k2, get_SLIV(0, 12)); + asn1cSeqAdd(&tda_list->list, tda); if (scc->tdd_UL_DL_ConfigurationCommon) { int ul_symb = 0; @@ -1117,21 +1093,24 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) } if (ul_symb>1) { // UL TDA index 2 for mixed slot (TDD) - asn1cSeqAdd(&pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list, - set_TimeDomainResourceAllocation(k2, 2, ul_symb)); + long sliv = get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); + tda = set_TimeDomainResourceAllocation(k2, sliv); + asn1cSeqAdd(&tda_list->list, tda); } // UL TDA index 3 for msg3 in the mixed slot (TDD) int tdd_period_idx = get_tdd_period_idx(scc->tdd_UL_DL_ConfigurationCommon); int nb_periods_per_frame = get_nb_periods_per_frame(tdd_period_idx); int nb_slots_per_period = ((1 << mu) * 10) / nb_periods_per_frame; int k2_msg3 = nb_slots_per_period - get_delta_for_k2(mu); - struct NR_PUSCH_TimeDomainResourceAllocation *puschTdrAllocMsg3 = set_TimeDomainResourceAllocation(k2_msg3, 3, ul_symb); + bool no_mix_slot = ul_symb < 3; // we need at least 2 symbols for scheduling Msg3 + long sliv = no_mix_slot ? get_SLIV(0, 13) : get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); + struct NR_PUSCH_TimeDomainResourceAllocation *puschTdrAllocMsg3 = set_TimeDomainResourceAllocation(k2_msg3, sliv); if (*puschTdrAllocMsg3->k2 < min_fb_delay) *puschTdrAllocMsg3->k2 += nb_slots_per_period; AssertFatal(*puschTdrAllocMsg3->k2 < 33, "Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n", *puschTdrAllocMsg3->k2); - asn1cSeqAdd(&pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list, puschTdrAllocMsg3); + asn1cSeqAdd(&tda_list->list, puschTdrAllocMsg3); } } From 7cae3c2871651b9f76371f27e417dcd91e394604 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 13 Jun 2025 17:43:12 +0200 Subject: [PATCH 14/34] Comments on func --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index ecb4887c53..bbbd72c378 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -38,6 +38,8 @@ //#define SRS_IND_DEBUG +/* \brief Get the UL TDA for given frame and slot. It identifies the index of + * TDA in the TDA list, as hardcoded in nr_rrc_config_ul_tda(). */ int get_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot) { /* we assume that this function is mutex-protected from outside */ @@ -51,7 +53,7 @@ int get_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot) int s = get_slot_idx_in_period(slot, fs); tdd_bitmap_t *tdd_slot_bitmap = fs->period_cfg.tdd_slot_bitmap; if ((tdd_slot_bitmap[s].num_ul_symbols > 1) && is_mixed_slot(s, fs)) { - return 2; + return 2; // mixed slot, all symbols of mixed minus last } } @@ -59,10 +61,10 @@ int get_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot) UE_iterator(nrmac->UE_info.connected_ue_list, UE) { NR_sched_srs_t sched_srs = UE->UE_sched_ctrl.sched_srs; if(sched_srs.srs_scheduled && sched_srs.frame == frame && sched_srs.slot == slot) - return 1; + return 1; // symbols 0--12 } - return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) + return 0; // symbols 0--13, // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) } bwp_info_t get_pusch_bwp_start_size(NR_UE_info_t *UE) From ac3451c6f75b48315bd4489665bc85294e292858 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 21 Jul 2025 10:50:46 +0200 Subject: [PATCH 15/34] Select ra_ResponseWindow automatically if not configured If the config file does not specify ra_ResponseWindow, select it to be 10 slots in mu=0, or 20 slots for all others. This should give us enough flexibility to allocate Msg2 without running out of the response window. The next commit will remove most ra_ResponseWindow options in configs. --- openair2/GNB_APP/RRC_nr_paramsvalues.h | 2 +- openair2/GNB_APP/gnb_config.c | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/openair2/GNB_APP/RRC_nr_paramsvalues.h b/openair2/GNB_APP/RRC_nr_paramsvalues.h index 44774342e5..1525c31b9a 100644 --- a/openair2/GNB_APP/RRC_nr_paramsvalues.h +++ b/openair2/GNB_APP/RRC_nr_paramsvalues.h @@ -228,7 +228,7 @@ {GNB_CONFIG_STRING_PREAMBLERECEIVEDTARGETPOWER,NULL,0,.i64ptr=&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower,.defint64val=-118,TYPE_INT64,0/*75*/},\ {GNB_CONFIG_STRING_PREAMBLETRANSMAX,NULL,0,.i64ptr=&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax,.defint64val=NR_RACH_ConfigGeneric__preambleTransMax_n10,TYPE_INT64,0/*76*/},\ {GNB_CONFIG_STRING_POWERRAMPINGSTEP,NULL,0,.i64ptr=&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep,.defint64val=NR_RACH_ConfigGeneric__powerRampingStep_dB2,TYPE_INT64,0/*77*/},\ -{GNB_CONFIG_STRING_RARESPONSEWINDOW,NULL,0,.i64ptr=&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow,.defint64val=NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20,TYPE_INT64,0/*78*/},\ +{GNB_CONFIG_STRING_RARESPONSEWINDOW,NULL,0,.i64ptr=&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow,.defint64val=-1,TYPE_INT64,0/*78*/},\ {GNB_CONFIG_STRING_SSBPERRACHOCCASIONANDCBPREAMBLESPERSSBPR,NULL,0,.uptr=&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present,.defuintval=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one,TYPE_UINT,0/*79*/},\ {GNB_CONFIG_STRING_SSBPERRACHOCCASIONANDCBPREAMBLESPERSSB,NULL,0,.i64ptr=&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one,.defint64val=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB__one_n64,TYPE_INT64,0 /*80*/}, \ {GNB_CONFIG_STRING_RACONTENTIONRESOLUTIONTIMER,NULL,0,.i64ptr=&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer,.defint64val=NR_RACH_ConfigCommon__ra_ContentionResolutionTimer_sf64,TYPE_INT64,0/*81*/},\ diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index f01b5968f7..8f162ff1ce 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -575,6 +575,14 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc, uint64_t ssbmap) rach_ConfigCommon->msg3_transformPrecoder = NULL; } + // by default, select ra_ResponseWindow automatically + if (rach_ConfigCommon->rach_ConfigGeneric.ra_ResponseWindow < 0) { + int mu = *scc->ssbSubcarrierSpacing; + // will select: mu=0 => 4 (10 slots), mu=1 => 5 (20 slots), mu>=3 => 7 (80 slots) + rach_ConfigCommon->rach_ConfigGeneric.ra_ResponseWindow = min(NR_RACH_ConfigGeneric__ra_ResponseWindow_sl80, NR_RACH_ConfigGeneric__ra_ResponseWindow_sl10 + mu); + } + DevAssert(rach_ConfigCommon->rach_ConfigGeneric.ra_ResponseWindow >= 0); + // prepare DL Allocation lists nr_rrc_config_dl_tda(dlcc->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList, frame_type, From 41d14b571c80c43a77078e83d8c115547b8748c5 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 21 Jul 2025 10:37:01 +0200 Subject: [PATCH 16/34] Remove most ra_ResponseWindow config options Since the parent commit, the ra_ResponseWindow will be chosen automatically. Correspondingly, remove most ra_ResponseWindow options from configuration files in the repository. One problem in some mu=1 configs is that the ra_ResponseWindow=4 (10 slots), which might be overly restrictive if the L1 slot ahead is somewhat close to 10 (e.g., 6), in which case we might not be always able to allocate Msg2 in time. A notable exception here is gnb-vnf.sa.band66.u0.25prb.nfapi.conf, in which we still provide it (1) since it uses a non-standard configuration of a ra_ResponseWindow longer than 10ms (see also issue #916 for more information) and (2) as an example. --- ci-scripts/conf_files/gnb-du.sa.band1.52prb.usrpb210.conf | 3 --- ci-scripts/conf_files/gnb-du.sa.band78.106prb.rfsim.conf | 3 --- ci-scripts/conf_files/gnb-du.sa.band78.106prb.usrpb200.conf | 3 --- .../conf_files/gnb-vnf.sa.band77.162prb.nfapi.4x4.conf | 3 --- ci-scripts/conf_files/gnb-vnf.sa.band78.273prb.aerial.conf | 3 --- .../conf_files/gnb.band66.106prb.rfsim.phytest-dora.conf | 3 --- .../conf_files/gnb.band78.106prb.rfsim.phytest-dora.conf | 3 --- .../conf_files/gnb.band79.106prb.usrpn300.phytest-dora.conf | 3 --- .../conf_files/gnb.band79.162prb.usrpn300.phytest-dora.conf | 3 --- .../conf_files/gnb.band79.273prb.usrpn300.phytest-dora.conf | 3 --- ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpb200.conf | 3 --- .../conf_files/gnb.nsa.band78.106prb.usrpn310.2x2.conf | 3 --- .../conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn-leo.conf | 3 --- ci-scripts/conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn.conf | 3 --- ci-scripts/conf_files/gnb.sa.band261.u3.32prb.rfsim.conf | 3 --- ci-scripts/conf_files/gnb.sa.band66.106prb.rfsim.conf | 3 --- ci-scripts/conf_files/gnb.sa.band77.162prb.usrpn310.2x2.conf | 3 --- .../conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf | 3 --- .../gnb.sa.band77.273prb.fhi72.4x4.2L-metanoia.conf | 3 --- ci-scripts/conf_files/gnb.sa.band77.273prb.usrpn310.2x2.conf | 3 --- ci-scripts/conf_files/gnb.sa.band78.106prb.n310.7ds2u.conf | 3 --- ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.conf | 3 --- .../conf_files/gnb.sa.band78.106prb.rfsim.flexric.conf | 3 --- .../conf_files/gnb.sa.band78.106prb.rfsim.neighbour.conf | 3 --- ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.yaml | 3 --- ci-scripts/conf_files/gnb.sa.band78.106prb.usrp310.2x2.conf | 3 --- .../conf_files/gnb.sa.band78.106prb.usrpb200.sc-fdma.conf | 3 --- .../conf_files/gnb.sa.band78.106prb.usrpn310.ddsuu-2x2.conf | 3 --- ci-scripts/conf_files/gnb.sa.band78.162prb.usrpn310.2x2.conf | 3 --- ci-scripts/conf_files/gnb.sa.band78.24prb.rfsim.conf | 3 --- .../gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf | 3 --- ci-scripts/conf_files/gnb.sa.band78.273prb.rfsim.2x2.conf | 3 --- .../conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.2x2.conf | 3 --- ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf | 3 --- ci-scripts/conf_files/gnb.sa.band78.51prb.usrpb200.conf | 3 --- ci-scripts/conf_files/untested/benetel-5g.conf | 3 --- .../untested/episci/episci_rcc.band78.tm1.106PRB.nfapi.conf | 3 --- .../untested/episci/gnb_band78.sa.fr1.106PRB.2x2.l2sim.conf | 3 --- .../untested/episci/proxy_rcc.band78.tm1.106PRB.nfapi.conf | 3 --- .../conf_files/untested/gNB_SA_n78_106PRB.2x2_usrpn310.conf | 3 --- .../conf_files/untested/gNB_SA_n78_133PRB.2x2_usrpn310.conf | 3 --- .../untested/gnb.band78.sa.fr1.106PRB.usrpn310.conf | 3 --- .../untested/gnb.band78.tm1.fr1.106PRB.usrpb210.conf | 3 --- .../untested/gnb.band78.tm1.fr1.106PRB.usrpn310.conf | 3 --- .../untested/gnb.sa.band66.fr1.106PRB.usrpn300.conf | 3 --- .../untested/gnb.sa.band78.fr1.51PRB.usrpb210.conf | 3 --- .../untested/proxy_gnb.band78.sa.fr1.106PRB.usrpn310.conf | 3 --- doc/nfapi.md | 5 +++-- doc/testing_gnb_w_cots_ue_resources/gnb.conf | 3 --- targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band66.tm1.24PRB.usrpx300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpn300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpx300.conf | 3 --- .../CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf | 3 --- targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf | 3 --- .../CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf | 3 --- .../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf | 3 --- targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf | 3 --- .../CONF/gnb-du.sa.band66.25prb.rfsim.pci0.conf | 3 --- .../CONF/gnb-du.sa.band66.25prb.rfsim.pci1.conf | 3 --- .../CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf | 3 --- ...-du.sa.band77.273prb.fhi72.8x8-benetel650_650-mplane.conf | 3 --- .../gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf | 3 --- .../CONF/gnb-du.sa.band78.106prb.rfsim.pci0.conf | 3 --- .../CONF/gnb-du.sa.band78.106prb.rfsim.pci1.conf | 3 --- .../GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.106prb.nfapi.conf | 3 --- .../GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.aerial.conf | 3 --- .../GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.nfapi.conf | 3 --- .../PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.cbrs.aerial.conf | 3 --- .../CONF/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf | 3 --- .../CONF/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf | 3 --- .../GENERIC-NR-5GC/CONF/gnb.sa.band1.u0.52PRB.usrpb210.conf | 3 --- .../CONF/gnb.sa.band254.ntn.mu1.24prb.rfsim.conf | 3 --- .../CONF/gnb.sa.band255.ntn.mu0.25prb.rfsim.conf | 3 --- .../CONF/gnb.sa.band256.ntn.mu0.25prb.rfsim.conf | 3 --- .../CONF/gnb.sa.band257.u3.32prb.usrpx410.conf | 3 --- .../CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf | 3 --- .../CONF/gnb.sa.band41.fr1.52PRB.usrpb210.conf | 3 --- .../CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf | 3 --- .../CONF/gnb.sa.band66.fr1.106PRB.usrpx300.conf | 3 --- .../CONF/gnb.sa.band66.fr1.24PRB.usrpx300.conf | 3 --- .../CONF/gnb.sa.band66.fr1.25PRB.usrpx300.conf | 3 --- .../GENERIC-NR-5GC/CONF/gnb.sa.band66.u0.25prb.rfsim.conf | 3 --- .../CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf | 3 --- .../CONF/gnb.sa.band77.162prb.usrpn310.4x4.conf | 3 --- .../CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf | 3 --- .../CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf | 3 --- .../CONF/gnb.sa.band77.fr1.273PRB.2x2.usrpn300.conf | 3 --- .../CONF/gnb.sa.band77.fr1.273PRB.usrpx300.conf | 3 --- .../CONF/gnb.sa.band78.106PRB.usrpb210.RA_2-Step.conf | 3 --- .../CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf | 3 --- .../gnb.sa.band78.273prb.fhi72.4x4-benetel550-mplane.conf | 3 --- .../CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf | 3 --- .../CONF/gnb.sa.band78.273prb.fhi72.4x4-foxconn.conf | 3 --- .../CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf | 3 --- .../CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf | 3 --- .../CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf | 3 --- .../CONF/gnb.sa.band78.fr1.106PRB.usrpb210.2pattern.conf | 3 --- .../CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf | 3 --- .../CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf | 3 --- .../CONF/gnb.sa.band78.fr1.106PRB.usrpb210.redcap.yaml | 3 --- .../CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf | 3 --- .../CONF/gnb.sa.band78.fr1.106PRB.usrpb210.yaml | 3 --- .../CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf | 3 --- .../GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.189PRB.rfsim.conf | 3 --- .../CONF/gnb.sa.band78.fr1.217PRB.2x2.usrpn300.conf | 3 --- .../CONF/gnb.sa.band78.fr1.24PRB.usrpb210.conf | 3 --- .../CONF/gnb0.prs.band261.fr2.64PRB.usrpx310.conf | 3 --- .../CONF/gnb0.prs.band78.fr1.106PRB.usrpx310.conf | 3 --- .../CONF/gnb1.prs.band261.fr2.64PRB.usrpx310.conf | 3 --- .../CONF/gnb1.prs.band78.fr1.106PRB.usrpx310.conf | 3 --- 126 files changed, 3 insertions(+), 377 deletions(-) diff --git a/ci-scripts/conf_files/gnb-du.sa.band1.52prb.usrpb210.conf b/ci-scripts/conf_files/gnb-du.sa.band1.52prb.usrpb210.conf index 2af3185ffc..173c9b3f73 100644 --- a/ci-scripts/conf_files/gnb-du.sa.band1.52prb.usrpb210.conf +++ b/ci-scripts/conf_files/gnb-du.sa.band1.52prb.usrpb210.conf @@ -86,9 +86,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb-du.sa.band78.106prb.rfsim.conf b/ci-scripts/conf_files/gnb-du.sa.band78.106prb.rfsim.conf index fce5e6dc6e..d2798cbccc 100644 --- a/ci-scripts/conf_files/gnb-du.sa.band78.106prb.rfsim.conf +++ b/ci-scripts/conf_files/gnb-du.sa.band78.106prb.rfsim.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb-du.sa.band78.106prb.usrpb200.conf b/ci-scripts/conf_files/gnb-du.sa.band78.106prb.usrpb200.conf index 66e721ef84..f829996433 100644 --- a/ci-scripts/conf_files/gnb-du.sa.band78.106prb.usrpb200.conf +++ b/ci-scripts/conf_files/gnb-du.sa.band78.106prb.usrpb200.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb-vnf.sa.band77.162prb.nfapi.4x4.conf b/ci-scripts/conf_files/gnb-vnf.sa.band77.162prb.nfapi.4x4.conf index ba156df849..814518f3b1 100644 --- a/ci-scripts/conf_files/gnb-vnf.sa.band77.162prb.nfapi.4x4.conf +++ b/ci-scripts/conf_files/gnb-vnf.sa.band77.162prb.nfapi.4x4.conf @@ -85,9 +85,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb-vnf.sa.band78.273prb.aerial.conf b/ci-scripts/conf_files/gnb-vnf.sa.band78.273prb.aerial.conf index 37223d712c..585d639f9f 100644 --- a/ci-scripts/conf_files/gnb-vnf.sa.band78.273prb.aerial.conf +++ b/ci-scripts/conf_files/gnb-vnf.sa.band78.273prb.aerial.conf @@ -97,9 +97,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.band66.106prb.rfsim.phytest-dora.conf b/ci-scripts/conf_files/gnb.band66.106prb.rfsim.phytest-dora.conf index b1d2d6d724..e69fee4722 100644 --- a/ci-scripts/conf_files/gnb.band66.106prb.rfsim.phytest-dora.conf +++ b/ci-scripts/conf_files/gnb.band66.106prb.rfsim.phytest-dora.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.band78.106prb.rfsim.phytest-dora.conf b/ci-scripts/conf_files/gnb.band78.106prb.rfsim.phytest-dora.conf index e49f8c422a..eb7c1e01e2 100644 --- a/ci-scripts/conf_files/gnb.band78.106prb.rfsim.phytest-dora.conf +++ b/ci-scripts/conf_files/gnb.band78.106prb.rfsim.phytest-dora.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.band79.106prb.usrpn300.phytest-dora.conf b/ci-scripts/conf_files/gnb.band79.106prb.usrpn300.phytest-dora.conf index 691fb86393..f36619e58a 100644 --- a/ci-scripts/conf_files/gnb.band79.106prb.usrpn300.phytest-dora.conf +++ b/ci-scripts/conf_files/gnb.band79.106prb.usrpn300.phytest-dora.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.band79.162prb.usrpn300.phytest-dora.conf b/ci-scripts/conf_files/gnb.band79.162prb.usrpn300.phytest-dora.conf index bb0388f113..caa3381365 100644 --- a/ci-scripts/conf_files/gnb.band79.162prb.usrpn300.phytest-dora.conf +++ b/ci-scripts/conf_files/gnb.band79.162prb.usrpn300.phytest-dora.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.band79.273prb.usrpn300.phytest-dora.conf b/ci-scripts/conf_files/gnb.band79.273prb.usrpn300.phytest-dora.conf index 67f1272563..586492e93f 100644 --- a/ci-scripts/conf_files/gnb.band79.273prb.usrpn300.phytest-dora.conf +++ b/ci-scripts/conf_files/gnb.band79.273prb.usrpn300.phytest-dora.conf @@ -85,9 +85,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpb200.conf b/ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpb200.conf index bbe3168aa2..d71be72f17 100644 --- a/ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpb200.conf +++ b/ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpb200.conf @@ -78,9 +78,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpn310.2x2.conf b/ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpn310.2x2.conf index a7900e5e41..1637e89521 100644 --- a/ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpn310.2x2.conf +++ b/ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpn310.2x2.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn-leo.conf b/ci-scripts/conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn-leo.conf index d08d900098..4d674d34b4 100644 --- a/ci-scripts/conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn-leo.conf +++ b/ci-scripts/conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn-leo.conf @@ -85,9 +85,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn.conf b/ci-scripts/conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn.conf index 7fbaac5f5b..fd8c3ec68c 100644 --- a/ci-scripts/conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn.conf +++ b/ci-scripts/conf_files/gnb.sa.band254.u0.25prb.rfsim.ntn.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band261.u3.32prb.rfsim.conf b/ci-scripts/conf_files/gnb.sa.band261.u3.32prb.rfsim.conf index d5b1695d5c..6471c7bd02 100644 --- a/ci-scripts/conf_files/gnb.sa.band261.u3.32prb.rfsim.conf +++ b/ci-scripts/conf_files/gnb.sa.band261.u3.32prb.rfsim.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band66.106prb.rfsim.conf b/ci-scripts/conf_files/gnb.sa.band66.106prb.rfsim.conf index 6c8ee24c1b..95384a0ae1 100644 --- a/ci-scripts/conf_files/gnb.sa.band66.106prb.rfsim.conf +++ b/ci-scripts/conf_files/gnb.sa.band66.106prb.rfsim.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band77.162prb.usrpn310.2x2.conf b/ci-scripts/conf_files/gnb.sa.band77.162prb.usrpn310.2x2.conf index b0647e8e5f..23a8b34c3a 100644 --- a/ci-scripts/conf_files/gnb.sa.band77.162prb.usrpn310.2x2.conf +++ b/ci-scripts/conf_files/gnb.sa.band77.162prb.usrpn310.2x2.conf @@ -86,9 +86,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf b/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf index 74ab33a28d..b066c27810 100644 --- a/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf +++ b/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 2; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4.2L-metanoia.conf b/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4.2L-metanoia.conf index 4e7042c2e4..b1da98b85b 100644 --- a/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4.2L-metanoia.conf +++ b/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4.2L-metanoia.conf @@ -79,9 +79,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band77.273prb.usrpn310.2x2.conf b/ci-scripts/conf_files/gnb.sa.band77.273prb.usrpn310.2x2.conf index 5567d233d4..3c51a977d8 100644 --- a/ci-scripts/conf_files/gnb.sa.band77.273prb.usrpn310.2x2.conf +++ b/ci-scripts/conf_files/gnb.sa.band77.273prb.usrpn310.2x2.conf @@ -86,9 +86,6 @@ gNBs = ( # powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; - # ra_ReponseWindow - # 1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; # ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR # 1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.106prb.n310.7ds2u.conf b/ci-scripts/conf_files/gnb.sa.band78.106prb.n310.7ds2u.conf index 396d83cd9d..7b0d176b3d 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.106prb.n310.7ds2u.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.106prb.n310.7ds2u.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.conf b/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.conf index 9627a48d87..c297e40311 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.conf @@ -86,9 +86,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.flexric.conf b/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.flexric.conf index 12a86c3e64..c54af1a4bb 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.flexric.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.flexric.conf @@ -80,9 +80,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; - #ra_ReponseWindow - #1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.neighbour.conf b/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.neighbour.conf index e4f7d91900..0808c4b43d 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.neighbour.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.neighbour.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.yaml b/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.yaml index 7b75481634..6240b62104 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.yaml +++ b/ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.yaml @@ -72,9 +72,6 @@ gNBs: #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep: 1 - #ra_ReponseWindow - #1,2,4,8,10,20,40,80 - ra_ResponseWindow: 5 #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR: 4 diff --git a/ci-scripts/conf_files/gnb.sa.band78.106prb.usrp310.2x2.conf b/ci-scripts/conf_files/gnb.sa.band78.106prb.usrp310.2x2.conf index 4f546e7f30..263a8444ba 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.106prb.usrp310.2x2.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.106prb.usrp310.2x2.conf @@ -85,9 +85,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.106prb.usrpb200.sc-fdma.conf b/ci-scripts/conf_files/gnb.sa.band78.106prb.usrpb200.sc-fdma.conf index ba06b69dd2..ee59af2d80 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.106prb.usrpb200.sc-fdma.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.106prb.usrpb200.sc-fdma.conf @@ -78,9 +78,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.106prb.usrpn310.ddsuu-2x2.conf b/ci-scripts/conf_files/gnb.sa.band78.106prb.usrpn310.ddsuu-2x2.conf index 05e6c5c67d..59142efec8 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.106prb.usrpn310.ddsuu-2x2.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.106prb.usrpn310.ddsuu-2x2.conf @@ -98,9 +98,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.162prb.usrpn310.2x2.conf b/ci-scripts/conf_files/gnb.sa.band78.162prb.usrpn310.2x2.conf index aa7e011ef2..74e3f6e45f 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.162prb.usrpn310.2x2.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.162prb.usrpn310.2x2.conf @@ -99,9 +99,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.24prb.rfsim.conf b/ci-scripts/conf_files/gnb.sa.band78.24prb.rfsim.conf index e6baa257bc..4a3d2852c4 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.24prb.rfsim.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.24prb.rfsim.conf @@ -80,9 +80,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf b/ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf index 6a3c31e71a..8d6a0e90cd 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf @@ -87,9 +87,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.273prb.rfsim.2x2.conf b/ci-scripts/conf_files/gnb.sa.band78.273prb.rfsim.2x2.conf index a9ef28fa5b..cd949fe8d0 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.273prb.rfsim.2x2.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.273prb.rfsim.2x2.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.2x2.conf b/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.2x2.conf index fc90aa6a88..4a0fa03c60 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.2x2.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.2x2.conf @@ -87,9 +87,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf b/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf index 3bfe9ede51..4b46b8ca33 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf @@ -87,9 +87,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/gnb.sa.band78.51prb.usrpb200.conf b/ci-scripts/conf_files/gnb.sa.band78.51prb.usrpb200.conf index 83495e1c5d..0057d9b75f 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.51prb.usrpb200.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.51prb.usrpb200.conf @@ -78,9 +78,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/untested/benetel-5g.conf b/ci-scripts/conf_files/untested/benetel-5g.conf index 9bd8ed126e..35eda8f6d6 100644 --- a/ci-scripts/conf_files/untested/benetel-5g.conf +++ b/ci-scripts/conf_files/untested/benetel-5g.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 2; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/untested/episci/episci_rcc.band78.tm1.106PRB.nfapi.conf b/ci-scripts/conf_files/untested/episci/episci_rcc.band78.tm1.106PRB.nfapi.conf index ae1b335a27..73e7ad0151 100644 --- a/ci-scripts/conf_files/untested/episci/episci_rcc.band78.tm1.106PRB.nfapi.conf +++ b/ci-scripts/conf_files/untested/episci/episci_rcc.band78.tm1.106PRB.nfapi.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/untested/episci/gnb_band78.sa.fr1.106PRB.2x2.l2sim.conf b/ci-scripts/conf_files/untested/episci/gnb_band78.sa.fr1.106PRB.2x2.l2sim.conf index 27358d99af..dda8cc11c4 100644 --- a/ci-scripts/conf_files/untested/episci/gnb_band78.sa.fr1.106PRB.2x2.l2sim.conf +++ b/ci-scripts/conf_files/untested/episci/gnb_band78.sa.fr1.106PRB.2x2.l2sim.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/untested/episci/proxy_rcc.band78.tm1.106PRB.nfapi.conf b/ci-scripts/conf_files/untested/episci/proxy_rcc.band78.tm1.106PRB.nfapi.conf index 978b8e22ec..9ca5210ec6 100644 --- a/ci-scripts/conf_files/untested/episci/proxy_rcc.band78.tm1.106PRB.nfapi.conf +++ b/ci-scripts/conf_files/untested/episci/proxy_rcc.band78.tm1.106PRB.nfapi.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/untested/gNB_SA_n78_106PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/untested/gNB_SA_n78_106PRB.2x2_usrpn310.conf index 43e11c6c40..e442987316 100644 --- a/ci-scripts/conf_files/untested/gNB_SA_n78_106PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/untested/gNB_SA_n78_106PRB.2x2_usrpn310.conf @@ -98,9 +98,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; diff --git a/ci-scripts/conf_files/untested/gNB_SA_n78_133PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/untested/gNB_SA_n78_133PRB.2x2_usrpn310.conf index 4e8c55851e..9a9732f807 100644 --- a/ci-scripts/conf_files/untested/gNB_SA_n78_133PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/untested/gNB_SA_n78_133PRB.2x2_usrpn310.conf @@ -94,9 +94,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; diff --git a/ci-scripts/conf_files/untested/gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/untested/gnb.band78.sa.fr1.106PRB.usrpn310.conf index 4ffcf8fa3a..b1b94da121 100644 --- a/ci-scripts/conf_files/untested/gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/untested/gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -103,9 +103,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; diff --git a/ci-scripts/conf_files/untested/gnb.band78.tm1.fr1.106PRB.usrpb210.conf b/ci-scripts/conf_files/untested/gnb.band78.tm1.fr1.106PRB.usrpb210.conf index dfd0996a05..b9c29636be 100644 --- a/ci-scripts/conf_files/untested/gnb.band78.tm1.fr1.106PRB.usrpb210.conf +++ b/ci-scripts/conf_files/untested/gnb.band78.tm1.fr1.106PRB.usrpb210.conf @@ -77,9 +77,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/untested/gnb.band78.tm1.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/untested/gnb.band78.tm1.fr1.106PRB.usrpn310.conf index a8a45e8a68..6a63b00e6f 100644 --- a/ci-scripts/conf_files/untested/gnb.band78.tm1.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/untested/gnb.band78.tm1.fr1.106PRB.usrpn310.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/untested/gnb.sa.band66.fr1.106PRB.usrpn300.conf b/ci-scripts/conf_files/untested/gnb.sa.band66.fr1.106PRB.usrpn300.conf index 29cc65e17b..18228fde1d 100644 --- a/ci-scripts/conf_files/untested/gnb.sa.band66.fr1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/untested/gnb.sa.band66.fr1.106PRB.usrpn300.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/untested/gnb.sa.band78.fr1.51PRB.usrpb210.conf b/ci-scripts/conf_files/untested/gnb.sa.band78.fr1.51PRB.usrpb210.conf index 85bc18fa17..62f5c042be 100644 --- a/ci-scripts/conf_files/untested/gnb.sa.band78.fr1.51PRB.usrpb210.conf +++ b/ci-scripts/conf_files/untested/gnb.sa.band78.fr1.51PRB.usrpb210.conf @@ -80,9 +80,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/ci-scripts/conf_files/untested/proxy_gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/untested/proxy_gnb.band78.sa.fr1.106PRB.usrpn310.conf index 0ff2cfa2e2..dd4a55c6a7 100644 --- a/ci-scripts/conf_files/untested/proxy_gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/untested/proxy_gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -79,9 +79,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/doc/nfapi.md b/doc/nfapi.md index 41a3770be4..73aaf2e770 100644 --- a/doc/nfapi.md +++ b/doc/nfapi.md @@ -95,8 +95,9 @@ can proceed as follows: - in `vnf.conf` * modify `MACRLCs` section to configure south-bound nFAPI transport * delete `L1s`, `RUs`, and radio-specific sections. - * in `gNBs` section, increase the `ra_ResponseWindow` by one to extend the RA - window: this is necessary because the PNF triggers the scheduler in the VNF + * in `gNBs` section, select a sufficiently large `ra_ResponseWindow` if a UE + does not connect with a message that the response window timed out: + this is necessary because the PNF triggers the scheduler in the VNF in advance, which might make the RA window more likely to run out - copy `monolithic.conf`, which will be your PNF file (`pnf.conf`) - in `pnf.conf` diff --git a/doc/testing_gnb_w_cots_ue_resources/gnb.conf b/doc/testing_gnb_w_cots_ue_resources/gnb.conf index 44d339c951..c9cc393abc 100755 --- a/doc/testing_gnb_w_cots_ue_resources/gnb.conf +++ b/doc/testing_gnb_w_cots_ue_resources/gnb.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf index ef39165e42..de96c77bcb 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf @@ -85,9 +85,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 2; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf index f44a412b3c..12f56ca617 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 7; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf index 3c0feb2ddc..0a8c5f802e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 7; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf index fa2dca082f..a77a65ab0a 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf index 8ded185653..565e83c6a8 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 7; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf index 260c844b25..8de8f20cfb 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf index 67ea04255c..07c0f76f6e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.24PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.24PRB.usrpx300.conf index ea1e70fa87..d794e222cb 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.24PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.24PRB.usrpx300.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpn300.conf index 58adeb991e..e83011d03a 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpn300.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpx300.conf index 227f06bd8b..10812dc846 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpx300.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf index d863f36409..ddd31a810e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf index 0dcd0b95e4..77863ab39a 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf index ef95a53a7d..ffc7b1b21c 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf index 554b886010..58bcdc1d37 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; - #ra_ReponseWindow - #1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf index b3d3775208..e6805d7a92 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf index dd9b571b33..1a31985d8b 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf index 49108d242b..c0786bd56a 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf index 1246e44b2b..82973bef95 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf index e4f2fb8699..bcd16eda2a 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf index 7dfbb5ee95..295a7ab6f1 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf index ad610601a0..27a0fc0a84 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf index 8107c5ffc6..f681e5723a 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf index 167ad9b802..4054d851c2 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf index 02b1e89b88..ee35c48e89 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band66.25prb.rfsim.pci0.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band66.25prb.rfsim.pci0.conf index c2e28725bd..9d6787d6b1 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band66.25prb.rfsim.pci0.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band66.25prb.rfsim.pci0.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band66.25prb.rfsim.pci1.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band66.25prb.rfsim.pci1.conf index c5c84c9919..87d7fdbc4a 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band66.25prb.rfsim.pci1.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band66.25prb.rfsim.pci1.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf index a267d2e864..f0de3e3ab1 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf @@ -88,9 +88,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 3; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650-mplane.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650-mplane.conf index 28f9baf6f8..2fc9481739 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650-mplane.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650-mplane.conf @@ -88,9 +88,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 3; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf index 18f885945f..7b78314f8d 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf @@ -88,9 +88,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 3; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.rfsim.pci0.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.rfsim.pci0.conf index 3221813bef..5f03792795 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.rfsim.pci0.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.rfsim.pci0.conf @@ -80,9 +80,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.rfsim.pci1.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.rfsim.pci1.conf index c7d8cb3269..a69417fa45 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.rfsim.pci1.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.rfsim.pci1.conf @@ -80,9 +80,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.106prb.nfapi.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.106prb.nfapi.conf index bb4aed3dfe..aea3176456 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.106prb.nfapi.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.106prb.nfapi.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.aerial.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.aerial.conf index aa7c380e51..7b88ad23c4 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.aerial.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.aerial.conf @@ -105,9 +105,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.nfapi.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.nfapi.conf index 7cfc66748b..b5a124cf1a 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.nfapi.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.band78.273prb.nfapi.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.cbrs.aerial.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.cbrs.aerial.conf index 5f2293cfb9..e104f82131 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.cbrs.aerial.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-vnf.sa.cbrs.aerial.conf @@ -87,9 +87,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf index b958ed809d..d9eb5e9fa7 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf @@ -114,9 +114,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf index a7010921bb..15c9684706 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf @@ -118,9 +118,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band1.u0.52PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band1.u0.52PRB.usrpb210.conf index e270dd690d..f30c2d445f 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band1.u0.52PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band1.u0.52PRB.usrpb210.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band254.ntn.mu1.24prb.rfsim.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band254.ntn.mu1.24prb.rfsim.conf index dd3307d32c..a6ca5decbe 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band254.ntn.mu1.24prb.rfsim.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band254.ntn.mu1.24prb.rfsim.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band255.ntn.mu0.25prb.rfsim.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band255.ntn.mu0.25prb.rfsim.conf index 7c2c3805ee..c811f0d64e 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band255.ntn.mu0.25prb.rfsim.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band255.ntn.mu0.25prb.rfsim.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band256.ntn.mu0.25prb.rfsim.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band256.ntn.mu0.25prb.rfsim.conf index b720d6d720..3a472ff7a2 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band256.ntn.mu0.25prb.rfsim.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band256.ntn.mu0.25prb.rfsim.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band257.u3.32prb.usrpx410.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band257.u3.32prb.usrpx410.conf index 667b15b10f..933cddfcb9 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band257.u3.32prb.usrpx410.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band257.u3.32prb.usrpx410.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf index a5e9841772..42ac3185f0 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf @@ -79,9 +79,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.52PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.52PRB.usrpb210.conf index b72ca5dc32..a02394b5b2 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.52PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.52PRB.usrpb210.conf @@ -85,9 +85,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf index 1d9693edb1..6b460b0b59 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpn300.conf @@ -80,9 +80,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpx300.conf index b666616764..afd7e6d96f 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.106PRB.usrpx300.conf @@ -96,9 +96,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.24PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.24PRB.usrpx300.conf index 013ca6663b..6b9b104bc0 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.24PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.24PRB.usrpx300.conf @@ -100,9 +100,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.25PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.25PRB.usrpx300.conf index c9dfd6c58a..560b33b0e9 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.25PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.fr1.25PRB.usrpx300.conf @@ -100,9 +100,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.u0.25prb.rfsim.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.u0.25prb.rfsim.conf index f51bb977e0..9458c2b272 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.u0.25prb.rfsim.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band66.u0.25prb.rfsim.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf index 7622e508bc..753670a9eb 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf @@ -86,9 +86,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 2; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.162prb.usrpn310.4x4.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.162prb.usrpn310.4x4.conf index ba427f747e..1890e60516 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.162prb.usrpn310.4x4.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.162prb.usrpn310.4x4.conf @@ -88,9 +88,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf index ce2a75d529..38580730f2 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf @@ -84,9 +84,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 2; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf index 55a78fd901..d55bc6dbda 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf @@ -86,9 +86,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 2; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.fr1.273PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.fr1.273PRB.2x2.usrpn300.conf index f4c31e3ee7..5bfce9a2d9 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.fr1.273PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.fr1.273PRB.2x2.usrpn300.conf @@ -85,9 +85,6 @@ gNBs = ( # powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; - # ra_ReponseWindow - # 1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; # ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR # 1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.fr1.273PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.fr1.273PRB.usrpx300.conf index fcda4d3cc0..f6e571078e 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.fr1.273PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.fr1.273PRB.usrpx300.conf @@ -85,9 +85,6 @@ gNBs = ( # powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; - # ra_ReponseWindow - # 1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; # ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR # 1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.106PRB.usrpb210.RA_2-Step.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.106PRB.usrpb210.RA_2-Step.conf index 8c419177d5..3dc33707f3 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.106PRB.usrpb210.RA_2-Step.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.106PRB.usrpb210.RA_2-Step.conf @@ -80,9 +80,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf index b66012c619..75fe0e6fdd 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf @@ -85,9 +85,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 3; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550-mplane.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550-mplane.conf index 6fa4c200dc..be35562fd7 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550-mplane.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550-mplane.conf @@ -87,9 +87,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 3; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf index 3d584fdaba..d8ca02a3be 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf @@ -87,9 +87,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 3; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-foxconn.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-foxconn.conf index bd4cd59f06..38f399c67f 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-foxconn.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-foxconn.conf @@ -85,9 +85,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf index 43f6f9cef8..3c9780130f 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf @@ -86,9 +86,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 2; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf index b6c940c78b..13617fb578 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf index b4aa830dd5..ddf866b0fd 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.2pattern.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.2pattern.conf index 89a1bb23c6..e29998478e 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.2pattern.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.2pattern.conf @@ -78,9 +78,6 @@ gNBs = # powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; - # ra_ReponseWindow - # 1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; # ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR # 1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf index d2f9dc0005..641c2228a4 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index 7f7054db31..7f750d7259 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -81,9 +81,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.redcap.yaml b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.redcap.yaml index 01c40ca3d7..605b56be93 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.redcap.yaml +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.redcap.yaml @@ -76,9 +76,6 @@ gNBs: #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep: 1 - #ra_ReponseWindow - #1,2,4,8,10,20,40,80 - ra_ResponseWindow: 5 #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR: 4 diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf index 46964ad72d..373ea830e0 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf @@ -80,9 +80,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.yaml b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.yaml index 87ad6080a0..8608ccd290 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.yaml +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.yaml @@ -76,9 +76,6 @@ gNBs: #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep: 1 - #ra_ReponseWindow - #1,2,4,8,10,20,40,80 - ra_ResponseWindow: 4 #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR: 4 diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf index 129b687c1a..30e95f83ec 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.189PRB.rfsim.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.189PRB.rfsim.conf index 5270587271..22047cf06c 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.189PRB.rfsim.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.189PRB.rfsim.conf @@ -86,9 +86,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.217PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.217PRB.2x2.usrpn300.conf index 9802cc0acd..09117464b0 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.217PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.217PRB.2x2.usrpn300.conf @@ -82,9 +82,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.24PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.24PRB.usrpb210.conf index d3852e236a..1398020417 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.24PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.24PRB.usrpb210.conf @@ -80,9 +80,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb0.prs.band261.fr2.64PRB.usrpx310.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb0.prs.band261.fr2.64PRB.usrpx310.conf index fbc77bf957..c51a969208 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb0.prs.band261.fr2.64PRB.usrpx310.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb0.prs.band261.fr2.64PRB.usrpx310.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 7; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; #one (0..15) 4,8,12,16,...60,64 diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb0.prs.band78.fr1.106PRB.usrpx310.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb0.prs.band78.fr1.106PRB.usrpx310.conf index f0ea334f7e..d64bd8e472 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb0.prs.band78.fr1.106PRB.usrpx310.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb0.prs.band78.fr1.106PRB.usrpx310.conf @@ -118,9 +118,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb1.prs.band261.fr2.64PRB.usrpx310.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb1.prs.band261.fr2.64PRB.usrpx310.conf index 143345f275..f04fcc8efc 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb1.prs.band261.fr2.64PRB.usrpx310.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb1.prs.band261.fr2.64PRB.usrpx310.conf @@ -83,9 +83,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 7; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb1.prs.band78.fr1.106PRB.usrpx310.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb1.prs.band78.fr1.106PRB.usrpx310.conf index c8c1582584..bc8af31818 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb1.prs.band78.fr1.106PRB.usrpx310.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb1.prs.band78.fr1.106PRB.usrpx310.conf @@ -117,9 +117,6 @@ gNBs = #powerRampingStep # 0=dB0,1=dB2,2=dB4,3=dB6 powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; From 961a646dc756cba52c5c299e4f77563e89fcbec8 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 8 Jul 2025 11:54:38 +0200 Subject: [PATCH 17/34] Remove dedicated Msg3 TDA MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A dedicated Msg3 TDA is simply not necessary: get_feasible_msg3_tda() already iterates through all TDAs to find a suitable one for Msg3, and takes things such as parameter Δ already into account. The only prerequisite is that the ra_ResponseWindow is long enough. In some configurations, Msg3 TDA ensured that Msg2 still happened during ra_ResponseWindow, while Msg3 was outside of it. This is not necessarily the case anymore, unless ra_ResponseWindow is long enough. For the normal user, removing ra_ResponseWindow from the config will be enough. --- openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c index 6e111ded06..d780cf4fe7 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c +++ b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c @@ -1066,8 +1066,6 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) const int k2 = min_fb_delay; - int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; - // UL TDA index 0 is basic slot configuration starting in symbol 0 til the last but one symbol NR_PUSCH_TimeDomainResourceAllocation_t *tda; tda = set_TimeDomainResourceAllocation(k2, get_SLIV(0, 13)); @@ -1097,20 +1095,6 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) tda = set_TimeDomainResourceAllocation(k2, sliv); asn1cSeqAdd(&tda_list->list, tda); } - // UL TDA index 3 for msg3 in the mixed slot (TDD) - int tdd_period_idx = get_tdd_period_idx(scc->tdd_UL_DL_ConfigurationCommon); - int nb_periods_per_frame = get_nb_periods_per_frame(tdd_period_idx); - int nb_slots_per_period = ((1 << mu) * 10) / nb_periods_per_frame; - int k2_msg3 = nb_slots_per_period - get_delta_for_k2(mu); - bool no_mix_slot = ul_symb < 3; // we need at least 2 symbols for scheduling Msg3 - long sliv = no_mix_slot ? get_SLIV(0, 13) : get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); - struct NR_PUSCH_TimeDomainResourceAllocation *puschTdrAllocMsg3 = set_TimeDomainResourceAllocation(k2_msg3, sliv); - if (*puschTdrAllocMsg3->k2 < min_fb_delay) - *puschTdrAllocMsg3->k2 += nb_slots_per_period; - AssertFatal(*puschTdrAllocMsg3->k2 < 33, - "Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n", - *puschTdrAllocMsg3->k2); - asn1cSeqAdd(&tda_list->list, puschTdrAllocMsg3); } } From 66023f6a8d25ce71bb7b6fcb3f80c3b05bc7f0e5 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 7 Jul 2025 18:44:41 +0200 Subject: [PATCH 18/34] Refactor get_feasible_msg3_tda() Simplify the code. Consider any slot for Msg3, and check that the TDA fits in a given slot (as before). --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 55856c0738..37a1460b1c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -1013,18 +1013,10 @@ static bool get_feasible_msg3_tda(const NR_ServingCellConfigCommon_t *scc, if (fs->frame_type == TDD && !is_ul_slot(temp_slot, fs)) continue; - const tdd_bitmap_t *tdd_slot_bitmap = fs->period_cfg.tdd_slot_bitmap; int s = get_slot_idx_in_period(temp_slot, fs); - // check if enough symbols in case of mixed slot + const tdd_bitmap_t *bm = &fs->period_cfg.tdd_slot_bitmap[s]; bool is_mixed = is_mixed_slot(s, fs); - // if the mixed slot has not enough symbols, skip - if (is_mixed && tdd_slot_bitmap[s].num_ul_symbols < 3) - continue; - - uint16_t slot_mask = - is_mixed ? SL_to_bitmap(NR_NUMBER_OF_SYMBOLS_PER_SLOT - tdd_slot_bitmap[s].num_ul_symbols, - tdd_slot_bitmap[s].num_ul_symbols) - : 0x3fff; + uint16_t slot_mask = is_mixed ? SL_to_bitmap(NR_NUMBER_OF_SYMBOLS_PER_SLOT - bm->num_ul_symbols, bm->num_ul_symbols) : 0x3fff; long startSymbolAndLength = tda_list->list.array[i]->startSymbolAndLength; int start, nr; SLIV2SL(startSymbolAndLength, &start, &nr); From 626fce4f44d52229c8b9c2e2caa879ca34daefd1 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 1 Jul 2025 12:25:42 +0200 Subject: [PATCH 19/34] config_frame_structure(): make const --- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h | 2 +- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common_tdd.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h index 3770d2c6ec..ff6775df96 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h @@ -76,7 +76,7 @@ bool is_dl_slot(const slot_t slot, const frame_structure_t *fs); bool is_mixed_slot(const slot_t slot, const frame_structure_t *fs); int get_tdd_period_idx(NR_TDD_UL_DL_ConfigCommon_t *tdd); void config_frame_structure(int mu, - NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, + const NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, uint8_t tdd_period, uint8_t frame_type, frame_structure_t *fs); diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common_tdd.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common_tdd.c index 8720cbce8b..b9f41a64a3 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common_tdd.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common_tdd.c @@ -98,7 +98,7 @@ int get_tdd_period_idx(NR_TDD_UL_DL_ConfigCommon_t *tdd) * * @return Number of slots in the configured TDD period */ -static uint8_t set_tdd_bmap_period(NR_TDD_UL_DL_Pattern_t *pattern, tdd_period_config_t *pc, int8_t curr_total_slot) +static uint8_t set_tdd_bmap_period(const NR_TDD_UL_DL_Pattern_t *pattern, tdd_period_config_t *pc, int8_t curr_total_slot) { int8_t n_dl_slot = pattern->nrofDownlinkSlots; int8_t n_ul_slot = pattern->nrofUplinkSlots; @@ -154,7 +154,7 @@ static uint8_t set_tdd_bmap_period(NR_TDD_UL_DL_Pattern_t *pattern, tdd_period_c * * @return void */ -static void config_tdd_patterns(NR_TDD_UL_DL_ConfigCommon_t *tdd, frame_structure_t *fs) +static void config_tdd_patterns(const NR_TDD_UL_DL_ConfigCommon_t *tdd, frame_structure_t *fs) { int num_of_patterns = 1; uint8_t nb_slots_p2 = 0; @@ -188,7 +188,7 @@ static void config_tdd_patterns(NR_TDD_UL_DL_ConfigCommon_t *tdd, frame_structur * @param fs pointer to the frame structure to update */ void config_frame_structure(int mu, - NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, + const NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, uint8_t tdd_period, uint8_t frame_type, frame_structure_t *fs) From 5e734238c185fdcfefe710a0382639ddeccfe109 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 3 Jul 2025 17:44:03 +0200 Subject: [PATCH 20/34] pf_ul(): report if UEs scheduled For the multi-UL slot scheduling functionality in a follow-up commit, it would be important to know if the scheduler allocated any UEs. If pf_ul() allocated for some UEs, we might run it again on a different slot. If on the other hand, no UEs were allocated, there is no point in running it again. --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index bbbd72c378..6589d613a6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1866,7 +1866,7 @@ static int comparator(const void *p, const void *q) return 0; } -static void pf_ul(gNB_MAC_INST *nrmac, +static int pf_ul(gNB_MAC_INST *nrmac, post_process_pusch_t *pp_pusch, frame_t sched_frame, int sched_slot, @@ -1887,6 +1887,7 @@ static void pf_ul(gNB_MAC_INST *nrmac, for (int i = 0; i < num_beams; i++) remainUEs[i] = max_num_ue; int numUE = 0; + bool scheduled_something = false; /* Loop UE_list to calculate throughput and coeff */ UE_iterator(UE_list, UE) { @@ -1955,6 +1956,7 @@ static void pf_ul(gNB_MAC_INST *nrmac, /* reduce max_num_ue once we are sure UE can be allocated, i.e., has CCE */ remainUEs[beam.idx]--; + scheduled_something = true; continue; } DevAssert(ul_harq_pid == -1); // all other allocations must be new ones @@ -2207,7 +2209,13 @@ static void pf_ul(gNB_MAC_INST *nrmac, /* reduce max_num_ue once we are sure UE can be allocated, i.e., has CCE */ remainUEs[beam.idx]--; iterator++; + scheduled_something = true; } + int num_ue_sched = num_beams * max_num_ue; + for (int i = 0; i < num_beams; i++) + num_ue_sched -= remainUEs[i]; + DevAssert((num_ue_sched == 0 && !scheduled_something) || (num_ue_sched > 0 && scheduled_something)); + return num_ue_sched; } nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti_req, From 948c0d5d2c3c3a6799df886654a6a7c6d9a0e56e Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 23 Jul 2025 11:22:11 +0200 Subject: [PATCH 21/34] Count and print failed CCE allocations for UL/DL --- doc/MAC/mac-usage.md | 7 +++++-- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 2 ++ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 2 ++ openair2/LAYER2/NR_MAC_gNB/main.c | 10 ++++++---- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 1 + 5 files changed, 16 insertions(+), 6 deletions(-) diff --git a/doc/MAC/mac-usage.md b/doc/MAC/mac-usage.md index ae4f3a626b..1ed71d30b4 100644 --- a/doc/MAC/mac-usage.md +++ b/doc/MAC/mac-usage.md @@ -79,8 +79,8 @@ Example: UE RNTI 2460 CU-UE-ID 2 in-sync PH 28 dB PCMAX 24 dBm, average RSRP -74 (8 meas) UE 2460: CQI 15, RI 2, PMI (14,1) UE 2460: UL-RI 2 TPMI 0 -UE 2460: dlsch_rounds 32917/5113/1504/560, dlsch_errors 211, pucch0_DTX 1385, BLER 0.19557 MCS (1) 23 -UE 2460: ulsch_rounds 3756/353/182/179, ulsch_errors 170, ulsch_DTX 285, BLER 0.33021 MCS (1) 27 (Qm 8 dB) NPRB 5 SNR 31.0 dB +UE 2460: dlsch_rounds 32917/5113/1504/560, dlsch_errors 211, pucch0_DTX 1385, BLER 0.19557 MCS (1) 23 CCE fail 3 +UE 2460: ulsch_rounds 3756/353/182/179, ulsch_errors 170, ulsch_DTX 285, BLER 0.33021 MCS (1) 27 (Qm 8 dB) NPRB 5 SNR 31.0 dB CCE fail 0 UE 2460: MAC: TX 1530943191 RX 194148 bytes UE 2460: LCID 1: TX 651 RX 3031 bytes UE 2460: LCID 2: TX 0 RX 0 bytes @@ -159,6 +159,9 @@ The fourth and fifth line show HARQ-related information: should be close to the target in the gNB configuration file, `pusch_TargetSNRx10`, which should be around 10 times the value shown in the log +* Both ULSCH/DLSCH `CCE fail`: lists the number of failed CCE attempts. If this + number gets high, it signifies that the scheduler tried to scheduled this UE, + but could not allocate the DCI. In the last lines: * `MAC` shows the amount of MAC PDU bytes scheduled in transmit (`TX`, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index dad58f52f0..186e67f10d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -554,6 +554,7 @@ static bool allocate_dl_retransmission(module_id_t module_id, false, sched_ctrl->pdcch_cl_adjust); if (CCEIndex<0) { + sched_ctrl->dl_cce_fail++; LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not find free CCE for DL DCI retransmission\n", UE->rnti, frame, slot); return false; } @@ -806,6 +807,7 @@ static void pf_dl(module_id_t module_id, false, sched_ctrl->pdcch_cl_adjust); if (CCEIndex < 0) { + sched_ctrl->dl_cce_fail++; LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not find free CCE for DL DCI\n", rnti, frame, slot); reset_beam_status(&mac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam); iterator++; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 6589d613a6..41fa85b9ec 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1816,6 +1816,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, sched_ctrl->pdcch_cl_adjust); if (CCEIndex<0) { LOG_D(NR_MAC, "[UE %04x][%4d.%2d] no free CCE for retransmission UL DCI UE\n", UE->rnti, frame, slot); + sched_ctrl->ul_cce_fail++; return false; } @@ -2058,6 +2059,7 @@ static int pf_ul(gNB_MAC_INST *nrmac, sched_ctrl->pdcch_cl_adjust); if (CCEIndex < 0) { + sched_ctrl->ul_cce_fail++; reset_beam_status(&nrmac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, dci_beam.new_beam); reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam); LOG_D(NR_MAC, "[UE %04x][%4d.%2d] no free CCE for UL DCI\n", iterator->UE->rnti, frame, slot); diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c index c4f0fad659..d40fbe84c7 100644 --- a/openair2/LAYER2/NR_MAC_gNB/main.c +++ b/openair2/LAYER2/NR_MAC_gNB/main.c @@ -168,12 +168,13 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset output += snprintf(output, end - output, - ", dlsch_errors %"PRIu64", pucch0_DTX %d, BLER %.5f MCS (%d) %d\n", + ", dlsch_errors %"PRIu64", pucch0_DTX %d, BLER %.5f MCS (%d) %d CCE fail %d\n", stats->dl.errors, stats->pucch0_DTX, sched_ctrl->dl_bler_stats.bler, UE->current_DL_BWP.mcsTableIdx, - sched_ctrl->dl_bler_stats.mcs); + sched_ctrl->dl_bler_stats.mcs, + sched_ctrl->dl_cce_fail); if (reset_rsrp) { stats->num_rsrp_meas = 0; stats->cumul_rsrp = 0; @@ -187,7 +188,7 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset output += snprintf(output, end - output, - ", ulsch_errors %"PRIu64", ulsch_DTX %d, BLER %.5f MCS (%d) %d (Qm %d deltaMCS %d dB) NPRB %d SNR %d.%d dB\n", + ", ulsch_errors %"PRIu64", ulsch_DTX %d, BLER %.5f MCS (%d) %d (Qm %d deltaMCS %d dB) NPRB %d SNR %d.%d dB CCE fail %d\n", stats->ul.errors, stats->ulsch_DTX, sched_ctrl->ul_bler_stats.bler, @@ -197,7 +198,8 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset UE->mac_stats.deltaMCS, UE->mac_stats.NPRB, sched_ctrl->pusch_snrx10 / 10, - sched_ctrl->pusch_snrx10 % 10); + sched_ctrl->pusch_snrx10 % 10, + sched_ctrl->ul_cce_fail); output += snprintf(output, end - output, "UE %04x: MAC: TX %14"PRIu64" RX %14"PRIu64" bytes\n", diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 1778d0507f..36221906b0 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -591,6 +591,7 @@ typedef struct { /// corresponding to the sched_pusch/sched_pdsch structures below int cce_index; uint8_t aggregation_level; + uint32_t dl_cce_fail, ul_cce_fail; /// Array of PUCCH scheduling information /// Its size depends on TDD configuration and max feedback time From 90406c101e6d9c6efa2ca1296435c78c3f66f53e Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 1 Jul 2025 13:36:17 +0200 Subject: [PATCH 22/34] Introduce dedicated ul_tda array --- openair2/LAYER2/NR_MAC_gNB/config.c | 25 +++++++++++++++++++++++++ openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 4 ++++ 2 files changed, 29 insertions(+) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 99e4249bb2..f13567b747 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -801,6 +801,28 @@ static void config_sched_ctrlCommon(gNB_MAC_INST *nr_mac) nr_mac->cset0_bwp_size = type0_PDCCH_CSS_config.num_rbs; } +/** + * \brief Initializes the UL TDA information at the scheduler, as used for + * every UE in UL. This just copies the information from the SCC into a smaller + * list. Note that this list should not be modified, as get_ul_tda() and + * nr_rrc_config_ul_tda() are designed to work in sync (get_ul_tda() assumes an + * ordering, output by nr_rrc_config_ul_tda()). + */ +static void init_ul_tda_info(const NR_PUSCH_TimeDomainResourceAllocationList_t *l, seq_arr_t *sa_tda) +{ + DevAssert(l->list.count > 0 && l->list.count <= 16); + DevAssert(seq_arr_size(sa_tda) == 0); + + for (int i = 0; i < l->list.count; ++i) { + NR_PUSCH_TimeDomainResourceAllocation_t *t = l->list.array[i]; + DevAssert(t->k2); + NR_tda_info_t tda = { .mapping_type = typeB, .k2 = *t->k2, .valid_tda = true }; + SLIV2SL(t->startSymbolAndLength, &tda.startSymbolIndex, &tda.nrOfSymbols); + LOG_I(NR_MAC, "TDA index %d: start %d length %d k2 %ld\n", i, tda.startSymbolIndex, tda.nrOfSymbols, tda.k2); + seq_arr_push_back(sa_tda, &tda, sizeof(tda)); + } +} + void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *config) { DevAssert(nrmac != NULL); @@ -847,6 +869,9 @@ void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, c if (IS_SA_MODE(get_softmodem_params())) config_sched_ctrlCommon(nrmac); + + seq_arr_init(&nrmac->ul_tda, sizeof(NR_tda_info_t)); + init_ul_tda_info(scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList, &nrmac->ul_tda); } bool nr_mac_configure_other_sib(gNB_MAC_INST *nrmac, int num_cu_sib, const f1ap_sib_msg_t cu_sib[num_cu_sib]) diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 36221906b0..9dcddcef4d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -929,6 +929,10 @@ typedef struct gNB_MAC_INST_s { bool identity_pm; int precoding_matrix_size[NR_MAX_NB_LAYERS]; int fapi_beam_index[MAX_NUM_OF_SSB]; + + /// dedicate UL TDA, common for all UEs + seq_arr_t ul_tda; + nr_mac_rrc_ul_if_t mac_rrc; f1_config_t f1_config; int16_t frame; From 9059c0290ef6438a0b54c181c294223c00262525 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 30 Jun 2025 15:05:11 +0200 Subject: [PATCH 23/34] Provide selected TDA to pf_ul() --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 73 +++++++++---------- 1 file changed, 34 insertions(+), 39 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 41fa85b9ec..50c4f8c596 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1709,7 +1709,8 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, NR_UE_info_t *UE, int harq_pid, const NR_ServingCellConfigCommon_t *scc, - const int tda) + const int tda, + const NR_tda_info_t *tda_info) { const int CC_id = 0; int frame = pp_pusch->frame; @@ -1726,22 +1727,15 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, const uint32_t bwpStart = bwp_info.bwpStart; const uint8_t nrOfLayers = retInfo->nrOfLayers; LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda); - NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, - sched_ctrl->coreset->controlResourceSetId, - sched_ctrl->search_space->searchSpaceType->present, - TYPE_C_RNTI_, - tda); - if (!tda_info.valid_tda) - return false; /* mark when retransmission will happen */ int slots_frame = nrmac->frame_structure.numb_slots_frame; - new_sched.frame = (frame + (slot + tda_info.k2 + get_NTN_Koffset(scc)) / slots_frame) % MAX_FRAME_NUMBER; - new_sched.slot = (slot + tda_info.k2 + get_NTN_Koffset(scc)) % slots_frame; + new_sched.frame = (frame + (slot + tda_info->k2 + get_NTN_Koffset(scc)) / slots_frame) % MAX_FRAME_NUMBER; + new_sched.slot = (slot + tda_info->k2 + get_NTN_Koffset(scc)) % slots_frame; new_sched.bwp_info = bwp_info; DevAssert(new_sched.ul_harq_pid == harq_pid); - bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == tda_info.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= tda_info.nrOfSymbols); + bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == tda_info->startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= tda_info->nrOfSymbols); if (reuse_old_tda && nrOfLayers == retInfo->nrOfLayers) { /* Check the resource is enough for retransmission */ const uint16_t slbitmap = SL_to_bitmap(retInfo->tda_info.startSymbolIndex, retInfo->tda_info.nrOfSymbols); @@ -1760,10 +1754,10 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, new_sched.rbStart = rbStart; LOG_D(NR_MAC, "Retransmission keeping TDA %d and TBS %d\n", tda, retInfo->tb_size); } else { - NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, nrOfLayers); + NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, tda_info, nrOfLayers); /* the retransmission will use a different time domain allocation, check * that we have enough resources */ - const uint16_t slbitmap = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); + const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols); while (rbStart < bwpSize && (rballoc_mask[rbStart + bwpStart] & slbitmap)) rbStart++; int rbSize = 0; @@ -1775,7 +1769,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, retInfo->R, UE->current_UL_BWP.transform_precoding, nrOfLayers, - tda_info.nrOfSymbols, + tda_info->nrOfSymbols, dmrs_info.N_PRB_DMRS * dmrs_info.num_dmrs_symb, retInfo->tb_size, 1, /* minimum of 1RB: need to find exact TBS, don't preclude any number */ @@ -1798,7 +1792,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, new_sched.rbStart = rbStart; new_sched.tb_size = new_tbs; new_sched.time_domain_allocation = tda; - new_sched.tda_info = tda_info; + new_sched.tda_info = *tda_info; new_sched.dmrs_info = dmrs_info; } @@ -1869,8 +1863,8 @@ static int comparator(const void *p, const void *q) static int pf_ul(gNB_MAC_INST *nrmac, post_process_pusch_t *pp_pusch, - frame_t sched_frame, - int sched_slot, + int tda, + const NR_tda_info_t *tda_info, NR_UE_info_t *UE_list[], int max_num_ue, int num_beams, @@ -1881,6 +1875,12 @@ static int pf_ul(gNB_MAC_INST *nrmac, int slot = pp_pusch->slot; NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon; int slots_per_frame = nrmac->frame_structure.numb_slots_frame; + DevAssert(tda_info->valid_tda); + const int k2 = tda_info->k2 + get_NTN_Koffset(scc); + const int sched_frame = (frame + (slot + k2) / slots_per_frame) % MAX_FRAME_NUMBER; + const int sched_slot = (slot + k2) % slots_per_frame; + DevAssert(is_ul_slot(sched_slot, &nrmac->frame_structure)); + const int min_rb = nrmac->min_grant_prb; // UEs that could be scheduled UEsched_t UE_sched[MAX_MOBILES_PER_GNB + 1] = {0}; @@ -1936,7 +1936,6 @@ static int pf_ul(gNB_MAC_INST *nrmac, LOG_D(NR_MAC,"pf_ul: UE %04x harq_pid %d\n", UE->rnti, ul_harq_pid); if (ul_harq_pid >= 0) { /* Allocate retransmission*/ - const int tda = get_ul_tda(nrmac, sched_frame, sched_slot); bool r = allocate_ul_retransmission(nrmac, pp_pusch, rballoc_mask, @@ -1945,7 +1944,8 @@ static int pf_ul(gNB_MAC_INST *nrmac, UE, ul_harq_pid, scc, - tda); + tda, + tda_info); if (!r) { LOG_D(NR_MAC, "[UE %04x][%4d.%2d] UL retransmission could not be allocated\n", UE->rnti, frame, slot); reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam); @@ -2069,21 +2069,12 @@ static int pf_ul(gNB_MAC_INST *nrmac, else LOG_D(NR_MAC, "%4d.%2d free CCE for UL DCI UE %04x\n", frame, slot, iterator->UE->rnti); - - int tda = get_ul_tda(nrmac, sched_frame, sched_slot); - NR_tda_info_t tda_info = get_ul_tda_info(current_BWP, - sched_ctrl->coreset->controlResourceSetId, - sched_ctrl->search_space->searchSpaceType->present, - TYPE_C_RNTI_, - tda); - AssertFatal(tda_info.valid_tda, "Invalid TDA from get_ul_tda_info\n"); - const int index = ul_buffer_index(sched_frame, sched_slot, slots_per_frame, nrmac->vrb_map_UL_size); uint16_t *rballoc_mask = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE]; /* find maximum amount of RBs that we can schedule starting from first free RB */ int rbStart = 0; - const uint16_t slbitmap = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols); + const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols); bwp_info_t bi = get_pusch_bwp_start_size(iterator->UE); while (rbStart < bi.bwpSize && (rballoc_mask[rbStart + bi.bwpStart] & slbitmap)) rbStart++; @@ -2127,8 +2118,8 @@ static int pf_ul(gNB_MAC_INST *nrmac, .nrOfLayers = nrOfLayers, // tpmi in post-process .time_domain_allocation = tda, - .tda_info = tda_info, - .dmrs_info = get_ul_dmrs_params(scc, current_BWP, &tda_info, nrOfLayers), + .tda_info = *tda_info, + .dmrs_info = get_ul_dmrs_params(scc, current_BWP, tda_info, nrOfLayers), .bwp_info = bi, // phr_txpower_calc below }; @@ -2542,11 +2533,10 @@ static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp NR_COMMON_channels_t *cc = nr_mac->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; - const NR_SIB1_t *sib1 = nr_mac->common_channels[0].sib1 ? nr_mac->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL; - NR_ServingCellConfigCommonSIB_t *scc_sib1 = sib1 ? sib1->servingCellConfigCommon : NULL; - AssertFatal(scc || scc_sib1, "We need one serving cell config common\n"); + AssertFatal(scc, "We need one serving cell config common\n"); + const int slots_frame = nr_mac->frame_structure.numb_slots_frame; - // TODO we assume the same K2 for all UEs + // we assume the same K2 for all UEs const int K2 = nr_mac->radio_config.minRXTXTIME + get_NTN_Koffset(scc); const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER; const int sched_slot = (slot + K2) % slots_frame; @@ -2555,9 +2545,6 @@ static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp int num_beams = nr_mac->beam_info.beam_allocation ? nr_mac->beam_info.beams_per_period : 1; int bw = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth; - int len[num_beams]; - for (int i = 0; i < num_beams; i++) - len[i] = bw; int average_agg_level = 4; // TODO find a better estimation int max_sched_ues = bw / (average_agg_level * NR_NB_REG_PER_CCE); @@ -2565,8 +2552,16 @@ static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp // FAPI cannot handle more than MAX_DCI_CORESET DCIs max_sched_ues = min(max_sched_ues, MAX_DCI_CORESET); + int tda = get_ul_tda(nr_mac, sched_frame, sched_slot); + /* TODO: iterate over all available UL slots if there are more than DL */ + /* the following supposes that the TDA is the same across all BWPs */ + NR_tda_info_t *tda_info = seq_arr_at(&nr_mac->ul_tda, tda); + + int len[num_beams]; + for (int i = 0; i < num_beams; i++) + len[i] = bw; /* proportional fair scheduling algorithm */ - pf_ul(nr_mac, pp_pusch, sched_frame, sched_slot, nr_mac->UE_info.connected_ue_list, max_sched_ues, num_beams, len); + pf_ul(nr_mac, pp_pusch, tda, tda_info, nr_mac->UE_info.connected_ue_list, max_sched_ues, num_beams, len); } nr_pp_impl_ul nr_init_ulsch_preprocessor(int CC_id) From 4aea866b6aac83f2056f5abf3ae733b3d6d8eb8d Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 3 Jul 2025 10:27:34 +0200 Subject: [PATCH 24/34] Use k2 to decide which TDA to use For scheduling multiple ULSCH ahead, we will have to use different k2. Hence, we will need to check for k2 in the TDA selection as well. The function get_ul_tda() is renamed to get_num_ul_tda() to reflect that it might return multiple TDAs (not done in this commit, but in a follow-up MR). get_num_ul_tda() also returns a pointer to the first suitable TDA. In the phy-test scheduler, simplify the selection of the TDA to use: do not hardcode a specific K2, but rather, use the first one (with any k2). --- openair2/LAYER2/NR_MAC_gNB/config.c | 6 ++-- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 35 ++++++------------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 33 ++++++++++++----- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 2 +- 4 files changed, 38 insertions(+), 38 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index f13567b747..2866900f5e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -804,9 +804,9 @@ static void config_sched_ctrlCommon(gNB_MAC_INST *nr_mac) /** * \brief Initializes the UL TDA information at the scheduler, as used for * every UE in UL. This just copies the information from the SCC into a smaller - * list. Note that this list should not be modified, as get_ul_tda() and - * nr_rrc_config_ul_tda() are designed to work in sync (get_ul_tda() assumes an - * ordering, output by nr_rrc_config_ul_tda()). + * list. Note that this list should not be modified, as get_num_ul_tda() and + * nr_rrc_config_ul_tda() are designed to work in sync (get_num_ul_tda() + * assumes an ordering, output by nr_rrc_config_ul_tda()). */ static void init_ul_tda_info(const NR_PUSCH_TimeDomainResourceAllocationList_t *l, seq_arr_t *sa_tda) { diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 6323ab4c6a..00872ade89 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -239,26 +239,19 @@ void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_p uint16_t rbStart = 0; uint16_t rbSize = min(bw, target_ul_bw); - NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(ul_bwp, - sched_ctrl->coreset->controlResourceSetId, - sched_ctrl->search_space->searchSpaceType->present, - TYPE_C_RNTI_); - const int temp_tda = get_ul_tda(nr_mac, frame, slot); - if (temp_tda < 0) - return; - AssertFatal(temp_tda < tdaList->list.count, "time domain assignment %d >= %d\n", temp_tda, tdaList->list.count); - const int mu = ul_bwp->scs; - int K2 = get_K2(tdaList, temp_tda, mu, scc); + DevAssert(seq_arr_size(&nr_mac->ul_tda) > 0); + const int tda = 0; + NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, + sched_ctrl->coreset->controlResourceSetId, + sched_ctrl->search_space->searchSpaceType->present, + TYPE_C_RNTI_, + tda); + DevAssert(tda_info.valid_tda); + + int K2 = tda_info.k2 + get_NTN_Koffset(scc); int slots_frame = nr_mac->frame_structure.numb_slots_frame; const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER; const int sched_slot = (slot + K2) % slots_frame; - const int tda = get_ul_tda(nr_mac, sched_frame, sched_slot); - if (tda < 0) - return; - AssertFatal(tda < tdaList->list.count, - "time domain assignment %d >= %d\n", - tda, - tdaList->list.count); /* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE * limitations). Note that if K2 or the TDD configuration is changed, below @@ -267,14 +260,6 @@ void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_p if (!is_xlsch_in_slot(ulsch_slot_bitmap, slot_period)) return; - NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, - sched_ctrl->coreset->controlResourceSetId, - sched_ctrl->search_space->searchSpaceType->present, - TYPE_C_RNTI_, - tda); - if (!tda_info.valid_tda) - return; - // TODO implement beam procedures for phy-test mode int beam = 0; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 50c4f8c596..40d9457a23 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -38,9 +38,10 @@ //#define SRS_IND_DEBUG -/* \brief Get the UL TDA for given frame and slot. It identifies the index of - * TDA in the TDA list, as hardcoded in nr_rrc_config_ul_tda(). */ -int get_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot) +/* \brief Get the number of UL TDAs that could be used in frame and slot, reachable + * via specific k2. The output parameter first_idx is a pointer to the first + * suitable TDA, and the function returns the number of suitable TDAs, or 0. */ +int get_num_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot, int k2, const NR_tda_info_t **first_idx) { /* we assume that this function is mutex-protected from outside */ NR_SCHED_ENSURE_LOCKED(&nrmac->sched_lock); @@ -48,23 +49,34 @@ int get_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot) /* there is a mixed slot only when in TDD */ frame_structure_t *fs = &nrmac->frame_structure; + /* TODO: we assume currently that all UL TDA have same k2, check below */ + NR_tda_info_t *tda_info = seq_arr_at(&nrmac->ul_tda, 0); + if (!tda_info->valid_tda || tda_info->k2 != k2) + return 0; + if (fs->frame_type == TDD) { // if there is uplink symbols in mixed slot int s = get_slot_idx_in_period(slot, fs); tdd_bitmap_t *tdd_slot_bitmap = fs->period_cfg.tdd_slot_bitmap; if ((tdd_slot_bitmap[s].num_ul_symbols > 1) && is_mixed_slot(s, fs)) { - return 2; // mixed slot, all symbols of mixed minus last + *first_idx = seq_arr_at(&nrmac->ul_tda, 2); // mixed slot, all symbols of mixed minus last + return 1; } } // Avoid slots with the SRS UE_iterator(nrmac->UE_info.connected_ue_list, UE) { NR_sched_srs_t sched_srs = UE->UE_sched_ctrl.sched_srs; - if(sched_srs.srs_scheduled && sched_srs.frame == frame && sched_srs.slot == slot) - return 1; // symbols 0--12 + if(sched_srs.srs_scheduled && sched_srs.frame == frame && sched_srs.slot == slot) { + *first_idx = seq_arr_at(&nrmac->ul_tda, 1); // symbols 0--12 + return 1; + } } - return 0; // symbols 0--13, // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) + // symbols 0--13, if FDD or not mixed slot in TDD, for now use default TDA + // (TODO handle CSI-RS slots) + *first_idx = seq_arr_at(&nrmac->ul_tda, 0); + return 1; } bwp_info_t get_pusch_bwp_start_size(NR_UE_info_t *UE) @@ -2552,10 +2564,13 @@ static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp // FAPI cannot handle more than MAX_DCI_CORESET DCIs max_sched_ues = min(max_sched_ues, MAX_DCI_CORESET); - int tda = get_ul_tda(nr_mac, sched_frame, sched_slot); + const NR_tda_info_t *tda_info = NULL; + int n_tda = get_num_ul_tda(nr_mac, sched_frame, sched_slot, nr_mac->radio_config.minRXTXTIME, &tda_info); + DevAssert(n_tda == 1); + int tda = seq_arr_dist(&nr_mac->ul_tda, seq_arr_front(&nr_mac->ul_tda), tda_info); + AssertFatal(tda >= 0 && tda < 16, "illegal TDA index %d\n", tda); /* TODO: iterate over all available UL slots if there are more than DL */ /* the following supposes that the TDA is the same across all BWPs */ - NR_tda_info_t *tda_info = seq_arr_at(&nr_mac->ul_tda, tda); int len[num_beams]; for (int i = 0; i < num_beams; i++) diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 2c9e1a2a43..91c0969dde 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -417,7 +417,7 @@ void free_sched_pucch_list(NR_UE_sched_ctrl_t *sched_ctrl); bool add_UE_to_list(int list_size, NR_UE_info_t *list[list_size], NR_UE_info_t *UE); NR_UE_info_t *remove_UE_from_list(int list_size, NR_UE_info_t *list[list_size], rnti_t rnti); int get_dl_tda(const gNB_MAC_INST *nrmac, int slot); -int get_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot); +int get_num_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot, int k2, const NR_tda_info_t **first_idx); int get_cce_index(const gNB_MAC_INST *nrmac, const int CC_id, From 3102068e71264de3c1fb2db96f2f031da20edaca Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 3 Jul 2025 12:16:11 +0200 Subject: [PATCH 25/34] Add ULSCH preprocessor slot logic for scheduling multiple slots Add a loop to advance slots as determined by current ("DL") slot, and advance further into the future (for "UL" slots) if TDAs allow. Ensure to schedule all TDAs if it's the last DL slot, to guarantee a previously scheduled TDA will also reoccur (i.e., for guaranteeing that retransmissions can be made). Note that the check for number of UE being zero is removed, as this allows to keep "ul_next" close to the "min_next" slot. This way, we can use fs_get_max(); otherwise, if we did not always execute this loop, they might diverge far from each other, making the logic inside the loop more complicated. This commit introduces a new type "fsn_t" (frame-slot number) that encapsulates a single frame-slot combination in a single struct. The helper functions (in gNB_scheduler_ulsch.c) should be moved to a new file under common/, but we don't do this here to limit the amount of code changes. --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 108 +++++++++++++----- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 10 ++ 2 files changed, 88 insertions(+), 30 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 40d9457a23..93db0d1945 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -2534,49 +2534,103 @@ void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE nr_mac->cset0_bwp_size); } +fsn_t fs_add_delta(const frame_structure_t *fs, uint32_t delta, fsn_t fsn) +{ + const int slots_frame = fs->numb_slots_frame; + fsn_t res = { + .f = (fsn.f + (fsn.s + delta) / slots_frame) % MAX_FRAME_NUMBER, + .s = (fsn.s + delta) % slots_frame, + }; + return res; +} +int fs_get_diff(const frame_structure_t *fs, fsn_t a, fsn_t b) +{ + const int slots_frame = fs->numb_slots_frame; + int diff = (a.f * slots_frame + a.s) - (b.f * slots_frame + b.s); + if (diff < -512 * slots_frame) + diff += 1024 * slots_frame; + else if (diff > 512 * slots_frame) + diff -= 1024 * slots_frame; + return diff; +} +fsn_t fs_get_max(const frame_structure_t *fs, fsn_t a, fsn_t b) +{ + if (fs_get_diff(fs, a, b) <= 0) { + return b; + } else { + return a; + } +} + static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_pusch) { int frame = pp_pusch->frame; int slot = pp_pusch->slot; - // no UEs - if (nr_mac->UE_info.connected_ue_list[0] == NULL) - return; - NR_COMMON_channels_t *cc = nr_mac->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; AssertFatal(scc, "We need one serving cell config common\n"); + const frame_structure_t *fs = &nr_mac->frame_structure; - const int slots_frame = nr_mac->frame_structure.numb_slots_frame; // we assume the same K2 for all UEs - const int K2 = nr_mac->radio_config.minRXTXTIME + get_NTN_Koffset(scc); - const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER; - const int sched_slot = (slot + K2) % slots_frame; - if (!is_ul_slot(sched_slot, &nr_mac->frame_structure)) - return; + const int koffset = get_NTN_Koffset(scc); + const int min_rxtx = nr_mac->radio_config.minRXTXTIME + koffset; int num_beams = nr_mac->beam_info.beam_allocation ? nr_mac->beam_info.beams_per_period : 1; int bw = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth; int average_agg_level = 4; // TODO find a better estimation - int max_sched_ues = bw / (average_agg_level * NR_NB_REG_PER_CCE); + int max_dci = bw / (average_agg_level * NR_NB_REG_PER_CCE); // FAPI cannot handle more than MAX_DCI_CORESET DCIs - max_sched_ues = min(max_sched_ues, MAX_DCI_CORESET); + max_dci = min(max_dci, MAX_DCI_CORESET); - const NR_tda_info_t *tda_info = NULL; - int n_tda = get_num_ul_tda(nr_mac, sched_frame, sched_slot, nr_mac->radio_config.minRXTXTIME, &tda_info); - DevAssert(n_tda == 1); - int tda = seq_arr_dist(&nr_mac->ul_tda, seq_arr_front(&nr_mac->ul_tda), tda_info); - AssertFatal(tda >= 0 && tda < 16, "illegal TDA index %d\n", tda); - /* TODO: iterate over all available UL slots if there are more than DL */ - /* the following supposes that the TDA is the same across all BWPs */ + fsn_t current = {frame, slot}; + fsn_t min_next = fs_add_delta(fs, min_rxtx, current); + /* if it's the last DL slot, we should try all TDAs to make sure that the + * scheduler can reach e.g. the next mixed slot. Otherwise, if we don't, we + * might starve HARQ processes that need a retransmission in a specific slot + * but we might not necessarily reach it */ + bool last_dl = (current.s % fs->numb_slots_period) == (fs->period_cfg.num_dl_slots - 1); + fsn_t *next = &nr_mac->ul_next; + while (max_dci > 0) { + /* go to the next UL slot, skipping DL if necessary */ + *next = fs_get_max(fs, *next, min_next); + while (!is_ul_slot(next->s, fs)) + *next = fs_add_delta(fs, 1, *next); + if (!is_dl_slot(current.s, fs)) // if current slot is not DL, nothing to do + break; - int len[num_beams]; - for (int i = 0; i < num_beams; i++) - len[i] = bw; - /* proportional fair scheduling algorithm */ - pf_ul(nr_mac, pp_pusch, tda, tda_info, nr_mac->UE_info.connected_ue_list, max_sched_ues, num_beams, len); + /* get a TDA so that next UL scheduling slot can be reached from current, + * and exit if there is no such TDA. Remove koffset, as it is + * "cell-specific", i.e., the UE will add it on the computation. */ + int k2 = fs_get_diff(fs, *next, current) - koffset; + DevAssert(k2 > 0); + const NR_tda_info_t *tda_info = NULL; + int n_tda = get_num_ul_tda(nr_mac, next->f, next->s, k2, &tda_info); + if (n_tda == 0) /* no TDA fulfills this */ + break; + /* TODO: get_num_ul_tda() might indicate multiple TDAs to use (e.g., one + * handling SRS), this will be fixed in a follow-up commit. */ + DevAssert(tda_info->valid_tda); + int tda = seq_arr_dist(&nr_mac->ul_tda, seq_arr_front(&nr_mac->ul_tda), tda_info); + AssertFatal(tda >= 0 && tda < 16, "illegal TDA index %d\n", tda); + + int len[num_beams]; + for (int i = 0; i < num_beams; i++) + len[i] = bw; + /* proportional fair scheduling algorithm */ + int sched = pf_ul(nr_mac, pp_pusch, tda, tda_info, nr_mac->UE_info.connected_ue_list, max_dci, num_beams, len); + LOG_D(NR_MAC, "run pf_ul() at %4d.%2d with tda %d k2 %d (ULSCH at %4d.%2d) scheduled %d last_dl %d\n", frame, slot, tda, k2, next->f, next->s, sched, last_dl); + /* if we did not schedule anything, and it's not the last slot, break. In + * the case we did schedule or it's the last slot (see above!), continue + * advancing till there is no TDA anymore */ + if (sched == 0 && !last_dl) + break; + max_dci -= sched; + + *next = fs_add_delta(fs, 1, *next); + } } nr_pp_impl_ul nr_init_ulsch_preprocessor(int CC_id) @@ -2620,11 +2674,5 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_ ul_dci_req->Slot = slot; post_process_pusch_t pusch = { .frame = frame, .slot = slot, .ul_dci_req = ul_dci_req, .pdcch_pdu_coreset = {NULL}, }; - /* Uplink data ONLY can be scheduled when the current slot is downlink slot, - * because we have to schedule the DCI0 first before schedule uplink data */ - if (!is_dl_slot(slot, &nr_mac->frame_structure)) { - LOG_D(NR_MAC, "Current slot %d is NOT DL slot, cannot schedule DCI0 for UL data\n", slot); - return; - } nr_mac->pre_processor_ul(nr_mac, &pusch); } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 9dcddcef4d..aea5724056 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -828,6 +828,14 @@ typedef struct { uint64_t used_prb_aggregate; } mac_stats_t; +/// helper type to encapsulate a frame/slot combination in a single type. +/// Currently only used in the UL preprocessor. Note: if you use this type +/// further, please refactor it into a common type first. +typedef struct fsn { + frame_t f; + slot_t s; +} fsn_t; + /*! \brief top level eNB MAC structure */ typedef struct gNB_MAC_INST_s { /// Ethernet parameters for northbound midhaul interface @@ -932,6 +940,8 @@ typedef struct gNB_MAC_INST_s { /// dedicate UL TDA, common for all UEs seq_arr_t ul_tda; + /// next UL slot to schedule + fsn_t ul_next; nr_mac_rrc_ul_if_t mac_rrc; f1_config_t f1_config; From cf8099fab19c242996bc32bf0f551d943429245b Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 23 Jul 2025 10:50:45 +0200 Subject: [PATCH 26/34] Refactor TDA allocation: scheduler can take advantage of multiple k2 Add multiple TDAs with k2 larger than the min_rxtxtime, to potentially allow to allocate all available slots. For this, nr_rrc_config_ul_tda() inspects the TDD pattern, and allocates as many TDAs as necessary. It also sorts the TDA list, with smaller k2 and larger symbol lengths first. This in turn is now used by get_num_ul_tda() to use a k2 and the slot configuration to find a suitable TDA, assuming a list as sorted in nr_rrc_config_ul_tda(). Note that since get_num_ul_tda() does only inspect the available UL slots, there might be overlap (e.g., when scheduling SRS), which will be fixed in a follow-up commit. Also, TDD pattern 2 is not handled here yet, and a follow-up commit will fix it. --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 71 +++++++++++-------- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 2 +- openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c | 55 +++++++++++++- 3 files changed, 96 insertions(+), 32 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 93db0d1945..4f55f73db1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -38,45 +38,58 @@ //#define SRS_IND_DEBUG -/* \brief Get the number of UL TDAs that could be used in frame and slot, reachable +/* \brief Get the number of UL TDAs that could be used in slot, reachable * via specific k2. The output parameter first_idx is a pointer to the first * suitable TDA, and the function returns the number of suitable TDAs, or 0. */ -int get_num_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot, int k2, const NR_tda_info_t **first_idx) +int get_num_ul_tda(gNB_MAC_INST *nrmac, int slot, int k2, const NR_tda_info_t **first_idx) { /* we assume that this function is mutex-protected from outside */ NR_SCHED_ENSURE_LOCKED(&nrmac->sched_lock); - /* there is a mixed slot only when in TDD */ - frame_structure_t *fs = &nrmac->frame_structure; + const frame_structure_t *fs = &nrmac->frame_structure; + const int slot_period = slot % fs->numb_slots_period; + const tdd_bitmap_t *bm = &fs->period_cfg.tdd_slot_bitmap[slot_period]; + /* For some reason, we only store the number of symbols if it's mixed */ + const int num_ul_symbols = bm->slot_type == TDD_NR_MIXED_SLOT ? bm->num_ul_symbols : 14; + const uint16_t ul_bitmap = SL_to_bitmap(14 - num_ul_symbols, num_ul_symbols); - /* TODO: we assume currently that all UL TDA have same k2, check below */ - NR_tda_info_t *tda_info = seq_arr_at(&nrmac->ul_tda, 0); - if (!tda_info->valid_tda || tda_info->k2 != k2) + *first_idx = NULL; + FOR_EACH_SEQ_ARR(NR_tda_info_t *, tda, &nrmac->ul_tda) { + DevAssert(tda->valid_tda); + // nr_rrc_config_ul_tda() orders by k2, so skip smaller and return for + // bigger ones + if (tda->k2 < k2) + continue; + if (tda->k2 > k2) + break; // there won't be a suitable k2 anymore + + uint16_t tda_bitmap = SL_to_bitmap(tda->startSymbolIndex, tda->nrOfSymbols); + // nr_rrc_config_ul_tda() assures TDAs are from largest to smallest symbol number. + // check that this TDA fits entirely into this slot's mask (slot might be + // smaller in mixed slots)., A mixed slot TDA would be checked last, so a + // full slot TDA will be used for a full UL slot. + if ((tda_bitmap & ul_bitmap) == tda_bitmap) { // if TDA fits entiry + *first_idx = tda; + break; + } + } + if (*first_idx == NULL) /* nothing fit */ return 0; - if (fs->frame_type == TDD) { - // if there is uplink symbols in mixed slot - int s = get_slot_idx_in_period(slot, fs); - tdd_bitmap_t *tdd_slot_bitmap = fs->period_cfg.tdd_slot_bitmap; - if ((tdd_slot_bitmap[s].num_ul_symbols > 1) && is_mixed_slot(s, fs)) { - *first_idx = seq_arr_at(&nrmac->ul_tda, 2); // mixed slot, all symbols of mixed minus last - return 1; - } + NR_tda_info_t *end_it = seq_arr_next(&nrmac->ul_tda, *first_idx); + while (end_it != seq_arr_end(&nrmac->ul_tda) && end_it->k2 == k2) { + /* the following TDAs should all fit as long as the k2 is the same */ + uint16_t tda_bitmap = SL_to_bitmap(end_it->startSymbolIndex, end_it->nrOfSymbols); + AssertFatal((tda_bitmap & ul_bitmap) == tda_bitmap, + "TDA should fit inside slot, but is not the case for k2 %ld bitmap 0x%04x\n", + end_it->k2, + tda_bitmap); + end_it = seq_arr_next(&nrmac->ul_tda, end_it); } - // Avoid slots with the SRS - UE_iterator(nrmac->UE_info.connected_ue_list, UE) { - NR_sched_srs_t sched_srs = UE->UE_sched_ctrl.sched_srs; - if(sched_srs.srs_scheduled && sched_srs.frame == frame && sched_srs.slot == slot) { - *first_idx = seq_arr_at(&nrmac->ul_tda, 1); // symbols 0--12 - return 1; - } - } - - // symbols 0--13, if FDD or not mixed slot in TDD, for now use default TDA - // (TODO handle CSI-RS slots) - *first_idx = seq_arr_at(&nrmac->ul_tda, 0); - return 1; + ptrdiff_t diff = seq_arr_dist(&nrmac->ul_tda, *first_idx, end_it); + AssertFatal(diff > 0 && diff <= seq_arr_size(&nrmac->ul_tda), "dist %ld\n", diff); + return diff; } bwp_info_t get_pusch_bwp_start_size(NR_UE_info_t *UE) @@ -2607,7 +2620,7 @@ static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp int k2 = fs_get_diff(fs, *next, current) - koffset; DevAssert(k2 > 0); const NR_tda_info_t *tda_info = NULL; - int n_tda = get_num_ul_tda(nr_mac, next->f, next->s, k2, &tda_info); + int n_tda = get_num_ul_tda(nr_mac, next->s, k2, &tda_info); if (n_tda == 0) /* no TDA fulfills this */ break; /* TODO: get_num_ul_tda() might indicate multiple TDAs to use (e.g., one diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 91c0969dde..9caa78bf7e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -417,7 +417,7 @@ void free_sched_pucch_list(NR_UE_sched_ctrl_t *sched_ctrl); bool add_UE_to_list(int list_size, NR_UE_info_t *list[list_size], NR_UE_info_t *UE); NR_UE_info_t *remove_UE_from_list(int list_size, NR_UE_info_t *list[list_size], rnti_t rnti); int get_dl_tda(const gNB_MAC_INST *nrmac, int slot); -int get_num_ul_tda(gNB_MAC_INST *nrmac, int frame, int slot, int k2, const NR_tda_info_t **first_idx); +int get_num_ul_tda(gNB_MAC_INST *nrmac, int slot, int k2, const NR_tda_info_t **first_idx); int get_cce_index(const gNB_MAC_INST *nrmac, const int CC_id, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c index d780cf4fe7..22d3b55fa4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c +++ b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c @@ -1058,6 +1058,29 @@ static struct NR_PUSCH_TimeDomainResourceAllocation *set_TimeDomainResourceAlloc return puschTdrAlloc; } +static int tda_cmp(const void *tda_a, const void *tda_b) +{ + const NR_PUSCH_TimeDomainResourceAllocation_t *a = *(const NR_PUSCH_TimeDomainResourceAllocation_t **)tda_a; + const NR_PUSCH_TimeDomainResourceAllocation_t *b = *(const NR_PUSCH_TimeDomainResourceAllocation_t **)tda_b; + DevAssert(a->k2 && b->k2); + if (*a->k2 < *b->k2) + return -1; // smaller first + if (*a->k2 > *b->k2) + return 1; + // same k2: order from big to small TDA number + int as, al, bs, bl; + SLIV2SL(a->startSymbolAndLength, &as, &al); + SLIV2SL(b->startSymbolAndLength, &bs, &bl); + if (al < bl) + return 1; // bigger first + if (al > bl) + return -1; + return 0; +} + +/* \brief Set up a list of time domain allocations as suitable for the TDD + * pattern. This will be used by get_num_ul_tda(), which requires a specific + * ordering, hence we qsort() the list at the end according to tda_cmp(). */ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) { NR_PUSCH_TimeDomainResourceAllocationList_t *tda_list = @@ -1065,6 +1088,7 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) AssertFatal(tda_list->list.count == 0, "already have pusch_TimeDomainAllocationList members\n"); const int k2 = min_fb_delay; + const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; // UL TDA index 0 is basic slot configuration starting in symbol 0 til the last but one symbol NR_PUSCH_TimeDomainResourceAllocation_t *tda; @@ -1089,13 +1113,40 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) } else if (p2) { ul_symb = p1->nrofUplinkSymbols; } - if (ul_symb>1) { + + DevAssert(p2 == NULL); + int N_dl = p1->nrofDownlinkSlots; + int N_ul = p1->nrofUplinkSlots; + int tdd_period_idx = get_tdd_period_idx(scc->tdd_UL_DL_ConfigurationCommon); + int nb_periods_per_frame = get_nb_periods_per_frame(tdd_period_idx); + int nb_slots_per_period = ((1 << mu) * 10) / nb_periods_per_frame; + + // make TDA for the mixed slot + if (ul_symb > 1 && k2 <= N_dl) { // UL TDA index 2 for mixed slot (TDD) long sliv = get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); - tda = set_TimeDomainResourceAllocation(k2, sliv); + tda = set_TimeDomainResourceAllocation(k2, sliv); // to be reached from suitable DL slot + asn1cSeqAdd(&tda_list->list, tda); + } else if (ul_symb > 1) { // k2 > N_Dl + long sliv = get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); + tda = set_TimeDomainResourceAllocation(nb_slots_per_period, sliv); // to be reached from last DL (mixed) slot, if any asn1cSeqAdd(&tda_list->list, tda); } + + // make TDA for UL slots that are not reachable within k2/min_rxtxtime + if (N_ul > k2) { + // enforce that with k2, we could reach all but one slot (which is mixed + // and taken into account above + AssertFatal(N_dl >= k2 - 1, "cannot fulfil TDD pattern: N_dl %d, k2 %d\n", N_dl, k2); + for (int i = k2 + 1; i <= N_ul; ++i) { + tda = set_TimeDomainResourceAllocation(i, get_SLIV(0, 13)); + asn1cSeqAdd(&tda_list->list, tda); + } + } } + + AssertFatal(tda_list->list.count <= 16, "cannot reach all UL slots with current TDD configuration\n"); + qsort(tda_list->list.array, tda_list->list.count, sizeof(tda_list->list.array), tda_cmp); } static void set_dl_DataToUL_ACK(NR_PUCCH_Config_t *pucch_Config, int min_feedback_time, NR_SubcarrierSpacing_t subcarrierSpacing) From 6ef8dadd886e5ce6874e71dad1acf2718fe2c547 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Mon, 4 Aug 2025 11:23:36 +0200 Subject: [PATCH 27/34] Only add SRS TDA if SRS is activated Since the parent commit, the TDA for UL scheduling is dynamically selected, instead of being hardcoded to specific indices. We can thus also omit the SRS TDA if no SRS is configured. Also add SRS-specific TDAs if we schedule further into the future. --- openair2/GNB_APP/gnb_config.c | 6 +++--- openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c | 12 +++++++++--- openair2/LAYER2/NR_MAC_gNB/nr_radio_config.h | 2 +- 3 files changed, 13 insertions(+), 7 deletions(-) diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 8f162ff1ce..57086db62a 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -1165,7 +1165,7 @@ bool is_pattern2_config(paramdef_t *param) return true; } -static NR_ServingCellConfigCommon_t *get_scc_config(configmodule_interface_t *cfg, int minRXTXTIME) +static NR_ServingCellConfigCommon_t *get_scc_config(configmodule_interface_t *cfg, int minRXTXTIME, int do_SRS) { NR_ServingCellConfigCommon_t *scc = calloc_or_fail(1, sizeof(*scc)); uint64_t ssb_bitmap=0xff; @@ -1231,7 +1231,7 @@ static NR_ServingCellConfigCommon_t *get_scc_config(configmodule_interface_t *cf check_ssb_raster(ssb_freq, *frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); fix_scc(scc, ssb_bitmap); } - nr_rrc_config_ul_tda(scc, minRXTXTIME); + nr_rrc_config_ul_tda(scc, minRXTXTIME, do_SRS); // the gNB uses the servingCellConfigCommon everywhere, even when it should use the servingCellConfigCommonSIB. // previously (before this commit), the following fields were indirectly populated through get_SIB1_NR(). @@ -1695,7 +1695,7 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg) config.num_agg_level_candidates[PDCCH_AGG_LEVEL8], config.num_agg_level_candidates[PDCCH_AGG_LEVEL16]); - NR_ServingCellConfigCommon_t *scc = get_scc_config(cfg, config.minRXTXTIME); + NR_ServingCellConfigCommon_t *scc = get_scc_config(cfg, config.minRXTXTIME, config.do_SRS); //xer_fprint(stdout, &asn_DEF_NR_ServingCellConfigCommon, scc); NR_ServingCellConfig_t *scd = get_scd_config(cfg); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c index 22d3b55fa4..2203c0b2b7 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c +++ b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c @@ -1081,7 +1081,7 @@ static int tda_cmp(const void *tda_a, const void *tda_b) /* \brief Set up a list of time domain allocations as suitable for the TDD * pattern. This will be used by get_num_ul_tda(), which requires a specific * ordering, hence we qsort() the list at the end according to tda_cmp(). */ -void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) +void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay, int do_SRS) { NR_PUSCH_TimeDomainResourceAllocationList_t *tda_list = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; @@ -1096,8 +1096,10 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) asn1cSeqAdd(&tda_list->list, tda); // UL TDA index 1 in case of SRS - tda = set_TimeDomainResourceAllocation(k2, get_SLIV(0, 12)); - asn1cSeqAdd(&tda_list->list, tda); + if (do_SRS) { + tda = set_TimeDomainResourceAllocation(k2, get_SLIV(0, 12)); + asn1cSeqAdd(&tda_list->list, tda); + } if (scc->tdd_UL_DL_ConfigurationCommon) { int ul_symb = 0; @@ -1141,6 +1143,10 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay) for (int i = k2 + 1; i <= N_ul; ++i) { tda = set_TimeDomainResourceAllocation(i, get_SLIV(0, 13)); asn1cSeqAdd(&tda_list->list, tda); + if (do_SRS) { + tda = set_TimeDomainResourceAllocation(k2, get_SLIV(0, 12)); + asn1cSeqAdd(&tda_list->list, tda); + } } } } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.h b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.h index 51c30c38b6..28993e13cf 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.h @@ -51,7 +51,7 @@ void nr_rrc_config_dl_tda(struct NR_PDSCH_TimeDomainResourceAllocationList *pdsc frame_type_t frame_type, NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, int curr_bwp); -void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay); +void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay, int do_SRS); NR_SearchSpace_t *rrc_searchspace_config(bool is_common, int searchspaceid, int coresetid, From 98cc36430b80d43ba5e1f9d1c9531aed939fb745 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Tue, 15 Jul 2025 19:02:28 +0200 Subject: [PATCH 28/34] Schedule SRS longer in advance, cleanup Schedule SRS longer in advance, so that it would also be enough even with big k2 for UL TDA. Remove useless types: we do not use the information on sched_srs anymore, so remove it. Check that the VRB map is free before making allocations. --- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 2 - .../LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c | 46 ++++++------------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 19 -------- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 5 -- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 9 ---- 5 files changed, 14 insertions(+), 67 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index a6de5b987d..8a739e4bc1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -2766,8 +2766,6 @@ bool add_connected_nr_ue(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE) NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; sched_ctrl->dl_max_mcs = 28; /* do not limit MCS for individual UEs */ - sched_ctrl->sched_srs.frame = -1; - sched_ctrl->sched_srs.slot = -1; sched_ctrl->pdcch_cl_adjust = 0; reset_srs_stats(UE); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c index c3ebb5ab9b..a93b0cb051 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c @@ -471,9 +471,13 @@ static void nr_configure_srs(gNB_MAC_INST *nrmac, NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame); AssertFatal(beam.idx >= 0, "Cannot allocate SRS in any available beam\n"); uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][buffer_index * MAX_BWP_SIZE]; - uint64_t mask = SL_to_bitmap(srs_pdu->time_start_position, srs_pdu->num_symbols); - for (int i = 0; i < srs_pdu->bwp_size; ++i) - vrb_map_UL[i + srs_pdu->bwp_start] |= mask; + uint16_t mask = SL_to_bitmap(srs_pdu->time_start_position, srs_pdu->num_symbols); + for (int i = 0; i < srs_pdu->bwp_size; ++i) { + int rb = i + srs_pdu->bwp_start; + uint16_t alloc = vrb_map_UL[rb] & mask; + AssertFatal(nrmac->ulprbbl[rb] != 0 || alloc == 0, "RB %d not free for SRS: alloc 0x%02x for mask 0x%02x\n", rb, alloc, mask); + vrb_map_UL[rb] |= mask; + } } static void nr_fill_nfapi_srs(gNB_MAC_INST *nrmac, @@ -512,9 +516,7 @@ static void nr_fill_nfapi_srs(gNB_MAC_INST *nrmac, *********************************************************************/ void nr_schedule_srs(int module_id, frame_t frame, int slot) { - const int CC_id = 0; gNB_MAC_INST *nrmac = RC.nrmac[module_id]; - const NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon; /* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */ NR_SCHED_ENSURE_LOCKED(&nrmac->sched_lock); @@ -526,12 +528,6 @@ void nr_schedule_srs(int module_id, frame_t frame, int slot) NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP; - if(sched_ctrl->sched_srs.srs_scheduled && sched_ctrl->sched_srs.frame == frame && sched_ctrl->sched_srs.slot == slot) { - sched_ctrl->sched_srs.frame = -1; - sched_ctrl->sched_srs.slot = -1; - sched_ctrl->sched_srs.srs_scheduled = false; - } - if ((sched_ctrl->ul_failure && !get_softmodem_params()->phy_test) || nr_timer_is_active(&sched_ctrl->transm_interrupt)) { continue; } @@ -566,34 +562,20 @@ void nr_schedule_srs(int module_id, frame_t frame, int slot) continue; } - NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP, - sched_ctrl->coreset->controlResourceSetId, - sched_ctrl->search_space->searchSpaceType->present, - TYPE_C_RNTI_); - const int num_tda = tdaList->list.count; - int max_k2 = 0; - // avoid last one in the list (for msg3) - for (int i = 0; i < num_tda - 1; i++) { - int k2 = get_K2(tdaList, i, current_BWP->scs, scc); - max_k2 = k2 > max_k2 ? k2 : max_k2; - } - // we are sheduling SRS max_k2 slot in advance for the presence of SRS to be taken into account when scheduling PUSCH const int n_slots_frame = nrmac->frame_structure.numb_slots_frame; - const int sched_slot = (slot + max_k2) % n_slots_frame; - const int sched_frame = (frame + (slot + max_k2) / n_slots_frame) % MAX_FRAME_NUMBER; + const int n_ahead = n_slots_frame - 1 + get_NTN_Koffset(nrmac->common_channels[0].ServingCellConfigCommon); + const int sched_slot = (slot + n_ahead) % n_slots_frame; + const int sched_frame = (frame + (slot + n_ahead) / n_slots_frame) % MAX_FRAME_NUMBER; const uint16_t period = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present]; const uint16_t offset = get_nr_srs_offset(srs_resource->resourceType.choice.periodic->periodicityAndOffset_p); // Check if UE will transmit the SRS in this frame - if ((sched_frame * n_slots_frame + sched_slot - offset) % period == 0) { - LOG_D(NR_MAC," %d.%d Scheduling SRS reception for %d.%d\n", frame, slot, sched_frame, sched_slot); - nr_fill_nfapi_srs(nrmac, CC_id, UE, sched_frame, sched_slot, srs_resource_set, srs_resource); - sched_ctrl->sched_srs.frame = sched_frame; - sched_ctrl->sched_srs.slot = sched_slot; - sched_ctrl->sched_srs.srs_scheduled = true; - } + if ((sched_frame * n_slots_frame + sched_slot - offset) % period != 0) + continue; + LOG_D(NR_MAC," %d.%d Scheduling SRS reception for %d.%d\n", frame, slot, sched_frame, sched_slot); + nr_fill_nfapi_srs(nrmac, CC_id, UE, sched_frame, sched_slot, srs_resource_set, srs_resource); } } } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 4f55f73db1..da6eab799c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1585,25 +1585,6 @@ void handle_nr_srs_measurements(const module_id_t module_id, NR_SCHED_UNLOCK(&nrmac->sched_lock); } -long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList, - int time_domain_assignment, - int mu, - const NR_ServingCellConfigCommon_t *scc) -{ - /* we assume that this function is mutex-protected from outside */ - NR_PUSCH_TimeDomainResourceAllocation_t *tda = tdaList->list.array[time_domain_assignment]; - const int NTN_gNB_Koffset = get_NTN_Koffset(scc); - - if (tda->k2) - return *tda->k2 + NTN_gNB_Koffset; - else if (mu < 2) - return 1 + NTN_gNB_Koffset; - else if (mu == 2) - return 2 + NTN_gNB_Koffset; - else - return 3 + NTN_gNB_Koffset; -} - static bool nr_UE_is_to_be_scheduled(const frame_structure_t *fs, NR_UE_info_t *UE, frame_t frame, diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 9caa78bf7e..4cd3a6dd7e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -286,11 +286,6 @@ NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac, NR_BWP_DownlinkDedicated_t *bwp_dedicated, NR_ControlResourceSetId_t coreset_id); -long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList, - int time_domain_assignment, - int mu, - const NR_ServingCellConfigCommon_t *scc); - const NR_DMRS_UplinkConfig_t *get_DMRS_UplinkConfig(const NR_PUSCH_Config_t *pusch_Config, const NR_tda_info_t *tda_info); NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index aea5724056..a4e50bc7cb 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -429,12 +429,6 @@ typedef struct NR_sched_pusch { int phr_txpower_calc; } NR_sched_pusch_t; -typedef struct NR_sched_srs { - int frame; - int slot; - bool srs_scheduled; -} NR_sched_srs_t; - typedef struct NR_pdsch_dmrs { uint8_t dmrs_ports_id; uint8_t N_PRB_DMRS; @@ -599,9 +593,6 @@ typedef struct { NR_sched_pucch_t *sched_pucch; int sched_pucch_size; - /// Sched SRS: scheduling decisions - NR_sched_srs_t sched_srs; - /// uplink bytes that are currently scheduled int sched_ul_bytes; /// estimation of the UL buffer size From 71e01bbaa975edc916eef351c2db0c8d1672f95f Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 18 Jul 2025 16:41:44 +0200 Subject: [PATCH 29/34] Correctly interpret SRS numberOfSymbols A length of 0 is to be interpreted as 1 symbol, a length of 1 is 2, etc. --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c index a93b0cb051..d9e656dec9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c @@ -471,7 +471,9 @@ static void nr_configure_srs(gNB_MAC_INST *nrmac, NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame); AssertFatal(beam.idx >= 0, "Cannot allocate SRS in any available beam\n"); uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][buffer_index * MAX_BWP_SIZE]; - uint16_t mask = SL_to_bitmap(srs_pdu->time_start_position, srs_pdu->num_symbols); + uint16_t num = 1 << srs_pdu->num_symbols; // 0,1,2 means 1,2,4 symbols, see 222.10.04 table 3-105 + uint16_t mask = SL_to_bitmap(srs_pdu->time_start_position, num); + DevAssert(mask != 0); for (int i = 0; i < srs_pdu->bwp_size; ++i) { int rb = i + srs_pdu->bwp_start; uint16_t alloc = vrb_map_UL[rb] & mask; From 6981783ee188cc3517f6d004f4f66954118ec56f Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 7 Aug 2025 12:44:21 +0200 Subject: [PATCH 30/34] Select best out of multiple TDAs A new function get_best_ul_tda() allows to select the "best" TDA out of a number of TDA. Specifically, get_best_ul_tda() considers in how many RBs a given TDA might be allocated, and multiplies this number of RBs with the number of symbols in the TDA to form a "score". The TDA with the best "score" is selected, considering it maximizes resource usage. In phytest scheduler, we use this function to verify that the given TDA can be really allocated in all selected slots. --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 7 ++ .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 72 ++++++++++++++++++- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 8 +++ 3 files changed, 84 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 00872ade89..26b48ab998 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -262,6 +262,13 @@ void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_p // TODO implement beam procedures for phy-test mode int beam = 0; + const NR_tda_info_t *tda_p; + const int n_tda = get_num_ul_tda(nr_mac, sched_slot, tda_info.k2, &tda_p); + DevAssert(n_tda > 0); + /* check only the first TDA: we are only interested in finding out if this TDA fits completely */ + int rb_s = rbStart, rb_l = rbSize; + get_best_ul_tda(nr_mac, beam, tda_p, 1, sched_frame, sched_slot, &rb_s, &rb_l); + DevAssert(rb_s == rbStart && rb_l == rbSize); const int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size); uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam][buffer_index * MAX_BWP_SIZE]; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index da6eab799c..33a0ad650e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -92,6 +92,65 @@ int get_num_ul_tda(gNB_MAC_INST *nrmac, int slot, int k2, const NR_tda_info_t ** return diff; } +static void get_max_rb_range(const uint16_t *vrb_map_ul, const uint16_t *ulprbbl, uint16_t mask, int *rb_start, int *rb_len) +{ + int best_start = *rb_start; + int best_len = 0; + int current_start = *rb_start; + int current_len = 0; + for (int rb = *rb_start; rb < *rb_len; ++rb) { + if (ulprbbl[rb] == 0 && (mask & vrb_map_ul[rb]) == 0) { + current_len++; + continue; + } + + /* this RB is blocked for UL, or already in use */ + if (current_len > best_len) { + best_start = current_start; + best_len = current_len; + } + current_start = rb + 1; /* will start in next RB, or updated later */ + current_len = 0; + } + if (current_len > best_len) { + best_start = current_start; + best_len = current_len; + } + *rb_start = best_start; + *rb_len = best_len; +} + +const NR_tda_info_t *get_best_ul_tda(const gNB_MAC_INST *nrmac, int beam, const NR_tda_info_t *tdas, int n_tda, int frame, int slot, int *rb_start, int *rb_len) +{ + /* there is a mixed slot only when in TDD */ + const frame_structure_t *fs = &nrmac->frame_structure; + const int index = ul_buffer_index(frame, slot, fs->numb_slots_frame, nrmac->vrb_map_UL_size); + uint16_t *vrb_map_UL = &nrmac->common_channels[0].vrb_map_UL[beam][index * MAX_BWP_SIZE]; + + DevAssert(n_tda <= 16); + const NR_tda_info_t *best_tda = tdas; + uint64_t score = 0; + int check_rb_start = *rb_start; + int check_rb_len = *rb_len; + + for (int i = 0; i < n_tda; ++i, tdas++) { + int start = check_rb_start; + int len = check_rb_len; + uint16_t tda_mask = SL_to_bitmap(tdas->startSymbolIndex, tdas->nrOfSymbols); + get_max_rb_range(vrb_map_UL, nrmac->ulprbbl, tda_mask, &start, &len); + uint64_t s = (uint64_t)tdas->nrOfSymbols * len; + if (s > score) { + best_tda = tdas; + score = s; + *rb_start = start; + *rb_len = len; + } + LOG_D(NR_MAC, "%4d.%2d tda k2 %ld mask 0x%04x has PRB start/len %d/%d score %ld\n", frame, slot, tdas->k2, tda_mask, start, len, s); + } + + return best_tda; +} + bwp_info_t get_pusch_bwp_start_size(NR_UE_info_t *UE) { NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP; @@ -2600,19 +2659,26 @@ static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp * "cell-specific", i.e., the UE will add it on the computation. */ int k2 = fs_get_diff(fs, *next, current) - koffset; DevAssert(k2 > 0); + // we assume that all beams have the same symbol utilization in all RBs for + // simplification (but this might not be true). Otherwise, we would need to + // check it separately for all beams and give a list of TDAs (one for each + // beam) in pf_ul(), which is complex. We should rewrite pf_ul() to + // schedule for one beam only instead (and for one BWP). + int beam = 0; const NR_tda_info_t *tda_info = NULL; int n_tda = get_num_ul_tda(nr_mac, next->s, k2, &tda_info); if (n_tda == 0) /* no TDA fulfills this */ break; - /* TODO: get_num_ul_tda() might indicate multiple TDAs to use (e.g., one - * handling SRS), this will be fixed in a follow-up commit. */ + int rb_start = 0; + int rb_len = bw; + tda_info = get_best_ul_tda(nr_mac, beam, tda_info, n_tda, next->f, next->s, &rb_start, &rb_len); DevAssert(tda_info->valid_tda); int tda = seq_arr_dist(&nr_mac->ul_tda, seq_arr_front(&nr_mac->ul_tda), tda_info); AssertFatal(tda >= 0 && tda < 16, "illegal TDA index %d\n", tda); int len[num_beams]; for (int i = 0; i < num_beams; i++) - len[i] = bw; + len[i] = rb_len; /* proportional fair scheduling algorithm */ int sched = pf_ul(nr_mac, pp_pusch, tda, tda_info, nr_mac->UE_info.connected_ue_list, max_dci, num_beams, len); LOG_D(NR_MAC, "run pf_ul() at %4d.%2d with tda %d k2 %d (ULSCH at %4d.%2d) scheduled %d last_dl %d\n", frame, slot, tda, k2, next->f, next->s, sched, last_dl); diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 4cd3a6dd7e..584b294806 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -413,6 +413,14 @@ bool add_UE_to_list(int list_size, NR_UE_info_t *list[list_size], NR_UE_info_t * NR_UE_info_t *remove_UE_from_list(int list_size, NR_UE_info_t *list[list_size], rnti_t rnti); int get_dl_tda(const gNB_MAC_INST *nrmac, int slot); int get_num_ul_tda(gNB_MAC_INST *nrmac, int slot, int k2, const NR_tda_info_t **first_idx); +const NR_tda_info_t *get_best_ul_tda(const gNB_MAC_INST *nrmac, + int beam, + const NR_tda_info_t *tdas, + int n_tda, + int frame, + int slot, + int *rb_start, + int *rb_len); int get_cce_index(const gNB_MAC_INST *nrmac, const int CC_id, From 135525c17a7cd39f5ba6c582b474d537b464bde7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?R=C3=BAben=20Soares=20Silva?= Date: Wed, 9 Jul 2025 07:11:25 +0200 Subject: [PATCH 31/34] P5 Config: Pack/Unpack TDD table with 10.02 and 10.04 formats Adds the capability to pack/unpack the TDD table in CONFIG.request following both SCF222.10.02 (Tag 0x1027) and SCF222.10.04 (Tag 0x1035) formats In the case of Aerial, the TDD table is packed following the 10.04 format, but with the 10.02 tag Prevent the packing of Digital Beamforming table and Precoding Matrix table for Aerial --- nfapi/open-nFAPI/fapi/CMakeLists.txt | 4 +- nfapi/open-nFAPI/fapi/src/nr_fapi_p5.c | 139 ++++++++++++++++-- .../nfapi/public_inc/nfapi_nr_interface_scf.h | 7 + 3 files changed, 138 insertions(+), 12 deletions(-) diff --git a/nfapi/open-nFAPI/fapi/CMakeLists.txt b/nfapi/open-nFAPI/fapi/CMakeLists.txt index cf7f85052f..0cddd9d82f 100644 --- a/nfapi/open-nFAPI/fapi/CMakeLists.txt +++ b/nfapi/open-nFAPI/fapi/CMakeLists.txt @@ -19,8 +19,10 @@ target_include_directories(nr_fapi_p7 PUBLIC inc) target_link_libraries(nr_fapi_p7 PUBLIC nr_fapi_common) if (OAI_AERIAL) - target_compile_definitions(nr_fapi_p5 PRIVATE ENABLE_AERIAL) + target_compile_definitions(nr_fapi_p5 PRIVATE ENABLE_AERIAL ENABLE_10_04) target_compile_definitions(nr_fapi_p7 PRIVATE ENABLE_AERIAL) +else() + target_compile_definitions(nr_fapi_p5 PRIVATE ENABLE_10_02) endif () if(OAI_WLS) diff --git a/nfapi/open-nFAPI/fapi/src/nr_fapi_p5.c b/nfapi/open-nFAPI/fapi/src/nr_fapi_p5.c index 6936d8b8fa..a7cb729f6c 100644 --- a/nfapi/open-nFAPI/fapi/src/nr_fapi_p5.c +++ b/nfapi/open-nFAPI/fapi/src/nr_fapi_p5.c @@ -721,7 +721,7 @@ uint8_t unpack_nr_param_response(uint8_t **ppReadPackedMsg, uint8_t *end, void * config, &pNfapiMsg->vendor_extension)); } - +#ifndef ENABLE_AERIAL static uint8_t pack_dbt_table_tlv_value(void *tlv, uint8_t **ppWritePackedMsg, uint8_t *end) { nfapi_nr_dbt_tlv_ve_t *dbt_ve = (nfapi_nr_dbt_tlv_ve_t *)tlv; @@ -768,7 +768,27 @@ static uint8_t pack_pm_table_tlv_value(void *tlv, uint8_t **ppWritePackedMsg, ui } return 1; } - +#endif +#ifdef ENABLE_10_04 +static uint8_t pack_nr_tdd_table_10_04(void *tlv, uint8_t **ppWritePackedMsg, uint8_t *end) +{ + nfapi_nr_tdd_table_tlv_t *tdd_table_tlv = (nfapi_nr_tdd_table_tlv_t *)tlv; + nfapi_nr_tdd_table_t *tdd_table = tdd_table_tlv->value; +#ifndef ENABLE_AERIAL + if (!push8(tdd_table->tdd_period.value, ppWritePackedMsg, end)) { + return 0; + } +#endif + for (int i = 0; i < tdd_table_tlv->slots_per_frame; i++) { + for (int k = 0; k < tdd_table_tlv->symbols_per_slot; k++) { + if (!push8(tdd_table->max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list[k].slot_config.value, ppWritePackedMsg, end)) { + return 0; + } + } + } + return 1; +} +#endif uint8_t pack_nr_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_t *end, nfapi_p4_p5_codec_config_t *config) { uint8_t *pNumTLVFields = (uint8_t *)*ppWritePackedMsg; @@ -1050,18 +1070,23 @@ uint8_t pack_nr_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_t *e &pack_uint8_tlv_value); numTLVs++; } - // END SSB Table +#endif + // START TDD Table if (pNfapiMsg->cell_config.frame_duplex_type.value == 1 /* TDD */) { - retval &= - pack_nr_tlv(NFAPI_NR_CONFIG_TDD_PERIOD_TAG, &(pNfapiMsg->tdd_table.tdd_period), ppWritePackedMsg, end, &pack_uint8_tlv_value); - numTLVs++; const uint8_t slotsperframe[5] = {10, 20, 40, 80, 160}; // Assuming always CP_Normal, because Cyclic prefix is not included in CONFIG.request 10.02, but is present in 10.04 uint8_t cyclicprefix = 1; // 3GPP 38.211 Table 4.3.2.1 & Table 4.3.2.2 uint8_t number_of_symbols_per_slot = cyclicprefix ? 14 : 12; +#ifdef ENABLE_10_02 + retval &= pack_nr_tlv(NFAPI_NR_CONFIG_TDD_PERIOD_TAG, + &(pNfapiMsg->tdd_table.tdd_period), + ppWritePackedMsg, + end, + &pack_uint8_tlv_value); + numTLVs++; for (int i = 0; i < slotsperframe[pNfapiMsg->ssb_config.scs_common.value]; i++) { // TODO check right number of slots for (int k = 0; k < number_of_symbols_per_slot; k++) { // TODO can change? retval &= pack_nr_tlv(NFAPI_NR_CONFIG_SLOT_CONFIG_TAG, @@ -1072,10 +1097,37 @@ uint8_t pack_nr_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_t *e numTLVs++; } } - } - - // END TDD Table #endif + +#ifdef ENABLE_10_04 +#ifdef ENABLE_AERIAL + retval &= pack_nr_tlv(NFAPI_NR_CONFIG_TDD_PERIOD_TAG, + &(pNfapiMsg->tdd_table.tdd_period), + ppWritePackedMsg, + end, + &pack_uint8_tlv_value); + numTLVs++; + + nfapi_nr_tdd_table_tlv_t tdd_table_tlv = {.tl.tag = NFAPI_NR_CONFIG_SLOT_CONFIG_TAG, .value = &pNfapiMsg->tdd_table, .slots_per_frame = slotsperframe[pNfapiMsg->ssb_config.scs_common.value], .symbols_per_slot = number_of_symbols_per_slot }; + retval &= pack_nr_tlv(NFAPI_NR_CONFIG_SLOT_CONFIG_TAG, + &tdd_table_tlv, + ppWritePackedMsg, + end, + &pack_nr_tdd_table_10_04); + numTLVs++; +#else + nfapi_nr_tdd_table_tlv_t tdd_table_tlv = {.tl.tag = NFAPI_NR_CONFIG_TDD_TABLE, .value = &pNfapiMsg->tdd_table, .slots_per_frame = slotsperframe[pNfapiMsg->ssb_config.scs_common.value], .symbols_per_slot = number_of_symbols_per_slot }; + retval &= pack_nr_tlv(NFAPI_NR_CONFIG_TDD_TABLE, + &tdd_table_tlv, + ppWritePackedMsg, + end, + &pack_nr_tdd_table_10_04); + numTLVs++; +#endif +#endif + } + // END TDD Table + // START Measurement Config // SCF222.10.02 Table 3-27 : Contains only one TLV and is currently unused pNfapiMsg->measurement_config.rssi_measurement.tl.tag = NFAPI_NR_CONFIG_RSSI_MEASUREMENT_TAG; @@ -1087,7 +1139,7 @@ uint8_t pack_nr_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_t *e &pack_uint8_tlv_value); numTLVs++; // END Measurement Config - +#ifndef ENABLE_AERIAL // START Digital Beam Table (DBT) PDU if (pNfapiMsg->dbt_config.num_dig_beams != 0) { nfapi_nr_dbt_tlv_ve_t dbt_tlv = {.tl.tag = NFAPI_NR_CONFIG_BEAMFORMING_TABLE_TAG, .value = pNfapiMsg->dbt_config}; @@ -1103,7 +1155,7 @@ uint8_t pack_nr_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_t *e numTLVs++; } // is 0xA011 END Precoding Matrix (PM) PDU -#ifndef ENABLE_AERIAL + // START nFAPI TLVs included in CONFIG.request for IDLE and CONFIGURED states retval &= pack_nr_tlv(NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_address_ipv4), @@ -1264,7 +1316,37 @@ static uint8_t unpack_pm_table_tlv_value(void *tlv, uint8_t **ppReadPackedMsg, u } return 1; } +#ifdef ENABLE_10_04 +static uint8_t unpack_nr_tdd_table_10_04(void *tlv, uint8_t **ppReadPackedMsg, uint8_t *end) +{ + nfapi_nr_tdd_table_tlv_t *tdd_table_tlv = (nfapi_nr_tdd_table_tlv_t *)tlv; + nfapi_nr_tdd_table_t *tdd_table = tdd_table_tlv->value; + if (!(pull8(ppReadPackedMsg, &tdd_table->tdd_period.value, end))) { + return 0; + } + tdd_table->tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG; + const int slots = tdd_table_tlv->slots_per_frame; + const int symbols = tdd_table_tlv->symbols_per_slot; + if (!tdd_table->max_tdd_periodicity_list) { + tdd_table->max_tdd_periodicity_list = calloc(slots, sizeof(*tdd_table->max_tdd_periodicity_list)); + } + for (int slot = 0; slot < slots; slot++) { + nfapi_nr_max_tdd_periodicity_t* list = &tdd_table->max_tdd_periodicity_list[slot]; + if (!list->max_num_of_symbol_per_slot_list) { + list->max_num_of_symbol_per_slot_list = calloc(symbols, sizeof(*list->max_num_of_symbol_per_slot_list)); + } + for (int sym = 0; sym < symbols; sym++) { + if (!(pull8(ppReadPackedMsg, &list->max_num_of_symbol_per_slot_list[sym].slot_config.value, end))) { + return 0; + } + list->max_num_of_symbol_per_slot_list[sym].slot_config.tl.tag = NFAPI_NR_CONFIG_SLOT_CONFIG_TAG; + } + } + + return 1; +} +#endif uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void *msg, nfapi_p4_p5_codec_config_t *config) { // Helper vars for indexed TLVs @@ -1272,8 +1354,10 @@ uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void * int unused_root_seq_idx = 0; int ssb_mask_idx = 0; int config_beam_idx = 0; +#ifdef ENABLE_10_02 int tdd_periodicity_idx = 0; int symbol_per_slot_idx = 0; +#endif int beam_ve_idx = 0; nfapi_nr_config_request_scf_t *pNfapiMsg = (nfapi_nr_config_request_scf_t *)msg; // unpack TLVs @@ -1324,7 +1408,16 @@ uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void * &(pNfapiMsg->ssb_table.multiple_cells_ss_pbch_in_a_carrier), &unpack_uint8_tlv_value}, {NFAPI_NR_CONFIG_TDD_PERIOD_TAG, &(pNfapiMsg->tdd_table.tdd_period), &unpack_uint8_tlv_value}, +#ifdef ENABLE_10_02 {NFAPI_NR_CONFIG_SLOT_CONFIG_TAG, NULL, &unpack_uint8_tlv_value}, +#endif +#ifdef ENABLE_10_04 +#ifdef ENABLE_AERIAL + {NFAPI_NR_CONFIG_SLOT_CONFIG_TAG, NULL, &unpack_nr_tdd_table_10_04}, +#else + {NFAPI_NR_CONFIG_TDD_TABLE, NULL, &unpack_nr_tdd_table_10_04}, +#endif +#endif {NFAPI_NR_FAPI_NUM_BEAMS_PERIOD_VENDOR_EXTENSION_TAG, &(pNfapiMsg->analog_beamforming_ve.num_beams_period_vendor_ext), &unpack_uint8_tlv_value}, {NFAPI_NR_FAPI_ANALOG_BF_VENDOR_EXTENSION_TAG, &(pNfapiMsg->analog_beamforming_ve.analog_bf_vendor_ext), &unpack_uint8_tlv_value}, {NFAPI_NR_FAPI_TOTAL_NUM_BEAMS_VENDOR_EXTENSION_TAG, &(pNfapiMsg->analog_beamforming_ve.total_num_beams_vendor_ext), &unpack_uint8_tlv_value}, @@ -1341,6 +1434,13 @@ uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void * {NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv6), &unpack_ipv6_address_value}, {NFAPI_NR_NFAPI_P7_PNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_port), &unpack_uint16_tlv_value}}; +#ifdef ENABLE_10_04 +#ifdef ENABLE_AERIAL + nfapi_nr_tdd_table_tlv_t tdd_table_tlv = {.tl.tag = NFAPI_NR_CONFIG_SLOT_CONFIG_TAG}; +#else + nfapi_nr_tdd_table_tlv_t tdd_table_tlv = {.tl.tag = NFAPI_NR_CONFIG_TDD_TABLE}; +#endif +#endif pull8(ppReadPackedMsg, &pNfapiMsg->num_tlv, end); pNfapiMsg->vendor_extension = malloc(sizeof(&(pNfapiMsg->vendor_extension))); @@ -1387,6 +1487,16 @@ uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void * unpack_fns[idx].tlv = &generic_tl; result = (*unpack_fns[idx].unpack_func)(&pNfapiMsg->pmi_list, ppReadPackedMsg, end); break; +#ifdef ENABLE_10_04 +#ifdef ENABLE_AERIAL + case NFAPI_NR_CONFIG_SLOT_CONFIG_TAG: +#else + case NFAPI_NR_CONFIG_TDD_TABLE: +#endif + unpack_fns[idx].tlv = &generic_tl; + result = (*unpack_fns[idx].unpack_func)(&tdd_table_tlv, ppReadPackedMsg, end); + break; +#endif case NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG: pNfapiMsg->prach_config.num_prach_fd_occasions.tl.tag = generic_tl.tag; pNfapiMsg->prach_config.num_prach_fd_occasions.tl.length = generic_tl.length; @@ -1413,6 +1523,11 @@ uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void * pNfapiMsg->tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list = calloc(number_of_symbols_per_slot, sizeof(nfapi_nr_max_num_of_symbol_per_slot_t)); } +#ifdef ENABLE_10_04 + tdd_table_tlv.slots_per_frame = slotsperframe[pNfapiMsg->ssb_config.scs_common.value]; + tdd_table_tlv.symbols_per_slot = number_of_symbols_per_slot; + tdd_table_tlv.value = &pNfapiMsg->tdd_table; +#endif } break; case NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG: @@ -1531,6 +1646,7 @@ uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void * end); config_beam_idx++; break; +#ifdef ENABLE_10_02 case NFAPI_NR_CONFIG_SLOT_CONFIG_TAG: unpack_fns[idx].tlv = &(pNfapiMsg->tdd_table.max_tdd_periodicity_list[tdd_periodicity_idx] .max_num_of_symbol_per_slot_list[symbol_per_slot_idx] @@ -1551,6 +1667,7 @@ uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void * tdd_periodicity_idx++; } break; +#endif default: result = (*unpack_fns[idx].unpack_func)(tl, ppReadPackedMsg, end); break; diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index e19dab108c..e966b0a57b 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -447,6 +447,13 @@ typedef struct } nfapi_nr_tdd_table_t; +typedef struct { + nfapi_tl_t tl; + nfapi_nr_tdd_table_t *value; + uint8_t slots_per_frame; + uint8_t symbols_per_slot; +} nfapi_nr_tdd_table_tlv_t; + //table 3-27 typedef struct { From c24673798a3cfd26c5481a9c488c16a7e269a604 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Wed, 23 Jul 2025 11:54:23 +0200 Subject: [PATCH 32/34] Handle TDD pattern 2 in UL TDA allocation Add the possibility to use UL slots in TDD pattern 2. For simplicity, we require the mixed slot to be of the same symbols in pattern 1 & 2. For UL slots, simply use the right amount of UL TDAs, depending on which number of UL slots among pattern 1 & 2 is bigger. One complication is the TDA for the mixed slot. The current code assumes that k2 has to be equal or larger than (number of DL slots +1) (because the spec says min k2=2, but we might want to schedule DSUUU). Then, there could be for instance the following cases: - only pattern 1: DSUUU DSUUU ...: the mixed slot has to be reached an entire period in advance - pattern 1 & 2: DSUUU DDDDD: normal mixed slot k2, e.g., like for 7DS2U - pattern 1 & 2: DSUUU DDDSU: the mixed slot has to be reached N_ul2+N_dl1+1 slots in advance I can't think of more cases right now. To avoid unscheduled slots, I put an assertion (which could also trivially be taken out). --- openair2/GNB_APP/gnb_config.c | 4 -- openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c | 45 +++++++++++--------- 2 files changed, 25 insertions(+), 24 deletions(-) diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 57086db62a..c2e56e7eb2 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -1206,10 +1206,6 @@ static NR_ServingCellConfigCommon_t *get_scc_config(configmodule_interface_t *cf struct NR_TDD_UL_DL_ConfigCommon *tdd = scc->tdd_UL_DL_ConfigurationCommon; tdd->pattern2 = calloc_or_fail(1, sizeof(*tdd->pattern2)); *scc->tdd_UL_DL_ConfigurationCommon->pattern2 = p2; - AssertFatal(p2.nrofUplinkSlots ^ scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots, - "UL slots in pattern1 (%ld) and pattern2 (%ld) are mutually exclusive (e.g. DDDFUU DDDD, DDDD DDDFUU)\n", - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots, - p2.nrofUplinkSlots); } struct NR_FrequencyInfoDL *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL; LOG_I(RRC, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c index 2203c0b2b7..e4becc1da3 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c +++ b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c @@ -1102,44 +1102,49 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay, i } if (scc->tdd_UL_DL_ConfigurationCommon) { - int ul_symb = 0; NR_TDD_UL_DL_Pattern_t *p1 = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; + int ul_symb = p1->nrofUplinkSymbols; NR_TDD_UL_DL_Pattern_t *p2 = scc->tdd_UL_DL_ConfigurationCommon->pattern2; if (p2 && p2->nrofUplinkSymbols) - AssertFatal(p2->nrofUplinkSymbols == p1->nrofUplinkSymbols, - "nrofDownlinkSymbols in pattern1 %ld and pattern2 %ld must be the same in current implementation\n", - p1->nrofUplinkSymbols, + AssertFatal(p2->nrofUplinkSymbols == ul_symb, + "nrofDownlinkSymbols in pattern1 %d and pattern2 %ld must be the same in current implementation\n", + ul_symb, p2->nrofUplinkSymbols); - if (p1->nrofUplinkSymbols) { - ul_symb = p1->nrofUplinkSymbols; - } else if (p2) { - ul_symb = p1->nrofUplinkSymbols; - } + AssertFatal(!p2 || p2->nrofDownlinkSlots >= p2->nrofUplinkSlots, + "nrofDownlinkSlots must be larger than nrofUplinkSlots for pattern2 in current implementation\n"); - DevAssert(p2 == NULL); - int N_dl = p1->nrofDownlinkSlots; - int N_ul = p1->nrofUplinkSlots; + int N_dl1 = p1->nrofDownlinkSlots; + int N_ul1 = p1->nrofUplinkSlots; + int N_dl2 = p2 ? p2->nrofDownlinkSlots : 0; + int N_ul2 = p2 ? p2->nrofUplinkSlots : 0; int tdd_period_idx = get_tdd_period_idx(scc->tdd_UL_DL_ConfigurationCommon); int nb_periods_per_frame = get_nb_periods_per_frame(tdd_period_idx); int nb_slots_per_period = ((1 << mu) * 10) / nb_periods_per_frame; // make TDA for the mixed slot - if (ul_symb > 1 && k2 <= N_dl) { - // UL TDA index 2 for mixed slot (TDD) - long sliv = get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); - tda = set_TimeDomainResourceAllocation(k2, sliv); // to be reached from suitable DL slot + long mixed_sliv = get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); + if (ul_symb > 1 && (k2 <= N_dl1 || (p2 && N_ul2 == 0))) { + // UL TDA index 2 for mixed slot (TDD) (no pattern 2 and enough DL slots, or pattern2 only DL) + tda = set_TimeDomainResourceAllocation(k2, mixed_sliv); // to be reached from suitable DL slot asn1cSeqAdd(&tda_list->list, tda); - } else if (ul_symb > 1) { // k2 > N_Dl - long sliv = get_SLIV(NR_NUMBER_OF_SYMBOLS_PER_SLOT - ul_symb, ul_symb - 1); - tda = set_TimeDomainResourceAllocation(nb_slots_per_period, sliv); // to be reached from last DL (mixed) slot, if any + } else if (ul_symb > 1 && !p2 && k2 > N_dl1) { // k2 > N_Dl1 + // UL TDA for mixed slot without pattern 2 and less DL slots than k2 + tda = set_TimeDomainResourceAllocation(nb_slots_per_period, mixed_sliv); // to be reached from last DL (mixed) slot, if any asn1cSeqAdd(&tda_list->list, tda); + } else if (ul_symb > 1 && N_ul2 > 0 && k2 > N_dl1) { + // we have pattern 2 with UL, and less p1 DL slots than k2 + tda = set_TimeDomainResourceAllocation(N_dl1 + N_ul2 + 1, mixed_sliv); + asn1cSeqAdd(&tda_list->list, tda); + } else { + AssertFatal(ul_symb == 0, "unhandled case of mixed slot: N_dl1 %d N_ul1 %d N_dl2 %d N_ul2 %d\n", N_dl1, N_ul1, N_dl2, N_ul2); } // make TDA for UL slots that are not reachable within k2/min_rxtxtime + int N_ul = max(N_ul1, N_ul2); if (N_ul > k2) { // enforce that with k2, we could reach all but one slot (which is mixed // and taken into account above - AssertFatal(N_dl >= k2 - 1, "cannot fulfil TDD pattern: N_dl %d, k2 %d\n", N_dl, k2); + AssertFatal(N_dl1 >= k2 - 1, "cannot fulfil TDD pattern: N_dl1 %d, k2 %d\n", N_dl1, k2); for (int i = k2 + 1; i <= N_ul; ++i) { tda = set_TimeDomainResourceAllocation(i, get_SLIV(0, 13)); asn1cSeqAdd(&tda_list->list, tda); From ba6bad5eb3454efdc538e7ad2609f97730141873 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 14 Aug 2025 12:55:51 +0200 Subject: [PATCH 33/34] Fix AL candidate documentation to right default The default aggregation level candidate numbers in gnb_config.c (search "uess_num_agg_level_candidates") is 0,2,0,0,0, so write that instead. --- doc/MAC/mac-usage.md | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/doc/MAC/mac-usage.md b/doc/MAC/mac-usage.md index 1ed71d30b4..2f4b849d4d 100644 --- a/doc/MAC/mac-usage.md +++ b/doc/MAC/mac-usage.md @@ -49,9 +49,11 @@ The value of `pdcch_cl_adjust` is clamped to range <0,1>, the increment value is the decrement value is 0.01. These values are selected to ensure PDCCH success rate is high. See Examples below for futher explaination. -The possible values of aggregation level on UE SS can be configured via `uess_agg_levels` configuration -option. By default the gNB uses only aggregation level 2 which translates to `uess_agg_levels` set to -`[0, 1, 0, 0, 0]`. For example, to enable aggregation level 2 and 4 set `uess_agg_levels` to `[0, 1, 1, 0, 0]`. +The possible values of aggregation level on UE SS can be configured via +`uess_agg_levels` configuration option. By default the gNB uses two candidates +in aggregation level 2 which translates to `uess_agg_levels` set to `[0, 2, 0, +0, 0]`. For example, to enable one candidate on aggregation levels 2 and 4 set +`uess_agg_levels` to `[0, 1, 1, 0, 0]`. ### Examples: #### Example 1: From e0c1f8d920be82e3379f1bae0b5001aa61faf0aa Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Thu, 14 Aug 2025 13:00:09 +0200 Subject: [PATCH 34/34] Increase AL candidates count on AW2S pipeline Increase the number of aggregration level candidates. Since we have many UEs with concurrent traffic in that pipeline, we should ensure that we can allocate many DCIs to not waste resources (e.g., not all RBs used because could not find DCIs for specific UEs). --- ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf | 1 + 1 file changed, 1 insertion(+) diff --git a/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf b/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf index 4b46b8ca33..02dfd2f5fe 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf @@ -25,6 +25,7 @@ gNBs = pusch_AntennaPorts = 1; do_CSIRS = 1; do_SRS = 0; + uess_agg_levels = [2, 2, 2, 0, 0]; servingCellConfigCommon = ( {