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Merge develop-nr

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WEI-TAI CHEN
2018-07-03 02:25:04 -07:00
parent 73339bc7f3 a8709f0381
commit 4c6a31b44e
54 changed files with 26657 additions and 565 deletions
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openair1/PHY/INIT/nr_init_ue.c
+8 -4
View File
@@ -33,6 +33,7 @@
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
//uint8_t dmrs1_tab_ue[8] = {0,2,3,4,6,8,9,10};
@@ -841,17 +842,17 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
pbch_vars[eNB_id]->rxdataF_ext = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) );
pbch_vars[eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pbch_vars[eNB_id]->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pbch_vars[eNB_id]->llr = (int8_t*)malloc16_clear( 1920 );
pbch_vars[eNB_id]->llr = (int8_t*)malloc16_clear( 1920 );//
prach_vars[eNB_id]->prachF = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
prach_vars[eNB_id]->prach = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
for (i=0; i<fp->nb_antennas_rx; i++) {
pbch_vars[eNB_id]->rxdataF_ext[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*6*12*4 );
pbch_vars[eNB_id]->rxdataF_ext[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*20*12*4 );
for (j=0; j<4; j++) {//fp->nb_antennas_tx;j++) {
int idx = (j<<1)+i;
pbch_vars[eNB_id]->rxdataF_comp[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*6*12*4 );
pbch_vars[eNB_id]->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*6*12*4 );
pbch_vars[eNB_id]->rxdataF_comp[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*20*12*4 );
pbch_vars[eNB_id]->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*20*12*4 );
}
}
}
@@ -955,6 +956,9 @@ void phy_init_nr_top(NR_DL_FRAME_PARMS *frame_parms)
generate_ul_reference_signal_sequences(SHRT_MAX);
// Polar encoder init for PBCH
nr_polar_init(&frame_parms->pbch_polar_params, 1);
//lte_sync_time_init(frame_parms);
//generate_ul_ref_sigs();
openair1/PHY/INIT/nr_parms.c
-12
View File
@@ -165,18 +165,6 @@ int nr_init_frame_parms_ue(nfapi_config_request_t* config,
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
#endif
frame_parms->frame_type = FDD;
frame_parms->tdd_config = 3;
//frame_parms[CC_id]->tdd_config_S = 0;
frame_parms->N_RB_DL = 100;
frame_parms->N_RB_UL = 100;
frame_parms->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms->Nid_cell = 0;
//frame_parms[CC_id]->num_MBSFN_config = 0;
frame_parms->nb_antenna_ports_eNB = 1;
frame_parms->nb_antennas_tx = 1;
frame_parms->nb_antennas_rx = 1;
if (Ncp == EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
+5 -3
View File
@@ -49,7 +49,9 @@ int wt1[8][2] = {{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1}};
int wf2[12][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,1},{1,1},{1,-1},{1,1},{1,1}};
int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1}};
short nr_mod_table[14] = {0,0,23170,23170,-23170,-23170,23170,23170,23170,-23170,-23170,23170,-23170,-23170};
//short nr_mod_table[14] = {0,0,-23170,-23170,23170,23170,-23170,-23170,-23170,23170,23170,-23170,23170,23170};
short nr_mod_table[14] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170};
//short nr_mod_table[14] = {0,0,23170,23170,-23170,-23170,23170,23170,23170,-23170,-23170,23170,-23170,-23170};
//extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
@@ -149,8 +151,8 @@ int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch,
((int16_t*)output)[(m<<1)+1] = nr_mod_table[((1 + ((nr_gold_pbch[m>>5]&(1<<(m&0x1f)))>>(m&0x1f)))<<1) + 1];
#ifdef DEBUG_PBCH
//printf("nr_gold_pbch[m>>5] %x\n",nr_gold_pbch[m>>5]);
if (m<6)
printf("m %d output %d %d addr %p\n", m, output[2*m], output[2*m+1],&output[0]);
if (m<16)
printf("m %d output %d %d addr %p\n", m, ((int16_t*)output)[m<<1], ((int16_t*)output)[(m<<1)+1],&output[0]);
#endif
}
openair1/PHY/NR_TRANSPORT/nr_dci.c
+8 -4
View File
@@ -33,9 +33,9 @@
#include "nr_dci.h"
uint8_t nr_get_dci_size(nr_dci_format_e format,
nr_rnti_type_e rnti,
NR_BWP_PARMS* bwp,
nfapi_nr_config_request_t* config)
nr_rnti_type_e rnti,
NR_BWP_PARMS* bwp,
nfapi_nr_config_request_t* config)
{
uint8_t size = 0;
uint16_t N_RB = bwp->N_RB;
@@ -126,7 +126,11 @@ uint8_t nr_get_dci_size(nr_dci_format_e format,
}
uint8_t nr_generate_dci_top()
uint8_t nr_generate_dci_top(NR_DCI_ALLOC_t dci_alloc,
int32_t** txdataF,
int16_t amp,
NR_DL_FRAME_PARMS* frame_parms,
nfapi_config_request_t* config)
{
return 0;
}
openair1/PHY/NR_TRANSPORT/nr_dci.h
+11 -8
View File
@@ -27,12 +27,12 @@
typedef enum {
nr_dci_format_0_0=0,
nr_dci_format_0_1,
nr_dci_format_1_0,
nr_dci_format_1_1,
nr_dci_format_2_0,
nr_dci_format_2_1,
nr_dci_format_2_2,
nr_dci_format_2_3
nr_dci_format_2_3,
nr_dci_format_1_0,
nr_dci_format_1_1,
} nr_dci_format_e;
typedef enum {
@@ -45,7 +45,6 @@ typedef enum {
} nr_rnti_type_e;
typedef struct {
/// Length of DCI in bits
uint8_t size;
@@ -65,10 +64,14 @@ typedef struct {
uint8_t nr_get_dci_size(nr_dci_format_e format,
nr_rnti_type_e rnti,
NR_BWP_PARMS bwp,
nfapi_nr_config_request_t* config);
nr_rnti_type_e rnti,
NR_BWP_PARMS bwp,
nfapi_nr_config_request_t* config);
uint8_t nr_generate_dci_top();
uint8_t nr_generate_dci_top(NR_DCI_ALLOC_t dci_alloc,
int32_t** txdataF,
int16_t amp,
NR_DL_FRAME_PARMS* frame_parms,
nfapi_config_request_t* config)
#endif //__PHY_NR_TRANSPORT_DCI__H
openair1/PHY/NR_TRANSPORT/nr_mcs.c
+59
View File
@@ -0,0 +1,59 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/NR_TRANSPORT/nr_mcs.c
* \brief Some support routines for NR MCS computations
* \author
* \date 2018
* \version 0.1
* \company Eurecom
* \email:
* \note
* \warning
*/
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
//get_Qm under PHY/LTE_TRANSPORT/lte_mcs.c is the same for NR.
uint8_t get_nr_Qm(uint8_t I_MCS)
{
if (I_MCS < 5)
return(2);
else if (I_MCS < 11)
return(4);
else if (I_MCS < 20)
return(6);
else
return(8);
}
uint8_t get_nr_Qm_ul(uint8_t I_MCS) {
if (I_MCS < 2)
return(2); //This should be 1 if UE has reported to support pi/2 BPSK, and 2 otherwise.
else if (I_MCS < 10)
return(2);
else if (I_MCS < 17)
return(4);
else
return(6);
}
openair1/PHY/NR_TRANSPORT/nr_pbch.c
+1 -1
View File
@@ -207,7 +207,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
mod_pbch_e[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1)+1];
#ifdef DEBUG_PBCH
printf("i %d mod_pbch %d %d\n", i, mod_pbch_e[2*i], mod_pbch_e[2*i+1]);
printf("i %d idx %d mod_pbch %d %d\n", i, idx, mod_pbch_e[2*i], mod_pbch_e[2*i+1]);
#endif
}
openair1/PHY/NR_TRANSPORT/nr_transport_common_proto.h
+46
View File
@@ -0,0 +1,46 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/NR_TRANSPORT/nr_mcs.c
* \brief Some support routines for NR MCS computations
* \author
* \date 2018
* \version 0.1
* \company Eurecom
* \email:
* \note
* \warning
*/
#ifndef __NR_TRANSPORT_COMMON_PROTO__H__
#define __NR_TRANSPORT_COMMON_PROTO__H__
// Functions below implement minor procedures from 38-214
/** \brief Computes Q based on I_MCS PDSCH and when 'MCS-Table-PDSCH' is set to "256QAM". Implements Table 5.1.3.1-2 from 38.214.
@param I_MCS */
uint8_t get_nr_Qm(uint8_t I_MCS);
/** \brief Computes Q based on I_MCS PUSCH. Implements Table 6.1.4.1-1 from 38.214.
@param I_MCS */
uint8_t get_nr_Qm_ul(uint8_t I_MCS);
#endif
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+21 -55
View File
@@ -27,7 +27,7 @@
#include "PHY/defs_nr_UE.h"
#include "filt16a_32.h"
#include "T.h"
#define DEBUG_CH
//#define DEBUG_CH
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
@@ -41,20 +41,19 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*f2l,*fr,f1,*f2r,*fl_dc,*fm_dc,*fr_dc;
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*fr;
int ch_offset,symbol_offset;
uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
uint8_t previous_thread_id = ue->current_thread_id[Ns>>1]==0 ? (RX_NB_TH-1):(ue->current_thread_id[Ns>>1]-1);
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
uint8_t nushift, Lmax, ssb_index=0, n_hf=0;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
// recompute nushift with eNB_offset corresponding to adjacent eNB on which to perform channel estimation
nushift = Nid_cell%4;
Lmax = 8; //to be updated
nushift = (Lmax < 8)? ssb_index&3 : ssb_index&7;
ue->frame_parms.nushift = nushift;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
ch_offset = ue->frame_parms.ofdm_symbol_size ;
else
@@ -74,48 +73,24 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
fl = filt16a_l0;
fm = filt16a_m0;
fr = filt16a_r0;
fl_dc = filt16a_l0;
fm_dc = filt16a_m0;
fr_dc = filt16a_r0;
f1 = filt16a_1;
f2l = filt16a_2l0;
f2r = filt16a_2r0;
break;
case 1:
fl = filt16a_l1;
fm = filt16a_m1;
fr = filt16a_r1;
fl_dc = filt16a_l1;
fm_dc = filt16a_m1;
fr_dc = filt16a_r1;
f1 = filt16a_1;
f2l = filt16a_2l1;
f2r = filt16a_2r1;
break;
case 2:
fl = filt16a_l2;
fm = filt16a_m2;
fr = filt16a_r2;
fl_dc = filt16a_l2;
fm_dc = filt16a_m2;
fr_dc = filt16a_r2;
f1 = filt16a_1;
f2l = filt16a_2l0;
f2r = filt16a_2r0;
break;
case 3:
fl = filt16a_l3;
fm = filt16a_m3;
fr = filt16a_r3;
fl_dc = filt16a_l3;
fm_dc = filt16a_m3;
fr_dc = filt16a_r3;
f1 = filt16a_1;
f2l = filt16a_2l1;
f2r = filt16a_2r1;
break;
default:
@@ -124,11 +99,8 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
break;
}
// generate pilot
nr_pbch_dmrs_rx(ue->nr_gold_pbch,
&pilot[p][0]);
nr_pbch_dmrs_rx(ue->nr_gold_pbch[n_hf][ssb_index], &pilot[p][0]);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
@@ -154,7 +126,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
printf("pilot 0 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot 0 : rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],&rxF[0],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fl,
ch,
@@ -162,8 +134,8 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
16);
pil+=2;
rxF+=8;
for (int i= 0; i<8; i++)
printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
//for (int i= 0; i<8; i++)
//printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
@@ -174,19 +146,15 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ch,
dl_ch,
16);
//printf("after dl_ch %d %d\n", dl_ch, *(dl_ch));
//for (int i= 0; i<16; i++)
// printf("dl_ch %d %d\n", dl_ch+i, *(dl_ch+i));
pil+=2;
rxF+=8;
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot 2 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
#ifdef DEBUG_CH
printf("pilot 2 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fr,
ch,
@@ -204,7 +172,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
//printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fl,
ch,
@@ -220,7 +188,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
//printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fm,
ch,
@@ -232,9 +200,9 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
// printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
#ifdef DEBUG_CH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fr,
ch,
@@ -249,8 +217,6 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
}
printf("finish dl_ch addr %p\n", dl_ch);
}
return(0);
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
Executable
+6438
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/dci_nr.h
+111
View File
@@ -0,0 +1,111 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/LTE_TRANSPORT/dci_nr.h
* \brief typedefs for NR DCI structures from 38-212.
* \author R. Knopp, A. Mico Pereperez
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#ifndef USER_MODE
#include "PHY/types.h"
#else
#include <stdint.h>
#endif
#define MAX_DCI_SIZE_BITS 45
#define NR_PDCCH_DCI_H
#ifdef NR_PDCCH_DCI_H
struct NR_DCI_INFO_EXTRACTED {
uint8_t carrier_ind ; // 0 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 1 SUL_IND_0_1:
uint8_t identifier_dci_formats ; // 2 IDENTIFIER_DCI_FORMATS:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint16_t freq_dom_resource_assignment_UL; // 8 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 9 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 10 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 11 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 12 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 13 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 14 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 15 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 16 TB1_MCS:
uint8_t tb1_ndi ; // 17 TB1_NDI:
uint8_t tb1_rv ; // 18 TB1_RV:
uint8_t tb2_mcs ; // 19 TB2_MCS:
uint8_t tb2_ndi ; // 20 TB2_NDI:
uint8_t tb2_rv ; // 21 TB2_RV:
uint8_t mcs ; // 22 MCS:
uint8_t ndi ; // 23 NDI:
uint8_t rv ; // 24 RV:
uint8_t harq_process_number ; // 25 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 26 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 27 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 28 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tpc_pusch ; // 29 TPC_PUSCH:
uint8_t tpc_pucch ; // 30 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 31 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 32 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t short_message_ind ; // 33 SHORT_MESSAGE_IND: 1 bit if crc scrambled with P-RNTI
uint8_t srs_resource_ind ; // 34 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 35 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 36 ANTENNA_PORTS:
uint8_t tci ; // 37 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 38 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 39 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 40 CSI_REQUEST:
uint8_t cbgti ; // 41 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 42 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 43 PTRS_DMRS:
uint8_t beta_offset_ind ; // 44 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 45 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t sul_ind_0_0 ; // 46 SUL_IND_0_0:
uint16_t padding ; // 47 PADDING: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
};
typedef struct NR_DCI_INFO_EXTRACTED NR_DCI_INFO_EXTRACTED_t;
#endif
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
+10080
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
+9 -54
View File
@@ -52,7 +52,7 @@ void set_default_frame_parms_single(nfapi_config_request_t *config, NR_DL_FRAME_
//#define DEBUG_INITIAL_SYNCH
int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
int nr_pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
{
uint8_t l,pbch_decoded,frame_mod4,pbch_tx_ant,dummy;
@@ -95,6 +95,8 @@ int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
pbch_decoded = 0;
printf("pbch_detection nid_cell %d\n",frame_parms->Nid_cell);
//for (frame_mod4=0; frame_mod4<4; frame_mod4++) {
pbch_tx_ant = nr_rx_pbch(ue,
&ue->proc.proc_rxtx[0],
@@ -105,11 +107,8 @@ int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
ue->high_speed_flag,
frame_mod4);
if ((pbch_tx_ant>0) && (pbch_tx_ant<=2)) {
pbch_decoded = 1;
pbch_decoded = 0; //to be updated
// break;
}
//}
@@ -127,43 +126,6 @@ int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
// ue->pbch_vars[0]->decoded_output[0] = ue->pbch_vars[0]->decoded_output[2];
// ue->pbch_vars[0]->decoded_output[2] = dummy;
// now check for Bandwidth of Cell
dummy = (ue->pbch_vars[0]->decoded_output[2]>>5)&7;
switch (dummy) {
case 0 :
frame_parms->N_RB_DL = 6;
break;
case 1 :
frame_parms->N_RB_DL = 15;
break;
case 2 :
frame_parms->N_RB_DL = 25;
break;
case 3 :
frame_parms->N_RB_DL = 50;
break;
case 4 :
frame_parms->N_RB_DL = 75;
break;
case 5:
frame_parms->N_RB_DL = 100;
break;
default:
LOG_E(PHY,"[UE%d] Initial sync: PBCH decoding: Unknown N_RB_DL\n",ue->Mod_id);
return -1;
break;
}
for(int i=0; i<RX_NB_TH;i++)
{
ue->proc.proc_rxtx[i].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
@@ -176,14 +138,11 @@ int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
ue->proc.proc_rxtx[i].frame_tx = ue->proc.proc_rxtx[0].frame_rx;
}
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"[UE%d] Initial sync: pbch decoded sucessfully mode1_flag %d, tx_ant %d, frame %d, N_RB_DL %d, phich_duration %d, phich_resource %s!\n",
LOG_I(PHY,"[UE%d] Initial sync: pbch decoded sucessfully mode1_flag %d, tx_ant %d, frame %d\n",
ue->Mod_id,
frame_parms->mode1_flag,
pbch_tx_ant,
ue->proc.proc_rxtx[0].frame_rx,
frame_parms->N_RB_DL,
frame_parms->phich_config_common.phich_duration,
phich_resource); //frame_parms->phich_config_common.phich_resource);
ue->proc.proc_rxtx[0].frame_rx,);
#endif
return(0);
} else {
@@ -192,7 +151,6 @@ int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
}
char phich_string[13][4] = {"","1/6","","1/2","","","one","","","","","","two"};
char duplex_string[2][4] = {"FDD","TDD"};
char prefix_string[2][9] = {"NORMAL","EXTENDED"};
@@ -260,11 +218,12 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
rx_sss_nr(ue,&metric_fdd_ncp,&phase_fdd_ncp);
set_default_frame_parms_single(config,&ue->frame_parms);
//set_default_frame_parms_single(config,&ue->frame_parms);
nr_init_frame_parms_ue(config,&ue->frame_parms);
nr_gold_pbch(ue);
ret = pbch_detection(ue,mode);
ret = nr_pbch_detection(ue,mode);
ret = -1; //to be deleted
// write_output("rxdata2.m","rxd2",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
#ifdef DEBUG_INITIAL_SYNCH
@@ -322,10 +281,6 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
}
#endif
generate_pcfich_reg_mapping(frame_parms);
generate_phich_reg_mapping(frame_parms);
ue->pbch_vars[0]->pdu_errors_conseq=0;
}
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+100 -210
View File
@@ -31,20 +31,12 @@
*/
#include "PHY/defs_nr_UE.h"
#include "PHY/CODING/coding_extern.h"
#include "PHY/CODING/lte_interleaver_inline.h"
//#include "defs.h"
//#include "extern.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/sse_intrin.h"
#ifdef PHY_ABSTRACTION
#include "SIMULATION/TOOLS/defs.h"
#endif
#include "SIMULATION/TOOLS/sim.h"
//#define DEBUG_PBCH 1
//#define DEBUG_PBCH_ENCODING
//#define INTERFERENCE_MITIGATION 1
#ifdef OPENAIR2
//#include "PHY_INTERFACE/defs.h"
@@ -71,17 +63,17 @@ uint16_t nr_pbch_extract(int **rxdataF,
int nushiftmod4 = frame_parms->nushift;
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
printf("extract_rbs (nushift %d): rx_offset=%d, symbol %d\n",frame_parms->nushift,
(rx_offset + (symbol*(frame_parms->ofdm_symbol_size))),symbol);
rxF = &rxdataF[aarx][(rx_offset + (symbol*(frame_parms->ofdm_symbol_size)))];
rxF_ext = &rxdataF_ext[aarx][symbol*(20*12)];
#ifdef DEBUG_PBCH
printf("extract_rbs (nushift %d): rx_offset=%d, symbol %d\n",frame_parms->nushift,
(rx_offset + (symbol*(frame_parms->ofdm_symbol_size))),symbol);
int16_t *p = (int16_t *)rxF;
for (int i =0; i<240;i++){
for (int i =0; i<8;i++){
printf("rxF [%d]= %d\n",i,rxF[i]);
printf("pbch pss %d %d @%p\n", p[2*i], p[2*i+1], &p[2*i]);
printf("pbch extract rxF %d %d addr %p\n", p[2*i], p[2*i+1], &p[2*i]);
printf("rxF ext addr %p\n", &rxF_ext[i]);
}
#endif
@@ -105,13 +97,13 @@ uint16_t nr_pbch_extract(int **rxdataF,
rxF+=12;
rxF_ext+=9;
} else { //symbol 2
if ((rb < 4) && (rb >15)){
if ((rb < 4) || (rb >15)){
for (i=0; i<12; i++) {
if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) &&
(i!=(nushiftmod4+8))) {
rxF_ext[j]=rxF[i];
//printf("rxF ext[%d] = %d at %p\n",j,rxF_ext[j],&rxF[i]);
//printf("symbol2 rxF ext[%d] = %d at %p\n",j,rxF_ext[j],&rxF[i]);
j++;
}
}
@@ -128,7 +120,7 @@ uint16_t nr_pbch_extract(int **rxdataF,
else
dl_ch0 = &dl_ch_estimates[(aatx<<1)+aarx][0];
printf("dl_ch0 addr %p\n",dl_ch0);
//printf("dl_ch0 addr %p\n",dl_ch0);
dl_ch0_ext = &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*(20*12)];
@@ -140,8 +132,8 @@ uint16_t nr_pbch_extract(int **rxdataF,
(i!=(nushiftmod4+4)) &&
(i!=(nushiftmod4+8))) {
dl_ch0_ext[j]=dl_ch0[i];
if ((rb==0) && (i<2))
printf("dl ch0 ext[%d] = %d dl_ch0 [%d]= %d\n",j,dl_ch0_ext[j],i,dl_ch0[i]);
//if ((rb==0) && (i<2))
//printf("dl ch0 ext[%d] = %d dl_ch0 [%d]= %d\n",j,dl_ch0_ext[j],i,dl_ch0[i]);
j++;
}
}
@@ -150,12 +142,13 @@ uint16_t nr_pbch_extract(int **rxdataF,
dl_ch0_ext+=9;
}
else { //symbol 2
if ((rb < 4) && (rb >15)){
if ((rb < 4) || (rb >15)){
for (i=0; i<12; i++) {
if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) &&
(i!=(nushiftmod4+8))) {
dl_ch0_ext[j]=dl_ch0[i];
//printf("symbol2 dl ch0 ext[%d] = %d dl_ch0 [%d]= %d\n",j,dl_ch0_ext[j],i,dl_ch0[i]);
j++;
}
}
@@ -181,7 +174,7 @@ int nr_pbch_channel_level(int **dl_ch_estimates_ext,
uint32_t symbol)
{
int16_t rb, nb_rb=6;
int16_t rb, nb_rb=20;
uint8_t aatx,aarx;
#if defined(__x86_64__) || defined(__i386__)
@@ -193,19 +186,16 @@ int nr_pbch_channel_level(int **dl_ch_estimates_ext,
#endif
int avg1=0,avg2=0;
uint32_t nsymb = (frame_parms->Ncp==0) ? 7:6;
uint32_t symbol_mod = symbol % nsymb;
for (aatx=0; aatx<4; aatx++) //frame_parms->nb_antenna_ports_eNB;aatx++)
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB;aatx++)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
#if defined(__x86_64__) || defined(__i386__)
avg128 = _mm_setzero_si128();
dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*6*12];
dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12];
#elif defined(__arm__)
avg128 = vdupq_n_s32(0);
dl_ch128=(int16x8_t *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*6*12];
dl_ch128=(int16x8_t *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12];
#endif
for (rb=0; rb<nb_rb; rb++) {
@@ -257,22 +247,24 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
uint8_t output_shift)
{
uint16_t rb,nb_rb=6;
uint8_t aatx,aarx,symbol_mod;
uint16_t rb,nb_rb=20;
uint8_t aatx,aarx;
#if defined(__x86_64__) || defined(__i386__)
__m128i *dl_ch128,*rxdataF128,*rxdataF_comp128;
#elif defined(__arm__)
#endif
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
for (aatx=0; aatx<4; aatx++) //frame_parms->nb_antenna_ports_eNB;aatx++)
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB;aatx++)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
#if defined(__x86_64__) || defined(__i386__)
dl_ch128 = (__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*6*12];
rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol_mod*6*12];
rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol_mod*6*12];
dl_ch128 = (__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12];
rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*20*12];
rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12];
//printf("ch compensation dl_ch ext addr %p \n", &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12]);
//printf("rxdataf ext addr %p symbol %d\n", &rxdataF_ext[aarx][symbol*20*12], symbol);
//printf("rxdataf_comp addr %p\n",&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12]);
#elif defined(__arm__)
// to be filled in
@@ -321,7 +313,6 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
// print_shorts("ch:",dl_ch128+1);
// print_shorts("pack:",rxdataF_comp128+1);
if (symbol_mod>1) {
// multiply by conjugated channel
mmtmpP0 = _mm_madd_epi16(dl_ch128[2],rxdataF128[2]);
// mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
@@ -342,11 +333,7 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
dl_ch128+=3;
rxdataF128+=3;
rxdataF_comp128+=3;
} else {
dl_ch128+=2;
rxdataF128+=2;
rxdataF_comp128+=2;
}
#elif defined(__arm__)
// to be filled in
#endif
@@ -399,59 +386,30 @@ void nr_pbch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
#endif
}
void nr_pbch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t *pbch_e,
uint32_t length)
{
int i;
uint8_t reset;
uint32_t x1, x2, s=0;
reset = 1;
// x1 is set in lte_gold_generic
x2 = frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.6.1
// msg("pbch_scrambling: Nid_cell = %d\n",x2);
for (i=0; i<length; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
// printf("lte_gold[%d]=%x\n",i,s);
reset = 0;
}
pbch_e[i] = (pbch_e[i]&1) ^ ((s>>(i&0x1f))&1);
}
}
void nr_pbch_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
int8_t* llr,
uint32_t length,
uint8_t frame_mod4)
uint8_t* pbch_a,
uint32_t length)
{
int i;
uint8_t reset;
uint32_t x1, x2, s=0;
//printf("unscramb nid_cell %d\n",frame_parms->Nid_cell);
reset = 1;
// x1 is set in first call to lte_gold_generic
x2 = frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.6.1
// msg("pbch_unscrambling: Nid_cell = %d\n",x2);
for (i=0; i<length; i++) {
if (i%32==0) {
s = lte_gold_generic(&x1, &x2, reset);
// printf("lte_gold[%d]=%x\n",i,s);
//printf("lte_gold[%d]=%x\n",i,s);
reset = 0;
}
// take the quarter of the PBCH that corresponds to this frame
if ((i>=(frame_mod4*(length>>2))) && (i<((1+frame_mod4)*(length>>2)))) {
// if (((s>>(i%32))&1)==1)
if (((s>>(i%32))&1)==0)
llr[i] = -llr[i];
}
//printf("s = %d\n",((s>>(i%32))&1) );
if (((s>>(i%32))&1)==1)
pbch_a[i] = 1-pbch_a[i];
}
}
@@ -501,19 +459,19 @@ void nr_pbch_quantize(int8_t *pbch_llr8,
uint16_t i;
for (i=0; i<len; i++) {
if (pbch_llr[i]>7)
/*if (pbch_llr[i]>7)
pbch_llr8[i]=7;
else if (pbch_llr[i]<-8)
pbch_llr8[i]=-8;
else
else*/
pbch_llr8[i] = (char)(pbch_llr[i]);
}
}
static unsigned char dummy_w_rx[3*3*(16+PBCH_A)];
static int8_t pbch_w_rx[3*3*(16+PBCH_A)],pbch_d_rx[96+(3*(16+PBCH_A))];
unsigned char sign(int8_t x) {
return (unsigned char)x >> 7;
}
uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
@@ -527,39 +485,40 @@ uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
uint8_t log2_maxh;//,aatx,aarx;
uint8_t log2_maxh;
int max_h=0;
int symbol,i;
uint32_t nsymb = (frame_parms->Ncp==0) ? 14:12;
uint16_t pbch_E;
uint8_t pbch_a[8];
uint8_t RCC;
//uint8_t pbch_a[64];
uint8_t *pbch_a = malloc(sizeof(uint8_t) * 32); ;
int8_t *pbch_e_rx;
uint8_t *decoded_output = nr_ue_pbch_vars->decoded_output;
uint16_t crc;
//uint16_t crc;
//short nr_demod_table[8] = {0,0,0,1,1,0,1,1};
double nr_demod_table[8] = {0.707,0.707,0.707,-0.707,-0.707,0.707,-0.707,-0.707};
double *demod_pbch_e = malloc (sizeof(double) * 864);
unsigned short idx_demod =0;
int8_t decoderState=0;
uint8_t decoderListSize = 8, pathMetricAppr = 0;
double aPrioriArray[frame_parms->pbch_polar_params.payloadBits]; // assume no a priori knowledge available about the payload.
memset(&pbch_a[0], 0, sizeof(uint8_t) * NR_POLAR_PBCH_PAYLOAD_BITS);
//printf("nr_pbch_ue nid_cell %d\n",frame_parms->Nid_cell);
for (int i=0; i<frame_parms->pbch_polar_params.payloadBits; i++) aPrioriArray[i] = NAN;
int subframe_rx = proc->subframe_rx;
// pbch_D = 16+PBCH_A;
pbch_E = (frame_parms->Ncp==0) ? 1920 : 1728; //RE/RB * #RB * bits/RB (QPSK)
pbch_e_rx = &nr_ue_pbch_vars->llr[frame_mod4*(pbch_E>>2)];
#ifdef DEBUG_PBCH
msg("[PBCH] starting symbol loop (Ncp %d, frame_mod4 %d,mimo_mode %d\n",frame_parms->Ncp,frame_mod4,mimo_mode);
#endif
pbch_e_rx = &nr_ue_pbch_vars->llr[0];
// clear LLR buffer
memset(nr_ue_pbch_vars->llr,0,pbch_E);
memset(nr_ue_pbch_vars->llr,0,NR_POLAR_PBCH_E);
for (symbol=1; symbol<4; symbol++) {
#ifdef DEBUG_PBCH
msg("[PBCH] starting extract ofdm size %d\n",frame_parms->ofdm_symbol_size );
#endif
printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF);
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF);
//write_output("rxdataF0_pbch.m","rxF0pbch",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF,frame_parms->ofdm_symbol_size*4,2,1);
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF,
@@ -570,7 +529,7 @@ uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
high_speed_flag,
frame_parms);
#ifdef DEBUG_PBCH
msg("[PHY] PBCH Symbol %d\n",symbol);
msg("[PHY] PBCH Symbol %d ofdm size %d\n",symbol, frame_parms->ofdm_symbol_size );
msg("[PHY] PBCH starting channel_level\n");
#endif
@@ -590,6 +549,8 @@ uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
symbol,
log2_maxh); // log2_maxh+I0_shift
//write_output("rxdataF_comp.m","rxFcomp",nr_ue_pbch_vars->rxdataF_comp,180,2,1);
/*if (frame_parms->nb_antennas_rx > 1)
pbch_detection_mrc(frame_parms,
nr_ue_pbch_vars->rxdataF_comp,
@@ -598,25 +559,23 @@ uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
if (mimo_mode == ALAMOUTI) {
nr_pbch_alamouti(frame_parms,nr_ue_pbch_vars->rxdataF_comp,symbol);
// msg("[PBCH][RX] Alamouti receiver not yet implemented!\n");
// return(-1);
} else if (mimo_mode != SISO) {
msg("[PBCH][RX] Unsupported MIMO mode\n");
return(-1);
}
if (symbol>(nsymb>>1)+1) {
if (symbol==2) {
nr_pbch_quantize(pbch_e_rx,
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][(symbol%(nsymb>>1))*72]),
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][symbol*240]),
144);
pbch_e_rx+=144;
} else {
nr_pbch_quantize(pbch_e_rx,
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][(symbol%(nsymb>>1))*72]),
96);
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][symbol*240]),
360);
pbch_e_rx+=96;
pbch_e_rx+=360;
}
@@ -624,114 +583,45 @@ uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
pbch_e_rx = nr_ue_pbch_vars->llr;
//un-scrambling
#ifdef DEBUG_PBCH
msg("[PBCH] doing unscrambling\n");
//pbch_e_rx = &nr_ue_pbch_vars->llr[0];
short *p = (short *)&(nr_ue_pbch_vars->rxdataF_comp[0][1*20*12]);
for (int cnt = 0; cnt < 8 ; cnt++)
printf("pbch rx llr %d rxdata_comp %d addr %p\n",*(pbch_e_rx+cnt), p[cnt], &p[0]);
#endif
nr_pbch_unscrambling(frame_parms,
pbch_e_rx,
pbch_E,
frame_mod4);
//un-rate matching
for (i=0; i<NR_POLAR_PBCH_E/2; i++){
idx_demod = (sign(pbch_e_rx[i<<1])&1) ^ ((sign(pbch_e_rx[(i<<1)+1])&1)<<1);
demod_pbch_e[i<<1] = nr_demod_table[(idx_demod)<<1];
demod_pbch_e[(i<<1)+1] = nr_demod_table[((idx_demod)<<1)+1];
#ifdef DEBUG_PBCH
msg("[PBCH] doing un-rate-matching\n");
if (i<16){
printf("idx[%d]= %d\n", i , idx_demod);
printf("sign[%d]= %d sign[%d]= %d\n", i<<1 , sign(pbch_e_rx[i<<1]), (i<<1)+1 , sign(pbch_e_rx[(i<<1)+1]));
printf("demod_pbch_e2[%d] r = %2.3f i = %2.3f\n", i<<1 , demod_pbch_e[i<<1], demod_pbch_e[(i<<1)+1]);}
#endif
memset(dummy_w_rx,0,3*3*(16+PBCH_A));
RCC = generate_dummy_w_cc(16+PBCH_A,
dummy_w_rx);
lte_rate_matching_cc_rx(RCC,pbch_E,pbch_w_rx,dummy_w_rx,pbch_e_rx);
sub_block_deinterleaving_cc((unsigned int)(PBCH_A+16),
&pbch_d_rx[96],
&pbch_w_rx[0]);
memset(pbch_a,0,((16+PBCH_A)>>3));
phy_viterbi_lte_sse2(pbch_d_rx+96,pbch_a,16+PBCH_A);
// Fix byte endian of PBCH (bit 23 goes in first)
for (i=0; i<(PBCH_A>>3); i++)
decoded_output[(PBCH_A>>3)-i-1] = pbch_a[i];
#ifdef DEBUG_PBCH
for (i=0; i<(PBCH_A>>3); i++)
msg("[PBCH] pbch_a[%d] = %x\n",i,decoded_output[i]);
#endif //DEBUG_PBCH
#ifdef DEBUG_PBCH
msg("PBCH CRC %x : %x\n",
crc16(pbch_a,PBCH_A),
((uint16_t)pbch_a[PBCH_A>>3]<<8)+pbch_a[(PBCH_A>>3)+1]);
#endif
crc = (crc16(pbch_a,PBCH_A)>>16) ^
(((uint16_t)pbch_a[PBCH_A>>3]<<8)+pbch_a[(PBCH_A>>3)+1]);
if (crc == 0x0000)
return(1);
else if (crc == 0xffff)
return(2);
else if (crc == 0x5555)
return(4);
else
return(-1);
}
#ifdef PHY_ABSTRACTION
uint16_t rx_pbch_emul(PHY_VARS_UE *phy_vars_ue,
uint8_t eNB_id,
uint8_t pbch_phase)
{
double bler=0.0;//, x=0.0;
double sinr=0.0;
uint16_t nb_rb = phy_vars_ue->frame_parms.N_RB_DL;
int16_t f;
uint8_t CC_id=phy_vars_ue->CC_id;
int frame_rx = phy_vars_ue->proc.proc_rxtx[0].frame_rx;
// compute effective sinr
// TODO: adapt this to varible bandwidth
for (f=(nb_rb*6-3*12); f<(nb_rb*6+3*12); f++) {
if (f!=0) //skip DC
sinr += pow(10, 0.1*(phy_vars_ue->sinr_dB[f]));
}
sinr = 10*log10(sinr/(6*12));
//polar decoding de-rate matching
decoderState = polar_decoder(demod_pbch_e, pbch_a, &frame_parms->pbch_polar_params, decoderListSize, aPrioriArray, pathMetricAppr);
bler = pbch_bler(sinr);
//for (i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
// printf("pbch_a[%d] = %u \n", i,pbch_a[i]);
//un-scrambling
nr_pbch_unscrambling(frame_parms,pbch_a,NR_POLAR_PBCH_PAYLOAD_BITS);
LOG_D(PHY,"EMUL UE rx_pbch_emul: eNB_id %d, pbch_phase %d, sinr %f dB, bler %f \n",
eNB_id,
pbch_phase,
sinr,
bler);
// Fix byte endian
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS); i++)
decoded_output[(NR_POLAR_PBCH_PAYLOAD_BITS)-i-1] = pbch_a[i];
//#ifdef DEBUG_PBCH
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS); i++)
printf("unscrambling pbch_a[%d] = %d \n", i,pbch_a[i]);
//for (i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
// printf("[PBCH] decoder_output[%d] = %x\n",i,decoded_output[i]);
//#endif
if (pbch_phase == (frame_rx % 4)) {
if (uniformrandom() >= bler) {
memcpy(phy_vars_ue->pbch_vars[eNB_id]->decoded_output,PHY_vars_eNB_g[eNB_id][CC_id]->pbch_pdu,PBCH_PDU_SIZE);
return(PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.nb_antenna_ports_eNB);
} else
return(-1);
} else
return(-1);
}
#endif
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+35
View File
@@ -328,8 +328,43 @@ typedef struct {
int8_t g_pucch;
} NR_UE_DLSCH_t;
typedef enum {format0_0,
format0_1,
format1_0,
format1_1,
format2_0,
format2_1,
format2_2,
format2_3
} NR_DCI_format_t;
typedef enum {nr_pucch_format0=0,
nr_pucch_format1,
nr_pucch_format2,
nr_pucch_format3,
nr_pucch_format4
} NR_PUCCH_FMT_t;
typedef struct {
/// Length of DCI in bits
uint8_t dci_length;
/// Aggregation level
uint8_t L;
/// Position of first CCE of the dci
int firstCCE;
/// flag to indicate that this is a RA response
boolean_t ra_flag;
/// rnti
rnti_t rnti;
/// Format
NR_DCI_format_t format;
/// search space
dci_space_t search_space;
/// DCI pdu
uint8_t dci_pdu[8];
} NR_DCI_ALLOC_t;
/**@}*/
#endif
openair1/PHY/defs_nr_UE.h
+215 -3
View File
@@ -21,7 +21,7 @@
/*! \file PHY/defs_nr_UE.h
\brief Top-level defines and structure definitions for nr ue
\author Guy De Souza, H. WANG
\author Guy De Souza, H. WANG, A. Mico Pereperez
\date 2018
\version 0.1
\company Eurecom
@@ -34,6 +34,8 @@
#include "defs_nr_common.h"
#include "CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#define _GNU_SOURCE
#include <stdio.h>
@@ -110,8 +112,8 @@
#define openair_sched_exit() exit(-1)
#define max(a,b) ((a)>(b) ? (a) : (b))
#define min(a,b) ((a)<(b) ? (a) : (b))
//#define max(a,b) ((a)>(b) ? (a) : (b))
//#define min(a,b) ((a)<(b) ? (a) : (b))
#define bzero(s,n) (memset((s),0,(n)))
@@ -140,7 +142,9 @@
#endif
#include "PHY/NR_UE_TRANSPORT/dci_nr.h"
//#include "PHY/LTE_TRANSPORT/defs.h"
//#include "PHY/NR_UE_TRANSPORT/defs_nr.h"
#include <pthread.h>
#include "targets/ARCH/COMMON/common_lib.h"
@@ -569,6 +573,207 @@ typedef struct {
//MIMO_mode_t mimo_mode;
} NR_UE_PDSCH_FLP;
#define NR_PDCCH_DEFS_NR_UE
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearchSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#ifdef NR_PDCCH_DEFS_NR_UE
#define NBR_NR_FORMATS 8
#define NBR_NR_DCI_FIELDS 48
// The following parameters define 'position' of each DCI field described in TS 38.212
#define CARRIER_IND 0
#define SUL_IND_0_1 1
#define IDENTIFIER_DCI_FORMATS 2
#define SLOT_FORMAT_IND 3
#define PRE_EMPTION_IND 4
#define TPC_CMD_NUMBER 5
#define BLOCK_NUMBER 6
#define BANDWIDTH_PART_IND 7
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 8
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 9
#define TIME_DOM_RESOURCE_ASSIGNMENT 10
#define VRB_TO_PRB_MAPPING 11
#define PRB_BUNDLING_SIZE_IND 12
#define RATE_MATCHING_IND 13
#define ZP_CSI_RS_TRIGGER 14
#define FREQ_HOPPING_FLAG 15
#define TB1_MCS 16
#define TB1_NDI 17
#define TB1_RV 18
#define TB2_MCS 19
#define TB2_NDI 20
#define TB2_RV 21
#define MCS 22
#define NDI 23
#define RV 24
#define HARQ_PROCESS_NUMBER 25
#define DAI_ 26
#define FIRST_DAI 27
#define SECOND_DAI 28
#define TPC_PUSCH 29
#define TPC_PUCCH 30
#define PUCCH_RESOURCE_IND 31
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 32
#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 34
#define PRECOD_NBR_LAYERS 35
#define ANTENNA_PORTS 36
#define TCI 37
#define SRS_REQUEST 38
#define TPC_CMD_NUMBER_FORMAT2_3 39
#define CSI_REQUEST 40
#define CBGTI 41
#define CBGFI 42
#define PTRS_DMRS 43
#define BETA_OFFSET_IND 44
#define DMRS_SEQ_INI 45
#define SUL_IND_0_0 46
#define PADDING 47
typedef enum {bundle_n2=2,bundle_n3=3,bundle_n6=6} NR_UE_CORESET_REG_bundlesize_t;
typedef enum {interleave_n2=2,interleave_n3=3,interleave_n6=6} NR_UE_CORESET_interleaversize_t;
typedef struct {
//Corresponds to L1 parameter 'CORESET-REG-bundle-size' (see 38.211, section FFS_Section)
NR_UE_CORESET_REG_bundlesize_t reg_bundlesize;
//Corresponds to L1 parameter 'CORESET-interleaver-size' (see 38.211, 38.213, section FFS_Section)
NR_UE_CORESET_interleaversize_t interleaversize;
//Corresponds to L1 parameter 'CORESET-shift-index' (see 38.211, section 7.3.2.2)
int shiftIndex;
} NR_UE_CORESET_CCE_REG_MAPPING_t;
typedef enum {allContiguousRBs=0,sameAsREGbundle=1} NR_UE_CORESET_precoder_granularity_t;
typedef struct {
/*
* define CORESET structure according to 38.331
*
* controlResourceSetId: Corresponds to L1 parameter 'CORESET-ID'
* Value 0 identifies the common CORESET configured in MIB and in ServingCellConfigCommon
* Values 1..maxNrofControlResourceSets-1 identify CORESETs configured by dedicated signalling
* frequencyDomainResources: BIT STRING (SIZE (45))
* Corresponds to L1 parameter 'CORESET-freq-dom'(see 38.211, section 7.3.2.2)
* Frequency domain resources for the CORESET. Each bit corresponds a group of 6 RBs, with grouping starting from PRB 0,
* which is fully contained in the bandwidth part within which the CORESET is configured.
* duration: INTEGER (1..maxCoReSetDuration)
* Corresponds to L1 parameter 'CORESET-time-duration' (see 38.211, section 7.3.2.2FFS_Section)
* Contiguous time duration of the CORESET in number of symbols
* cce-REG-MappingType: interleaved
* reg-BundleSize: ENUMERATED {n2, n3, n6}
* interleaverSize: ENUMERATED {n2, n3, n6}
* shiftIndex: INTEGER
* nonInterleaved NULL
* precoderGranularity: ENUMERATED {sameAsREG-bundle, allContiguousRBs}
* Corresponds to L1 parameter 'CORESET-precoder-granuality' (see 38.211, sections 7.3.2.2 and 7.4.1.3.2)
* tci-StatesPDCCH: SEQUENCE(SIZE (1..maxNrofTCI-StatesPDCCH)) OF TCI-StateId OPTIONAL
* A subset of the TCI states defined in TCI-States used for providing QCL relationships between the DL RS(s)
* in one RS Set (TCI-State) and the PDCCH DMRS ports.
* Corresponds to L1 parameter 'TCI-StatesPDCCH' (see 38.214, section FFS_Section)
* tci-PresentInDCI: ENUMERATED {enabled} OPTIONAL
* Corresponds to L1 parameter 'TCI-PresentInDCI' (see 38,213, section 5.1.5)
* pdcch-DMRS-ScramblingID: BIT STRING (SIZE (16)) OPTIONAL
* PDCCH DMRS scrambling initalization.
* Corresponds to L1 parameter 'PDCCH-DMRS-Scrambling-ID' (see 38.214, section 5.1)
* When the field is absent the UE applies the value '0'.
*/
int controlResourceSetId;
uint64_t frequencyDomainResources;
int duration;
NR_UE_CORESET_CCE_REG_MAPPING_t cce_reg_mappingType;
NR_UE_CORESET_precoder_granularity_t precoderGranularity;
int tciStatesPDCCH;
int tciPresentInDCI;
uint16_t pdcchDMRSScramblingID;
} NR_UE_PDCCH_CORESET;
// Slots for PDCCH Monitoring configured as periodicity and offset
typedef enum {nr_sl1=1,nr_sl2=2,nr_sl4=4,nr_sl5=5,nr_sl8=8,nr_sl10=10,nr_sl16=16,nr_sl20=20} NR_UE_SLOT_PERIOD_OFFSET_t;
typedef enum {nc0=0,nc1=1,nc2=2,nc3=3,nc4=4,nc5=5,nc6=6,nc8=8} NR_UE_SEARCHSPACE_nbrCAND_t;
typedef enum {nsfi1=1,nsfi2=2} NR_UE_SEARCHSPACE_nbrCAND_SFI_t;
typedef enum {n2_3_1=1,n2_3_2=2} NR_UE_SEARCHSPACE_nbrCAND_2_3_t;
typedef enum {cformat0_0_and_1_0=0,cformat2_0=2,cformat2_1=3,cformat2_2=4,cformat2_3=5} NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t;
typedef enum {uformat0_0_and_1_0=0,uformat0_1_and_1_1=1} NR_UE_SEARCHSPACE_USS_DCI_FORMAT_t;
// Monitoring periodicity of SRS PDCCH in number of slots for DCI format 2-3
// Corresponds to L1 parameter 'SRS-Num-PDCCH-cand' (see 38.212, 38.213, section 7.3.1, 11.3)
typedef enum {mp1=1,mp2=2,mp4=4,mp5=5,mp8=8,mp10=10,mp16=16,mp20=20} NR_UE_SEARCHSPACE_MON_PERIOD_t;
//typedef enum {n1=1,n2=2} NR_UE_SEARCHSPACE_nbrCAND_2_3_t;
// The number of PDCCH candidates for DCI format 2-3 for the configured aggregation level.
// Corresponds to L1 parameter 'SRS-Num-PDCCH-cand' (see 38.212, 38.213, section 7.3.1, 11.3)
typedef enum {common=0,ue_specific=1} NR_SEARCHSPACE_TYPE_t;
typedef struct {
/*
* searchSpaceType: Indicates whether this is a common search space (present) or a UE specific search space (CHOICE)
* as well as DCI formats to monitor for (description in struct NR_UE_PDCCH_SEARCHSPACE_TYPE
* common: Configures this search space as common search space (CSS) and DCI formats to monitor
* ue-Specific: Configures this search space as UE specific search space (USS)
* The UE monitors the DCI format with CRC scrambled by
* C-RNTI, CS-RNTI (if configured), TC-RNTI (if a certain condition is met),
* and SP-CSI-RNTI (if configured)
*/
NR_SEARCHSPACE_TYPE_t type;
NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t common_dci_formats;
//NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_SFI_aggr_level[5]; // FIXME! A table of five enum elements
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel1;
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel2;
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel4;
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel8;
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel16;
NR_UE_SEARCHSPACE_MON_PERIOD_t srs_monitoringPeriodicity2_3;
NR_UE_SEARCHSPACE_nbrCAND_2_3_t srs_nrofCandidates;
NR_UE_SEARCHSPACE_USS_DCI_FORMAT_t ue_specific_dci_formats;
} NR_UE_PDCCH_SEARCHSPACE_TYPE;
typedef struct {
/*
* define SearchSpace structure according to 38.331
*
* searchSpaceId: Identity of the search space. SearchSpaceId = 0 identifies the SearchSpace configured via PBCH (MIB)
* The searchSpaceId is unique among the BWPs of a Serving Cell
* controlResourceSetId: CORESET applicable for this SearchSpace
* 0 identifies the common CORESET configured in MIB
* 1..maxNrofControlResourceSets-1 identify CORESETs configured by dedicated signalling
* monitoringSlotPeriodicityAndOffset:
* Slots for PDCCH Monitoring configured as periodicity and offset.
* Corresponds to L1 parameters 'Montoring-periodicity-PDCCH-slot' and
* 'Montoring-offset-PDCCH-slot' (see 38.213, section 10)
* monitoringSymbolsWithinSlot:
* Symbols for PDCCH monitoring in the slots configured for PDCCH monitoring
* The most significant (left) bit represents the first OFDM in a slot
*
* nrofCandidates: Number of PDCCH candidates per aggregation level
*
* searchSpaceType: Indicates whether this is a common search space (present) or a UE specific search space
* as well as DCI formats to monitor for (description in struct NR_UE_PDCCH_SEARCHSPACE_TYPE
* common: Configures this search space as common search space (CSS) and DCI formats to monitor
* ue-Specific: Configures this search space as UE specific search space (USS)
* The UE monitors the DCI format with CRC scrambled by
* C-RNTI, CS-RNTI (if configured), TC-RNTI (if a certain condition is met),
* and SP-CSI-RNTI (if configured)
*/
// INTEGER (0..maxNrofSearchSpaces-1) (0..40-1)
int searchSpaceId;
int controlResourceSetId;
// FIXME! Verify type to be used for this parameter (sl1, sl2, sl4, sl5, sl8, sl10, sl16, sl20). Maybe enum.
NR_UE_SLOT_PERIOD_OFFSET_t monitoringSlotPeriodicityAndOffset;
int monitoringSlotPeriodicityAndOffset_offset;
// bit string size 14. Bitmap to indicate symbols within slot where PDCCH has to be monitored
// the MSB (left) bit represents first OFDM in slot
uint16_t monitoringSymbolWithinSlot;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel1;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel2;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel4;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel8;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel16;
NR_UE_PDCCH_SEARCHSPACE_TYPE searchSpaceType;
} NR_UE_PDCCH_SEARCHSPACE;
#endif
typedef struct {
/// \brief Pointers to extracted PDCCH symbols in frequency-domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
@@ -621,6 +826,13 @@ typedef struct {
//Check for specific DCIFormat and AgregationLevel
uint8_t dciFormat;
uint8_t agregationLevel;
#ifdef NR_PDCCH_DEFS_NR_UE
// CORESET structure, where maximum number of CORESETs to be handled is 3 (according to 38.331 V15.1.0)
NR_UE_PDCCH_CORESET coreset[NR_NBR_CORESET_ACT_BWP];
// SEARCHSPACE structure, where maximum number of SEARCHSPACEs to be handled is 10 (according to 38.331 V15.1.0)
// Each SearchSpace is associated with one ControlResourceSet
NR_UE_PDCCH_SEARCHSPACE searchSpace[NR_NBR_SEARCHSPACE_ACT_BWP];
#endif
} NR_UE_PDCCH;
#define PBCH_A 24
openair1/PHY/defs_nr_common.h
+1 -1
View File
@@ -34,7 +34,7 @@
#define __PHY_DEFS_NR_COMMON__H__
#include "defs_common.h"
#include "nfapi_nr_interface.h"
#include "nfapi_interface.h"
#include "impl_defs_nr.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
openair1/PHY/phy_vars_nr_ue.h
+1
View File
@@ -44,6 +44,7 @@ int16_t *primary_synch2_time;
//PHY_VARS *PHY_vars;
#ifndef OCP_FRAMEWORK
PHY_VARS_NR_UE ***PHY_vars_UE_g;
PHY_VARS_eNB ***PHY_vars_eNB_g;
LTE_DL_FRAME_PARMS *lte_frame_parms_g;
#else
PHY_VARS_NR_UE * PHY_vars_UE_g[MAX_UE][MAX_NUM_CCs]={NULL};
openair1/SCHED_NR/nr_ru_procedures.c
+8 -6
View File
@@ -32,7 +32,8 @@
#include "PHY/defs_gNB.h"
#include "PHY/phy_extern.h"
#include "SCHED_NR/defs.h"
#include "sched_nr.h"
#include "PHY/MODULATION/modulation_common.h"
#include "PHY/LTE_TRANSPORT/if4_tools.h"
#include "PHY/LTE_TRANSPORT/if5_tools.h"
@@ -85,6 +86,7 @@ void nr_feptx0(RU_t *ru,int slot) {
void nr_feptx_ofdm_2thread(RU_t *ru) {
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
nfapi_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
RU_proc_t *proc = &ru->proc;
struct timespec wait;
int subframe = ru->proc.subframe_tx;
@@ -94,7 +96,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru) {
start_meas(&ru->ofdm_mod_stats);
if (nr_subframe_select(fp,subframe) == SF_UL) return;
if (nr_subframe_select(cfg,subframe) == SF_UL) return;
// this copy should be done in the precoding thread (currently inactive)
for (int aa=0;aa<ru->nb_tx;aa++)
@@ -104,7 +106,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
if (nr_subframe_select(fp,subframe)==SF_DL) {
if (nr_subframe_select(cfg,subframe)==SF_DL) {
// If this is not an S-subframe
if (pthread_mutex_timedlock(&proc->mutex_feptx,&wait) != 0) {
printf("[RU] ERROR pthread_mutex_lock for feptx thread (IC %d)\n", proc->instance_cnt_feptx);
@@ -202,8 +204,8 @@ void nr_feptx_ofdm(RU_t *ru) {
slot_offset = subframe*fp->samples_per_subframe;
if ((nr_subframe_select(fp,subframe)==SF_DL)||
((nr_subframe_select(fp,subframe)==SF_S))) {
if ((nr_subframe_select(cfg,subframe)==SF_DL)||
((nr_subframe_select(cfg,subframe)==SF_S))) {
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
start_meas(&ru->ofdm_mod_stats);
@@ -228,7 +230,7 @@ void nr_feptx_ofdm(RU_t *ru) {
14,
fp);
// if S-subframe generate first slot only
if (nr_subframe_select(fp,subframe) == SF_DL)
if (nr_subframe_select(cfg,subframe) == SF_DL)
nr_normal_prefix_mod(&ru->common.txdataF_BF[aa][slot_offset_F+slot_sizeF],
dummy_tx_b+(fp->samples_per_subframe / fp->slots_per_subframe),
14,
openair1/SCHED_NR/phy_procedures_nr_common.c
+3 -2
View File
@@ -31,12 +31,13 @@
*/
#include "PHY/defs_gNB.h"
#include "PHY/phy_extern.h"
#include "SCHED_NR/defs.h"
#include "sched_nr.h"
nr_subframe_t nr_subframe_select(nfapi_nr_config_request_t *cfg,unsigned char subframe)
{
if (cfg->subframe_config.duplex_mode.value == FDD)
return(SF_DL);
else
return SF_DL;
}
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+1
View File
@@ -21,6 +21,7 @@
#include "PHY/phy_extern.h"
#include "PHY/defs_gNB.h"
#include "sched_nr.h"
#include "PHY/NR_TRANSPORT/nr_transport.h"
#include "SCHED/sched_eNB.h"
#include "SCHED/sched_common_extern.h"
openair1/SCHED_NR/defs.h → openair1/SCHED_NR/sched_nr.h
+8 -19
View File
@@ -20,9 +20,9 @@
*/
/*
\author R. Knopp, F. Kaltenberger
\author Guy De Souza
\company EURECOM
\email knopp@eurecom.fr
\email desouza@eurecom.fr
*/
#ifndef __openair_SCHED_NR_DEFS_H__
@@ -32,23 +32,12 @@
#include "PHY_INTERFACE/phy_interface.h"
#include "SCHED/sched_eNB.h"
int nr_generate_pss( int16_t *d_pss,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms);
int nr_generate_sss( int16_t *d_sss,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms);
int nr_generate_pbch_dmrs(uint32_t gold_sequence,
int32_t **txdataF,
int16_t amp,
nfapi_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms);
lte_subframe_t nr_subframe_select (nfapi_config_request_t *cfg, unsigned char subframe);
void nr_set_ssb_first_subcarrier(nfapi_config_request_t *cfg, NR_DL_FRAME_PARMS *fp);
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB_rxtx_proc_t *proc, int do_meas);
void nr_init_feptx_thread(RU_t *ru,pthread_attr_t *attr_feptx);
void nr_feptx_ofdm(RU_t *ru);
void nr_feptx_ofdm_2thread(RU_t *ru);
void nr_feptx0(RU_t *ru,int slot);
#endif
openair1/SCHED_NR_UE/defs.h
+373
View File
@@ -0,0 +1,373 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*
\author R. Knopp, F. Kaltenberger
\company EURECOM
\email knopp@eurecom.fr
*/
#ifndef __openair_SCHED_H__
#define __openair_SCHED_H__
#include "PHY/defs_nr_UE.h"
/*enum THREAD_INDEX { OPENAIR_THREAD_INDEX = 0,
TOP_LEVEL_SCHEDULER_THREAD_INDEX,
DLC_SCHED_THREAD_INDEX,
openair_SCHED_NB_THREADS
};*/ // do not modify this line
#define OPENAIR_THREAD_PRIORITY 255
#define OPENAIR_THREAD_STACK_SIZE PTHREAD_STACK_MIN //4096 //RTL_PTHREAD_STACK_MIN*6
//#define DLC_THREAD_STACK_SIZE 4096 //DLC stack size
//#define UE_SLOT_PARALLELISATION
//#define UE_DLSCH_PARALLELISATION
/*enum openair_SCHED_STATUS {
openair_SCHED_STOPPED=1,
openair_SCHED_STARTING,
openair_SCHED_STARTED,
openair_SCHED_STOPPING
};*/
/*enum openair_ERROR {
// HARDWARE CAUSES
openair_ERROR_HARDWARE_CLOCK_STOPPED= 1,
// SCHEDULER CAUSE
openair_ERROR_OPENAIR_RUNNING_LATE,
openair_ERROR_OPENAIR_SCHEDULING_FAILED,
// OTHERS
openair_ERROR_OPENAIR_TIMING_OFFSET_OUT_OF_BOUNDS,
};*/
/*enum openair_SYNCH_STATUS {
openair_NOT_SYNCHED=1,
openair_SYNCHED,
openair_SCHED_EXIT
};*/
/*enum openair_HARQ_TYPE {
openair_harq_DL = 0,
openair_harq_UL,
openair_harq_RA
};*/
#define DAQ_AGC_ON 1
#define DAQ_AGC_OFF 0
/** @addtogroup _PHY_PROCEDURES_
* @{
*/
/*! \brief Top-level entry routine for UE procedures. Called every slot by process scheduler. In even slots, it performs RX functions from previous subframe (if required). On odd slots, it generate TX waveform for the following subframe.
@param phy_vars_ue Pointer to UE variables on which to act
@param eNB_id ID of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calibration/debug mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param *phy_vars_rn pointer to RN variables
*/
void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
#if defined(Rel10) || defined(Rel14)
/*! \brief Top-level entry routine for relay node procedures actinf as UE. This proc will make us of the existing UE procs.
@param last_slot Index of last slot (0-19)
@param next_slot Index of next_slot (0-19)
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, relaying_type_t r_type);
#endif
/*! \brief Scheduling for UE TX procedures in normal subframes.
@param phy_vars_ue Pointer to UE variables on which to act
@param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calib/normal mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type);
/*! \brief Scheduling for UE RX procedures in normal subframes.
@param last_slot Index of last slot (0-19)
@param phy_vars_ue Pointer to UE variables on which to act
@param proc Pointer to RXn_TXnp4 proc information
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calibration/debug mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
#ifdef UE_SLOT_PARALLELISATION
void *UE_thread_slot1_dl_processing(void *arg);
#endif
/*! \brief Scheduling for UE TX procedures in TDD S-subframes.
@param phy_vars_ue Pointer to UE variables on which to act
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
void phy_procedures_UE_S_TX(PHY_VARS_NR_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag,relaying_type_t r_type);
/*! \brief Scheduling for UE RX procedures in TDD S-subframes.
@param phy_vars_ue Pointer to UE variables on which to act
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
void phy_procedures_UE_S_RX(PHY_VARS_NR_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag, relaying_type_t r_type);
/*! \brief Function to compute subframe type as a function of Frame type and TDD Configuration (implements Table 4.2.2 from 36.211, p.11 from version 8.6) and subframe index.
@param frame_parms Pointer to DL frame parameter descriptor
@param subframe Subframe index
@returns Subframe type (DL,UL,S)
*/
nr_subframe_t nr_subframe_select(NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe);
/*! \brief Function to compute subframe type as a function of Frame type and TDD Configuration (implements Table 4.2.2 from 36.211, p.11 from version 8.6) and subframe index. Same as nr_subframe_select, except that it uses the Mod_id and is provided as a service to the MAC scheduler.
@param Mod_id Index of eNB
@param CC_id Component Carrier Index
@param subframe Subframe index
@returns Subframe type (DL,UL,S)
*/
nr_subframe_t nr_get_subframe_direction(uint8_t Mod_id, uint8_t CC_id,uint8_t subframe);
/*! \brief Function to compute timing of Msg3 transmission on UL-SCH (first UE transmission in RA procedure). This implements the timing in paragraph a) from Section 6.1.1 in 36.213 (p. 17 in version 8.6). Used by eNB upon transmission of random-access response (RA_RNTI) to program corresponding ULSCH reception procedure. Used by UE upon reception of random-access response (RA_RNTI) to program corresponding ULSCH transmission procedure. This does not support the UL_delay field in RAR (always assumed to be 0).
@param frame_parms Pointer to DL frame parameter descriptor
@param current_subframe Index of subframe where RA_RNTI was received
@param current_frame Index of frame where RA_RNTI was received
@param frame Frame index where Msg3 is to be transmitted (n+6 mod 10 for FDD, different for TDD)
@param subframe subframe index where Msg3 is to be transmitted (n, n+1 or n+2)
*/
void nr_get_Msg3_alloc(NR_DL_FRAME_PARMS *frame_parms,
uint8_t current_subframe,
uint32_t current_frame,
uint32_t *frame,
uint8_t *subframe);
/*! \brief Function to compute timing of Msg3 retransmission on UL-SCH (first UE transmission in RA procedure).
@param frame_parms Pointer to DL frame parameter descriptor
@param current_subframe Index of subframe where RA_RNTI was received
@param current_frame Index of frame where RA_RNTI was received
@param frame Frame index where Msg3 is to be transmitted (n+6 mod 10 for FDD, different for TDD)
@param subframe subframe index where Msg3 is to be transmitted (n, n+1 or n+2)
*/
void nr_get_Msg3_alloc_ret(NR_DL_FRAME_PARMS *frame_parms,
uint8_t current_subframe,
uint32_t current_frame,
uint32_t *frame,
uint8_t *subframe);
/*! \brief Get ULSCH harq_pid for Msg3 from RAR subframe. This returns n+k mod 10 (k>6) and corresponds to the rule in Section 6.1.1 from 36.213
@param frame_parms Pointer to DL Frame Parameters
@param frame Frame index
@param current_subframe subframe of RAR transmission
@returns harq_pid (0 ... 7)
*/
uint8_t nr_get_Msg3_harq_pid(NR_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t current_subframe);
/*! \brief Get ULSCH harq_pid from PHICH subframe
@param frame_parms Pointer to DL Frame Parameters
@param subframe subframe of PHICH
@returns harq_pid (0 ... 7)
*/
/*! \brief Function to indicate failure of contention resolution or RA procedure. It places the UE back in PRACH mode.
@param Mod_id Instance index of UE
@param CC_id Component Carrier Index
@param eNB_index Index of eNB
*/
void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
/*! \brief Function to indicate success of contention resolution or RA procedure.
@param Mod_id Instance index of UE
@param CC_id Component Carrier Index
@param eNB_index Index of eNB
*/
void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
/*! \brief Compute ACK/NACK information for PUSCH/PUCCH for UE transmission in subframe n. This function implements table 10.1-1 of 36.213, p. 69.
@param frame_parms Pointer to DL frame parameter descriptor
@param harq_ack Pointer to dlsch_ue harq_ack status descriptor
@param subframe Subframe for UE transmission (n in 36.213)
@param o_ACK Pointer to ACK/NAK payload for PUCCH/PUSCH
@returns status indicator for PUCCH/PUSCH transmission
*/
uint8_t nr_get_ack(NR_DL_FRAME_PARMS *frame_parms,nr_harq_status_t *harq_ack,uint8_t subframe_tx,uint8_t subframe_rx,uint8_t *o_ACK, uint8_t cw_idx);
/*! \brief Reset ACK/NACK information
@param frame_parms Pointer to DL frame parameter descriptor
@param harq_ack Pointer to dlsch_ue harq_ack status descriptor
@param subframe Subframe for UE transmission (n in 36.213)
@param o_ACK Pointer to ACK/NAK payload for PUCCH/PUSCH
@returns status indicator for PUCCH/PUSCH transmission
*/
uint8_t nr_reset_ack(NR_DL_FRAME_PARMS *frame_parms,
nr_harq_status_t *harq_ack,
unsigned char subframe_tx,
unsigned char subframe_rx,
unsigned char *o_ACK,
uint8_t *pN_bundled,
uint8_t cw_idx);
/*! \brief Compute UL ACK subframe from DL subframe. This is used to retrieve corresponding DLSCH HARQ pid at eNB upon reception of ACK/NAK information on PUCCH/PUSCH. Derived from Table 10.1-1 in 36.213 (p. 69 in version 8.6)
@param frame_parms Pointer to DL frame parameter descriptor
@param subframe Subframe for UE transmission (n in 36.213)
@param ACK_index TTI bundling index (0,1)
@returns Subframe index for corresponding DL transmission
*/
uint8_t nr_ul_ACK_subframe2_dl_subframe(NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe,uint8_t ACK_index);
/*! \brief Computes number of DL subframes represented by a particular ACK received on UL (M from Table 10.1-1 in 36.213, p. 69 in version 8.6)
@param frame_parms Pointer to DL frame parameter descriptor
@param subframe Subframe for UE transmission (n in 36.213)
@returns Number of DL subframes (M)
*/
uint8_t nr_ul_ACK_subframe2_M(NR_DL_FRAME_PARMS *frame_parms,unsigned char subframe);
/*! \brief Indicates the SR TXOp in current subframe. Implements Table 10.1-5 from 36.213.
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXn_TXnp4 thread context
@param eNB_id ID of eNB which is to receive the SR
@returns 1 if TXOp is active.
*/
uint8_t nr_is_SR_TXOp(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id);
/*! \brief Gives the UL subframe corresponding to a PDDCH order in subframe n
@param frame_parms Pointer to DL frame parameters
@param proc Pointer to RXn-TXnp4 proc information
@param n subframe of PDCCH
@returns UL subframe corresponding to pdcch order
*/
uint8_t nr_pdcch_alloc2ul_subframe(NR_DL_FRAME_PARMS *frame_parms,uint8_t n);
/*! \brief Gives the UL frame corresponding to a PDDCH order in subframe n
@param frame_parms Pointer to DL frame parameters
@param frame Frame of received PDCCH
@param n subframe of PDCCH
@returns UL frame corresponding to pdcch order
*/
uint32_t nr_pdcch_alloc2ul_frame(NR_DL_FRAME_PARMS *frame_parms,uint32_t frame, uint8_t n);
uint16_t nr_get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1);
int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,int16_t timing_advance);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint16_t timing_advance);
unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
/*! \brief This function retrives the resource (n1_pucch) corresponding to a PDSCH transmission in
subframe n-4 which is acknowledged in subframe n (for FDD) according to n1_pucch = Ncce + N1_pucch. For
TDD, this routine computes the complex procedure described in Section 10.1 of 36.213 (through tables 10.1-1,10.1-2)
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXn-TXnp4 proc information
@param harq_ack Pointer to dlsch_ue harq_ack status descriptor
@param eNB_id Index of eNB
@param b Pointer to PUCCH payload (b[0],b[1])
@param SR 1 means there's a positive SR in parallel to ACK/NAK
@returns n1_pucch
*/
uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
nr_harq_status_t *harq_ack,
uint8_t eNB_id,
uint8_t *b,
uint8_t SR);
/*! \brief This function retrieves the PHY UE mode. It is used as a helper function for the UE MAC.
@param Mod_id Local UE index on which to act
@param CC_id Component Carrier Index
@param eNB_index ID of eNB
@returns UE mode
*/
UE_MODE_t get_ue_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param pucch_fmt Format of PUCCH that is being transmitted
@returns Transmit power
*/
int16_t nr_pucch_power_cntl(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t subframe,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param j index of type of PUSCH (SPS, Normal, Msg3)
@returns Transmit power
*/
void nr_pusch_power_cntl(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag);
/*! \brief This function implements the power control mechanism for SRS from 36.213.
@param phy_vars_ue PHY variables
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param j index of type of PUSCH (SPS, Normal, Msg3)
@returns Transmit power
*/
void nr_srs_power_cntl(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t *pnb_rb_srs, uint8_t abstraction_flag);
void nr_get_cqipmiri_params(PHY_VARS_NR_UE *ue,uint8_t eNB_id);
void nr_dump_dlsch(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
void nr_dump_dlsch_SI(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
void nr_dump_dlsch_ra(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
int nr_is_srs_occasion_common(NR_DL_FRAME_PARMS *frame_parms,int frame_tx,int subframe_tx);
void nr_compute_srs_pos(lte_frame_type_t frameType,uint16_t isrs,uint16_t *psrsPeriodicity,uint16_t *psrsOffset);
/*@}*/
#endif
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+6529
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