From 4c7b185d92a4f34631c79dce176a31845759fe55 Mon Sep 17 00:00:00 2001 From: Laurent THOMAS Date: Mon, 8 Jan 2024 14:08:55 +0100 Subject: [PATCH] merge two reduntant and incoherent enums for rnti_type_t, make a macro to stringify properly instead of hardcoded side strings array --- common/utils/nr/nr_common.h | 31 + executables/nr-ue.c | 2 +- .../nfapi/public_inc/nfapi_nr_interface.h | 16 - .../NR_UE_TRANSPORT/nr_dlsch_demodulation.c | 2 +- .../PHY/NR_UE_TRANSPORT/nr_transport_ue.h | 3 +- openair1/PHY/defs_nr_UE.h | 48 +- openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 6 +- openair1/SCHED_NR_UE/harq_nr.c | 6 +- openair1/SCHED_NR_UE/phy_procedures_nr_ue.c | 7 +- openair1/SIMULATION/NR_PHY/dlsim.c | 10 +- .../NR_UE_PHY/unit_tests/src/harq_test.c | 2 +- openair2/LAYER2/NR_MAC_COMMON/nr_mac.h | 17 - openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 76 +- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h | 26 +- openair2/LAYER2/NR_MAC_UE/mac_extern.h | 25 +- openair2/LAYER2/NR_MAC_UE/mac_vars.c | 4 - .../NR_MAC_UE/nr_ue_dci_configuration.c | 38 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 205 ++--- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 5 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 36 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 25 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 21 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 844 +++++++++--------- .../LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c | 5 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 27 +- 26 files changed, 775 insertions(+), 714 deletions(-) diff --git a/common/utils/nr/nr_common.h b/common/utils/nr/nr_common.h index ea6c8b860e..7764b0ee8f 100644 --- a/common/utils/nr/nr_common.h +++ b/common/utils/nr/nr_common.h @@ -44,6 +44,37 @@ #define NR_NB_SC_PER_RB 12 #define NR_MAX_NUM_LCID 32 #define NR_MAX_NUM_QFI 64 +#define RNTI_NAMES /* see 38.321 Table 7.1-2 RNTI usage */ \ + R(TYPE_C_RNTI_) /* Cell RNTI */ \ + R(TYPE_CS_RNTI_) /* Configured Scheduling RNTI */ \ + R(TYPE_TC_RNTI_) /* Temporary C-RNTI */ \ + R(TYPE_P_RNTI_) /* Paging RNTI */ \ + R(TYPE_SI_RNTI_) /* System information RNTI */ \ + R(TYPE_RA_RNTI_) /* Random Access RNTI */ \ + R(TYPE_SP_CSI_RNTI_) /* Semipersistent CSI reporting on PUSCH */ \ + R(TYPE_SFI_RNTI_) /* Slot Format Indication on the given cell */ \ + R(TYPE_INT_RNTI_) /* Indication pre-emption in DL */ \ + R(TYPE_TPC_PUSCH_RNTI_) /* PUSCH power control */ \ + R(TYPE_TPC_PUCCH_RNTI_) /* PUCCH power control */ \ + R(TYPE_TPC_SRS_RNTI_) \ + R(TYPE_MCS_C_RNTI_) + +#define R(k) k , +typedef enum { RNTI_NAMES } nr_rnti_type_t; +#undef R + +#define R(k) \ + case k: \ + return #k; +static inline const char *rnti_types(nr_rnti_type_t rr) +{ + switch (rr) { + RNTI_NAMES + default: + return "Not existing RNTI type"; + } +} +#undef R typedef enum { nr_FR1 = 0, diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 9f1400ae47..f9eecf9076 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -613,7 +613,7 @@ nr_phy_data_t UE_dl_preprocessing(PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) uint64_t a=rdtsc_oai(); pbch_pdcch_processing(UE, proc, &phy_data); - if (phy_data.dlsch[0].active) { + if (phy_data.dlsch[0].active && phy_data.dlsch[0].rnti_type == TYPE_C_RNTI_) { // indicate to tx thread to wait for DLSCH decoding const int ack_nack_slot = (proc->nr_slot_rx + phy_data.dlsch[0].dlsch_config.k1_feedback) % UE->frame_parms.slots_per_frame; UE->tx_wait_for_dlsch[ack_nack_slot]++; diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h index 20c1e890bc..ad6a325848 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h @@ -239,22 +239,6 @@ typedef struct { nfapi_vendor_extension_tlv_t vendor_extension; } nfapi_nr_config_request_t; -typedef enum { - NFAPI_NR_RNTI_new = 0, - NFAPI_NR_RNTI_C, - NFAPI_NR_RNTI_RA, - NFAPI_NR_RNTI_P, - NFAPI_NR_RNTI_CS, - NFAPI_NR_RNTI_TC, - NFAPI_NR_RNTI_SP_CSI, - NFAPI_NR_RNTI_SI, - NFAPI_NR_RNTI_SFI, - NFAPI_NR_RNTI_INT, - NFAPI_NR_RNTI_TPC_PUSCH, - NFAPI_NR_RNTI_TPC_PUCCH, - NFAPI_NR_RNTI_TPC_SRS -} nfapi_nr_rnti_type_e; - typedef enum { NFAPI_NR_USS_FORMAT_0_0_AND_1_0, NFAPI_NR_USS_FORMAT_0_1_AND_1_1, diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c index 0f4bb266a7..390917885c 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c @@ -597,7 +597,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, } /* Check for PTRS bitmap and process it respectively */ - if((pduBitmap & 0x1) && (dlsch[0].rnti_type == _C_RNTI_)) { + if((pduBitmap & 0x1) && (dlsch[0].rnti_type == TYPE_C_RNTI_)) { nr_pdsch_ptrs_processing( ue, nbRx, ptrs_phase_per_slot, ptrs_re_per_slot, rx_size_symbol, rxdataF_comp, frame_parms, dlsch0_harq, dlsch1_harq, gNB_id, nr_slot_rx, symbol, (nb_rb_pdsch * 12), dlsch[0].rnti, dlsch); dl_valid_re[symbol-1] -= ptrs_re_per_slot[0][symbol]; diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h index b03764696f..0b2f7ba888 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h @@ -38,7 +38,6 @@ #include "nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h" #include "../NR_TRANSPORT/nr_transport_common_proto.h" - typedef enum { NEW_TRANSMISSION_HARQ, RETRANSMISSION_HARQ @@ -95,7 +94,7 @@ typedef struct { // UL number of harq processes uint8_t number_harq_processes_for_pusch; /// RNTI type - uint8_t rnti_type; + nr_rnti_type_t rnti_type; /// Cell ID int Nid_cell; /// bit mask of PT-RS ofdm symbol indicies diff --git a/openair1/PHY/defs_nr_UE.h b/openair1/PHY/defs_nr_UE.h index 0eb824406b..2aef2782ae 100644 --- a/openair1/PHY/defs_nr_UE.h +++ b/openair1/PHY/defs_nr_UE.h @@ -254,48 +254,16 @@ typedef struct { #define MAX_NR_DCI_DECODED_SLOT 10 // This value is not specified - - typedef enum { - _format_0_0_found=0, - _format_0_1_found=1, - _format_1_0_found=2, - _format_1_1_found=3, - _format_2_0_found=4, - _format_2_1_found=5, - _format_2_2_found=6, - _format_2_3_found=7 + _format_0_0_found = 0, + _format_0_1_found = 1, + _format_1_0_found = 2, + _format_1_1_found = 3, + _format_2_0_found = 4, + _format_2_1_found = 5, + _format_2_2_found = 6, + _format_2_3_found = 7 } format_found_t; -#define TOTAL_NBR_SCRAMBLED_VALUES 13 -#define _C_RNTI_ 0 -#define _CS_RNTI_ 1 -#define _NEW_RNTI_ 2 -#define _TC_RNTI_ 3 -#define _P_RNTI_ 4 -#define _SI_RNTI_ 5 -#define _RA_RNTI_ 6 -#define _SP_CSI_RNTI_ 7 -#define _SFI_RNTI_ 8 -#define _INT_RNTI_ 9 -#define _TPC_PUSCH_RNTI_ 10 -#define _TPC_PUCCH_RNTI_ 11 -#define _TPC_SRS_RNTI_ 12 -typedef enum { /* see 38.321 Table 7.1-2 RNTI usage */ - _c_rnti = _C_RNTI_, /* Cell RNTI */ - _cs_rnti = _CS_RNTI_, /* Configured Scheduling RNTI */ - _new_rnti = _NEW_RNTI_, /* ? */ - _tc_rnti = _TC_RNTI_, /* Temporary C-RNTI */ - _p_rnti = _P_RNTI_, /* Paging RNTI */ - _si_rnti = _SI_RNTI_, /* System information RNTI */ - _ra_rnti = _RA_RNTI_, /* Random Access RNTI */ - _sp_csi_rnti = _SP_CSI_RNTI_, /* Semipersistent CSI reporting on PUSCH */ - _sfi_rnti = _SFI_RNTI_, /* Slot Format Indication on the given cell */ - _int_rnti = _INT_RNTI_, /* Indication pre-emption in DL */ - _tpc_pusch_rnti = _TPC_PUSCH_RNTI_, /* PUSCH power control */ - _tpc_pucch_rnti = _TPC_PUCCH_RNTI_, /* PUCCH power control */ - _tpc_srs_rnti = _TPC_SRS_RNTI_ -} crc_scrambled_t; - #endif typedef struct { diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index 2e4cef8cb9..4272485c4b 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -429,7 +429,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ case FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH: { dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15; NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0]; - dlsch0->rnti_type = _RA_RNTI_; + dlsch0->rnti_type = TYPE_RA_RNTI_; dlsch0->dlsch_config = *dlsch_config_pdu; configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id, dl_config->dl_config_list[i].dlsch_config_pdu.rnti); @@ -437,7 +437,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ case FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH: { dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15; NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0]; - dlsch0->rnti_type = _SI_RNTI_; + dlsch0->rnti_type = TYPE_SI_RNTI_; dlsch0->dlsch_config = *dlsch_config_pdu; configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id, dl_config->dl_config_list[i].dlsch_config_pdu.rnti); @@ -445,7 +445,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ case FAPI_NR_DL_CONFIG_TYPE_DLSCH: { dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15; NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0]; - dlsch0->rnti_type = _C_RNTI_; + dlsch0->rnti_type = TYPE_C_RNTI_; dlsch0->dlsch_config = *dlsch_config_pdu; configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id, dl_config->dl_config_list[i].dlsch_config_pdu.rnti); diff --git a/openair1/SCHED_NR_UE/harq_nr.c b/openair1/SCHED_NR_UE/harq_nr.c index caf6898f88..f9c6440067 100644 --- a/openair1/SCHED_NR_UE/harq_nr.c +++ b/openair1/SCHED_NR_UE/harq_nr.c @@ -138,9 +138,9 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) void downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int dci_ndi, int rv, uint8_t rnti_type) { - if (rnti_type == _SI_RNTI_ || - rnti_type == _P_RNTI_ || - rnti_type == _RA_RNTI_) { + if (rnti_type == TYPE_SI_RNTI_ || + rnti_type == TYPE_P_RNTI_ || + rnti_type == TYPE_RA_RNTI_) { dl_harq->DLround = 0; dl_harq->status = ACTIVE; dl_harq->first_rx = 1; diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index 266a72b0fe..f8547ed5b6 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -737,15 +737,15 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, int ind_type = -1; switch(dlsch[0].rnti_type) { - case _RA_RNTI_: + case TYPE_RA_RNTI_: ind_type = FAPI_NR_RX_PDU_TYPE_RAR; break; - case _SI_RNTI_: + case TYPE_SI_RNTI_: ind_type = FAPI_NR_RX_PDU_TYPE_SIB; break; - case _C_RNTI_: + case TYPE_C_RNTI_: ind_type = FAPI_NR_RX_PDU_TYPE_DLSCH; break; @@ -829,7 +829,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ue->if_inst->dl_indication(&dl_indication); } - // DLSCH decoding finished! don't wait anymore const int ack_nack_slot = (proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame; send_slot_ind(ue->tx_resume_ind_fifo[ack_nack_slot], proc->nr_slot_rx); diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 812a2a59fb..30e84a8837 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -170,8 +170,14 @@ void nr_dlsim_preprocessor(module_id_t module_id, sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot); AssertFatal(sched_pdsch->time_domain_allocation >= 0,"Unable to find PDSCH time domain allocation in list\n"); - sched_pdsch->tda_info = get_dl_tda_info(current_BWP, sched_ctrl->search_space->searchSpaceType->present, sched_pdsch->time_domain_allocation, - NR_MIB__dmrs_TypeA_Position_pos2, 1, NR_RNTI_C, sched_ctrl->coreset->controlResourceSetId, false); + sched_pdsch->tda_info = get_dl_tda_info(current_BWP, + sched_ctrl->search_space->searchSpaceType->present, + sched_pdsch->time_domain_allocation, + NR_MIB__dmrs_TypeA_Position_pos2, + 1, + TYPE_C_RNTI_, + sched_ctrl->coreset->controlResourceSetId, + false); sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc, current_BWP, diff --git a/openair1/SIMULATION/NR_UE_PHY/unit_tests/src/harq_test.c b/openair1/SIMULATION/NR_UE_PHY/unit_tests/src/harq_test.c index dc182b2106..3099adb11a 100644 --- a/openair1/SIMULATION/NR_UE_PHY/unit_tests/src/harq_test.c +++ b/openair1/SIMULATION/NR_UE_PHY/unit_tests/src/harq_test.c @@ -56,7 +56,7 @@ int test_harq_downlink(PHY_VARS_NR_UE *phy_vars_ue) int gNB_id = 0; int harq_pid = 0; int ndi = 1; - uint8_t rnti_type = _C_RNTI_; + uint8_t rnti_type = TYPE_C_RNTI_; int number_steps = 5; int thread_number = 0; int TB_identifier = 0; diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h index 0df63710b2..a86835448d 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h @@ -451,23 +451,6 @@ typedef enum { NR_DCI_NONE } nr_dci_format_t; -typedef enum { - NR_RNTI_new = 0, - NR_RNTI_C, - NR_RNTI_RA, - NR_RNTI_P, - NR_RNTI_CS, - NR_RNTI_TC, - NR_RNTI_SP_CSI, - NR_RNTI_SI, - NR_RNTI_SFI, - NR_RNTI_INT, - NR_RNTI_TPC_PUSCH, - NR_RNTI_TPC_PUCCH, - NR_RNTI_TPC_SRS, - NR_RNTI_MCS_C, -} nr_rnti_type_t; - typedef enum channel_bandwidth_e { bw_5MHz = 0x1, bw_10MHz = 0x2, diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index 1080ee7faa..132bba2d0c 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -466,7 +466,11 @@ const uint8_t table_6_1_2_1_1_3[16][4] = { {0, 3, 0, 10} // row index 16 }; -NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type, int tda_index) +NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp, + int controlResourceSetId, + int ss_type, + nr_rnti_type_t rnti_type, + int tda_index) { NR_tda_info_t tda_info = {0}; NR_PUSCH_TimeDomainResourceAllocationList_t *tdalist = get_ul_tdalist(ul_bwp, controlResourceSetId, ss_type, rnti_type); @@ -604,8 +608,14 @@ NR_tda_info_t set_tda_info_from_list(NR_PDSCH_TimeDomainResourceAllocationList_t return tda_info; } -NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda_index, int dmrs_typeA_pos, - int mux_pattern, nr_rnti_type_t rnti_type, int coresetid, bool sib1) +NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, + int ss_type, + int tda_index, + int dmrs_typeA_pos, + int mux_pattern, + nr_rnti_type_t rnti_type, + int coresetid, + bool sib1) { NR_tda_info_t tda_info; bool normal_CP = true; @@ -614,7 +624,7 @@ NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda // implements Table 5.1.2.1.1-1 of 38.214 NR_PDSCH_TimeDomainResourceAllocationList_t *tdalist = get_dl_tdalist(dl_BWP, coresetid, ss_type, rnti_type); switch (rnti_type) { - case NR_RNTI_SI: + case TYPE_SI_RNTI_: if(sib1) { default_table_type_t table_type = get_default_table_type(mux_pattern); tda_info = get_info_from_tda_tables(table_type, tda_index, dmrs_typeA_pos, normal_CP); @@ -628,7 +638,7 @@ NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda } } break; - case NR_RNTI_P: + case TYPE_P_RNTI_: if(tdalist) tda_info = set_tda_info_from_list(tdalist, tda_index); else { @@ -636,11 +646,11 @@ NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda tda_info = get_info_from_tda_tables(table_type, tda_index, dmrs_typeA_pos, normal_CP); } break; - case NR_RNTI_C: - case NR_RNTI_CS: - case NR_RNTI_MCS_C: - case NR_RNTI_RA: - case NR_RNTI_TC: + case TYPE_C_RNTI_: + case TYPE_CS_RNTI_: + case TYPE_MCS_C_RNTI_: + case TYPE_RA_RNTI_: + case TYPE_TC_RNTI_: if(tdalist) tda_info = set_tda_info_from_list(tdalist, tda_index); else @@ -3227,21 +3237,29 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, return nbits; } -NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type) +NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, + int controlResourceSetId, + int ss_type, + nr_rnti_type_t rnti_type) { if (!DL_BWP) return NULL; // see table 5.1.2.1.1-1 in 38.214 - if ((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0) + if ((rnti_type == TYPE_CS_RNTI_ || rnti_type == TYPE_C_RNTI_ || rnti_type == TYPE_MCS_C_RNTI_) + && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0) && (DL_BWP->pdsch_Config && DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList)) return DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup; else return DL_BWP->tdaList_Common; } -NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type) +NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, + int controlResourceSetId, + int ss_type, + nr_rnti_type_t rnti_type) { - if ((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0) + if ((rnti_type == TYPE_CS_RNTI_ || rnti_type == TYPE_C_RNTI_ || rnti_type == TYPE_MCS_C_RNTI_) + && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0) && (UL_BWP->pusch_Config && UL_BWP->pusch_Config->pusch_TimeDomainAllocationList)) return UL_BWP->pusch_Config->pusch_TimeDomainAllocationList->choice.setup; else @@ -3795,17 +3813,12 @@ uint8_t get_pdsch_mcs_table(long *mcs_Table, int dci_format, int rnti_type, int // Set downlink MCS table (Semi-persistent scheduling ignored for now) uint8_t mcsTableIdx = 0; // default value - if (mcs_Table && - *mcs_Table == NR_PDSCH_Config__mcs_Table_qam256 && - dci_format == NR_DL_DCI_FORMAT_1_1 && - rnti_type == NR_RNTI_C) + if (mcs_Table && *mcs_Table == NR_PDSCH_Config__mcs_Table_qam256 && dci_format == NR_DL_DCI_FORMAT_1_1 && rnti_type == TYPE_C_RNTI_) mcsTableIdx = 1; - else if (rnti_type != NR_RNTI_MCS_C && - mcs_Table && - *mcs_Table == NR_PDSCH_Config__mcs_Table_qam64LowSE && - ss_type == NR_SearchSpace__searchSpaceType_PR_ue_Specific) + else if (rnti_type != TYPE_MCS_C_RNTI_ && mcs_Table && *mcs_Table == NR_PDSCH_Config__mcs_Table_qam64LowSE + && ss_type == NR_SearchSpace__searchSpaceType_PR_ue_Specific) mcsTableIdx = 2; - else if (rnti_type == NR_RNTI_MCS_C) + else if (rnti_type == TYPE_MCS_C_RNTI_) mcsTableIdx = 2; LOG_D(NR_MAC,"DL MCS Table Index: %d\n", mcsTableIdx); @@ -3823,23 +3836,20 @@ uint8_t get_pusch_mcs_table(long *mcs_Table, // implementing 6.1.4.1 in 38.214 if (mcs_Table != NULL) { - if (config_grant || (rnti_type == NR_RNTI_CS)) { + if (config_grant || (rnti_type == TYPE_CS_RNTI_)) { if (*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256) return 1; else return (2 + (is_tp << 1)); - } - else { - if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256) && - (dci_format == NR_UL_DCI_FORMAT_0_1) && - ((rnti_type == NR_RNTI_C ) || (rnti_type == NR_RNTI_SP_CSI))) + } else { + if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256) && (dci_format == NR_UL_DCI_FORMAT_0_1) + && ((rnti_type == TYPE_C_RNTI_) || (rnti_type == TYPE_SP_CSI_RNTI_))) return 1; // TODO take into account UE configuration - if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam64LowSE) && - (target_ss == NR_SearchSpace__searchSpaceType_PR_ue_Specific) && - ((rnti_type == NR_RNTI_C ) || (rnti_type == NR_RNTI_SP_CSI))) + if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam64LowSE) && (target_ss == NR_SearchSpace__searchSpaceType_PR_ue_Specific) + && ((rnti_type == TYPE_C_RNTI_) || (rnti_type == TYPE_SP_CSI_RNTI_))) return (2 + (is_tp << 1)); - if (rnti_type == NR_RNTI_MCS_C) + if (rnti_type == TYPE_MCS_C_RNTI_) return (2 + (is_tp << 1)); } } diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h index 315cc9837b..e84a3bb468 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h @@ -84,14 +84,30 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, const uint8_t *nrOfLayers, uint32_t *val); -NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type); +NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, + int controlResourceSetId, + int ss_type, + nr_rnti_type_t rnti_type); -NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type); +NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, + int controlResourceSetId, + int ss_type, + nr_rnti_type_t rnti_type); -NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type, int tda_index); +NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp, + int controlResourceSetId, + int ss_type, + nr_rnti_type_t rnti_type, + int tda_index); -NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda_index, int dmrs_typeA_pos, - int mux_pattern, nr_rnti_type_t rnti_type, int coresetid, bool sib1); +NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, + int ss_type, + int tda_index, + int dmrs_typeA_pos, + int mux_pattern, + nr_rnti_type_t rnti_type, + int coresetid, + bool sib1); uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP, const NR_UE_UL_BWP_t *UL_BWP, diff --git a/openair2/LAYER2/NR_MAC_UE/mac_extern.h b/openair2/LAYER2/NR_MAC_UE/mac_extern.h index 132e08c7f1..3019ba5219 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_extern.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_extern.h @@ -68,17 +68,14 @@ extern const uint16_t table_7_2_1[16]; extern dci_pdu_rel15_t *def_dci_pdu_rel15; -extern void mac_rlc_data_ind(const module_id_t module_idP, - const rnti_t rntiP, - const eNB_index_t eNB_index, - const frame_t frameP, - const eNB_flag_t enb_flagP, - const MBMS_flag_t MBMS_flagP, - const logical_chan_id_t channel_idP, - char *buffer_pP, - const tb_size_t tb_sizeP, - num_tb_t num_tbP, - crc_t *crcs_pP); - -extern const char *const rnti_types[]; -extern const char *const dci_formats[]; +extern void mac_rlc_data_ind(const module_id_t module_idP, + const rnti_t rntiP, + const eNB_index_t eNB_index, + const frame_t frameP, + const eNB_flag_t enb_flagP, + const MBMS_flag_t MBMS_flagP, + const logical_chan_id_t channel_idP, + char *buffer_pP, + const tb_size_t tb_sizeP, + num_tb_t num_tbP, + crc_t *crcs_pP); diff --git a/openair2/LAYER2/NR_MAC_UE/mac_vars.c b/openair2/LAYER2/NR_MAC_UE/mac_vars.c index 43a3acf9eb..20abda978d 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_vars.c +++ b/openair2/LAYER2/NR_MAC_UE/mac_vars.c @@ -32,10 +32,6 @@ #include -const char* const rnti_types[] = - {"RNTI_new", "RNTI_C", "RNTI_RA", "NR_RNTI_P", "NR_RNTI_CS", "NR_RNTI_TC", "NR_RNTI_SP_CSI", "NR_RNTI_SI"}; -const char* const dci_formats[] = {"1_0", "1_1", "2_0", "2_1", "2_2", "2_3", "0_0", "0_1"}; - // table_7_3_1_1_2_2_3_4_5 contains values for number of layers and precoding information for tables 7.3.1.1.2-2/3/4/5 from TS 38.212 subclause 7.3.1.1.2 // the first 6 columns contain table 7.3.1.1.2-2: Precoding information and number of layers, for 4 antenna ports, if transformPrecoder=disabled and maxRank = 2 or 3 or 4 // next six columns contain table 7.3.1.1.2-3: Precoding information and number of layers for 4 antenna ports, if transformPrecoder= enabled, or if transformPrecoder=disabled and maxRank = 1 diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c index 1bd991f7c5..6a29028618 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c @@ -154,9 +154,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, rel15->coreset.pdcch_dmrs_scrambling_id = mac->physCellId; } - rel15->num_dci_options = (mac->ra.ra_state == WAIT_RAR || - rnti_type == NR_RNTI_SI) ? - 1 : 2; + rel15->num_dci_options = (mac->ra.ra_state == WAIT_RAR || rnti_type == TYPE_SI_RNTI_) ? 1 : 2; if (ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) { if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == @@ -234,7 +232,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, int sps = 0; switch(rnti_type) { - case NR_RNTI_C: + case TYPE_C_RNTI_: // we use DL BWP dedicated sps = current_DL_BWP->cyclicprefix ? 12 : 14; // for SPS=14 8 MSBs in positions 13 down to 6 @@ -242,27 +240,27 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, rel15->rnti = mac->crnti; rel15->SubcarrierSpacing = current_DL_BWP->scs; break; - case NR_RNTI_RA: + case TYPE_RA_RNTI_: // we use the initial DL BWP sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12; monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); rel15->rnti = mac->ra.ra_rnti; rel15->SubcarrierSpacing = current_DL_BWP->scs; break; - case NR_RNTI_P: + case TYPE_P_RNTI_: break; - case NR_RNTI_CS: + case TYPE_CS_RNTI_: break; - case NR_RNTI_TC: + case TYPE_TC_RNTI_: // we use the initial DL BWP sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12; monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); rel15->rnti = mac->ra.t_crnti; rel15->SubcarrierSpacing = current_DL_BWP->scs; break; - case NR_RNTI_SP_CSI: + case TYPE_SP_CSI_RNTI_: break; - case NR_RNTI_SI: + case TYPE_SI_RNTI_: sps = 14; // for SPS=14 8 MSBs in positions 13 down to 6 monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); @@ -271,15 +269,15 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, if(mac->frequency_range == FR2) rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2; break; - case NR_RNTI_SFI: + case TYPE_SFI_RNTI_: break; - case NR_RNTI_INT: + case TYPE_INT_RNTI_: break; - case NR_RNTI_TPC_PUSCH: + case TYPE_TPC_PUSCH_RNTI_: break; - case NR_RNTI_TPC_PUCCH: + case TYPE_TPC_PUCCH_RNTI_: break; - case NR_RNTI_TPC_SRS: + case TYPE_TPC_SRS_RNTI_: break; default: break; @@ -492,7 +490,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl fill_searchSpaceZero(pdcch_config->search_space_zero, slots_per_frame, &mac->type0_PDCCH_CSS_config); if (is_ss_monitor_occasion(frame, slot, slots_per_frame, pdcch_config->search_space_zero)) { LOG_D(NR_MAC, "Monitoring DCI for SIB1 in frame %d slot %d\n", frame, slot); - config_dci_pdu(mac, dl_config, NR_RNTI_SI, slot, pdcch_config->search_space_zero); + config_dci_pdu(mac, dl_config, TYPE_SI_RNTI_, slot, pdcch_config->search_space_zero); } } if (mac->get_otherSI) { @@ -503,14 +501,14 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl // TODO configure SI-window if (monitior_dci_for_other_SI(mac, ss, slots_per_frame, frame, slot)) { LOG_D(NR_MAC, "Monitoring DCI for other SIs in frame %d slot %d\n", frame, slot); - config_dci_pdu(mac, dl_config, NR_RNTI_SI, slot, ss); + config_dci_pdu(mac, dl_config, TYPE_SI_RNTI_, slot, ss); } } if (mac->state == UE_PERFORMING_RA && mac->ra.ra_state >= WAIT_RAR) { // if RA is ongoing use RA search space if (is_ss_monitor_occasion(frame, slot, slots_per_frame, pdcch_config->ra_SS)) { - int rnti_type = mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC; + int rnti_type = mac->ra.ra_state == WAIT_RAR ? TYPE_RA_RNTI_ : TYPE_TC_RNTI_; config_dci_pdu(mac, dl_config, rnti_type, slot, pdcch_config->ra_SS); } } @@ -518,7 +516,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl for (int i = 0; i < pdcch_config->list_SS.count; i++) { NR_SearchSpace_t *ss = pdcch_config->list_SS.array[i]; if (is_ss_monitor_occasion(frame, slot, slots_per_frame, ss)) - config_dci_pdu(mac, dl_config, NR_RNTI_C, slot, ss); + config_dci_pdu(mac, dl_config, TYPE_C_RNTI_, slot, ss); } if (pdcch_config->list_SS.count == 0 && pdcch_config->ra_SS) { // If the UE has not been provided a Type3-PDCCH CSS set or a USS set and @@ -526,7 +524,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl // the UE monitors PDCCH candidates for DCI format 0_0 and DCI format 1_0 // with CRC scrambled by the C-RNTI in the Type1-PDCCH CSS set if (is_ss_monitor_occasion(frame, slot, slots_per_frame, pdcch_config->ra_SS)) - config_dci_pdu(mac, dl_config, NR_RNTI_C, slot, pdcch_config->ra_SS); + config_dci_pdu(mac, dl_config, TYPE_C_RNTI_, slot, pdcch_config->ra_SS); } } } diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 9118fce36a..c29d17d287 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -162,23 +162,23 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti) { RA_config_t *ra = &mac->ra; - int rnti_type; + nr_rnti_type_t rnti_type; if (rnti == ra->ra_rnti) { - rnti_type = NR_RNTI_RA; + rnti_type = TYPE_RA_RNTI_; } else if (rnti == ra->t_crnti && (ra->ra_state == WAIT_RAR || ra->ra_state == WAIT_CONTENTION_RESOLUTION) ) { - rnti_type = NR_RNTI_TC; + rnti_type = TYPE_TC_RNTI_; } else if (rnti == mac->crnti) { - rnti_type = NR_RNTI_C; + rnti_type = TYPE_C_RNTI_; } else if (rnti == 0xFFFE) { - rnti_type = NR_RNTI_P; + rnti_type = TYPE_P_RNTI_; } else if (rnti == 0xFFFF) { - rnti_type = NR_RNTI_SI; + rnti_type = TYPE_SI_RNTI_; } else { AssertFatal(1 == 0, "In %s: Not identified/handled rnti %d \n", __FUNCTION__, rnti); } - LOG_D(MAC, "In %s: returning rnti_type %s \n", __FUNCTION__, rnti_types[rnti_type]); + LOG_D(MAC, "Returning rnti_type %s \n", rnti_types(rnti_type)); return rnti_type; } @@ -1153,6 +1153,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, dci_pdu_rel15_t *dci, fapi_nr_dci_indication_pdu_t *dci_ind) { + const char *dci_formats[] = {"1_0", "1_1", "2_0", "2_1", "2_2", "2_3", "0_0", "0_1"}; LOG_D(MAC, "Processing received DCI format %s\n", dci_formats[dci_ind->dci_format]); switch (dci_ind->dci_format) { @@ -2851,11 +2852,11 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, case NR_DL_DCI_FORMAT_1_0: switch(rnti_type) { - case NR_RNTI_RA: - // Freq domain assignment - fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); - pos=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = *dci_pdu>>(dci_size-pos)&((1<> 1)); + pos = fsize; + dci_pdu_rel15->frequency_domain_assignment.val = *dci_pdu >> (dci_size - pos) & ((1 << fsize) - 1); #ifdef DEBUG_EXTRACT_DCI LOG_D(MAC,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,N_RB,dci_size-pos,*dci_pdu); #endif @@ -2886,17 +2887,17 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, #endif break; - case NR_RNTI_C: + case TYPE_C_RNTI_: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + // Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu >> (dci_size - pos)) & 1; - //switch to DCI_0_0 - if (dci_pdu_rel15->format_indicator == 0) { - dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][NR_UL_DCI_FORMAT_0_0]; - return 2 + nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot); - } + // switch to DCI_0_0 + if (dci_pdu_rel15->format_indicator == 0) { + dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][NR_UL_DCI_FORMAT_0_0]; + return 2 + nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot); + } #ifdef DEBUG_EXTRACT_DCI LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu); #endif @@ -3011,83 +3012,83 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, } //end else break; - case NR_RNTI_P: - /* - // Short Messages Indicator  E2 bits - for (int i=0; i<2; i++) - dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_size-pos++); - // Short Messages  E8 bits - for (int i=0; i<8; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages>>(7-i))&1)<<(dci_size-pos++); - // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++); - // Time domain assignment 4 bit - for (int i=0; i<4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++); - // VRB to PRB mapping 1 bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); - // MCS 5 bit - for (int i=0; i<5; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); - - // TB scaling 2 bit - for (int i=0; i<2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_size-pos++); - */ - - break; - - case NR_RNTI_SI: - // Freq domain assignment 0-16 bit - fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<short_messages_indicator>>(1-i))&1)<<(dci_size-pos++); + // Short Messages  E8 bits + for (int i=0; i<8; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages>>(7-i))&1)<<(dci_size-pos++); + // Freq domain assignment 0-16 bit + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++); + // Time domain assignment 4 bit + for (int i=0; i<4; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++); + // VRB to PRB mapping 1 bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); + // MCS 5 bit + for (int i=0; i<5; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); - // Time domain assignment 4 bit - pos+=4; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; + // TB scaling 2 bit + for (int i=0; i<2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_size-pos++); + */ - // VRB to PRB mapping 1 bit - pos++; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; + break; - // MCS 5bit //bit over 32, so dci_pdu ++ - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + case TYPE_SI_RNTI_: + // Freq domain assignment 0-16 bit + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); + pos += fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu >> (dci_size - pos)) & ((1 << fsize) - 1); - // Redundancy version 2 bit - pos+=2; - dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; + // Time domain assignment 4 bit + pos += 4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu >> (dci_size - pos)) & 0xf; - // System information indicator 1 bit - pos++; - dci_pdu_rel15->system_info_indicator = (*dci_pdu>>(dci_size-pos))&0x1; + // VRB to PRB mapping 1 bit + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu >> (dci_size - pos)) & 0x1; - LOG_D(MAC,"N_RB = %i\n", N_RB); - LOG_D(MAC,"dci_size = %i\n", dci_size); - LOG_D(MAC,"fsize = %i\n", fsize); - LOG_D(MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); - LOG_D(MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); - LOG_D(MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); - LOG_D(MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); - LOG_D(MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(MAC,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); + // MCS 5bit //bit over 32, so dci_pdu ++ + pos += 5; + dci_pdu_rel15->mcs = (*dci_pdu >> (dci_size - pos)) & 0x1f; - break; - - case NR_RNTI_TC: + // Redundancy version 2 bit + pos += 2; + dci_pdu_rel15->rv = (*dci_pdu >> (dci_size - pos)) & 3; - // indicating a DL DCI format 1bit - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + // System information indicator 1 bit + pos++; + dci_pdu_rel15->system_info_indicator = (*dci_pdu >> (dci_size - pos)) & 0x1; - //switch to DCI_0_0 - if (dci_pdu_rel15->format_indicator == 0) { - dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][NR_UL_DCI_FORMAT_0_0]; - return 2 + nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot); - } + LOG_D(MAC, "N_RB = %i\n", N_RB); + LOG_D(MAC, "dci_size = %i\n", dci_size); + LOG_D(MAC, "fsize = %i\n", fsize); + LOG_D(MAC, "dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(MAC, "dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(MAC, "dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(MAC, "dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(MAC, "dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(MAC, "dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); + + break; + + case TYPE_TC_RNTI_: + + // indicating a DL DCI format 1bit + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu >> (dci_size - pos)) & 1; + + // switch to DCI_0_0 + if (dci_pdu_rel15->format_indicator == 0) { + dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][NR_UL_DCI_FORMAT_0_0]; + return 2 + nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot); + } // Freq domain assignment 0-16 bit fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); @@ -3156,10 +3157,10 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, case NR_UL_DCI_FORMAT_0_0: switch(rnti_type) { - case NR_RNTI_C: - //Identifier for DCI formats + case TYPE_C_RNTI_: + // Identifier for DCI formats pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + dci_pdu_rel15->format_indicator = (*dci_pdu >> (dci_size - pos)) & 1; #ifdef DEBUG_EXTRACT_DCI LOG_D(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); #endif @@ -3219,11 +3220,11 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); */ break; - - case NR_RNTI_TC: - //Identifier for DCI formats + + case TYPE_TC_RNTI_: + // Identifier for DCI formats pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + dci_pdu_rel15->format_indicator = (*dci_pdu >> (dci_size - pos)) & 1; #ifdef DEBUG_EXTRACT_DCI LOG_I(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); #endif @@ -3290,10 +3291,10 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, case NR_DL_DCI_FORMAT_1_1: switch(rnti_type) { - case NR_RNTI_C: - //Identifier for DCI formats + case TYPE_C_RNTI_: + // Identifier for DCI formats pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + dci_pdu_rel15->format_indicator = (*dci_pdu >> (dci_size - pos)) & 1; if (dci_pdu_rel15->format_indicator == 0) return 1; // discard dci, format indicator not corresponding to dci_format // Carrier indicator @@ -3380,7 +3381,7 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, case NR_UL_DCI_FORMAT_0_1: switch(rnti_type) { - case NR_RNTI_C: + case TYPE_C_RNTI_: //Identifier for DCI formats pos++; dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; @@ -4074,6 +4075,8 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, int pdu_id) case 7: ra->Msg3_TPC = 8; break; + default: + LOG_E(NR_PHY, "RAR impossible msg3 TPC\n"); } // MCS rar_grant.mcs = (unsigned char) (rar->UL_GRANT_4 >> 4); @@ -4122,7 +4125,7 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, int pdu_id) NR_tda_info_t tda_info = get_ul_tda_info(current_UL_BWP, *pdcch_config->ra_SS->controlResourceSetId, pdcch_config->ra_SS->searchSpaceType->present, - NR_RNTI_RA, + TYPE_RA_RNTI_, rar_grant.Msg3_t_alloc); if (tda_info.nrOfSymbols == 0) { LOG_E(MAC, "Cannot schedule Msg3. Something wrong in TDA information\n"); diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 75e959f6cc..bf7703fa6d 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -695,12 +695,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, } } - LOG_D(NR_MAC, "Received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n", + LOG_D(NR_MAC, + "Received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n", pusch_config_pdu->rb_start, pusch_config_pdu->rb_size, pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, - rnti_types[rnti_type]); + rnti_types(rnti_type)); pusch_config_pdu->ul_dmrs_symb_pos = l_prime_mask; pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 425782cddc..f20d97258e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -857,7 +857,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP, dci_pdu, &uldci_payload, NR_UL_DCI_FORMAT_0_0, - NR_RNTI_TC, + TYPE_TC_RNTI_, ul_bwp->bwp_id, ss, coreset, @@ -1215,8 +1215,14 @@ static void nr_generate_Msg2(module_id_t module_idP, // Calculate number of symbols int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP); int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1; - NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, time_domain_assignment, - scc->dmrs_TypeA_Position, mux_pattern, NR_RNTI_RA, coresetid, false); + NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, + ss->searchSpaceType->present, + time_domain_assignment, + scc->dmrs_TypeA_Position, + mux_pattern, + TYPE_RA_RNTI_, + coresetid, + false); uint16_t *vrb_map = cc[CC_id].vrb_map; for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) { @@ -1378,9 +1384,10 @@ static void nr_generate_Msg2(module_id_t module_idP, dci_payload.tb_scaling); LOG_D(NR_MAC, - "[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n", + "[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d " + "n_symb %d\n", pdcch_pdu_rel15->dci_pdu[0].RNTI, - NR_RNTI_RA, + TYPE_RA_RNTI_, NR_DL_DCI_FORMAT_1_0, *(unsigned long long *)pdcch_pdu_rel15->FreqDomainResource, pdcch_pdu_rel15->StartSymbolIndex, @@ -1392,7 +1399,7 @@ static void nr_generate_Msg2(module_id_t module_idP, &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], &dci_payload, NR_DL_DCI_FORMAT_1_0, - NR_RNTI_RA, + TYPE_RA_RNTI_, dl_bwp->bwp_id, ss, coreset, @@ -1605,9 +1612,10 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac, dci_payload.pdsch_to_harq_feedback_timing_indicator.val); LOG_D(NR_MAC, - "[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d, BWPsize %d\n", + "[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d " + "n_symb %d, BWPsize %d\n", pdcch_pdu_rel15->dci_pdu[0].RNTI, - NR_RNTI_TC, + TYPE_TC_RNTI_, NR_DL_DCI_FORMAT_1_0, (unsigned long long)pdcch_pdu_rel15->FreqDomainResource, pdcch_pdu_rel15->StartSymbolIndex, @@ -1620,7 +1628,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac, &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], &dci_payload, NR_DL_DCI_FORMAT_1_0, - NR_RNTI_TC, + TYPE_TC_RNTI_, dl_bwp->bwp_id, ss, coreset, @@ -1731,8 +1739,14 @@ static void nr_generate_Msg4(module_id_t module_idP, uint8_t time_domain_assignment = get_dl_tda(nr_mac, scc, slotP); int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1; - NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, time_domain_assignment, - scc->dmrs_TypeA_Position, mux_pattern, NR_RNTI_TC, coreset->controlResourceSetId, false); + NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp, + ss->searchSpaceType->present, + time_domain_assignment, + scc->dmrs_TypeA_Position, + mux_pattern, + TYPE_TC_RNTI_, + coreset->controlResourceSetId, + false); NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc, dl_bwp, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 8227a78e01..624ee6d243 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -492,7 +492,7 @@ static void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, dci_payload.dmrs_sequence_initialization.val = pdsch_pdu_rel15->SCID; int dci_format = NR_DL_DCI_FORMAT_1_0; - int rnti_type = NR_RNTI_SI; + int rnti_type = TYPE_SI_RNTI_; fill_dci_pdu_rel15(NULL, NULL, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 7d525e3894..b3a4396410 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -443,8 +443,14 @@ static bool allocate_dl_retransmission(module_id_t module_id, /* Check first whether the old TDA can be reused * this helps allocate retransmission when TDA changes (e.g. new nrOfSymbols > old nrOfSymbols) */ - NR_tda_info_t temp_tda = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, tda, - scc->dmrs_TypeA_Position, 1, NR_RNTI_C, coresetid, false); + NR_tda_info_t temp_tda = get_dl_tda_info(dl_bwp, + sched_ctrl->search_space->searchSpaceType->present, + tda, + scc->dmrs_TypeA_Position, + 1, + TYPE_C_RNTI_, + coresetid, + false); bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == temp_tda.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= temp_tda.nrOfSymbols); LOG_D(NR_MAC, "[UE %x] %s old TDA, %s number of layers\n", @@ -757,8 +763,14 @@ static void pf_dl(module_id_t module_id, AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n"); const int coresetid = sched_ctrl->coreset->controlResourceSetId; - sched_pdsch->tda_info = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, sched_pdsch->time_domain_allocation, - scc->dmrs_TypeA_Position, 1, NR_RNTI_C, coresetid, false); + sched_pdsch->tda_info = get_dl_tda_info(dl_bwp, + sched_ctrl->search_space->searchSpaceType->present, + sched_pdsch->time_domain_allocation, + scc->dmrs_TypeA_Position, + 1, + TYPE_C_RNTI_, + coresetid, + false); NR_tda_info_t *tda_info = &sched_pdsch->tda_info; @@ -833,7 +845,8 @@ static void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_ const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot); int startSymbolIndex, nrOfSymbols; const int coresetid = sched_ctrl->coreset->controlResourceSetId; - const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = get_dl_tdalist(current_BWP, coresetid, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C); + const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = + get_dl_tdalist(current_BWP, coresetid, sched_ctrl->search_space->searchSpaceType->present, TYPE_C_RNTI_); AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count); const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); @@ -1185,7 +1198,7 @@ void nr_schedule_ue_spec(module_id_t module_id, dci_payload.tpc, pucch->timing_indicator); - const int rnti_type = NR_RNTI_C; + const int rnti_type = TYPE_C_RNTI_; fill_dci_pdu_rel15(&UE->sc_info, current_BWP, &UE->current_UL_BWP, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 34b9911847..a604e13c25 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -61,8 +61,14 @@ void nr_preprocessor_phytest(module_id_t module_id, const int CC_id = 0; const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot); - NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, tda, - scc->dmrs_TypeA_Position, 1, NR_RNTI_C, sched_ctrl->coreset->controlResourceSetId, false); + NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, + sched_ctrl->search_space->searchSpaceType->present, + tda, + scc->dmrs_TypeA_Position, + 1, + TYPE_C_RNTI_, + sched_ctrl->coreset->controlResourceSetId, + false); sched_ctrl->sched_pdsch.tda_info = tda_info; sched_ctrl->sched_pdsch.time_domain_allocation = tda; @@ -210,7 +216,10 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP; const int mu = ul_bwp->scs; - NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C); + NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(ul_bwp, + sched_ctrl->coreset->controlResourceSetId, + sched_ctrl->search_space->searchSpaceType->present, + TYPE_C_RNTI_); const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot); if (temp_tda < 0) return false; @@ -245,7 +254,11 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ else rbSize = target_ul_bw; - NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, tda); + NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, + sched_ctrl->coreset->controlResourceSetId, + sched_ctrl->search_space->searchSpaceType->present, + TYPE_C_RNTI_, + tda); sched_ctrl->sched_pusch.tda_info = tda_info; const int buffer_index = ul_buffer_index(sched_frame, sched_slot, mu, nr_mac->vrb_map_UL_size); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index d2526c6c60..89ac444e63 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1206,441 +1206,461 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo, switch (dci_format) { case NR_DL_DCI_FORMAT_1_0: switch (rnti_type) { - case NR_RNTI_RA: - // Freq domain assignment - fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); - pos = fsize; - *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos)); - LOG_D(NR_MAC, - "RA_RNTI, size %d frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n", - dci_size,dci_pdu_rel15->frequency_domain_assignment.val, - fsize, - N_RB, - dci_size - pos, - *dci_pdu); - // Time domain assignment - pos += 4; - *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos)); - LOG_D(NR_MAC, - "time-domain assignment %d (4 bits)=> %d (0x%lx)\n", - dci_pdu_rel15->time_domain_assignment.val, - dci_size - pos, - *dci_pdu); - // VRB to PRB mapping - pos++; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 0x1) << (dci_size - pos); - LOG_D(NR_MAC, - "vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n", - dci_pdu_rel15->vrb_to_prb_mapping.val, - dci_size - pos, - *dci_pdu); - // MCS - pos += 5; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); - LOG_D(NR_MAC, "mcs %d (5 bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, dci_size - pos, *dci_pdu); - // TB scaling - pos += 2; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling & 0x3) << (dci_size - pos); - LOG_D(NR_MAC, "tb_scaling %d (2 bits)=> %d (0x%lx)\n", dci_pdu_rel15->tb_scaling, dci_size - pos, *dci_pdu); - break; - - case NR_RNTI_C: - // indicating a DL DCI format 1bit - pos++; - *dci_pdu |= ((uint64_t)1) << (dci_size - pos); - LOG_D(NR_MAC, - "DCI1_0 (size %d): Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n", - dci_size, - dci_pdu_rel15->format_indicator, - 1, - N_RB, - dci_size - pos, - *dci_pdu); - // Freq domain assignment (275rb >> fsize = 16) - fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); - pos += fsize; - *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos)); - LOG_D(NR_MAC, - "Freq domain assignment %d (%d bits)=> %d (0x%lx)\n", - dci_pdu_rel15->frequency_domain_assignment.val, - fsize, - dci_size - pos, - *dci_pdu); - uint16_t is_ra = 1; - for (int i = 0; i < fsize; i++) { - if (!((dci_pdu_rel15->frequency_domain_assignment.val >> i) & 1)) { - is_ra = 0; - break; - } - } - if (is_ra) { // fsize are all 1 38.212 p86 - // ra_preamble_index 6 bits - pos += 6; - *dci_pdu |= ((dci_pdu_rel15->ra_preamble_index & 0x3f) << (dci_size - pos)); - // UL/SUL indicator 1 bit - pos++; - *dci_pdu |= (dci_pdu_rel15->ul_sul_indicator.val & 1) << (dci_size - pos); - // SS/PBCH index 6 bits - pos += 6; - *dci_pdu |= ((dci_pdu_rel15->ss_pbch_index & 0x3f) << (dci_size - pos)); - // prach_mask_index 4 bits - pos += 4; - *dci_pdu |= ((dci_pdu_rel15->prach_mask_index & 0xf) << (dci_size - pos)); - } else { - // Time domain assignment 4bit - pos += 4; - *dci_pdu |= ((dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos)); + case TYPE_RA_RNTI_: + // Freq domain assignment + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); + pos = fsize; + *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos)); LOG_D(NR_MAC, - "Time domain assignment %d (%d bits)=> %d (0x%lx)\n", + "RA_RNTI, size %d frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n", + dci_size, + dci_pdu_rel15->frequency_domain_assignment.val, + fsize, + N_RB, + dci_size - pos, + *dci_pdu); + // Time domain assignment + pos += 4; + *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos)); + LOG_D(NR_MAC, + "time-domain assignment %d (4 bits)=> %d (0x%lx)\n", dci_pdu_rel15->time_domain_assignment.val, - 4, dci_size - pos, *dci_pdu); - // VRB to PRB mapping 1bit + // VRB to PRB mapping pos++; - *dci_pdu |= (dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos); + *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 0x1) << (dci_size - pos); LOG_D(NR_MAC, - "VRB to PRB %d (%d bits)=> %d (0x%lx)\n", + "vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n", dci_pdu_rel15->vrb_to_prb_mapping.val, - 1, dci_size - pos, *dci_pdu); - // MCS 5bit //bit over 32, so dci_pdu ++ + // MCS pos += 5; - *dci_pdu |= (dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); - LOG_D(NR_MAC, "MCS %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, 5, dci_size - pos, *dci_pdu); - // New data indicator 1bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); + LOG_D(NR_MAC, "mcs %d (5 bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, dci_size - pos, *dci_pdu); + // TB scaling + pos += 2; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling & 0x3) << (dci_size - pos); + LOG_D(NR_MAC, "tb_scaling %d (2 bits)=> %d (0x%lx)\n", dci_pdu_rel15->tb_scaling, dci_size - pos, *dci_pdu); + break; + + case TYPE_C_RNTI_: + // indicating a DL DCI format 1bit pos++; - *dci_pdu |= (dci_pdu_rel15->ndi & 1) << (dci_size - pos); - LOG_D(NR_MAC, "NDI %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->ndi, 1, dci_size - pos, *dci_pdu); + *dci_pdu |= ((uint64_t)1) << (dci_size - pos); + LOG_D(NR_MAC, + "DCI1_0 (size %d): Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n", + dci_size, + dci_pdu_rel15->format_indicator, + 1, + N_RB, + dci_size - pos, + *dci_pdu); + // Freq domain assignment (275rb >> fsize = 16) + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); + pos += fsize; + *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos)); + LOG_D(NR_MAC, + "Freq domain assignment %d (%d bits)=> %d (0x%lx)\n", + dci_pdu_rel15->frequency_domain_assignment.val, + fsize, + dci_size - pos, + *dci_pdu); + uint16_t is_ra = 1; + for (int i = 0; i < fsize; i++) { + if (!((dci_pdu_rel15->frequency_domain_assignment.val >> i) & 1)) { + is_ra = 0; + break; + } + } + if (is_ra) { // fsize are all 1 38.212 p86 + // ra_preamble_index 6 bits + pos += 6; + *dci_pdu |= ((dci_pdu_rel15->ra_preamble_index & 0x3f) << (dci_size - pos)); + // UL/SUL indicator 1 bit + pos++; + *dci_pdu |= (dci_pdu_rel15->ul_sul_indicator.val & 1) << (dci_size - pos); + // SS/PBCH index 6 bits + pos += 6; + *dci_pdu |= ((dci_pdu_rel15->ss_pbch_index & 0x3f) << (dci_size - pos)); + // prach_mask_index 4 bits + pos += 4; + *dci_pdu |= ((dci_pdu_rel15->prach_mask_index & 0xf) << (dci_size - pos)); + } else { + // Time domain assignment 4bit + pos += 4; + *dci_pdu |= ((dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos)); + LOG_D(NR_MAC, + "Time domain assignment %d (%d bits)=> %d (0x%lx)\n", + dci_pdu_rel15->time_domain_assignment.val, + 4, + dci_size - pos, + *dci_pdu); + // VRB to PRB mapping 1bit + pos++; + *dci_pdu |= (dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos); + LOG_D(NR_MAC, + "VRB to PRB %d (%d bits)=> %d (0x%lx)\n", + dci_pdu_rel15->vrb_to_prb_mapping.val, + 1, + dci_size - pos, + *dci_pdu); + // MCS 5bit //bit over 32, so dci_pdu ++ + pos += 5; + *dci_pdu |= (dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); + LOG_D(NR_MAC, "MCS %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, 5, dci_size - pos, *dci_pdu); + // New data indicator 1bit + pos++; + *dci_pdu |= (dci_pdu_rel15->ndi & 1) << (dci_size - pos); + LOG_D(NR_MAC, "NDI %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->ndi, 1, dci_size - pos, *dci_pdu); + // Redundancy version 2bit + pos += 2; + *dci_pdu |= (dci_pdu_rel15->rv & 0x3) << (dci_size - pos); + LOG_D(NR_MAC, "RV %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->rv, 2, dci_size - pos, *dci_pdu); + // HARQ process number 4bit + pos += 4; + *dci_pdu |= ((dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos)); + LOG_D(NR_MAC, "HARQ_PID %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->harq_pid, 4, dci_size - pos, *dci_pdu); + // Downlink assignment index 2bit + pos += 2; + *dci_pdu |= ((dci_pdu_rel15->dai[0].val & 3) << (dci_size - pos)); + LOG_D(NR_MAC, "DAI %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->dai[0].val, 2, dci_size - pos, *dci_pdu); + // TPC command for scheduled PUCCH 2bit + pos += 2; + *dci_pdu |= ((dci_pdu_rel15->tpc & 3) << (dci_size - pos)); + LOG_D(NR_MAC, "TPC %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->tpc, 2, dci_size - pos, *dci_pdu); + // PUCCH resource indicator 3bit + pos += 3; + *dci_pdu |= ((dci_pdu_rel15->pucch_resource_indicator & 0x7) << (dci_size - pos)); + LOG_D(NR_MAC, + "PUCCH RI %d (%d bits)=> %d (0x%lx)\n", + dci_pdu_rel15->pucch_resource_indicator, + 3, + dci_size - pos, + *dci_pdu); + // PDSCH-to-HARQ_feedback timing indicator 3bit + pos += 3; + *dci_pdu |= ((dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val & 0x7) << (dci_size - pos)); + LOG_D(NR_MAC, + "PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n", + dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val, + 3, + dci_size - pos, + *dci_pdu); + } // end else + break; + + case TYPE_P_RNTI_: + // Short Messages Indicator – 2 bits + for (int i = 0; i < 2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator >> (1 - i)) & 1) << (dci_size - pos++); + // Short Messages – 8 bits + for (int i = 0; i < 8; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages >> (7 - i)) & 1) << (dci_size - pos++); + // Freq domain assignment 0-16 bit + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); + for (int i = 0; i < fsize; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val >> (fsize - i - 1)) & 1) << (dci_size - pos++); + // Time domain assignment 4 bit + for (int i = 0; i < 4; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++); + // VRB to PRB mapping 1 bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos++); + // MCS 5 bit + for (int i = 0; i < 5; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs >> (4 - i)) & 1) << (dci_size - pos++); + // TB scaling 2 bit + for (int i = 0; i < 2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->tb_scaling >> (1 - i)) & 1) << (dci_size - pos++); + break; + + case TYPE_SI_RNTI_: + pos = 1; + // Freq domain assignment 0-16 bit + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); + LOG_D(NR_MAC, "fsize = %i\n", fsize); + for (int i = 0; i < fsize; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val >> (fsize - i - 1)) & 1) << (dci_size - pos++); + LOG_D(NR_MAC, "dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + // Time domain assignment 4 bit + for (int i = 0; i < 4; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++); + LOG_D(NR_MAC, "dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + // VRB to PRB mapping 1 bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos++); + LOG_D(NR_MAC, "dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + // MCS 5bit //bit over 32, so dci_pdu ++ + for (int i = 0; i < 5; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs >> (4 - i)) & 1) << (dci_size - pos++); + LOG_D(NR_MAC, "dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); // Redundancy version 2bit - pos += 2; - *dci_pdu |= (dci_pdu_rel15->rv & 0x3) << (dci_size - pos); - LOG_D(NR_MAC, "RV %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->rv, 2, dci_size - pos, *dci_pdu); + for (int i = 0; i < 2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv >> (1 - i)) & 1) << (dci_size - pos++); + LOG_D(NR_MAC, "dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + // System information indicator 1bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->system_info_indicator & 1) << (dci_size - pos++); + LOG_D(NR_MAC, "dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); + break; + + case TYPE_TC_RNTI_: + pos = 1; + // indicating a DL DCI format 1bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos++); + // Freq domain assignment 0-16 bit + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); + for (int i = 0; i < fsize; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val >> (fsize - i - 1)) & 1) << (dci_size - pos++); + // Time domain assignment 4 bit + for (int i = 0; i < 4; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++); + // VRB to PRB mapping 1 bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos++); + // MCS 5bit //bit over 32, so dci_pdu ++ + for (int i = 0; i < 5; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs >> (4 - i)) & 1) << (dci_size - pos++); + // New data indicator 1bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 1) << (dci_size - pos++); + // Redundancy version 2bit + for (int i = 0; i < 2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv >> (1 - i)) & 1) << (dci_size - pos++); // HARQ process number 4bit - pos += 4; - *dci_pdu |= ((dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos)); - LOG_D(NR_MAC, "HARQ_PID %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->harq_pid, 4, dci_size - pos, *dci_pdu); - // Downlink assignment index 2bit - pos += 2; - *dci_pdu |= ((dci_pdu_rel15->dai[0].val & 3) << (dci_size - pos)); - LOG_D(NR_MAC, "DAI %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->dai[0].val, 2, dci_size - pos, *dci_pdu); - // TPC command for scheduled PUCCH 2bit - pos += 2; - *dci_pdu |= ((dci_pdu_rel15->tpc & 3) << (dci_size - pos)); - LOG_D(NR_MAC, "TPC %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->tpc, 2, dci_size - pos, *dci_pdu); - // PUCCH resource indicator 3bit - pos += 3; - *dci_pdu |= ((dci_pdu_rel15->pucch_resource_indicator & 0x7) << (dci_size - pos)); + for (int i = 0; i < 4; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid >> (3 - i)) & 1) << (dci_size - pos++); + // Downlink assignment index – 2 bits + for (int i = 0; i < 2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->dai[0].val >> (1 - i)) & 1) << (dci_size - pos++); + // TPC command for scheduled PUCCH – 2 bits + for (int i = 0; i < 2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->tpc >> (1 - i)) & 1) << (dci_size - pos++); + // PUCCH resource indicator – 3 bits + for (int i = 0; i < 3; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->pucch_resource_indicator >> (2 - i)) & 1) << (dci_size - pos++); + // PDSCH-to-HARQ_feedback timing indicator – 3 bits + for (int i = 0; i < 3; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val >> (2 - i)) & 1) << (dci_size - pos++); + + LOG_D(NR_MAC, "N_RB = %i\n", N_RB); + LOG_D(NR_MAC, "dci_size = %i\n", dci_size); + LOG_D(NR_MAC, "fsize = %i\n", fsize); + LOG_D(NR_MAC, "dci_pdu_rel15->format_indicator = %i\n", dci_pdu_rel15->format_indicator); + LOG_D(NR_MAC, "dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(NR_MAC, "dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(NR_MAC, "dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(NR_MAC, "dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(NR_MAC, "dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(NR_MAC, "dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC, "dci_pdu_rel15->dai[0].val = %i\n", dci_pdu_rel15->dai[0].val); + LOG_D(NR_MAC, "dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); LOG_D(NR_MAC, - "PUCCH RI %d (%d bits)=> %d (0x%lx)\n", - dci_pdu_rel15->pucch_resource_indicator, - 3, - dci_size - pos, - *dci_pdu); - // PDSCH-to-HARQ_feedback timing indicator 3bit - pos += 3; - *dci_pdu |= ((dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val & 0x7) << (dci_size - pos)); - LOG_D(NR_MAC, - "PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n", - dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val, - 3, - dci_size - pos, - *dci_pdu); - } // end else - break; + "dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = %i\n", + dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val); - case NR_RNTI_P: - // Short Messages Indicator – 2 bits - for (int i = 0; i < 2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator >> (1 - i)) & 1) << (dci_size - pos++); - // Short Messages – 8 bits - for (int i = 0; i < 8; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages >> (7 - i)) & 1) << (dci_size - pos++); - // Freq domain assignment 0-16 bit - fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); - for (int i = 0; i < fsize; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val >> (fsize - i - 1)) & 1) << (dci_size - pos++); - // Time domain assignment 4 bit - for (int i = 0; i < 4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++); - // VRB to PRB mapping 1 bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos++); - // MCS 5 bit - for (int i = 0; i < 5; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs >> (4 - i)) & 1) << (dci_size - pos++); - // TB scaling 2 bit - for (int i = 0; i < 2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->tb_scaling >> (1 - i)) & 1) << (dci_size - pos++); - break; - - case NR_RNTI_SI: - pos = 1; - // Freq domain assignment 0-16 bit - fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); - LOG_D(NR_MAC, "fsize = %i\n", fsize); - for (int i = 0; i < fsize; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val >> (fsize - i - 1)) & 1) << (dci_size - pos++); - LOG_D(NR_MAC, "dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); - // Time domain assignment 4 bit - for (int i = 0; i < 4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++); - LOG_D(NR_MAC, "dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); - // VRB to PRB mapping 1 bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos++); - LOG_D(NR_MAC, "dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); - // MCS 5bit //bit over 32, so dci_pdu ++ - for (int i = 0; i < 5; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs >> (4 - i)) & 1) << (dci_size - pos++); - LOG_D(NR_MAC, "dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); - // Redundancy version 2bit - for (int i = 0; i < 2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv >> (1 - i)) & 1) << (dci_size - pos++); - LOG_D(NR_MAC, "dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - // System information indicator 1bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->system_info_indicator&1)<<(dci_size-pos++); - LOG_D(NR_MAC, "dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); - break; - - case NR_RNTI_TC: - pos = 1; - // indicating a DL DCI format 1bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos++); - // Freq domain assignment 0-16 bit - fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); - for (int i = 0; i < fsize; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val >> (fsize - i - 1)) & 1) << (dci_size - pos++); - // Time domain assignment 4 bit - for (int i = 0; i < 4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++); - // VRB to PRB mapping 1 bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos++); - // MCS 5bit //bit over 32, so dci_pdu ++ - for (int i = 0; i < 5; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs >> (4 - i)) & 1) << (dci_size - pos++); - // New data indicator 1bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 1) << (dci_size - pos++); - // Redundancy version 2bit - for (int i = 0; i < 2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv >> (1 - i)) & 1) << (dci_size - pos++); - // HARQ process number 4bit - for (int i = 0; i < 4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid >> (3 - i)) & 1) << (dci_size - pos++); - // Downlink assignment index – 2 bits - for (int i = 0; i < 2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->dai[0].val >> (1 - i)) & 1) << (dci_size - pos++); - // TPC command for scheduled PUCCH – 2 bits - for (int i = 0; i < 2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->tpc >> (1 - i)) & 1) << (dci_size - pos++); - // PUCCH resource indicator – 3 bits - for (int i = 0; i < 3; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->pucch_resource_indicator >> (2 - i)) & 1) << (dci_size - pos++); - // PDSCH-to-HARQ_feedback timing indicator – 3 bits - for (int i = 0; i < 3; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val >> (2 - i)) & 1) << (dci_size - pos++); - - LOG_D(NR_MAC,"N_RB = %i\n", N_RB); - LOG_D(NR_MAC,"dci_size = %i\n", dci_size); - LOG_D(NR_MAC,"fsize = %i\n", fsize); - LOG_D(NR_MAC,"dci_pdu_rel15->format_indicator = %i\n", dci_pdu_rel15->format_indicator); - LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); - LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); - LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); - LOG_D(NR_MAC,"dci_pdu_rel15->dai[0].val = %i\n", dci_pdu_rel15->dai[0].val); - LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); - LOG_D(NR_MAC,"dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = %i\n", dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val); - - break; + break; } break; case NR_UL_DCI_FORMAT_0_0: switch (rnti_type) { - case NR_RNTI_C: - LOG_D(NR_MAC,"Filling format 0_0 DCI for CRNTI (size %d bits, format ind %d)\n",dci_size,dci_pdu_rel15->format_indicator); - // indicating a UL DCI format 1bit - pos=1; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos); - // Freq domain assignment max 16 bit - fsize = dci_pdu_rel15->frequency_domain_assignment.nbits; - pos+=fsize; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos); - // Time domain assignment 4bit - pos += 4; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val & ((1 << 4) - 1)) << (dci_size - pos); - // Frequency hopping flag – 1 bit - pos++; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag.val & 1) << (dci_size - pos); - // MCS 5 bit - pos+=5; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); - // New data indicator 1bit - pos++; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 1) << (dci_size - pos); - // Redundancy version 2bit - pos+=2; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos); - // HARQ process number 4bit - pos+=4; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); - // TPC command for scheduled PUSCH – 2 bits - pos+=2; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->tpc & 0x3) << (dci_size - pos); - // Padding bits - for (int a = pos; a < dci_size; a++) - *dci_pdu |= ((uint64_t)dci_pdu_rel15->padding & 1) << (dci_size - pos++); - // UL/SUL indicator – 1 bit - /* commented for now (RK): need to get this from BWP descriptor - if (cfg->pucch_config.pucch_GroupHopping.value) - *dci_pdu |= - ((uint64_t)dci_pdu_rel15->ul_sul_indicator.val&1)<<(dci_size-pos++); - */ + case TYPE_C_RNTI_: + LOG_D(NR_MAC, + "Filling format 0_0 DCI for CRNTI (size %d bits, format ind %d)\n", + dci_size, + dci_pdu_rel15->format_indicator); + // indicating a UL DCI format 1bit + pos = 1; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos); + // Freq domain assignment max 16 bit + fsize = dci_pdu_rel15->frequency_domain_assignment.nbits; + pos += fsize; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos); + // Time domain assignment 4bit + pos += 4; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val & ((1 << 4) - 1)) << (dci_size - pos); + // Frequency hopping flag – 1 bit + pos++; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag.val & 1) << (dci_size - pos); + // MCS 5 bit + pos += 5; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); + // New data indicator 1bit + pos++; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 1) << (dci_size - pos); + // Redundancy version 2bit + pos += 2; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos); + // HARQ process number 4bit + pos += 4; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); + // TPC command for scheduled PUSCH – 2 bits + pos += 2; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->tpc & 0x3) << (dci_size - pos); + // Padding bits + for (int a = pos; a < dci_size; a++) + *dci_pdu |= ((uint64_t)dci_pdu_rel15->padding & 1) << (dci_size - pos++); + // UL/SUL indicator – 1 bit + /* commented for now (RK): need to get this from BWP descriptor + if (cfg->pucch_config.pucch_GroupHopping.value) + *dci_pdu |= + ((uint64_t)dci_pdu_rel15->ul_sul_indicator.val&1)<<(dci_size-pos++); + */ - LOG_D(NR_MAC,"N_RB = %i\n", N_RB); - LOG_D(NR_MAC,"dci_size = %i\n", dci_size); - LOG_D(NR_MAC,"fsize = %i\n", fsize); - LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->frequency_hopping_flag.val = %i\n", dci_pdu_rel15->frequency_hopping_flag.val); - LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); - LOG_D(NR_MAC,"dci_pdu_rel15->ndi = %i\n", dci_pdu_rel15->ndi); - LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); - LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); - LOG_D(NR_MAC,"dci_pdu_rel15->padding = %i\n", dci_pdu_rel15->padding); - break; + LOG_D(NR_MAC, "N_RB = %i\n", N_RB); + LOG_D(NR_MAC, "dci_size = %i\n", dci_size); + LOG_D(NR_MAC, "fsize = %i\n", fsize); + LOG_D(NR_MAC, "dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(NR_MAC, "dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(NR_MAC, "dci_pdu_rel15->frequency_hopping_flag.val = %i\n", dci_pdu_rel15->frequency_hopping_flag.val); + LOG_D(NR_MAC, "dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(NR_MAC, "dci_pdu_rel15->ndi = %i\n", dci_pdu_rel15->ndi); + LOG_D(NR_MAC, "dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(NR_MAC, "dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC, "dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); + LOG_D(NR_MAC, "dci_pdu_rel15->padding = %i\n", dci_pdu_rel15->padding); + break; - case NFAPI_NR_RNTI_TC: - // indicating a UL DCI format 1bit - pos=1; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos); - // Freq domain assignment max 16 bit - fsize = dci_pdu_rel15->frequency_domain_assignment.nbits; - pos+=fsize; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos); - // Time domain assignment 4bit - pos += 4; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val & ((1 << 4) - 1)) << (dci_size - pos); - // Frequency hopping flag – 1 bit - pos++; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag.val & 1) << (dci_size - pos); - // MCS 5 bit - pos+=5; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); - // New data indicator 1bit - pos++; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 1) << (dci_size - pos); - // Redundancy version 2bit - pos+=2; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos); - // HARQ process number 4bit - pos+=4; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); - // Padding bits - for (int a = pos; a < dci_size; a++) - *dci_pdu |= ((uint64_t)dci_pdu_rel15->padding & 1) << (dci_size - pos++); - // UL/SUL indicator – 1 bit - /* commented for now (RK): need to get this from BWP descriptor - if (cfg->pucch_config.pucch_GroupHopping.value) - *dci_pdu |= - ((uint64_t)dci_pdu_rel15->ul_sul_indicator.val&1)<<(dci_size-pos++); - */ - LOG_D(NR_MAC,"N_RB = %i\n", N_RB); - LOG_D(NR_MAC,"dci_size = %i\n", dci_size); - LOG_D(NR_MAC,"fsize = %i\n", fsize); - LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->frequency_hopping_flag.val = %i\n", dci_pdu_rel15->frequency_hopping_flag.val); - LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); - LOG_D(NR_MAC,"dci_pdu_rel15->ndi = %i\n", dci_pdu_rel15->ndi); - LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); - LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); - LOG_D(NR_MAC,"dci_pdu_rel15->padding = %i\n", dci_pdu_rel15->padding); + case TYPE_TC_RNTI_: + // indicating a UL DCI format 1bit + pos = 1; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos); + // Freq domain assignment max 16 bit + fsize = dci_pdu_rel15->frequency_domain_assignment.nbits; + pos += fsize; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos); + // Time domain assignment 4bit + pos += 4; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val & ((1 << 4) - 1)) << (dci_size - pos); + // Frequency hopping flag – 1 bit + pos++; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag.val & 1) << (dci_size - pos); + // MCS 5 bit + pos += 5; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); + // New data indicator 1bit + pos++; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 1) << (dci_size - pos); + // Redundancy version 2bit + pos += 2; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos); + // HARQ process number 4bit + pos += 4; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); + // Padding bits + for (int a = pos; a < dci_size; a++) + *dci_pdu |= ((uint64_t)dci_pdu_rel15->padding & 1) << (dci_size - pos++); + // UL/SUL indicator – 1 bit + /* commented for now (RK): need to get this from BWP descriptor + if (cfg->pucch_config.pucch_GroupHopping.value) + *dci_pdu |= + ((uint64_t)dci_pdu_rel15->ul_sul_indicator.val&1)<<(dci_size-pos++); + */ + LOG_D(NR_MAC, "N_RB = %i\n", N_RB); + LOG_D(NR_MAC, "dci_size = %i\n", dci_size); + LOG_D(NR_MAC, "fsize = %i\n", fsize); + LOG_D(NR_MAC, "dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(NR_MAC, "dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(NR_MAC, "dci_pdu_rel15->frequency_hopping_flag.val = %i\n", dci_pdu_rel15->frequency_hopping_flag.val); + LOG_D(NR_MAC, "dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(NR_MAC, "dci_pdu_rel15->ndi = %i\n", dci_pdu_rel15->ndi); + LOG_D(NR_MAC, "dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(NR_MAC, "dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC, "dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); + LOG_D(NR_MAC, "dci_pdu_rel15->padding = %i\n", dci_pdu_rel15->padding); - break; + break; } break; case NR_UL_DCI_FORMAT_0_1: switch (rnti_type) { - case NR_RNTI_C: - LOG_D(NR_MAC,"Filling NR_UL_DCI_FORMAT_0_1 size %d format indicator %d\n",dci_size,dci_pdu_rel15->format_indicator); - // Indicating a DL DCI format 1bit - pos = 1; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 0x1) << (dci_size - pos); - // Carrier indicator - pos += dci_pdu_rel15->carrier_indicator.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->carrier_indicator.val & ((1 << dci_pdu_rel15->carrier_indicator.nbits) - 1)) << (dci_size - pos); - // UL/SUL Indicator - pos += dci_pdu_rel15->ul_sul_indicator.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->ul_sul_indicator.val & ((1 << dci_pdu_rel15->ul_sul_indicator.nbits) - 1)) << (dci_size - pos); - // BWP indicator - pos += dci_pdu_rel15->bwp_indicator.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->bwp_indicator.val & ((1 << dci_pdu_rel15->bwp_indicator.nbits) - 1)) << (dci_size - pos); - // Frequency domain resource assignment - pos += dci_pdu_rel15->frequency_domain_assignment.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << dci_pdu_rel15->frequency_domain_assignment.nbits) - 1)) << (dci_size - pos); - // Time domain resource assignment - pos += dci_pdu_rel15->time_domain_assignment.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val & ((1 << dci_pdu_rel15->time_domain_assignment.nbits) - 1)) << (dci_size - pos); - // Frequency hopping - pos += dci_pdu_rel15->frequency_hopping_flag.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag.val & ((1 << dci_pdu_rel15->frequency_hopping_flag.nbits) - 1)) << (dci_size - pos); - // MCS 5bit - pos += 5; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); - // New data indicator 1bit - pos += 1; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 0x1) << (dci_size - pos); - // Redundancy version 2bit - pos += 2; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos); - // HARQ process number 4bit - pos += 4; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); - // 1st Downlink assignment index - pos += dci_pdu_rel15->dai[0].nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->dai[0].val & ((1 << dci_pdu_rel15->dai[0].nbits) - 1)) << (dci_size - pos); - // 2nd Downlink assignment index - pos += dci_pdu_rel15->dai[1].nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->dai[1].val & ((1 << dci_pdu_rel15->dai[1].nbits) - 1)) << (dci_size - pos); - // TPC command for scheduled PUSCH 2bit - pos += 2; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->tpc & 0x3) << (dci_size - pos); - // SRS resource indicator - pos += dci_pdu_rel15->srs_resource_indicator.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->srs_resource_indicator.val & ((1 << dci_pdu_rel15->srs_resource_indicator.nbits) - 1)) << (dci_size - pos); - // Precoding info and n. of layers - pos += dci_pdu_rel15->precoding_information.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->precoding_information.val & ((1 << dci_pdu_rel15->precoding_information.nbits) - 1)) << (dci_size - pos); - // Antenna ports - pos += dci_pdu_rel15->antenna_ports.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->antenna_ports.val & ((1 << dci_pdu_rel15->antenna_ports.nbits) - 1)) << (dci_size - pos); - // SRS request - pos += dci_pdu_rel15->srs_request.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->srs_request.val & ((1 << dci_pdu_rel15->srs_request.nbits) - 1)) << (dci_size - pos); - // CSI request - pos += dci_pdu_rel15->csi_request.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->csi_request.val & ((1 << dci_pdu_rel15->csi_request.nbits) - 1)) << (dci_size - pos); - // CBG transmission information - pos += dci_pdu_rel15->cbgti.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->cbgti.val & ((1 << dci_pdu_rel15->cbgti.nbits) - 1)) << (dci_size - pos); - // PTRS DMRS association - pos += dci_pdu_rel15->ptrs_dmrs_association.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->ptrs_dmrs_association.val & ((1 << dci_pdu_rel15->ptrs_dmrs_association.nbits) - 1)) << (dci_size - pos); - // Beta offset indicator - pos += dci_pdu_rel15->beta_offset_indicator.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->beta_offset_indicator.val & ((1 << dci_pdu_rel15->beta_offset_indicator.nbits) - 1)) << (dci_size - pos); - // DMRS sequence initialization - pos += dci_pdu_rel15->dmrs_sequence_initialization.nbits; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->dmrs_sequence_initialization.val & ((1 << dci_pdu_rel15->dmrs_sequence_initialization.nbits) - 1)) << (dci_size - pos); - // UL-SCH indicator - pos += 1; - *dci_pdu |= ((uint64_t)dci_pdu_rel15->ulsch_indicator & 0x1) << (dci_size - pos); + case TYPE_C_RNTI_: + LOG_D(NR_MAC, "Filling NR_UL_DCI_FORMAT_0_1 size %d format indicator %d\n", dci_size, dci_pdu_rel15->format_indicator); + // Indicating a DL DCI format 1bit + pos = 1; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 0x1) << (dci_size - pos); + // Carrier indicator + pos += dci_pdu_rel15->carrier_indicator.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->carrier_indicator.val & ((1 << dci_pdu_rel15->carrier_indicator.nbits) - 1)) + << (dci_size - pos); + // UL/SUL Indicator + pos += dci_pdu_rel15->ul_sul_indicator.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->ul_sul_indicator.val & ((1 << dci_pdu_rel15->ul_sul_indicator.nbits) - 1)) + << (dci_size - pos); + // BWP indicator + pos += dci_pdu_rel15->bwp_indicator.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->bwp_indicator.val & ((1 << dci_pdu_rel15->bwp_indicator.nbits) - 1)) + << (dci_size - pos); + // Frequency domain resource assignment + pos += dci_pdu_rel15->frequency_domain_assignment.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val + & ((1 << dci_pdu_rel15->frequency_domain_assignment.nbits) - 1)) + << (dci_size - pos); + // Time domain resource assignment + pos += dci_pdu_rel15->time_domain_assignment.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val & ((1 << dci_pdu_rel15->time_domain_assignment.nbits) - 1)) + << (dci_size - pos); + // Frequency hopping + pos += dci_pdu_rel15->frequency_hopping_flag.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag.val & ((1 << dci_pdu_rel15->frequency_hopping_flag.nbits) - 1)) + << (dci_size - pos); + // MCS 5bit + pos += 5; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); + // New data indicator 1bit + pos += 1; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 0x1) << (dci_size - pos); + // Redundancy version 2bit + pos += 2; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos); + // HARQ process number 4bit + pos += 4; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos); + // 1st Downlink assignment index + pos += dci_pdu_rel15->dai[0].nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->dai[0].val & ((1 << dci_pdu_rel15->dai[0].nbits) - 1)) << (dci_size - pos); + // 2nd Downlink assignment index + pos += dci_pdu_rel15->dai[1].nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->dai[1].val & ((1 << dci_pdu_rel15->dai[1].nbits) - 1)) << (dci_size - pos); + // TPC command for scheduled PUSCH 2bit + pos += 2; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->tpc & 0x3) << (dci_size - pos); + // SRS resource indicator + pos += dci_pdu_rel15->srs_resource_indicator.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->srs_resource_indicator.val & ((1 << dci_pdu_rel15->srs_resource_indicator.nbits) - 1)) + << (dci_size - pos); + // Precoding info and n. of layers + pos += dci_pdu_rel15->precoding_information.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->precoding_information.val & ((1 << dci_pdu_rel15->precoding_information.nbits) - 1)) + << (dci_size - pos); + // Antenna ports + pos += dci_pdu_rel15->antenna_ports.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->antenna_ports.val & ((1 << dci_pdu_rel15->antenna_ports.nbits) - 1)) + << (dci_size - pos); + // SRS request + pos += dci_pdu_rel15->srs_request.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->srs_request.val & ((1 << dci_pdu_rel15->srs_request.nbits) - 1)) << (dci_size - pos); + // CSI request + pos += dci_pdu_rel15->csi_request.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->csi_request.val & ((1 << dci_pdu_rel15->csi_request.nbits) - 1)) << (dci_size - pos); + // CBG transmission information + pos += dci_pdu_rel15->cbgti.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->cbgti.val & ((1 << dci_pdu_rel15->cbgti.nbits) - 1)) << (dci_size - pos); + // PTRS DMRS association + pos += dci_pdu_rel15->ptrs_dmrs_association.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->ptrs_dmrs_association.val & ((1 << dci_pdu_rel15->ptrs_dmrs_association.nbits) - 1)) + << (dci_size - pos); + // Beta offset indicator + pos += dci_pdu_rel15->beta_offset_indicator.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->beta_offset_indicator.val & ((1 << dci_pdu_rel15->beta_offset_indicator.nbits) - 1)) + << (dci_size - pos); + // DMRS sequence initialization + pos += dci_pdu_rel15->dmrs_sequence_initialization.nbits; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->dmrs_sequence_initialization.val + & ((1 << dci_pdu_rel15->dmrs_sequence_initialization.nbits) - 1)) + << (dci_size - pos); + // UL-SCH indicator + pos += 1; + *dci_pdu |= ((uint64_t)dci_pdu_rel15->ulsch_indicator & 0x1) << (dci_size - pos); #ifdef DEBUG_DCI LOG_I(NR_MAC,"============= NR_UL_DCI_FORMAT_0_1 =============\n"); @@ -2324,7 +2344,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, // Set MCS tables long *dl_mcs_Table = DL_BWP->pdsch_Config ? DL_BWP->pdsch_Config->mcs_Table : NULL; - DL_BWP->mcsTableIdx = get_pdsch_mcs_table(dl_mcs_Table, DL_BWP->dci_format, NR_RNTI_C, target_ss); + DL_BWP->mcsTableIdx = get_pdsch_mcs_table(dl_mcs_Table, DL_BWP->dci_format, TYPE_C_RNTI_, target_ss); // 0 precoding enabled 1 precoding disabled UL_BWP->transform_precoding = get_transformPrecoding(UL_BWP, UL_BWP->dci_format, 0); @@ -2335,13 +2355,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, UL_BWP->pusch_Config->mcs_Table : UL_BWP->pusch_Config->mcs_TableTransformPrecoder; - UL_BWP->mcs_table = get_pusch_mcs_table(mcs_Table, - !UL_BWP->transform_precoding, - UL_BWP->dci_format, - NR_RNTI_C, - target_ss, - false); - + UL_BWP->mcs_table = get_pusch_mcs_table(mcs_Table, !UL_BWP->transform_precoding, UL_BWP->dci_format, TYPE_C_RNTI_, target_ss, false); } void reset_srs_stats(NR_UE_info_t *UE) { diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c index 6664cc761b..521616f82d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c @@ -562,7 +562,10 @@ void nr_schedule_srs(int module_id, frame_t frame, int slot) continue; } - NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C); + NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP, + sched_ctrl->coreset->controlResourceSetId, + sched_ctrl->search_space->searchSpaceType->present, + TYPE_C_RNTI_); const int num_tda = tdaList->list.count; int max_k2 = 0; // avoid last one in the list (for msg3) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index da4a2b3f8c..f1a3e34c85 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1502,7 +1502,11 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, const uint8_t nrOfLayers = retInfo->nrOfLayers; LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda); LOG_D(NR_MAC,"tbs %d\n",retInfo->tb_size); - NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, tda); + NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, + sched_ctrl->coreset->controlResourceSetId, + sched_ctrl->search_space->searchSpaceType->present, + TYPE_C_RNTI_, + tda); bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == tda_info.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= tda_info.nrOfSymbols); if (reuse_old_tda && nrOfLayers == retInfo->nrOfLayers) { /* Check the resource is enough for retransmission */ @@ -1740,7 +1744,11 @@ static void pf_ul(module_id_t module_id, sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1; sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); - sched_pusch->tda_info = get_ul_tda_info(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, sched_pusch->time_domain_allocation); + sched_pusch->tda_info = get_ul_tda_info(current_BWP, + sched_ctrl->coreset->controlResourceSetId, + sched_ctrl->search_space->searchSpaceType->present, + TYPE_C_RNTI_, + sched_pusch->time_domain_allocation); sched_pusch->dmrs_info = get_ul_dmrs_params(scc, current_BWP, &sched_pusch->tda_info, @@ -1840,7 +1848,11 @@ static void pf_ul(module_id_t module_id, sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1; sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); - sched_pusch->tda_info = get_ul_tda_info(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, sched_pusch->time_domain_allocation); + sched_pusch->tda_info = get_ul_tda_info(current_BWP, + sched_ctrl->coreset->controlResourceSetId, + sched_ctrl->search_space->searchSpaceType->present, + TYPE_C_RNTI_, + sched_pusch->time_domain_allocation); sched_pusch->dmrs_info = get_ul_dmrs_params(scc, current_BWP, &sched_pusch->tda_info, @@ -1943,7 +1955,10 @@ static bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_ NR_UE_UL_BWP_t *current_BWP = &nr_mac->UE_info.list[0]->current_UL_BWP; int mu = current_BWP->scs; const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot); - NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C); + NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP, + sched_ctrl->coreset->controlResourceSetId, + sched_ctrl->search_space->searchSpaceType->present, + TYPE_C_RNTI_); int K2 = get_K2(tdaList, temp_tda, mu); const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; @@ -2119,8 +2134,6 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n cur_harq->feedback_slot = sched_pusch->slot; cur_harq->is_waiting = true; - int rnti_types[2] = { NR_RNTI_C, 0 }; - /* Statistics */ AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max, "Indexing ulsch_rounds[%d] is out of bounds\n", cur_harq->round); UE->mac_stats.ul.rounds[cur_harq->round]++; @@ -2385,7 +2398,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n dci_pdu, &uldci_payload, current_BWP->dci_format, - rnti_types[0], + TYPE_C_RNTI_, current_BWP->bwp_id, ss, coreset,