nr-ip-ul-nos1: Merge with develop

This commit is contained in:
matzakos
2020-02-12 16:45:22 +01:00
175 changed files with 7322 additions and 4479 deletions
@@ -35,6 +35,7 @@
#include <string.h>
#include <types.h>
#include "assertions.h"
#include "common/utils/LOG/log.h"
#include "PHY/TOOLS/time_meas.h"
#include "defs.h"
@@ -482,11 +483,12 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
//Table of possible lifting sizes
char temp;
int simd_size;
int macro_segment, macro_segment_end;
unsigned int macro_segment, macro_segment_end;
macro_segment = 8*macro_num;
macro_segment_end = (n_segments > 8*(macro_num+1)) ? 8*(macro_num+1) : n_segments;
// macro_segment_end = (n_segments > 8*(macro_num+1)) ? 8*(macro_num+1) : n_segments;
macro_segment_end = macro_segment + (n_segments > 8 ? 8 : n_segments);
///printf("macro_segment: %d\n", macro_segment);
///printf("macro_segment_end: %d\n", macro_segment_end );
@@ -506,7 +508,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
masks[7] = _mm256_set1_epi8(0x80);
#endif
///AssertFatal(n_segments>0&&n_segments<=8,"0 < n_segments %d <= 8\n",n_segments);
//determine number of bits in codeword
if (BG==1)
@@ -562,7 +564,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
for (i=0; i<block_length>>5; i++) {
c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]);
//for (j=1; j<n_segments; j++) {
for (j=macro_segment+1; j < macro_segment_end; j++) {
for (j=macro_segment+1; j < macro_segment_end; j++) {
c256 = _mm256_or_si256(_mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[j])[i]), shufmask),andmask),zero256),masks[j-macro_segment]),c256);
}
((__m256i *)c)[i] = c256;
+10
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@@ -705,11 +705,21 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
ue->pusch_config.pusch_TimeDomainResourceAllocation[i]->mappingType = typeB;
}
for (i=0;i<MAX_NR_OF_DL_ALLOCATIONS;i++){
ue->PDSCH_Config.pdsch_TimeDomainResourceAllocation[i] = (NR_PDSCH_TimeDomainResourceAllocation_t *)malloc16(sizeof(NR_PDSCH_TimeDomainResourceAllocation_t));
ue->PDSCH_Config.pdsch_TimeDomainResourceAllocation[i]->mappingType = typeA;
}
//------------- config DMRS parameters--------------//
ue->dmrs_UplinkConfig.pusch_dmrs_type = pusch_dmrs_type1;
ue->dmrs_UplinkConfig.pusch_dmrs_AdditionalPosition = pusch_dmrs_pos0;
ue->dmrs_UplinkConfig.pusch_maxLength = pusch_len1;
//-------------------------------------------------//
ue->dmrs_DownlinkConfig.pdsch_dmrs_type = pdsch_dmrs_type1;
ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition = pdsch_dmrs_pos0;
ue->dmrs_DownlinkConfig.pdsch_maxLength = pdsch_len1;
//-------------------------------------------------//
ue->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
pusch_dmrs = ue->nr_gold_pusch_dmrs;
n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization
File diff suppressed because one or more lines are too long
@@ -547,10 +547,10 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->log2_maxh,
measurements); // log2_maxh+I0_shift
if (symbol == 5) {
LOG_M("rxF_comp_d.m","rxF_c_d",&pdsch_vars[eNB_id]->rxdataF_comp0[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
}
// if (symbol == 5) {
// LOG_M("rxF_comp_d.m","rxF_c_d",&pdsch_vars[eNB_id]->rxdataF_comp0[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
// }
//
if ((rx_type==rx_IC_single_stream) &&
(eNB_id_i<ue->n_connected_eNB)) {
dlsch_channel_compensation(pdsch_vars[eNB_id_i]->rxdataF_ext,
@@ -62,11 +62,10 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
LTE_DL_FRAME_PARMS *fp = (ue==NULL) ? frame_parms : &ue->frame_parms;
int32_t *txF = (ue==NULL) ? txdataF[ant] : ue->common_vars.txdataF[ant];
uint32_t u,v,alpha_ind;
uint32_t u0 = (ue==NULL) ? 0 : frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1];
uint32_t u1 = (ue==NULL) ? 0 : frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)];
uint32_t v0 = (ue==NULL) ? 0 : frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
uint32_t v1 = (ue==NULL) ? 0 : frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
uint32_t u0=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1];
uint32_t u1=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)];
uint32_t v0=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
uint32_t v1=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
int32_t ref_re,ref_im;
uint8_t harq_pid = (proc == NULL) ? 0: subframe2harq_pid(fp,proc->frame_tx,subframe);
@@ -82,10 +81,6 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[(subframe<<1)+1]+
((ue->ulsch[0]->cooperation_flag==2)?10:0)+
ant*6) % 12;
u0=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1];
u1=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)];
v0=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
v1=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
}
+1 -1
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@@ -615,7 +615,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
rx_ind.number_pdus = 1; //rx_ind.number_pdus++;
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication);
ue->if_inst->dl_indication(&dl_indication, NULL);
return 0;
}
@@ -42,6 +42,7 @@
#include "PHY/defs_nr_common.h"
#include "PHY/TOOLS/tools_defs.h"
#include "executables/nr-softmodem.h"
#include "executables/softmodem-common.h"
#include "LAYER2/NR_MAC_UE/mac_proto.h"
//#define DEBUG_SCFDMA
+8
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@@ -29,6 +29,10 @@
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include "PHY/sse_intrin.h"
@@ -428,4 +432,8 @@ double interp(double x, double *xs, double *ys, int count);
int write_output(const char *fname,const char *vname,void *data,int length,int dec,char format);
#ifdef __cplusplus
}
#endif
#endif //__PHY_TOOLS_DEFS__H__
File diff suppressed because one or more lines are too long
+18 -3
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@@ -871,6 +871,16 @@ typedef struct UE_NR_SCAN_INFO_s {
int32_t freq_offset_Hz[3][10];
} UE_NR_SCAN_INFO_t;
typedef struct NR_UL_TIME_ALIGNMENT {
/// flag used by MAC to inform PHY about a TA to be applied
unsigned char apply_ta;
/// frame and slot when to apply the TA as stated in TS 38.213 setion 4.2
int16_t ta_frame;
char ta_slot;
/// TA command and TAGID received from the gNB
uint8_t ta_command;
uint8_t tag_id;
} NR_UL_TIME_ALIGNMENT_t;
#include "NR_IF_Module.h"
@@ -1066,9 +1076,14 @@ typedef struct {
int rx_offset; /// Timing offset
int rx_offset_diff; /// Timing adjustment for ofdm symbol0 on HW USRP
int time_sync_cell;
int timing_advance; ///timing advance signalled from eNB
int hw_timing_advance;
int N_TA_offset; ///timing offset used in TDD
/// Timing Advance updates variables
/// Timing advance update computed from the TA command signalled from gNB
int timing_advance;
int hw_timing_advance;
int N_TA_offset; ///timing offset used in TDD
NR_UL_TIME_ALIGNMENT_t ul_time_alignment[NUMBER_OF_CONNECTED_gNB_MAX];
/// Flag to tell if UE is secondary user (cognitive mode)
unsigned char is_secondary_ue;
/// Flag to tell if secondary eNB has channel estimates to create NULL-beams from.
+7 -3
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@@ -36,6 +36,7 @@
#include <stdbool.h>
#include "types.h"
#include "NR_PDSCH-TimeDomainResourceAllocation.h"
#ifdef DEFINE_VARIABLES_PHY_IMPLEMENTATION_DEFS_NR_H
#define EXTERN
@@ -377,8 +378,10 @@ typedef enum {
////////////////////////////////////////////////////////////////////////////////################################
#define MAX_NR_RATE_MATCH_PATTERNS 4
#define MAX_NR_ZP_CSI_RS_RESOURCES 32
#define MAX_NR_RATE_MATCH_PATTERNS 4
#define MAX_NR_ZP_CSI_RS_RESOURCES 32
#define MAX_NR_OF_DL_ALLOCATIONS 16
#define MAX_NR_OF_UL_ALLOCATIONS (16)
typedef enum{
dl_resourceAllocationType0 = 1,
@@ -473,6 +476,8 @@ typedef struct {
*/
maxNrofCodeWordsScheduledByDCI_t maxNrofCodeWordsScheduledByDCI;
NR_PDSCH_TimeDomainResourceAllocation_t *pdsch_TimeDomainResourceAllocation[MAX_NR_OF_DL_ALLOCATIONS];
} PDSCH_Config_t;
/***********************************************************************
@@ -483,7 +488,6 @@ typedef struct {
*
************************************************************************/
#define MAX_NR_OF_UL_ALLOCATIONS (16)
typedef enum {
enable_tpc_accumulation = 0, /* by default it is enable */
-1
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@@ -69,7 +69,6 @@ extern uint16_t NB_UE_INST;
extern unsigned char NB_RN_INST;
#endif
extern unsigned int ULSCH_max_consecutive_errors;
extern int flag_LA;
extern double sinr_bler_map[MCS_COUNT][2][MCS_TABLE_LENGTH_MAX];
extern double sinr_bler_map_up[MCS_COUNT][2][16];
-1
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@@ -66,7 +66,6 @@ extern uint16_t NB_UE_INST;
extern unsigned char NB_RN_INST;
#endif
extern unsigned int ULSCH_max_consecutive_errors;
extern int flag_LA;
extern double sinr_bler_map[MCS_COUNT][2][MCS_TABLE_LENGTH_MAX];
extern double sinr_bler_map_up[MCS_COUNT][2][16];
-1
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@@ -66,7 +66,6 @@ extern uint16_t NB_UE_INST;
extern unsigned char NB_RN_INST;
#endif
extern unsigned int ULSCH_max_consecutive_errors;
extern int flag_LA;
extern double sinr_bler_map[MCS_COUNT][2][MCS_TABLE_LENGTH_MAX];
extern double sinr_bler_map_up[MCS_COUNT][2][16];
-2
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@@ -65,8 +65,6 @@ unsigned char NB_RN_INST=0;
unsigned char NB_INST=0;
#endif
unsigned int ULSCH_max_consecutive_errors = 20;
int number_of_cards;
-1
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@@ -64,7 +64,6 @@ unsigned char NB_RN_INST=0;
unsigned char NB_INST=0;
#endif
unsigned int ULSCH_max_consecutive_errors = 20;
int number_of_cards;
-1
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@@ -57,7 +57,6 @@ short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
unsigned char NB_INST=0;
#endif
unsigned int ULSCH_max_consecutive_errors = 20;
int number_of_cards;
+1 -1
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@@ -47,4 +47,4 @@ void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t harq_pid);
void nr_fill_crc_indication (PHY_VARS_gNB *gNB, int UE_id, int frame, int slot_rx, uint8_t crc_flag);
void nr_fill_crc_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t crc_flag);
+1 -1
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@@ -38,7 +38,7 @@
#include "PHY/LTE_TRANSPORT/if4_tools.h"
#include "PHY/LTE_TRANSPORT/if5_tools.h"
#include "LAYER2/MAC/mac_extern.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/MAC/mac.h"
#include "common/utils/LOG/log.h"
#include "common/utils/system.h"
+16 -12
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@@ -40,6 +40,7 @@
#include "PHY/MODULATION/nr_modulation.h"
#include "T.h"
#include "executables/nr-softmodem.h"
#include "executables/softmodem-common.h"
#include "assertions.h"
#include "msc.h"
@@ -290,7 +291,7 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int UE_id
else if(gNB->ulsch[UE_id][0]->harq_processes[harq_pid]->b!=NULL){
LOG_I(PHY, "ULSCH received ok \n");
if(IS_SOFTMODEM_NOS1){ //&& gNB->ulsch[UE_id][0]->rnti == 0x1234
nr_fill_crc_indication (gNB, UE_id, frame_rx, slot_rx, 0);
nr_fill_crc_indication (gNB,frame_rx, slot_rx, UE_id, 0);
nr_fill_rx_indication(gNB, frame_rx, slot_rx, UE_id, harq_pid);
}
}
@@ -312,6 +313,8 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[UE_id][0];
NR_UL_gNB_HARQ_t *harq_process = ulsch->harq_processes[harq_pid];
uint16_t mu = gNB->gNB_config.subframe_config.numerology_index_mu.value;
pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.rx_ind.sfn_sf = frame<<4| slot_rx;
@@ -331,14 +334,15 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
timing_advance_update = sync_pos; // - gNB->frame_parms.nb_prefix_samples/4; //to check
// printf("\x1B[33m" "timing_advance_update = %d\n" "\x1B[0m", timing_advance_update);
//pdu->data = gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->b;
sync_pos = nr_est_timing_advance_pusch(gNB, UE_id); // estimate timing advance for MAC
timing_advance_update = sync_pos * (1 << mu); // scale by the used scs numerology
// scale the 16 factor in N_TA calculation in 38.213 section 4.2 according to the used FFT size
switch (gNB->frame_parms.N_RB_DL) {
// case 6: /* nothing to do */ break;
// case 15: timing_advance_update /= 2; break;
// case 25: timing_advance_update /= 4; break;
// case 50: timing_advance_update /= 8; break;
// case 75: timing_advance_update /= 12; break;
case 106: timing_advance_update /= 16; break;
case 217: timing_advance_update /= 32; break;
case 245: timing_advance_update /= 32; break;
case 273: timing_advance_update /= 32; break;
default: abort();
}
@@ -349,6 +353,8 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
if (timing_advance_update < 0) timing_advance_update = 0;
if (timing_advance_update > 63) timing_advance_update = 63;
LOG_D(PHY, "Estimated timing advance PUSCH is = %d, timing_advance_update is %d \n", sync_pos,timing_advance_update);
pdu->rx_indication_rel8.timing_advance = timing_advance_update;
// estimate UL_CQI for MAC (from antenna port 0 only)
@@ -368,7 +374,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
pthread_mutex_unlock(&gNB->UL_INFO_mutex);
}
void nr_fill_crc_indication (PHY_VARS_gNB *gNB, int UE_id, int frame, int slot_rx, uint8_t crc_flag) {
void nr_fill_crc_indication (PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t crc_flag) {
pthread_mutex_lock(&gNB->UL_INFO_mutex);
nfapi_crc_indication_pdu_t *pdu = &gNB->UL_INFO. crc_ind.crc_indication_body.crc_pdu_list[gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs];
gNB->UL_INFO.crc_ind.sfn_sf = frame<<4 | slot_rx;
@@ -385,7 +391,6 @@ void nr_fill_crc_indication (PHY_VARS_gNB *gNB, int UE_id, int frame, int slot_r
pthread_mutex_unlock(&gNB->UL_INFO_mutex);
}
void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
uint8_t symbol;
@@ -412,9 +417,10 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
int num_pusch_pdu = UL_tti_req->n_pdus;
LOG_D(PHY,"phy_procedures_gNB_uespec_RX frame %d, slot %d, num_pusch_pdu %d\n",frame_rx,slot_rx,num_pusch_pdu);
for (int i = 0; i < num_pusch_pdu; i++) {
gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus = 0;
for (int i = 0; i < num_pusch_pdu; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
{
@@ -434,8 +440,6 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
//LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[UE_id]->rxdataF_comp[0],6900,1,1);
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[UE_id]->rxdataF_ext[0],6900,1,1);
nr_ulsch_procedures(gNB, frame_rx, slot_rx, UE_id, harq_pid);
/*nr_fill_crc_indication (gNB, UE_id, frame_rx, slot_rx, 1);
nr_fill_rx_indication(gNB, frame_rx, slot_rx, UE_id, harq_pid); // indicate SDU to MAC*/
}
}
}
+7 -1
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@@ -289,7 +289,13 @@ uint16_t nr_get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1);
int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,int16_t timing_advance);
/*! \brief Compute the timing adjustment at UE side from the old TA offset and the new received TA command
@param Mod_id Local UE index on which to act
@param CC_id Component Carrier Index
@param ta_command TA command received from the network
@param mu numerology index (0,1,2..)
*/
void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint16_t timing_advance);
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
+158 -22
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@@ -21,11 +21,11 @@
/*! \file phy_procedures_nr_ue.c
* \brief Implementation of UE procedures from 36.213 LTE specifications
* \author R. Knopp, F. Kaltenberger, N. Nikaein, A. Mico Pereperez
* \author R. Knopp, F. Kaltenberger, N. Nikaein, A. Mico Pereperez, G. Casati
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr, navid.nikaein@eurecom.fr
* \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr, navid.nikaein@eurecom.fr, guido.casati@iis.fraunhofer.de
* \note
* \warning
*/
@@ -45,6 +45,7 @@
//#include "PHY/extern.h"
#include "SCHED_NR_UE/defs.h"
#include "SCHED_NR/extern.h"
#include "SCHED_NR_UE/phy_sch_processing_time.h"
//#include <sched.h>
//#include "targets/RT/USER/nr-softmodem.h"
#include "PHY/NR_UE_ESTIMATION/nr_estimation.h"
@@ -421,22 +422,6 @@ void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,ui
LOG_I(PHY,"[UE %d] AbsoluteSubFrame %d.%d, received (rar) timing_advance %d\n",ue->Mod_id,proc->frame_rx, proc->nr_tti_rx, ue->timing_advance);
#endif
}
void nr_process_timing_advance(uint8_t Mod_id,uint8_t CC_id,int16_t timing_advance)
{
// uint32_t frame = PHY_vars_UE_g[Mod_id]->frame;
// timing advance has Q1.5 format
timing_advance = timing_advance - 31;
PHY_vars_UE_g[Mod_id][CC_id]->timing_advance = PHY_vars_UE_g[Mod_id][CC_id]->timing_advance+timing_advance*4; //this is for 25RB only!!!
LOG_D(PHY,"[UE %d] Got timing advance %d from MAC, new value %d\n",Mod_id, timing_advance, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
}
uint8_t nr_is_SR_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id)
@@ -1560,6 +1545,28 @@ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDUR
#endif
void nr_process_timing_advance(module_id_t Mod_id, uint8_t CC_id, uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB){
// 3GPP TS 38.213 p4.2
// scale by the scs numerology
int factor_mu = 1 << mu;
uint16_t bw_scaling;
// scale the 16 factor in N_TA calculation in 38.213 section 4.2 according to the used FFT size
switch (bwp_ul_NB_RB) {
case 106: bw_scaling = 16; break;
case 217: bw_scaling = 32; break;
case 245: bw_scaling = 32; break;
case 273: bw_scaling = 32; break;
default: abort();
}
PHY_vars_UE_g[Mod_id][CC_id]->timing_advance += (ta_command - 31) * bw_scaling / factor_mu;
LOG_D(PHY, "[UE %d] Got timing advance command %u from MAC, new value is %u\n", Mod_id, ta_command, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
}
#if 0
void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
@@ -3160,7 +3167,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
dl_indication.dci_ind = &dci_ind;
// send to mac
ue->if_inst->dl_indication(&dl_indication);
ue->if_inst->dl_indication(&dl_indication, NULL);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_rx_pdcch_stats);
@@ -3538,7 +3545,6 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
int ret=0, ret1=0;
//int CC_id = ue->CC_id;
NR_UE_PDSCH *pdsch_vars;
uint8_t is_cw0_active = 0;
uint8_t is_cw1_active = 0;
@@ -3549,6 +3555,20 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
uint16_t nb_symb_sch = 9;
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
// params for UL time alignment procedure
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[eNB_id];
uint16_t slots_per_frame = ue->frame_parms.slots_per_frame;
uint16_t slots_per_subframe = ue->frame_parms.slots_per_subframe;
uint8_t numerology = ue->frame_parms.numerology_index, mapping_type_ul, mapping_type_dl;
int ul_tx_timing_adjustment, N_TA_max, factor_mu, N_t_1, N_t_2, N_1, N_2, d_1_1 = 0, d_2_1, d;
uint8_t d_2_2 = 0;// set to 0 because there is only 1 BWP
// TODO this should corresponds to the switching time as defined in
// TS 38.133
uint16_t ofdm_symbol_size = ue->frame_parms.ofdm_symbol_size;
uint16_t nb_prefix_samples = ue->frame_parms.nb_prefix_samples;
uint32_t t_subframe = 1; // subframe duration of 1 msec
uint16_t bw_scaling, start_symbol;
float tc_factor;
if (dlsch0==NULL)
AssertFatal(0,"dlsch0 should be defined at this level \n");
@@ -3557,6 +3577,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
harq_pid = dlsch0->current_harq_pid;
is_cw0_active = dlsch0->harq_processes[harq_pid]->status;
nb_symb_sch = dlsch0->harq_processes[harq_pid]->nb_symbols;
start_symbol = dlsch0->harq_processes[harq_pid]->start_symbol;
@@ -3808,13 +3829,128 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
dl_indication.dci_ind = NULL; //&ue->dci_ind;
// send to mac
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication);
ue->if_inst->dl_indication(&dl_indication, ul_time_alignment);
}
}
// TODO CRC check for CW0
// Check CRC for CW 0
/*if (ret == (1+dlsch0->max_turbo_iterations)) {
*dlsch_errors=*dlsch_errors+1;
if(dlsch0->rnti != 0xffff){
LOG_D(PHY,"[UE %d][PDSCH %x/%d] AbsSubframe %d.%d : DLSCH CW0 in error (rv %d,round %d, mcs %d,TBS %d)\n",
ue->Mod_id,dlsch0->rnti,
harq_pid,frame_rx,subframe_rx,
dlsch0->harq_processes[harq_pid]->rvidx,
dlsch0->harq_processes[harq_pid]->round,
dlsch0->harq_processes[harq_pid]->mcs,
dlsch0->harq_processes[harq_pid]->TBS);
}
} else {
if(dlsch0->rnti != 0xffff){
LOG_D(PHY,"[UE %d][PDSCH %x/%d] AbsSubframe %d.%d : Received DLSCH CW0 (rv %d,round %d, mcs %d,TBS %d)\n",
ue->Mod_id,dlsch0->rnti,
harq_pid,frame_rx,subframe_rx,
dlsch0->harq_processes[harq_pid]->rvidx,
dlsch0->harq_processes[harq_pid]->round,
dlsch0->harq_processes[harq_pid]->mcs,
dlsch0->harq_processes[harq_pid]->TBS);
}
if ( LOG_DEBUGFLAG(DEBUG_UE_PHYPROC)){
int j;
LOG_D(PHY,"dlsch harq_pid %d (rx): \n",dlsch0->current_harq_pid);
for (j=0; j<dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS>>3; j++)
LOG_T(PHY,"%x.",dlsch0->harq_processes[dlsch0->current_harq_pid]->b[j]);
LOG_T(PHY,"\n");
}*/
if (ue->mac_enabled == 1) {
// scale the 16 factor in N_TA calculation in 38.213 section 4.2 according to the used FFT size
switch (ue->frame_parms.N_RB_DL) {
case 106: bw_scaling = 16; break;
case 217: bw_scaling = 32; break;
case 245: bw_scaling = 32; break;
case 273: bw_scaling = 32; break;
default: abort();
}
/* Time Alignment procedure
// - UE processing capability 1
// - Setting the TA update to be applied after the reception of the TA command
// - Timing adjustment computed according to TS 38.213 section 4.2
// - Durations of N1 and N2 symbols corresponding to PDSCH and PUSCH are
// computed according to sections 5.3 and 6.4 of TS 38.214 */
factor_mu = 1 << numerology;
N_TA_max = 3846 * bw_scaling / factor_mu;
/* PDSCH decoding time N_1 for processing capability 1 */
if (ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition == pdsch_dmrs_pos0)
N_1 = pdsch_N_1_capability_1[numerology][1];
else if (ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition == pdsch_dmrs_pos1 || ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition == 2) // TODO set to pdsch_dmrs_pos2 when available
N_1 = pdsch_N_1_capability_1[numerology][2];
else
N_1 = pdsch_N_1_capability_1[numerology][3];
/* PUSCH preapration time N_2 for processing capability 1 */
N_2 = pusch_N_2_timing_capability_1[numerology][1];
mapping_type_dl = ue->PDSCH_Config.pdsch_TimeDomainResourceAllocation[0]->mappingType;
mapping_type_ul = ue->pusch_config.pusch_TimeDomainResourceAllocation[0]->mappingType;
/* d_1_1 depending on the number of PDSCH symbols allocated */
d = 0; // TODO number of overlapping symbols of the scheduling PDCCH and the scheduled PDSCH
if (mapping_type_dl == typeA)
if (nb_symb_sch + start_symbol < 7)
d_1_1 = 7 - (nb_symb_sch + start_symbol);
else
d_1_1 = 0;
else // mapping type B
switch (nb_symb_sch){
case 7: d_1_1 = 0; break;
case 4: d_1_1 = 3; break;
case 2: d_1_1 = 3 + d; break;
default: break;
}
/* d_2_1 */
if (mapping_type_ul == typeB && start_symbol != 0)
d_2_1 = 0;
else
d_2_1 = 1;
/* N_t_1 time duration in msec of N_1 symbols corresponding to a PDSCH reception time
// N_t_2 time duration in msec of N_2 symbols corresponding to a PUSCH preparation time */
N_t_1 = (N_1 + d_1_1) * (ofdm_symbol_size + nb_prefix_samples) / factor_mu;
N_t_2 = (N_2 + d_2_1) * (ofdm_symbol_size + nb_prefix_samples) / factor_mu;
if (N_t_2 < d_2_2) N_t_2 = d_2_2;
/* Time alignment procedure */
// N_t_1 + N_t_2 + N_TA_max is in unit of Ts, therefore must be converted to Tc
// N_t_1 + N_t_2 + N_TA_max must be in msec
tc_factor = 64 * 0.509 * 10e-7;
ul_tx_timing_adjustment = 1 + ceil(slots_per_subframe*((N_t_1 + N_t_2 + N_TA_max)*tc_factor + 0.5)/t_subframe);
if (ul_time_alignment->apply_ta == 1){
ul_time_alignment->ta_slot = (nr_tti_rx + ul_tx_timing_adjustment) % slots_per_frame;
if (nr_tti_rx + ul_tx_timing_adjustment > slots_per_frame){
ul_time_alignment->ta_frame = (frame_rx + 1) % 1024;
} else {
ul_time_alignment->ta_frame = frame_rx;
}
// reset TA flag
ul_time_alignment->apply_ta = 0;
LOG_D(PHY,"Frame %d slot %d -- Starting UL time alignment procedures. TA update will be applied at frame %d slot %d\n", frame_rx, nr_tti_rx, ul_time_alignment->ta_frame, ul_time_alignment->ta_slot);
}
}
/*ue->total_TBS[eNB_id] = ue->total_TBS[eNB_id] + dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS;
ue->total_received_bits[eNB_id] = ue->total_TBS[eNB_id] + dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS;
}*/
// TODO CRC check for CW1
}
}
@@ -0,0 +1,109 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file phy_sch_processing_time.h
\brief tables for UE PDSCH processing and UE PUSCH preparation procedure time
from TS 38.214 Physical procedures for data v15.6.0
\author Guido Casati
\date 2019
\version 0.1
\company Fraunhofer IIS
\email: guido.casati@iis.fraunhofer.de
\note
\warning
*/
/* TS 38.214 Table 5.3-1: PDSCH processing time for PDSCH processing capability 1
// corresponding to the PDSCH decoding time N_1 [symbols]
// where mu corresponds to the one of {mu_PDCCH, mu_PDSCH, mu_UL}
// resulting with the largest T_proc_1
// where mu_PDCCH is the SCS of PDCCH scheduling PDSCH
// mu_PDSCH is the SCS of the scheduled PDSCH
// mu_UL is the SCS of the UL channel with which the HARQ-ACK is to be transmitted
// column A is N_1 corresponding to dmrs-AdditionalPosition pos0 in DMRS-DownlinkConfig
// in both dmrs-DownlinkForPDSCH-MappingTypeA and dmrs-DownlinkForPDSCH-MappingTypeB
// column B is N_1 corresponding to corresponds to dmrs-AdditionalPosition !0
// in DMRS-DownlinkConfig in both dmrs-DownlinkForPDSCH-MappingTypeA,
// dmrs-DownlinkForPDSCH-MappingTypeB or if the higher layer param is not configured
// when PDSCH DM-RS position l1 for the additional DM-RS is l1 = 1,2
// column C is N_1 corresponding to corresponds to dmrs-AdditionalPosition !0
// in DMRS-DownlinkConfig in both dmrs-DownlinkForPDSCH-MappingTypeA,
// dmrs-DownlinkForPDSCH-MappingTypeB or if the higher layer param is not configured
// when PDSCH DM-RS position l1 for the additional DM-RS is != 1,2
*/
int8_t pdsch_N_1_capability_1[4][4] = {
/* mu A B C */
{ 0, 8, 14, 13 },
{ 1, 10, 13, 13 },
{ 2, 17, 20, 20 },
{ 3, 20, 24, 24 },
};
/* TS 38.214 Table 5.3-2: PDSCH processing time for PDSCH processing capability 2
// corresponding to the PDSCH decoding time N_1 [symbols]
// where mu corresponds to the one of {mu_PDCCH, mu_PDSCH, mu_UL}
// resulting with the largest T_proc_1
// where mu_PDCCH is the SCS of PDCCH scheduling PDSCH
// mu_PDSCH is the SCS of the scheduled PDSCH
// mu_UL is the SCS of the UL channel with which the HARQ-ACK is to be transmitted
// column A is N_1 corresponding to dmrs-AdditionalPosition pos0 in DMRS-DownlinkConfig in both
// dmrs-DownlinkForPDSCH-MappingTypeA and dmrs-DownlinkForPDSCH-MappingTypeB
// mu == 2 is for FR1 only
*/
float pdsch_N_1_capability_2[3][2] = {
/* mu A */
{ 0, 3 },
{ 1, 4.5 },
{ 2, 9 },
};
/* TS 38.214 Table 6.4-1: PUSCH preparation time for PUSCH timing capability 1
// corresponding to the PUSCH preparation time N_2 [symbols]
// where mu corresponds to the one of {mu_DL, mu_UL}
// resulting with the largest T_proc_2
// where mu_DL is the SCS with which the PDCCH
// carrying the DCI scheduling the PUSCH was transmitted
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
*/
int8_t pusch_N_2_timing_capability_1[4][2] = {
/* mu N_2 */
{ 0, 10 },
{ 1, 12 },
{ 2, 23 },
{ 3, 36 },
};
/* TS 38.214 Table 6.4-2: PUSCH preparation time for PUSCH timing capability 2
// corresponding to the PUSCH preparation time N_2 [symbols]
// where mu corresponds to the one of {mu_DL, mu_UL}
// resulting with the largest T_proc_2
// where mu_DL is the SCS with which the PDCCH
// carrying the DCI scheduling the PUSCH was transmitted
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
// mu == 2 is for FR1 only
*/
float pusch_N_2_timing_capability_2[3][2] = {
/* mu N_2 */
{ 0, 5 },
{ 1, 5.5 },
{ 2, 11 },
};
+1 -1
View File
@@ -36,7 +36,7 @@
#include "assertions.h"
#include "PHY/defs_UE.h"
#include "PHY/phy_extern_ue.h"
#include "executables/nr-uesoftmodem.h"
//#include "executables/nr-uesoftmodem.h"
#include "targets/RT/USER/lte-softmodem.h"
#include "PHY/LTE_UE_TRANSPORT/transport_proto_ue.h"
+1 -1
View File
@@ -56,7 +56,7 @@ RAN_CONTEXT_t RC;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf;
int nfapi_mode = 0;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
// needed for some functions
+4 -1
View File
@@ -63,7 +63,7 @@ RAN_CONTEXT_t RC;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf;
int nfapi_mode=0;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
//Dummy Functions
@@ -550,6 +550,9 @@ int main(int argc, char **argv)
nr_gold_pdcch(UE,0,2);
RC.nb_nr_macrlc_inst = 1;
RC.nb_nr_mac_CC = (int*)malloc(RC.nb_nr_macrlc_inst*sizeof(int));
for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
RC.nb_nr_mac_CC[i] = 1;
mac_top_init_gNB();
gNB_mac = RC.nrmac[0];
+1 -1
View File
@@ -55,7 +55,7 @@ RAN_CONTEXT_t RC;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf;
int nfapi_mode=0;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
// needed for some functions
+1 -1
View File
@@ -53,7 +53,7 @@ openair0_config_t openair0_cfg[MAX_CARDS];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf;
int nfapi_mode=0;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
// needed for some functions
+1 -1
View File
@@ -55,7 +55,7 @@ RAN_CONTEXT_t RC;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf;
int nfapi_mode = 0;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
// needed for some functions
+5 -1
View File
@@ -64,7 +64,7 @@ RAN_CONTEXT_t RC;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf;
int nfapi_mode = 0;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
// dummy functions
@@ -394,6 +394,10 @@ int main(int argc, char **argv)
gNB = RC.gNB[0][0];
//gNB_config = &gNB->gNB_config;
//memset((void *)&gNB->UL_INFO,0,sizeof(gNB->UL_INFO));
gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list = (nfapi_rx_indication_pdu_t *)malloc(NB_UE_INST*sizeof(nfapi_rx_indication_pdu_t));
gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus = 0;
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
frame_parms->nb_antennas_tx = n_tx;
frame_parms->nb_antennas_rx = n_rx;