From 9fb4f28e288b9ea082f47157879f0ffab5ab46ab Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 12 Aug 2021 10:57:55 +0200 Subject: [PATCH 001/102] fix in checking available RBs for msg3 allocationg --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 22 +++++++++++++------ 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 220b4a921e..2aaa7e79ac 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -745,10 +745,19 @@ void nr_get_Msg3alloc(module_id_t module_id, LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex); uint16_t *vrb_map_UL = &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE]; - const uint16_t bwpSize = NRRIV2BW(ubwp ? - ubwp->bwp_Common->genericParameters.locationAndBandwidth : - scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, - MAX_BWP_SIZE); + + int bwpSize = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + int bwpStart = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + + if (ra->CellGroup) { + AssertFatal(ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1, + "downlinkBWP_ToAddModList has %d BWP!\n", ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count); + NR_BWP_Uplink_t *ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->bwp_id - 1]; + int act_bwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + int act_bwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + if ((bwpStart < act_bwp_start) || (bwpSize > act_bwp_size)) + bwpStart = act_bwp_start; + } /* search msg3_nb_rb free RBs */ int rbSize = 0; @@ -756,11 +765,11 @@ void nr_get_Msg3alloc(module_id_t module_id, while (rbSize < msg3_nb_rb) { rbStart += rbSize; /* last iteration rbSize was not enough, skip it */ rbSize = 0; - while (rbStart < bwpSize && vrb_map_UL[rbStart]) + while (rbStart < bwpSize && vrb_map_UL[rbStart + bwpStart]) rbStart++; AssertFatal(rbStart < bwpSize - msg3_nb_rb, "no space to allocate Msg 3 for RA!\n"); while (rbStart + rbSize < bwpSize - && !vrb_map_UL[rbStart + rbSize] + && !vrb_map_UL[rbStart + bwpStart + rbSize] && rbSize < msg3_nb_rb) rbSize++; } @@ -871,7 +880,6 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t pusch_pdu->dmrs_ports = 1; // 6.2.2 in 38.214 only port 0 to be used pusch_pdu->num_dmrs_cdm_grps_no_data = 2; // no data in dmrs symbols as in 6.2.2 in 38.214 pusch_pdu->resource_alloc = 1; //type 1 - //pusch_pdu->rb_start = ra->msg3_first_rb + ibwp_start - abwp_start; // as for 6.3.1.7 in 38.211 pusch_pdu->rb_start = ra->msg3_first_rb; if (ra->msg3_nb_rb > pusch_pdu->bwp_size) AssertFatal(1==0,"MSG3 allocated number of RBs exceed the BWP size\n"); From 8f4a46e316f6efeffd1337643d20d9eccd8ba6c4 Mon Sep 17 00:00:00 2001 From: Francesco Mani Date: Thu, 12 Aug 2021 11:36:39 +0000 Subject: [PATCH 002/102] fix in msg3 tbs --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 2aaa7e79ac..1932ef5cee 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -905,7 +905,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t 12, // nb dmrs set for no data in dmrs symbol 0, //nb_rb_oh 0, // to verify tb scaling - pusch_pdu->nrOfLayers = 1)>>3; + pusch_pdu->nrOfLayers)>>3; // calling function to fill rar message nr_fill_rar(module_idP, ra, RAR_pdu, pusch_pdu); From 607578f0806b648dc0aaae9d25f1b2c75a719d0b Mon Sep 17 00:00:00 2001 From: mjoang Date: Mon, 16 Aug 2021 10:09:53 -0400 Subject: [PATCH 003/102] first version of sr bsr. --- openair2/LAYER2/NR_MAC_COMMON/nr_mac.h | 5 + openair2/LAYER2/NR_MAC_UE/config_ue.c | 9 + openair2/LAYER2/NR_MAC_UE/mac_defs.h | 16 +- openair2/LAYER2/NR_MAC_UE/mac_proto.h | 56 +- openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c | 2 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 277 +++++- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 839 ++++++++++++++++++- 7 files changed, 1152 insertions(+), 52 deletions(-) mode change 100755 => 100644 openair2/LAYER2/NR_MAC_UE/config_ue.c mode change 100755 => 100644 openair2/LAYER2/NR_MAC_UE/mac_defs.h mode change 100755 => 100644 openair2/LAYER2/NR_MAC_UE/mac_proto.h diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h index 6bb7970be6..f8f3b72cae 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h @@ -63,6 +63,11 @@ typedef enum frequency_range_e { FR2 } frequency_range_t; +#define NR_BSR_TRIGGER_NONE (0) /* No BSR Trigger */ +#define NR_BSR_TRIGGER_REGULAR (1) /* For Regular and ReTxBSR Expiry Triggers */ +#define NR_BSR_TRIGGER_PERIODIC (2) /* For BSR Periodic Timer Expiry Trigger */ +#define NR_BSR_TRIGGER_PADDING (4) /* For Padding BSR Trigger */ + // For both DL/UL-SCH // Except: // - UL/DL-SCH: fixed-size MAC CE(known by LCID) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c old mode 100755 new mode 100644 index 3f08b70930..2e0e0b23fd --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -754,6 +754,15 @@ int nr_rrc_mac_config_req_ue( // Setup the SSB to Rach Occasions mapping according to the config build_ssb_to_ro_map(mac); } + mac->scheduling_info.periodicBSR_SF = + MAC_UE_BSR_TIMER_NOT_RUNNING; + mac->scheduling_info.retxBSR_SF = + MAC_UE_BSR_TIMER_NOT_RUNNING; + mac->BSR_reporting_active = NR_BSR_TRIGGER_NONE; + LOG_D(MAC, "[UE %d]: periodic BSR %d (SF), retx BSR %d (SF)\n", + module_id, + mac->scheduling_info.periodicBSR_SF, + mac->scheduling_info.retxBSR_SF); /* if(mac_cell_group_configP != NULL){ diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h old mode 100755 new mode 100644 index 4b115adb3a..f5953e7845 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -325,15 +325,6 @@ typedef struct { } RAR_grant_t; -typedef struct { - - uint8_t phr_reporting; - uint16_t truncated_bsr; - uint16_t short_bsr; - uint16_t long_bsr; - -} NR_UE_MAC_CE_t; - typedef struct { int n_HARQ_ACK; uint32_t ack_payload; @@ -349,6 +340,7 @@ typedef struct { int8_t delta_pucch; } PUCCH_sched_t; + /*!\brief Top level UE MAC structure */ typedef struct { @@ -415,8 +407,12 @@ typedef struct { nr_ue_if_module_t *if_module; nr_phy_config_t phy_config; + /// BSR report flag management + uint8_t BSR_reporting_active; NR_UE_SCHEDULING_INFO scheduling_info; - NR_UE_MAC_CE_t nr_ue_mac_ce; + + /// PHR + uint8_t PHR_reporting_active; NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config; NR_SearchSpace_t *search_space_zero; diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h old mode 100755 new mode 100644 index 934d006d17..b1f71821cc --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -125,7 +125,53 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, int slot, int thread_id); -int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, int slotP); +/*! \fn int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slotP); + \brief Called by PHY to get sdu for PUSCH transmission. It performs the following operations: Checks BSR for DCCH, DCCH1 and DTCH corresponding to previous values computed either in SR or BSR procedures. It gets rlc status indications on DCCH,DCCH1 and DTCH and forms BSR elements and PHR in MAC header. CRNTI element is not supported yet. It computes transport block for up to 3 SDUs and generates header and forms the complete MAC SDU. +\param[in] Mod_id Instance id of UE in machine +\param[in] frameP subframe number +\param[in] slotP slot number +*/ +int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slotP); + +/*! \fn boolean_t update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index) + \brief get the rlc stats and update the bsr level for each lcid +\param[in] Mod_id instance of the UE +\param[in] frameP Frame index +\param[in] slot slotP number +\param[in] uint8_t gNB_index +*/ +boolean_t nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index); + +/*! \fn nr_locate_BsrIndexByBufferSize (int *table, int size, int value) + \brief locate the BSR level in the table as defined in 36.321. This function requires that he values in table to be monotonic, either increasing or decreasing. The returned value is not less than 0, nor greater than n-1, where n is the size of table. +\param[in] *table Pointer to BSR table +\param[in] size Size of the table +\param[in] value Value of the buffer +\return the index in the BSR_LEVEL table +*/ +uint8_t nr_locate_BsrIndexByBufferSize(const uint32_t *table, int size, + int value); + +/*! \fn int nr_get_sf_periodicBSRTimer(uint8_t periodicBSR_Timer) + \brief get the number of subframe from the periodic BSR timer configured by the higher layers +\param[in] periodicBSR_Timer timer for periodic BSR +\return the number of subframe +*/ +int nr_get_sf_periodicBSRTimer(uint8_t bucketSize); + +/*! \fn int nr_get_ms_bucketsizeduration(uint8_t bucketSize) + \brief get the time in ms form the bucket size duration configured by the higher layer +\param[in] bucketSize the bucket size duration +\return the time in ms +*/ +int nr_get_ms_bucketsizeduration(uint8_t bucketsizeduration); + +/*! \fn int nr_get_sf_retxBSRTimer(uint8_t retxBSR_Timer) + \brief get the number of subframe form the bucket size duration configured by the higher layer +\param[in] retxBSR_Timer timer for regular BSR +\return the time in sf +*/ +int nr_get_sf_retxBSRTimer(uint8_t retxBSR_Timer); int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, fapi_nr_dci_indication_pdu_t *dci_ind); int nr_ue_process_dci_indication_pdu(module_id_t module_id, int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci); @@ -170,7 +216,13 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, int pdu_id); int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, - NR_UE_MAC_INST_t *mac); + NR_UE_MAC_INST_t *mac, + uint8_t power_headroom, // todo: NR_POWER_HEADROOM_CMD *power_headroom, + uint16_t *crnti, + NR_BSR_SHORT *truncated_bsr, + NR_BSR_SHORT *short_bsr, + NR_BSR_LONG *long_bsr + ); void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15); diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c index 3320e4356b..9f4fceaecb 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c @@ -572,7 +572,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, } else { - size_sdu = nr_write_ce_ulsch_pdu(pdu, mac); + size_sdu = nr_write_ce_ulsch_pdu(pdu, mac, 0, &(mac->crnti), NULL, NULL, NULL); pdu += size_sdu; ra->Msg3_size = size_sdu; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index b3ca9bdec2..361decf066 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -1319,6 +1319,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, } else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ if (pucch->sr_payload == 1) { /* positive scheduling request */ + LOG_D(MAC,"%s(): SR transmitted pucch_resource == NULL O_SR %d O_ACK %d O_CSI %d\n",__func__, O_SR, O_ACK, O_CSI); if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */ else if (O_ACK == 2) @@ -1436,6 +1437,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, } else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ if (pucch->sr_payload == 1) { /* positive scheduling request */ + LOG_D(MAC,"%s(): SR transmitted PR_format0 O_SR %d O_ACK %d O_CSI %d\n",__func__, O_SR, O_ACK, O_CSI); if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */ else if (O_ACK == 2) @@ -2140,9 +2142,144 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, return false; } +int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ + // no UL-SCH resources available for this tti && UE has a valid PUCCH resources for SR configuration for this tti + DevCheck(module_idP < (int) NB_UE_INST, module_idP, NB_NR_UE_MAC_INST, 0); + NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); +#if 0 + // int MGL=6;// measurement gap length in ms + int MGRP = 0; // measurement gap repetition period in ms + int gapOffset = -1; + int T = 0; + // determin the measurement gap + if (mac->measGapConfig != NULL) { + if (mac->measGapConfig->choice.setup. + gapOffset.present == LTE_MeasGapConfig__setup__gapOffset_PR_gp0) { + MGRP = 40; + gapOffset = + mac->measGapConfig->choice. + setup.gapOffset.choice.gp0; + } else if (mac->measGapConfig->choice. + setup.gapOffset.present == + LTE_MeasGapConfig__setup__gapOffset_PR_gp1) { + MGRP = 80; + gapOffset = + mac->measGapConfig->choice. + setup.gapOffset.choice.gp1; + } else { + LOG_W(MAC, "Measurement GAP offset is unknown\n"); + } -int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, int slotP){ - return 0; + T = MGRP / 10; + DevAssert(T != 0); + + //check the measurement gap and sr prohibit timer + if ((subframe == gapOffset % 10) + && ((frameP % T) == (floor(gapOffset / 10))) + && (mac-> + scheduling_info.sr_ProhibitTimer_Running == 0)) { + mac->scheduling_info.SR_pending = 1; + return (0); + } + } + if ((mac->physicalConfigDedicated != NULL) && + (mac->scheduling_info.SR_pending == 1) && + (mac->scheduling_info.SR_COUNTER < + (1 << + (2 + + mac-> + physicalConfigDedicated->schedulingRequestConfig->choice.setup. + dsr_TransMax)))) { + LOG_D(MAC, + "[UE %d][SR %x] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", + module_idP, rnti, frameP, slot, + mac->scheduling_info.SR_COUNTER, + (1 << + (2 + + mac-> + physicalConfigDedicated->schedulingRequestConfig->choice. + setup.dsr_TransMax)), + mac->scheduling_info.SR_pending); +#endif + DSR_TRANSMAX_t dsr_TransMax = sr_n64; //TBD + uint16_t rnti = 0; //TBD + LOG_D(MAC, + "[UE %d][SR %x] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", + module_idP, rnti, frameP, slot, + mac->scheduling_info.SR_COUNTER, + (1 << + (2 + +// mac-> +// physicalConfigDedicated->schedulingRequestConfig->choice. +// setup.dsr_TransMax)), + dsr_TransMax)), + mac->scheduling_info.SR_pending); +/* + if ((mac->scheduling_info.sr_ProhibitTimer_Running == 0)) { + mac->scheduling_info.SR_pending = 1; + LOG_D(MAC, + "[UE %d][SR %x] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n", + module_idP, rnti, frameP, slot, + mac->scheduling_info.SR_COUNTER, + (1 << + (2 + +// mac-> +// physicalConfigDedicated->schedulingRequestConfig->choice. +// setup.dsr_TransMax)), + dsr_TransMax)), + mac->scheduling_info.SR_pending); + return (0); + } +*/ + if ((mac->scheduling_info.SR_pending == 1) && + (mac->scheduling_info.SR_COUNTER < + (1 << + (2 + + //mac-> + //physicalConfigDedicated->schedulingRequestConfig->choice.setup. + //dsr_TransMax)))) { + dsr_TransMax)))) { + LOG_D(MAC, + "[UE %d][SR %x] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n", + module_idP, rnti, frameP, slot, + mac->scheduling_info.SR_COUNTER, + (1 << + (2 + + //mac-> + //physicalConfigDedicated->schedulingRequestConfig->choice. + //setup.dsr_TransMax)), + dsr_TransMax)), + mac->scheduling_info.SR_pending); + mac->scheduling_info.SR_COUNTER++; + + // start the sr-prohibittimer : rel 9 and above + if (mac->scheduling_info.sr_ProhibitTimer > 0) { // timer configured + mac->scheduling_info.sr_ProhibitTimer--; + mac->scheduling_info. + sr_ProhibitTimer_Running = 1; + } else { + mac->scheduling_info. + sr_ProhibitTimer_Running = 0; + } + //mac->ul_active =1; + return (1); //instruct phy to signal SR + } else { + // notify RRC to relase PUCCH/SRS + // clear any configured dl/ul + // initiate RA + if (mac->scheduling_info.SR_pending) { + // release all pucch resource + //mac->physicalConfigDedicated = NULL; + //mac->ul_active = 0; + mac->BSR_reporting_active = + NR_BSR_TRIGGER_NONE; + LOG_I(MAC, "[UE %d] Release all SRs \n", module_idP); + } + + mac->scheduling_info.SR_pending = 0; + mac->scheduling_info.SR_COUNTER = 0; + return (0); + } } @@ -3384,13 +3521,17 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, * Return: number of written bytes */ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, - NR_UE_MAC_INST_t *mac) { + NR_UE_MAC_INST_t *mac, + uint8_t power_headroom, // todo: NR_POWER_HEADROOM_CMD *power_headroom, + uint16_t *crnti, + NR_BSR_SHORT *truncated_bsr, + NR_BSR_SHORT *short_bsr, + NR_BSR_LONG *long_bsr) { int mac_ce_len = 0; uint8_t mac_ce_size = 0; - NR_UE_MAC_CE_t *nr_ue_mac_ce = &mac->nr_ue_mac_ce; - - if (nr_ue_mac_ce->phr_reporting && mac->phr_Config != NULL) { + uint8_t *pdu = mac_ce; + if (power_headroom) { // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; @@ -3398,21 +3539,22 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, mac_ce++; // PHR MAC CE (1 octet) - ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->PH = 0; + ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->PH = power_headroom; ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->R1 = 0; - ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->PCMAX = 0; + ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->PCMAX = 0; // todo ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->R2 = 0; // update pointer and length mac_ce_size = sizeof(NR_SINGLE_ENTRY_PHR_MAC_CE); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); - + LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : power_headroom pdu %p mac_ce %p b\n", + pdu, mac_ce); } - if (!get_softmodem_params()->sa && get_softmodem_params()->do_ra && mac->ra.ra_state != RA_SUCCEEDED) { + if (crnti && (!get_softmodem_params()->sa && get_softmodem_params()->do_ra && mac->ra.ra_state != RA_SUCCEEDED)) { - LOG_D(NR_MAC, "In %s: generating C-RNTI MAC CE with C-RNTI %x\n", __FUNCTION__, mac->crnti); + LOG_D(NR_MAC, "In %s: generating C-RNTI MAC CE with C-RNTI %x\n", __FUNCTION__, (*crnti)); // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; @@ -3420,7 +3562,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, mac_ce++; // C-RNTI MAC CE (2 octets) - *(uint16_t *) mac_ce = mac->crnti; + *(uint16_t *) mac_ce = (*crnti); // update pointer and length mac_ce_size = sizeof(uint16_t); @@ -3429,55 +3571,118 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, } - if (nr_ue_mac_ce->truncated_bsr) { + if (truncated_bsr) { - LOG_D(NR_MAC, "In %s: generating short truncated BSR MAC CE with command %x\n", __FUNCTION__, nr_ue_mac_ce->truncated_bsr); - - // MAC CE fixed subheader + // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_S_TRUNCATED_BSR; mac_ce++; // Short truncated BSR MAC CE (1 octet) - ((NR_BSR_SHORT_TRUNCATED *) mac_ce)-> Buffer_size = 0; - ((NR_BSR_SHORT_TRUNCATED *) mac_ce)-> LcgID = 0; + ((NR_BSR_SHORT_TRUNCATED *) mac_ce)-> Buffer_size = truncated_bsr->Buffer_size; + ((NR_BSR_SHORT_TRUNCATED *) mac_ce)-> LcgID = truncated_bsr->LcgID;; // update pointer and length mac_ce_size = sizeof(NR_BSR_SHORT_TRUNCATED); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); + LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : truncated_bsr Buffer_size %d LcgID %d pdu %p mac_ce %p\n", + truncated_bsr->Buffer_size, truncated_bsr->LcgID, pdu, mac_ce); - } else if (nr_ue_mac_ce->short_bsr) { + } else if (short_bsr) { - LOG_D(NR_MAC, "In %s: generating short BSR MAC CE with command %x\n", __FUNCTION__, nr_ue_mac_ce->short_bsr); - - // MAC CE fixed subheader + // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_S_BSR; mac_ce++; // Short truncated BSR MAC CE (1 octet) - ((NR_BSR_SHORT *) mac_ce)->Buffer_size = nr_ue_mac_ce->short_bsr; - ((NR_BSR_SHORT *) mac_ce)->LcgID = 0; + ((NR_BSR_SHORT *) mac_ce)->Buffer_size = short_bsr->Buffer_size; + ((NR_BSR_SHORT *) mac_ce)->LcgID = short_bsr->LcgID; // update pointer and length mac_ce_size = sizeof(NR_BSR_SHORT); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); + LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : short_bsr Buffer_size %d LcgID %d pdu %p mac_ce %p\n", + short_bsr->Buffer_size, short_bsr->LcgID, pdu, mac_ce); + } else if (long_bsr) { - } else if (nr_ue_mac_ce->long_bsr) { - // MAC CE variable subheader - // todo ch 6.1.3.1. TS 38.321 - // ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->R = 0; - // ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->F = 0; - // ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->LCID = UL_SCH_LCID_L_BSR; - // ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->L = 0; - // sh_size = 2; + // MAC CE variable subheader + // ch 6.1.3.1. TS 38.321 + ((NR_MAC_SUBHEADER_SHORT *) mac_ce)->R = 0; + ((NR_MAC_SUBHEADER_SHORT *) mac_ce)->F = 0; + ((NR_MAC_SUBHEADER_SHORT *) mac_ce)->LCID = UL_SCH_LCID_L_BSR; - // Short truncated BSR MAC CE (1 octet) - // ((NR_BSR_LONG *) mac_ce)->Buffer_size0 = short_bsr; - // ((NR_BSR_LONG *) mac_ce)->LCGID0 = 0; - // mac_ce_size = sizeof(NR_BSR_LONG); // size is variable + NR_MAC_SUBHEADER_SHORT *mac_pdu_subheader_ptr = (NR_MAC_SUBHEADER_SHORT *) mac_ce; + mac_ce += 2; + + // Could move to nr_get_sdu() + uint8_t *Buffer_size_ptr= (uint8_t*) mac_ce + 1; + //int NR_BSR_LONG_SIZE = 1; + if (long_bsr->Buffer_size0 == 0) { + ((NR_BSR_LONG *) mac_ce)->LcgID0 = 0; + } else { + ((NR_BSR_LONG *) mac_ce)->LcgID0 = 1; + *Buffer_size_ptr++ = long_bsr->Buffer_size0; + //NR_BSR_LONG_SIZE++; + } + if (long_bsr->Buffer_size1 == 0) { + ((NR_BSR_LONG *) mac_ce)->LcgID1 = 0; + } else { + ((NR_BSR_LONG *) mac_ce)->LcgID1 = 1; + *Buffer_size_ptr++ = long_bsr->Buffer_size1; + //NR_BSR_LONG_SIZE++; + } + if (long_bsr->Buffer_size2 == 0) { + ((NR_BSR_LONG *) mac_ce)->LcgID2 = 0; + } else { + ((NR_BSR_LONG *) mac_ce)->LcgID2 = 1; + *Buffer_size_ptr++ = long_bsr->Buffer_size2; + //NR_BSR_LONG_SIZE++; + } + if (long_bsr->Buffer_size3 == 0) { + ((NR_BSR_LONG *) mac_ce)->LcgID3 = 0; + } else { + ((NR_BSR_LONG *) mac_ce)->LcgID3 = 1; + *Buffer_size_ptr++ = long_bsr->Buffer_size3; + //NR_BSR_LONG_SIZE++; + } + if (long_bsr->Buffer_size4 == 0) { + ((NR_BSR_LONG *) mac_ce)->LcgID4 = 0; + } else { + ((NR_BSR_LONG *) mac_ce)->LcgID4 = 1; + *Buffer_size_ptr++ = long_bsr->Buffer_size4; + //NR_BSR_LONG_SIZE++; + } + if (long_bsr->Buffer_size5 == 0) { + ((NR_BSR_LONG *) mac_ce)->LcgID5 = 0; + } else { + ((NR_BSR_LONG *) mac_ce)->LcgID5 = 1; + *Buffer_size_ptr++ = long_bsr->Buffer_size5; + //NR_BSR_LONG_SIZE++; + } + if (long_bsr->Buffer_size6 == 0) { + ((NR_BSR_LONG *) mac_ce)->LcgID6 = 0; + } else { + ((NR_BSR_LONG *) mac_ce)->LcgID6 = 1; + *Buffer_size_ptr++ = long_bsr->Buffer_size6; + //NR_BSR_LONG_SIZE++; + } + if (long_bsr->Buffer_size7 == 0) { + ((NR_BSR_LONG *) mac_ce)->LcgID7 = 0; + } else { + ((NR_BSR_LONG *) mac_ce)->LcgID7 = 1; + *Buffer_size_ptr++ = long_bsr->Buffer_size7; + //NR_BSR_LONG_SIZE++; + } + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_subheader_ptr)->L = mac_ce_size = (uint8_t*) Buffer_size_ptr - (uint8_t*) mac_ce; + LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : long_bsr size %d Lcgbit 0x%02x Buffer_size %d %d %d %d %d %d %d %d\n", mac_ce_size, *((uint8_t*) mac_ce), + ((NR_BSR_LONG *) mac_ce)->Buffer_size0, ((NR_BSR_LONG *) mac_ce)->Buffer_size1, ((NR_BSR_LONG *) mac_ce)->Buffer_size2, ((NR_BSR_LONG *) mac_ce)->Buffer_size3, + ((NR_BSR_LONG *) mac_ce)->Buffer_size4, ((NR_BSR_LONG *) mac_ce)->Buffer_size5, ((NR_BSR_LONG *) mac_ce)->Buffer_size6, ((NR_BSR_LONG *) mac_ce)->Buffer_size7); + // update pointer and length + mac_ce = (NR_MAC_SUBHEADER_FIXED *) Buffer_size_ptr; + mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_SHORT); } return mac_ce_len; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 05df14ae2e..8a5eff8dc1 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -53,6 +53,36 @@ #include +#define NR_SHORT_BSR_TABLE_SIZE 32 +#define NR_LONG_BSR_TABLE_SIZE 256 +//38.321 Table 6.1.3.1-1 +const uint32_t NR_SHORT_BSR_TABLE[NR_SHORT_BSR_TABLE_SIZE] = { + 0, 10, 14, 20, 28, 38, 53, 74, + 102, 142, 198, 276, 384, 535, 745, 1038, + 1446, 2014, 2806, 3909, 5446, 7587, 10570, 14726, +20516, 28581, 39818, 55474, 77284, 107669, 150000, 300000 +}; + +//38.321 Table 6.1.3.1-2 +const uint32_t NR_LONG_BSR_TABLE[NR_LONG_BSR_TABLE_SIZE] ={ + 0, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 22, 23, 25, 26, + 28, 30, 32, 34, 36, 38, 40, 43, 46, 49, 52, 55, 59, 62, 66, 71, + 75, 80, 85, 91, 97, 103, 110, 117, 124, 132, 141, 150, 160, 170, 181, 193, + 205, 218, 233, 248, 264, 281, 299, 318, 339, 361, 384, 409, 436, 464, 494, 526, + 560, 597, 635, 677, 720, 767, 817, 870, 926, 987, 1051, 1119, 1191, 1269, 1351, 1439, + 1532, 1631, 1737, 1850, 1970, 2098, 2234, 2379, 2533, 2698, 2873, 3059, 3258, 3469, 3694, 3934, + 4189, 4461, 4751, 5059, 5387, 5737, 6109, 6506, 6928, 7378, 7857, 8367, 8910, 9488, 10104, 10760, + 11458, 12202, 12994, 13838, 14736, 15692, 16711, 17795, 18951, 20181, 21491, 22885, 24371, 25953, 27638, 29431, + 31342, 33376, 35543, 37850, 40307, 42923, 45709, 48676, 51836, 55200, 58784, 62599, 66663, 70990, 75598, 80505, + 85730, 91295, 97221, 103532, 110252, 117409, 125030, 133146, 141789, 150992, 160793, 171231, 182345, 194182, 206786, 220209, + 234503, 249725, 265935, 283197, 301579, 321155, 342002, 364202, 387842, 413018, 439827, 468377, 498780, 531156, 565634, 602350, + 641449, 683087, 727427, 774645, 824928, 878475, 935498, 996222, 1060888, 1129752, 1203085, 1281179, 1364342, 1452903, 1547213, 1647644, + 1754595, 1868488, 1989774, 2118933, 2256475, 2402946, 2558924, 2725027, 2901912, 3090279, 3290873, 3504487, 3731968, 3974215, 4232186, 4506902, + 4799451, 5110989, 5442750, 5796046, 6172275, 6572925, 6999582, 7453933, 7937777, 8453028, 9001725, 9586039, 10208280, 10870913, 11576557, 12328006, +13128233, 13980403, 14887889, 15854280, 16883401, 17979324, 19146385, 20389201, 21712690, 23122088, 24622972, 26221280, 27923336, 29735875, 31666069, 33721553, +35910462, 38241455, 40723756, 43367187, 46182206, 49179951, 52372284, 55771835, 59392055, 63247269, 67352729, 71724679, 76380419, 81338368, 162676736, 4294967295 +}; + static prach_association_pattern_t prach_assoc_pattern; static ssb_list_info_t ssb_list; @@ -1069,10 +1099,417 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in } } + if (dl_info) { + return (CONNECTION_OK); + } + module_id_t mod_id = ul_info->module_id; + frame_t txFrameP = ul_info->frame_tx; + slot_t txSlotP = ul_info->slot_tx; + + // Handle the SR/BSR procedures per subframe + NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); + uint8_t gNB_indexP=0; +#if 0 + // Get RLC status info and update Bj for all lcids that are active + int lcid; // lcid index + for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { + if (mac->logicalChannelConfig[lcid]) { + // meausre the Bj + if ((directionP == SF_UL) + && (mac->scheduling_info.Bj[lcid] >= 0)) { + if (mac-> + logicalChannelConfig[lcid]->ul_SpecificParameters) { + bucketsizeduration = + mac->logicalChannelConfig + [lcid]->ul_SpecificParameters->prioritisedBitRate * + TTI; + bucketsizeduration_max = + get_ms_bucketsizeduration(mac->logicalChannelConfig + [lcid]->ul_SpecificParameters->bucketSizeDuration); + } else { + LOG_E(MAC, + "[UE %d] lcid %d, NULL ul_SpecificParameters\n", + mod_id, lcid); + AssertFatal(1 == 0, ""); + } + + if (mac->scheduling_info.Bj[lcid] > + bucketsizeduration_max) { + mac->scheduling_info.Bj[lcid] = + bucketsizeduration_max; + } else { + mac->scheduling_info.Bj[lcid] = + bucketsizeduration; + } + } + + /* + if (lcid == DCCH) { + LOG_D(MAC,"[UE %d][SR] Frame %d slot %d Pending data for SRB1=%d for LCGID %d \n", + mod_id, txFrameP,txSlotP,mac->scheduling_info.BSR[mac->scheduling_info.LCGID[lcid]], + // mac->scheduling_info.LCGID[lcid]); + } + */ + } + } +#endif + // Call BSR procedure as described in Section 5.4.5 in 38.321 + + // First check ReTxBSR Timer because it is always configured + // Decrement ReTxBSR Timer if it is running and not null + if ((mac->scheduling_info.retxBSR_SF != + MAC_UE_BSR_TIMER_NOT_RUNNING) + && (mac->scheduling_info.retxBSR_SF != 0)) { + mac->scheduling_info.retxBSR_SF--; + } + + // Decrement Periodic Timer if it is running and not null + if ((mac->scheduling_info.periodicBSR_SF != + MAC_UE_BSR_TIMER_NOT_RUNNING) + && (mac->scheduling_info.periodicBSR_SF != 0)) { + mac->scheduling_info.periodicBSR_SF--; + } + + //Check whether Regular BSR is triggered + if (nr_update_bsr(mod_id, txFrameP, txSlotP, gNB_indexP) == TRUE) { + // call SR procedure to generate pending SR and BSR for next PUCCH/PUSCH TxOp. This should implement the procedures + // outlined in Sections 5.4.4 an 5.4.5 of 38.321 + mac->scheduling_info.SR_pending = 1; + // Regular BSR trigger + mac->BSR_reporting_active |= + NR_BSR_TRIGGER_REGULAR; + LOG_I(MAC, + "[UE %d][BSR] Regular BSR Triggered Frame %d slot %d SR for PUSCH is pending\n", + mod_id, txFrameP, txSlotP); + } +#if 0 + // UE has no valid phy config dedicated || no valid/released SR + if ((mac->physicalConfigDedicated == NULL)) { + // cancel all pending SRs + mac->scheduling_info.SR_pending = 0; + mac->ul_active = 0; + LOG_T(MAC, "[UE %d] Release all SRs \n", mod_id); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME + (VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SCHEDULER, VCD_FUNCTION_OUT); +#if UE_TIMING_TRACE + stop_meas(&mac->nr_ue_scheduler); +#endif + return (CONNECTION_OK); + } + + if ((mac-> + physicalConfigDedicated->schedulingRequestConfig == NULL) + || (mac-> + physicalConfigDedicated->schedulingRequestConfig->present == + LTE_SchedulingRequestConfig_PR_release)) { + // initiate RA with CRNTI included in msg3 (no contention) as descibed in 36.321 sec 5.1.5 + // cancel all pending SRs + mac->scheduling_info.SR_pending = 0; + mac->ul_active = 0; + LOG_T(MAC, "[UE %d] Release all SRs \n", mod_id); + } +#endif return UE_CONNECTION_OK; } +boolean_t +nr_update_bsr(module_id_t module_idP, frame_t frameP, + slot_t slotP, uint8_t gNB_index) { + mac_rlc_status_resp_t rlc_status; + boolean_t bsr_regular_triggered = FALSE; + uint8_t lcid; + uint8_t lcgid; + uint8_t num_lcid_with_data = 0; // for LCID with data only if LCGID is defined + uint16_t lcgid_buffer_remain[NR_MAX_NUM_LCGID] = {0,0,0,0,0,0,0,0}; + int32_t lcid_bytes_in_buffer[NR_MAX_NUM_LCID]; + /* Array for ordering LCID with data per decreasing priority order */ + uint8_t lcid_reordered_array[NR_MAX_NUM_LCID]= + {NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + }; + uint8_t pos_next = 0; + //uint8_t highest_priority = 16; + uint8_t array_index = 0; + // Reset All BSR Infos + lcid_bytes_in_buffer[0] = 0; + NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); + for (lcid=DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { + // Reset transmission status + lcid_bytes_in_buffer[lcid] = 0; + mac->scheduling_info.LCID_status[lcid]=LCID_EMPTY; + } + + for (lcgid=0; lcgid < NR_MAX_NUM_LCGID; lcgid++) { + // Reset Buffer Info + mac->scheduling_info.BSR[lcgid]=0; + mac->scheduling_info.BSR_bytes[lcgid]=0; + } + + //Get Buffer Occupancy and fill lcid_reordered_array + for (lcid=DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { + //if (mac->logicalChannelConfig[lcid]) { + if (1) { + lcgid = mac->scheduling_info.LCGID[lcid]; + + // Store already available data to transmit per Group + if (lcgid < NR_MAX_NUM_LCGID) { + lcgid_buffer_remain[lcgid] += mac->scheduling_info.LCID_buffer_remain[lcid]; + } + + rlc_status = mac_rlc_status_ind(module_idP, mac->crnti,gNB_index,frameP,slotP,ENB_FLAG_NO,MBMS_FLAG_NO, + lcid, + 0, 0 + ); + + lcid_bytes_in_buffer[lcid] = rlc_status.bytes_in_buffer; + + if (rlc_status.bytes_in_buffer > 0) { + LOG_D(MAC,"[UE %d] PDCCH Tick : LCID%d LCGID%d has data to transmit =%d bytes at frame %d slot %d\n", + module_idP, lcid,lcgid,rlc_status.bytes_in_buffer,frameP,slotP); + mac->scheduling_info.LCID_status[lcid] = LCID_NOT_EMPTY; + + //Update BSR_bytes and position in lcid_reordered_array only if Group is defined + if (lcgid < NR_MAX_NUM_LCGID) { + num_lcid_with_data ++; + // sum lcid buffer which has same lcgid + mac->scheduling_info.BSR_bytes[lcgid] += rlc_status.bytes_in_buffer; + //Fill in the array + array_index = 0; + + do { + //if (mac->logicalChannelConfig[lcid]->ul_SpecificParameters->priority <= highest_priority) { + if (1) { + //Insert if priority is higher or equal (lower or equal in value) + for (pos_next=num_lcid_with_data-1; pos_next > array_index; pos_next--) { + lcid_reordered_array[pos_next] = lcid_reordered_array[pos_next - 1]; + } + + lcid_reordered_array[array_index] = lcid; + break; + } + + array_index ++; + } while ((array_index < num_lcid_with_data) && (array_index < NR_MAX_NUM_LCID)); + } + } + } + } + + // Check whether a regular BSR can be triggered according to the first cases in 36.321 + if (num_lcid_with_data) { + LOG_D(MAC, + "[UE %d] PDCCH Tick at frame %d slot %d: NumLCID with data=%d Reordered LCID0=%d LCID1=%d LCID2=%d\n", + module_idP, frameP, slotP, num_lcid_with_data, + lcid_reordered_array[0], lcid_reordered_array[1], + lcid_reordered_array[2]); + + for (array_index = 0; array_index < num_lcid_with_data; + array_index++) { + lcid = lcid_reordered_array[array_index]; + + /* UL data, for a logical channel which belongs to a LCG, becomes available for transmission in the RLC entity + either the data belongs to a logical channel with higher priority than the priorities of the logical channels + which belong to any LCG and for which data is already available for transmission + */ + if ((mac-> + scheduling_info.LCID_buffer_remain[lcid] == 0) + /* or there is no data available for any of the logical channels which belong to a LCG */ + || + (lcgid_buffer_remain + [mac->scheduling_info.LCGID[lcid]] == + 0)) { + bsr_regular_triggered = TRUE; + LOG_D(MAC, + "[UE %d] PDCCH Tick : MAC BSR Triggered LCID%d LCGID%d data become available at frame %d slot %d\n", + module_idP, lcid, + mac->scheduling_info.LCGID[lcid], + frameP, slotP); + break; + } + } + + // Trigger Regular BSR if ReTxBSR Timer has expired and UE has data for transmission + if (mac->scheduling_info.retxBSR_SF == 0) { + bsr_regular_triggered = TRUE; + + if ((mac->BSR_reporting_active & + NR_BSR_TRIGGER_REGULAR) == 0) { + LOG_I(MAC, + "[UE %d] PDCCH Tick : MAC BSR Triggered ReTxBSR Timer expiry at frame %d slot %d\n", + module_idP, frameP, slotP); + } + } + } + + //Store Buffer Occupancy in remain buffers for next TTI + for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { + mac->scheduling_info.LCID_buffer_remain[lcid] = + lcid_bytes_in_buffer[lcid]; + } + + return bsr_regular_triggered; +} + +uint8_t +nr_locate_BsrIndexByBufferSize(const uint32_t *table, int size, int value) { + uint8_t ju, jm, jl; + int ascend; + //DevAssert(size > 0); + //DevAssert(size <= 256); + + if (value == 0) { + return 0; //elseif (value > 150000) return 63; + } + + jl = 0; // lower bound + ju = size - 1; // upper bound + ascend = (table[ju] >= table[jl]) ? 1 : 0; // determine the order of the the table: 1 if ascending order of table, 0 otherwise + + while (ju - jl > 1) { //If we are not yet done, + jm = (ju + jl) >> 1; //compute a midpoint, + + if ((value >= table[jm]) == ascend) { + jl = jm; // replace the lower limit + } else { + ju = jm; //replace the upper limit + } + + LOG_T(MAC, + "[UE] searching BSR index %d for (BSR TABLE %d < value %d)\n", + jm, table[jm], value); + } + + if (value == table[jl]) { + return jl; + } else { + return jl + 1; //equally ju + } +} + +int nr_get_sf_periodicBSRTimer(uint8_t sf_offset) { + switch (sf_offset) { + case NR_BSR_Config__periodicBSR_Timer_sf1: + return 1; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf5: + return 5; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf10: + return 10; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf16: + return 16; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf20: + return 20; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf32: + return 32; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf40: + return 40; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf64: + return 64; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf80: + return 80; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf128: + return 128; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf160: + return 160; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf320: + return 320; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf640: + return 640; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf1280: + return 1280; + break; + + case NR_BSR_Config__periodicBSR_Timer_sf2560: + return 2560; + break; + + case NR_BSR_Config__periodicBSR_Timer_infinity: + default: + return 0xFFFF; + break; + } +} + +int nr_get_sf_retxBSRTimer(uint8_t sf_offset) { + switch (sf_offset) { + case NR_BSR_Config__retxBSR_Timer_sf10: + return 10; + break; + + case NR_BSR_Config__retxBSR_Timer_sf20: + return 20; + break; + + case NR_BSR_Config__retxBSR_Timer_sf40: + return 40; + break; + + case NR_BSR_Config__retxBSR_Timer_sf80: + return 80; + break; + + case NR_BSR_Config__retxBSR_Timer_sf160: + return 160; + break; + + case NR_BSR_Config__retxBSR_Timer_sf320: + return 320; + break; + + case NR_BSR_Config__retxBSR_Timer_sf640: + return 640; + break; + + case NR_BSR_Config__retxBSR_Timer_sf1280: + return 1280; + break; + + case NR_BSR_Config__retxBSR_Timer_sf2560: + return 2560; + break; + + case NR_BSR_Config__retxBSR_Timer_sf5120: + return 5120; + break; + + case NR_BSR_Config__retxBSR_Timer_sf10240: + return 10240; + break; + + default: + return -1; + break; + } +} + // PUSCH scheduler: // - Calculate the slot in which ULSCH should be scheduled. This is current slot + K2, // - where K2 is the offset between the slot in which UL DCI is received and the slot @@ -2047,19 +2484,135 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, uint16_t buflen) { int16_t buflen_remain = 0; + uint8_t bsr_len = 0, bsr_ce_len = 0, bsr_header_len = 0; + uint8_t phr_header_len = 0, phr_ce_len = 0, phr_len = 0; uint8_t lcid = 0; uint16_t sdu_length = 0; uint16_t num_sdus = 0; uint16_t sdu_length_total = 0; + NR_BSR_SHORT bsr_short, bsr_truncated; + NR_BSR_LONG bsr_long; + NR_BSR_SHORT *bsr_s = &bsr_short; + NR_BSR_LONG *bsr_l = &bsr_long; + NR_BSR_SHORT *bsr_t = &bsr_truncated; + //NR_POWER_HEADROOM_CMD phr; + //NR_POWER_HEADROOM_CMD *phr_p = &phr; + //unsigned short short_padding = 0, post_padding = 0, padding_len = 0; + unsigned short padding_len = 0; NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); + // Compute header length + int lcg_id = 0; + int lcg_id_bsr_trunc = 0; + //int highest_priority = 16; + int num_lcg_id_with_data = 0; const uint8_t sh_size = sizeof(NR_MAC_SUBHEADER_LONG); // Pointer used to build the MAC PDU by placing the RLC SDUs in the ULSCH buffer uint8_t *pdu = ulsch_buffer; +/* + * test code + */ +#define test_long_bsr +#ifdef test_long_bsr + mac->scheduling_info.BSR_bytes[0]=28; + mac->scheduling_info.BSR_bytes[1]=75; + mac->scheduling_info.BSR_bytes[2]=205; + mac->scheduling_info.BSR_bytes[3]=560; + mac->scheduling_info.BSR_bytes[4]=1532; + mac->scheduling_info.BSR_bytes[5]=4189; + mac->scheduling_info.BSR_bytes[6]=11458; + mac->scheduling_info.BSR_bytes[7]=31342; +#endif + // Preparing the MAC CEs sub-PDUs and get the total size - unsigned char mac_header_control_elements[16] = {0}; - int tot_mac_ce_len = nr_write_ce_ulsch_pdu(&mac_header_control_elements[0], mac); + bsr_header_len = 0; + //phr_header_len = 1; //sizeof(SCH_SUBHEADER_FIXED); + + while (lcg_id < NR_MAX_NUM_LCGID) { + if (mac->scheduling_info.BSR_bytes[lcg_id]) { + num_lcg_id_with_data++; + } + + lcg_id++; + } + + if (num_lcg_id_with_data) { + LOG_D(MAC, + "[UE %d] MAC Tx data pending at frame%d subframe %d nb LCG =%d Bytes for LCG0=%d LCG1=%d LCG2=%d LCG3=%d LCG4=%d LCG5=%d LCG6=%d LCG7=%d BSR Trigger status =%d TBS=%d\n", + module_idP, frameP, subframe, num_lcg_id_with_data, + mac->scheduling_info.BSR_bytes[0], + mac->scheduling_info.BSR_bytes[1], + mac->scheduling_info.BSR_bytes[2], + mac->scheduling_info.BSR_bytes[3], + mac->scheduling_info.BSR_bytes[4], + mac->scheduling_info.BSR_bytes[5], + mac->scheduling_info.BSR_bytes[6], + mac->scheduling_info.BSR_bytes[7], + mac->BSR_reporting_active, buflen); + } + + //Restart ReTxBSR Timer at new grant indication (36.321) + if (mac->scheduling_info.retxBSR_SF != + MAC_UE_BSR_TIMER_NOT_RUNNING) { + mac->scheduling_info.retxBSR_SF = + nr_get_sf_retxBSRTimer(mac-> + scheduling_info.retxBSR_Timer); + } + + // periodicBSR-Timer expires, trigger BSR + if ((mac->scheduling_info.periodicBSR_Timer != + NR_BSR_Config__periodicBSR_Timer_infinity) + && (mac->scheduling_info.periodicBSR_SF == 0)) { + // Trigger BSR Periodic + mac->BSR_reporting_active |= + NR_BSR_TRIGGER_PERIODIC; + LOG_D(MAC, + "[UE %d] MAC BSR Triggered PeriodicBSR Timer expiry at frame%d subframe %d TBS=%d\n", + module_idP, frameP, subframe, buflen); + } + + //Compute BSR Length if Regular or Periodic BSR is triggered + //WARNING: if BSR long is computed, it may be changed to BSR short during or after multiplexing if there remains less than 1 LCGROUP with data after Tx + if (mac->BSR_reporting_active) { + AssertFatal((mac->BSR_reporting_active & + NR_BSR_TRIGGER_PADDING) == 0, + "Inconsistent BSR Trigger=%d !\n", + mac->BSR_reporting_active); + + //A Regular or Periodic BSR can only be sent if TBS >= 4 as transmitting only a BSR is not allowed if UE has data to transmit + if (num_lcg_id_with_data <= 1) { + if (buflen >= (sizeof(NR_BSR_SHORT)+sizeof(NR_MAC_SUBHEADER_FIXED)+1)) { + bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte + bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); + } + } else { + if (buflen >= (num_lcg_id_with_data+1+sizeof(NR_MAC_SUBHEADER_SHORT)+1)) { + bsr_ce_len = num_lcg_id_with_data + 1; //variable size + bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); + } + } + } + + bsr_len = bsr_ce_len + bsr_header_len; + + phr_ce_len = + (mac->PHR_reporting_active == + 1) ? 1 /* sizeof(POWER_HEADROOM_CMD) */ : 0; + + if ((phr_ce_len > 0) + && ((phr_ce_len + phr_header_len + bsr_len) <= buflen)) { + phr_len = phr_ce_len + phr_header_len; + LOG_D(MAC, + "[UE %d] header size info: PHR len %d (ce%d,hdr%d) buff_len %d\n", + module_idP, phr_len, phr_ce_len, phr_header_len, buflen); + } else { + phr_len = 0; + phr_header_len = 0; + phr_ce_len = 0; + } + + int tot_mac_ce_len = bsr_len + phr_len; uint8_t total_mac_pdu_header_len = tot_mac_ce_len; LOG_D(NR_MAC, "In %s: [UE %d] [%d.%d] process UL transport block at with size TBS = %d bytes \n", __FUNCTION__, module_idP, frameP, subframe, buflen); @@ -2142,13 +2695,259 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total + sh_size); + //Update Buffer remain and BSR bytes after transmission + mac->scheduling_info.LCID_buffer_remain[lcid] -= sdu_length; + mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] -= sdu_length; + LOG_D(MAC, + "[UE %d] Update BSR Tx frame%d subframe %d nb LCG =%d Bytes for LCG%d=%d\n", + module_idP, frameP, subframe, num_lcg_id_with_data, mac->scheduling_info.LCGID[lcid], + mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]]); + if (mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] < 0) + mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] = 0; + + //Update the number of LCGID with data as BSR shall reflect status after BSR transmission + if ((num_lcg_id_with_data > 1) + && (mac-> + scheduling_info.BSR_bytes[mac-> + scheduling_info.LCGID[lcid]] + == 0)) { + num_lcg_id_with_data--; + + // Change BSR size to BSR SHORT if num_lcg_id_with_data becomes to 1 + if (bsr_len) { + if (num_lcg_id_with_data == 1) { + bsr_ce_len = sizeof(NR_BSR_SHORT); + bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); + bsr_len = bsr_ce_len + bsr_header_len; + total_mac_pdu_header_len = total_mac_pdu_header_len - tot_mac_ce_len + bsr_len + phr_len; + tot_mac_ce_len = bsr_len + phr_len; + } + else if (num_lcg_id_with_data > 1) { + bsr_ce_len = num_lcg_id_with_data + 1; + bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); + bsr_len = bsr_ce_len + bsr_header_len; + total_mac_pdu_header_len = total_mac_pdu_header_len - tot_mac_ce_len + bsr_len + phr_len; + tot_mac_ce_len = bsr_len + phr_len; + } + } + } + } + } + + // Compute BSR Values and update Nb LCGID with data after multiplexing + num_lcg_id_with_data = 0; + lcg_id_bsr_trunc = 0; + + for (lcg_id = 0; lcg_id < NR_MAX_NUM_LCGID; lcg_id++) { + if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { + mac->scheduling_info.BSR[lcg_id] = + nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE, NR_SHORT_BSR_TABLE_SIZE, + mac->scheduling_info. + BSR_bytes[lcg_id]); + } else { + mac->scheduling_info.BSR[lcg_id] = + nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE, NR_LONG_BSR_TABLE_SIZE, + mac->scheduling_info. + BSR_bytes[lcg_id]); + } + if (mac->scheduling_info.BSR_bytes[lcg_id]) { + num_lcg_id_with_data++; + lcg_id_bsr_trunc = lcg_id; + } + } + + if (bsr_ce_len) { + //Print updated BSR when sent + LOG_D(MAC, + "[UE %d] Remaining Buffer after Tx frame%d subframe %d nb LCG =%d Bytes for LCG0=%d LCG1=%d LCG2=%d LCG3=%d LCG4=%d LCG5=%d LCG6=%d LCG7=%d BSR Trigger status =%d TBS=%d\n", + module_idP, frameP, subframe, num_lcg_id_with_data, + mac->scheduling_info.BSR_bytes[0], + mac->scheduling_info.BSR_bytes[1], + mac->scheduling_info.BSR_bytes[2], + mac->scheduling_info.BSR_bytes[3], + mac->scheduling_info.BSR_bytes[4], + mac->scheduling_info.BSR_bytes[5], + mac->scheduling_info.BSR_bytes[6], + mac->scheduling_info.BSR_bytes[7], + mac->BSR_reporting_active, buflen); + LOG_D(MAC, + "[UE %d] Frame %d Subframe %d TX BSR Regular or Periodic size=%d BSR0=%d BSR1=%d BSR2=%d BSR3=%d BSR4=%d BSR5=%d BSR6=%d BSR7=%d\n", + module_idP, frameP, subframe, bsr_ce_len, + mac->scheduling_info.BSR[0], + mac->scheduling_info.BSR[1], + mac->scheduling_info.BSR[2], + mac->scheduling_info.BSR[3], + mac->scheduling_info.BSR[4], + mac->scheduling_info.BSR[5], + mac->scheduling_info.BSR[6], + mac->scheduling_info.BSR[7]); + } + +#if 0 + // build PHR and update the timers + if (phr_ce_len == sizeof(POWER_HEADROOM_CMD)) { + if(NFAPI_MODE==NFAPI_UE_STUB_PNF) { + //Substitute with a static value for the MAC layer abstraction (phy_stub mode) + phr_p->PH = 60; + } else { + phr_p->PH = get_phr_mapping(module_idP, CC_id, eNB_index); + } + + phr_p->R = 0; + LOG_D(MAC, + "[UE %d] Frame %d report PHR with mapping (%d->%d) for LCID %d\n", + module_idP, frameP, get_PHR(module_idP, CC_id, eNB_index), + phr_p->PH, POWER_HEADROOM); + update_phr(module_idP, CC_id); + } else { + phr_p = NULL; + } + + LOG_T(MAC, "[UE %d] Frame %d: bsr s %p bsr_l %p, phr_p %p\n", + module_idP, frameP, bsr_s, bsr_l, phr_p); +#endif + + // TS 38.321 Section 5.4.5 + // Check BSR padding: it is done after PHR according to Logical Channel Prioritization order + // Check for max padding size, ie MAC Hdr for last RLC PDU = 1 + /* For Padding BSR: + - if the number of padding bits is equal to or larger than the size of the Short BSR plus its subheader but smaller than the size of the Long BSR plus its subheader: + - if more than one LCG has data available for transmission in the TTI where the BSR is transmitted: report Truncated BSR of the LCG with the highest priority logical channel with data available for transmission; + - else report Short BSR. + - else if the number of padding bits is equal to or larger than the size of the Long BSR plus its subheader, report Long BSR. + */ + if (sdu_length_total) { + padding_len = + buflen - (total_mac_pdu_header_len + sdu_length_total); + } + + if ((padding_len) && (bsr_len == 0)) { + /* if the number of padding bits is equal to or larger than the size of the Long BSR plus its subheader, report Long BSR */ + if (padding_len >= (1 + num_lcg_id_with_data)) { + bsr_ce_len = 1 + num_lcg_id_with_data; + bsr_header_len = 1; + // Trigger BSR Padding + mac->BSR_reporting_active |= + NR_BSR_TRIGGER_PADDING; + } else if (padding_len >= (1 + sizeof(NR_BSR_SHORT))) { + bsr_ce_len = sizeof(NR_BSR_SHORT); + bsr_header_len = 1; + + if (num_lcg_id_with_data > 1) { + // REPORT TRUNCATED BSR + //Get LCGID of highest priority LCID with data + for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { +// if (mac-> +// logicalChannelConfig[lcid] != NULL) { + if (1) { + lcg_id = + mac->scheduling_info. + LCGID[lcid]; + + if ((lcg_id < NR_MAX_NUM_LCGID) + && (mac-> + scheduling_info.BSR_bytes[lcg_id]) + && +// (mac->logicalChannelConfig +// [lcid]->ul_SpecificParameters->priority <= +// highest_priority)) { + (1)) { +// highest_priority = +// mac-> +// logicalChannelConfig[lcid]-> +// ul_SpecificParameters->priority; + lcg_id_bsr_trunc = lcg_id; + } + } + } + } else { + //Report SHORT BSR, clear bsr_t + bsr_t = NULL; + } + + // Trigger BSR Padding + mac->BSR_reporting_active |= + NR_BSR_TRIGGER_PADDING; + } + + bsr_len = bsr_header_len + bsr_ce_len; + tot_mac_ce_len = bsr_len + phr_len; + } + + //Fill BSR Infos + if (bsr_ce_len == 0) { + bsr_s = NULL; + bsr_l = NULL; + bsr_t = NULL; + } else if (bsr_ce_len > sizeof(NR_BSR_SHORT)) { + bsr_s = NULL; + bsr_t = NULL; + bsr_l->Buffer_size0 = + mac->scheduling_info.BSR[0]; + bsr_l->Buffer_size1 = + mac->scheduling_info.BSR[1]; + bsr_l->Buffer_size2 = + mac->scheduling_info.BSR[2]; + bsr_l->Buffer_size3 = + mac->scheduling_info.BSR[3]; + bsr_l->Buffer_size4 = + mac->scheduling_info.BSR[4]; + bsr_l->Buffer_size5 = + mac->scheduling_info.BSR[5]; + bsr_l->Buffer_size6 = + mac->scheduling_info.BSR[6]; + bsr_l->Buffer_size7 = + mac->scheduling_info.BSR[7]; + LOG_D(MAC, + "[UE %d] Frame %d subframe %d BSR Trig=%d report long BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n", + module_idP, frameP, subframe, + mac->BSR_reporting_active, + mac->scheduling_info.BSR[0], + mac->scheduling_info.BSR[1], + mac->scheduling_info.BSR[2], + mac->scheduling_info.BSR[3], + mac->scheduling_info.BSR[4], + mac->scheduling_info.BSR[5], + mac->scheduling_info.BSR[6], + mac->scheduling_info.BSR[7]); + } else if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { + bsr_l = NULL; + + if ((bsr_t != NULL) + && (mac->BSR_reporting_active & + NR_BSR_TRIGGER_PADDING)) { + //Truncated BSR + bsr_s = NULL; + bsr_t->LcgID = lcg_id_bsr_trunc; + bsr_t->Buffer_size = + mac->scheduling_info. + BSR[lcg_id_bsr_trunc]; + LOG_D(MAC, + "[UE %d] Frame %d subframe %d BSR Trig=%d report TRUNCATED BSR with level %d for LCGID %d\n", + module_idP, frameP, subframe, + mac->BSR_reporting_active, + mac-> + scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); + } else { + bsr_t = NULL; + bsr_s->LcgID = lcg_id_bsr_trunc; + bsr_s->Buffer_size = + mac->scheduling_info. + BSR[lcg_id_bsr_trunc]; + LOG_D(MAC, + "[UE %d] Frame %d subframe %d BSR Trig=%d report SHORT BSR with level %d for LCGID %d\n", + module_idP, frameP, subframe, + mac->BSR_reporting_active, + mac-> + scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); } } if (tot_mac_ce_len > 0) { LOG_D(NR_MAC, "In %s copying %d bytes of MAC CEs to the UL PDU \n", __FUNCTION__, tot_mac_ce_len); - memcpy((void *) pdu, (void *) mac_header_control_elements, tot_mac_ce_len); + nr_write_ce_ulsch_pdu(pdu, mac, 0, NULL, bsr_t, bsr_s, bsr_l); + //memcpy((void *) pdu, (void *) mac_header_control_elements, tot_mac_ce_len); pdu += (unsigned char) tot_mac_ce_len; #ifdef ENABLE_MAC_PAYLOAD_DEBUG @@ -2194,6 +2993,40 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, log_dump(NR_MAC, ulsch_buffer, buflen, LOG_DUMP_CHAR, "\n"); #endif + LOG_D(NR_MAC, + "[UE %d][SR] Gave SDU to PHY, clearing any scheduling request\n", + module_idP); + mac->scheduling_info.SR_pending = 0; + mac->scheduling_info.SR_COUNTER = 0; + + /* Actions when a BSR is sent */ + if (bsr_ce_len) { + LOG_D(NR_MAC, + "[UE %d] MAC BSR Sent !! bsr (ce%d,hdr%d) buff_len %d\n", + module_idP, bsr_ce_len, bsr_header_len, buflen); + // Reset ReTx BSR Timer + mac->scheduling_info.retxBSR_SF = + nr_get_sf_retxBSRTimer(mac-> + scheduling_info.retxBSR_Timer); + LOG_D(NR_MAC, "[UE %d] MAC ReTx BSR Timer Reset =%d\n", module_idP, + mac->scheduling_info.retxBSR_SF); + + // Reset Periodic Timer except when BSR is truncated + if ((bsr_t == NULL) + && (mac->scheduling_info. + periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity)) { + mac->scheduling_info.periodicBSR_SF = + nr_get_sf_periodicBSRTimer(mac->scheduling_info. + periodicBSR_Timer); + LOG_D(NR_MAC, "[UE %d] MAC Periodic BSR Timer Reset =%d\n", + module_idP, + mac->scheduling_info.periodicBSR_SF); + } + + // Reset BSR Trigger flags + mac->BSR_reporting_active = BSR_TRIGGER_NONE; + } + return num_sdus > 0 ? 1 : 0; } From 5df1f412be5d00fecb2cfa20929fa9b43a05a62f Mon Sep 17 00:00:00 2001 From: mjoang Date: Mon, 16 Aug 2021 12:35:40 -0400 Subject: [PATCH 004/102] first version of sr bsr. remove test code --- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 35 +++++----- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 68 ++------------------ 2 files changed, 22 insertions(+), 81 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 361decf066..084298ba13 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -1319,7 +1319,6 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, } else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ if (pucch->sr_payload == 1) { /* positive scheduling request */ - LOG_D(MAC,"%s(): SR transmitted pucch_resource == NULL O_SR %d O_ACK %d O_CSI %d\n",__func__, O_SR, O_ACK, O_CSI); if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */ else if (O_ACK == 2) @@ -1437,7 +1436,6 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, } else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ if (pucch->sr_payload == 1) { /* positive scheduling request */ - LOG_D(MAC,"%s(): SR transmitted PR_format0 O_SR %d O_ACK %d O_CSI %d\n",__func__, O_SR, O_ACK, O_CSI); if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */ else if (O_ACK == 2) @@ -2146,7 +2144,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ // no UL-SCH resources available for this tti && UE has a valid PUCCH resources for SR configuration for this tti DevCheck(module_idP < (int) NB_UE_INST, module_idP, NB_NR_UE_MAC_INST, 0); NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); -#if 0 +#if 0 // todo // int MGL=6;// measurement gap length in ms int MGRP = 0; // measurement gap repetition period in ms int gapOffset = -1; @@ -2191,8 +2189,8 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ physicalConfigDedicated->schedulingRequestConfig->choice.setup. dsr_TransMax)))) { LOG_D(MAC, - "[UE %d][SR %x] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", - module_idP, rnti, frameP, slot, + "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", + module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, (1 << (2 + @@ -2201,11 +2199,10 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ setup.dsr_TransMax)), mac->scheduling_info.SR_pending); #endif - DSR_TRANSMAX_t dsr_TransMax = sr_n64; //TBD - uint16_t rnti = 0; //TBD + DSR_TRANSMAX_t dsr_TransMax = sr_n64; // todo LOG_D(MAC, - "[UE %d][SR %x] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", - module_idP, rnti, frameP, slot, + "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", + module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, (1 << (2 + @@ -2213,13 +2210,13 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ // physicalConfigDedicated->schedulingRequestConfig->choice. // setup.dsr_TransMax)), dsr_TransMax)), - mac->scheduling_info.SR_pending); + mac->scheduling_info.SR_pending); // todo /* if ((mac->scheduling_info.sr_ProhibitTimer_Running == 0)) { mac->scheduling_info.SR_pending = 1; LOG_D(MAC, - "[UE %d][SR %x] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n", - module_idP, rnti, frameP, slot, + "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n", + module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, (1 << (2 + @@ -2227,10 +2224,10 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ // physicalConfigDedicated->schedulingRequestConfig->choice. // setup.dsr_TransMax)), dsr_TransMax)), - mac->scheduling_info.SR_pending); + mac->scheduling_info.SR_pending); // todo return (0); } -*/ +*/ // todo if ((mac->scheduling_info.SR_pending == 1) && (mac->scheduling_info.SR_COUNTER < (1 << @@ -2240,8 +2237,8 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ //dsr_TransMax)))) { dsr_TransMax)))) { LOG_D(MAC, - "[UE %d][SR %x] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n", - module_idP, rnti, frameP, slot, + "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n", + module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, (1 << (2 + @@ -2249,7 +2246,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ //physicalConfigDedicated->schedulingRequestConfig->choice. //setup.dsr_TransMax)), dsr_TransMax)), - mac->scheduling_info.SR_pending); + mac->scheduling_info.SR_pending); // todo mac->scheduling_info.SR_COUNTER++; // start the sr-prohibittimer : rel 9 and above @@ -2269,8 +2266,8 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ // initiate RA if (mac->scheduling_info.SR_pending) { // release all pucch resource - //mac->physicalConfigDedicated = NULL; - //mac->ul_active = 0; + //mac->physicalConfigDedicated = NULL; // todo + //mac->ul_active = 0; // todo mac->BSR_reporting_active = NR_BSR_TRIGGER_NONE; LOG_I(MAC, "[UE %d] Release all SRs \n", module_idP); diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 8a5eff8dc1..f710f97829 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -2510,21 +2510,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // Pointer used to build the MAC PDU by placing the RLC SDUs in the ULSCH buffer uint8_t *pdu = ulsch_buffer; -/* - * test code - */ -#define test_long_bsr -#ifdef test_long_bsr - mac->scheduling_info.BSR_bytes[0]=28; - mac->scheduling_info.BSR_bytes[1]=75; - mac->scheduling_info.BSR_bytes[2]=205; - mac->scheduling_info.BSR_bytes[3]=560; - mac->scheduling_info.BSR_bytes[4]=1532; - mac->scheduling_info.BSR_bytes[5]=4189; - mac->scheduling_info.BSR_bytes[6]=11458; - mac->scheduling_info.BSR_bytes[7]=31342; -#endif - // Preparing the MAC CEs sub-PDUs and get the total size bsr_header_len = 0; //phr_header_len = 1; //sizeof(SCH_SUBHEADER_FIXED); @@ -2537,21 +2522,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, lcg_id++; } - if (num_lcg_id_with_data) { - LOG_D(MAC, - "[UE %d] MAC Tx data pending at frame%d subframe %d nb LCG =%d Bytes for LCG0=%d LCG1=%d LCG2=%d LCG3=%d LCG4=%d LCG5=%d LCG6=%d LCG7=%d BSR Trigger status =%d TBS=%d\n", - module_idP, frameP, subframe, num_lcg_id_with_data, - mac->scheduling_info.BSR_bytes[0], - mac->scheduling_info.BSR_bytes[1], - mac->scheduling_info.BSR_bytes[2], - mac->scheduling_info.BSR_bytes[3], - mac->scheduling_info.BSR_bytes[4], - mac->scheduling_info.BSR_bytes[5], - mac->scheduling_info.BSR_bytes[6], - mac->scheduling_info.BSR_bytes[7], - mac->BSR_reporting_active, buflen); - } - //Restart ReTxBSR Timer at new grant indication (36.321) if (mac->scheduling_info.retxBSR_SF != MAC_UE_BSR_TIMER_NOT_RUNNING) { @@ -2580,7 +2550,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, "Inconsistent BSR Trigger=%d !\n", mac->BSR_reporting_active); - //A Regular or Periodic BSR can only be sent if TBS >= 4 as transmitting only a BSR is not allowed if UE has data to transmit + //A Regular or Periodic BSR can only be sent if TBS is sufficient as transmitting only a BSR is not allowed if UE has data to transmit if (num_lcg_id_with_data <= 1) { if (buflen >= (sizeof(NR_BSR_SHORT)+sizeof(NR_MAC_SUBHEADER_FIXED)+1)) { bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte @@ -2756,34 +2726,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } } - if (bsr_ce_len) { - //Print updated BSR when sent - LOG_D(MAC, - "[UE %d] Remaining Buffer after Tx frame%d subframe %d nb LCG =%d Bytes for LCG0=%d LCG1=%d LCG2=%d LCG3=%d LCG4=%d LCG5=%d LCG6=%d LCG7=%d BSR Trigger status =%d TBS=%d\n", - module_idP, frameP, subframe, num_lcg_id_with_data, - mac->scheduling_info.BSR_bytes[0], - mac->scheduling_info.BSR_bytes[1], - mac->scheduling_info.BSR_bytes[2], - mac->scheduling_info.BSR_bytes[3], - mac->scheduling_info.BSR_bytes[4], - mac->scheduling_info.BSR_bytes[5], - mac->scheduling_info.BSR_bytes[6], - mac->scheduling_info.BSR_bytes[7], - mac->BSR_reporting_active, buflen); - LOG_D(MAC, - "[UE %d] Frame %d Subframe %d TX BSR Regular or Periodic size=%d BSR0=%d BSR1=%d BSR2=%d BSR3=%d BSR4=%d BSR5=%d BSR6=%d BSR7=%d\n", - module_idP, frameP, subframe, bsr_ce_len, - mac->scheduling_info.BSR[0], - mac->scheduling_info.BSR[1], - mac->scheduling_info.BSR[2], - mac->scheduling_info.BSR[3], - mac->scheduling_info.BSR[4], - mac->scheduling_info.BSR[5], - mac->scheduling_info.BSR[6], - mac->scheduling_info.BSR[7]); - } - -#if 0 +#if 0 // todo // build PHR and update the timers if (phr_ce_len == sizeof(POWER_HEADROOM_CMD)) { if(NFAPI_MODE==NFAPI_UE_STUB_PNF) { @@ -2839,7 +2782,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { // if (mac-> // logicalChannelConfig[lcid] != NULL) { - if (1) { + if (1) { // todo lcg_id = mac->scheduling_info. LCGID[lcid]; @@ -2851,7 +2794,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // (mac->logicalChannelConfig // [lcid]->ul_SpecificParameters->priority <= // highest_priority)) { - (1)) { + (1)) { //todo // highest_priority = // mac-> // logicalChannelConfig[lcid]-> @@ -2898,6 +2841,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, mac->scheduling_info.BSR[6]; bsr_l->Buffer_size7 = mac->scheduling_info.BSR[7]; +/* LOG_D(MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report long BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n", module_idP, frameP, subframe, @@ -2910,6 +2854,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, mac->scheduling_info.BSR[5], mac->scheduling_info.BSR[6], mac->scheduling_info.BSR[7]); +*/ } else if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { bsr_l = NULL; @@ -2947,7 +2892,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, LOG_D(NR_MAC, "In %s copying %d bytes of MAC CEs to the UL PDU \n", __FUNCTION__, tot_mac_ce_len); nr_write_ce_ulsch_pdu(pdu, mac, 0, NULL, bsr_t, bsr_s, bsr_l); - //memcpy((void *) pdu, (void *) mac_header_control_elements, tot_mac_ce_len); pdu += (unsigned char) tot_mac_ce_len; #ifdef ENABLE_MAC_PAYLOAD_DEBUG From 4db04d7bee6814b2634f60cb739b514b3d97c3e2 Mon Sep 17 00:00:00 2001 From: mjoang Date: Mon, 16 Aug 2021 14:19:29 -0400 Subject: [PATCH 005/102] first version of sr bsr. remove test code --- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 084298ba13..c79897982f 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -3678,7 +3678,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, ((NR_BSR_LONG *) mac_ce)->Buffer_size0, ((NR_BSR_LONG *) mac_ce)->Buffer_size1, ((NR_BSR_LONG *) mac_ce)->Buffer_size2, ((NR_BSR_LONG *) mac_ce)->Buffer_size3, ((NR_BSR_LONG *) mac_ce)->Buffer_size4, ((NR_BSR_LONG *) mac_ce)->Buffer_size5, ((NR_BSR_LONG *) mac_ce)->Buffer_size6, ((NR_BSR_LONG *) mac_ce)->Buffer_size7); // update pointer and length - mac_ce = (NR_MAC_SUBHEADER_FIXED *) Buffer_size_ptr; + mac_ce = Buffer_size_ptr; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_SHORT); } From 9e59a26146ec77fc0fa8478a85ea30349325218b Mon Sep 17 00:00:00 2001 From: mjoang Date: Tue, 17 Aug 2021 12:29:34 -0400 Subject: [PATCH 006/102] 1. Add nr_ue_init_mac() to initialize the fields in nr_mac instance. 2. Fix bug on handling padding BSR. --- openair2/LAYER2/NR_MAC_UE/mac_defs.h | 4 +- openair2/LAYER2/NR_MAC_UE/mac_proto.h | 8 ++- openair2/LAYER2/NR_MAC_UE/main_ue_nr.c | 5 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 65 ++++++++++++++++++++ openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 50 +++++++-------- 5 files changed, 102 insertions(+), 30 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index f5953e7845..b1b07dbd29 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -182,9 +182,9 @@ typedef struct { uint16_t All_lcid_buffer_size_lastTTI; /// buffer status for each lcid uint8_t LCID_status[NR_MAX_NUM_LCID]; - /// SR pending as defined in 36.321 + /// SR pending as defined in 38.321 uint8_t SR_pending; - /// SR_COUNTER as defined in 36.321 + /// SR_COUNTER as defined in 38.321 uint16_t SR_COUNTER; /// logical channel group ide for each LCID uint8_t LCGID[NR_MAX_NUM_LCID]; diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index b1f71821cc..6d133cbce6 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -40,6 +40,10 @@ #define NR_DL_MAX_DAI (4) /* TS 38.213 table 9.1.3-1 Value of counter DAI for DCI format 1_0 and 1_1 */ #define NR_DL_MAX_NB_CW (2) /* number of downlink code word */ +/**\brief initialize the field in nr_mac instance + \param module_id module id */ +void nr_ue_init_mac(module_id_t module_idP); + /**\brief decode mib pdu in NR_UE, from if_module ul_ind with P7 tx_ind message \param module_id module id \param cc_id component carrier id @@ -143,7 +147,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slotP); boolean_t nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index); /*! \fn nr_locate_BsrIndexByBufferSize (int *table, int size, int value) - \brief locate the BSR level in the table as defined in 36.321. This function requires that he values in table to be monotonic, either increasing or decreasing. The returned value is not less than 0, nor greater than n-1, where n is the size of table. + \brief locate the BSR level in the table as defined in 38.321. This function requires that he values in table to be monotonic, either increasing or decreasing. The returned value is not less than 0, nor greater than n-1, where n is the size of table. \param[in] *table Pointer to BSR table \param[in] size Size of the table \param[in] value Value of the buffer @@ -374,7 +378,7 @@ void nr_ra_succeeded(module_id_t mod_id, frame_t frame, int slot); If the UE is not in PUSCH mode for a particular eNB index, this is assumed to be an Msg3 and MAC attempts to retrieves the CCCH message from RRC. If the UE is in PUSCH mode for a particular eNB index and PUCCH format 0 (Scheduling Request) is not activated, the MAC may use this resource for -andom-access to transmit a BSR along with the C-RNTI control element (see 5.1.4 from 36.321) +andom-access to transmit a BSR along with the C-RNTI control element (see 5.1.4 from 38.321) @param mod_id Index of UE instance @param CC_id Component Carrier Index @param frame diff --git a/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c b/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c index 768f65bf63..9d4652461a 100644 --- a/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c +++ b/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c @@ -51,10 +51,11 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst) //init mac here nr_ue_mac_inst = (NR_UE_MAC_INST_t *)calloc(sizeof(NR_UE_MAC_INST_t),NB_NR_UE_MAC_INST); - for (int j=0;jscell_group_config || rrc_inst->cell_group_config)) { if(rrc_inst->scell_group_config) { diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index c79897982f..e13d470ba5 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -135,6 +135,71 @@ const initial_pucch_resource_t initial_pucch_resource[16] = { }; +void nr_ue_init_mac(module_id_t module_idP) { + int i; + + NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); + // default values as deined in 38.331 sec 9.2.2 + LOG_I(NR_MAC, "[UE%d] Applying default macMainConfig\n", module_idP); + //mac->scheduling_info.macConfig=NULL; + mac->scheduling_info.retxBSR_Timer = + NR_BSR_Config__retxBSR_Timer_sf10240; + mac->scheduling_info.periodicBSR_Timer = + NR_BSR_Config__periodicBSR_Timer_infinity; +// mac->scheduling_info.periodicPHR_Timer = +// NR_MAC_MainConfig__phr_Config__setup__periodicPHR_Timer_sf20; +// mac->scheduling_info.prohibitPHR_Timer = +// NR_MAC_MainConfig__phr_Config__setup__prohibitPHR_Timer_sf20; +// mac->scheduling_info.PathlossChange_db = +// NR_MAC_MainConfig__phr_Config__setup__dl_PathlossChange_dB1; +// mac->PHR_state = +// NR_MAC_MainConfig__phr_Config_PR_setup; + mac->scheduling_info.SR_COUNTER = 0; + mac->scheduling_info.sr_ProhibitTimer = 0; + mac->scheduling_info.sr_ProhibitTimer_Running = 0; +// mac->scheduling_info.maxHARQ_Tx = +// NR_MAC_MainConfig__ul_SCH_Config__maxHARQ_Tx_n5; +// mac->scheduling_info.ttiBundling = 0; +// mac->scheduling_info.extendedBSR_Sizes_r10 = 0; +// mac->scheduling_info.extendedPHR_r10 = 0; +// mac->scheduling_info.drx_config = NULL; +// mac->scheduling_info.phr_config = NULL; + // set init value 0xFFFF, make sure periodic timer and retx time counters are NOT active, after bsr transmission set the value configured by the NW. + mac->scheduling_info.periodicBSR_SF = + MAC_UE_BSR_TIMER_NOT_RUNNING; + mac->scheduling_info.retxBSR_SF = + MAC_UE_BSR_TIMER_NOT_RUNNING; + mac->BSR_reporting_active = BSR_TRIGGER_NONE; +// mac->scheduling_info.periodicPHR_SF = +// nr_get_sf_perioidicPHR_Timer(mac-> +// scheduling_info.periodicPHR_Timer); +// mac->scheduling_info.prohibitPHR_SF = +// nr_get_sf_prohibitPHR_Timer(mac-> +// scheduling_info.prohibitPHR_Timer); +// mac->scheduling_info.PathlossChange_db = +// nr_get_db_dl_PathlossChange(mac-> +// scheduling_info.PathlossChange); +// mac->PHR_reporting_active = 0; + + for (i = 0; i < NR_MAX_NUM_LCID; i++) { + LOG_D(NR_MAC, + "[UE%d] Applying default logical channel config for LCGID %d\n", + module_idP, i); + mac->scheduling_info.Bj[i] = -1; + mac->scheduling_info.bucket_size[i] = -1; + + if (i < UL_SCH_LCID_DTCH) { // initialize all control channels lcgid to 0 + mac->scheduling_info.LCGID[i] = 0; + } else { // initialize all the data channels lcgid to 1 + mac->scheduling_info.LCGID[i] = 1; + } + + mac->scheduling_info.LCID_status[i] = + LCID_EMPTY; + mac->scheduling_info.LCID_buffer_remain[i] = 0; + } +} + int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){ RA_config_t *ra = &mac->ra; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index f710f97829..3b3cff2ec7 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -1202,7 +1202,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in || (mac-> physicalConfigDedicated->schedulingRequestConfig->present == LTE_SchedulingRequestConfig_PR_release)) { - // initiate RA with CRNTI included in msg3 (no contention) as descibed in 36.321 sec 5.1.5 + // initiate RA with CRNTI included in msg3 (no contention) as descibed in 38.321 sec 5.1.5 // cancel all pending SRs mac->scheduling_info.SR_pending = 0; mac->ul_active = 0; @@ -1298,7 +1298,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, } } - // Check whether a regular BSR can be triggered according to the first cases in 36.321 + // Check whether a regular BSR can be triggered according to the first cases in 38.321 if (num_lcid_with_data) { LOG_D(MAC, "[UE %d] PDCCH Tick at frame %d slot %d: NumLCID with data=%d Reordered LCID0=%d LCID1=%d LCID2=%d\n", @@ -2485,7 +2485,8 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, int16_t buflen_remain = 0; uint8_t bsr_len = 0, bsr_ce_len = 0, bsr_header_len = 0; - uint8_t phr_header_len = 0, phr_ce_len = 0, phr_len = 0; + //uint8_t phr_header_len = 0, phr_ce_len = 0, phr_len = 0; + uint8_t phr_len = 0; uint8_t lcid = 0; uint16_t sdu_length = 0; uint16_t num_sdus = 0; @@ -2522,7 +2523,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, lcg_id++; } - //Restart ReTxBSR Timer at new grant indication (36.321) + //Restart ReTxBSR Timer at new grant indication (38.321) if (mac->scheduling_info.retxBSR_SF != MAC_UE_BSR_TIMER_NOT_RUNNING) { mac->scheduling_info.retxBSR_SF = @@ -2554,18 +2555,18 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, if (num_lcg_id_with_data <= 1) { if (buflen >= (sizeof(NR_BSR_SHORT)+sizeof(NR_MAC_SUBHEADER_FIXED)+1)) { bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte - bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); + bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); //1 byte } } else { if (buflen >= (num_lcg_id_with_data+1+sizeof(NR_MAC_SUBHEADER_SHORT)+1)) { - bsr_ce_len = num_lcg_id_with_data + 1; //variable size - bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); + bsr_ce_len = num_lcg_id_with_data + 1; //variable size + bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); //2 bytes } } } bsr_len = bsr_ce_len + bsr_header_len; - +#if 0 // todo phr_ce_len = (mac->PHR_reporting_active == 1) ? 1 /* sizeof(POWER_HEADROOM_CMD) */ : 0; @@ -2581,7 +2582,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, phr_header_len = 0; phr_ce_len = 0; } - +#endif int tot_mac_ce_len = bsr_len + phr_len; uint8_t total_mac_pdu_header_len = tot_mac_ce_len; @@ -2669,7 +2670,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, mac->scheduling_info.LCID_buffer_remain[lcid] -= sdu_length; mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] -= sdu_length; LOG_D(MAC, - "[UE %d] Update BSR Tx frame%d subframe %d nb LCG =%d Bytes for LCG%d=%d\n", + "[UE %d] Update BSR [%d.%d] num_lcg_id_with_data %d. BSR_bytes for LCG%d=%d\n", module_idP, frameP, subframe, num_lcg_id_with_data, mac->scheduling_info.LCGID[lcid], mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]]); if (mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] < 0) @@ -2682,7 +2683,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, scheduling_info.LCGID[lcid]] == 0)) { num_lcg_id_with_data--; - +#if 0 // Disable the following to simplify the logic // Change BSR size to BSR SHORT if num_lcg_id_with_data becomes to 1 if (bsr_len) { if (num_lcg_id_with_data == 1) { @@ -2700,6 +2701,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, tot_mac_ce_len = bsr_len + phr_len; } } +#endif } } } @@ -2766,18 +2768,18 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, if ((padding_len) && (bsr_len == 0)) { /* if the number of padding bits is equal to or larger than the size of the Long BSR plus its subheader, report Long BSR */ - if (padding_len >= (1 + num_lcg_id_with_data)) { - bsr_ce_len = 1 + num_lcg_id_with_data; - bsr_header_len = 1; + if (padding_len >= (num_lcg_id_with_data+1+sizeof(NR_MAC_SUBHEADER_SHORT))) { + bsr_ce_len = num_lcg_id_with_data + 1; //variable size + bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); //2 bytes // Trigger BSR Padding mac->BSR_reporting_active |= NR_BSR_TRIGGER_PADDING; - } else if (padding_len >= (1 + sizeof(NR_BSR_SHORT))) { - bsr_ce_len = sizeof(NR_BSR_SHORT); - bsr_header_len = 1; + } else if (padding_len >= (sizeof(NR_BSR_SHORT)+sizeof(NR_MAC_SUBHEADER_FIXED))) { + bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte + bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); //1 byte if (num_lcg_id_with_data > 1) { - // REPORT TRUNCATED BSR + // REPORT SHORT TRUNCATED BSR //Get LCGID of highest priority LCID with data for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { // if (mac-> @@ -2814,7 +2816,8 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } bsr_len = bsr_header_len + bsr_ce_len; - tot_mac_ce_len = bsr_len + phr_len; + tot_mac_ce_len += bsr_len; + total_mac_pdu_header_len += bsr_len; } //Fill BSR Infos @@ -2822,7 +2825,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, bsr_s = NULL; bsr_l = NULL; bsr_t = NULL; - } else if (bsr_ce_len > sizeof(NR_BSR_SHORT)) { + } else if (bsr_header_len == sizeof(NR_MAC_SUBHEADER_SHORT)) { bsr_s = NULL; bsr_t = NULL; bsr_l->Buffer_size0 = @@ -2841,9 +2844,8 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, mac->scheduling_info.BSR[6]; bsr_l->Buffer_size7 = mac->scheduling_info.BSR[7]; -/* LOG_D(MAC, - "[UE %d] Frame %d subframe %d BSR Trig=%d report long BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n", + "[UE %d] Frame %d subframe %d BSR Trig=%d report LONG BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n", module_idP, frameP, subframe, mac->BSR_reporting_active, mac->scheduling_info.BSR[0], @@ -2854,8 +2856,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, mac->scheduling_info.BSR[5], mac->scheduling_info.BSR[6], mac->scheduling_info.BSR[7]); -*/ - } else if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { + } else if (bsr_header_len == sizeof(NR_MAC_SUBHEADER_FIXED)) { bsr_l = NULL; if ((bsr_t != NULL) @@ -2906,6 +2907,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // Compute final offset for padding and fill remainder of ULSCH with 0 if (buflen_remain > 0) { + LOG_D(NR_MAC, "In %s filling remainder %d bytes to the UL PDU \n", __FUNCTION__, buflen_remain); ((NR_MAC_SUBHEADER_FIXED *) pdu)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) pdu)->LCID = UL_SCH_LCID_PADDING; From 1f1d40591eb180338a71e07097b6e91d7935a0ab Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 18 Aug 2021 17:37:18 +0200 Subject: [PATCH 007/102] fix PRB allocation for UE-specific DLSCH --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index bfdb1a01e3..7bcb669010 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -451,7 +451,7 @@ bool allocate_dl_retransmission(module_id_t module_id, &RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon->downlinkConfigCommon->initialDownlinkBWP->genericParameters; const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE); - int rbStart = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE); + int rbStart = 0; // start wrt BWPstart NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats; @@ -641,7 +641,7 @@ void pf_dl(module_id_t module_id, &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters; const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth,MAX_BWP_SIZE); - int rbStart = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE); + int rbStart = 0; // start wrt BWPstart /* Find a free CCE */ bool freeCCE = find_free_CCE(module_id, slot, UE_id); @@ -731,14 +731,18 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth: scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + const uint16_t BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp ? + sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth: + scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, + MAX_BWP_SIZE); uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map; uint8_t rballoc_mask[bwpSize]; int n_rb_sched = 0; - for (int i = 0; i < bwpSize; i++) { + for (int i = BWPStart; i < bwpSize; i++) { // calculate mask: init with "NOT" vrb_map: // if any RB in vrb_map is blocked (1), the current RBG will be 0 - rballoc_mask[i] = !vrb_map[i]; + rballoc_mask[i-BWPStart] = !vrb_map[i]; n_rb_sched += rballoc_mask[i]; } From ba816f699fe5bf4add385266cab9e3573b3fb5bf Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 18 Aug 2021 17:59:35 +0200 Subject: [PATCH 008/102] fix PRB allocation for UE-specific ULSCH --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index fbd8a4b5ca..1998f3ef43 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -856,7 +856,7 @@ bool allocate_ul_retransmission(module_id_t module_id, NR_sched_pusch_t *retInfo = &sched_ctrl->ul_harq_processes[harq_pid].sched_pusch; NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ? &sched_ctrl->active_ubwp->bwp_Common->genericParameters : &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; - int rbStart = sched_ctrl->active_ubwp ? NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE) : 0; + int rbStart = 0; // wrt BWP start const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE); const uint8_t num_dmrs_cdm_grps_no_data = sched_ctrl->active_bwp ? 1 : 2; @@ -990,7 +990,7 @@ void pf_ul(module_id_t module_id, NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ? &sched_ctrl->active_ubwp->bwp_Common->genericParameters : &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; - int rbStart = sched_ctrl->active_ubwp ? NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE) : 0; + int rbStart = 0; // wrt BWP start const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE); NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static; @@ -1235,6 +1235,10 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth: scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + const uint16_t bwpStart = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp ? + sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth: + scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, + MAX_BWP_SIZE); const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = sched_ctrl->active_ubwp ? sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList: scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; @@ -1245,10 +1249,10 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t int st = 0, e = 0, len = 0; for (int i = 0; i < bwpSize; i++) { - while ((vrb_map_UL[i] & symb) != 0 && i < bwpSize) + while ((vrb_map_UL[bwpStart + i] & symb) != 0 && i < bwpSize) i++; st = i; - while ((vrb_map_UL[i] & symb) == 0 && i < bwpSize) + while ((vrb_map_UL[bwpStart + i] & symb) == 0 && i < bwpSize) i++; if (i - st > len) { len = i - st; From d606e73a530c7a1b127cf368379d4839427ea265 Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 18 Aug 2021 18:11:04 +0200 Subject: [PATCH 009/102] fix PRB allocation for phytest mode --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 18 +++++++++++------- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 7bcb669010..94f49478f7 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -743,7 +743,7 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t // calculate mask: init with "NOT" vrb_map: // if any RB in vrb_map is blocked (1), the current RBG will be 0 rballoc_mask[i-BWPStart] = !vrb_map[i]; - n_rb_sched += rballoc_mask[i]; + n_rb_sched += rballoc_mask[i-BWPStart]; } /* Retrieve amount of data to send for this UE */ diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 47ccc74612..15bcc19d61 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -283,6 +283,7 @@ void nr_preprocessor_phytest(module_id_t module_id, NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; /* find largest unallocated chunk */ const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); int rbStart = 0; int rbSize = 0; if (target_dl_bw>bwpSize) @@ -291,11 +292,11 @@ void nr_preprocessor_phytest(module_id_t module_id, /* loop ensures that we allocate exactly target_dl_bw, or return */ while (true) { /* advance to first free RB */ - while (rbStart < bwpSize && vrb_map[rbStart]) + while (rbStart < bwpSize && vrb_map[rbStart + BWPStart]) rbStart++; rbSize = 1; /* iterate until we are at target_dl_bw or no available RBs */ - while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize] && rbSize < target_dl_bw) + while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize + BWPStart] && rbSize < target_dl_bw) rbSize++; /* found target_dl_bw? */ if (rbSize == target_dl_bw) @@ -392,7 +393,7 @@ void nr_preprocessor_phytest(module_id_t module_id, /* mark the corresponding RBs as used */ for (int rb = 0; rb < sched_pdsch->rbSize; rb++) - vrb_map[rb + sched_pdsch->rbStart] = 1; + vrb_map[rb + sched_pdsch->rbStart + BWPStart] = 1; if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize); } @@ -454,8 +455,11 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ uint16_t rbSize; const int bw = NRRIV2BW(sched_ctrl->active_ubwp ? - sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth : - scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth : + scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp ? + sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth : + scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); if (target_ul_bw>bw) rbSize = bw; @@ -466,7 +470,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE]; const uint16_t symb = ((1 << ps->nrOfSymbols) - 1) << ps->startSymbolIndex; for (int i = rbStart; i < rbStart + rbSize; ++i) { - if ((vrb_map_UL[i] & symb) != 0) { + if ((vrb_map_UL[i+BWPStart] & symb) != 0) { LOG_E(MAC, "%s(): %4d.%2d RB %d is already reserved, cannot schedule UE\n", __func__, @@ -528,6 +532,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ /* mark the corresponding RBs as used */ for (int rb = rbStart; rb < rbStart + rbSize; rb++) - vrb_map_UL[rb] = 1; + vrb_map_UL[rb+BWPStart] = 1; return true; } From 2780e004561d8d42e4808140360df8d8ac5669f1 Mon Sep 17 00:00:00 2001 From: francescomani Date: Wed, 18 Aug 2021 18:21:08 +0200 Subject: [PATCH 010/102] fix vrb map filling for csi-rs --- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 34 +++++++++---------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 1606e5dfef..3030e12f71 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -2120,20 +2120,20 @@ void nr_csirs_scheduling(int Mod_idP, csirs_pdu_rel15->row = 1; csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row1.buf[0])>>4)&0x0f; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2: csirs_pdu_rel15->row = 2; csirs_pdu_rel15->freq_domain = (((resourceMapping.frequencyDomainAllocation.choice.row2.buf[1]>>4)&0x0f) | ((resourceMapping.frequencyDomainAllocation.choice.row2.buf[0]<<8)&0xff0)); for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row4: csirs_pdu_rel15->row = 4; csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.row4.buf[0])>>5)&0x07; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); break; case NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_other: csirs_pdu_rel15->freq_domain = ((resourceMapping.frequencyDomainAllocation.choice.other.buf[0])>>2)&0x3f; @@ -2144,18 +2144,18 @@ void nr_csirs_scheduling(int Mod_idP, case NR_CSI_RS_ResourceMapping__nrofPorts_p2: csirs_pdu_rel15->row = 3; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p4: csirs_pdu_rel15->row = 5; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p8: if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 8; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); } else{ int num_k = 0; @@ -2164,12 +2164,12 @@ void nr_csirs_scheduling(int Mod_idP, if(num_k==4) { csirs_pdu_rel15->row = 6; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); } else { csirs_pdu_rel15->row = 7; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); } } break; @@ -2177,12 +2177,12 @@ void nr_csirs_scheduling(int Mod_idP, if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 10; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); } else { csirs_pdu_rel15->row = 9; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= (1 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (1 << csirs_pdu_rel15->symb_l0); } break; case NR_CSI_RS_ResourceMapping__nrofPorts_p16: @@ -2191,24 +2191,24 @@ void nr_csirs_scheduling(int Mod_idP, else csirs_pdu_rel15->row = 11; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((1 << csirs_pdu_rel15->symb_l0) | (2 << csirs_pdu_rel15->symb_l0)); break; case NR_CSI_RS_ResourceMapping__nrofPorts_p24: if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 14; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); } else{ if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm8_FD2_TD4) { csirs_pdu_rel15->row = 15; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= (7 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (7 << csirs_pdu_rel15->symb_l0); } else { csirs_pdu_rel15->row = 13; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); } } break; @@ -2216,18 +2216,18 @@ void nr_csirs_scheduling(int Mod_idP, if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm4_FD2_TD2) { csirs_pdu_rel15->row = 17; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); } else{ if (resourceMapping.cdm_Type == NR_CSI_RS_ResourceMapping__cdm_Type_cdm8_FD2_TD4) { csirs_pdu_rel15->row = 18; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= (7 << csirs_pdu_rel15->symb_l0); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= (7 << csirs_pdu_rel15->symb_l0); } else { csirs_pdu_rel15->row = 16; for (int rb = csirs_pdu_rel15->start_rb; rb < (csirs_pdu_rel15->start_rb + csirs_pdu_rel15->nr_of_rbs); rb++) - vrb_map[rb] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); + vrb_map[rb+csirs_pdu_rel15->bwp_start] |= ((3 << csirs_pdu_rel15->symb_l0) | (3 << csirs_pdu_rel15->symb_l1)); } } break; From 120e6a59b3fc4e6e59c4cec47500b63497813465 Mon Sep 17 00:00:00 2001 From: mjoang Date: Wed, 18 Aug 2021 12:29:06 -0400 Subject: [PATCH 011/102] Suppress warning message. --- openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c index 2d28343f9b..a10c029bd2 100644 --- a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c +++ b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c @@ -271,7 +271,7 @@ mac_rlc_status_resp_t mac_rlc_status_ind( + buf_stat.tx_size; } else { if (!(frameP%128)) //to supress this warning message - LOG_W(RLC, "[%s] Radio Bearer (channel ID %d) is NULL for UE with rntiP %x\n", __FUNCTION__, channel_idP, rntiP); + LOG_D(RLC, "[%s] Radio Bearer (channel ID %d) is NULL for UE with rntiP %x\n", __FUNCTION__, channel_idP, rntiP); ret.bytes_in_buffer = 0; } From 464c09542042f09398b40b839a58d032526d59ba Mon Sep 17 00:00:00 2001 From: mjoang Date: Wed, 18 Aug 2021 14:59:13 -0400 Subject: [PATCH 012/102] Suppress warning message. --- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 12 +++--- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 40 ++++++++++---------- 2 files changed, 26 insertions(+), 26 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index e13d470ba5..421f001c68 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -2230,7 +2230,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ mac->measGapConfig->choice. setup.gapOffset.choice.gp1; } else { - LOG_W(MAC, "Measurement GAP offset is unknown\n"); + LOG_W(NR_MAC, "Measurement GAP offset is unknown\n"); } T = MGRP / 10; @@ -2253,7 +2253,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ mac-> physicalConfigDedicated->schedulingRequestConfig->choice.setup. dsr_TransMax)))) { - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, @@ -2265,7 +2265,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ mac->scheduling_info.SR_pending); #endif DSR_TRANSMAX_t dsr_TransMax = sr_n64; // todo - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, @@ -2279,7 +2279,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ /* if ((mac->scheduling_info.sr_ProhibitTimer_Running == 0)) { mac->scheduling_info.SR_pending = 1; - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n", module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, @@ -2301,7 +2301,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ //physicalConfigDedicated->schedulingRequestConfig->choice.setup. //dsr_TransMax)))) { dsr_TransMax)))) { - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n", module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, @@ -2335,7 +2335,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ //mac->ul_active = 0; // todo mac->BSR_reporting_active = NR_BSR_TRIGGER_NONE; - LOG_I(MAC, "[UE %d] Release all SRs \n", module_idP); + LOG_I(NR_MAC, "[UE %d] Release all SRs \n", module_idP); } mac->scheduling_info.SR_pending = 0; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 3b3cff2ec7..3dfe11f1ca 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -1127,7 +1127,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in get_ms_bucketsizeduration(mac->logicalChannelConfig [lcid]->ul_SpecificParameters->bucketSizeDuration); } else { - LOG_E(MAC, + LOG_E(NR_MAC, "[UE %d] lcid %d, NULL ul_SpecificParameters\n", mod_id, lcid); AssertFatal(1 == 0, ""); @@ -1145,7 +1145,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in /* if (lcid == DCCH) { - LOG_D(MAC,"[UE %d][SR] Frame %d slot %d Pending data for SRB1=%d for LCGID %d \n", + LOG_D(NR_MAC,"[UE %d][SR] Frame %d slot %d Pending data for SRB1=%d for LCGID %d \n", mod_id, txFrameP,txSlotP,mac->scheduling_info.BSR[mac->scheduling_info.LCGID[lcid]], // mac->scheduling_info.LCGID[lcid]); } @@ -1178,7 +1178,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in // Regular BSR trigger mac->BSR_reporting_active |= NR_BSR_TRIGGER_REGULAR; - LOG_I(MAC, + LOG_D(NR_MAC, "[UE %d][BSR] Regular BSR Triggered Frame %d slot %d SR for PUSCH is pending\n", mod_id, txFrameP, txSlotP); } @@ -1188,7 +1188,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in // cancel all pending SRs mac->scheduling_info.SR_pending = 0; mac->ul_active = 0; - LOG_T(MAC, "[UE %d] Release all SRs \n", mod_id); + LOG_T(NR_MAC, "[UE %d] Release all SRs \n", mod_id); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SCHEDULER, VCD_FUNCTION_OUT); #if UE_TIMING_TRACE @@ -1206,7 +1206,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in // cancel all pending SRs mac->scheduling_info.SR_pending = 0; mac->ul_active = 0; - LOG_T(MAC, "[UE %d] Release all SRs \n", mod_id); + LOG_T(NR_MAC, "[UE %d] Release all SRs \n", mod_id); } #endif return UE_CONNECTION_OK; @@ -1267,7 +1267,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, lcid_bytes_in_buffer[lcid] = rlc_status.bytes_in_buffer; if (rlc_status.bytes_in_buffer > 0) { - LOG_D(MAC,"[UE %d] PDCCH Tick : LCID%d LCGID%d has data to transmit =%d bytes at frame %d slot %d\n", + LOG_D(NR_MAC,"[UE %d] PDCCH Tick : LCID%d LCGID%d has data to transmit =%d bytes at frame %d slot %d\n", module_idP, lcid,lcgid,rlc_status.bytes_in_buffer,frameP,slotP); mac->scheduling_info.LCID_status[lcid] = LCID_NOT_EMPTY; @@ -1300,7 +1300,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, // Check whether a regular BSR can be triggered according to the first cases in 38.321 if (num_lcid_with_data) { - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] PDCCH Tick at frame %d slot %d: NumLCID with data=%d Reordered LCID0=%d LCID1=%d LCID2=%d\n", module_idP, frameP, slotP, num_lcid_with_data, lcid_reordered_array[0], lcid_reordered_array[1], @@ -1322,7 +1322,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, [mac->scheduling_info.LCGID[lcid]] == 0)) { bsr_regular_triggered = TRUE; - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] PDCCH Tick : MAC BSR Triggered LCID%d LCGID%d data become available at frame %d slot %d\n", module_idP, lcid, mac->scheduling_info.LCGID[lcid], @@ -1337,7 +1337,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, if ((mac->BSR_reporting_active & NR_BSR_TRIGGER_REGULAR) == 0) { - LOG_I(MAC, + LOG_I(NR_MAC, "[UE %d] PDCCH Tick : MAC BSR Triggered ReTxBSR Timer expiry at frame %d slot %d\n", module_idP, frameP, slotP); } @@ -1377,7 +1377,7 @@ nr_locate_BsrIndexByBufferSize(const uint32_t *table, int size, int value) { ju = jm; //replace the upper limit } - LOG_T(MAC, + LOG_T(NR_MAC, "[UE] searching BSR index %d for (BSR TABLE %d < value %d)\n", jm, table[jm], value); } @@ -2538,7 +2538,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // Trigger BSR Periodic mac->BSR_reporting_active |= NR_BSR_TRIGGER_PERIODIC; - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] MAC BSR Triggered PeriodicBSR Timer expiry at frame%d subframe %d TBS=%d\n", module_idP, frameP, subframe, buflen); } @@ -2574,7 +2574,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, if ((phr_ce_len > 0) && ((phr_ce_len + phr_header_len + bsr_len) <= buflen)) { phr_len = phr_ce_len + phr_header_len; - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] header size info: PHR len %d (ce%d,hdr%d) buff_len %d\n", module_idP, phr_len, phr_ce_len, phr_header_len, buflen); } else { @@ -2633,7 +2633,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, if (sdu_length > 0) { - LOG_D(MAC, "In %s: Generating UL MAC sub-PDU for SDU %d, length %d bytes, RB with LCID 0x%02x (buflen (TBS) %d bytes)\n", __FUNCTION__, + LOG_D(NR_MAC, "In %s: Generating UL MAC sub-PDU for SDU %d, length %d bytes, RB with LCID 0x%02x (buflen (TBS) %d bytes)\n", __FUNCTION__, num_sdus + 1, sdu_length, lcid, @@ -2660,7 +2660,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } else { pdu -= sh_size; - LOG_D(MAC, "In %s: no data to transmit for RB with LCID 0x%02x\n", __FUNCTION__, lcid); + LOG_D(NR_MAC, "In %s: no data to transmit for RB with LCID 0x%02x\n", __FUNCTION__, lcid); break; } @@ -2669,7 +2669,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, //Update Buffer remain and BSR bytes after transmission mac->scheduling_info.LCID_buffer_remain[lcid] -= sdu_length; mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] -= sdu_length; - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] Update BSR [%d.%d] num_lcg_id_with_data %d. BSR_bytes for LCG%d=%d\n", module_idP, frameP, subframe, num_lcg_id_with_data, mac->scheduling_info.LCGID[lcid], mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]]); @@ -2739,7 +2739,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } phr_p->R = 0; - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] Frame %d report PHR with mapping (%d->%d) for LCID %d\n", module_idP, frameP, get_PHR(module_idP, CC_id, eNB_index), phr_p->PH, POWER_HEADROOM); @@ -2748,7 +2748,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, phr_p = NULL; } - LOG_T(MAC, "[UE %d] Frame %d: bsr s %p bsr_l %p, phr_p %p\n", + LOG_T(NR_MAC, "[UE %d] Frame %d: bsr s %p bsr_l %p, phr_p %p\n", module_idP, frameP, bsr_s, bsr_l, phr_p); #endif @@ -2844,7 +2844,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, mac->scheduling_info.BSR[6]; bsr_l->Buffer_size7 = mac->scheduling_info.BSR[7]; - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report LONG BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n", module_idP, frameP, subframe, mac->BSR_reporting_active, @@ -2868,7 +2868,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, bsr_t->Buffer_size = mac->scheduling_info. BSR[lcg_id_bsr_trunc]; - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report TRUNCATED BSR with level %d for LCGID %d\n", module_idP, frameP, subframe, mac->BSR_reporting_active, @@ -2880,7 +2880,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, bsr_s->Buffer_size = mac->scheduling_info. BSR[lcg_id_bsr_trunc]; - LOG_D(MAC, + LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report SHORT BSR with level %d for LCGID %d\n", module_idP, frameP, subframe, mac->BSR_reporting_active, From 282fd655756e3efce5a771cedd44960ecccbc8a5 Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 19 Aug 2021 11:37:21 +0200 Subject: [PATCH 013/102] fix msg3 rb_start condition --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 1932ef5cee..f19c974d83 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -755,7 +755,7 @@ void nr_get_Msg3alloc(module_id_t module_id, NR_BWP_Uplink_t *ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->bwp_id - 1]; int act_bwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); int act_bwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - if ((bwpStart < act_bwp_start) || (bwpSize > act_bwp_size)) + if (!((bwpStart >= act_bwp_start) && ((bwpStart+bwpSize) <= (act_bwp_start+act_bwp_size)))) bwpStart = act_bwp_start; } @@ -853,7 +853,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t pusch_pdu->rnti = ra->rnti; pusch_pdu->handle = 0; - if ((ibwp_start < abwp_start) || (ibwp_size > abwp_size)) + if (!((ibwp_start >= abwp_start) && ((ibwp_size+ibwp_start) <= (abwp_size+abwp_start)))) pusch_pdu->bwp_start = abwp_start; else pusch_pdu->bwp_start = ibwp_start; From 1ff08037fb07d2375ce8800b74872a3b60bec951 Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 19 Aug 2021 12:08:10 +0200 Subject: [PATCH 014/102] other fixes for msg3 bwp start --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 14 ++++---------- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 2 ++ 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index f19c974d83..a8ab14f4fa 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -775,6 +775,7 @@ void nr_get_Msg3alloc(module_id_t module_id, } ra->msg3_nb_rb = msg3_nb_rb; ra->msg3_first_rb = rbStart; + ra->msg3_bwp_start = bwpStart; } void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, NR_RA_t *ra, uint8_t *RAR_pdu) @@ -791,12 +792,12 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t uint16_t *vrb_map_UL = &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE]; for (int i = 0; i < ra->msg3_nb_rb; ++i) { - AssertFatal(!vrb_map_UL[i + ra->msg3_first_rb], + AssertFatal(!vrb_map_UL[i + ra->msg3_first_rb + ra->msg3_bwp_start], "RB %d in %4d.%2d is already taken, cannot allocate Msg3!\n", i + ra->msg3_first_rb, ra->Msg3_frame, ra->Msg3_slot); - vrb_map_UL[i + ra->msg3_first_rb] = 1; + vrb_map_UL[i + ra->msg3_first_rb + ra->msg3_bwp_start] = 1; } LOG_D(NR_MAC, "[gNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot); @@ -815,9 +816,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); future_ul_tti_req->n_pdus += 1; int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - int ibwp_start = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); int abwp_size = ibwp_size; - int abwp_start = ibwp_start; int scs = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; int fh = 0; int startSymbolAndLength = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength; @@ -830,8 +829,6 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength; mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType; - abwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; fh = ubwp->bwp_Dedicated->pusch_Config->choice.setup->frequencyHopping ? 1 : 0; } @@ -853,10 +850,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t pusch_pdu->rnti = ra->rnti; pusch_pdu->handle = 0; - if (!((ibwp_start >= abwp_start) && ((ibwp_size+ibwp_start) <= (abwp_size+abwp_start)))) - pusch_pdu->bwp_start = abwp_start; - else - pusch_pdu->bwp_start = ibwp_start; + pusch_pdu->bwp_start = ra->msg3_bwp_start; pusch_pdu->bwp_size = ibwp_size; pusch_pdu->subcarrier_spacing = scs; pusch_pdu->cyclic_prefix = 0; diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index bd88c39306..4adb7b7dc0 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -144,6 +144,8 @@ typedef struct { uint8_t msg3_first_rb; /// Msg3 number of RB uint8_t msg3_nb_rb; + /// Msg3 BWP start + uint8_t msg3_bwp_start; /// Msg3 TPC command uint8_t msg3_TPC; /// Msg3 ULdelay command From 44fc5c10726780b658bbab99cefc41ee809f83d0 Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 19 Aug 2021 13:00:02 +0200 Subject: [PATCH 015/102] fix vrb occupation for msg2 and msg4 --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index a8ab14f4fa..5b79dd8a9c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -816,7 +816,6 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); future_ul_tti_req->n_pdus += 1; int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - int abwp_size = ibwp_size; int scs = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; int fh = 0; int startSymbolAndLength = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength; @@ -953,7 +952,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra uint16_t *vrb_map = cc[CC_id].vrb_map; for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) { - if (vrb_map[rbStart + i]) { + if (vrb_map[BWPStart + rbStart + i]) { rbStart += i; i = 0; } @@ -1158,7 +1157,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra // Mark the corresponding RBs as used for (int rb = 0; rb < rbSize; rb++) { - vrb_map[rb + rbStart] = 1; + vrb_map[BWPStart + rb + rbStart] = 1; } ra->state = WAIT_Msg3; @@ -1321,10 +1320,10 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra harq->tb_size = nr_compute_tbs(nr_get_Qm_dl(mcsIndex, mcsTableIdx), nr_get_code_rate_dl(mcsIndex, mcsTableIdx), rbSize, nrOfSymbols, N_PRB_DMRS * N_DMRS_SLOT, 0, tb_scaling,1) >> 3; - } while (rbStart + rbSize < BWPSize && !vrb_map[rbStart + rbSize] && harq->tb_size < mac_pdu_length); + } while (rbStart + rbSize < BWPSize && !vrb_map[BWPStart + rbStart + rbSize] && harq->tb_size < mac_pdu_length); for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) { - if (vrb_map[rbStart + i]) { + if (vrb_map[BWPStart + rbStart + i]) { rbStart += i; i = 0; } @@ -1494,7 +1493,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra // Mark the corresponding RBs as used for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) { - vrb_map[rb + pdsch_pdu_rel15->rbStart] = 1; + vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] = 1; } LOG_D(NR_MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize); From b962dda8c9c111729aed47a5e5efa0d5438d7c05 Mon Sep 17 00:00:00 2001 From: francescomani Date: Fri, 20 Aug 2021 08:41:21 +0200 Subject: [PATCH 016/102] prach vrb wrt bwp start --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 5b79dd8a9c..708b8389d7 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -261,6 +261,8 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP else mu = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing; + int bwp_start = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + uint8_t fdm = cfg->prach_config.num_prach_fd_occasions.value; // prach is scheduled according to configuration index and tables 6.3.3.2.2 to 6.3.3.2.4 if ( get_nr_prach_info_from_index(config_index, @@ -387,7 +389,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP const int16_t N_RA_RB = get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, mu_pusch); uint16_t *vrb_map_UL = &cc->vrb_map_UL[slotP * MAX_BWP_SIZE]; for (int i = 0; i < N_RA_RB * fdm; ++i) - vrb_map_UL[rach_ConfigGeneric->msg1_FrequencyStart + i] = 0xff; // all symbols + vrb_map_UL[bwp_start + rach_ConfigGeneric->msg1_FrequencyStart + i] = 0xff; // all symbols } } } From 17b1db302cdfe4aec39d9a9b3d7143c8106de20d Mon Sep 17 00:00:00 2001 From: francescomani Date: Fri, 20 Aug 2021 11:10:58 +0200 Subject: [PATCH 017/102] adjusting vrb map in uci functions --- .../LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 29 +++++++++++++++---- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index a284ad96e8..845fbfec16 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -513,6 +513,11 @@ void nr_csi_meas_reporting(int Mod_idP, curr_pucch->csi_bits += nr_get_csi_bitlen(Mod_idP,UE_id,csi_report_id); + NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ? + &sched_ctrl->active_ubwp->bwp_Common->genericParameters: + &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; + int bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE); + // going through the list of PUCCH resources to find the one indexed by resource_id uint16_t *vrb_map_UL = &RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL[sched_slot * MAX_BWP_SIZE]; const int m = pucch_Config->resourceToAddModList->list.count; @@ -543,7 +548,7 @@ void nr_csi_meas_reporting(int Mod_idP, } // verify resources are free for (int i = start; i < start + len; ++i) { - vrb_map_UL[i] |= mask; + vrb_map_UL[i+bwp_start] |= mask; } } } @@ -1348,17 +1353,31 @@ int nr_acknack_scheduling(int mod_id, pucch_Config = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; } + NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ? + &sched_ctrl->active_ubwp->bwp_Common->genericParameters: + &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; + int bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE); + /* verify that at that slot and symbol, resources are free. We only do this * for initialCyclicShift 0 (we assume it always has that one), so other * initialCyclicShifts can overlap with ICS 0!*/ const NR_PUCCH_Resource_t *resource = pucch_Config->resourceToAddModList->list.array[pucch->resource_indicator]; DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0); + int second_hop_prb = resource->secondHopPRB!= NULL ? *resource->secondHopPRB : 0; + int nr_of_symbols = resource->format.choice.format0->nrofSymbols; if (resource->format.choice.format0->initialCyclicShift == 0) { uint16_t *vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE]; - const uint16_t symb = 1 << resource->format.choice.format0->startingSymbolIndex; - if ((vrb_map_UL[resource->startingPRB] & symb) != 0) - LOG_W(MAC, "symbol 0x%x is not free for PUCCH alloc in vrb_map_UL at RB %ld and slot %d.%d\n", symb, resource->startingPRB, pucch->frame, pucch->ul_slot); - vrb_map_UL[resource->startingPRB] |= symb; + for (int l=0; lformat.choice.format0->startingSymbolIndex + l); + int prb; + if (l==1 && second_hop_prb != 0) + prb = second_hop_prb; + else + prb = resource->startingPRB; + if ((vrb_map_UL[bwp_start+prb] & symb) != 0) + LOG_W(MAC, "symbol 0x%x is not free for PUCCH alloc in vrb_map_UL at RB %ld and slot %d.%d\n", symb, resource->startingPRB, pucch->frame, pucch->ul_slot); + vrb_map_UL[bwp_start+prb] |= symb; + } } return 0; } From f2c0178b34e472b7c4e7eed6fbb8aa1ab17a8d1a Mon Sep 17 00:00:00 2001 From: mjoang Date: Mon, 23 Aug 2021 11:52:28 -0400 Subject: [PATCH 018/102] 1. Call mac_rlc_status_ind only for existing bearers. 2. Re-enable logging in mac_rlc_status to detect any call for non-existing bearer. --- openair2/LAYER2/NR_MAC_UE/config_ue.c | 11 +++++++++ openair2/LAYER2/NR_MAC_UE/mac_defs.h | 3 +++ openair2/LAYER2/NR_MAC_UE/mac_proto.h | 12 +++++++++ openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 6 ++--- openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c | 27 ++++++++++++++------- 5 files changed, 47 insertions(+), 12 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 2e0e0b23fd..7b8113da49 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -672,6 +672,17 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){ } +// todo handle mac_LogicalChannelConfig +int nr_rlc_mac_config_req_ue_logicalChannelBearer( + module_id_t module_id, + int cc_idP, + uint8_t gNB_index, + long logicalChannelIdentity){ + NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); + mac->logicalChannelBearer_exist[logicalChannelIdentity] = true; + return 0; +} + int nr_rrc_mac_config_req_ue( module_id_t module_id, int cc_idP, diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index b1b07dbd29..28818bf307 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -409,6 +409,9 @@ typedef struct { /// BSR report flag management uint8_t BSR_reporting_active; + + /// LogicalChannelConfig has bearer. + boolean_t logicalChannelBearer_exist[NR_MAX_NUM_LCID]; NR_UE_SCHEDULING_INFO scheduling_info; /// PHR diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index 6d133cbce6..1f5fc02df7 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -78,6 +78,18 @@ int8_t nr_ue_decode_BCCH_DL_SCH(module_id_t module_id, uint8_t *pduP, uint32_t pdu_len); +/**\brief primitive from RLC layer to MAC layer to set if bearer exists for a logical channel. todo handle mac_LogicalChannelConfig + \param module_id module id + \param cc_id component carrier id + \param gNB_index gNB index + \param long logicalChannelIdentity*/ +int nr_rlc_mac_config_req_ue_logicalChannelBearer( + module_id_t module_id, + int cc_idP, + uint8_t gNB_index, + long logicalChannelIdentity +); + /**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config) \param module_id module id \param cc_id component carrier id diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 3dfe11f1ca..e6706aae56 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -1109,7 +1109,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in // Handle the SR/BSR procedures per subframe NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); uint8_t gNB_indexP=0; -#if 0 +#if 0 // todo // Get RLC status info and update Bj for all lcids that are active int lcid; // lcid index for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { @@ -1251,7 +1251,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, //Get Buffer Occupancy and fill lcid_reordered_array for (lcid=DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { //if (mac->logicalChannelConfig[lcid]) { - if (1) { + if (mac->logicalChannelBearer_exist[lcid] ) { // todo lcgid = mac->scheduling_info.LCGID[lcid]; // Store already available data to transmit per Group @@ -1281,7 +1281,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, do { //if (mac->logicalChannelConfig[lcid]->ul_SpecificParameters->priority <= highest_priority) { - if (1) { + if (1) { // todo //Insert if priority is higher or equal (lower or equal in value) for (pos_next=num_lcid_with_data-1; pos_next > array_index; pos_next--) { lcid_reordered_array[pos_next] = lcid_reordered_array[pos_next - 1]; diff --git a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c index a10c029bd2..a9053e0acd 100644 --- a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c +++ b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c @@ -37,6 +37,7 @@ #include "NR_RLC-Config.h" #include "common/ran_context.h" #include "NR_UL-CCCH-Message.h" +#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h" #include "openair2/F1AP/f1ap_du_rrc_message_transfer.h" @@ -270,8 +271,8 @@ mac_rlc_status_resp_t mac_rlc_status_ind( + buf_stat.retx_size + buf_stat.tx_size; } else { - if (!(frameP%128)) //to supress this warning message - LOG_D(RLC, "[%s] Radio Bearer (channel ID %d) is NULL for UE with rntiP %x\n", __FUNCTION__, channel_idP, rntiP); + if (!(frameP%128)) //to suppress this warning message + LOG_W(RLC, "[%s] Radio Bearer (channel ID %d) is NULL for UE with rntiP %x\n", __FUNCTION__, channel_idP, rntiP); ret.bytes_in_buffer = 0; } @@ -334,6 +335,8 @@ rlc_buffer_occupancy_t mac_rlc_get_buffer_occupancy_ind( + buf_stat.retx_size + buf_stat.tx_size; } else { + if (!(frameP%128)) //to suppress this warning message + LOG_W(RLC, "[%s] Radio Bearer (channel ID %d) is NULL for UE with rntiP %x\n", __FUNCTION__, channel_idP, rntiP); ret = 0; } @@ -934,6 +937,9 @@ rlc_op_status_t nr_rrc_rlc_config_asn1_req (const protocol_ctxt_t * const ctxt if(rlc_bearer2add_list->list.array[j]->servedRadioBearer->present == NR_RLC_BearerConfig__servedRadioBearer_PR_srb_Identity){ if(srb2add_listP->list.array[i]->srb_Identity == rlc_bearer2add_list->list.array[j]->servedRadioBearer->choice.srb_Identity){ add_rlc_srb(rnti, srb2add_listP->list.array[i], rlc_bearer2add_list->list.array[j]); + LOG_I(RLC, "[FRAME %05d][RLC_UE][MOD %02d][][--- MAC_CONFIG_REQ (SRB%ld gNB %d) --->][MAC_UE][MOD %02d][]\n", + ctxt_pP->frame, ctxt_pP->module_id, rlc_bearer2add_list->list.array[j]->logicalChannelIdentity, 0, ctxt_pP->module_id); + nr_rlc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,0,rlc_bearer2add_list->list.array[j]->logicalChannelIdentity); } } } @@ -946,16 +952,19 @@ rlc_op_status_t nr_rrc_rlc_config_asn1_req (const protocol_ctxt_t * const ctxt if ((drb2add_listP != NULL) && (rlc_bearer2add_list != NULL)) { for (i = 0; i < drb2add_listP->list.count; i++) { if (rlc_bearer2add_list != NULL) { - for(j = 0; j < rlc_bearer2add_list->list.count; j++){ - if(rlc_bearer2add_list->list.array[j]->servedRadioBearer != NULL){ - if(rlc_bearer2add_list->list.array[j]->servedRadioBearer->present == NR_RLC_BearerConfig__servedRadioBearer_PR_drb_Identity){ - if(drb2add_listP->list.array[i]->drb_Identity == rlc_bearer2add_list->list.array[j]->servedRadioBearer->choice.drb_Identity){ - add_drb(rnti, drb2add_listP->list.array[i], rlc_bearer2add_list->list.array[j]); + for(j = 0; j < rlc_bearer2add_list->list.count; j++){ + if(rlc_bearer2add_list->list.array[j]->servedRadioBearer != NULL){ + if(rlc_bearer2add_list->list.array[j]->servedRadioBearer->present == NR_RLC_BearerConfig__servedRadioBearer_PR_drb_Identity){ + if(drb2add_listP->list.array[i]->drb_Identity == rlc_bearer2add_list->list.array[j]->servedRadioBearer->choice.drb_Identity){ + add_drb(rnti, drb2add_listP->list.array[i], rlc_bearer2add_list->list.array[j]); + LOG_I(RLC, "[FRAME %05d][RLC_UE][MOD %02d][][--- MAC_CONFIG_REQ (DRB%ldles gNB %d) --->][MAC_UE][MOD %02d][]\n", + ctxt_pP->frame, ctxt_pP->module_id, rlc_bearer2add_list->list.array[j]->logicalChannelIdentity, 0, ctxt_pP->module_id); + nr_rlc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,0,rlc_bearer2add_list->list.array[j]->logicalChannelIdentity); + } } - } + } } } - } } } From e8156ddba7265834a7a19516b3351e3803a31195 Mon Sep 17 00:00:00 2001 From: mjoang Date: Mon, 23 Aug 2021 15:38:52 -0400 Subject: [PATCH 019/102] 1. Move NR_LONG_BSR_TABLE and NR_SHORT_BSR_TABLE to nr_mac_common.c 2. Change nr_rlc_mac_config_req_ue_logicalChannelBearer to nr_rrc_mac_config_req_ue_logicalChannelBearer. --- openair2/LAYER2/NR_MAC_COMMON/nr_mac.h | 3 ++ openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 27 +++++++++++++++++ openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h | 3 ++ openair2/LAYER2/NR_MAC_UE/config_ue.c | 2 +- openair2/LAYER2/NR_MAC_UE/mac_proto.h | 4 +-- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 30 +------------------ .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 29 +----------------- openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c | 7 ----- openair2/RRC/NR_UE/rrc_UE.c | 17 ++++++++++- 9 files changed, 54 insertions(+), 68 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h index f8f3b72cae..5aad18a165 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h @@ -38,6 +38,9 @@ #include #include +#define NR_SHORT_BSR_TABLE_SIZE 32 +#define NR_LONG_BSR_TABLE_SIZE 256 + #define TABLE_38213_13_1_NUM_INDEXES 15 #define TABLE_38213_13_2_NUM_INDEXES 14 #define TABLE_38213_13_3_NUM_INDEXES 9 diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index 7fcc9b2297..e2d197b375 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -48,6 +48,33 @@ void reverse_n_bits(uint8_t *value, uint16_t bitlen) { } } +//38.321 Table 6.1.3.1-1 +const uint32_t NR_SHORT_BSR_TABLE[NR_SHORT_BSR_TABLE_SIZE] = { + 0, 10, 14, 20, 28, 38, 53, 74, + 102, 142, 198, 276, 384, 535, 745, 1038, + 1446, 2014, 2806, 3909, 5446, 7587, 10570, 14726, +20516, 28581, 39818, 55474, 77284, 107669, 150000, 300000 +}; + +//38.321 Table 6.1.3.1-2 +const uint32_t NR_LONG_BSR_TABLE[NR_LONG_BSR_TABLE_SIZE] ={ + 0, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 22, 23, 25, 26, + 28, 30, 32, 34, 36, 38, 40, 43, 46, 49, 52, 55, 59, 62, 66, 71, + 75, 80, 85, 91, 97, 103, 110, 117, 124, 132, 141, 150, 160, 170, 181, 193, + 205, 218, 233, 248, 264, 281, 299, 318, 339, 361, 384, 409, 436, 464, 494, 526, + 560, 597, 635, 677, 720, 767, 817, 870, 926, 987, 1051, 1119, 1191, 1269, 1351, 1439, + 1532, 1631, 1737, 1850, 1970, 2098, 2234, 2379, 2533, 2698, 2873, 3059, 3258, 3469, 3694, 3934, + 4189, 4461, 4751, 5059, 5387, 5737, 6109, 6506, 6928, 7378, 7857, 8367, 8910, 9488, 10104, 10760, + 11458, 12202, 12994, 13838, 14736, 15692, 16711, 17795, 18951, 20181, 21491, 22885, 24371, 25953, 27638, 29431, + 31342, 33376, 35543, 37850, 40307, 42923, 45709, 48676, 51836, 55200, 58784, 62599, 66663, 70990, 75598, 80505, + 85730, 91295, 97221, 103532, 110252, 117409, 125030, 133146, 141789, 150992, 160793, 171231, 182345, 194182, 206786, 220209, + 234503, 249725, 265935, 283197, 301579, 321155, 342002, 364202, 387842, 413018, 439827, 468377, 498780, 531156, 565634, 602350, + 641449, 683087, 727427, 774645, 824928, 878475, 935498, 996222, 1060888, 1129752, 1203085, 1281179, 1364342, 1452903, 1547213, 1647644, + 1754595, 1868488, 1989774, 2118933, 2256475, 2402946, 2558924, 2725027, 2901912, 3090279, 3290873, 3504487, 3731968, 3974215, 4232186, 4506902, + 4799451, 5110989, 5442750, 5796046, 6172275, 6572925, 6999582, 7453933, 7937777, 8453028, 9001725, 9586039, 10208280, 10870913, 11576557, 12328006, +13128233, 13980403, 14887889, 15854280, 16883401, 17979324, 19146385, 20389201, 21712690, 23122088, 24622972, 26221280, 27923336, 29735875, 31666069, 33721553, +35910462, 38241455, 40723756, 43367187, 46182206, 49179951, 52372284, 55771835, 59392055, 63247269, 67352729, 71724679, 76380419, 81338368, 162676736, 4294967295 +}; // start symbols for SSB types A,B,C,D,E uint16_t symbol_ssb_AC[8]={2,8,16,22,30,36,44,50}; diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h index 1b3e5e5d60..d86178995b 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h @@ -76,6 +76,9 @@ extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX]; extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; #endif*/ +extern const uint32_t NR_SHORT_BSR_TABLE[NR_SHORT_BSR_TABLE_SIZE]; +extern const uint32_t NR_LONG_BSR_TABLE[NR_LONG_BSR_TABLE_SIZE]; + // Type0-PDCCH search space extern const int32_t table_38213_13_1_c1[16]; extern const int32_t table_38213_13_1_c2[16]; diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 7b8113da49..d972057f7f 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -673,7 +673,7 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){ } // todo handle mac_LogicalChannelConfig -int nr_rlc_mac_config_req_ue_logicalChannelBearer( +int nr_rrc_mac_config_req_ue_logicalChannelBearer( module_id_t module_id, int cc_idP, uint8_t gNB_index, diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index 1f5fc02df7..e4504acb6b 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -78,12 +78,12 @@ int8_t nr_ue_decode_BCCH_DL_SCH(module_id_t module_id, uint8_t *pduP, uint32_t pdu_len); -/**\brief primitive from RLC layer to MAC layer to set if bearer exists for a logical channel. todo handle mac_LogicalChannelConfig +/**\brief primitive from RRC layer to MAC layer to set if bearer exists for a logical channel. todo handle mac_LogicalChannelConfig \param module_id module id \param cc_id component carrier id \param gNB_index gNB index \param long logicalChannelIdentity*/ -int nr_rlc_mac_config_req_ue_logicalChannelBearer( +int nr_rrc_mac_config_req_ue_logicalChannelBearer( module_id_t module_id, int cc_idP, uint8_t gNB_index, diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index e6706aae56..d72bd5297c 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -53,35 +53,7 @@ #include -#define NR_SHORT_BSR_TABLE_SIZE 32 -#define NR_LONG_BSR_TABLE_SIZE 256 -//38.321 Table 6.1.3.1-1 -const uint32_t NR_SHORT_BSR_TABLE[NR_SHORT_BSR_TABLE_SIZE] = { - 0, 10, 14, 20, 28, 38, 53, 74, - 102, 142, 198, 276, 384, 535, 745, 1038, - 1446, 2014, 2806, 3909, 5446, 7587, 10570, 14726, -20516, 28581, 39818, 55474, 77284, 107669, 150000, 300000 -}; - -//38.321 Table 6.1.3.1-2 -const uint32_t NR_LONG_BSR_TABLE[NR_LONG_BSR_TABLE_SIZE] ={ - 0, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 22, 23, 25, 26, - 28, 30, 32, 34, 36, 38, 40, 43, 46, 49, 52, 55, 59, 62, 66, 71, - 75, 80, 85, 91, 97, 103, 110, 117, 124, 132, 141, 150, 160, 170, 181, 193, - 205, 218, 233, 248, 264, 281, 299, 318, 339, 361, 384, 409, 436, 464, 494, 526, - 560, 597, 635, 677, 720, 767, 817, 870, 926, 987, 1051, 1119, 1191, 1269, 1351, 1439, - 1532, 1631, 1737, 1850, 1970, 2098, 2234, 2379, 2533, 2698, 2873, 3059, 3258, 3469, 3694, 3934, - 4189, 4461, 4751, 5059, 5387, 5737, 6109, 6506, 6928, 7378, 7857, 8367, 8910, 9488, 10104, 10760, - 11458, 12202, 12994, 13838, 14736, 15692, 16711, 17795, 18951, 20181, 21491, 22885, 24371, 25953, 27638, 29431, - 31342, 33376, 35543, 37850, 40307, 42923, 45709, 48676, 51836, 55200, 58784, 62599, 66663, 70990, 75598, 80505, - 85730, 91295, 97221, 103532, 110252, 117409, 125030, 133146, 141789, 150992, 160793, 171231, 182345, 194182, 206786, 220209, - 234503, 249725, 265935, 283197, 301579, 321155, 342002, 364202, 387842, 413018, 439827, 468377, 498780, 531156, 565634, 602350, - 641449, 683087, 727427, 774645, 824928, 878475, 935498, 996222, 1060888, 1129752, 1203085, 1281179, 1364342, 1452903, 1547213, 1647644, - 1754595, 1868488, 1989774, 2118933, 2256475, 2402946, 2558924, 2725027, 2901912, 3090279, 3290873, 3504487, 3731968, 3974215, 4232186, 4506902, - 4799451, 5110989, 5442750, 5796046, 6172275, 6572925, 6999582, 7453933, 7937777, 8453028, 9001725, 9586039, 10208280, 10870913, 11576557, 12328006, -13128233, 13980403, 14887889, 15854280, 16883401, 17979324, 19146385, 20389201, 21712690, 23122088, 24622972, 26221280, 27923336, 29735875, 31666069, 33721553, -35910462, 38241455, 40723756, 43367187, 46182206, 49179951, 52372284, 55771835, 59392055, 63247269, 67352729, 71724679, 76380419, 81338368, 162676736, 4294967295 -}; +#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h" static prach_association_pattern_t prach_assoc_pattern; static ssb_list_info_t ssb_list; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 11d2090094..bf38976a2d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -34,34 +34,7 @@ #include "common/utils/nr/nr_common.h" #include - -//38.321 Table 6.1.3.1-1 -const uint32_t NR_SHORT_BSR_TABLE[32] = { - 0, 10, 14, 20, 28, 38, 53, 74, - 102, 142, 198, 276, 384, 535, 745, 1038, - 1446, 2014, 2806, 3909, 5446, 7587, 10570, 14726, -20516, 28581, 39818, 55474, 77284, 107669, 150000, 300000 -}; - -//38.321 Table 6.1.3.1-2 -const uint32_t NR_LONG_BSR_TABLE[256] ={ - 0, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 22, 23, 25, 26, - 28, 30, 32, 34, 36, 38, 40, 43, 46, 49, 52, 55, 59, 62, 66, 71, - 75, 80, 85, 91, 97, 103, 110, 117, 124, 132, 141, 150, 160, 170, 181, 193, - 205, 218, 233, 248, 264, 281, 299, 318, 339, 361, 384, 409, 436, 464, 494, 526, - 560, 597, 635, 677, 720, 767, 817, 870, 926, 987, 1051, 1119, 1191, 1269, 1351, 1439, - 1532, 1631, 1737, 1850, 1970, 2098, 2234, 2379, 2533, 2698, 2873, 3059, 3258, 3469, 3694, 3934, - 4189, 4461, 4751, 5059, 5387, 5737, 6109, 6506, 6928, 7378, 7857, 8367, 8910, 9488, 10104, 10760, - 11458, 12202, 12994, 13838, 14736, 15692, 16711, 17795, 18951, 20181, 21491, 22885, 24371, 25953, 27638, 29431, - 31342, 33376, 35543, 37850, 40307, 42923, 45709, 48676, 51836, 55200, 58784, 62599, 66663, 70990, 75598, 80505, - 85730, 91295, 97221, 103532, 110252, 117409, 125030, 133146, 141789, 150992, 160793, 171231, 182345, 194182, 206786, 220209, - 234503, 249725, 265935, 283197, 301579, 321155, 342002, 364202, 387842, 413018, 439827, 468377, 498780, 531156, 565634, 602350, - 641449, 683087, 727427, 774645, 824928, 878475, 935498, 996222, 1060888, 1129752, 1203085, 1281179, 1364342, 1452903, 1547213, 1647644, - 1754595, 1868488, 1989774, 2118933, 2256475, 2402946, 2558924, 2725027, 2901912, 3090279, 3290873, 3504487, 3731968, 3974215, 4232186, 4506902, - 4799451, 5110989, 5442750, 5796046, 6172275, 6572925, 6999582, 7453933, 7937777, 8453028, 9001725, 9586039, 10208280, 10870913, 11576557, 12328006, -13128233, 13980403, 14887889, 15854280, 16883401, 17979324, 19146385, 20389201, 21712690, 23122088, 24622972, 26221280, 27923336, 29735875, 31666069, 33721553, -35910462, 38241455, 40723756, 43367187, 46182206, 49179951, 52372284, 55771835, 59392055, 63247269, 67352729, 71724679, 76380419, 81338368, 162676736, 4294967295 -}; +#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h" void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ubwp) { diff --git a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c index a9053e0acd..db1cf03dda 100644 --- a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c +++ b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c @@ -37,7 +37,6 @@ #include "NR_RLC-Config.h" #include "common/ran_context.h" #include "NR_UL-CCCH-Message.h" -#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h" #include "openair2/F1AP/f1ap_du_rrc_message_transfer.h" @@ -937,9 +936,6 @@ rlc_op_status_t nr_rrc_rlc_config_asn1_req (const protocol_ctxt_t * const ctxt if(rlc_bearer2add_list->list.array[j]->servedRadioBearer->present == NR_RLC_BearerConfig__servedRadioBearer_PR_srb_Identity){ if(srb2add_listP->list.array[i]->srb_Identity == rlc_bearer2add_list->list.array[j]->servedRadioBearer->choice.srb_Identity){ add_rlc_srb(rnti, srb2add_listP->list.array[i], rlc_bearer2add_list->list.array[j]); - LOG_I(RLC, "[FRAME %05d][RLC_UE][MOD %02d][][--- MAC_CONFIG_REQ (SRB%ld gNB %d) --->][MAC_UE][MOD %02d][]\n", - ctxt_pP->frame, ctxt_pP->module_id, rlc_bearer2add_list->list.array[j]->logicalChannelIdentity, 0, ctxt_pP->module_id); - nr_rlc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,0,rlc_bearer2add_list->list.array[j]->logicalChannelIdentity); } } } @@ -957,9 +953,6 @@ rlc_op_status_t nr_rrc_rlc_config_asn1_req (const protocol_ctxt_t * const ctxt if(rlc_bearer2add_list->list.array[j]->servedRadioBearer->present == NR_RLC_BearerConfig__servedRadioBearer_PR_drb_Identity){ if(drb2add_listP->list.array[i]->drb_Identity == rlc_bearer2add_list->list.array[j]->servedRadioBearer->choice.drb_Identity){ add_drb(rnti, drb2add_listP->list.array[i], rlc_bearer2add_list->list.array[j]); - LOG_I(RLC, "[FRAME %05d][RLC_UE][MOD %02d][][--- MAC_CONFIG_REQ (DRB%ldles gNB %d) --->][MAC_UE][MOD %02d][]\n", - ctxt_pP->frame, ctxt_pP->module_id, rlc_bearer2add_list->list.array[j]->logicalChannelIdentity, 0, ctxt_pP->module_id); - nr_rlc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,0,rlc_bearer2add_list->list.array[j]->logicalChannelIdentity); } } } diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index c988ec9b80..c00a3c5b66 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -2083,6 +2083,7 @@ nr_rrc_ue_establish_srb2( LOG_I(NR_RRC, "[FRAME %05d][RRC_UE][MOD %02d][][--- MAC_CONFIG_REQ (SRB1 gNB %d) --->][MAC_UE][MOD %02d][]\n", ctxt_pP->frame, ctxt_pP->module_id, gNB_index, ctxt_pP->module_id); + nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,gNB_index,1); // rrc_mac_config_req_ue } } else { @@ -2098,6 +2099,7 @@ nr_rrc_ue_establish_srb2( LOG_I(NR_RRC, "[FRAME %05d][RRC_UE][MOD %02d][][--- MAC_CONFIG_REQ (SRB2 gNB %d) --->][MAC_UE][MOD %02d][]\n", ctxt_pP->frame, ctxt_pP->module_id, gNB_index, ctxt_pP->module_id); + nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,gNB_index,2); // rrc_mac_config_req_ue } } // srb2 @@ -2118,8 +2120,21 @@ nr_rrc_ue_establish_srb2( memcpy(NR_UE_rrc_inst[ctxt_pP->module_id].DRB_config[gNB_index][DRB_id-1], radioBearerConfig->drb_ToAddModList->list.array[cnt], sizeof(NR_DRB_ToAddMod_t)); } else { - LOG_D(NR_RRC, "Adding DRB %ld %p\n", DRB_id-1, radioBearerConfig->drb_ToAddModList->list.array[cnt]); + //LOG_D(NR_RRC, "Adding DRB %ld %p\n", DRB_id-1, radioBearerConfig->drb_ToAddModList->list.array[cnt]); NR_UE_rrc_inst[ctxt_pP->module_id].DRB_config[gNB_index][DRB_id-1] = radioBearerConfig->drb_ToAddModList->list.array[cnt]; + int j; + struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_bearer2add_list = NR_UE_rrc_inst[ctxt_pP->module_id].cell_group_config->rlc_BearerToAddModList; + if (rlc_bearer2add_list != NULL) { + for(j = 0; j < rlc_bearer2add_list->list.count; j++){ + if(rlc_bearer2add_list->list.array[j]->servedRadioBearer != NULL){ + if(rlc_bearer2add_list->list.array[j]->servedRadioBearer->present == NR_RLC_BearerConfig__servedRadioBearer_PR_drb_Identity){ + LOG_I(NR_RRC, "[FRAME %05d][RRC_UE][MOD %02d][][--- MAC_CONFIG_REQ (DRB lcid %ld gNB %d) --->][MAC_UE][MOD %02d][]\n", + ctxt_pP->frame, ctxt_pP->module_id, rlc_bearer2add_list->list.array[j]->logicalChannelIdentity, 0, ctxt_pP->module_id); + nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,0,rlc_bearer2add_list->list.array[j]->logicalChannelIdentity); + } + } + } + } } } From a1595c3109d2c6b0860fc15c2f8612a74d49e7d7 Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 24 Aug 2021 18:02:54 +0200 Subject: [PATCH 020/102] setting ulsch inactivity timer from slots to frames and removing it from config files (default 10 frames) --- ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf | 3 +-- .../conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf | 1 - ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf | 1 - openair2/GNB_APP/MACRLC_nr_paramdef.h | 6 +++--- openair2/GNB_APP/gnb_config.c | 2 +- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 2 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 2 +- .../CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf | 1 - .../CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf | 1 - 9 files changed, 7 insertions(+), 12 deletions(-) diff --git a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf index a4d9985dca..87f4c445e5 100644 --- a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf @@ -228,9 +228,8 @@ MACRLCs = ( num_cc = 1; tr_s_preference = "local_L1"; tr_n_preference = "local_RRC"; - ulsch_max_slots_inactivity = 1; pusch_TargetSNRx10 = 200; - pucch_TargetSNRx10 = 200; + pucch_TargetSNRx10 = 200; } ); diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf index db190f177d..717d98e2ed 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -229,7 +229,6 @@ MACRLCs = ( num_cc = 1; tr_s_preference = "local_L1"; tr_n_preference = "local_RRC"; - ulsch_max_slots_inactivity = 100; pusch_TargetSNRx10 = 200; pucch_TargetSNRx10 = 200; } diff --git a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf index 8d32e8b792..b3740f6ecc 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf @@ -211,7 +211,6 @@ MACRLCs = ( num_cc = 1; tr_s_preference = "local_L1"; tr_n_preference = "local_RRC"; - ulsch_max_slots_inactivity = 1; } ); diff --git a/openair2/GNB_APP/MACRLC_nr_paramdef.h b/openair2/GNB_APP/MACRLC_nr_paramdef.h index aca88b9ea7..63c643ccc9 100644 --- a/openair2/GNB_APP/MACRLC_nr_paramdef.h +++ b/openair2/GNB_APP/MACRLC_nr_paramdef.h @@ -55,7 +55,7 @@ #define CONFIG_STRING_MACRLC_REMOTE_S_PORTC "remote_s_portc" #define CONFIG_STRING_MACRLC_LOCAL_S_PORTD "local_s_portd" #define CONFIG_STRING_MACRLC_REMOTE_S_PORTD "remote_s_portd" -#define CONFIG_STRING_MACRLC_ULSCH_MAX_SLOTS_INACTIVITY "ulsch_max_slots_inactivity" +#define CONFIG_STRING_MACRLC_ULSCH_MAX_FRAME_INACTIVITY "ulsch_max_frame_inactivity" #define CONFIG_STRING_MACRLC_PUSCHTARGETSNRX10 "pusch_TargetSNRx10" #define CONFIG_STRING_MACRLC_PUCCHTARGETSNRX10 "pucch_TargetSNRx10" #define CONFIG_STRING_MACRLC_PUCCHFAILURETHRES "pucch_FailureThres" @@ -83,7 +83,7 @@ {CONFIG_STRING_MACRLC_REMOTE_S_PORTC, NULL, 0, uptr:NULL, defintval:50020, TYPE_UINT, 0}, \ {CONFIG_STRING_MACRLC_LOCAL_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \ {CONFIG_STRING_MACRLC_REMOTE_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \ -{CONFIG_STRING_MACRLC_ULSCH_MAX_SLOTS_INACTIVITY, "Maximum number of slots before a UE is scheduled ULSCH due to inactivity", 0, uptr:NULL, defintval:200, TYPE_UINT, 0}, \ +{CONFIG_STRING_MACRLC_ULSCH_MAX_FRAME_INACTIVITY, NULL, 0, uptr:NULL, defintval:10, TYPE_UINT, 0}, \ {CONFIG_STRING_MACRLC_PUSCHTARGETSNRX10, NULL, 0, iptr:NULL, defintval:200, TYPE_INT, 0}, \ {CONFIG_STRING_MACRLC_PUCCHTARGETSNRX10, NULL, 0, iptr:NULL, defintval:150, TYPE_INT, 0}, \ {CONFIG_STRING_MACRLC_PUCCHFAILURETHRES, NULL, 0, iptr:NULL, defintval:10, TYPE_INT, 0}, \ @@ -106,7 +106,7 @@ #define MACRLC_REMOTE_S_PORTC_IDX 14 #define MACRLC_LOCAL_S_PORTD_IDX 15 #define MACRLC_REMOTE_S_PORTD_IDX 16 -#define MACRLC_ULSCH_MAX_SLOTS_INACTIVITY 17 +#define MACRLC_ULSCH_MAX_FRAME_INACTIVITY 17 #define MACRLC_PUSCHTARGETSNRX10_IDX 18 #define MACRLC_PUCCHTARGETSNRX10_IDX 19 #define MACRLC_PUCCHFAILURETHRES_IDX 20 diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 7ce5b542c9..7ff5a88d25 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -695,7 +695,7 @@ void RCconfig_nr_macrlc() { }else { // other midhaul AssertFatal(1==0,"MACRLC %d: %s unknown southbound midhaul\n",j,*(MacRLC_ParamList.paramarray[j][MACRLC_TRANSPORT_S_PREFERENCE_IDX].strptr)); } - RC.nrmac[j]->ulsch_max_slots_inactivity = *(MacRLC_ParamList.paramarray[j][MACRLC_ULSCH_MAX_SLOTS_INACTIVITY].uptr); + RC.nrmac[j]->ulsch_max_frame_inactivity = *(MacRLC_ParamList.paramarray[j][MACRLC_ULSCH_MAX_FRAME_INACTIVITY].uptr); }// for (j=0;j 0 LOG_E(PHY,"No %s configuration found\n", CONFIG_STRING_MACRLC_LIST); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index bf38976a2d..60962f39b4 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -811,7 +811,7 @@ bool nr_UE_is_to_be_scheduled(module_id_t mod_id, int CC_id, int UE_id, frame_t * (2) there is a scheduling request * (3) or we did not schedule it in more than 10 frames */ const bool has_data = sched_ctrl->estimated_ul_buffer > sched_ctrl->sched_ul_bytes; - const bool high_inactivity = diff >= nrmac->ulsch_max_slots_inactivity; + const bool high_inactivity = diff >= nrmac->ulsch_max_frame_inactivity * n; LOG_D(NR_MAC, "%4d.%2d UL inactivity %d slots has_data %d SR %d\n", frame, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index bd88c39306..210f385670 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -739,7 +739,7 @@ typedef struct gNB_MAC_INST_s { int *preferred_ul_tda[MAX_NUM_BWP]; /// maximum number of slots before a UE will be scheduled ULSCH automatically - uint32_t ulsch_max_slots_inactivity; + uint32_t ulsch_max_frame_inactivity; /// DL preprocessor for differentiated scheduling nr_pp_impl_dl pre_processor_dl; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf index 1a28ebb950..be98e88e71 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf @@ -229,7 +229,6 @@ MACRLCs = ( num_cc = 1; tr_s_preference = "local_L1"; tr_n_preference = "local_RRC"; - ulsch_max_slots_inactivity = 100; pusch_TargetSNRx10 = 200; pucch_TargetSNRx10 = 200; } diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index 718038657b..a17197f7d4 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -229,7 +229,6 @@ MACRLCs = ( num_cc = 1; tr_s_preference = "local_L1"; tr_n_preference = "local_RRC"; - ulsch_max_slots_inactivity = 100; pusch_TargetSNRx10 = 200; pucch_TargetSNRx10 = 200; } From 1d33305a709f9c6bf02f1f7c328dfa7408d9c813 Mon Sep 17 00:00:00 2001 From: Mario Joa-Ng Date: Tue, 24 Aug 2021 12:51:32 -0400 Subject: [PATCH 021/102] NR_UE: set mac->logicalChannelBearer_exist to false when RLC bearer is released. --- openair2/LAYER2/NR_MAC_UE/config_ue.c | 5 +++-- openair2/LAYER2/NR_MAC_UE/mac_proto.h | 6 ++++-- openair2/RRC/NR_UE/rrc_UE.c | 19 +++++++++++++++---- 3 files changed, 22 insertions(+), 8 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index d972057f7f..54cf380dd2 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -677,9 +677,10 @@ int nr_rrc_mac_config_req_ue_logicalChannelBearer( module_id_t module_id, int cc_idP, uint8_t gNB_index, - long logicalChannelIdentity){ + long logicalChannelIdentity, + boolean_t status){ NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); - mac->logicalChannelBearer_exist[logicalChannelIdentity] = true; + mac->logicalChannelBearer_exist[logicalChannelIdentity] = status; return 0; } diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index e4504acb6b..2389beb220 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -82,12 +82,14 @@ int8_t nr_ue_decode_BCCH_DL_SCH(module_id_t module_id, \param module_id module id \param cc_id component carrier id \param gNB_index gNB index - \param long logicalChannelIdentity*/ + \param long logicalChannelIdentity + \param boolean_t status*/ int nr_rrc_mac_config_req_ue_logicalChannelBearer( module_id_t module_id, int cc_idP, uint8_t gNB_index, - long logicalChannelIdentity + long logicalChannelIdentity, + boolean_t status ); /**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config) diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index c00a3c5b66..1755c59115 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -2083,7 +2083,7 @@ nr_rrc_ue_establish_srb2( LOG_I(NR_RRC, "[FRAME %05d][RRC_UE][MOD %02d][][--- MAC_CONFIG_REQ (SRB1 gNB %d) --->][MAC_UE][MOD %02d][]\n", ctxt_pP->frame, ctxt_pP->module_id, gNB_index, ctxt_pP->module_id); - nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,gNB_index,1); + nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,gNB_index,1,true); //todo handle mac_LogicalChannelConfig // rrc_mac_config_req_ue } } else { @@ -2099,7 +2099,7 @@ nr_rrc_ue_establish_srb2( LOG_I(NR_RRC, "[FRAME %05d][RRC_UE][MOD %02d][][--- MAC_CONFIG_REQ (SRB2 gNB %d) --->][MAC_UE][MOD %02d][]\n", ctxt_pP->frame, ctxt_pP->module_id, gNB_index, ctxt_pP->module_id); - nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,gNB_index,2); + nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,gNB_index,2,true); //todo handle mac_LogicalChannelConfig // rrc_mac_config_req_ue } } // srb2 @@ -2128,9 +2128,11 @@ nr_rrc_ue_establish_srb2( for(j = 0; j < rlc_bearer2add_list->list.count; j++){ if(rlc_bearer2add_list->list.array[j]->servedRadioBearer != NULL){ if(rlc_bearer2add_list->list.array[j]->servedRadioBearer->present == NR_RLC_BearerConfig__servedRadioBearer_PR_drb_Identity){ + if(DRB_id == rlc_bearer2add_list->list.array[j]->servedRadioBearer->choice.drb_Identity){ LOG_I(NR_RRC, "[FRAME %05d][RRC_UE][MOD %02d][][--- MAC_CONFIG_REQ (DRB lcid %ld gNB %d) --->][MAC_UE][MOD %02d][]\n", - ctxt_pP->frame, ctxt_pP->module_id, rlc_bearer2add_list->list.array[j]->logicalChannelIdentity, 0, ctxt_pP->module_id); - nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,0,rlc_bearer2add_list->list.array[j]->logicalChannelIdentity); + ctxt_pP->frame, ctxt_pP->module_id, rlc_bearer2add_list->list.array[j]->logicalChannelIdentity, 0, ctxt_pP->module_id); + nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,0,rlc_bearer2add_list->list.array[j]->logicalChannelIdentity,true); //todo handle mac_LogicalChannelConfig + } } } } @@ -2182,6 +2184,15 @@ nr_rrc_ue_establish_srb2( } } + if (NR_UE_rrc_inst[ctxt_pP->module_id].cell_group_config->rlc_BearerToReleaseList != NULL) { + for (i = 0; i < NR_UE_rrc_inst[ctxt_pP->module_id].cell_group_config->rlc_BearerToReleaseList->list.count; i++) { + int lcid = *NR_UE_rrc_inst[ctxt_pP->module_id].cell_group_config->rlc_BearerToReleaseList->list.array[i]; + LOG_I(NR_RRC, "[FRAME %05d][RRC_UE][MOD %02d][][--- MAC_CONFIG_REQ (RB lcid %ld gNB %d release) --->][MAC_UE][MOD %02d][]\n", + ctxt_pP->frame, ctxt_pP->module_id, lcid, 0, ctxt_pP->module_id); + nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,0,lcid,false); //todo handle mac_LogicalChannelConfig + } + } + NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].State = NR_RRC_CONNECTED; LOG_I(NR_RRC,"[UE %d] State = NR_RRC_CONNECTED (gNB %d)\n", ctxt_pP->module_id, gNB_index); } From 382086d151205b0d9b2176a5dc3a67e3adc78a24 Mon Sep 17 00:00:00 2001 From: Mario Joa-Ng Date: Tue, 24 Aug 2021 14:28:23 -0400 Subject: [PATCH 022/102] NR_UE: set mac->logicalChannelBearer_exist to false when RLC bearer is released. --- openair2/RRC/NR_UE/rrc_UE.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index 1755c59115..ff0bb815d3 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -2186,7 +2186,7 @@ nr_rrc_ue_establish_srb2( if (NR_UE_rrc_inst[ctxt_pP->module_id].cell_group_config->rlc_BearerToReleaseList != NULL) { for (i = 0; i < NR_UE_rrc_inst[ctxt_pP->module_id].cell_group_config->rlc_BearerToReleaseList->list.count; i++) { - int lcid = *NR_UE_rrc_inst[ctxt_pP->module_id].cell_group_config->rlc_BearerToReleaseList->list.array[i]; + NR_LogicalChannelIdentity_t lcid = *NR_UE_rrc_inst[ctxt_pP->module_id].cell_group_config->rlc_BearerToReleaseList->list.array[i]; LOG_I(NR_RRC, "[FRAME %05d][RRC_UE][MOD %02d][][--- MAC_CONFIG_REQ (RB lcid %ld gNB %d release) --->][MAC_UE][MOD %02d][]\n", ctxt_pP->frame, ctxt_pP->module_id, lcid, 0, ctxt_pP->module_id); nr_rrc_mac_config_req_ue_logicalChannelBearer(ctxt_pP->module_id,0,0,lcid,false); //todo handle mac_LogicalChannelConfig From b5536c3a9cf1bd74020d7e11f0325482f8f278c8 Mon Sep 17 00:00:00 2001 From: Mario Joa-Ng Date: Fri, 27 Aug 2021 17:29:34 -0400 Subject: [PATCH 023/102] gNB assigns SR resources for UE according to its rtni --- openair2/RRC/NR/MESSAGES/asn1_msg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index e36644afb0..3c9ea178fb 100755 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -1036,7 +1036,7 @@ void fill_initial_SpCellConfig(rnti_t rnti, AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity==NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5, "TDD period != 5ms : %ld\n",scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); - schedulingRequestResourceConfig->periodicityAndOffset->choice.sl40 = 10*((rnti>>1)&3) + (rnti&2); + schedulingRequestResourceConfig->periodicityAndOffset->choice.sl40 = 8 + 10*((rnti>>1)&3) + (rnti&1); schedulingRequestResourceConfig->resource = calloc(1,sizeof(*schedulingRequestResourceConfig->resource)); *schedulingRequestResourceConfig->resource = 0; ASN_SEQUENCE_ADD(&pucch_Config->schedulingRequestResourceToAddModList->list,schedulingRequestResourceConfig); From d0575640fcf03837cb52b080a1cd19bac6018411 Mon Sep 17 00:00:00 2001 From: Masayuki Harada Date: Wed, 8 Sep 2021 22:52:50 +0900 Subject: [PATCH 024/102] Add calc kgnb and PDCP security settings in nrUE. --- openair2/RRC/NR_UE/rrc_UE.c | 92 ++++++++++++++++++----------- openair3/NAS/NR_UE/nr_nas_msg_sim.c | 37 +++++++++++- 2 files changed, 92 insertions(+), 37 deletions(-) diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index f272c16017..a244391ba8 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -1571,6 +1571,7 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB } +extern uint8_t global_kgnb[32]; //----------------------------------------------------------------------------- void nr_rrc_ue_process_securityModeCommand( @@ -1655,45 +1656,64 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB uint8_t *kRRCenc = NULL; uint8_t *kUPenc = NULL; uint8_t *kRRCint = NULL; - pdcp_t *pdcp_p = NULL; - hash_key_t key = HASHTABLE_NOT_A_KEY_VALUE; - hashtable_rc_t h_rc; - key = PDCP_COLL_KEY_VALUE(ctxt_pP->module_id, ctxt_pP->rnti, ctxt_pP->enb_flag, DCCH, SRB_FLAG_YES); - h_rc = hashtable_get(pdcp_coll_p, key, (void **) &pdcp_p); + uint8_t *k_kdf = NULL; +#ifndef PHYSIM + memcpy(NR_UE_rrc_inst[ctxt_pP->module_id].kgnb,global_kgnb,32); + k_kdf = NULL; + nr_derive_key_up_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm, + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, + &k_kdf); + /* kUPenc: last 128 bits of key derivation function which returns 256 bits */ + kUPenc = malloc(16); + if (kUPenc == NULL) exit(1); + memcpy(kUPenc, k_kdf+16, 16); + free(k_kdf); - if (h_rc == HASH_TABLE_OK) { - LOG_D(NR_RRC, "PDCP_COLL_KEY_VALUE() returns valid key = %ld\n", key); - LOG_D(NR_RRC, "driving kRRCenc, kRRCint and kUPenc from KgNB=" - "%02x%02x%02x%02x" - "%02x%02x%02x%02x" - "%02x%02x%02x%02x" - "%02x%02x%02x%02x" - "%02x%02x%02x%02x" - "%02x%02x%02x%02x" - "%02x%02x%02x%02x" - "%02x%02x%02x%02x\n", - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[0], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[1], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[2], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[3], - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[4], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[5], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[6], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[7], - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[8], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[9], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[10], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[11], - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[12], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[13], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[14], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[15], - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[16], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[17], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[18], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[19], - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[20], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[21], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[22], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[23], - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[24], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[25], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[26], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[27], - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[28], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[29], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[30], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[31]); - derive_key_rrc_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm,NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &kRRCenc); - derive_key_rrc_int(NR_UE_rrc_inst[ctxt_pP->module_id].integrityProtAlgorithm,NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &kRRCint); - derive_key_up_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm,NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &kUPenc); + k_kdf = NULL; + nr_derive_key_rrc_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm, + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, + &k_kdf); + /* kRRCenc: last 128 bits of key derivation function which returns 256 bits */ + kRRCenc = malloc(16); + if (kRRCenc == NULL) exit(1); + memcpy(kRRCenc, k_kdf+16, 16); + free(k_kdf); - if (securityMode != 0xff) { - pdcp_config_set_security(ctxt_pP, pdcp_p, 0, 0, - NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm - | (NR_UE_rrc_inst[ctxt_pP->module_id].integrityProtAlgorithm << 4), - kRRCenc, kRRCint, kUPenc); - } else { - LOG_I(NR_RRC, "skipped pdcp_config_set_security() as securityMode == 0x%02x", securityMode); - } + k_kdf = NULL; + nr_derive_key_rrc_int(NR_UE_rrc_inst[ctxt_pP->module_id].integrityProtAlgorithm, + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, + &k_kdf); + /* kRRCint: last 128 bits of key derivation function which returns 256 bits */ + kRRCint = malloc(16); + if (kRRCint == NULL) exit(1); + memcpy(kRRCint, k_kdf+16, 16); + free(k_kdf); +#endif + LOG_I(NR_RRC, "driving kRRCenc, kRRCint and kUPenc from KgNB=" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x\n", + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[0], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[1], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[2], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[3], + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[4], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[5], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[6], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[7], + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[8], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[9], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[10], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[11], + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[12], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[13], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[14], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[15], + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[16], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[17], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[18], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[19], + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[20], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[21], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[22], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[23], + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[24], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[25], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[26], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[27], + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[28], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[29], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[30], NR_UE_rrc_inst[ctxt_pP->module_id].kgnb[31]); + + if (securityMode != 0xff) { + pdcp_config_set_security(ctxt_pP, NULL, DCCH, DCCH+2, + NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm + | (NR_UE_rrc_inst[ctxt_pP->module_id].integrityProtAlgorithm << 4), + kRRCenc, kRRCint, kUPenc); } else { - LOG_I(NR_RRC, "Could not get PDCP instance where key=0x%ld\n", key); + LOG_I(NR_RRC, "skipped pdcp_config_set_security() as securityMode == 0x%02x", securityMode); } if (securityModeCommand->criticalExtensions.present == NR_SecurityModeCommand__criticalExtensions_PR_securityModeCommand) { diff --git a/openair3/NAS/NR_UE/nr_nas_msg_sim.c b/openair3/NAS/NR_UE/nr_nas_msg_sim.c index c6992642e9..ddc8a69294 100644 --- a/openair3/NAS/NR_UE/nr_nas_msg_sim.c +++ b/openair3/NAS/NR_UE/nr_nas_msg_sim.c @@ -374,6 +374,7 @@ void generateIdentityResponse(as_nas_info_t *initialNasMsg, uint8_t identitytype } OctetString knas_int; +uint8_t kamf[32]; static void generateAuthenticationResp(as_nas_info_t *initialNasMsg, uint8_t *buf, uicc_t *uicc){ uint8_t ak[6]; @@ -381,7 +382,6 @@ static void generateAuthenticationResp(as_nas_info_t *initialNasMsg, uint8_t *bu uint8_t kausf[32]; uint8_t sqn[6]; uint8_t kseaf[32]; - uint8_t kamf[32]; OctetString res; // get RAND for authentication request @@ -465,6 +465,40 @@ static void generateAuthenticationResp(as_nas_info_t *initialNasMsg, uint8_t *bu initialNasMsg->length = mm_msg_encode(mm_msg, (uint8_t*)(initialNasMsg->data), size); } +uint8_t global_kgnb[32]; +static void get_kgnb(uint32_t count) +{ + /* Compute the KDF input parameter + * S = FC(0x11) || UL NAS Count || 0x00 0x04 + */ + uint8_t input[32]; + // uint16_t length = 4; + // int offset = 0; + + LOG_TRACE(INFO, "%s with count= %d", __FUNCTION__, count); + memset(input, 0, 32); + input[0] = 0x6E; + // P0 + input[1] = count >> 24; + input[2] = (uint8_t)(count >> 16); + input[3] = (uint8_t)(count >> 8); + input[4] = (uint8_t)count; + // L0 + input[5] = 0; + input[6] = 4; + // P1 + input[7] = 0x01; + // L1 + input[8] = 0; + input[9] = 1; + + kdf(kamf, 32, input, 10, global_kgnb, 32); + printf("global_kgnb : "); + for(int pp=0;pp<32;pp++) + printf("%02x ",global_kgnb[pp]); + printf("\n"); +} + static void generateSecurityModeComplete(as_nas_info_t *initialNasMsg) { int size = sizeof(mm_msg_header_t); @@ -893,6 +927,7 @@ void *nas_nrue_task(void *args_p) generateAuthenticationResp(&initialNasMsg, pdu_buffer, uicc); break; case FGS_SECURITY_MODE_COMMAND: + get_kgnb(0); generateSecurityModeComplete(&initialNasMsg); break; case FGS_DOWNLINK_NAS_TRANSPORT: From cd11e1d8a285b10122362d5d22612b24bb2183eb Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 9 Sep 2021 10:20:15 +0200 Subject: [PATCH 025/102] fixes for cset0 bwp start and size --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 6 +++--- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 5 ++++- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 2 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 17 ++++++++++++++--- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 2 +- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 3 ++- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 2 ++ 7 files changed, 27 insertions(+), 10 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 606da48575..468d2b3bb9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -816,7 +816,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; - nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); nr_mac->pdcch_pdu_idx[CC_id][ra->bwp_id][coresetid] = pdcch_pdu_rel15; } @@ -1217,7 +1217,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15; } @@ -1578,7 +1578,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(nr_mac, pdcch_pdu_rel15, ss, coreset, scc, genericParameters, NULL); nr_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu_rel15; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index b74432b2ae..169e258d3f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -341,6 +341,8 @@ uint32_t schedule_control_sib1(module_id_t module_id, } AssertFatal(ret==1,"No aggregation level for type0_PDCCH_CSS found\n"); fill_coresetZero(gNB_mac->sched_ctrlCommon->coreset,type0_PDCCH_CSS_config); + gNB_mac->cset0_bwp_start = type0_PDCCH_CSS_config->cset_start_rb; + gNB_mac->cset0_bwp_size = type0_PDCCH_CSS_config->num_rbs; } gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation = time_domain_allocation; @@ -434,7 +436,8 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_req->nPDUs += 1; nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nr_configure_pdcch(pdcch_pdu_rel15, + nr_configure_pdcch(NULL, + pdcch_pdu_rel15, gNB_mac->sched_ctrlCommon->search_space, gNB_mac->sched_ctrlCommon->coreset, scc, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index f6c1fa7376..2215182cc3 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -896,7 +896,7 @@ void nr_schedule_ue_spec(module_id_t module_id, LOG_D(NR_MAC,"Trying to configure DL pdcch for bwp %d, cs %d\n",bwpid,coresetid); NR_SearchSpace_t *ss = bwp ? sched_ctrl->search_space:gNB_mac->sched_ctrlCommon->search_space; NR_ControlResourceSet_t *coreset = bwp? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset; - nr_configure_pdcch(pdcch_pdu, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(gNB_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL); gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 42315236c8..fb0ef8ae00 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -672,7 +672,8 @@ int nr_get_default_pucch_res(int pucch_ResourceCommon) { return(default_pucch_csset[pucch_ResourceCommon]); } -void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, +void nr_configure_pdcch(gNB_MAC_INST *gNB_mac, + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, NR_SearchSpace_t *ss, NR_ControlResourceSet_t *coreset, NR_ServingCellConfigCommon_t *scc, @@ -680,9 +681,19 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) { int sps; + AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId, + "coreset id in SS %ld does not correspond to the one in coreset %ld", + *ss->controlResourceSetId, coreset->controlResourceSetId); + if (bwp) { // This is not for SIB1 - pdcch_pdu->BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE); - pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE); + if(coreset->controlResourceSetId == 0){ + pdcch_pdu->BWPSize = gNB_mac->cset0_bwp_size; + pdcch_pdu->BWPStart = gNB_mac->cset0_bwp_start; + } + else { + pdcch_pdu->BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE); + pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE); + } pdcch_pdu->SubcarrierSpacing = bwp->subcarrierSpacing; pdcch_pdu->CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index f43c4bfa6e..06680f5e0d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1595,7 +1595,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15; ul_dci_req->numPdus += 1; - nr_configure_pdcch(pdcch_pdu, ss, coreset, scc, genericParameters, NULL); + nr_configure_pdcch(nr_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL); pdcch_pdu_bwp_coreset[bwpid][coresetid] = pdcch_pdu; } diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 588fd31247..add8856855 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -245,7 +245,8 @@ void find_search_space(int ss_type, NR_BWP_Downlink_t *bwp, NR_SearchSpace_t *ss); -void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, +void nr_configure_pdcch(gNB_MAC_INST *gNB_mac, + nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, NR_SearchSpace_t *ss, NR_ControlResourceSet_t *coreset, NR_ServingCellConfigCommon_t *scc, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 2000fd9358..44f9114762 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -752,6 +752,8 @@ typedef struct gNB_MAC_INST_s { nr_pp_impl_ul pre_processor_ul; NR_UE_sched_ctrl_t *sched_ctrlCommon; + uint16_t cset0_bwp_start; + uint16_t cset0_bwp_size; NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config[64]; bool first_MIB; From 10c4e95704ed8c90462270abfb95331e82c68330 Mon Sep 17 00:00:00 2001 From: francescomani Date: Fri, 10 Sep 2021 11:55:57 +0200 Subject: [PATCH 026/102] moving get_coreset_rballoc to nr_common --- cmake_targets/CMakeLists.txt | 1 - common/utils/nr/nr_common.c | 24 +++++++ common/utils/nr/nr_common.h | 1 + openair1/PHY/NR_TRANSPORT/nr_dci.c | 1 + openair1/PHY/NR_TRANSPORT/nr_dci.h | 2 - openair1/PHY/NR_TRANSPORT/nr_dci_tools.c | 1 + .../PHY/NR_TRANSPORT/nr_dci_tools_common.c | 62 ------------------- openair1/PHY/NR_UE_TRANSPORT/dci_nr.c | 2 +- .../PHY/NR_UE_TRANSPORT/nr_initial_sync.c | 1 + 9 files changed, 29 insertions(+), 66 deletions(-) delete mode 100644 openair1/PHY/NR_TRANSPORT/nr_dci_tools_common.c diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 9592334125..4b038f346e 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1744,7 +1744,6 @@ set(PHY_SRC_UE set(PHY_NR_SRC_COMMON ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_prach_common.c - ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci_tools_common.c ) set(PHY_NR_SRC diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c index 8ba4633604..b4c8c77753 100644 --- a/common/utils/nr/nr_common.c +++ b/common/utils/nr/nr_common.c @@ -231,6 +231,30 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) { } +void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) { + + uint8_t count=0, start=0, start_set=0; + + uint64_t bitmap = (((uint64_t)FreqDomainResource[0])<<37)| + (((uint64_t)FreqDomainResource[1])<<29)| + (((uint64_t)FreqDomainResource[2])<<21)| + (((uint64_t)FreqDomainResource[3])<<13)| + (((uint64_t)FreqDomainResource[4])<<5)| + (((uint64_t)FreqDomainResource[5])>>3); + + for (int i=0; i<45; i++) + if ((bitmap>>(44-i))&1) { + count++; + if (!start_set) { + start = i; + start_set = 1; + } + } + *rb_offset = 6*start; + *n_rb = 6*count; +} + + int get_dmrs_port(int nl, uint16_t dmrs_ports) { if (dmrs_ports == 0) return 0; // dci 1_0 diff --git a/common/utils/nr/nr_common.h b/common/utils/nr/nr_common.h index b3d2469a12..58e59b663c 100644 --- a/common/utils/nr/nr_common.h +++ b/common/utils/nr/nr_common.h @@ -50,6 +50,7 @@ typedef struct nr_bandentry_s { extern const size_t nr_bandtable_size; extern nr_bandentry_t nr_bandtable[]; +void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset); uint16_t get_band(uint64_t downlink_frequency, int32_t delta_duplex); int NRRIV2BW(int locationAndBandwidth,int N_RB); int NRRIV2PRBOFFSET(int locationAndBandwidth,int N_RB); diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 54e6b2ac79..cfba7ae638 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -35,6 +35,7 @@ #include "nr_dlsch.h" #include "nr_sch_dmrs.h" #include "PHY/MODULATION/nr_modulation.h" +#include "common/utils/nr/nr_common.h" //#define DEBUG_PDCCH_DMRS //#define DEBUG_DCI diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.h b/openair1/PHY/NR_TRANSPORT/nr_dci.h index e3b53f9cf9..07baaf2728 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.h +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.h @@ -59,6 +59,4 @@ void nr_fill_ul_dci(PHY_VARS_gNB *gNB, void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m,nfapi_nr_dl_tti_pdcch_pdu_rel15_t *); -void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset); - #endif //__PHY_NR_TRANSPORT_DCI__H diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c index c562dfaa41..7df5a8c1c0 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c @@ -31,6 +31,7 @@ */ #include "nr_dci.h" +#include "common/utils/nr/nr_common.h" //#define DEBUG_FILL_DCI diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci_tools_common.c b/openair1/PHY/NR_TRANSPORT/nr_dci_tools_common.c deleted file mode 100644 index d26a52f157..0000000000 --- a/openair1/PHY/NR_TRANSPORT/nr_dci_tools_common.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. - * The OpenAirInterface Software Alliance licenses this file to You under - * the OAI Public License, Version 1.1 (the "License"); you may not use this file - * except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.openairinterface.org/?page_id=698 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - *------------------------------------------------------------------------------- - * For more information about the OpenAirInterface (OAI) Software Alliance: - * contact@openairinterface.org - */ - -/*! \file PHY/NR_TRANSPORT/nr_dci_tools_common.c - * \brief - * \author - * \date 2018 - * \version 0.1 - * \company Eurecom - * \email: - * \note - * \warning - */ - -#include "nr_dci.h" - -//#define DEBUG_FILL_DCI - -#include "nr_dlsch.h" - - -void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) { - - uint8_t count=0, start=0, start_set=0; - - uint64_t bitmap = (((uint64_t)FreqDomainResource[0])<<37)| - (((uint64_t)FreqDomainResource[1])<<29)| - (((uint64_t)FreqDomainResource[2])<<21)| - (((uint64_t)FreqDomainResource[3])<<13)| - (((uint64_t)FreqDomainResource[4])<<5)| - (((uint64_t)FreqDomainResource[5])>>3); - - for (int i=0; i<45; i++) - if ((bitmap>>(44-i))&1) { - count++; - if (!start_set) { - start = i; - start_set = 1; - } - } - *rb_offset = 6*start; - *n_rb = 6*count; -} - diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c index aa8588f106..cafb2e233b 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c @@ -45,7 +45,7 @@ #include "PHY/phy_extern_nr_ue.h" #include "PHY/CODING/coding_extern.h" #include "PHY/sse_intrin.h" -#include "PHY/NR_TRANSPORT/nr_dci.h" +#include "common/utils/nr/nr_common.h" #include "assertions.h" #include "T.h" diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c index 7dfd765b76..9c7a7dd343 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c @@ -38,6 +38,7 @@ #include "PHY/NR_UE_ESTIMATION/nr_estimation.h" #include "SCHED_NR_UE/defs.h" #include "common/utils/LOG/vcd_signal_dumper.h" +#include "common/utils/nr/nr_common.h" #include "common_lib.h" #include From a64a892abceef298e30cd96a4cf0d27ae3bc383c Mon Sep 17 00:00:00 2001 From: Mario Joa-Ng Date: Fri, 24 Sep 2021 09:24:44 -0400 Subject: [PATCH 027/102] remove #if 0 --- openair2/LAYER2/NR_MAC_UE/main_ue_nr.c | 1 - openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 56 +------- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 130 ------------------- 3 files changed, 1 insertion(+), 186 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c b/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c index e7bafcbe01..af0c84dc4b 100644 --- a/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c +++ b/openair2/LAYER2/NR_MAC_UE/main_ue_nr.c @@ -54,7 +54,6 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst) { for (int j=0;jscheduling_info.LCID_status[i] = LCID_EMPTY; mac->scheduling_info.LCID_buffer_remain[i] = 0; + for (int i=0;ifirst_ul_tx[i]=1; } } @@ -2214,61 +2215,6 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ // no UL-SCH resources available for this tti && UE has a valid PUCCH resources for SR configuration for this tti DevCheck(module_idP < (int) NB_UE_INST, module_idP, NB_NR_UE_MAC_INST, 0); NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); -#if 0 // todo - // int MGL=6;// measurement gap length in ms - int MGRP = 0; // measurement gap repetition period in ms - int gapOffset = -1; - int T = 0; - // determin the measurement gap - if (mac->measGapConfig != NULL) { - if (mac->measGapConfig->choice.setup. - gapOffset.present == LTE_MeasGapConfig__setup__gapOffset_PR_gp0) { - MGRP = 40; - gapOffset = - mac->measGapConfig->choice. - setup.gapOffset.choice.gp0; - } else if (mac->measGapConfig->choice. - setup.gapOffset.present == - LTE_MeasGapConfig__setup__gapOffset_PR_gp1) { - MGRP = 80; - gapOffset = - mac->measGapConfig->choice. - setup.gapOffset.choice.gp1; - } else { - LOG_W(NR_MAC, "Measurement GAP offset is unknown\n"); - } - - T = MGRP / 10; - DevAssert(T != 0); - - //check the measurement gap and sr prohibit timer - if ((subframe == gapOffset % 10) - && ((frameP % T) == (floor(gapOffset / 10))) - && (mac-> - scheduling_info.sr_ProhibitTimer_Running == 0)) { - mac->scheduling_info.SR_pending = 1; - return (0); - } - } - if ((mac->physicalConfigDedicated != NULL) && - (mac->scheduling_info.SR_pending == 1) && - (mac->scheduling_info.SR_COUNTER < - (1 << - (2 + - mac-> - physicalConfigDedicated->schedulingRequestConfig->choice.setup. - dsr_TransMax)))) { - LOG_D(NR_MAC, - "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", - module_idP, frameP, slot, - mac->scheduling_info.SR_COUNTER, - (1 << - (2 + - mac-> - physicalConfigDedicated->schedulingRequestConfig->choice. - setup.dsr_TransMax)), - mac->scheduling_info.SR_pending); -#endif DSR_TRANSMAX_t dsr_TransMax = sr_n64; // todo LOG_D(NR_MAC, "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index bd76e67f95..83d316dbdd 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -1011,50 +1011,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in // Handle the SR/BSR procedures per subframe NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); uint8_t gNB_indexP=0; -#if 0 // todo - // Get RLC status info and update Bj for all lcids that are active - int lcid; // lcid index - for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { - if (mac->logicalChannelConfig[lcid]) { - // meausre the Bj - if ((directionP == SF_UL) - && (mac->scheduling_info.Bj[lcid] >= 0)) { - if (mac-> - logicalChannelConfig[lcid]->ul_SpecificParameters) { - bucketsizeduration = - mac->logicalChannelConfig - [lcid]->ul_SpecificParameters->prioritisedBitRate * - TTI; - bucketsizeduration_max = - get_ms_bucketsizeduration(mac->logicalChannelConfig - [lcid]->ul_SpecificParameters->bucketSizeDuration); - } else { - LOG_E(NR_MAC, - "[UE %d] lcid %d, NULL ul_SpecificParameters\n", - mod_id, lcid); - AssertFatal(1 == 0, ""); - } - if (mac->scheduling_info.Bj[lcid] > - bucketsizeduration_max) { - mac->scheduling_info.Bj[lcid] = - bucketsizeduration_max; - } else { - mac->scheduling_info.Bj[lcid] = - bucketsizeduration; - } - } - - /* - if (lcid == DCCH) { - LOG_D(NR_MAC,"[UE %d][SR] Frame %d slot %d Pending data for SRB1=%d for LCGID %d \n", - mod_id, txFrameP,txSlotP,mac->scheduling_info.BSR[mac->scheduling_info.LCGID[lcid]], - // mac->scheduling_info.LCGID[lcid]); - } - */ - } - } -#endif // Call BSR procedure as described in Section 5.4.5 in 38.321 // First check ReTxBSR Timer because it is always configured @@ -1084,33 +1041,6 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in "[UE %d][BSR] Regular BSR Triggered Frame %d slot %d SR for PUSCH is pending\n", mod_id, txFrameP, txSlotP); } -#if 0 - // UE has no valid phy config dedicated || no valid/released SR - if ((mac->physicalConfigDedicated == NULL)) { - // cancel all pending SRs - mac->scheduling_info.SR_pending = 0; - mac->ul_active = 0; - LOG_T(NR_MAC, "[UE %d] Release all SRs \n", mod_id); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME - (VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SCHEDULER, VCD_FUNCTION_OUT); -#if UE_TIMING_TRACE - stop_meas(&mac->nr_ue_scheduler); -#endif - return (CONNECTION_OK); - } - - if ((mac-> - physicalConfigDedicated->schedulingRequestConfig == NULL) - || (mac-> - physicalConfigDedicated->schedulingRequestConfig->present == - LTE_SchedulingRequestConfig_PR_release)) { - // initiate RA with CRNTI included in msg3 (no contention) as descibed in 38.321 sec 5.1.5 - // cancel all pending SRs - mac->scheduling_info.SR_pending = 0; - mac->ul_active = 0; - LOG_T(NR_MAC, "[UE %d] Release all SRs \n", mod_id); - } -#endif return UE_CONNECTION_OK; } @@ -2548,23 +2478,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } bsr_len = bsr_ce_len + bsr_header_len; -#if 0 // todo - phr_ce_len = - (mac->PHR_reporting_active == - 1) ? 1 /* sizeof(POWER_HEADROOM_CMD) */ : 0; - - if ((phr_ce_len > 0) - && ((phr_ce_len + phr_header_len + bsr_len) <= buflen)) { - phr_len = phr_ce_len + phr_header_len; - LOG_D(NR_MAC, - "[UE %d] header size info: PHR len %d (ce%d,hdr%d) buff_len %d\n", - module_idP, phr_len, phr_ce_len, phr_header_len, buflen); - } else { - phr_len = 0; - phr_header_len = 0; - phr_ce_len = 0; - } -#endif int tot_mac_ce_len = bsr_len + phr_len; uint8_t total_mac_pdu_header_len = tot_mac_ce_len; @@ -2665,25 +2578,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, scheduling_info.LCGID[lcid]] == 0)) { num_lcg_id_with_data--; -#if 0 // Disable the following to simplify the logic - // Change BSR size to BSR SHORT if num_lcg_id_with_data becomes to 1 - if (bsr_len) { - if (num_lcg_id_with_data == 1) { - bsr_ce_len = sizeof(NR_BSR_SHORT); - bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); - bsr_len = bsr_ce_len + bsr_header_len; - total_mac_pdu_header_len = total_mac_pdu_header_len - tot_mac_ce_len + bsr_len + phr_len; - tot_mac_ce_len = bsr_len + phr_len; - } - else if (num_lcg_id_with_data > 1) { - bsr_ce_len = num_lcg_id_with_data + 1; - bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); - bsr_len = bsr_ce_len + bsr_header_len; - total_mac_pdu_header_len = total_mac_pdu_header_len - tot_mac_ce_len + bsr_len + phr_len; - tot_mac_ce_len = bsr_len + phr_len; - } - } -#endif } } } @@ -2710,30 +2604,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } } -#if 0 // todo - // build PHR and update the timers - if (phr_ce_len == sizeof(POWER_HEADROOM_CMD)) { - if(NFAPI_MODE==NFAPI_UE_STUB_PNF) { - //Substitute with a static value for the MAC layer abstraction (phy_stub mode) - phr_p->PH = 60; - } else { - phr_p->PH = get_phr_mapping(module_idP, CC_id, eNB_index); - } - - phr_p->R = 0; - LOG_D(NR_MAC, - "[UE %d] Frame %d report PHR with mapping (%d->%d) for LCID %d\n", - module_idP, frameP, get_PHR(module_idP, CC_id, eNB_index), - phr_p->PH, POWER_HEADROOM); - update_phr(module_idP, CC_id); - } else { - phr_p = NULL; - } - - LOG_T(NR_MAC, "[UE %d] Frame %d: bsr s %p bsr_l %p, phr_p %p\n", - module_idP, frameP, bsr_s, bsr_l, phr_p); -#endif - // TS 38.321 Section 5.4.5 // Check BSR padding: it is done after PHR according to Logical Channel Prioritization order // Check for max padding size, ie MAC Hdr for last RLC PDU = 1 From 01093063d71070d68b1948aac8e0ccb646361025 Mon Sep 17 00:00:00 2001 From: athanassopoulos Date: Wed, 25 Aug 2021 18:16:53 +0200 Subject: [PATCH 028/102] NR SDAP gNB - Transparent Mode --- cmake_targets/CMakeLists.txt | 6 ++ openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c | 6 +- openair2/SDAP/nr_sdap/nr_sdap_gnb.c | 87 +++++++++++++++++++++++ openair2/SDAP/nr_sdap/nr_sdap_gnb.h | 61 ++++++++++++++++ openair3/ocp-gtpu/gtp_itf.cpp | 3 +- 5 files changed, 161 insertions(+), 2 deletions(-) create mode 100644 openair2/SDAP/nr_sdap/nr_sdap_gnb.c create mode 100644 openair2/SDAP/nr_sdap/nr_sdap_gnb.h diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 9592334125..f11c71d5d8 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1983,6 +1983,10 @@ set(NR_PDCP_SRC ${OPENAIR2_DIR}/LAYER2/nr_pdcp/asn1_utils.c ) +set(NR_SDAP_SRC + ${OPENAIR2_DIR}/SDAP/nr_sdap/nr_sdap_gnb.c + ) + set(L2_SRC ${PDCP_DIR}/pdcp.c ${PDCP_DIR}/pdcp_fifo.c @@ -2026,6 +2030,7 @@ set(L2_LTE_SRC set(L2_NR_SRC ${NR_RLC_SRC} ${NR_PDCP_SRC} + ${NR_SDAP_SRC} ${NR_RRC_DIR}/rrc_gNB.c ${NR_RRC_DIR}/nr_rrc_common.c ${NR_RRC_DIR}/L2_nr_interface.c @@ -2061,6 +2066,7 @@ set(L2_RRC_SRC_UE set(NR_L2_SRC_UE ${NR_RLC_SRC} ${NR_PDCP_SRC} + ${NR_SDAP_SRC} ${NR_UE_RRC_DIR}/L2_interface_ue.c ${NR_UE_RRC_DIR}/main_ue.c ${NR_UE_RRC_DIR}/rrc_UE.c diff --git a/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c b/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c index 6078882601..686a52170c 100644 --- a/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c +++ b/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c @@ -36,6 +36,7 @@ #include "pdcp.h" #include "LAYER2/nr_rlc/nr_rlc_oai_api.h" #include +#include "openair2/SDAP/nr_sdap/nr_sdap_gnb.h" #define TODO do { \ printf("%s:%d:%s: todo\n", __FILE__, __LINE__, __FUNCTION__); \ @@ -480,7 +481,10 @@ static void deliver_sdu_drb(void *_ue, nr_pdcp_entity_t *entity, GTPV1U_GNB_TUNNEL_DATA_REQ(message_p).offset = GTPU_HEADER_OVERHEAD_MAX; GTPV1U_GNB_TUNNEL_DATA_REQ(message_p).rnti = ue->rnti; GTPV1U_GNB_TUNNEL_DATA_REQ(message_p).pdusession_id = entity->pdusession_id; - if (offset==1) LOG_I(PDCP, "%s() (drb %d) SDAP header %2x\n",__func__, rb_id, buf[0]); + if (offset==1) { + LOG_I(PDCP, "%s() (drb %d) SDAP header %2x\n",__func__, rb_id, buf[0]); + sdap_gnb_ul_header_handler(buf[0]); // Handler for the UL gNB SDAP Header + } LOG_D(PDCP, "%s() (drb %d) sending message to gtp size %d\n", __func__, rb_id, size-offset); itti_send_msg_to_task(TASK_VARIABLE, INSTANCE_DEFAULT, message_p); } diff --git a/openair2/SDAP/nr_sdap/nr_sdap_gnb.c b/openair2/SDAP/nr_sdap/nr_sdap_gnb.c new file mode 100644 index 0000000000..5f0a2640e9 --- /dev/null +++ b/openair2/SDAP/nr_sdap/nr_sdap_gnb.c @@ -0,0 +1,87 @@ +/* + * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The OpenAirInterface Software Alliance licenses this file to You under + * the OAI Public License, Version 1.1 (the "License"); you may not use this file + * except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.openairinterface.org/?page_id=698 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + *------------------------------------------------------------------------------- + * For more information about the OpenAirInterface (OAI) Software Alliance: + * contact@openairinterface.org + */ + +#include "nr_sdap_gnb.h" +#include + +boolean_t sdap_gnb_data_req(protocol_ctxt_t *ctxt_p, + const srb_flag_t srb_flag, + const rb_id_t rb_id, + const mui_t mui, + const confirm_t confirm, + const sdu_size_t sdu_buffer_size, + unsigned char *const sdu_buffer, + const pdcp_transmission_mode_t pt_mode, + const uint32_t *sourceL2Id, + const uint32_t *destinationL2Id + ) { + if(sdu_buffer == NULL) { + LOG_E(PDCP, "%s:%d:%s: SDAP Layer gNB - NULL sdu_buffer \n", __FILE__, __LINE__, __FUNCTION__); + exit(1); + } + + if(sdu_buffer_size == 0) { + LOG_E(PDCP, "%s:%d:%s: SDAP Layer gNB - NULL or 0 sdu_buffer_size \n", __FILE__, __LINE__, __FUNCTION__); + exit(1); + } + + uint8_t *sdap_buf = (uint8_t *)malloc(sdu_buffer_size+SDAP_HDR_LENGTH); + nr_sdap_dl_hdr_t sdap_hdr; + sdap_hdr.RDI = 0; // SDAP_Hardcoded - + sdap_hdr.RQI = 0; // SDAP_Hardcoded - Should get this info from DL_PDU_SESSION_INFORMATION + sdap_hdr.QFI = 1; // SDAP_Hardcoded - Should get this info from DL_PDU_SESSION_INFORMATION + memcpy(&sdap_buf[0], &sdap_hdr, 1); + memcpy(&sdap_buf[1], sdu_buffer, sdu_buffer_size); + rb_id_t sdap_drb_id = rb_id; // SDAP_Hardcoded - Should get this info from QFI to DRB mapping table + boolean_t ret = pdcp_data_req(ctxt_p, + srb_flag, + sdap_drb_id, + mui, + confirm, + sdu_buffer_size+1, + sdap_buf, + pt_mode, + sourceL2Id, + destinationL2Id); + + if(!ret) { + LOG_E(PDCP, "%s:%d:%s: SDAP Layer gNB - PDCP DL refused PDU\n", __FILE__, __LINE__, __FUNCTION__); + free(sdap_buf); + return 0; + } + + free(sdap_buf); + return 1; +} + +void sdap_gnb_ul_header_handler(char sdap_gnb_ul_hdr) { + nr_sdap_ul_hdr_t *sdap_hdr_ul = (nr_sdap_ul_hdr_t *)&sdap_gnb_ul_hdr; + + switch (sdap_hdr_ul->DC) { + case SDAP_HDR_UL_DATA_PDU: + LOG_I(PDCP, "%s:%d:%s: SDAP Layer gNB - UL Received SDAP Data PDU\n", __FILE__, __LINE__, __FUNCTION__); + break; + + case SDAP_HDR_UL_CTRL_PDU: + LOG_I(PDCP, "%s:%d:%s: SDAP Layer gNB - Received SDAP Control PDU\n", __FILE__, __LINE__, __FUNCTION__); + break; + } +} \ No newline at end of file diff --git a/openair2/SDAP/nr_sdap/nr_sdap_gnb.h b/openair2/SDAP/nr_sdap/nr_sdap_gnb.h new file mode 100644 index 0000000000..243aa89010 --- /dev/null +++ b/openair2/SDAP/nr_sdap/nr_sdap_gnb.h @@ -0,0 +1,61 @@ +/* + * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The OpenAirInterface Software Alliance licenses this file to You under + * the OAI Public License, Version 1.1 (the "License"); you may not use this file + * except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.openairinterface.org/?page_id=698 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + *------------------------------------------------------------------------------- + * For more information about the OpenAirInterface (OAI) Software Alliance: + * contact@openairinterface.org + */ + +#ifndef _NR_SDAP_GNB_ +#define _NR_SDAP_GNB_ + +#include "openair2/COMMON/platform_types.h" +#include "common/utils/LOG/log.h" + +#define SDAP_BITMASK_DC (0x80) +#define SDAP_BITMASK_R (0x40) +#define SDAP_BITMASK_QFI (0x3F) +#define SDAP_HDR_UL_DATA_PDU (1) +#define SDAP_HDR_UL_CTRL_PDU (0) +#define SDAP_HDR_LENGTH (1) + +typedef struct nr_sdap_dl_hdr_s { + uint8_t QFI:6; + uint8_t RQI:1; + uint8_t RDI:1; +} __attribute__((packed)) nr_sdap_dl_hdr_t; + +typedef struct nr_sdap_ul_hdr_s { + uint8_t QFI:6; + uint8_t R:1; + uint8_t DC:1; +} __attribute__((packed)) nr_sdap_ul_hdr_t; + +boolean_t sdap_gnb_data_req(protocol_ctxt_t *ctxt_p, + const srb_flag_t srb_flag, + const rb_id_t rb_id, + const mui_t mui, + const confirm_t confirm, + const sdu_size_t sdu_buffer_size, + unsigned char *const sdu_buffer, + const pdcp_transmission_mode_t pt_mode, + const uint32_t *sourceL2Id, + const uint32_t *destinationL2Id + ); + +void sdap_gnb_ul_header_handler(char sdap_gnb_ul_hdr); + +#endif \ No newline at end of file diff --git a/openair3/ocp-gtpu/gtp_itf.cpp b/openair3/ocp-gtpu/gtp_itf.cpp index c367374436..d9307813c8 100644 --- a/openair3/ocp-gtpu/gtp_itf.cpp +++ b/openair3/ocp-gtpu/gtp_itf.cpp @@ -17,6 +17,7 @@ extern "C" { #include #include #include +#include "openair2/SDAP/nr_sdap/nr_sdap_gnb.h" //#include #pragma pack(1) @@ -532,7 +533,7 @@ int gtpv1u_create_ngu_tunnel( const instance_t instance, create_tunnel_req->pdusession_id[i], create_tunnel_req->upf_NGu_teid[i], create_tunnel_req->upf_addr[i], 2152, - pdcp_data_req); + sdap_gnb_data_req); create_tunnel_resp->status=0; create_tunnel_resp->rnti=create_tunnel_req->rnti; create_tunnel_resp->num_tunnels=create_tunnel_req->num_tunnels; From 86161e475dc41a31bc26534b57c6158f4b37aaf9 Mon Sep 17 00:00:00 2001 From: athanassopoulos Date: Mon, 27 Sep 2021 16:49:28 +0200 Subject: [PATCH 029/102] Fix: nrUE not processing SDAP header --- openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c | 14 +++++++++----- openair2/RRC/NR/rrc_gNB.c | 2 +- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c b/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c index 686a52170c..46cdd9bd00 100644 --- a/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c +++ b/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c @@ -448,10 +448,18 @@ static void deliver_sdu_drb(void *_ue, nr_pdcp_entity_t *entity, if(IS_SOFTMODEM_NOS1 || UE_NAS_USE_TUN){ LOG_D(PDCP, "IP packet received, to be sent to TUN interface"); - len = write(nas_sock_fd[0], buf, size); + + if(entity->has_sdapDLheader){ + size -= SDAP_HDR_LENGTH; + len = write(nas_sock_fd[0], &buf[SDAP_HDR_LENGTH], size); + } else { + len = write(nas_sock_fd[0], buf, size); + } + if (len != size) { LOG_E(PDCP, "%s:%d:%s: fatal\n", __FILE__, __LINE__, __FUNCTION__); } + } else{ for (i = 0; i < 5; i++) { @@ -811,10 +819,6 @@ static void add_drb_am(int is_gnb, int rnti, struct NR_DRB_ToAddMod *s, has_sdap = 1; has_sdapULheader = s->cnAssociation->choice.sdap_Config->sdap_HeaderUL == NR_SDAP_Config__sdap_HeaderUL_present ? 1 : 0; has_sdapDLheader = s->cnAssociation->choice.sdap_Config->sdap_HeaderDL == NR_SDAP_Config__sdap_HeaderDL_present ? 1 : 0; - if (has_sdapDLheader==1) { - LOG_E(PDCP,"%s:%d:%s: fatal, no support for SDAP DL yet\n",__FILE__,__LINE__,__FUNCTION__); - exit(-1); - } } /* TODO(?): accept different UL and DL SN sizes? */ if (sn_size_ul != sn_size_dl) { diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index 810e83fc43..4cd560ea50 100755 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -1004,7 +1004,7 @@ rrc_gNB_generate_dedicatedRRCReconfiguration( sdap_config = CALLOC(1, sizeof(NR_SDAP_Config_t)); memset(sdap_config, 0, sizeof(NR_SDAP_Config_t)); sdap_config->pdu_Session = ue_context_pP->ue_context.pduSession[i].param.pdusession_id; - sdap_config->sdap_HeaderDL = NR_SDAP_Config__sdap_HeaderDL_absent; + sdap_config->sdap_HeaderDL = NR_SDAP_Config__sdap_HeaderDL_present; sdap_config->sdap_HeaderUL = NR_SDAP_Config__sdap_HeaderUL_absent; sdap_config->defaultDRB = TRUE; sdap_config->mappedQoS_FlowsToAdd = calloc(1, sizeof(struct NR_SDAP_Config__mappedQoS_FlowsToAdd)); From 60dca0657b660d2977039467f40d0b7a8b6d68d3 Mon Sep 17 00:00:00 2001 From: David Kim Date: Mon, 27 Sep 2021 12:59:40 -0700 Subject: [PATCH 030/102] processing crc_ind and rx_ind per pdu in gNB. 1. If matched rnti does not exist between crc_ind pdus and rx_ind puds, the ind or unmatched pdus will be requeued. 2. Sending crc_ind and rx_ind togetehr with crc_ind first in nrUE. --- executables/nr-ue.c | 18 +++--- openair2/NR_PHY_INTERFACE/NR_IF_Module.c | 73 +++++++++++++++++++++--- 2 files changed, 74 insertions(+), 17 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 41abf55a0f..3ae4f3c655 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -366,15 +366,6 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) free(rach_ind); nr_Msg1_transmitted(mod_id, CC_id, frame, gNB_id); } - if (rx_ind && rx_ind->number_of_pdus > 0) - { - NR_UL_IND_t UL_INFO = { - .rx_ind = *rx_ind, - }; - send_nsa_standalone_msg(&UL_INFO, rx_ind->header.message_id); - free(rx_ind->pdu_list); - free(rx_ind); - } if (crc_ind && crc_ind->number_crcs > 0) { NR_UL_IND_t UL_INFO = { @@ -384,6 +375,15 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) free(crc_ind->crc_list); free(crc_ind); } + if (rx_ind && rx_ind->number_of_pdus > 0) + { + NR_UL_IND_t UL_INFO = { + .rx_ind = *rx_ind, + }; + send_nsa_standalone_msg(&UL_INFO, rx_ind->header.message_id); + free(rx_ind->pdu_list); + free(rx_ind); + } } return NULL; } diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c index cd8ae2a7c9..a791b57ba6 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c @@ -78,7 +78,7 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) UL_INFO.module_id = UL_info->module_id; UL_INFO.CC_id = UL_info->CC_id; - int frame_diff = UL_info->frame - rach_ind->sfn; + int frame_diff = UL_info->frame - rach_ind->sfn; if (frame_diff < 0) { frame_diff += 1024; @@ -209,7 +209,7 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) if (!crc_ind) { LOG_D(NR_PHY, "No crc indication with the same SFN SLOT of rx indication %u %u\n", rx_ind->sfn, rx_ind->slot); - requeue(&gnb_rx_ind_queue, rx_ind); + put_queue(&gnb_rx_ind_queue, rx_ind); return; } @@ -227,8 +227,9 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) ); if (rx_ind && UL_INFO.rx_ind.number_of_pdus > 0 && crc_ind && UL_INFO.crc_ind.number_crcs > 0) { - for (int i = 0; i < UL_INFO.rx_ind.number_of_pdus; i++) { - for (int j = 0; j < UL_INFO.crc_ind.number_crcs; j++) { + int i, j; + for (i = 0; i < UL_INFO.rx_ind.number_of_pdus; i++) { + for (j = 0; j < UL_INFO.crc_ind.number_crcs; j++) { // find crc_indication j corresponding rx_indication i const nfapi_nr_rx_data_pdu_t *rx = &UL_INFO.rx_ind.pdu_list[i]; const nfapi_nr_crc_t *crc = &UL_INFO.crc_ind.crc_list[j]; @@ -267,14 +268,70 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) handle_nr_ul_harq(UL_INFO.CC_id, UL_INFO.module_id, UL_INFO.frame, UL_INFO.slot, crc); break; } // for (j=0;jcrc_list[j].handle = crc_ind->crc_list[last].handle; + crc_ind->crc_list[j].harq_id = crc_ind->crc_list[last].harq_id; + crc_ind->crc_list[j].num_cb = crc_ind->crc_list[last].num_cb; + crc_ind->crc_list[j].rnti = crc_ind->crc_list[last].rnti; + crc_ind->crc_list[j].tb_crc_status = crc_ind->crc_list[last].tb_crc_status; + crc_ind->crc_list[j].timing_advance = crc_ind->crc_list[last].timing_advance; + crc_ind->crc_list[j].ul_cqi = crc_ind->crc_list[last].ul_cqi; + UL_INFO.crc_ind.number_crcs--; + + } + else if (j == last) + { + UL_INFO.crc_ind.number_crcs--; + } + + last = UL_INFO.rx_ind.number_of_pdus -1; + if (i < last) + { + int last = UL_INFO.rx_ind.number_of_pdus -1; + rx_ind->pdu_list[i].handle = rx_ind->pdu_list[last].handle; + rx_ind->pdu_list[i].harq_id = rx_ind->pdu_list[last].harq_id; + rx_ind->pdu_list[i].pdu = rx_ind->pdu_list[last].pdu; + rx_ind->pdu_list[i].pdu_length = rx_ind->pdu_list[last].pdu_length; + rx_ind->pdu_list[i].rnti = rx_ind->pdu_list[last].rnti; + rx_ind->pdu_list[i].timing_advance = rx_ind->pdu_list[last].timing_advance; + rx_ind->pdu_list[i].ul_cqi = rx_ind->pdu_list[last].ul_cqi; + UL_INFO.rx_ind.number_of_pdus--; + i--; + } + else if (i == last) + { + UL_INFO.rx_ind.number_of_pdus--; + } } // for (i=0;inumber_crcs > 0) + if (UL_INFO.crc_ind.number_crcs > 0) + { + crc_ind->number_crcs = UL_INFO.crc_ind.number_crcs; + requeue(&gnb_crc_ind_queue, crc_ind); + } + + if (UL_INFO.rx_ind.number_of_pdus > 0) + { + rx_ind->number_of_pdus = UL_INFO.rx_ind.number_of_pdus; + requeue(&gnb_rx_ind_queue, rx_ind); + } + + if (UL_INFO.crc_ind.number_crcs == 0) + { free(crc_ind->crc_list); - free(crc_ind); - if (rx_ind && rx_ind->number_of_pdus > 0) + crc_ind->crc_list = NULL; + free(crc_ind); + crc_ind = NULL; + } + if (UL_INFO.rx_ind.number_of_pdus == 0) + { free(rx_ind->pdu_list); - free(rx_ind); + rx_ind->pdu_list = NULL; + free(rx_ind); + rx_ind = NULL; + } } else if ((rx_ind && UL_INFO.rx_ind.number_of_pdus != 0) || (crc_ind && UL_INFO.crc_ind.number_crcs != 0)) { LOG_E(NR_PHY, From 2fb3816722e0eab494d25b3e46cddff48f6bb35e Mon Sep 17 00:00:00 2001 From: Masayuki Harada Date: Tue, 28 Sep 2021 20:26:48 +0900 Subject: [PATCH 031/102] Fix NRUE NAS security configuration. --- openair2/RRC/NR_UE/rrc_UE.c | 24 ++- openair3/NAS/NR_UE/nr_nas_msg_sim.c | 229 +++++++++++++++------------- openair3/NAS/NR_UE/nr_nas_msg_sim.h | 10 ++ 3 files changed, 158 insertions(+), 105 deletions(-) diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index 980c389c7c..8f38620ab7 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -1571,7 +1571,6 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB } -extern uint8_t global_kgnb[32]; //----------------------------------------------------------------------------- void nr_rrc_ue_process_securityModeCommand( @@ -1658,7 +1657,6 @@ extern uint8_t global_kgnb[32]; uint8_t *kRRCint = NULL; uint8_t *k_kdf = NULL; #ifndef PHYSIM - memcpy(NR_UE_rrc_inst[ctxt_pP->module_id].kgnb,global_kgnb,32); k_kdf = NULL; nr_derive_key_up_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm, NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, @@ -2525,6 +2523,28 @@ nr_rrc_ue_establish_srb2( NR_RRC_DCCH_DATA_IND (msg_p).gNB_index); break; + case NAS_KENB_REFRESH_REQ: + memcpy((void *)NR_UE_rrc_inst[ue_mod_id].kgnb, (void *)NAS_KENB_REFRESH_REQ(msg_p).kenb, sizeof(NR_UE_rrc_inst[ue_mod_id].kgnb)); + LOG_D(RRC, "[UE %d] Received %s: refreshed RRC::KgNB = " + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x" + "%02x%02x%02x%02x\n", + ue_mod_id, ITTI_MSG_NAME (msg_p), + NR_UE_rrc_inst[ue_mod_id].kgnb[0], NR_UE_rrc_inst[ue_mod_id].kgnb[1], NR_UE_rrc_inst[ue_mod_id].kgnb[2], NR_UE_rrc_inst[ue_mod_id].kgnb[3], + NR_UE_rrc_inst[ue_mod_id].kgnb[4], NR_UE_rrc_inst[ue_mod_id].kgnb[5], NR_UE_rrc_inst[ue_mod_id].kgnb[6], NR_UE_rrc_inst[ue_mod_id].kgnb[7], + NR_UE_rrc_inst[ue_mod_id].kgnb[8], NR_UE_rrc_inst[ue_mod_id].kgnb[9], NR_UE_rrc_inst[ue_mod_id].kgnb[10], NR_UE_rrc_inst[ue_mod_id].kgnb[11], + NR_UE_rrc_inst[ue_mod_id].kgnb[12], NR_UE_rrc_inst[ue_mod_id].kgnb[13], NR_UE_rrc_inst[ue_mod_id].kgnb[14], NR_UE_rrc_inst[ue_mod_id].kgnb[15], + NR_UE_rrc_inst[ue_mod_id].kgnb[16], NR_UE_rrc_inst[ue_mod_id].kgnb[17], NR_UE_rrc_inst[ue_mod_id].kgnb[18], NR_UE_rrc_inst[ue_mod_id].kgnb[19], + NR_UE_rrc_inst[ue_mod_id].kgnb[20], NR_UE_rrc_inst[ue_mod_id].kgnb[21], NR_UE_rrc_inst[ue_mod_id].kgnb[22], NR_UE_rrc_inst[ue_mod_id].kgnb[23], + NR_UE_rrc_inst[ue_mod_id].kgnb[24], NR_UE_rrc_inst[ue_mod_id].kgnb[25], NR_UE_rrc_inst[ue_mod_id].kgnb[26], NR_UE_rrc_inst[ue_mod_id].kgnb[27], + NR_UE_rrc_inst[ue_mod_id].kgnb[28], NR_UE_rrc_inst[ue_mod_id].kgnb[29], NR_UE_rrc_inst[ue_mod_id].kgnb[30], NR_UE_rrc_inst[ue_mod_id].kgnb[31]); + break; + case NAS_UPLINK_DATA_REQ: { uint32_t length; uint8_t *buffer; diff --git a/openair3/NAS/NR_UE/nr_nas_msg_sim.c b/openair3/NAS/NR_UE/nr_nas_msg_sim.c index ddc8a69294..856ac0131c 100644 --- a/openair3/NAS/NR_UE/nr_nas_msg_sim.c +++ b/openair3/NAS/NR_UE/nr_nas_msg_sim.c @@ -47,6 +47,8 @@ uint8_t *registration_request_buf; uint32_t registration_request_len; extern char *baseNetAddress; +extern uint16_t NB_UE_INST; +static ue_sa_security_key_t ** ue_security_key; static int nas_protected_security_header_encode( char *buffer, @@ -251,6 +253,108 @@ void derive_knas(algorithm_type_dist_t nas_alg_type, uint8_t nas_alg_id, uint8_t knas_int[i] = out[16 + i]; } +void derive_kgnb(uint8_t kamf[32], uint32_t count, uint8_t *kgnb){ + /* Compute the KDF input parameter + * S = FC(0x6E) || UL NAS Count || 0x00 0x04 || 0x01 || 0x00 0x01 + */ + uint8_t input[32]; + // uint16_t length = 4; + // int offset = 0; + uint8_t out[32] = { 0 }; + + LOG_TRACE(INFO, "%s with count= %d", __FUNCTION__, count); + memset(input, 0, 32); + input[0] = 0x6E; + // P0 + input[1] = count >> 24; + input[2] = (uint8_t)(count >> 16); + input[3] = (uint8_t)(count >> 8); + input[4] = (uint8_t)count; + // L0 + input[5] = 0; + input[6] = 4; + // P1 + input[7] = 0x01; + // L1 + input[8] = 0; + input[9] = 1; + + kdf(kamf, 32, input, 10, out, 32); + for (int i = 0; i < 32; i++) + kgnb[i] = out[i]; + printf("kgnb : "); + for(int pp=0;pp<32;pp++) + printf("%02x ",kgnb[pp]); + printf("\n"); +} + +void derive_ue_keys(int Mod_id, uint8_t *buf, uicc_t *uicc) { + uint8_t ak[6]; + uint8_t sqn[6]; + + AssertFatal (Mod_id < NB_UE_INST, "Failed, Mod_id %d is over NB_UE_INST!\n", Mod_id); + if(ue_security_key[Mod_id]){ + // clear old key + memset(ue_security_key[Mod_id],0,sizeof(ue_sa_security_key_t)); + }else{ + // Allocate new memory + ue_security_key[Mod_id]=(ue_sa_security_key_t *)calloc(1,sizeof(ue_sa_security_key_t)); + } + uint8_t *kausf = ue_security_key[Mod_id]->kausf; + uint8_t *kseaf = ue_security_key[Mod_id]->kseaf; + uint8_t *kamf = ue_security_key[Mod_id]->kamf; + uint8_t *knas_int = ue_security_key[Mod_id]->knas_int; + uint8_t *output = ue_security_key[Mod_id]->res; + uint8_t *rand = ue_security_key[Mod_id]->rand; + uint8_t *kgnb = ue_security_key[Mod_id]->kgnb; + + // get RAND for authentication request + for(int index = 0; index < 16;index++){ + rand[index] = buf[8+index]; + } + + uint8_t resTemp[16]; + uint8_t ck[16], ik[16]; + f2345(uicc->key, rand, resTemp, ck, ik, ak, uicc->opc); + + transferRES(ck, ik, resTemp, rand, output, uicc); + + for(int index = 0; index < 6; index++){ + sqn[index] = buf[26+index]; + } + + derive_kausf(ck, ik, sqn, kausf, uicc); + derive_kseaf(kausf, kseaf, uicc); + derive_kamf(kseaf, kamf, 0x0000, uicc); + derive_knas(0x02, 2, kamf, knas_int); + derive_kgnb(kamf,0,kgnb); + + printf("kausf:"); + for(int i = 0; i < 32; i++){ + printf("%x ", kausf[i]); + } + printf("\n"); + + printf("kseaf:"); + for(int i = 0; i < 32; i++){ + printf("%x ", kseaf[i]); + } + + printf("\n"); + + printf("kamf:"); + for(int i = 0; i < 32; i++){ + printf("%x ", kamf[i]); + } + printf("\n"); + + printf("knas_int:\n"); + for(int i = 0; i < 16; i++){ + printf("%x ", knas_int[i]); + } + printf("\n"); +} + void generateRegistrationRequest(as_nas_info_t *initialNasMsg, int Mod_id) { int size = sizeof(mm_msg_header_t); fgs_nas_message_t nas_msg={0}; @@ -373,69 +477,13 @@ void generateIdentityResponse(as_nas_info_t *initialNasMsg, uint8_t identitytype } -OctetString knas_int; -uint8_t kamf[32]; -static void generateAuthenticationResp(as_nas_info_t *initialNasMsg, uint8_t *buf, uicc_t *uicc){ +static void generateAuthenticationResp(int Mod_id,as_nas_info_t *initialNasMsg, uint8_t *buf, uicc_t *uicc){ - uint8_t ak[6]; - - uint8_t kausf[32]; - uint8_t sqn[6]; - uint8_t kseaf[32]; + derive_ue_keys(Mod_id,buf,uicc); OctetString res; - - // get RAND for authentication request - unsigned char rand[16]; - for(int index = 0; index < 16;index++){ - rand[index] = buf[8+index]; - } - - uint8_t resTemp[16]; - uint8_t ck[16], ik[16], output[16]; - f2345(uicc->key, rand, resTemp, ck, ik, ak, uicc->opc); - - transferRES(ck, ik, resTemp, rand, output, uicc); - - // get knas_int - knas_int.length = 16; - knas_int.value = malloc(knas_int.length); - for(int index = 0; index < 6; index++){ - sqn[index] = buf[26+index]; - } - - derive_kausf(ck, ik, sqn, kausf, uicc); - derive_kseaf(kausf, kseaf, uicc); - derive_kamf(kseaf, kamf, 0x0000, uicc); - derive_knas(0x02, 2, kamf, knas_int.value); - - printf("kausf:"); - for(int i = 0; i < 32; i++){ - printf("%x ", kausf[i]); - } - printf("\n"); - - printf("kseaf:"); - for(int i = 0; i < 32; i++){ - printf("%x ", kseaf[i]); - } - - printf("\n"); - - printf("kamf:"); - for(int i = 0; i < 32; i++){ - printf("%x ", kamf[i]); - } - printf("\n"); - - printf("knas_int:\n"); - for(int i = 0; i < 16; i++){ - printf("%x ", knas_int.value[i]); - } - printf("\n"); - - // set res res.length = 16; - res.value = output; + res.value = calloc(1,16); + memcpy(res.value,ue_security_key[Mod_id]->res,16); int size = sizeof(mm_msg_header_t); fgs_nas_message_t nas_msg; @@ -465,41 +513,14 @@ static void generateAuthenticationResp(as_nas_info_t *initialNasMsg, uint8_t *bu initialNasMsg->length = mm_msg_encode(mm_msg, (uint8_t*)(initialNasMsg->data), size); } -uint8_t global_kgnb[32]; -static void get_kgnb(uint32_t count) -{ - /* Compute the KDF input parameter - * S = FC(0x11) || UL NAS Count || 0x00 0x04 - */ - uint8_t input[32]; - // uint16_t length = 4; - // int offset = 0; - - LOG_TRACE(INFO, "%s with count= %d", __FUNCTION__, count); - memset(input, 0, 32); - input[0] = 0x6E; - // P0 - input[1] = count >> 24; - input[2] = (uint8_t)(count >> 16); - input[3] = (uint8_t)(count >> 8); - input[4] = (uint8_t)count; - // L0 - input[5] = 0; - input[6] = 4; - // P1 - input[7] = 0x01; - // L1 - input[8] = 0; - input[9] = 1; - - kdf(kamf, 32, input, 10, global_kgnb, 32); - printf("global_kgnb : "); - for(int pp=0;pp<32;pp++) - printf("%02x ",global_kgnb[pp]); - printf("\n"); +int nas_itti_kgnb_refresh_req(const uint8_t kgnb[32], int instance) { + MessageDef *message_p; + message_p = itti_alloc_new_message(TASK_NAS_NRUE, 0, NAS_KENB_REFRESH_REQ); + memcpy(NAS_KENB_REFRESH_REQ(message_p).kenb, kgnb, sizeof(NAS_KENB_REFRESH_REQ(message_p).kenb)); + return itti_send_msg_to_task(TASK_RRC_NRUE, instance, message_p); } -static void generateSecurityModeComplete(as_nas_info_t *initialNasMsg) +static void generateSecurityModeComplete(int Mod_id,as_nas_info_t *initialNasMsg) { int size = sizeof(mm_msg_header_t); fgs_nas_message_t nas_msg; @@ -546,7 +567,7 @@ static void generateSecurityModeComplete(as_nas_info_t *initialNasMsg) initialNasMsg->length = security_header_len + mm_msg_encode(mm_msg, (uint8_t*)(initialNasMsg->data+security_header_len), size-security_header_len); - stream_cipher.key = knas_int.value; + stream_cipher.key = ue_security_key[Mod_id]->knas_int; stream_cipher.key_length = 16; stream_cipher.count = 0; stream_cipher.bearer = 1; @@ -566,7 +587,7 @@ static void generateSecurityModeComplete(as_nas_info_t *initialNasMsg) } } -static void generateRegistrationComplete(as_nas_info_t *initialNasMsg, SORTransparentContainer *sortransparentcontainer) { +static void generateRegistrationComplete(int Mod_id, as_nas_info_t *initialNasMsg, SORTransparentContainer *sortransparentcontainer) { //wait send RRCReconfigurationComplete and InitialContextSetupResponse sleep(1); int length = 0; @@ -626,7 +647,7 @@ static void generateRegistrationComplete(as_nas_info_t *initialNasMsg, SORTransp } initialNasMsg->length = length; - stream_cipher.key = knas_int.value; + stream_cipher.key = ue_security_key[Mod_id]->knas_int; stream_cipher.key_length = 16; stream_cipher.count = 1; stream_cipher.bearer = 1; @@ -659,7 +680,7 @@ void decodeDownlinkNASTransport(as_nas_info_t *initialNasMsg, uint8_t * pdu_buff } } -static void generatePduSessionEstablishRequest(uicc_t * uicc, as_nas_info_t *initialNasMsg){ +static void generatePduSessionEstablishRequest(int Mod_id, uicc_t * uicc, as_nas_info_t *initialNasMsg){ //wait send RegistrationComplete usleep(100*150); int size = 0; @@ -733,7 +754,7 @@ static void generatePduSessionEstablishRequest(uicc_t * uicc, as_nas_info_t *ini initialNasMsg->length = security_header_len + mm_msg_encode(mm_msg, (uint8_t*)(initialNasMsg->data+security_header_len), size-security_header_len); - stream_cipher.key = knas_int.value; + stream_cipher.key = ue_security_key[Mod_id]->knas_int; stream_cipher.key_length = 16; stream_cipher.count = 0; stream_cipher.bearer = 1; @@ -763,6 +784,8 @@ void *nas_nrue_task(void *args_p) uint8_t msg_type = 0; uint8_t *pdu_buffer = NULL; + + ue_security_key=(ue_sa_security_key_t **)calloc(1,sizeof(ue_sa_security_key_t*)*NB_UE_INST); itti_mark_task_ready (TASK_NAS_NRUE); MSC_START_USE(); @@ -847,7 +870,7 @@ void *nas_nrue_task(void *args_p) as_nas_info_t initialNasMsg; memset(&initialNasMsg, 0, sizeof(as_nas_info_t)); - generateRegistrationComplete(&initialNasMsg, NULL); + generateRegistrationComplete(Mod_id,&initialNasMsg, NULL); if(initialNasMsg.length > 0){ MessageDef *message_p; message_p = itti_alloc_new_message(TASK_NAS_NRUE, 0, NAS_UPLINK_DATA_REQ); @@ -860,7 +883,7 @@ void *nas_nrue_task(void *args_p) as_nas_info_t pduEstablishMsg; memset(&pduEstablishMsg, 0, sizeof(as_nas_info_t)); - generatePduSessionEstablishRequest(uicc, &pduEstablishMsg); + generatePduSessionEstablishRequest(Mod_id, uicc, &pduEstablishMsg); if(pduEstablishMsg.length > 0){ MessageDef *message_p; message_p = itti_alloc_new_message(TASK_NAS_NRUE, 0, NAS_UPLINK_DATA_REQ); @@ -924,11 +947,11 @@ void *nas_nrue_task(void *args_p) generateIdentityResponse(&initialNasMsg,*(pdu_buffer+3), uicc); break; case FGS_AUTHENTICATION_REQUEST: - generateAuthenticationResp(&initialNasMsg, pdu_buffer, uicc); + generateAuthenticationResp(Mod_id,&initialNasMsg, pdu_buffer, uicc); break; case FGS_SECURITY_MODE_COMMAND: - get_kgnb(0); - generateSecurityModeComplete(&initialNasMsg); + nas_itti_kgnb_refresh_req(ue_security_key[Mod_id]->kgnb, instance); + generateSecurityModeComplete(Mod_id,&initialNasMsg); break; case FGS_DOWNLINK_NAS_TRANSPORT: decodeDownlinkNASTransport(&initialNasMsg, pdu_buffer); diff --git a/openair3/NAS/NR_UE/nr_nas_msg_sim.h b/openair3/NAS/NR_UE/nr_nas_msg_sim.h index 753ebf1762..1b59366037 100644 --- a/openair3/NAS/NR_UE/nr_nas_msg_sim.h +++ b/openair3/NAS/NR_UE/nr_nas_msg_sim.h @@ -64,6 +64,16 @@ #define INITIAL_REGISTRATION 0b001 +/* Security Key for SA UE */ +typedef struct { + uint8_t kausf[32]; + uint8_t kseaf[32]; + uint8_t kamf[32]; + uint8_t knas_int[16]; + uint8_t res[16]; + uint8_t rand[16]; + uint8_t kgnb[32]; +} ue_sa_security_key_t; typedef enum fgs_protocol_discriminator_e { /* Protocol discriminator identifier for 5GS Mobility Management */ From 80831cd48fcdeb24157e9c2413ff81b899ff8618 Mon Sep 17 00:00:00 2001 From: Masayuki Harada Date: Wed, 29 Sep 2021 00:10:48 +0900 Subject: [PATCH 032/102] Fix nr_derive_key memory problem. --- openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c | 6 --- openair2/RRC/LTE/rrc_eNB.c | 8 ---- openair2/RRC/NR/rrc_gNB.c | 37 ++-------------- openair2/RRC/NR/rrc_gNB_NGAP.c | 28 ++---------- openair2/RRC/NR/rrc_gNB_nsa.c | 19 +------- openair2/RRC/NR_UE/rrc_UE.c | 54 +++-------------------- openair2/UTIL/OSA/osa_key_deriver.c | 2 + 7 files changed, 18 insertions(+), 136 deletions(-) diff --git a/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c b/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c index 6a2779e116..fc8a1328b1 100644 --- a/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c +++ b/openair2/LAYER2/nr_pdcp/nr_pdcp_oai_api.c @@ -903,9 +903,7 @@ boolean_t nr_rrc_pdcp_config_asn1_req( uint8_t *const kRRCint, uint8_t *const kUPenc, uint8_t *const kUPint -#if (LTE_RRC_VERSION >= MAKE_VERSION(9, 0, 0)) ,LTE_PMCH_InfoList_r9_t *pmch_InfoList_r9 -#endif ,rb_id_t *const defaultDRB, struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_bearer2add_list) //struct NR_RLC_Config *rlc_Config) @@ -975,9 +973,7 @@ boolean_t rrc_pdcp_config_asn1_req( uint8_t *const kRRCenc, uint8_t *const kRRCint, uint8_t *const kUPenc -#if (LTE_RRC_VERSION >= MAKE_VERSION(9, 0, 0)) ,LTE_PMCH_InfoList_r9_t *pmch_InfoList_r9 -#endif ,rb_id_t *const defaultDRB) { return 0; @@ -1240,10 +1236,8 @@ boolean_t pdcp_data_req( const sdu_size_t sdu_buffer_size, unsigned char *const sdu_buffer, const pdcp_transmission_mode_t mode -#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) ,const uint32_t *const sourceL2Id ,const uint32_t *const destinationL2Id -#endif ) { if (srb_flagP) { diff --git a/openair2/RRC/LTE/rrc_eNB.c b/openair2/RRC/LTE/rrc_eNB.c index a03fb51749..2fcafec778 100644 --- a/openair2/RRC/LTE/rrc_eNB.c +++ b/openair2/RRC/LTE/rrc_eNB.c @@ -3618,9 +3618,7 @@ void rrc_eNB_generate_defaultRRCConnectionReconfiguration(const protocol_ctxt_t NULL, NULL, NULL -#if (LTE_RRC_VERSION >= MAKE_VERSION(9, 0, 0)) , (LTE_PMCH_InfoList_r9_t *) NULL -#endif , NULL); /* Refresh SRBs/DRBs */ @@ -3629,11 +3627,9 @@ void rrc_eNB_generate_defaultRRCConnectionReconfiguration(const protocol_ctxt_t *SRB_configList2, // NULL, *DRB_configList, NULL -#if (LTE_RRC_VERSION >= MAKE_VERSION(9, 0, 0)) , (LTE_PMCH_InfoList_r9_t *) NULL, 0, 0 -#endif ); } @@ -6331,9 +6327,7 @@ rrc_eNB_generate_HO_RRCConnectionReconfiguration(const protocol_ctxt_t *const ct NULL, NULL, NULL -#if (LTE_RRC_VERSION >= MAKE_VERSION(9, 0, 0)) , (LTE_PMCH_InfoList_r9_t *) NULL -#endif , NULL); /* Refresh SRBs/DRBs */ @@ -6342,11 +6336,9 @@ rrc_eNB_generate_HO_RRCConnectionReconfiguration(const protocol_ctxt_t *const ct *SRB_configList2, // NULL, *DRB_configList, NULL -#if (LTE_RRC_VERSION >= MAKE_VERSION(9, 0, 0)) , (LTE_PMCH_InfoList_r9_t *) NULL, 0, 0 -#endif ); } diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index add567982e..d46e2507f5 100755 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -106,9 +106,7 @@ extern boolean_t nr_rrc_pdcp_config_asn1_req( uint8_t *const kRRCint, uint8_t *const kUPenc, uint8_t *const kUPint - #if (LTE_RRC_VERSION >= MAKE_VERSION(9, 0, 0)) ,LTE_PMCH_InfoList_r9_t *pmch_InfoList_r9 - #endif ,rb_id_t *const defaultDRB, struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_bearer2add_list); @@ -1301,49 +1299,22 @@ rrc_gNB_process_RRCReconfigurationComplete( ue_context_pP->ue_context.ue_reestablishment_timer = 0; #ifndef PHYSIM - uint8_t *k_kdf = NULL; /* Derive the keys from kgnb */ if (DRB_configList != NULL) { - k_kdf = NULL; nr_derive_key_up_enc(ue_context_pP->ue_context.ciphering_algorithm, ue_context_pP->ue_context.kgnb, - &k_kdf); - /* kUPenc: last 128 bits of key derivation function which returns 256 bits */ - kUPenc = malloc(16); - if (kUPenc == NULL) exit(1); - memcpy(kUPenc, k_kdf+16, 16); - free(k_kdf); - - k_kdf = NULL; + &kUPenc); nr_derive_key_up_int(ue_context_pP->ue_context.integrity_algorithm, ue_context_pP->ue_context.kgnb, - &k_kdf); - /* kUPint: last 128 bits of key derivation function which returns 256 bits */ - kUPint = malloc(16); - if (kUPint == NULL) exit(1); - memcpy(kUPint, k_kdf+16, 16); - free(k_kdf); + &kUPint); } - k_kdf = NULL; nr_derive_key_rrc_enc(ue_context_pP->ue_context.ciphering_algorithm, ue_context_pP->ue_context.kgnb, - &k_kdf); - /* kRRCenc: last 128 bits of key derivation function which returns 256 bits */ - kRRCenc = malloc(16); - if (kRRCenc == NULL) exit(1); - memcpy(kRRCenc, k_kdf+16, 16); - free(k_kdf); - - k_kdf = NULL; + &kRRCenc); nr_derive_key_rrc_int(ue_context_pP->ue_context.integrity_algorithm, ue_context_pP->ue_context.kgnb, - &k_kdf); - /* kRRCint: last 128 bits of key derivation function which returns 256 bits */ - kRRCint = malloc(16); - if (kRRCint == NULL) exit(1); - memcpy(kRRCint, k_kdf+16, 16); - free(k_kdf); + &kRRCint); #endif /* Refresh SRBs/DRBs */ MSC_LOG_TX_MESSAGE(MSC_RRC_GNB, MSC_PDCP_ENB, NULL, 0, MSC_AS_TIME_FMT" CONFIG_REQ UE %x DRB (security unchanged)", diff --git a/openair2/RRC/NR/rrc_gNB_NGAP.c b/openair2/RRC/NR/rrc_gNB_NGAP.c index f66c1a751d..d9a3a889a6 100644 --- a/openair2/RRC/NR/rrc_gNB_NGAP.c +++ b/openair2/RRC/NR/rrc_gNB_NGAP.c @@ -309,41 +309,19 @@ nr_rrc_pdcp_config_security( static int print_keys= 1; #ifndef PHYSIM - - uint8_t *k_kdf = NULL; - /* Derive the keys from kgnb */ if (SRB_configList != NULL) { - k_kdf = NULL; nr_derive_key_up_enc(ue_context_pP->ue_context.ciphering_algorithm, ue_context_pP->ue_context.kgnb, - &k_kdf); - /* kUPenc: last 128 bits of key derivation function which returns 256 bits */ - kUPenc = malloc(16); - if (kUPenc == NULL) exit(1); - memcpy(kUPenc, k_kdf+16, 16); - free(k_kdf); + &kUPenc); } - k_kdf = NULL; nr_derive_key_rrc_enc(ue_context_pP->ue_context.ciphering_algorithm, ue_context_pP->ue_context.kgnb, - &k_kdf); - /* kRRCenc: last 128 bits of key derivation function which returns 256 bits */ - kRRCenc = malloc(16); - if (kRRCenc == NULL) exit(1); - memcpy(kRRCenc, k_kdf+16, 16); - free(k_kdf); - - k_kdf = NULL; + &kRRCenc); nr_derive_key_rrc_int(ue_context_pP->ue_context.integrity_algorithm, ue_context_pP->ue_context.kgnb, - &k_kdf); - /* kRRCint: last 128 bits of key derivation function which returns 256 bits */ - kRRCint = malloc(16); - if (kRRCint == NULL) exit(1); - memcpy(kRRCint, k_kdf+16, 16); - free(k_kdf); + &kRRCint); #endif if (!IS_SOFTMODEM_IQPLAYER) { SET_LOG_DUMP(DEBUG_SECURITY) ; diff --git a/openair2/RRC/NR/rrc_gNB_nsa.c b/openair2/RRC/NR/rrc_gNB_nsa.c index 0582da4c1a..8938901241 100644 --- a/openair2/RRC/NR/rrc_gNB_nsa.c +++ b/openair2/RRC/NR/rrc_gNB_nsa.c @@ -52,9 +52,7 @@ extern boolean_t nr_rrc_pdcp_config_asn1_req( uint8_t *const kRRCint, uint8_t *const kUPenc, uint8_t *const kUPint - #if (LTE_RRC_VERSION >= MAKE_VERSION(9, 0, 0)) ,LTE_PMCH_InfoList_r9_t *pmch_InfoList_r9 - #endif ,rb_id_t *const defaultDRB, struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_bearer2add_list); @@ -215,25 +213,12 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ LOG_I(RRC, "selecting integrity algorithm %d\n", ue_context_p->ue_context.integrity_algorithm); /* derive UP security key */ - unsigned char *kUPenc_kdf; nr_derive_key_up_enc(ue_context_p->ue_context.ciphering_algorithm, ue_context_p->ue_context.kgnb, - &kUPenc_kdf); - /* kUPenc: last 128 bits of key derivation function which returns 256 bits */ - kUPenc = malloc(16); - if (kUPenc == NULL) exit(1); - memcpy(kUPenc, kUPenc_kdf+16, 16); - free(kUPenc_kdf); - - unsigned char *kUPint_kdf; + &kUPenc); nr_derive_key_up_int(ue_context_p->ue_context.integrity_algorithm, ue_context_p->ue_context.kgnb, - &kUPint_kdf); - /* kUPint: last 128 bits of key derivation function which returns 256 bits */ - kUPint = malloc(16); - if (kUPint == NULL) exit(1); - memcpy(kUPint, kUPint_kdf+16, 16); - free(kUPint_kdf); + &kUPint); e_NR_CipheringAlgorithm cipher_algo; switch (ue_context_p->ue_context.ciphering_algorithm) { diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index 8f38620ab7..edb7119fdd 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -187,9 +187,7 @@ extern boolean_t nr_rrc_pdcp_config_asn1_req( uint8_t *const kRRCint, uint8_t *const kUPenc, uint8_t *const kUPint - #if (LTE_RRC_VERSION >= MAKE_VERSION(9, 0, 0)) ,LTE_PMCH_InfoList_r9_t *pmch_InfoList_r9 - #endif ,rb_id_t *const defaultDRB, struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_bearer2add_list); @@ -1655,37 +1653,16 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB uint8_t *kRRCenc = NULL; uint8_t *kUPenc = NULL; uint8_t *kRRCint = NULL; - uint8_t *k_kdf = NULL; #ifndef PHYSIM - k_kdf = NULL; nr_derive_key_up_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm, NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, - &k_kdf); - /* kUPenc: last 128 bits of key derivation function which returns 256 bits */ - kUPenc = malloc(16); - if (kUPenc == NULL) exit(1); - memcpy(kUPenc, k_kdf+16, 16); - free(k_kdf); - - k_kdf = NULL; + &kUPenc); nr_derive_key_rrc_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm, NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, - &k_kdf); - /* kRRCenc: last 128 bits of key derivation function which returns 256 bits */ - kRRCenc = malloc(16); - if (kRRCenc == NULL) exit(1); - memcpy(kRRCenc, k_kdf+16, 16); - free(k_kdf); - - k_kdf = NULL; + &kRRCenc); nr_derive_key_rrc_int(NR_UE_rrc_inst[ctxt_pP->module_id].integrityProtAlgorithm, NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, - &k_kdf); - /* kRRCint: last 128 bits of key derivation function which returns 256 bits */ - kRRCint = malloc(16); - if (kRRCint == NULL) exit(1); - memcpy(kRRCint, k_kdf+16, 16); - free(k_kdf); + &kRRCint); #endif LOG_I(NR_RRC, "driving kRRCenc, kRRCint and kUPenc from KgNB=" "%02x%02x%02x%02x" @@ -2060,17 +2037,9 @@ nr_rrc_ue_establish_srb2( uint8_t *kRRCenc = NULL; uint8_t *kRRCint = NULL; nr_derive_key_rrc_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm, - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &k_kdf); - kRRCenc = malloc(16); - if (kRRCenc == NULL) exit(1); - memcpy(kRRCenc, k_kdf + 16, 16); - free(k_kdf); + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &kRRCenc); nr_derive_key_rrc_int(NR_UE_rrc_inst[ctxt_pP->module_id].integrityProtAlgorithm, - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &k_kdf); - kRRCint = malloc(16); - if (kRRCint == NULL) exit(1); - memcpy(kRRCint, k_kdf + 16, 16); - free(k_kdf); + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &kRRCint); // Refresh SRBs nr_rrc_pdcp_config_asn1_req(ctxt_pP, @@ -2157,18 +2126,9 @@ nr_rrc_ue_establish_srb2( uint8_t *kUPint = NULL; nr_derive_key_up_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm, - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &k_kdf); - kUPenc = malloc(16); - if (kUPenc == NULL) exit(1); - memcpy(kUPenc, k_kdf + 16, 16); - free(k_kdf); - + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &kUPenc); nr_derive_key_up_int(NR_UE_rrc_inst[ctxt_pP->module_id].integrityProtAlgorithm, - NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &k_kdf); - kUPint = malloc(16); - if (kUPint == NULL) exit(1); - memcpy(kUPint, k_kdf + 16, 16); - free(k_kdf); + NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &kUPint); MSC_LOG_TX_MESSAGE( MSC_RRC_UE, diff --git a/openair2/UTIL/OSA/osa_key_deriver.c b/openair2/UTIL/OSA/osa_key_deriver.c index 159ee7f159..c02b999490 100644 --- a/openair2/UTIL/OSA/osa_key_deriver.c +++ b/openair2/UTIL/OSA/osa_key_deriver.c @@ -121,6 +121,8 @@ int nr_derive_key(algorithm_type_dist_t alg_type, uint8_t alg_id, string[6] = 0x01; kdf(string, 7, key, 32, out, 32); + // in NR, we use the last 16 bytes, ignoring the first 16 ones + memcpy(*out, *out+16, 16); return 0; } From 7cd75730d3f92e4da6fd05406c2f39455dd69918 Mon Sep 17 00:00:00 2001 From: Masayuki Harada Date: Wed, 29 Sep 2021 01:02:22 +0900 Subject: [PATCH 033/102] Remove ifndef PHYSIM conditions. --- openair2/RRC/NR/rrc_gNB.c | 2 -- openair2/RRC/NR/rrc_gNB_NGAP.c | 2 -- openair2/RRC/NR_UE/rrc_UE.c | 2 -- 3 files changed, 6 deletions(-) diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index d46e2507f5..eed56c33f5 100755 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -1298,7 +1298,6 @@ rrc_gNB_process_RRCReconfigurationComplete( ue_context_pP->ue_context.ue_reestablishment_timer = 0; -#ifndef PHYSIM /* Derive the keys from kgnb */ if (DRB_configList != NULL) { nr_derive_key_up_enc(ue_context_pP->ue_context.ciphering_algorithm, @@ -1315,7 +1314,6 @@ rrc_gNB_process_RRCReconfigurationComplete( nr_derive_key_rrc_int(ue_context_pP->ue_context.integrity_algorithm, ue_context_pP->ue_context.kgnb, &kRRCint); -#endif /* Refresh SRBs/DRBs */ MSC_LOG_TX_MESSAGE(MSC_RRC_GNB, MSC_PDCP_ENB, NULL, 0, MSC_AS_TIME_FMT" CONFIG_REQ UE %x DRB (security unchanged)", MSC_AS_TIME_ARGS(ctxt_pP), diff --git a/openair2/RRC/NR/rrc_gNB_NGAP.c b/openair2/RRC/NR/rrc_gNB_NGAP.c index d9a3a889a6..1b4a5835c1 100644 --- a/openair2/RRC/NR/rrc_gNB_NGAP.c +++ b/openair2/RRC/NR/rrc_gNB_NGAP.c @@ -308,7 +308,6 @@ nr_rrc_pdcp_config_security( uint8_t *kUPenc = NULL; static int print_keys= 1; -#ifndef PHYSIM /* Derive the keys from kgnb */ if (SRB_configList != NULL) { nr_derive_key_up_enc(ue_context_pP->ue_context.ciphering_algorithm, @@ -322,7 +321,6 @@ nr_rrc_pdcp_config_security( nr_derive_key_rrc_int(ue_context_pP->ue_context.integrity_algorithm, ue_context_pP->ue_context.kgnb, &kRRCint); -#endif if (!IS_SOFTMODEM_IQPLAYER) { SET_LOG_DUMP(DEBUG_SECURITY) ; } diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index edb7119fdd..d2c84fb5e2 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -1653,7 +1653,6 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB uint8_t *kRRCenc = NULL; uint8_t *kUPenc = NULL; uint8_t *kRRCint = NULL; -#ifndef PHYSIM nr_derive_key_up_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm, NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &kUPenc); @@ -1663,7 +1662,6 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB nr_derive_key_rrc_int(NR_UE_rrc_inst[ctxt_pP->module_id].integrityProtAlgorithm, NR_UE_rrc_inst[ctxt_pP->module_id].kgnb, &kRRCint); -#endif LOG_I(NR_RRC, "driving kRRCenc, kRRCint and kUPenc from KgNB=" "%02x%02x%02x%02x" "%02x%02x%02x%02x" From f8183071431de1899044db120567ccfdcf6441f7 Mon Sep 17 00:00:00 2001 From: Masayuki Harada Date: Wed, 29 Sep 2021 01:20:36 +0900 Subject: [PATCH 034/102] Remove warning. --- openair2/RRC/NR_UE/rrc_UE.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index d2c84fb5e2..6fec7c19c7 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -2031,7 +2031,6 @@ nr_rrc_ue_establish_srb2( } } - uint8_t *k_kdf = NULL; uint8_t *kRRCenc = NULL; uint8_t *kRRCint = NULL; nr_derive_key_rrc_enc(NR_UE_rrc_inst[ctxt_pP->module_id].cipheringAlgorithm, @@ -2119,7 +2118,6 @@ nr_rrc_ue_establish_srb2( } } - uint8_t *k_kdf = NULL; uint8_t *kUPenc = NULL; uint8_t *kUPint = NULL; From 4cbea4cc8cd9a0cdbe136d0ef8730d3d24526367 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Tue, 28 Sep 2021 14:30:31 -0700 Subject: [PATCH 035/102] Cleaning up MR code --- openair2/NR_PHY_INTERFACE/NR_IF_Module.c | 28 ++++++------------------ 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c index a791b57ba6..1e9db6ed9b 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c @@ -227,8 +227,8 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) ); if (rx_ind && UL_INFO.rx_ind.number_of_pdus > 0 && crc_ind && UL_INFO.crc_ind.number_crcs > 0) { - int i, j; - for (i = 0; i < UL_INFO.rx_ind.number_of_pdus; i++) { + for (int i = 0; i < UL_INFO.rx_ind.number_of_pdus; i++) { + int j; for (j = 0; j < UL_INFO.crc_ind.number_crcs; j++) { // find crc_indication j corresponding rx_indication i const nfapi_nr_rx_data_pdu_t *rx = &UL_INFO.rx_ind.pdu_list[i]; @@ -268,35 +268,21 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) handle_nr_ul_harq(UL_INFO.CC_id, UL_INFO.module_id, UL_INFO.frame, UL_INFO.slot, crc); break; } // for (j=0;jcrc_list[j].handle = crc_ind->crc_list[last].handle; - crc_ind->crc_list[j].harq_id = crc_ind->crc_list[last].harq_id; - crc_ind->crc_list[j].num_cb = crc_ind->crc_list[last].num_cb; - crc_ind->crc_list[j].rnti = crc_ind->crc_list[last].rnti; - crc_ind->crc_list[j].tb_crc_status = crc_ind->crc_list[last].tb_crc_status; - crc_ind->crc_list[j].timing_advance = crc_ind->crc_list[last].timing_advance; - crc_ind->crc_list[j].ul_cqi = crc_ind->crc_list[last].ul_cqi; + crc_ind->crc_list[j] = rc_ind->crc_list[last]; UL_INFO.crc_ind.number_crcs--; - } else if (j == last) { UL_INFO.crc_ind.number_crcs--; } - - last = UL_INFO.rx_ind.number_of_pdus -1; + + last = UL_INFO.rx_ind.number_of_pdus - 1; if (i < last) { - int last = UL_INFO.rx_ind.number_of_pdus -1; - rx_ind->pdu_list[i].handle = rx_ind->pdu_list[last].handle; - rx_ind->pdu_list[i].harq_id = rx_ind->pdu_list[last].harq_id; - rx_ind->pdu_list[i].pdu = rx_ind->pdu_list[last].pdu; - rx_ind->pdu_list[i].pdu_length = rx_ind->pdu_list[last].pdu_length; - rx_ind->pdu_list[i].rnti = rx_ind->pdu_list[last].rnti; - rx_ind->pdu_list[i].timing_advance = rx_ind->pdu_list[last].timing_advance; - rx_ind->pdu_list[i].ul_cqi = rx_ind->pdu_list[last].ul_cqi; + rx_ind->pdu_list[i] = rx_ind->pdu_list[last]; UL_INFO.rx_ind.number_of_pdus--; i--; } From abb81d8d70a14ba8f0203d6892b0b55c4fcb4514 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Tue, 28 Sep 2021 14:46:40 -0700 Subject: [PATCH 036/102] Fixing a typo --- openair2/NR_PHY_INTERFACE/NR_IF_Module.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c index 1e9db6ed9b..291d445969 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c @@ -271,7 +271,7 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) int last = UL_INFO.crc_ind.number_crcs - 1; if (j < last) { - crc_ind->crc_list[j] = rc_ind->crc_list[last]; + crc_ind->crc_list[j] = crc_ind->crc_list[last]; UL_INFO.crc_ind.number_crcs--; } else if (j == last) From 5664999f9b3489258c8c1593ca0b638760f18f6e Mon Sep 17 00:00:00 2001 From: mjoang Date: Tue, 28 Sep 2021 17:58:08 -0400 Subject: [PATCH 037/102] Fix a bug so that BSR will be triggered when RLC entity has data. --- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 83d316dbdd..4f231b40ca 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -1053,7 +1053,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, uint8_t lcid; uint8_t lcgid; uint8_t num_lcid_with_data = 0; // for LCID with data only if LCGID is defined - uint16_t lcgid_buffer_remain[NR_MAX_NUM_LCGID] = {0,0,0,0,0,0,0,0}; + uint32_t lcgid_buffer_remain[NR_MAX_NUM_LCGID] = {0,0,0,0,0,0,0,0}; int32_t lcid_bytes_in_buffer[NR_MAX_NUM_LCID]; /* Array for ordering LCID with data per decreasing priority order */ uint8_t lcid_reordered_array[NR_MAX_NUM_LCID]= @@ -1146,13 +1146,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, either the data belongs to a logical channel with higher priority than the priorities of the logical channels which belong to any LCG and for which data is already available for transmission */ - if ((mac-> - scheduling_info.LCID_buffer_remain[lcid] == 0) - /* or there is no data available for any of the logical channels which belong to a LCG */ - || - (lcgid_buffer_remain - [mac->scheduling_info.LCGID[lcid]] == - 0)) { + { bsr_regular_triggered = TRUE; LOG_D(NR_MAC, "[UE %d] PDCCH Tick : MAC BSR Triggered LCID%d LCGID%d data become available at frame %d slot %d\n", From 721594102a4f2fbcdbc5941ff11cc49a27952b46 Mon Sep 17 00:00:00 2001 From: mjoang Date: Wed, 29 Sep 2021 09:57:15 -0400 Subject: [PATCH 038/102] run astyle to change format --- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 3370 +++++++++--------- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 769 ++-- 2 files changed, 1990 insertions(+), 2149 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 8adc552bd2..506c71e452 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -97,47 +97,46 @@ static const int sequence_cyclic_shift_2_harq_ack_bits[4] /* TS 38.211 Table 6.4.1.3.3.2-1: DM-RS positions for PUCCH format 3 and 4 */ static const int nb_symbols_excluding_dmrs[11][2][2] = { -/* No additional DMRS Additional DMRS */ -/* PUCCH length No hopping hopping No hopping hopping */ -/* index 0 1 0 1 */ -/* 4 */ {{ 3 , 2 } , { 3 , 2 }}, -/* 5 */ {{ 3 , 3 } , { 3 , 3 }}, -/* 6 */ {{ 4 , 4 } , { 4 , 4 }}, -/* 7 */ {{ 5 , 5 } , { 5 , 5 }}, -/* 8 */ {{ 6 , 6 } , { 6 , 6 }}, -/* 9 */ {{ 7 , 7 } , { 7 , 7 }}, -/* 10 */ {{ 8 , 8 } , { 6 , 6 }}, -/* 11 */ {{ 9 , 9 } , { 7 , 7 }}, -/* 12 */ {{ 10 , 10 } , { 8 , 8 }}, -/* 13 */ {{ 11 , 11 } , { 9 , 9 }}, -/* 14 */ {{ 12 , 12 } , { 10 , 10 }}, + /* No additional DMRS Additional DMRS */ + /* PUCCH length No hopping hopping No hopping hopping */ + /* index 0 1 0 1 */ + /* 4 */ {{ 3, 2 }, { 3, 2 }}, + /* 5 */ {{ 3, 3 }, { 3, 3 }}, + /* 6 */ {{ 4, 4 }, { 4, 4 }}, + /* 7 */ {{ 5, 5 }, { 5, 5 }}, + /* 8 */ {{ 6, 6 }, { 6, 6 }}, + /* 9 */ {{ 7, 7 }, { 7, 7 }}, + /* 10 */ {{ 8, 8 }, { 6, 6 }}, + /* 11 */ {{ 9, 9 }, { 7, 7 }}, + /* 12 */ {{ 10, 10 }, { 8, 8 }}, + /* 13 */ {{ 11, 11 }, { 9, 9 }}, + /* 14 */ {{ 12, 12 }, { 10, 10 }}, }; /* TS 36.213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */ const initial_pucch_resource_t initial_pucch_resource[16] = { -/* format first symbol Number of symbols PRB offset nb index for set of initial CS */ -/* 0 */ { 0, 12, 2, 0, 2, { 0, 3, 0, 0 } }, -/* 1 */ { 0, 12, 2, 0, 3, { 0, 4, 8, 0 } }, -/* 2 */ { 0, 12, 2, 3, 3, { 0, 4, 8, 0 } }, -/* 3 */ { 1, 10, 4, 0, 2, { 0, 6, 0, 0 } }, -/* 4 */ { 1, 10, 4, 0, 4, { 0, 3, 6, 9 } }, -/* 5 */ { 1, 10, 4, 2, 4, { 0, 3, 6, 9 } }, -/* 6 */ { 1, 10, 4, 4, 4, { 0, 3, 6, 9 } }, -/* 7 */ { 1, 4, 10, 0, 2, { 0, 6, 0, 0 } }, -/* 8 */ { 1, 4, 10, 0, 4, { 0, 3, 6, 9 } }, -/* 9 */ { 1, 4, 10, 2, 4, { 0, 3, 6, 9 } }, -/* 10 */ { 1, 4, 10, 4, 4, { 0, 3, 6, 9 } }, -/* 11 */ { 1, 0, 14, 0, 2, { 0, 6, 0, 0 } }, -/* 12 */ { 1, 0, 14, 0, 4, { 0, 3, 6, 9 } }, -/* 13 */ { 1, 0, 14, 2, 4, { 0, 3, 6, 9 } }, -/* 14 */ { 1, 0, 14, 4, 4, { 0, 3, 6, 9 } }, -/* 15 */ { 1, 0, 14, 0, 4, { 0, 3, 6, 9 } }, + /* format first symbol Number of symbols PRB offset nb index for set of initial CS */ + /* 0 */ { 0, 12, 2, 0, 2, { 0, 3, 0, 0 } }, + /* 1 */ { 0, 12, 2, 0, 3, { 0, 4, 8, 0 } }, + /* 2 */ { 0, 12, 2, 3, 3, { 0, 4, 8, 0 } }, + /* 3 */ { 1, 10, 4, 0, 2, { 0, 6, 0, 0 } }, + /* 4 */ { 1, 10, 4, 0, 4, { 0, 3, 6, 9 } }, + /* 5 */ { 1, 10, 4, 2, 4, { 0, 3, 6, 9 } }, + /* 6 */ { 1, 10, 4, 4, 4, { 0, 3, 6, 9 } }, + /* 7 */ { 1, 4, 10, 0, 2, { 0, 6, 0, 0 } }, + /* 8 */ { 1, 4, 10, 0, 4, { 0, 3, 6, 9 } }, + /* 9 */ { 1, 4, 10, 2, 4, { 0, 3, 6, 9 } }, + /* 10 */ { 1, 4, 10, 4, 4, { 0, 3, 6, 9 } }, + /* 11 */ { 1, 0, 14, 0, 2, { 0, 6, 0, 0 } }, + /* 12 */ { 1, 0, 14, 0, 4, { 0, 3, 6, 9 } }, + /* 13 */ { 1, 0, 14, 2, 4, { 0, 3, 6, 9 } }, + /* 14 */ { 1, 0, 14, 4, 4, { 0, 3, 6, 9 } }, + /* 15 */ { 1, 0, 14, 0, 4, { 0, 3, 6, 9 } }, }; void nr_ue_init_mac(module_id_t module_idP) { int i; - NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); // default values as deined in 38.331 sec 9.2.2 LOG_I(NR_MAC, "[UE%d] Applying default macMainConfig\n", module_idP); @@ -146,45 +145,45 @@ void nr_ue_init_mac(module_id_t module_idP) { NR_BSR_Config__retxBSR_Timer_sf10240; mac->scheduling_info.periodicBSR_Timer = NR_BSR_Config__periodicBSR_Timer_infinity; -// mac->scheduling_info.periodicPHR_Timer = -// NR_MAC_MainConfig__phr_Config__setup__periodicPHR_Timer_sf20; -// mac->scheduling_info.prohibitPHR_Timer = -// NR_MAC_MainConfig__phr_Config__setup__prohibitPHR_Timer_sf20; -// mac->scheduling_info.PathlossChange_db = -// NR_MAC_MainConfig__phr_Config__setup__dl_PathlossChange_dB1; -// mac->PHR_state = -// NR_MAC_MainConfig__phr_Config_PR_setup; + // mac->scheduling_info.periodicPHR_Timer = + // NR_MAC_MainConfig__phr_Config__setup__periodicPHR_Timer_sf20; + // mac->scheduling_info.prohibitPHR_Timer = + // NR_MAC_MainConfig__phr_Config__setup__prohibitPHR_Timer_sf20; + // mac->scheduling_info.PathlossChange_db = + // NR_MAC_MainConfig__phr_Config__setup__dl_PathlossChange_dB1; + // mac->PHR_state = + // NR_MAC_MainConfig__phr_Config_PR_setup; mac->scheduling_info.SR_COUNTER = 0; mac->scheduling_info.sr_ProhibitTimer = 0; mac->scheduling_info.sr_ProhibitTimer_Running = 0; -// mac->scheduling_info.maxHARQ_Tx = -// NR_MAC_MainConfig__ul_SCH_Config__maxHARQ_Tx_n5; -// mac->scheduling_info.ttiBundling = 0; -// mac->scheduling_info.extendedBSR_Sizes_r10 = 0; -// mac->scheduling_info.extendedPHR_r10 = 0; -// mac->scheduling_info.drx_config = NULL; -// mac->scheduling_info.phr_config = NULL; + // mac->scheduling_info.maxHARQ_Tx = + // NR_MAC_MainConfig__ul_SCH_Config__maxHARQ_Tx_n5; + // mac->scheduling_info.ttiBundling = 0; + // mac->scheduling_info.extendedBSR_Sizes_r10 = 0; + // mac->scheduling_info.extendedPHR_r10 = 0; + // mac->scheduling_info.drx_config = NULL; + // mac->scheduling_info.phr_config = NULL; // set init value 0xFFFF, make sure periodic timer and retx time counters are NOT active, after bsr transmission set the value configured by the NW. mac->scheduling_info.periodicBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING; mac->scheduling_info.retxBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING; mac->BSR_reporting_active = BSR_TRIGGER_NONE; -// mac->scheduling_info.periodicPHR_SF = -// nr_get_sf_perioidicPHR_Timer(mac-> -// scheduling_info.periodicPHR_Timer); -// mac->scheduling_info.prohibitPHR_SF = -// nr_get_sf_prohibitPHR_Timer(mac-> -// scheduling_info.prohibitPHR_Timer); -// mac->scheduling_info.PathlossChange_db = -// nr_get_db_dl_PathlossChange(mac-> -// scheduling_info.PathlossChange); -// mac->PHR_reporting_active = 0; + // mac->scheduling_info.periodicPHR_SF = + // nr_get_sf_perioidicPHR_Timer(mac-> + // scheduling_info.periodicPHR_Timer); + // mac->scheduling_info.prohibitPHR_SF = + // nr_get_sf_prohibitPHR_Timer(mac-> + // scheduling_info.prohibitPHR_Timer); + // mac->scheduling_info.PathlossChange_db = + // nr_get_db_dl_PathlossChange(mac-> + // scheduling_info.PathlossChange); + // mac->PHR_reporting_active = 0; for (i = 0; i < NR_MAX_NUM_LCID; i++) { LOG_D(NR_MAC, "[UE%d] Applying default logical channel config for LCGID %d\n", - module_idP, i); + module_idP, i); mac->scheduling_info.Bj[i] = -1; mac->scheduling_info.bucket_size[i] = -1; @@ -197,53 +196,47 @@ void nr_ue_init_mac(module_id_t module_idP) { mac->scheduling_info.LCID_status[i] = LCID_EMPTY; mac->scheduling_info.LCID_buffer_remain[i] = 0; - for (int i=0;ifirst_ul_tx[i]=1; + + for (int i=0; ifirst_ul_tx[i]=1; } } -int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){ +int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti) { + RA_config_t *ra = &mac->ra; + int rnti_type; - RA_config_t *ra = &mac->ra; - int rnti_type; - - if (rnti == ra->ra_rnti) { - rnti_type = NR_RNTI_RA; - } else if (rnti == ra->t_crnti && (ra->ra_state == WAIT_RAR || ra->ra_state == WAIT_CONTENTION_RESOLUTION) ) { - rnti_type = NR_RNTI_TC; - } else if (rnti == mac->crnti) { - rnti_type = NR_RNTI_C; - } else if (rnti == 0xFFFE) { - rnti_type = NR_RNTI_P; - } else if (rnti == 0xFFFF) { - rnti_type = NR_RNTI_SI; - } else { - AssertFatal(1 == 0, "In %s: Not identified/handled rnti %d \n", __FUNCTION__, rnti); - } - - LOG_D(MAC, "In %s: returning rnti_type %s \n", __FUNCTION__, rnti_types[rnti_type]); - - return rnti_type; + if (rnti == ra->ra_rnti) { + rnti_type = NR_RNTI_RA; + } else if (rnti == ra->t_crnti && (ra->ra_state == WAIT_RAR || ra->ra_state == WAIT_CONTENTION_RESOLUTION) ) { + rnti_type = NR_RNTI_TC; + } else if (rnti == mac->crnti) { + rnti_type = NR_RNTI_C; + } else if (rnti == 0xFFFE) { + rnti_type = NR_RNTI_P; + } else if (rnti == 0xFFFF) { + rnti_type = NR_RNTI_SI; + } else { + AssertFatal(1 == 0, "In %s: Not identified/handled rnti %d \n", __FUNCTION__, rnti); + } + LOG_D(MAC, "In %s: returning rnti_type %s \n", __FUNCTION__, rnti_types[rnti_type]); + return rnti_type; } int8_t nr_ue_decode_mib(module_id_t module_id, int cc_id, uint8_t gNB_index, - uint8_t extra_bits, // 8bits 38.212 c7.1.1 + uint8_t extra_bits, // 8bits 38.212 c7.1.1 uint32_t ssb_length, uint32_t ssb_index, void *pduP, uint16_t ssb_start_subcarrier, - uint16_t cell_id) -{ + uint16_t cell_id) { LOG_I(MAC,"[L2][MAC] decode mib\n"); - NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); mac->physCellId = cell_id; - nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, 0, 0, 0, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU - AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n"); //if(mac->mib != NULL){ uint16_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused); @@ -252,24 +245,26 @@ int8_t nr_ue_decode_mib(module_id_t module_id, for (int i=0; i<4; i++) frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i); - uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] + uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset; - frame = frame << 4; frame = frame | frame_number_4lsb; - if(ssb_length == 64){ + + if(ssb_length == 64) { mac->frequency_range = FR2; + for (int i=0; i<3; i++) ssb_index += (((extra_bits>>(7-i))&0x01)<<(3+i)); - }else{ + } else { mac->frequency_range = FR1; - if(ssb_subcarrier_offset_msb){ + + if(ssb_subcarrier_offset_msb) { ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10; } } #ifdef DEBUG_MIB - uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] + uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] LOG_I(MAC,"system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]); LOG_I(MAC,"system frame number(with LSB): %d\n", (int)frame); LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon); @@ -282,17 +277,14 @@ int8_t nr_ue_decode_mib(module_id_t module_id, LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit); LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index); #endif - //storing ssb index in the mac structure mac->mib_ssb = ssb_index; mac->ssb_subcarrier_offset = ssb_subcarrier_offset; - uint8_t scs_ssb; uint32_t band; uint16_t ssb_start_symbol; if (get_softmodem_params()->sa == 1) { - scs_ssb = get_softmodem_params()->numerology; band = mac->nr_band; ssb_start_symbol = get_ssb_start_symbol(band,scs_ssb,ssb_index); @@ -306,8 +298,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ssb_index, ssb_start_subcarrier, mac->frequency_range); - } - else { + } else { NR_ServingCellConfigCommon_t *scc = mac->scc; scs_ssb = *scc->ssbSubcarrierSpacing; band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]; @@ -316,7 +307,6 @@ int8_t nr_ue_decode_mib(module_id_t module_id, mac->dl_config_request.sfn = frame; mac->dl_config_request.slot = ssb_start_symbol/14; - return 0; } @@ -329,14 +319,14 @@ int8_t nr_ue_decode_BCCH_DL_SCH(module_id_t module_id, if(ack_nack) { LOG_D(NR_MAC, "Decoding NR-BCCH-DL-SCH-Message (SIB1 or SI)\n"); nr_mac_rrc_data_ind_ue(module_id, cc_id, gNB_index, 0, 0, 0, NR_BCCH_DL_SCH, (uint8_t *) pduP, pdu_len); - } - else + } else LOG_E(NR_MAC, "Got NACK on NR-BCCH-DL-SCH-Message (SIB1 or SI)\n"); + return 0; } // TODO: change to UE parameter, scs: 15KHz, slot duration: 1ms -uint32_t get_ssb_frame(uint32_t test){ +uint32_t get_ssb_frame(uint32_t test) { return test; } @@ -345,18 +335,16 @@ uint32_t get_ssb_frame(uint32_t test){ * These tables and functions are going to be called by function nr_ue_process_dci */ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, - uint16_t n_RB_ULBWP, - uint16_t n_RB_DLBWP, - uint16_t riv - ){ - + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, + uint16_t n_RB_ULBWP, + uint16_t n_RB_DLBWP, + uint16_t riv + ) { /* * TS 38.214 subclause 5.1.2.2 Resource allocation in frequency domain (downlink) * when the scheduling grant is received with DCI format 1_0, then downlink resource allocation type 1 is used */ - if(dlsch_config_pdu != NULL){ - + if(dlsch_config_pdu != NULL) { /* * TS 38.214 subclause 5.1.2.2.1 Downlink resource allocation type 0 */ @@ -377,9 +365,9 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p LOG_D(MAC,"DLSCH n_RB_DLBWP = %i\n", n_RB_DLBWP); LOG_D(MAC,"DLSCH number_rbs = %i\n", dlsch_config_pdu->number_rbs); LOG_D(MAC,"DLSCH start_rb = %i\n", dlsch_config_pdu->start_rb); - } - if(pusch_config_pdu != NULL){ + + if(pusch_config_pdu != NULL) { /* * TS 38.214 subclause 6.1.2.2 Resource allocation in frequency domain (uplink) */ @@ -389,7 +377,6 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p /* * TS 38.214 subclause 6.1.2.2.2 Uplink resource allocation type 1 */ - pusch_config_pdu->rb_size = NRRIV2BW(riv,n_RB_ULBWP); pusch_config_pdu->rb_start = NRRIV2PRBOFFSET(riv,n_RB_ULBWP); @@ -399,31 +386,30 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p LOG_W(MAC, "Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_ULBWP: %d \n",pusch_config_pdu->rb_size, pusch_config_pdu->rb_start, n_RB_ULBWP); return -1; } + LOG_D(MAC,"ULSCH riv = %i\n", riv); LOG_D(MAC,"ULSCH n_RB_DLBWP = %i\n", n_RB_ULBWP); LOG_D(MAC,"ULSCH number_rbs = %i\n", pusch_config_pdu->rb_size); LOG_D(MAC,"ULSCH start_rb = %i\n", pusch_config_pdu->rb_start); } + return 0; } int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, - nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, - uint8_t time_domain_ind, - int default_abc, - bool use_default){ - + nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, + uint8_t time_domain_ind, + int default_abc, + bool use_default) { int dmrs_typeA_pos = (mac->scc != NULL) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position; - -// uint8_t k_offset=0; + // uint8_t k_offset=0; int sliv_S=0; int sliv_L=0; uint8_t mu_pusch = 1; - // definition table j Table 6.1.2.1.1-4 uint8_t j = (mu_pusch==3)?3:(mu_pusch==2)?2:1; - uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1 + uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]= { // for PUSCH from TS 38.214 subclause 6.1.2.1.1 {j, 0,14}, // row index 1 {j, 0,12}, // row index 2 {j, 0,10}, // row index 3 @@ -463,8 +449,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, /* * TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink) */ - if(dlsch_config_pdu != NULL){ + if(dlsch_config_pdu != NULL) { NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; + if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && @@ -476,7 +463,6 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; if (pdsch_TimeDomainAllocationList && use_default==false) { - if (time_domain_ind >= pdsch_TimeDomainAllocationList->list.count) { LOG_E(MAC, "time_domain_ind %d >= pdsch->TimeDomainAllocationList->list.count %d\n", time_domain_ind, pdsch_TimeDomainAllocationList->list.count); @@ -490,44 +476,40 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, SLIV2SL(startSymbolAndLength,&S,&L); dlsch_config_pdu->start_symbol=S; dlsch_config_pdu->number_symbols=L; - LOG_D(MAC,"SLIV = %i\n", startSymbolAndLength); LOG_D(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol); LOG_D(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols); - - } - else {// Default configuration from tables - + } else { // Default configuration from tables get_info_from_tda_tables(default_abc, time_domain_ind, dmrs_typeA_pos, 1, // normal CP &sliv_S, &sliv_L); - dlsch_config_pdu->number_symbols = sliv_L; dlsch_config_pdu->start_symbol = sliv_S; } - } /* - * TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink) - */ - if(pusch_config_pdu != NULL){ + } /* + + * TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink) + */ + + if(pusch_config_pdu != NULL) { NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; + if (mac->ULbwp[0] && mac->ULbwp[0]->bwp_Dedicated && mac->ULbwp[0]->bwp_Dedicated->pusch_Config && mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup && mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup; - } - else if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Common && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { + } else if (mac->ULbwp[0] && + mac->ULbwp[0]->bwp_Common && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - } - else pusch_TimeDomainAllocationList = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + } else pusch_TimeDomainAllocationList = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; if (pusch_TimeDomainAllocationList && use_default==false) { if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) { @@ -537,17 +519,16 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, pusch_config_pdu->nr_of_symbols=0; return -1; } - + LOG_D(NR_MAC,"Filling Time-Domain Allocation from pusch_TimeDomainAllocationList\n"); int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[time_domain_ind]->startSymbolAndLength; int S,L; SLIV2SL(startSymbolAndLength,&S,&L); pusch_config_pdu->start_symbol_index=S; pusch_config_pdu->nr_of_symbols=L; - } - else { + } else { LOG_D(NR_MAC,"Filling Time-Domain Allocation from tables\n"); -// k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; + // k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1]; sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2]; // k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0]; @@ -556,32 +537,33 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, pusch_config_pdu->nr_of_symbols = sliv_L; pusch_config_pdu->start_symbol_index = sliv_S; } + LOG_D(NR_MAC,"start_symbol = %i\n", pusch_config_pdu->start_symbol_index); LOG_D(NR_MAC,"number_symbols = %i\n", pusch_config_pdu->nr_of_symbols); } + return 0; } int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci) { - NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dci->dci_format]; - LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n", - dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits); + dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long *)dci->payloadBits); int8_t ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15); + if ((ret&1) == 1) return -1; else if (ret == 2) { dci->dci_format = NR_UL_DCI_FORMAT_0_0; def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dci->dci_format]; } + int8_t ret_proc = nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci); memset(def_dci_pdu_rel15, 0, sizeof(dci_pdu_rel15_t)); return ret_proc; } int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, fapi_nr_dci_indication_pdu_t *dci_ind) { - uint16_t rnti = dci_ind->rnti; uint8_t dci_format = dci_ind->dci_format; int ret = 0; @@ -594,681 +576,697 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; uint8_t is_Msg3 = 0; int default_abc = 1; - uint16_t n_RB_DLBWP; + if (mac->DLbwp[0]) n_RB_DLBWP = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); else if (mac->scc_SIB) n_RB_DLBWP = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth,MAX_BWP_SIZE); else n_RB_DLBWP = mac->type0_PDCCH_CSS_config.num_rbs; LOG_D(MAC, "In %s: Processing received DCI format %s (DL BWP %d)\n", __FUNCTION__, dci_formats[dci_format], n_RB_DLBWP); - switch(dci_format){ - case NR_UL_DCI_FORMAT_0_0: { - /* - * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 32 TPC_PUSCH: - * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space - * 50 SUL_IND_0_0: - */ - // Calculate the slot in which ULSCH should be scheduled. This is current slot + K2, - // where K2 is the offset between the slot in which UL DCI is received and the slot - // in which ULSCH should be scheduled. K2 is configured in RRC configuration. - // todo: - // - SUL_IND_0_0 + switch(dci_format) { + case NR_UL_DCI_FORMAT_0_0: { + /* + * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 32 TPC_PUSCH: + * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space + * 50 SUL_IND_0_0: + */ + // Calculate the slot in which ULSCH should be scheduled. This is current slot + K2, + // where K2 is the offset between the slot in which UL DCI is received and the slot + // in which ULSCH should be scheduled. K2 is configured in RRC configuration. + // todo: + // - SUL_IND_0_0 + // Schedule PUSCH + ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); - // Schedule PUSCH - ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); + if (ret != -1) { + // Get UL config request corresponding slot_tx + fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); - if (ret != -1){ + if (!ul_config) { + LOG_W(MAC, "In %s: ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n", __FUNCTION__, frame, slot); + return -1; + } - // Get UL config request corresponding slot_tx - fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); - - if (!ul_config) { - LOG_W(MAC, "In %s: ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n", __FUNCTION__, frame, slot); - return -1; + AssertFatal(ul_config->number_pdusnumber_pdus %d out of bounds\n",ul_config->number_pdus); + nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; + fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); + // Config PUSCH PDU + ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); } - AssertFatal(ul_config->number_pdusnumber_pdus %d out of bounds\n",ul_config->number_pdus); - nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; - - fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); - - // Config PUSCH PDU - ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); - + break; } - - break; - } - case NR_UL_DCI_FORMAT_0_1: { - /* - * with CRC scrambled by C-RNTI or CS-RNTI or SP-CSI-RNTI or new-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 1 CARRIER_IND - * 2 SUL_IND_0_1 - * 7 BANDWIDTH_PART_IND - * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 29 FIRST_DAI - * 30 SECOND_DAI - * 32 TPC_PUSCH: - * 36 SRS_RESOURCE_IND: - * 37 PRECOD_NBR_LAYERS: - * 38 ANTENNA_PORTS: - * 40 SRS_REQUEST: - * 42 CSI_REQUEST: - * 43 CBGTI - * 45 PTRS_DMRS - * 46 BETA_OFFSET_IND - * 47 DMRS_SEQ_INI - * 48 UL_SCH_IND - * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space - */ - // TODO: - // - FIRST_DAI - // - SECOND_DAI - // - SRS_RESOURCE_IND + case NR_UL_DCI_FORMAT_0_1: { + /* + * with CRC scrambled by C-RNTI or CS-RNTI or SP-CSI-RNTI or new-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 1 CARRIER_IND + * 2 SUL_IND_0_1 + * 7 BANDWIDTH_PART_IND + * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 29 FIRST_DAI + * 30 SECOND_DAI + * 32 TPC_PUSCH: + * 36 SRS_RESOURCE_IND: + * 37 PRECOD_NBR_LAYERS: + * 38 ANTENNA_PORTS: + * 40 SRS_REQUEST: + * 42 CSI_REQUEST: + * 43 CBGTI + * 45 PTRS_DMRS + * 46 BETA_OFFSET_IND + * 47 DMRS_SEQ_INI + * 48 UL_SCH_IND + * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space + */ + // TODO: + // - FIRST_DAI + // - SECOND_DAI + // - SRS_RESOURCE_IND + // Schedule PUSCH + ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); - // Schedule PUSCH - ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); + if (ret != -1) { + // Get UL config request corresponding slot_tx + fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); - if (ret != -1){ + if (!ul_config) { + LOG_W(MAC, "In %s: ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n", __FUNCTION__, frame, slot); + return -1; + } - // Get UL config request corresponding slot_tx - fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); - - if (!ul_config) { - LOG_W(MAC, "In %s: ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n", __FUNCTION__, frame, slot); - return -1; + nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; + fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); + // Config PUSCH PDU + ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); } - nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; - - fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); - - // Config PUSCH PDU - ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); - + break; } - break; - } - case NR_DL_DCI_FORMAT_1_0: { - /* - * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI - * 33 TPC_PUCCH: - * 34 PUCCH_RESOURCE_IND: - * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: - * 55 RESERVED_NR_DCI - * with CRC scrambled by P-RNTI - * 8 SHORT_MESSAGE_IND - * 9 SHORT_MESSAGES - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 31 TB_SCALING - * 55 RESERVED_NR_DCI - * with CRC scrambled by SI-RNTI - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 26 RV: - * 55 RESERVED_NR_DCI - * with CRC scrambled by RA-RNTI - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 31 TB_SCALING - * 55 RESERVED_NR_DCI - * with CRC scrambled by TC-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI - * 33 TPC_PUCCH: - */ + case NR_DL_DCI_FORMAT_1_0: { + /* + * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + * 33 TPC_PUCCH: + * 34 PUCCH_RESOURCE_IND: + * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: + * 55 RESERVED_NR_DCI + * with CRC scrambled by P-RNTI + * 8 SHORT_MESSAGE_IND + * 9 SHORT_MESSAGES + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 31 TB_SCALING + * 55 RESERVED_NR_DCI + * with CRC scrambled by SI-RNTI + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 26 RV: + * 55 RESERVED_NR_DCI + * with CRC scrambled by RA-RNTI + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 31 TB_SCALING + * 55 RESERVED_NR_DCI + * with CRC scrambled by TC-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + * 33 TPC_PUCCH: + */ + dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + NR_PDSCH_Config_t *pdsch_config= (mac->DLbwp[0]) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL; + uint16_t BWPSize = n_RB_DLBWP; - dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + if(rnti == SI_RNTI) { + NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = mac->type0_PDCCH_CSS_config; + default_abc = type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern; + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH; + dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; + dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; - NR_PDSCH_Config_t *pdsch_config= (mac->DLbwp[0]) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL; - uint16_t BWPSize = n_RB_DLBWP; + if (pdsch_config) pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL; // For PDSCH with mapping type A, the UE shall assume dmrs-AdditionalPosition='pos2' - if(rnti == SI_RNTI) { - NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = mac->type0_PDCCH_CSS_config; - default_abc = type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern; - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH; - dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; - dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; - dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; - if (pdsch_config) pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL; // For PDSCH with mapping type A, the UE shall assume dmrs-AdditionalPosition='pos2' - BWPSize = dlsch_config_pdu_1_0->BWPSize; - } else { - if (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti){ - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH; + BWPSize = dlsch_config_pdu_1_0->BWPSize; } else { - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - } - if( (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) || (rnti == ra->t_crnti) ) { - if (mac->scc == NULL) { + if (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) { + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH; + } else { + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + } + + if( (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) || (rnti == ra->t_crnti) ) { + if (mac->scc == NULL) { + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + } else { + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + } + + if (!get_softmodem_params()->sa) { // NSA mode is not using the Initial BWP + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup; + BWPSize = dlsch_config_pdu_1_0->BWPSize; + } + } else if (mac->DLbwp[0]) { + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup; + } else if (mac->scc_SIB) { dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.subcarrierSpacing; + pdsch_config = NULL; } - else { - dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - } - if (!get_softmodem_params()->sa) { // NSA mode is not using the Initial BWP - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup; - BWPSize = dlsch_config_pdu_1_0->BWPSize; - } - } else if (mac->DLbwp[0]) { - dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; - pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup; - } else if (mac->scc_SIB) { - dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->SubcarrierSpacing = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.subcarrierSpacing; - pdsch_config = NULL; } + + /* IDENTIFIER_DCI_FORMATS */ + /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ + if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,BWPSize,dci->frequency_domain_assignment.val) < 0) { + LOG_W(MAC, "[%d.%d] Invalid frequency_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } + + /* TIME_DOM_RESOURCE_ASSIGNMENT */ + if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val,default_abc,rnti==SI_RNTI) < 0) { + LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } + + NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; + + if (mac->DLbwp[0] && + mac->DLbwp[0]->bwp_Dedicated && + mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && + mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList) + pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup; + else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList) + pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup) + pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + + int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_0->start_symbol <= 3)? typeA: typeB); + /* dmrs symbol positions*/ + dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, + mac->mib->dmrs_TypeA_Position, + dlsch_config_pdu_1_0->number_symbols, + dlsch_config_pdu_1_0->start_symbol, + mappingtype); + dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ? + (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0; + + /* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */ + if (dlsch_config_pdu_1_0->number_symbols == 2) + dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1; + else + dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2; + + /* VRB_TO_PRB_MAPPING */ + dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; + /* MCS TABLE INDEX */ + dlsch_config_pdu_1_0->mcs_table = (pdsch_config) ? ((pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0) : 0; + /* MCS */ + dlsch_config_pdu_1_0->mcs = dci->mcs; + + // Basic sanity check for MCS value to check for a false or erroneous DCI + if (dlsch_config_pdu_1_0->mcs > 28) { + LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_0->mcs); + return -1; + } + + /* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->ndi = dci->ndi; + /* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->rv = dci->rv; + /* HARQ_PROCESS_NUMBER (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->harq_process_nbr = dci->harq_pid; + + /* TB_SCALING (only if CRC scrambled by P-RNTI or RA-RNTI) */ + // according to TS 38.214 Table 5.1.3.2-3 + if (dci->tb_scaling == 0) dlsch_config_pdu_1_0->scaling_factor_S = 1; + + if (dci->tb_scaling == 1) dlsch_config_pdu_1_0->scaling_factor_S = 0.5; + + if (dci->tb_scaling == 2) dlsch_config_pdu_1_0->scaling_factor_S = 0.25; + + if (dci->tb_scaling == 3) dlsch_config_pdu_1_0->scaling_factor_S = 0; // value not defined in table + + /* TPC_PUCCH (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + // according to TS 38.213 Table 7.2.1-1 + if (dci->tpc == 0) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = -1; + + if (dci->tpc == 1) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 0; + + if (dci->tpc == 2) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 1; + + if (dci->tpc == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3; + + // Sanity check for pucch_resource_indicator value received to check for false DCI. + valid = 0; + + if (mac->ULbwp[0] && + mac->ULbwp[0]->bwp_Dedicated && + mac->ULbwp[0]->bwp_Dedicated->pucch_Config && + mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup&& + mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList) { + pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count; + + for (int id = 0; id < pucch_res_set_cnt; id++) { + if (dci->pucch_resource_indicator < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { + valid = 1; + break; + } + } + } else if (mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList) { + pucch_res_set_cnt = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.count; + + for (int id = 0; id < pucch_res_set_cnt; id++) { + if (dci->pucch_resource_indicator < + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { + valid = 1; + break; + } + } + } else valid=1; + + if (!valid) { + LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator); + return -1; + } + + // set the harq status at MAC for feedback + set_harq_status(mac,dci->pucch_resource_indicator, + dci->harq_pid, + dlsch_config_pdu_1_0->accumulated_delta_PUCCH, + 1+dci->pdsch_to_harq_feedback_timing_indicator.val, + dci->dai[0].val, + dci_ind->n_CCE,dci_ind->N_CCE, + frame,slot); + LOG_D(MAC,"(nr_ue_procedures.c) rnti = %x dl_config->number_pdus = %d\n", + dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti, + dl_config->number_pdus); + LOG_D(MAC,"(nr_ue_procedures.c) frequency_domain_resource_assignment=%d \t number_rbs=%d \t start_rb=%d\n", + dci->frequency_domain_assignment.val, + dlsch_config_pdu_1_0->number_rbs, + dlsch_config_pdu_1_0->start_rb); + LOG_D(MAC,"(nr_ue_procedures.c) time_domain_resource_assignment=%d \t number_symbols=%d \t start_symbol=%d\n", + dci->time_domain_assignment.val, + dlsch_config_pdu_1_0->number_symbols, + dlsch_config_pdu_1_0->start_symbol); + LOG_D(MAC, + "(nr_ue_procedures.c) vrb_to_prb_mapping=%d \n>>> mcs=%d\n>>> ndi=%d\n>>> rv=%d\n>>> harq_process_nbr=%d\n>>> dai=%d\n>>> scaling_factor_S=%f\n>>> tpc_pucch=%d\n>>> pucch_res_ind=%d\n>>> pdsch_to_harq_feedback_time_ind=%d\n", + dlsch_config_pdu_1_0->vrb_to_prb_mapping, + dlsch_config_pdu_1_0->mcs, + dlsch_config_pdu_1_0->ndi, + dlsch_config_pdu_1_0->rv, + dlsch_config_pdu_1_0->harq_process_nbr, + dci->dai[0].val, + dlsch_config_pdu_1_0->scaling_factor_S, + dlsch_config_pdu_1_0->accumulated_delta_PUCCH, + dci->pucch_resource_indicator, + 1+dci->pdsch_to_harq_feedback_timing_indicator.val); + // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; + LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); + dl_config->number_pdus = dl_config->number_pdus + 1; + break; } - /* IDENTIFIER_DCI_FORMATS */ - /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ - if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,BWPSize,dci->frequency_domain_assignment.val) < 0) { - LOG_W(MAC, "[%d.%d] Invalid frequency_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } - /* TIME_DOM_RESOURCE_ASSIGNMENT */ - if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val,default_abc,rnti==SI_RNTI) < 0) { - LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } + case NR_DL_DCI_FORMAT_1_1: { + /* + * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 1 CARRIER_IND: + * 7 BANDWIDTH_PART_IND: + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 14 PRB_BUNDLING_SIZE_IND: + * 15 RATE_MATCHING_IND: + * 16 ZP_CSI_RS_TRIGGER: + * 18 TB1_MCS: + * 19 TB1_NDI: + * 20 TB1_RV: + * 21 TB2_MCS: + * 22 TB2_NDI: + * 23 TB2_RV: + * 27 HARQ_PROCESS_NUMBER: + * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + * 33 TPC_PUCCH: + * 34 PUCCH_RESOURCE_IND: + * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: + * 38 ANTENNA_PORTS: + * 39 TCI: + * 40 SRS_REQUEST: + * 43 CBGTI: + * 44 CBGFI: + * 47 DMRS_SEQ_INI: + */ + if (dci->bwp_indicator.val != 1) { + LOG_W(MAC, "[%d.%d] bwp_indicator != 1! Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } - NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; - if (mac->DLbwp[0] && - mac->DLbwp[0]->bwp_Dedicated && - mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && - mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList) - pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup; - else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList) - pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; - else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup) - pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + config_bwp_ue(mac, &dci->bwp_indicator.val, &dci_format); + NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id; + NR_PDSCH_Config_t *pdsch_config=mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup; + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_1 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + dlsch_config_pdu_1_1->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_1->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_1->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; - int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_0->start_symbol <= 3)? typeA: typeB); + /* IDENTIFIER_DCI_FORMATS */ + /* CARRIER_IND */ + /* BANDWIDTH_PART_IND */ + // dlsch_config_pdu_1_1->bandwidth_part_ind = dci->bandwidth_part_ind; + /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ + if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->frequency_domain_assignment.val) < 0) { + LOG_W(MAC, "[%d.%d] Invalid frequency_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } - /* dmrs symbol positions*/ - dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, - mac->mib->dmrs_TypeA_Position, - dlsch_config_pdu_1_0->number_symbols, - dlsch_config_pdu_1_0->start_symbol, - mappingtype); - dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ? - (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0; - /* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */ - if (dlsch_config_pdu_1_0->number_symbols == 2) - dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1; - else - dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2; - /* VRB_TO_PRB_MAPPING */ - dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; - /* MCS TABLE INDEX */ - dlsch_config_pdu_1_0->mcs_table = (pdsch_config) ? ((pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0) : 0; - /* MCS */ - dlsch_config_pdu_1_0->mcs = dci->mcs; - // Basic sanity check for MCS value to check for a false or erroneous DCI - if (dlsch_config_pdu_1_0->mcs > 28) { - LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_0->mcs); - return -1; - } - /* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->ndi = dci->ndi; - /* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->rv = dci->rv; - /* HARQ_PROCESS_NUMBER (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->harq_process_nbr = dci->harq_pid; - /* TB_SCALING (only if CRC scrambled by P-RNTI or RA-RNTI) */ - // according to TS 38.214 Table 5.1.3.2-3 - if (dci->tb_scaling == 0) dlsch_config_pdu_1_0->scaling_factor_S = 1; - if (dci->tb_scaling == 1) dlsch_config_pdu_1_0->scaling_factor_S = 0.5; - if (dci->tb_scaling == 2) dlsch_config_pdu_1_0->scaling_factor_S = 0.25; - if (dci->tb_scaling == 3) dlsch_config_pdu_1_0->scaling_factor_S = 0; // value not defined in table - /* TPC_PUCCH (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - // according to TS 38.213 Table 7.2.1-1 - if (dci->tpc == 0) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = -1; - if (dci->tpc == 1) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 0; - if (dci->tpc == 2) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 1; - if (dci->tpc == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3; - // Sanity check for pucch_resource_indicator value received to check for false DCI. - valid = 0; - if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Dedicated && - mac->ULbwp[0]->bwp_Dedicated->pucch_Config && - mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup&& - mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList) { + /* TIME_DOM_RESOURCE_ASSIGNMENT */ + if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val,0,false) < 0) { + LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } + + NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; + + if (mac->DLbwp[0] && + mac->DLbwp[0]->bwp_Dedicated && + mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && + mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList) + pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup; + else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList) + pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup) + pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + + int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_1->start_symbol <= 3)? typeA: typeB); + /* dmrs symbol positions*/ + dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, + mac->scc->dmrs_TypeA_Position, + dlsch_config_pdu_1_1->number_symbols, + dlsch_config_pdu_1_1->start_symbol, + mappingtype); + dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : + NFAPI_NR_DMRS_TYPE2; + /* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214, + using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */ + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = 1; + + /* VRB_TO_PRB_MAPPING */ + if ((pdsch_config->resourceAllocation == 1) && (pdsch_config->vrb_ToPRB_Interleaver != NULL)) + dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; + + /* PRB_BUNDLING_SIZE_IND */ + dlsch_config_pdu_1_1->prb_bundling_size_ind = dci->prb_bundling_size_indicator.val; + /* RATE_MATCHING_IND */ + dlsch_config_pdu_1_1->rate_matching_ind = dci->rate_matching_indicator.val; + /* ZP_CSI_RS_TRIGGER */ + dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val; + /* MCS (for transport block 1)*/ + dlsch_config_pdu_1_1->mcs = dci->mcs; + + // Basic sanity check for MCS value to check for a false or erroneous DCI + if (dlsch_config_pdu_1_1->mcs > 28) { + LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->mcs); + return -1; + } + + /* NDI (for transport block 1)*/ + dlsch_config_pdu_1_1->ndi = dci->ndi; + /* RV (for transport block 1)*/ + dlsch_config_pdu_1_1->rv = dci->rv; + /* MCS (for transport block 2)*/ + dlsch_config_pdu_1_1->tb2_mcs = dci->mcs2.val; + + // Basic sanity check for MCS value to check for a false or erroneous DCI + if (dlsch_config_pdu_1_1->tb2_mcs > 28) { + LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->tb2_mcs); + return -1; + } + + /* NDI (for transport block 2)*/ + dlsch_config_pdu_1_1->tb2_ndi = dci->ndi2.val; + /* RV (for transport block 2)*/ + dlsch_config_pdu_1_1->tb2_rv = dci->rv2.val; + /* HARQ_PROCESS_NUMBER */ + dlsch_config_pdu_1_1->harq_process_nbr = dci->harq_pid; + + /* TPC_PUCCH */ + // according to TS 38.213 Table 7.2.1-1 + if (dci->tpc == 0) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = -1; + + if (dci->tpc == 1) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 0; + + if (dci->tpc == 2) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 1; + + if (dci->tpc == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3; + + // Sanity check for pucch_resource_indicator value received to check for false DCI. + valid = 0; pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count; + for (int id = 0; id < pucch_res_set_cnt; id++) { - if (dci->pucch_resource_indicator < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { - valid = 1; - break; - } - } - } - else if (mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList){ - pucch_res_set_cnt = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.count; - for (int id = 0; id < pucch_res_set_cnt; id++) { - if (dci->pucch_resource_indicator < mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { + if (dci->pucch_resource_indicator < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { valid = 1; break; } } - } else valid=1; - if (!valid) { - LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator); - return -1; + + if (!valid) { + LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator); + return -1; + } + + /* ANTENNA_PORTS */ + uint8_t n_codewords = 1; // FIXME!!! + long *max_length = NULL; + long *dmrs_type = NULL; + + if (pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA) { + max_length = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength; + dmrs_type = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type; + } + + if (pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB) { + max_length = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->maxLength; + dmrs_type = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type; + } + + if ((dmrs_type == NULL) && (max_length == NULL)) { + // Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1 + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_1[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_1[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_1[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_1[dci->antenna_ports.val][4]; + } + + if ((dmrs_type == NULL) && (max_length != NULL)) { + // Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2 + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][5]; + } + + if (n_codewords == 2) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][5]; + dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][6]; + dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][7]; + dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][8]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][9]; + } + } + + if ((dmrs_type != NULL) && (max_length == NULL)) { + // Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1 + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][4]; + } + + if (n_codewords == 2) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][5]; + dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][6]; + } + } + + if ((dmrs_type != NULL) && (max_length != NULL)) { + // Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2 + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][5]; + } + + if (n_codewords == 2) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][5]; + dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][6]; + dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][7]; + dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][8]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][9]; + } + } + + /* TCI */ + if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1) { + // 0 bit if higher layer parameter tci-PresentInDCI is not enabled + // otherwise 3 bits as defined in Subclause 5.1.5 of [6, TS38.214] + dlsch_config_pdu_1_1->tci_state = dci->transmission_configuration_indication.val; + } + + /* SRS_REQUEST */ + // if SUL is supported in the cell, there is an additional bit in this field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!! + dlsch_config_pdu_1_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request.val & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 + /* CBGTI */ + dlsch_config_pdu_1_1->cbgti = dci->cbgti.val; + /* CBGFI */ + dlsch_config_pdu_1_1->codeBlockGroupFlushIndicator = dci->cbgfi.val; + /* DMRS_SEQ_INI */ + //FIXME!!! + // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; + /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */ + // according to TS 38.213 Table 9.2.3-1 + NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id; + uint8_t feedback_ti = + mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0]; + // set the harq status at MAC for feedback + set_harq_status(mac,dci->pucch_resource_indicator, + dci->harq_pid, + dlsch_config_pdu_1_1->accumulated_delta_PUCCH, + feedback_ti, + dci->dai[0].val, + dci_ind->n_CCE,dci_ind->N_CCE, + frame,slot); + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); + dl_config->number_pdus = dl_config->number_pdus + 1; + /* TODO same calculation for MCS table as done in UL */ + dlsch_config_pdu_1_1->mcs_table = (pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0; + + /*PTRS configuration */ + if(mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) { + valid_ptrs_setup = set_dl_ptrs_values(mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup, + dlsch_config_pdu_1_1->number_rbs, dlsch_config_pdu_1_1->mcs, dlsch_config_pdu_1_1->mcs_table, + &dlsch_config_pdu_1_1->PTRSFreqDensity,&dlsch_config_pdu_1_1->PTRSTimeDensity, + &dlsch_config_pdu_1_1->PTRSPortIndex,&dlsch_config_pdu_1_1->nEpreRatioOfPDSCHToPTRS, + &dlsch_config_pdu_1_1->PTRSReOffset, dlsch_config_pdu_1_1->number_symbols); + + if(valid_ptrs_setup==true) { + dlsch_config_pdu_1_1->pduBitmap |= 0x1; + LOG_D(MAC, "DL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", dlsch_config_pdu_1_1->PTRSTimeDensity, dlsch_config_pdu_1_1->PTRSFreqDensity); + } + } + + break; } - // set the harq status at MAC for feedback - set_harq_status(mac,dci->pucch_resource_indicator, - dci->harq_pid, - dlsch_config_pdu_1_0->accumulated_delta_PUCCH, - 1+dci->pdsch_to_harq_feedback_timing_indicator.val, - dci->dai[0].val, - dci_ind->n_CCE,dci_ind->N_CCE, - frame,slot); + case NR_DL_DCI_FORMAT_2_0: + break; - LOG_D(MAC,"(nr_ue_procedures.c) rnti = %x dl_config->number_pdus = %d\n", - dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti, - dl_config->number_pdus); - LOG_D(MAC,"(nr_ue_procedures.c) frequency_domain_resource_assignment=%d \t number_rbs=%d \t start_rb=%d\n", - dci->frequency_domain_assignment.val, - dlsch_config_pdu_1_0->number_rbs, - dlsch_config_pdu_1_0->start_rb); - LOG_D(MAC,"(nr_ue_procedures.c) time_domain_resource_assignment=%d \t number_symbols=%d \t start_symbol=%d\n", - dci->time_domain_assignment.val, - dlsch_config_pdu_1_0->number_symbols, - dlsch_config_pdu_1_0->start_symbol); - LOG_D(MAC,"(nr_ue_procedures.c) vrb_to_prb_mapping=%d \n>>> mcs=%d\n>>> ndi=%d\n>>> rv=%d\n>>> harq_process_nbr=%d\n>>> dai=%d\n>>> scaling_factor_S=%f\n>>> tpc_pucch=%d\n>>> pucch_res_ind=%d\n>>> pdsch_to_harq_feedback_time_ind=%d\n", - dlsch_config_pdu_1_0->vrb_to_prb_mapping, - dlsch_config_pdu_1_0->mcs, - dlsch_config_pdu_1_0->ndi, - dlsch_config_pdu_1_0->rv, - dlsch_config_pdu_1_0->harq_process_nbr, - dci->dai[0].val, - dlsch_config_pdu_1_0->scaling_factor_S, - dlsch_config_pdu_1_0->accumulated_delta_PUCCH, - dci->pucch_resource_indicator, - 1+dci->pdsch_to_harq_feedback_timing_indicator.val); + case NR_DL_DCI_FORMAT_2_1: + break; - // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; - - LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); - - dl_config->number_pdus = dl_config->number_pdus + 1; + case NR_DL_DCI_FORMAT_2_2: + break; - break; + case NR_DL_DCI_FORMAT_2_3: + break; + + default: + break; } - case NR_DL_DCI_FORMAT_1_1: { - /* - * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 1 CARRIER_IND: - * 7 BANDWIDTH_PART_IND: - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 14 PRB_BUNDLING_SIZE_IND: - * 15 RATE_MATCHING_IND: - * 16 ZP_CSI_RS_TRIGGER: - * 18 TB1_MCS: - * 19 TB1_NDI: - * 20 TB1_RV: - * 21 TB2_MCS: - * 22 TB2_NDI: - * 23 TB2_RV: - * 27 HARQ_PROCESS_NUMBER: - * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI - * 33 TPC_PUCCH: - * 34 PUCCH_RESOURCE_IND: - * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: - * 38 ANTENNA_PORTS: - * 39 TCI: - * 40 SRS_REQUEST: - * 43 CBGTI: - * 44 CBGFI: - * 47 DMRS_SEQ_INI: - */ - - if (dci->bwp_indicator.val != 1) { - LOG_W(MAC, "[%d.%d] bwp_indicator != 1! Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } - config_bwp_ue(mac, &dci->bwp_indicator.val, &dci_format); - NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id; - NR_PDSCH_Config_t *pdsch_config=mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup; - - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; - - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_1 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; - - dlsch_config_pdu_1_1->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_1->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_1->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; - - /* IDENTIFIER_DCI_FORMATS */ - /* CARRIER_IND */ - /* BANDWIDTH_PART_IND */ - // dlsch_config_pdu_1_1->bandwidth_part_ind = dci->bandwidth_part_ind; - /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ - if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->frequency_domain_assignment.val) < 0) { - LOG_W(MAC, "[%d.%d] Invalid frequency_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } - /* TIME_DOM_RESOURCE_ASSIGNMENT */ - if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val,0,false) < 0) { - LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } - - NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; - if (mac->DLbwp[0] && - mac->DLbwp[0]->bwp_Dedicated && - mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && - mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList) - pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup; - else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList) - pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; - else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup) - pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; - - int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_1->start_symbol <= 3)? typeA: typeB); - - /* dmrs symbol positions*/ - dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, - mac->scc->dmrs_TypeA_Position, - dlsch_config_pdu_1_1->number_symbols, - dlsch_config_pdu_1_1->start_symbol, - mappingtype); - - dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2; - - /* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214, - using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */ - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = 1; - /* VRB_TO_PRB_MAPPING */ - if ((pdsch_config->resourceAllocation == 1) && (pdsch_config->vrb_ToPRB_Interleaver != NULL)) - dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; - /* PRB_BUNDLING_SIZE_IND */ - dlsch_config_pdu_1_1->prb_bundling_size_ind = dci->prb_bundling_size_indicator.val; - /* RATE_MATCHING_IND */ - dlsch_config_pdu_1_1->rate_matching_ind = dci->rate_matching_indicator.val; - /* ZP_CSI_RS_TRIGGER */ - dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val; - /* MCS (for transport block 1)*/ - dlsch_config_pdu_1_1->mcs = dci->mcs; - // Basic sanity check for MCS value to check for a false or erroneous DCI - if (dlsch_config_pdu_1_1->mcs > 28) { - LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->mcs); - return -1; - } - /* NDI (for transport block 1)*/ - dlsch_config_pdu_1_1->ndi = dci->ndi; - /* RV (for transport block 1)*/ - dlsch_config_pdu_1_1->rv = dci->rv; - /* MCS (for transport block 2)*/ - dlsch_config_pdu_1_1->tb2_mcs = dci->mcs2.val; - // Basic sanity check for MCS value to check for a false or erroneous DCI - if (dlsch_config_pdu_1_1->tb2_mcs > 28) { - LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->tb2_mcs); - return -1; - } - /* NDI (for transport block 2)*/ - dlsch_config_pdu_1_1->tb2_ndi = dci->ndi2.val; - /* RV (for transport block 2)*/ - dlsch_config_pdu_1_1->tb2_rv = dci->rv2.val; - /* HARQ_PROCESS_NUMBER */ - dlsch_config_pdu_1_1->harq_process_nbr = dci->harq_pid; - /* TPC_PUCCH */ - // according to TS 38.213 Table 7.2.1-1 - if (dci->tpc == 0) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = -1; - if (dci->tpc == 1) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 0; - if (dci->tpc == 2) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 1; - if (dci->tpc == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3; - - // Sanity check for pucch_resource_indicator value received to check for false DCI. - valid = 0; - pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count; - for (int id = 0; id < pucch_res_set_cnt; id++) { - if (dci->pucch_resource_indicator < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { - valid = 1; - break; - } - } - if (!valid) { - LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator); - return -1; - } - - /* ANTENNA_PORTS */ - uint8_t n_codewords = 1; // FIXME!!! - long *max_length = NULL; - long *dmrs_type = NULL; - if (pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA) { - max_length = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength; - dmrs_type = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type; - } - if (pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB) { - max_length = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->maxLength; - dmrs_type = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type; - } - if ((dmrs_type == NULL) && (max_length == NULL)){ - // Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1 - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_1[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_1[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_1[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_1[dci->antenna_ports.val][4]; - } - if ((dmrs_type == NULL) && (max_length != NULL)){ - // Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2 - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][5]; - } - if (n_codewords == 2) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][5]; - dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][6]; - dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][7]; - dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][8]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][9]; - } - } - if ((dmrs_type != NULL) && (max_length == NULL)){ - // Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1 - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][4]; - } - if (n_codewords == 2) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][5]; - dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][6]; - } - } - if ((dmrs_type != NULL) && (max_length != NULL)){ - // Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2 - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][5]; - } - if (n_codewords == 2) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][5]; - dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][6]; - dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][7]; - dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][8]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][9]; - } - } - /* TCI */ - if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){ - // 0 bit if higher layer parameter tci-PresentInDCI is not enabled - // otherwise 3 bits as defined in Subclause 5.1.5 of [6, TS38.214] - dlsch_config_pdu_1_1->tci_state = dci->transmission_configuration_indication.val; - } - /* SRS_REQUEST */ - // if SUL is supported in the cell, there is an additional bit in this field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!! - dlsch_config_pdu_1_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request.val & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 - /* CBGTI */ - dlsch_config_pdu_1_1->cbgti = dci->cbgti.val; - /* CBGFI */ - dlsch_config_pdu_1_1->codeBlockGroupFlushIndicator = dci->cbgfi.val; - /* DMRS_SEQ_INI */ - //FIXME!!! - - // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; - - /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */ - // according to TS 38.213 Table 9.2.3-1 - NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id; - uint8_t feedback_ti = - mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0]; - - // set the harq status at MAC for feedback - set_harq_status(mac,dci->pucch_resource_indicator, - dci->harq_pid, - dlsch_config_pdu_1_1->accumulated_delta_PUCCH, - feedback_ti, - dci->dai[0].val, - dci_ind->n_CCE,dci_ind->N_CCE, - frame,slot); - - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); - - dl_config->number_pdus = dl_config->number_pdus + 1; - /* TODO same calculation for MCS table as done in UL */ - dlsch_config_pdu_1_1->mcs_table = (pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0; - /*PTRS configuration */ - if(mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) { - valid_ptrs_setup = set_dl_ptrs_values(mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup, - dlsch_config_pdu_1_1->number_rbs, dlsch_config_pdu_1_1->mcs, dlsch_config_pdu_1_1->mcs_table, - &dlsch_config_pdu_1_1->PTRSFreqDensity,&dlsch_config_pdu_1_1->PTRSTimeDensity, - &dlsch_config_pdu_1_1->PTRSPortIndex,&dlsch_config_pdu_1_1->nEpreRatioOfPDSCHToPTRS, - &dlsch_config_pdu_1_1->PTRSReOffset, dlsch_config_pdu_1_1->number_symbols); - if(valid_ptrs_setup==true) { - dlsch_config_pdu_1_1->pduBitmap |= 0x1; - LOG_D(MAC, "DL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", dlsch_config_pdu_1_1->PTRSTimeDensity, dlsch_config_pdu_1_1->PTRSFreqDensity); - } - } - - break; - } - - case NR_DL_DCI_FORMAT_2_0: - break; - - case NR_DL_DCI_FORMAT_2_1: - break; - - case NR_DL_DCI_FORMAT_2_2: - break; - - case NR_DL_DCI_FORMAT_2_3: - break; - - default: - break; - } - - - if(rnti == SI_RNTI){ - + if(rnti == SI_RNTI) { // }else if(rnti == mac->ra_rnti){ - - }else if(rnti == P_RNTI){ - - }else{ // c-rnti - - /// check if this is pdcch order + } else if(rnti == P_RNTI) { + } else { // c-rnti + /// check if this is pdcch order //dci->random_access_preamble_index; //dci->ss_pbch_index; //dci->prach_mask_index; - /// else normal DL-SCH grant } return ret; - } void set_harq_status(NR_UE_MAC_INST_t *mac, @@ -1281,9 +1279,7 @@ void set_harq_status(NR_UE_MAC_INST_t *mac, int N_CCE, frame_t frame, int slot) { - NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[harq_id]; - current_harq->active = true; current_harq->ack_received = false; current_harq->pucch_resource_indicator = pucch_id; @@ -1295,12 +1291,10 @@ void set_harq_status(NR_UE_MAC_INST_t *mac, // FIXME k0 != 0 currently not taken into consideration current_harq->dl_frame = frame; current_harq->dl_slot = slot; - } void update_harq_status(nr_downlink_indication_t *dl_info, int pdu_id) { - NR_UE_MAC_INST_t *mac = get_mac_inst(dl_info->module_id); uint8_t harq_pid = dl_info->rx_ind->rx_indication_body[pdu_id].pdsch_pdu.harq_pid; NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[harq_pid]; @@ -1308,8 +1302,7 @@ void update_harq_status(nr_downlink_indication_t *dl_info, int pdu_id) { if (current_harq->active) { current_harq->ack = dl_info->rx_ind->rx_indication_body[pdu_id].pdsch_pdu.ack_nack; current_harq->ack_received = true; - } - else { + } else { //shouldn't get here LOG_E(MAC, "Trying to process acknack for an inactive harq process (%d)\n", harq_pid); } @@ -1322,7 +1315,6 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch, fapi_nr_ul_config_pucch_pdu *pucch_pdu, int O_SR, int O_ACK, int O_CSI) { - int O_CRC = 0; //FIXME uint16_t O_uci = O_CSI + O_ACK; NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; @@ -1331,39 +1323,38 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, long *id0 = NULL; int scs; NR_BWP_UplinkCommon_t *initialUplinkBWP; + if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; + NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; + if (mac->cg && ubwp && mac->cg->spCellConfig && mac->cg->spCellConfig->spCellConfigDedicated && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) { scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; - } - else + } else scs = initialUplinkBWP->genericParameters.subcarrierSpacing; int subframe_number = slot / (nr_slots_per_frame[scs]/10); nb_pucch_format_4_in_subframes[subframe_number] = 0; - pucch_pdu->rnti = rnti; // configure pucch from Table 9.2.1-1 if (pucch->initial_pucch_id > -1 && pucch->pucch_resource == NULL) { - pucch_pdu->format_type = initial_pucch_resource[pucch->initial_pucch_id].format; pucch_pdu->start_symbol_index = initial_pucch_resource[pucch->initial_pucch_id].startingSymbolIndex; pucch_pdu->nr_of_symbols = initial_pucch_resource[pucch->initial_pucch_id].nrofSymbols; - pucch_pdu->bwp_size = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); pucch_pdu->bwp_start = NRRIV2PRBOFFSET(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - pucch_pdu->prb_size = 1; // format 0 or 1 int RB_BWP_offset; + if (pucch->initial_pucch_id == 15) RB_BWP_offset = pucch_pdu->bwp_size>>2; else @@ -1371,14 +1362,15 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, int N_CS = initial_pucch_resource[pucch->initial_pucch_id].nb_CS_indexes; pucch_pdu->prb_start = RB_BWP_offset + (pucch->initial_pucch_id/N_CS); + if (pucch->initial_pucch_id>>3 == 0) { pucch_pdu->second_hop_prb = pucch_pdu->bwp_size - 1 - RB_BWP_offset - (pucch->initial_pucch_id/N_CS); pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch->initial_pucch_id].initial_CS_indexes[pucch->initial_pucch_id%N_CS]; - } - else { + } else { pucch_pdu->second_hop_prb = pucch_pdu->bwp_size - 1 - RB_BWP_offset - ((pucch->initial_pucch_id - 8)/N_CS); pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch->initial_pucch_id].initial_CS_indexes[(pucch->initial_pucch_id - 8)%N_CS]; } + pucch_pdu->freq_hop_flag = 1; pucch_pdu->time_domain_occ_idx = 0; @@ -1387,8 +1379,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit[pucch->ack_payload & 0x1]; /* only harq of 1 bit */ else pucch_pdu->mcs = sequence_cyclic_shift_2_harq_ack_bits[pucch->ack_payload & 0x3]; /* only harq with 2 bits */ - } - else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ + } else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ if (pucch->sr_payload == 1) { /* positive scheduling request */ if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */ @@ -1401,29 +1392,27 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, // TODO verify if SR can be transmitted in this mode pucch_pdu->payload = (pucch->sr_payload << O_ACK) | pucch->ack_payload; - - } - else if (pucch->pucch_resource != NULL) { - + } else if (pucch->pucch_resource != NULL) { NR_PUCCH_Resource_t *pucchres = pucch->pucch_resource; if (mac->cg && mac->cg->physicalCellGroupConfig && (mac->cg->physicalCellGroupConfig->harq_ACK_SpatialBundlingPUCCH != NULL || - mac->cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook != 1)) { - LOG_E(PHY,"PUCCH Unsupported cell group configuration : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); + mac->cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook != 1)) { + LOG_E(PHY,"PUCCH Unsupported cell group configuration : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); return; - } - else if (mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup && - mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { - LOG_E(MAC,"PUCCH Unsupported code block group for serving cell config : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); + } else if (mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup && + mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { + LOG_E(MAC,"PUCCH Unsupported code block group for serving cell config : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); return; } + NR_PUCCH_Config_t *pucch_Config; + if (bwp_id>0 && mac->ULbwp[bwp_id-1] && mac->ULbwp[bwp_id-1]->bwp_Dedicated && @@ -1431,55 +1420,60 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) { NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup; pusch_id = pusch_Config->dataScramblingIdentityPUSCH; + if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0; else if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->transformPrecodingDisabled->scramblingID0; else *id0 = mac->physCellId; + pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup; pucch_pdu->bwp_size = NRRIV2BW(mac->ULbwp[bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth,MAX_BWP_SIZE); pucch_pdu->bwp_start = NRRIV2PRBOFFSET(mac->ULbwp[bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth,MAX_BWP_SIZE); - } - else if (bwp_id==0 && - mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { + } else if (bwp_id==0 && + mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; pucch_pdu->bwp_size = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth,MAX_BWP_SIZE); pucch_pdu->bwp_start = NRRIV2PRBOFFSET(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth,MAX_BWP_SIZE); - } - else AssertFatal(1==0,"no pucch_Config\n"); + } else AssertFatal(1==0,"no pucch_Config\n"); NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon; + if (mac->scc) pucch_ConfigCommon = mac->scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup; else pucch_ConfigCommon = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pucch_ConfigCommon->choice.setup; + if (pucch_ConfigCommon->hoppingId != NULL) pucch_pdu->hopping_id = *pucch_ConfigCommon->hoppingId; else pucch_pdu->hopping_id = mac->physCellId; - switch (pucch_ConfigCommon->pucch_GroupHopping){ + switch (pucch_ConfigCommon->pucch_GroupHopping) { case 0 : - // if neither, both disabled - pucch_pdu->group_hop_flag = 0; - pucch_pdu->sequence_hop_flag = 0; - break; - case 1 : - // if enable, group enabled - pucch_pdu->group_hop_flag = 1; - pucch_pdu->sequence_hop_flag = 0; - break; - case 2 : - // if disable, sequence disabled - pucch_pdu->group_hop_flag = 0; - pucch_pdu->sequence_hop_flag = 1; - break; - default: - AssertFatal(1==0,"Group hopping flag undefined (0,1,2) \n"); + // if neither, both disabled + pucch_pdu->group_hop_flag = 0; + pucch_pdu->sequence_hop_flag = 0; + break; + + case 1 : + // if enable, group enabled + pucch_pdu->group_hop_flag = 1; + pucch_pdu->sequence_hop_flag = 0; + break; + + case 2 : + // if disable, sequence disabled + pucch_pdu->group_hop_flag = 0; + pucch_pdu->sequence_hop_flag = 1; + break; + + default: + AssertFatal(1==0,"Group hopping flag undefined (0,1,2) \n"); } pucch_pdu->prb_start = pucchres->startingPRB; @@ -1488,9 +1482,10 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->prb_size = 1; // format 0 or 1 if ((O_SR+O_CSI+O_SR) > (sizeof(uint64_t)*8)) { - LOG_E(MAC,"PUCCH number of UCI bits exceeds payload size : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); + LOG_E(MAC,"PUCCH number of UCI bits exceeds payload size : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); return; } + pucch_pdu->payload = (pucch->csi_part1_payload << (O_ACK + O_SR)) | (pucch->sr_payload << O_ACK) | pucch->ack_payload; switch(pucchres->format.present) { @@ -1499,13 +1494,13 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->initial_cyclic_shift = pucchres->format.choice.format0->initialCyclicShift; pucch_pdu->nr_of_symbols = pucchres->format.choice.format0->nrofSymbols; pucch_pdu->start_symbol_index = pucchres->format.choice.format0->startingSymbolIndex; + if (O_SR == 0 || pucch->sr_payload == 0) { /* only ack is transmitted TS 36.213 9.2.3 UE procedure for reporting HARQ-ACK */ if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit[pucch->ack_payload & 0x1]; /* only harq of 1 bit */ else pucch_pdu->mcs = sequence_cyclic_shift_2_harq_ack_bits[pucch->ack_payload & 0x3]; /* only harq with 2 bits */ - } - else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ + } else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ if (pucch->sr_payload == 1) { /* positive scheduling request */ if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */ @@ -1515,7 +1510,9 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->mcs = 0; /* only positive SR */ } } + break; + case NR_PUCCH_Resource__format_PR_format1 : pucch_pdu->format_type = 1; pucch_pdu->initial_cyclic_shift = pucchres->format.choice.format1->initialCyclicShift; @@ -1523,6 +1520,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->start_symbol_index = pucchres->format.choice.format1->startingSymbolIndex; pucch_pdu->time_domain_occ_idx = pucchres->format.choice.format1->timeDomainOCC; break; + case NR_PUCCH_Resource__format_PR_format2 : pucch_pdu->format_type = 2; pucch_pdu->n_bit = O_uci+O_SR; @@ -1531,25 +1529,28 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId; pucch_pdu->dmrs_scrambling_id = id0!= NULL ? *id0 : mac->physCellId; pucch_pdu->prb_size = compute_pucch_prb_size(2,pucchres->format.choice.format2->nrofPRBs, - O_uci+O_SR,O_CSI,pucch_Config->format2->choice.setup->maxCodeRate, - 2,pucchres->format.choice.format2->nrofSymbols,8); + O_uci+O_SR,O_CSI,pucch_Config->format2->choice.setup->maxCodeRate, + 2,pucchres->format.choice.format2->nrofSymbols,8); break; + case NR_PUCCH_Resource__format_PR_format3 : pucch_pdu->format_type = 3; pucch_pdu->n_bit = O_uci+O_SR; pucch_pdu->nr_of_symbols = pucchres->format.choice.format3->nrofSymbols; pucch_pdu->start_symbol_index = pucchres->format.choice.format3->startingSymbolIndex; pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId; + if (pucch_Config->format3 == NULL) { pucch_pdu->pi_2bpsk = 0; pucch_pdu->add_dmrs_flag = 0; - } - else { + } else { pucchfmt = pucch_Config->format3->choice.setup; pucch_pdu->pi_2bpsk = pucchfmt->pi2BPSK!= NULL ? 1 : 0; pucch_pdu->add_dmrs_flag = pucchfmt->additionalDMRS!= NULL ? 1 : 0; } + int f3_dmrs_symbols; + if (pucchres->format.choice.format3->nrofSymbols==4) f3_dmrs_symbols = 1<freq_hop_flag; else { @@ -1558,10 +1559,12 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, else f3_dmrs_symbols = 2<add_dmrs_flag; } + pucch_pdu->prb_size = compute_pucch_prb_size(3,pucchres->format.choice.format3->nrofPRBs, - O_uci+O_SR,O_CSI,pucch_Config->format3->choice.setup->maxCodeRate, - 2-pucch_pdu->pi_2bpsk,pucchres->format.choice.format3->nrofSymbols-f3_dmrs_symbols,12); + O_uci+O_SR,O_CSI,pucch_Config->format3->choice.setup->maxCodeRate, + 2-pucch_pdu->pi_2bpsk,pucchres->format.choice.format3->nrofSymbols-f3_dmrs_symbols,12); break; + case NR_PUCCH_Resource__format_PR_format4 : pucch_pdu->format_type = 4; pucch_pdu->nr_of_symbols = pucchres->format.choice.format4->nrofSymbols; @@ -1569,30 +1572,33 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->pre_dft_occ_len = pucchres->format.choice.format4->occ_Length; pucch_pdu->pre_dft_occ_idx = pucchres->format.choice.format4->occ_Index; pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId; + if (pucch_Config->format3 == NULL) { pucch_pdu->pi_2bpsk = 0; pucch_pdu->add_dmrs_flag = 0; - } - else { + } else { pucchfmt = pucch_Config->format3->choice.setup; pucch_pdu->pi_2bpsk = pucchfmt->pi2BPSK!= NULL ? 1 : 0; pucch_pdu->add_dmrs_flag = pucchfmt->additionalDMRS!= NULL ? 1 : 0; } + break; + default : AssertFatal(1==0,"Undefined PUCCH format \n"); } + pucch_pdu->pucch_tx_power = get_pucch_tx_power_ue(mac, - pucch_Config, - pucch, - pucch_pdu->format_type, - pucch_pdu->prb_size, - pucch_pdu->freq_hop_flag, - pucch_pdu->add_dmrs_flag, - pucch_pdu->nr_of_symbols, - subframe_number, - O_ACK, O_SR, - O_CSI, O_CRC); + pucch_Config, + pucch, + pucch_pdu->format_type, + pucch_pdu->prb_size, + pucch_pdu->freq_hop_flag, + pucch_pdu->add_dmrs_flag, + pucch_pdu->nr_of_symbols, + subframe_number, + O_ACK, O_SR, + O_CSI, O_CRC); } } @@ -1608,9 +1614,9 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, int subframe_number, int O_ACK, int O_SR, int O_CSI, int O_CRC) { - int PUCCH_POWER_DEFAULT = 0; int16_t P_O_NOMINAL_PUCCH; + if (mac->scc) P_O_NOMINAL_PUCCH = *mac->scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal; else P_O_NOMINAL_PUCCH = *mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pucch_ConfigCommon->choice.setup->p0_nominal; @@ -1623,22 +1629,20 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, int16_t G_b_f_c = 0; if (pucch_Config->spatialRelationInfoToAddModList != NULL) { /* FFS TODO NR */ - LOG_D(MAC,"PUCCH Spatial relation infos are not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__); + LOG_D(MAC,"PUCCH Spatial relation infos are not yet implemented : at line %d in function %s of file %s \n", LINE_FILE, __func__, __FILE__); return (PUCCH_POWER_DEFAULT); } if (power_config->p0_Set != NULL) { P_O_UE_PUCCH = power_config->p0_Set->list.array[0]->p0_PUCCH_Value; /* get from index 0 if no spatial relation set */ G_b_f_c = 0; - } - else { + } else { G_b_f_c = pucch->delta_pucch; - LOG_D(MAC,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__); + LOG_D(MAC,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE, __func__, __FILE__); return (PUCCH_POWER_DEFAULT); } int P_O_PUCCH = P_O_NOMINAL_PUCCH + P_O_UE_PUCCH; - int16_t delta_F_PUCCH; int DELTA_TF; uint16_t N_ref_PUCCH; @@ -1651,11 +1655,13 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH); delta_F_PUCCH = *power_config->deltaF_PUCCH_f0; break; + case 1: N_ref_PUCCH = 14; DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH); delta_F_PUCCH = *power_config->deltaF_PUCCH_f1; break; + case 2: N_sc_ctrl_RB = 10; DELTA_TF = get_deltatf(nb_of_prbs, @@ -1668,6 +1674,7 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, O_CSI, O_CRC); delta_F_PUCCH = *power_config->deltaF_PUCCH_f2; break; + case 3: N_sc_ctrl_RB = 14; DELTA_TF = get_deltatf(nb_of_prbs, @@ -1680,6 +1687,7 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, O_CSI, O_CRC); delta_F_PUCCH = *power_config->deltaF_PUCCH_f3; break; + case 4: N_sc_ctrl_RB = 14/(nb_pucch_format_4_in_subframes[subframe_number]); DELTA_TF = get_deltatf(nb_of_prbs, @@ -1692,23 +1700,21 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, O_CSI, O_CRC); delta_F_PUCCH = *power_config->deltaF_PUCCH_f4; break; - default: - { - LOG_E(MAC,"PUCCH unknown pucch format : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__); + + default: { + LOG_E(MAC,"PUCCH unknown pucch format : at line %d in function %s of file %s \n", LINE_FILE, __func__, __FILE__); return (0); } } if (*power_config->twoPUCCH_PC_AdjustmentStates > 1) { - LOG_E(MAC,"PUCCH power control adjustment states with 2 states not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__); + LOG_E(MAC,"PUCCH power control adjustment states with 2 states not yet implemented : at line %d in function %s of file %s \n", LINE_FILE, __func__, __FILE__); return (PUCCH_POWER_DEFAULT); } int16_t pucch_power = P_O_PUCCH + delta_F_PUCCH + DELTA_TF + G_b_f_c; - NR_TST_PHY_PRINTF("PUCCH ( Tx power : %d dBm ) ( 10Log(...) : %d ) ( from Path Loss : %d ) ( delta_F_PUCCH : %d ) ( DELTA_TF : %d ) ( G_b_f_c : %d ) \n", pucch_power, contributor, PL, delta_F_PUCCH, DELTA_TF, G_b_f_c); - return (pucch_power); } @@ -1719,13 +1725,13 @@ int get_deltatf(uint16_t nb_of_prbs, int N_sc_ctrl_RB, int n_HARQ_ACK, int O_ACK, int O_SR, - int O_CSI, int O_CRC){ - + int O_CSI, int O_CRC) { int DELTA_TF; int O_UCI = O_ACK + O_SR + O_CSI + O_CRC; int N_symb = nb_symbols_excluding_dmrs[N_symb_PUCCH-4][add_dmrs_flag][freq_hop_flag]; float N_RE = nb_of_prbs * N_sc_ctrl_RB * N_symb; float K1 = 6; + if (O_UCI < 12) DELTA_TF = 10 * log10((double)(((K1 * (n_HARQ_ACK + O_SR + O_CSI))/N_RE))); else { @@ -1733,6 +1739,7 @@ int get_deltatf(uint16_t nb_of_prbs, float BPRE = O_UCI/N_RE; DELTA_TF = 10 * log10((double)(pow(2,(K2*BPRE)) - 1)); } + return DELTA_TF; } @@ -1787,18 +1794,17 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) { pucch_resource_set_id = 0; return (pucch_resource_set_id); break; - } - else { + } else { pucch_resource_set_id = 1; return (pucch_resource_set_id); break; } } + pucch_resource_set_id++; } pucch_resource_set_id = MAX_NB_OF_PUCCH_RESOURCE_SETS; - return (pucch_resource_set_id); } @@ -1822,7 +1828,6 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) { void select_pucch_resource(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch) { - NR_PUCCH_ResourceId_t *current_resource_id = NULL; NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; int n_list; @@ -1845,48 +1850,53 @@ void select_pucch_resource(NR_UE_MAC_INST_t *mac, mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[0] == NULL) - ){ - + ) { /* see TS 38.213 9.2.1 PUCCH Resource Sets */ int delta_PRI = pucch->resource_indicator; int n_CCE_0 = pucch->n_CCE; int N_CCE_0 = pucch->N_CCE; + if (N_CCE_0 == 0) { - AssertFatal(1==0,"PUCCH No compatible pucch format found : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); + AssertFatal(1==0,"PUCCH No compatible pucch format found : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); } + int r_PUCCH = ((2 * n_CCE_0)/N_CCE_0) + (2 * delta_PRI); pucch->initial_pucch_id = r_PUCCH; pucch->pucch_resource = NULL; - } - else { + } else { struct NR_PUCCH_Config__resourceSetToAddModList *resourceSetToAddModList = NULL; struct NR_PUCCH_Config__resourceToAddModList *resourceToAddModList = NULL; + if (bwp_id > 0 && mac->ULbwp[bwp_id-1]) { AssertFatal(mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList!=NULL, "mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList is null\n"); resourceSetToAddModList = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList; resourceToAddModList = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceToAddModList; - } - else if (bwp_id == 0 && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList!=NULL) { + } else if (bwp_id == 0 && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList!=NULL) { resourceSetToAddModList = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList; resourceToAddModList = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceToAddModList; } n_list = resourceSetToAddModList->list.count; + if (pucch->resource_set_id > n_list) { LOG_E(MAC,"Invalid PUCCH resource set id %d\n",pucch->resource_set_id); pucch->pucch_resource = NULL; return; } + n_list = resourceSetToAddModList->list.array[pucch->resource_set_id]->resourceList.list.count; + if (pucch->resource_indicator > n_list) { LOG_E(MAC,"Invalid PUCCH resource id %d\n",pucch->resource_indicator); pucch->pucch_resource = NULL; return; } + current_resource_id = resourceSetToAddModList->list.array[pucch->resource_set_id]->resourceList.list.array[pucch->resource_indicator]; n_list = resourceToAddModList->list.count; int res_found = 0; + for (int i=0; ilist.array[i]->pucch_ResourceId == *current_resource_id) { pucch->pucch_resource = resourceToAddModList->list.array[i]; @@ -1894,6 +1904,7 @@ void select_pucch_resource(NR_UE_MAC_INST_t *mac, break; } } + if (res_found == 0) { LOG_E(MAC,"Couldn't find PUCCH Resource\n"); pucch->pucch_resource = NULL; @@ -1932,8 +1943,6 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, PUCCH_sched_t *pucch) { - - uint32_t ack_data[NR_DL_MAX_NB_CW][NR_DL_MAX_DAI] = {{0},{0}}; uint32_t dai[NR_DL_MAX_NB_CW][NR_DL_MAX_DAI] = {{0},{0}}; /* for serving cell */ uint32_t dai_total[NR_DL_MAX_NB_CW][NR_DL_MAX_DAI] = {{0},{0}}; /* for multiple cells */ @@ -1948,8 +1957,10 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, NR_UE_HARQ_STATUS_t *current_harq; int sched_frame,sched_slot; NR_BWP_UplinkCommon_t *initialUplinkBWP; + if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; + int slots_per_frame,scs; if (mac->DLbwp[0] && @@ -1959,68 +1970,63 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI[0] == 2) { two_transport_blocks = TRUE; number_of_code_word = 2; - } - else { + } else { number_of_code_word = 1; } NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; + if (mac->cg && ubwp && mac->cg->spCellConfig && mac->cg->spCellConfig->spCellConfigDedicated && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) { scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; - } - else + } else scs = initialUplinkBWP->genericParameters.subcarrierSpacing; slots_per_frame = nr_slots_per_frame[scs]; /* look for dl acknowledgment which should be done on current uplink slot */ for (int code_word = 0; code_word < number_of_code_word; code_word++) { - for (int dl_harq_pid = 0; dl_harq_pid < 16; dl_harq_pid++) { - current_harq = &mac->dl_harq_info[dl_harq_pid]; if (current_harq->active) { - sched_slot = current_harq->dl_slot + current_harq->feedback_to_ul; sched_frame = current_harq->dl_frame; - if (sched_slot>=slots_per_frame){ + + if (sched_slot>=slots_per_frame) { sched_slot %= slots_per_frame; sched_frame++; } /* check if current tx slot should transmit downlink acknowlegment */ if (sched_frame == frame && sched_slot == slot) { - if (current_harq->dai > NR_DL_MAX_DAI) { - LOG_E(MAC,"PUCCH Downlink DAI has an invalid value : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); - } - else { - + LOG_E(MAC,"PUCCH Downlink DAI has an invalid value : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); + } else { if ((pucch->resource_indicator != -1) && (pucch->resource_indicator != current_harq->pucch_resource_indicator)) LOG_E(MAC, "Value of pucch_resource_indicator %d not matching with what set before %d (Possibly due to a false DCI) \n", current_harq->pucch_resource_indicator,pucch->resource_indicator); - else{ + else { dai_current = current_harq->dai+1; // DCI DAI to counter DAI conversion if (dai_current == 0) { - LOG_E(MAC,"PUCCH Downlink dai is invalid : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); + LOG_E(MAC,"PUCCH Downlink dai is invalid : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); return(0); } else if (dai_current > dai_max) { dai_max = dai_current; } number_harq_feedback++; + if (current_harq->ack_received) ack_data[code_word][dai_current - 1] = current_harq->ack; else ack_data[code_word][dai_current - 1] = 0; - dai[code_word][dai_current - 1] = dai_current; + dai[code_word][dai_current - 1] = dai_current; pucch->resource_indicator = current_harq->pucch_resource_indicator; pucch->n_CCE = current_harq->n_CCE; pucch->N_CCE = current_harq->N_CCE; @@ -2038,9 +2044,8 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, if (number_harq_feedback == 0) { pucch->n_HARQ_ACK = 0; return(0); - } - else if (number_harq_feedback > (sizeof(uint32_t)*8)) { - LOG_E(MAC,"PUCCH number of ack bits exceeds payload size : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); + } else if (number_harq_feedback > (sizeof(uint32_t)*8)) { + LOG_E(MAC,"PUCCH number of ack bits exceeds payload size : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); return(0); } @@ -2049,6 +2054,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, U_DAI_c = number_harq_feedback/number_of_code_word; N_m_c_rx = number_harq_feedback; int N_SPS_c = 0; /* FFS TODO_NR multicells and SPS are not supported at the moment */ + if (mac->cg != NULL && mac->cg->physicalCellGroupConfig != NULL && mac->cg->physicalCellGroupConfig->harq_ACK_SpatialBundlingPUCCH != NULL) { @@ -2072,6 +2078,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ack_data[code_word][i] = 0; /* nack data transport block which has been missed */ number_harq_feedback++; } + if (two_transport_blocks == TRUE) { dai_total[code_word][i] = dai[code_word][i]; /* for a single cell, dai_total is the same as dai of first cell */ } @@ -2088,7 +2095,6 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, int O_bit_number_cw1 = 0; for (int m = 0; m < M ; m++) { - if (dai[0][m] <= V_temp) { j = j + 1; } @@ -2105,8 +2111,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, if (two_transport_blocks == TRUE) { O_bit_number_cw0 = (8 * j) + 2*(V_temp - 1); - } - else { + } else { O_bit_number_cw0 = (4 * j) + (V_temp - 1); } @@ -2119,32 +2124,30 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, if (two_transport_blocks == TRUE) { O_ACK = 2 * ( 4 * j + V_temp2); /* for two transport blocks */ - } - else { + } else { O_ACK = 4 * j + V_temp2; /* only one transport block */ } if (number_harq_feedback != O_ACK) { - LOG_E(MAC,"PUCCH Error for number of bits for acknowledgment : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); + LOG_E(MAC,"PUCCH Error for number of bits for acknowledgment : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); return (0); } pucch->ack_payload = o_ACK; - return(number_harq_feedback); } bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, - PUCCH_sched_t *pucch, - frame_t frame, - int slot) { - + PUCCH_sched_t *pucch, + frame_t frame, + int slot) { NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; NR_PUCCH_Config_t *pucch_Config = NULL; int scs; NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; NR_BWP_UplinkCommon_t *initialUplinkBWP; + if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; @@ -2154,8 +2157,7 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) { scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; - } - else + } else scs = initialUplinkBWP->genericParameters.subcarrierSpacing; const int n_slots_frame = nr_slots_per_frame[scs]; @@ -2166,52 +2168,55 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) { pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup; - } - else if (bwp_id==0 && - mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { + } else if (bwp_id==0 && + mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; } + if(!pucch_Config || pucch_Config->schedulingRequestResourceToAddModList->list.count==0) return false; // SR not configured - for (int SR_resource_id =0; SR_resource_id < pucch_Config->schedulingRequestResourceToAddModList->list.count;SR_resource_id++) { + for (int SR_resource_id =0; SR_resource_id < pucch_Config->schedulingRequestResourceToAddModList->list.count; SR_resource_id++) { NR_SchedulingRequestResourceConfig_t *SchedulingRequestResourceConfig = pucch_Config->schedulingRequestResourceToAddModList->list.array[SR_resource_id]; - int SR_period; int SR_offset; - + int SR_period; + int SR_offset; find_period_offest_SR(SchedulingRequestResourceConfig,&SR_period,&SR_offset); int sfn_sf = frame * n_slots_frame + slot; if ((sfn_sf - SR_offset) % SR_period == 0) { LOG_D(MAC, "Scheduling Request active in frame %d slot %d \n", frame, slot); NR_PUCCH_ResourceId_t *PucchResourceId = SchedulingRequestResourceConfig->resource; - int found = -1; NR_PUCCH_ResourceSet_t *pucchresset = pucch_Config->resourceSetToAddModList->list.array[0]; // set with formats 0,1 int n_list = pucchresset->resourceList.list.count; - for (int i=0; iresourceList.list.array[i] == *PucchResourceId ) { found = i; break; } } + if (found == -1) { LOG_E(MAC,"Couldn't find PUCCH resource for SR\n"); return false; } + pucch->resource_indicator = found; return true; } } + return false; } -int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ +int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot) { // no UL-SCH resources available for this tti && UE has a valid PUCCH resources for SR configuration for this tti DevCheck(module_idP < (int) NB_UE_INST, module_idP, NB_NR_UE_MAC_INST, 0); NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); @@ -2222,36 +2227,38 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ mac->scheduling_info.SR_COUNTER, (1 << (2 + -// mac-> -// physicalConfigDedicated->schedulingRequestConfig->choice. -// setup.dsr_TransMax)), + // mac-> + // physicalConfigDedicated->schedulingRequestConfig->choice. + // setup.dsr_TransMax)), dsr_TransMax)), mac->scheduling_info.SR_pending); // todo -/* - if ((mac->scheduling_info.sr_ProhibitTimer_Running == 0)) { - mac->scheduling_info.SR_pending = 1; - LOG_D(NR_MAC, - "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n", - module_idP, frameP, slot, - mac->scheduling_info.SR_COUNTER, - (1 << - (2 + -// mac-> -// physicalConfigDedicated->schedulingRequestConfig->choice. -// setup.dsr_TransMax)), - dsr_TransMax)), - mac->scheduling_info.SR_pending); // todo - return (0); - } -*/ // todo + + /* + if ((mac->scheduling_info.sr_ProhibitTimer_Running == 0)) { + mac->scheduling_info.SR_pending = 1; + LOG_D(NR_MAC, + "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n", + module_idP, frameP, slot, + mac->scheduling_info.SR_COUNTER, + (1 << + (2 + + // mac-> + // physicalConfigDedicated->schedulingRequestConfig->choice. + // setup.dsr_TransMax)), + dsr_TransMax)), + mac->scheduling_info.SR_pending); // todo + return (0); + } + */ // todo + if ((mac->scheduling_info.SR_pending == 1) && (mac->scheduling_info.SR_COUNTER < (1 << (2 + //mac-> //physicalConfigDedicated->schedulingRequestConfig->choice.setup. - //dsr_TransMax)))) { - dsr_TransMax)))) { + //dsr_TransMax)))) { + dsr_TransMax)))) { LOG_D(NR_MAC, "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n", module_idP, frameP, slot, @@ -2274,6 +2281,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ mac->scheduling_info. sr_ProhibitTimer_Running = 0; } + //mac->ul_active =1; return (1); //instruct phy to signal SR } else { @@ -2300,28 +2308,26 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, PUCCH_sched_t *pucch) { - NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; NR_PUCCH_Config_t *pucch_Config = NULL; int csi_bits = 0; if(mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig) { - + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig) { NR_CSI_MeasConfig_t *csi_measconfig = mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup; - for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){ + for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++) { NR_CSI_ReportConfig_t *csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id]; - if(csirep->reportConfigType.present == NR_CSI_ReportConfig__reportConfigType_PR_periodic){ + if(csirep->reportConfigType.present == NR_CSI_ReportConfig__reportConfigType_PR_periodic) { int period, offset; csi_period_offset(csirep, NULL, &period, &offset); - int scs; NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; NR_BWP_UplinkCommon_t *initialUplinkBWP; + if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; @@ -2338,38 +2344,36 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac, mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) { pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup; - } - else if (bwp_id==0 && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { + } else if (bwp_id==0 && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; } const int n_slots_frame = nr_slots_per_frame[scs]; - if (((n_slots_frame*frame + slot - offset)%period) == 0 && pucch_Config) { + if (((n_slots_frame*frame + slot - offset)%period) == 0 && pucch_Config) { NR_PUCCH_CSI_Resource_t *pucchcsires = csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list.array[0]; NR_PUCCH_ResourceSet_t *pucchresset = pucch_Config->resourceSetToAddModList->list.array[1]; // set with formats >1 int n = pucchresset->resourceList.list.count; - int res_index; int found = -1; + for (res_index = 0; res_index < n; res_index++) { if (*pucchresset->resourceList.list.array[res_index] == pucchcsires->pucch_Resource) { found = res_index; break; } } + AssertFatal(found != -1, "CSI resource not found among PUCCH resources\n"); - pucch->resource_indicator = found; csi_bits = nr_get_csi_payload(mac, pucch, csi_measconfig); } - } - else + } else AssertFatal(1==0,"Only periodic CSI reporting is currently implemented\n"); } } @@ -2381,20 +2385,21 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac, uint8_t nr_get_csi_payload(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch, NR_CSI_MeasConfig_t *csi_MeasConfig) { - int n_csi_bits = 0; - AssertFatal(csi_MeasConfig->csi_ReportConfigToAddModList->list.count>0,"No CSI Report configuration available\n"); - for (int csi_report_id=0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){ + for (int csi_report_id=0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++) { struct NR_CSI_ReportConfig *csi_reportconfig = csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id]; NR_CSI_ResourceConfigId_t csi_ResourceConfigId = csi_reportconfig->resourcesForChannelMeasurement; + switch(csi_reportconfig->reportQuantity.present) { case NR_CSI_ReportConfig__reportQuantity_PR_none: break; + case NR_CSI_ReportConfig__reportQuantity_PR_ssb_Index_RSRP: n_csi_bits += get_ssb_rsrp_payload(mac,pucch,csi_reportconfig,csi_ResourceConfigId,csi_MeasConfig); break; + case NR_CSI_ReportConfig__reportQuantity_PR_cri_RSRP: case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_PMI_CQI: case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_i1: @@ -2402,10 +2407,12 @@ uint8_t nr_get_csi_payload(NR_UE_MAC_INST_t *mac, case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_CQI: case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_LI_PMI_CQI: AssertFatal(1==0,"Measurement report based on CSI-RS not availalble\n"); + default: AssertFatal(1==0,"Invalid CSI report quantity type %d\n",csi_reportconfig->reportQuantity.present); } } + return (n_csi_bits); } @@ -2415,7 +2422,6 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, struct NR_CSI_ReportConfig *csi_reportconfig, NR_CSI_ResourceConfigId_t csi_ResourceConfigId, NR_CSI_MeasConfig_t *csi_MeasConfig) { - int nb_ssb = 0; // nb of ssb in the resource int nb_meas = 0; // nb of ssb to report measurements on int bits = 0; @@ -2423,8 +2429,8 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, for (int csi_resourceidx = 0; csi_resourceidx < csi_MeasConfig->csi_ResourceConfigToAddModList->list.count; csi_resourceidx++) { struct NR_CSI_ResourceConfig *csi_resourceconfig = csi_MeasConfig->csi_ResourceConfigToAddModList->list.array[csi_resourceidx]; - if (csi_resourceconfig->csi_ResourceConfigId == csi_ResourceConfigId) { + if (csi_resourceconfig->csi_ResourceConfigId == csi_ResourceConfigId) { if (csi_reportconfig->groupBasedBeamReporting.present == NR_CSI_ReportConfig__groupBasedBeamReporting_PR_disabled) { if (csi_reportconfig->groupBasedBeamReporting.choice.disabled->nrofReportedRS != NULL) nb_meas = *(csi_reportconfig->groupBasedBeamReporting.choice.disabled->nrofReportedRS)+1; @@ -2435,8 +2441,7 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, for (int csi_ssb_idx = 0; csi_ssb_idx < csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.count; csi_ssb_idx++) { if (csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.array[csi_ssb_idx]->csi_SSB_ResourceSetId == - *(csi_resourceconfig->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->csi_SSB_ResourceSetList->list.array[0])){ - + *(csi_resourceconfig->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->csi_SSB_ResourceSetList->list.array[0])) { ///only one SSB resource set from spec 38.331 IE CSI-ResourceConfig nb_ssb = csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.array[csi_ssb_idx]->csi_SSB_ResourceList.list.count; break; @@ -2451,11 +2456,9 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, LOG_E(MAC, "In current implementation only the SSB of synchronization is measured at PHY. This works only for a single SSB scenario\n"); int ssb_rsrp[2][nb_meas]; // the array contains index and RSRP of each SSB to be reported (nb_meas highest RSRPs) - //TODO replace the following 2 lines with a function to order the nb_meas highest SSB RSRPs ssb_rsrp[0][0] = mac->mib_ssb; ssb_rsrp[1][0] = mac->ssb_rsrp_dBm; - uint8_t ssbi; if (ssbri_bits > 0) { @@ -2471,20 +2474,21 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, bits += 7; // 7 bits for highest RSRP // from the second SSB, differential report - for (int i=1; icsi_part1_payload = temp_payload; return bits; } @@ -2494,10 +2498,11 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, // according to Table 10.1.6.1-1 in 38.133 uint8_t get_rsrp_index(int rsrp) { - int index = rsrp + 157; + if (rsrp>-44) index = 113; + if (rsrp<-140) index = 16; @@ -2508,47 +2513,46 @@ uint8_t get_rsrp_index(int rsrp) { // returns index from differential RSRP // according to Table 10.1.6.1-2 in 38.133 uint8_t get_rsrp_diff_index(int best_rsrp,int current_rsrp) { - int diff = best_rsrp-current_rsrp; + if (diff>30) return 15; else return (diff>>1); - } -void nr_ue_send_sdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id){ - +void nr_ue_send_sdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id) { VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_SDU, VCD_FUNCTION_IN); - LOG_D(MAC, "In %s [%d.%d] Handling DLSCH PDU...\n", __FUNCTION__, dl_info->frame, dl_info->slot); // Processing MAC PDU // it parses MAC CEs subheaders, MAC CEs, SDU subheaderds and SDUs - switch (dl_info->rx_ind->rx_indication_body[pdu_id].pdu_type){ + switch (dl_info->rx_ind->rx_indication_body[pdu_id].pdu_type) { case FAPI_NR_RX_PDU_TYPE_DLSCH: - nr_ue_process_mac_pdu(dl_info, ul_time_alignment, pdu_id); - break; + nr_ue_process_mac_pdu(dl_info, ul_time_alignment, pdu_id); + break; + case FAPI_NR_RX_PDU_TYPE_RAR: - nr_ue_process_rar(dl_info, ul_time_alignment, pdu_id); - break; + nr_ue_process_rar(dl_info, ul_time_alignment, pdu_id); + break; + default: - break; + break; } VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_SDU, VCD_FUNCTION_OUT); - } // N_RB configuration according to 7.3.1.0 (DCI size alignment) of TS 38.212 -int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){ - +int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type) { int N_RB = 0, start_RB; + switch(rnti_type) { case NR_RNTI_RA: case NR_RNTI_TC: case NR_RNTI_P: { NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id; + if (mac->DLbwp[dl_bwp_id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero) { uint8_t coreset_id = 0; // assuming controlResourceSetId is 0 for controlResourceSetZero NR_ControlResourceSet_t *coreset = mac->coreset[dl_bwp_id-1][coreset_id]; @@ -2556,17 +2560,20 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){ } else { N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); } + break; } + case NR_RNTI_SI: N_RB = mac->type0_PDCCH_CSS_config.num_rbs; break; + case NR_RNTI_C: N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); break; } - return N_RB; + return N_RB; } uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, @@ -2575,14 +2582,12 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, uint16_t rnti, uint64_t *dci_pdu, dci_pdu_rel15_t *dci_pdu_rel15) { - int N_RB = 0; int pos = 0; int fsize = 0; - int rnti_type = get_rnti_type(mac, rnti); - int N_RB_UL = 0; + if(mac->scc_SIB) { N_RB_UL = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); } else if(mac->ULbwp[0]) { @@ -2592,666 +2597,615 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, } LOG_D(MAC,"nr_extract_dci_info : dci_pdu %lx, size %d\n",*dci_pdu,dci_size); + switch(dci_format) { + case NR_DL_DCI_FORMAT_1_0: + switch(rnti_type) { + case NR_RNTI_RA: + if(mac->scc_SIB) { + N_RB = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + } else { + N_RB = get_n_rb(mac, rnti_type); + } - case NR_DL_DCI_FORMAT_1_0: - switch(rnti_type) { - case NR_RNTI_RA: - if(mac->scc_SIB) { - N_RB = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - } else { - N_RB = get_n_rb(mac, rnti_type); - } - // Freq domain assignment - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - pos=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = *dci_pdu>>(dci_size-pos)&((1<>1 ) ); + pos=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = *dci_pdu>>(dci_size-pos)&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,N_RB,dci_size-pos,*dci_pdu); + LOG_D(MAC,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,N_RB,dci_size-pos,*dci_pdu); #endif - // Time domain assignment - pos+=4; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu >> (dci_size-pos))&0xf; + // Time domain assignment + pos+=4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu >> (dci_size-pos))&0xf; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); + LOG_D(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); #endif - // VRB to PRB mapping - - pos++; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; + // VRB to PRB mapping + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,dci_size-pos,*dci_pdu); + LOG_D(MAC,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,dci_size-pos,*dci_pdu); #endif - // MCS - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + // MCS + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); + LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); #endif - // TB scaling - pos+=2; - dci_pdu_rel15->tb_scaling = (*dci_pdu>>(dci_size-pos))&0x3; + // TB scaling + pos+=2; + dci_pdu_rel15->tb_scaling = (*dci_pdu>>(dci_size-pos))&0x3; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu); + LOG_D(MAC,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu); #endif - break; + break; - case NR_RNTI_C: + case NR_RNTI_C: + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + //switch to DCI_0_0 + if (dci_pdu_rel15->format_indicator == 0) { + dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; + return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); + } - //switch to DCI_0_0 - if (dci_pdu_rel15->format_indicator == 0) { - dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; - return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); - } #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu); + LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu); #endif - // check BWP id - if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + // check BWP id + if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - // Freq domain assignment (275rb >> fsize = 16) - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<> fsize = 16) + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); + LOG_D(MAC,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); #endif - - uint16_t is_ra = 1; - for (int i=0; ifrequency_domain_assignment.val>>i)&1)) { - is_ra = 0; - break; - } - if (is_ra) //fsize are all 1 38.212 p86 - { - // ra_preamble_index 6 bits - pos+=6; - dci_pdu_rel15->ra_preamble_index = (*dci_pdu>>(dci_size-pos))&0x3f; - - // UL/SUL indicator 1 bit - pos++; - dci_pdu_rel15->ul_sul_indicator.val = (*dci_pdu>>(dci_size-pos))&1; - - // SS/PBCH index 6 bits - pos+=6; - dci_pdu_rel15->ss_pbch_index = (*dci_pdu>>(dci_size-pos))&0x3f; - - // prach_mask_index 4 bits - pos+=4; - dci_pdu_rel15->prach_mask_index = (*dci_pdu>>(dci_size-pos))&0xf; - - } //end if - else { - - // Time domain assignment 4bit - - pos+=4; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; + uint16_t is_ra = 1; + + for (int i=0; ifrequency_domain_assignment.val>>i)&1)) { + is_ra = 0; + break; + } + + if (is_ra) { //fsize are all 1 38.212 p86 + // ra_preamble_index 6 bits + pos+=6; + dci_pdu_rel15->ra_preamble_index = (*dci_pdu>>(dci_size-pos))&0x3f; + // UL/SUL indicator 1 bit + pos++; + dci_pdu_rel15->ul_sul_indicator.val = (*dci_pdu>>(dci_size-pos))&1; + // SS/PBCH index 6 bits + pos+=6; + dci_pdu_rel15->ss_pbch_index = (*dci_pdu>>(dci_size-pos))&0x3f; + // prach_mask_index 4 bits + pos+=4; + dci_pdu_rel15->prach_mask_index = (*dci_pdu>>(dci_size-pos))&0xf; + } //end if + else { + // Time domain assignment 4bit + pos+=4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,4,dci_size-pos,*dci_pdu); + LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,4,dci_size-pos,*dci_pdu); #endif - - // VRB to PRB mapping 1bit - pos++; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; + // VRB to PRB mapping 1bit + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,1,dci_size-pos,*dci_pdu); + LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,1,dci_size-pos,*dci_pdu); #endif - - // MCS 5bit //bit over 32, so dci_pdu ++ - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + // MCS 5bit //bit over 32, so dci_pdu ++ + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu); + LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu); #endif - - // New data indicator 1bit - pos++; - dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; + // New data indicator 1bit + pos++; + dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); -#endif - - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); + LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); #endif - - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); + LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); #endif - - // Downlink assignment index 2bit - pos+=2; - dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,2,dci_size-pos,*dci_pdu); + LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); #endif - - // TPC command for scheduled PUCCH 2bit - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; + // Downlink assignment index 2bit + pos+=2; + dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); + LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,2,dci_size-pos,*dci_pdu); #endif - - // PUCCH resource indicator 3bit - pos+=3; - dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x7; + // TPC command for scheduled PUCCH 2bit + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu); + LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); #endif - - // PDSCH-to-HARQ_feedback timing indicator 3bit - pos+=3; - dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&0x7; + // PUCCH resource indicator 3bit + pos+=3; + dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x7; #ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,3,dci_size-pos,*dci_pdu); + LOG_D(MAC,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu); #endif - - } //end else - break; + // PDSCH-to-HARQ_feedback timing indicator 3bit + pos+=3; + dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&0x7; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,3,dci_size-pos,*dci_pdu); +#endif + } //end else - case NR_RNTI_P: - /* - // Short Messages Indicator  E2 bits - for (int i=0; i<2; i++) - dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_size-pos++); - // Short Messages  E8 bits - for (int i=0; i<8; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages>>(7-i))&1)<<(dci_size-pos++); - // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++); - // Time domain assignment 4 bit - for (int i=0; i<4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++); - // VRB to PRB mapping 1 bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); - // MCS 5 bit - for (int i=0; i<5; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); - - // TB scaling 2 bit - for (int i=0; i<2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_size-pos++); - */ - - break; - - case NR_RNTI_SI: - N_RB = mac->type0_PDCCH_CSS_config.num_rbs; - // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; + case NR_RNTI_P: + /* + // Short Messages Indicator  E2 bits + for (int i=0; i<2; i++) + dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_size-pos++); + // Short Messages  E8 bits + for (int i=0; i<8; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages>>(7-i))&1)<<(dci_size-pos++); + // Freq domain assignment 0-16 bit + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++); + // Time domain assignment 4 bit + for (int i=0; i<4; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++); + // VRB to PRB mapping 1 bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); + // MCS 5 bit + for (int i=0; i<5; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); - // VRB to PRB mapping 1 bit - pos++; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; + // TB scaling 2 bit + for (int i=0; i<2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_size-pos++); + */ + break; - // MCS 5bit //bit over 32, so dci_pdu ++ - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + case NR_RNTI_SI: + N_RB = mac->type0_PDCCH_CSS_config.num_rbs; + // Freq domain assignment 0-16 bit + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; + // VRB to PRB mapping 1 bit + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; + // MCS 5bit //bit over 32, so dci_pdu ++ + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + // Redundancy version 2 bit + pos+=2; + dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; + // System information indicator 1 bit + pos++; + dci_pdu_rel15->system_info_indicator = (*dci_pdu>>(dci_size-pos))&0x1; + LOG_D(MAC,"N_RB = %i\n", N_RB); + LOG_D(MAC,"dci_size = %i\n", dci_size); + LOG_D(MAC,"fsize = %i\n", fsize); + LOG_D(MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(MAC,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); + break; - // Redundancy version 2 bit - pos+=2; - dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; + case NR_RNTI_TC: - // System information indicator 1 bit - pos++; - dci_pdu_rel15->system_info_indicator = (*dci_pdu>>(dci_size-pos))&0x1; + // check BWP id + if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - LOG_D(MAC,"N_RB = %i\n", N_RB); - LOG_D(MAC,"dci_size = %i\n", dci_size); - LOG_D(MAC,"fsize = %i\n", fsize); - LOG_D(MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); - LOG_D(MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); - LOG_D(MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); - LOG_D(MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); - LOG_D(MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(MAC,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); + // indicating a DL DCI format 1bit + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; - break; - - case NR_RNTI_TC: + //switch to DCI_0_0 + if (dci_pdu_rel15->format_indicator == 0) { + dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; + return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); + } - // check BWP id - if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + if (dci_pdu_rel15->format_indicator == 0) + return 1; // discard dci, format indicator not corresponding to dci_format - // indicating a DL DCI format 1bit - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; - - //switch to DCI_0_0 - if (dci_pdu_rel15->format_indicator == 0) { - dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; - return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); + // Freq domain assignment 0-16 bit + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; + // VRB to PRB mapping - 1 bit + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; + // MCS 5bit //bit over 32, so dci_pdu ++ + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + // New data indicator - 1 bit + pos++; + dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; + // Redundancy version - 2 bits + pos+=2; + dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; + // HARQ process number - 4 bits + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; + // Downlink assignment index - 2 bits + pos+=2; + dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; + // TPC command for scheduled PUCCH - 2 bits + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; + // PUCCH resource indicator - 3 bits + pos+=3; + dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&7; + // PDSCH-to-HARQ_feedback timing indicator - 3 bits + pos+=3; + dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7; + LOG_D(NR_MAC,"N_RB = %i\n", N_RB); + LOG_D(NR_MAC,"dci_size = %i\n", dci_size); + LOG_D(NR_MAC,"fsize = %i\n", fsize); + LOG_D(NR_MAC,"dci_pdu_rel15->format_indicator = %i\n", dci_pdu_rel15->format_indicator); + LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(NR_MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC,"dci_pdu_rel15->dai[0].val = %i\n", dci_pdu_rel15->dai[0].val); + LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); + LOG_D(NR_MAC,"dci_pdu_rel15->pucch_resource_indicator = %i\n", dci_pdu_rel15->pucch_resource_indicator); + LOG_D(NR_MAC,"dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = %i\n", dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val); + break; } - if (dci_pdu_rel15->format_indicator == 0) - return 1; // discard dci, format indicator not corresponding to dci_format - - // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; - - // VRB to PRB mapping - 1 bit - pos++; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; - - // MCS 5bit //bit over 32, so dci_pdu ++ - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; - - // New data indicator - 1 bit - pos++; - dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; - - // Redundancy version - 2 bits - pos+=2; - dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; - - // HARQ process number - 4 bits - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; - - // Downlink assignment index - 2 bits - pos+=2; - dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; - - // TPC command for scheduled PUCCH - 2 bits - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; - - // PUCCH resource indicator - 3 bits - pos+=3; - dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&7; - - // PDSCH-to-HARQ_feedback timing indicator - 3 bits - pos+=3; - dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7; - - LOG_D(NR_MAC,"N_RB = %i\n", N_RB); - LOG_D(NR_MAC,"dci_size = %i\n", dci_size); - LOG_D(NR_MAC,"fsize = %i\n", fsize); - LOG_D(NR_MAC,"dci_pdu_rel15->format_indicator = %i\n", dci_pdu_rel15->format_indicator); - LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); - LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); - LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); - LOG_D(NR_MAC,"dci_pdu_rel15->dai[0].val = %i\n", dci_pdu_rel15->dai[0].val); - LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); - LOG_D(NR_MAC,"dci_pdu_rel15->pucch_resource_indicator = %i\n", dci_pdu_rel15->pucch_resource_indicator); - LOG_D(NR_MAC,"dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = %i\n", dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val); - - break; - } - break; - - case NR_UL_DCI_FORMAT_0_0: - if (mac->ULbwp[0]) N_RB_UL=NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - else N_RB_UL=NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - - switch(rnti_type) - { - case NR_RNTI_C: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); -#endif - if (dci_pdu_rel15->format_indicator == 1) - return 1; // discard dci, format indicator not corresponding to dci_format - fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); -#endif - // Time domain assignment 4bit - pos+=4; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); -#endif - // Frequency hopping flag  E1 bit - pos++; - dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"frequency_hopping %d (1 bit)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_hopping_flag.val,dci_size-pos,*dci_pdu); -#endif - // MCS 5 bit - pos+=5; - dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); -#endif - // New data indicator 1bit - pos++; - dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); -#endif - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); -#endif - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); -#endif - // TPC command for scheduled PUSCH  E2 bits - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); -#endif - // UL/SUL indicator  E1 bit - /* commented for now (RK): need to get this from BWP descriptor - if (cfg->pucch_config.pucch_GroupHopping.value) - dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); - */ - break; - - case NR_RNTI_TC: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); -#endif - if (dci_pdu_rel15->format_indicator == 1) - return 1; // discard dci, format indicator not corresponding to dci_format - fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); -#endif - // Time domain assignment 4bit - pos+=4; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); -#endif - // Frequency hopping flag  E1 bit - pos++; - dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"frequency_hopping %d (1 bit)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_hopping_flag.val,dci_size-pos,*dci_pdu); -#endif - // MCS 5 bit - pos+=5; - dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); -#endif - // New data indicator 1bit - pos++; - dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); -#endif - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); -#endif - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); -#endif - // TPC command for scheduled PUSCH  E2 bits - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); -#endif - break; - - } - break; - - case NR_DL_DCI_FORMAT_1_1: - switch(rnti_type) - { - case NR_RNTI_C: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; - if (dci_pdu_rel15->format_indicator == 0) - return 1; // discard dci, format indicator not corresponding to dci_format - // Carrier indicator - pos+=dci_pdu_rel15->carrier_indicator.nbits; - dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<carrier_indicator.nbits)-1); - // BWP Indicator - pos+=dci_pdu_rel15->bwp_indicator.nbits; - dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.nbits)-1); - // Frequency domain resource assignment - pos+=dci_pdu_rel15->frequency_domain_assignment.nbits; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<frequency_domain_assignment.nbits)-1); - // Time domain resource assignment - pos+=dci_pdu_rel15->time_domain_assignment.nbits; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits)-1); - // VRB-to-PRB mapping - pos+=dci_pdu_rel15->vrb_to_prb_mapping.nbits; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&((1<vrb_to_prb_mapping.nbits)-1); - // PRB bundling size indicator - pos+=dci_pdu_rel15->prb_bundling_size_indicator.nbits; - dci_pdu_rel15->prb_bundling_size_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<prb_bundling_size_indicator.nbits)-1); - // Rate matching indicator - pos+=dci_pdu_rel15->rate_matching_indicator.nbits; - dci_pdu_rel15->rate_matching_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<rate_matching_indicator.nbits)-1); - // ZP CSI-RS trigger - pos+=dci_pdu_rel15->zp_csi_rs_trigger.nbits; - dci_pdu_rel15->zp_csi_rs_trigger.val = (*dci_pdu>>(dci_size-pos))&((1<zp_csi_rs_trigger.nbits)-1); - //TB1 - // MCS 5bit - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; - // New data indicator 1bit - pos+=1; - dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&0x1; - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3; - //TB2 - // MCS 5bit - pos+=dci_pdu_rel15->mcs2.nbits; - dci_pdu_rel15->mcs2.val = (*dci_pdu>>(dci_size-pos))&((1<mcs2.nbits)-1); - // New data indicator 1bit - pos+=dci_pdu_rel15->ndi2.nbits; - dci_pdu_rel15->ndi2.val = (*dci_pdu>>(dci_size-pos))&((1<ndi2.nbits)-1); - // Redundancy version 2bit - pos+=dci_pdu_rel15->rv2.nbits; - dci_pdu_rel15->rv2.val = (*dci_pdu>>(dci_size-pos))&((1<rv2.nbits)-1); - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; - // Downlink assignment index - pos+=dci_pdu_rel15->dai[0].nbits; - dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<dai[0].nbits)-1); - // TPC command for scheduled PUCCH 2bit - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&0x3; - // PUCCH resource indicator 3bit - pos+=3; - dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x3; - // PDSCH-to-HARQ_feedback timing indicator - pos+=dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits; - dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<pdsch_to_harq_feedback_timing_indicator.nbits)-1); - // Antenna ports - pos+=dci_pdu_rel15->antenna_ports.nbits; - dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<antenna_ports.nbits)-1); - // TCI - pos+=dci_pdu_rel15->transmission_configuration_indication.nbits; - dci_pdu_rel15->transmission_configuration_indication.val = (*dci_pdu>>(dci_size-pos))&((1<transmission_configuration_indication.nbits)-1); - // SRS request - pos+=dci_pdu_rel15->srs_request.nbits; - dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<srs_request.nbits)-1); - // CBG transmission information - pos+=dci_pdu_rel15->cbgti.nbits; - dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<cbgti.nbits)-1); - // CBG flushing out information - pos+=dci_pdu_rel15->cbgfi.nbits; - dci_pdu_rel15->cbgfi.val = (*dci_pdu>>(dci_size-pos))&((1<cbgfi.nbits)-1); - // DMRS sequence init - pos+=1; - dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&0x1; - break; - } break; - case NR_UL_DCI_FORMAT_0_1: - switch(rnti_type) - { - case NR_RNTI_C: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; - if (dci_pdu_rel15->format_indicator == 1) - return 1; // discard dci, format indicator not corresponding to dci_format - // Carrier indicator - pos+=dci_pdu_rel15->carrier_indicator.nbits; - dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<carrier_indicator.nbits)-1); - - // UL/SUL Indicator - pos+=dci_pdu_rel15->ul_sul_indicator.nbits; - dci_pdu_rel15->ul_sul_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<ul_sul_indicator.nbits)-1); - - // BWP Indicator - pos+=dci_pdu_rel15->bwp_indicator.nbits; - dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.nbits)-1); + case NR_UL_DCI_FORMAT_0_0: + if (mac->ULbwp[0]) N_RB_UL=NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + else N_RB_UL=NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - // Freq domain assignment max 16 bit - fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0x3; - - // Not supported yet - skip for now - // Frequency hopping flag – 1 bit - //pos++; - //dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; + switch(rnti_type) { + case NR_RNTI_C: + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); +#endif - // MCS 5 bit - pos+=5; - dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; + if (dci_pdu_rel15->format_indicator == 1) + return 1; // discard dci, format indicator not corresponding to dci_format - // New data indicator 1bit - pos++; - dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; + fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); +#endif + // Time domain assignment 4bit + pos+=4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); +#endif + // Frequency hopping flag  E1 bit + pos++; + dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"frequency_hopping %d (1 bit)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_hopping_flag.val,dci_size-pos,*dci_pdu); +#endif + // MCS 5 bit + pos+=5; + dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); +#endif + // New data indicator 1bit + pos++; + dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); +#endif + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); +#endif + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); +#endif + // TPC command for scheduled PUSCH  E2 bits + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); +#endif + // UL/SUL indicator  E1 bit + /* commented for now (RK): need to get this from BWP descriptor + if (cfg->pucch_config.pucch_GroupHopping.value) + dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); + */ + break; - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; + case NR_RNTI_TC: + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); +#endif - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; + if (dci_pdu_rel15->format_indicator == 1) + return 1; // discard dci, format indicator not corresponding to dci_format - // 1st Downlink assignment index - pos+=dci_pdu_rel15->dai[0].nbits; - dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<dai[0].nbits)-1); - - // 2nd Downlink assignment index - pos+=dci_pdu_rel15->dai[1].nbits; - dci_pdu_rel15->dai[1].val = (*dci_pdu>>(dci_size-pos))&((1<dai[1].nbits)-1); - - // TPC command for scheduled PUSCH – 2 bits - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; - - // SRS resource indicator - pos+=dci_pdu_rel15->srs_resource_indicator.nbits; - dci_pdu_rel15->srs_resource_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<srs_resource_indicator.nbits)-1); - - // Precoding info and n. of layers - pos+=dci_pdu_rel15->precoding_information.nbits; - dci_pdu_rel15->precoding_information.val = (*dci_pdu>>(dci_size-pos))&((1<precoding_information.nbits)-1); - - // Antenna ports - pos+=dci_pdu_rel15->antenna_ports.nbits; - dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<antenna_ports.nbits)-1); - - // SRS request - pos+=dci_pdu_rel15->srs_request.nbits; - dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<srs_request.nbits)-1); - - // CSI request - pos+=dci_pdu_rel15->csi_request.nbits; - dci_pdu_rel15->csi_request.val = (*dci_pdu>>(dci_size-pos))&((1<csi_request.nbits)-1); - - // CBG transmission information - pos+=dci_pdu_rel15->cbgti.nbits; - dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<cbgti.nbits)-1); - - // PTRS DMRS association - pos+=dci_pdu_rel15->ptrs_dmrs_association.nbits; - dci_pdu_rel15->ptrs_dmrs_association.val = (*dci_pdu>>(dci_size-pos))&((1<ptrs_dmrs_association.nbits)-1); - - // Beta offset indicator - pos+=dci_pdu_rel15->beta_offset_indicator.nbits; - dci_pdu_rel15->beta_offset_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<beta_offset_indicator.nbits)-1); - - // DMRS sequence initialization - pos+=dci_pdu_rel15->dmrs_sequence_initialization.nbits; - dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&((1<dmrs_sequence_initialization.nbits)-1); - - // UL-SCH indicator - pos+=1; - dci_pdu_rel15->ulsch_indicator = (*dci_pdu>>(dci_size-pos))&0x1; - - // UL/SUL indicator – 1 bit - /* commented for now (RK): need to get this from BWP descriptor - if (cfg->pucch_config.pucch_GroupHopping.value) - dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); - */ - break; + fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); +#endif + // Time domain assignment 4bit + pos+=4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); +#endif + // Frequency hopping flag  E1 bit + pos++; + dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"frequency_hopping %d (1 bit)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_hopping_flag.val,dci_size-pos,*dci_pdu); +#endif + // MCS 5 bit + pos+=5; + dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); +#endif + // New data indicator 1bit + pos++; + dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); +#endif + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); +#endif + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); +#endif + // TPC command for scheduled PUSCH  E2 bits + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); +#endif + break; } - break; - } - - return 0; + + break; + + case NR_DL_DCI_FORMAT_1_1: + switch(rnti_type) { + case NR_RNTI_C: + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + + if (dci_pdu_rel15->format_indicator == 0) + return 1; // discard dci, format indicator not corresponding to dci_format + + // Carrier indicator + pos+=dci_pdu_rel15->carrier_indicator.nbits; + dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<carrier_indicator.nbits)-1); + // BWP Indicator + pos+=dci_pdu_rel15->bwp_indicator.nbits; + dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.nbits)-1); + // Frequency domain resource assignment + pos+=dci_pdu_rel15->frequency_domain_assignment.nbits; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<frequency_domain_assignment.nbits)-1); + // Time domain resource assignment + pos+=dci_pdu_rel15->time_domain_assignment.nbits; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits)-1); + // VRB-to-PRB mapping + pos+=dci_pdu_rel15->vrb_to_prb_mapping.nbits; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&((1<vrb_to_prb_mapping.nbits)-1); + // PRB bundling size indicator + pos+=dci_pdu_rel15->prb_bundling_size_indicator.nbits; + dci_pdu_rel15->prb_bundling_size_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<prb_bundling_size_indicator.nbits)-1); + // Rate matching indicator + pos+=dci_pdu_rel15->rate_matching_indicator.nbits; + dci_pdu_rel15->rate_matching_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<rate_matching_indicator.nbits)-1); + // ZP CSI-RS trigger + pos+=dci_pdu_rel15->zp_csi_rs_trigger.nbits; + dci_pdu_rel15->zp_csi_rs_trigger.val = (*dci_pdu>>(dci_size-pos))&((1<zp_csi_rs_trigger.nbits)-1); + //TB1 + // MCS 5bit + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + // New data indicator 1bit + pos+=1; + dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&0x1; + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3; + //TB2 + // MCS 5bit + pos+=dci_pdu_rel15->mcs2.nbits; + dci_pdu_rel15->mcs2.val = (*dci_pdu>>(dci_size-pos))&((1<mcs2.nbits)-1); + // New data indicator 1bit + pos+=dci_pdu_rel15->ndi2.nbits; + dci_pdu_rel15->ndi2.val = (*dci_pdu>>(dci_size-pos))&((1<ndi2.nbits)-1); + // Redundancy version 2bit + pos+=dci_pdu_rel15->rv2.nbits; + dci_pdu_rel15->rv2.val = (*dci_pdu>>(dci_size-pos))&((1<rv2.nbits)-1); + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; + // Downlink assignment index + pos+=dci_pdu_rel15->dai[0].nbits; + dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<dai[0].nbits)-1); + // TPC command for scheduled PUCCH 2bit + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&0x3; + // PUCCH resource indicator 3bit + pos+=3; + dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x3; + // PDSCH-to-HARQ_feedback timing indicator + pos+=dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits; + dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<pdsch_to_harq_feedback_timing_indicator.nbits)-1); + // Antenna ports + pos+=dci_pdu_rel15->antenna_ports.nbits; + dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<antenna_ports.nbits)-1); + // TCI + pos+=dci_pdu_rel15->transmission_configuration_indication.nbits; + dci_pdu_rel15->transmission_configuration_indication.val = (*dci_pdu>>(dci_size-pos))&((1<transmission_configuration_indication.nbits)-1); + // SRS request + pos+=dci_pdu_rel15->srs_request.nbits; + dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<srs_request.nbits)-1); + // CBG transmission information + pos+=dci_pdu_rel15->cbgti.nbits; + dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<cbgti.nbits)-1); + // CBG flushing out information + pos+=dci_pdu_rel15->cbgfi.nbits; + dci_pdu_rel15->cbgfi.val = (*dci_pdu>>(dci_size-pos))&((1<cbgfi.nbits)-1); + // DMRS sequence init + pos+=1; + dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&0x1; + break; + } + + break; + + case NR_UL_DCI_FORMAT_0_1: + switch(rnti_type) { + case NR_RNTI_C: + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + + if (dci_pdu_rel15->format_indicator == 1) + return 1; // discard dci, format indicator not corresponding to dci_format + + // Carrier indicator + pos+=dci_pdu_rel15->carrier_indicator.nbits; + dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<carrier_indicator.nbits)-1); + // UL/SUL Indicator + pos+=dci_pdu_rel15->ul_sul_indicator.nbits; + dci_pdu_rel15->ul_sul_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<ul_sul_indicator.nbits)-1); + // BWP Indicator + pos+=dci_pdu_rel15->bwp_indicator.nbits; + dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.nbits)-1); + // Freq domain assignment max 16 bit + fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0x3; + // Not supported yet - skip for now + // Frequency hopping flag – 1 bit + //pos++; + //dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; + // MCS 5 bit + pos+=5; + dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; + // New data indicator 1bit + pos++; + dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; + // 1st Downlink assignment index + pos+=dci_pdu_rel15->dai[0].nbits; + dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<dai[0].nbits)-1); + // 2nd Downlink assignment index + pos+=dci_pdu_rel15->dai[1].nbits; + dci_pdu_rel15->dai[1].val = (*dci_pdu>>(dci_size-pos))&((1<dai[1].nbits)-1); + // TPC command for scheduled PUSCH – 2 bits + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; + // SRS resource indicator + pos+=dci_pdu_rel15->srs_resource_indicator.nbits; + dci_pdu_rel15->srs_resource_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<srs_resource_indicator.nbits)-1); + // Precoding info and n. of layers + pos+=dci_pdu_rel15->precoding_information.nbits; + dci_pdu_rel15->precoding_information.val = (*dci_pdu>>(dci_size-pos))&((1<precoding_information.nbits)-1); + // Antenna ports + pos+=dci_pdu_rel15->antenna_ports.nbits; + dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<antenna_ports.nbits)-1); + // SRS request + pos+=dci_pdu_rel15->srs_request.nbits; + dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<srs_request.nbits)-1); + // CSI request + pos+=dci_pdu_rel15->csi_request.nbits; + dci_pdu_rel15->csi_request.val = (*dci_pdu>>(dci_size-pos))&((1<csi_request.nbits)-1); + // CBG transmission information + pos+=dci_pdu_rel15->cbgti.nbits; + dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<cbgti.nbits)-1); + // PTRS DMRS association + pos+=dci_pdu_rel15->ptrs_dmrs_association.nbits; + dci_pdu_rel15->ptrs_dmrs_association.val = (*dci_pdu>>(dci_size-pos))&((1<ptrs_dmrs_association.nbits)-1); + // Beta offset indicator + pos+=dci_pdu_rel15->beta_offset_indicator.nbits; + dci_pdu_rel15->beta_offset_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<beta_offset_indicator.nbits)-1); + // DMRS sequence initialization + pos+=dci_pdu_rel15->dmrs_sequence_initialization.nbits; + dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&((1<dmrs_sequence_initialization.nbits)-1); + // UL-SCH indicator + pos+=1; + dci_pdu_rel15->ulsch_indicator = (*dci_pdu>>(dci_size-pos))&0x1; + // UL/SUL indicator – 1 bit + /* commented for now (RK): need to get this from BWP descriptor + if (cfg->pucch_config.pucch_GroupHopping.value) + dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); + */ + break; + } + + break; + } + + return 0; } /////////////////////////////////// @@ -3286,8 +3240,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, //////////////////////////////// void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, - int pdu_id){ - + int pdu_id) { uint8_t rx_lcid; uint16_t mac_ce_len; uint16_t mac_subheader_len; @@ -3303,25 +3256,26 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); RA_config_t *ra = &mac->ra; - if (!pduP){ + if (!pduP) { return; } LOG_D(MAC, "In %s [%d.%d]: processing PDU %d (with length %d) of %d total number of PDUs...\n", __FUNCTION__, frameP, slot, pdu_id, pdu_len, dl_info->rx_ind->number_pdus); - while (!done && pdu_len > 0){ + while (!done && pdu_len > 0) { mac_ce_len = 0x0000; mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct mac_sdu_len = 0x0000; rx_lcid = ((NR_MAC_SUBHEADER_FIXED *)pduP)->LCID; - LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", rx_lcid, pdu_len); - switch(rx_lcid){ + + switch(rx_lcid) { // MAC CE case DL_SCH_LCID_CCCH: + // MSG4 RRC Setup 38.331 // variable length - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { mac_sdu_len = ((uint16_t)(((NR_MAC_SUBHEADER_LONG *) pduP)->L1 & 0x7f) << 8) | ((uint16_t)((NR_MAC_SUBHEADER_LONG *) pduP)->L2 & 0xff); mac_subheader_len = 3; @@ -3332,11 +3286,13 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, // Check if it is a valid CCCH message, we get all 00's messages very often int i = 0; + for(i=0; i<(mac_subheader_len+mac_sdu_len); i++) { if(pduP[i] != 0) { break; } } + if (i == (mac_subheader_len+mac_sdu_len)) { LOG_D(NR_MAC, "%s() Invalid CCCH message!, pdu_len: %d\n", __func__, pdu_len); done = 1; @@ -3345,118 +3301,140 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, if ( mac_sdu_len > 0 ) { LOG_D(NR_MAC,"DL_SCH_LCID_CCCH (e.g. RRCSetup) with payload len %d\n", mac_sdu_len); + for (int i = 0; i < mac_subheader_len; i++) { LOG_D(NR_MAC, "MAC header %d: 0x%x\n", i, pduP[i]); } + for (int i = 0; i < mac_sdu_len; i++) { LOG_D(NR_MAC, "%d: 0x%x\n", i, pduP[mac_subheader_len + i]); } + nr_mac_rrc_data_ind_ue(module_idP, CC_id, gNB_index, frameP, 0, mac->crnti, CCCH, pduP+mac_subheader_len, mac_sdu_len); } - break; - case DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH: + break; + + case DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH: // 38.321 Ch6.1.3.14 // varialbe length mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ + + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; } + break; + case DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL: // 38.321 Ch6.1.3.13 // varialbe length mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ + + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; } + break; + case DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT: // 38.321 Ch6.1.3.12 // varialbe length mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ + + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; } + break; + case DL_SCH_LCID_SP_SRS_ACTIVATION: // 38.321 Ch6.1.3.17 // varialbe length mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ + + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; } + break; + case DL_SCH_LCID_RECOMMENDED_BITRATE: // 38.321 Ch6.1.3.20 mac_ce_len = 2; break; + case DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT: // 38.321 Ch6.1.3.19 mac_ce_len = 2; break; + case DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT: // 38.321 Ch6.1.3.18 mac_ce_len = 3; break; + case DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT: // 38.321 Ch6.1.3.16 mac_ce_len = 2; break; + case DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH: // 38.321 Ch6.1.3.15 mac_ce_len = 2; break; + case DL_SCH_LCID_DUPLICATION_ACT: // 38.321 Ch6.1.3.11 mac_ce_len = 1; break; + case DL_SCH_LCID_SCell_ACT_4_OCT: // 38.321 Ch6.1.3.10 mac_ce_len = 4; break; + case DL_SCH_LCID_SCell_ACT_1_OCT: // 38.321 Ch6.1.3.10 mac_ce_len = 1; break; + case DL_SCH_LCID_L_DRX: // 38.321 Ch6.1.3.6 // fixed length but not yet specify. mac_ce_len = 0; break; + case DL_SCH_LCID_DRX: // 38.321 Ch6.1.3.5 // fixed length but not yet specify. mac_ce_len = 0; break; + case DL_SCH_LCID_TA_COMMAND: // 38.321 Ch6.1.3.4 mac_ce_len = 1; - /*uint8_t ta_command = ((NR_MAC_CE_TA *)pduP)[1].TA_COMMAND; uint8_t tag_id = ((NR_MAC_CE_TA *)pduP)[1].TAGID;*/ - ul_time_alignment->apply_ta = 1; ul_time_alignment->ta_command = ((NR_MAC_CE_TA *)pduP)[1].TA_COMMAND; ul_time_alignment->tag_id = ((NR_MAC_CE_TA *)pduP)[1].TAGID; - /* #ifdef DEBUG_HEADER_PARSING LOG_D(MAC, "[UE] CE %d : UE Timing Advance : %d\n", i, pduP[1]); #endif */ - LOG_D(MAC, "[%d.%d] Received TA_COMMAND %u TAGID %u CC_id %d\n", frameP, slot, ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id); - break; + case DL_SCH_LCID_CON_RES_ID: // Clause 5.1.5 and 6.1.3.3 of 3GPP TS 38.321 version 16.2.1 Release 16 // MAC Header: 1 byte (R/R/LCID) @@ -3466,8 +3444,8 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, if(ra->ra_state == WAIT_CONTENTION_RESOLUTION) { LOG_I(MAC, "[UE %d][RAPROC] Frame %d : received contention resolution identity: 0x%02x%02x%02x%02x%02x%02x Terminating RA procedure\n", module_idP, frameP, pduP[1], pduP[2], pduP[3], pduP[4], pduP[5], pduP[6]); - bool ra_success = true; + for(int i = 0; icont_res_id[i] != pduP[i+1]) { ra_success = false; @@ -3477,49 +3455,52 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, if ( (ra->RA_active == 1) && ra_success) { nr_ra_succeeded(module_idP, frameP, slot); - } else if (!ra_success){ + } else if (!ra_success) { // TODO: Handle failure of RA procedure @ MAC layer // nr_ra_failed(module_idP, CC_id, prach_resources, frameP, slot); // prach_resources is a PHY structure ra->ra_state = RA_UE_IDLE; ra->RA_active = 0; } } + break; + case DL_SCH_LCID_PADDING: done = 1; // end of MAC PDU, can ignore the rest. break; - // MAC SDU + + // MAC SDU case DL_SCH_LCID_DCCH: - // check if LCID is valid at current time. + + // check if LCID is valid at current time. case DL_SCH_LCID_DCCH1: - // check if LCID is valid at current time. + + // check if LCID is valid at current time. default: + // check if LCID is valid at current time. - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { //mac_sdu_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; mac_sdu_len = ((uint16_t)(((NR_MAC_SUBHEADER_LONG *) pduP)->L1 & 0x7f) << 8) | ((uint16_t)((NR_MAC_SUBHEADER_LONG *) pduP)->L2 & 0xff); - } else { mac_sdu_len = (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; } LOG_D(MAC, "[UE %d] Frame %d : DLSCH -> DL-DTCH %d (gNB %d, %d bytes)\n", module_idP, frameP, rx_lcid, gNB_index, mac_sdu_len); +#if defined(ENABLE_MAC_PAYLOAD_DEBUG) + LOG_T(MAC, "[UE %d] First 32 bytes of DLSCH : \n", module_idP); - #if defined(ENABLE_MAC_PAYLOAD_DEBUG) - LOG_T(MAC, "[UE %d] First 32 bytes of DLSCH : \n", module_idP); + for (i = 0; i < 32; i++) + LOG_T(MAC, "%x.", (pduP + mac_subheader_len)[i]); - for (i = 0; i < 32; i++) - LOG_T(MAC, "%x.", (pduP + mac_subheader_len)[i]); - - LOG_T(MAC, "\n"); - #endif + LOG_T(MAC, "\n"); +#endif if (rx_lcid < NB_RB_MAX && rx_lcid >= DL_SCH_LCID_DCCH) { - mac_rlc_data_ind(module_idP, mac->crnti, gNB_index, @@ -3536,12 +3517,14 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, } break; - } - pduP += ( mac_subheader_len + mac_ce_len + mac_sdu_len ); - pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len ); - if (pdu_len < 0) - LOG_E(MAC, "[UE %d][%d.%d] nr_ue_process_mac_pdu, residual mac pdu length %d < 0!\n", module_idP, frameP, slot, pdu_len); } + + pduP += ( mac_subheader_len + mac_ce_len + mac_sdu_len ); + pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len ); + + if (pdu_len < 0) + LOG_E(MAC, "[UE %d][%d.%d] nr_ue_process_mac_pdu, residual mac pdu length %d < 0!\n", module_idP, frameP, slot, pdu_len); + } } /** @@ -3555,102 +3538,85 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, NR_UE_MAC_INST_t *mac, uint8_t power_headroom, // todo: NR_POWER_HEADROOM_CMD *power_headroom, - uint16_t *crnti, + uint16_t *crnti, NR_BSR_SHORT *truncated_bsr, NR_BSR_SHORT *short_bsr, NR_BSR_LONG *long_bsr) { - int mac_ce_len = 0; uint8_t mac_ce_size = 0; uint8_t *pdu = mac_ce; - if (power_headroom) { + if (power_headroom) { // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_SINGLE_ENTRY_PHR; mac_ce++; - // PHR MAC CE (1 octet) ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->PH = power_headroom; ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->R1 = 0; ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->PCMAX = 0; // todo ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->R2 = 0; - // update pointer and length mac_ce_size = sizeof(NR_SINGLE_ENTRY_PHR_MAC_CE); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : power_headroom pdu %p mac_ce %p b\n", - pdu, mac_ce); + pdu, mac_ce); } if (crnti && (!get_softmodem_params()->sa && get_softmodem_params()->do_ra && mac->ra.ra_state != RA_SUCCEEDED)) { - LOG_D(NR_MAC, "In %s: generating C-RNTI MAC CE with C-RNTI %x\n", __FUNCTION__, (*crnti)); - // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_C_RNTI; mac_ce++; - // C-RNTI MAC CE (2 octets) *(uint16_t *) mac_ce = (*crnti); - // update pointer and length mac_ce_size = sizeof(uint16_t); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); - } if (truncated_bsr) { - - // MAC CE fixed subheader + // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_S_TRUNCATED_BSR; mac_ce++; - // Short truncated BSR MAC CE (1 octet) ((NR_BSR_SHORT_TRUNCATED *) mac_ce)-> Buffer_size = truncated_bsr->Buffer_size; ((NR_BSR_SHORT_TRUNCATED *) mac_ce)-> LcgID = truncated_bsr->LcgID;; - // update pointer and length mac_ce_size = sizeof(NR_BSR_SHORT_TRUNCATED); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : truncated_bsr Buffer_size %d LcgID %d pdu %p mac_ce %p\n", - truncated_bsr->Buffer_size, truncated_bsr->LcgID, pdu, mac_ce); - + truncated_bsr->Buffer_size, truncated_bsr->LcgID, pdu, mac_ce); } else if (short_bsr) { - - // MAC CE fixed subheader + // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_S_BSR; mac_ce++; - // Short truncated BSR MAC CE (1 octet) ((NR_BSR_SHORT *) mac_ce)->Buffer_size = short_bsr->Buffer_size; ((NR_BSR_SHORT *) mac_ce)->LcgID = short_bsr->LcgID; - // update pointer and length mac_ce_size = sizeof(NR_BSR_SHORT); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : short_bsr Buffer_size %d LcgID %d pdu %p mac_ce %p\n", - short_bsr->Buffer_size, short_bsr->LcgID, pdu, mac_ce); + short_bsr->Buffer_size, short_bsr->LcgID, pdu, mac_ce); } else if (long_bsr) { - - // MAC CE variable subheader + // MAC CE variable subheader // ch 6.1.3.1. TS 38.321 ((NR_MAC_SUBHEADER_SHORT *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_SHORT *) mac_ce)->F = 0; ((NR_MAC_SUBHEADER_SHORT *) mac_ce)->LCID = UL_SCH_LCID_L_BSR; - NR_MAC_SUBHEADER_SHORT *mac_pdu_subheader_ptr = (NR_MAC_SUBHEADER_SHORT *) mac_ce; mac_ce += 2; - // Could move to nr_get_sdu() - uint8_t *Buffer_size_ptr= (uint8_t*) mac_ce + 1; + uint8_t *Buffer_size_ptr= (uint8_t *) mac_ce + 1; + //int NR_BSR_LONG_SIZE = 1; if (long_bsr->Buffer_size0 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID0 = 0; @@ -3659,6 +3625,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size0; //NR_BSR_LONG_SIZE++; } + if (long_bsr->Buffer_size1 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID1 = 0; } else { @@ -3666,6 +3633,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size1; //NR_BSR_LONG_SIZE++; } + if (long_bsr->Buffer_size2 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID2 = 0; } else { @@ -3673,6 +3641,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size2; //NR_BSR_LONG_SIZE++; } + if (long_bsr->Buffer_size3 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID3 = 0; } else { @@ -3680,6 +3649,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size3; //NR_BSR_LONG_SIZE++; } + if (long_bsr->Buffer_size4 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID4 = 0; } else { @@ -3687,6 +3657,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size4; //NR_BSR_LONG_SIZE++; } + if (long_bsr->Buffer_size5 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID5 = 0; } else { @@ -3694,6 +3665,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size5; //NR_BSR_LONG_SIZE++; } + if (long_bsr->Buffer_size6 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID6 = 0; } else { @@ -3701,6 +3673,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size6; //NR_BSR_LONG_SIZE++; } + if (long_bsr->Buffer_size7 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID7 = 0; } else { @@ -3708,17 +3681,17 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size7; //NR_BSR_LONG_SIZE++; } - ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_subheader_ptr)->L = mac_ce_size = (uint8_t*) Buffer_size_ptr - (uint8_t*) mac_ce; - LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : long_bsr size %d Lcgbit 0x%02x Buffer_size %d %d %d %d %d %d %d %d\n", mac_ce_size, *((uint8_t*) mac_ce), - ((NR_BSR_LONG *) mac_ce)->Buffer_size0, ((NR_BSR_LONG *) mac_ce)->Buffer_size1, ((NR_BSR_LONG *) mac_ce)->Buffer_size2, ((NR_BSR_LONG *) mac_ce)->Buffer_size3, - ((NR_BSR_LONG *) mac_ce)->Buffer_size4, ((NR_BSR_LONG *) mac_ce)->Buffer_size5, ((NR_BSR_LONG *) mac_ce)->Buffer_size6, ((NR_BSR_LONG *) mac_ce)->Buffer_size7); + + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_subheader_ptr)->L = mac_ce_size = (uint8_t *) Buffer_size_ptr - (uint8_t *) mac_ce; + LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : long_bsr size %d Lcgbit 0x%02x Buffer_size %d %d %d %d %d %d %d %d\n", mac_ce_size, *((uint8_t *) mac_ce), + ((NR_BSR_LONG *) mac_ce)->Buffer_size0, ((NR_BSR_LONG *) mac_ce)->Buffer_size1, ((NR_BSR_LONG *) mac_ce)->Buffer_size2, ((NR_BSR_LONG *) mac_ce)->Buffer_size3, + ((NR_BSR_LONG *) mac_ce)->Buffer_size4, ((NR_BSR_LONG *) mac_ce)->Buffer_size5, ((NR_BSR_LONG *) mac_ce)->Buffer_size6, ((NR_BSR_LONG *) mac_ce)->Buffer_size7); // update pointer and length mac_ce = Buffer_size_ptr; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_SHORT); } return mac_ce_len; - } @@ -3755,8 +3728,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, // - b buffer // - ulsch power offset // - optimize: mu_pusch, j and table_6_1_2_1_1_2_time_dom_res_alloc_A are already defined in nr_ue_procedures -int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id){ - +int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id) { module_id_t mod_id = dl_info->module_id; frame_t frame = dl_info->frame; int slot = dl_info->slot; @@ -3780,11 +3752,11 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t NR_RA_HEADER_RAPID *rarh = (NR_RA_HEADER_RAPID *) dlsch_buffer; // RAR subheader pointer NR_MAC_RAR *rar = (NR_MAC_RAR *) (dlsch_buffer + 1); // RAR subPDU pointer uint8_t preamble_index = get_ra_PreambleIndex(mod_id, cc_id, gNB_id); //prach_resources->ra_PreambleIndex; - LOG_D(NR_MAC, "In %s:[%d.%d]: [UE %d][RAPROC] invoking MAC for received RAR (current preamble %d)\n", __FUNCTION__, frame, slot, mod_id, preamble_index); while (1) { n_subheaders++; + if (rarh->T == 1) { n_subPDUs++; LOG_I(NR_MAC, "[UE %d][RAPROC] Got RAPID RAR subPDU\n", mod_id); @@ -3792,6 +3764,7 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t ra->RA_backoff_indicator = table_7_2_1[((NR_RA_HEADER_BI *)rarh)->BI]; ra->RA_BI_found = 1; LOG_I(NR_MAC, "[UE %d][RAPROC] Got BI RAR subPDU %d ms\n", mod_id, ra->RA_backoff_indicator); + if ( ((NR_RA_HEADER_BI *)rarh)->E == 1) { rarh += sizeof(NR_RA_HEADER_BI); continue; @@ -3799,12 +3772,14 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t break; } } + if (rarh->RAPID == preamble_index) { LOG_I(NR_MAC, "[UE %d][RAPROC][%d.%d] Found RAR with the intended RAPID %d\n", mod_id, frame, slot, rarh->RAPID); rar = (NR_MAC_RAR *) (dlsch_buffer + n_subheaders + (n_subPDUs - 1) * sizeof(NR_MAC_RAR)); ra->RA_RAPID_found = 1; break; } + if (rarh->E == 0) { LOG_W(NR_MAC,"[UE %d][RAPROC][%d.%d] Received RAR preamble (%d) doesn't match the intended RAPID (%d)\n", mod_id, frame, slot, rarh->RAPID, preamble_index); break; @@ -3813,57 +3788,61 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t } } - #ifdef DEBUG_RAR +#ifdef DEBUG_RAR LOG_D(MAC, "[DEBUG_RAR] (%d,%d) number of RAR subheader %d; number of RAR pyloads %d\n", frame, slot, n_subheaders, n_subPDUs); LOG_D(MAC, "[DEBUG_RAR] Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n", *(uint8_t *) rarh, rar[0], rar[1], rar[2], rar[3], rar[4], rar[5], rarh->RAPID, preamble_index); - #endif +#endif if (ra->RA_RAPID_found) { - RAR_grant_t rar_grant; - unsigned char tpc_command; #ifdef DEBUG_RAR unsigned char csi_req; #endif - // TA command ul_time_alignment->apply_ta = 1; ul_time_alignment->ta_command = 31 + rar->TA2 + (rar->TA1 << 5); - #ifdef DEBUG_RAR // CSI csi_req = (unsigned char) (rar->UL_GRANT_4 & 0x01); #endif - // TPC tpc_command = (unsigned char) ((rar->UL_GRANT_4 >> 1) & 0x07); - switch (tpc_command){ + + switch (tpc_command) { case 0: ra->Msg3_TPC = -6; break; + case 1: ra->Msg3_TPC = -4; break; + case 2: ra->Msg3_TPC = -2; break; + case 3: ra->Msg3_TPC = 0; break; + case 4: ra->Msg3_TPC = 2; break; + case 5: ra->Msg3_TPC = 4; break; + case 6: ra->Msg3_TPC = 6; break; + case 7: ra->Msg3_TPC = 8; break; } + // MCS rar_grant.mcs = (unsigned char) (rar->UL_GRANT_4 >> 4); // time alloc @@ -3872,44 +3851,36 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t rar_grant.Msg3_f_alloc = (uint16_t) ((rar->UL_GRANT_3 >> 4) | (rar->UL_GRANT_2 << 4) | ((rar->UL_GRANT_1 & 0x03) << 12)); // frequency hopping rar_grant.freq_hopping = (unsigned char) (rar->UL_GRANT_1 >> 2); - #ifdef DEBUG_RAR LOG_I(NR_MAC, "rarh->E = 0x%x\n", rarh->E); LOG_I(NR_MAC, "rarh->T = 0x%x\n", rarh->T); LOG_I(NR_MAC, "rarh->RAPID = 0x%x (%i)\n", rarh->RAPID, rarh->RAPID); - LOG_I(NR_MAC, "rar->R = 0x%x\n", rar->R); LOG_I(NR_MAC, "rar->TA1 = 0x%x\n", rar->TA1); - LOG_I(NR_MAC, "rar->TA2 = 0x%x\n", rar->TA2); LOG_I(NR_MAC, "rar->UL_GRANT_1 = 0x%x\n", rar->UL_GRANT_1); - LOG_I(NR_MAC, "rar->UL_GRANT_2 = 0x%x\n", rar->UL_GRANT_2); LOG_I(NR_MAC, "rar->UL_GRANT_3 = 0x%x\n", rar->UL_GRANT_3); LOG_I(NR_MAC, "rar->UL_GRANT_4 = 0x%x\n", rar->UL_GRANT_4); - LOG_I(NR_MAC, "rar->TCRNTI_1 = 0x%x\n", rar->TCRNTI_1); LOG_I(NR_MAC, "rar->TCRNTI_2 = 0x%x\n", rar->TCRNTI_2); - LOG_I(NR_MAC, "In %s:[%d.%d]: [UE %d] Received RAR with t_alloc %d f_alloc %d ta_command %d mcs %d freq_hopping %d tpc_command %d t_crnti %x \n", - __FUNCTION__, - frame, - slot, - mod_id, - rar_grant.Msg3_t_alloc, - rar_grant.Msg3_f_alloc, - ul_time_alignment->ta_command, - rar_grant.mcs, - rar_grant.freq_hopping, - tpc_command, - ra->t_crnti); + __FUNCTION__, + frame, + slot, + mod_id, + rar_grant.Msg3_t_alloc, + rar_grant.Msg3_f_alloc, + ul_time_alignment->ta_command, + rar_grant.mcs, + rar_grant.freq_hopping, + tpc_command, + ra->t_crnti); #endif - // Schedule Msg3 ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, rar_grant.Msg3_t_alloc); - if (ret != -1){ - + if (ret != -1) { fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); uint16_t rnti = mac->crnti; @@ -3925,21 +3896,14 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t } nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; - fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); - // Config Msg3 PDU nr_config_pusch_pdu(mac, pusch_config_pdu, NULL, &rar_grant, rnti, NULL); - } - } else { - ra->t_crnti = 0; ul_time_alignment->ta_command = (0xffff); - } return ret; - } diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 4f231b40ca..1a65d266c2 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -58,15 +58,12 @@ static prach_association_pattern_t prach_assoc_pattern; static ssb_list_info_t ssb_list; -void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type){ - +void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type) { ul_config->ul_config_list[ul_config->number_pdus].pdu_type = pdu_type; ul_config->slot = slot_tx; ul_config->sfn = frame_tx; ul_config->number_pdus++; - LOG_D(NR_MAC, "In %s: Set config request for UL transmission in [%d.%d], number of UL PDUs: %d\n", __FUNCTION__, ul_config->sfn, ul_config->slot, ul_config->number_pdus); - } void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, @@ -77,8 +74,7 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, int cc_id, frame_t frame, int slot, - int thread_id){ - + int thread_id) { scheduled_response->dl_config = dl_config; scheduled_response->ul_config = ul_config; scheduled_response->tx_request = tx_request; @@ -87,7 +83,6 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, scheduled_response->frame = frame; scheduled_response->slot = slot; scheduled_response->thread_id = thread_id; - } /* @@ -99,17 +94,16 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { // Get K2 from RRC configuration NR_PUSCH_Config_t *pusch_config=mac->ULbwp[0] ? mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup : NULL; NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; + if (pusch_config && pusch_config->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = pusch_config->pusch_TimeDomainAllocationList->choice.setup; - } - else if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Common&& - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon&& - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { + } else if (mac->ULbwp[0] && + mac->ULbwp[0]->bwp_Common&& + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon&& + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - } - else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) + } else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) pusch_TimeDomainAllocationList=mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; else AssertFatal(1==0,"need to fall back to default PUSCH time-domain allocations\n"); @@ -119,13 +113,13 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { time_domain_ind, pusch_TimeDomainAllocationList->list.count); return -1; } + k2 = *pusch_TimeDomainAllocationList->list.array[time_domain_ind]->k2; } AssertFatal(k2 >= DURATION_RX_TO_TX, "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n", k2,DURATION_RX_TO_TX); - LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2); return k2; } @@ -134,8 +128,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { * This function returns the UL config corresponding to a given UL slot * from MAC instance . */ -fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot) -{ +fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot) { NR_TDD_UL_DL_ConfigCommon_t *tdd_config = mac->scc==NULL ? mac->scc_SIB->tdd_UL_DL_ConfigurationCommon : mac->scc->tdd_UL_DL_ConfigurationCommon; //Check if request to access ul_config is for a UL slot @@ -148,27 +141,24 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl // based on the TDD pattern (slot configuration period) and number of UL+mixed // slots in the period. TS 38.213 Sec 11.1 int mu = mac->ULbwp[0] ? - mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing : - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing; + mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing : + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing; NR_TDD_UL_DL_Pattern_t *tdd_pattern = &tdd_config->pattern1; const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity); const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0); int index = slot % num_slots_ul; - LOG_D(NR_MAC, "In %s slots per tdd %d, num_slots_ul %d, index %d\n", __FUNCTION__, - num_slots_per_tdd, - num_slots_ul, - index); - + num_slots_per_tdd, + num_slots_ul, + index); return &mac->ul_config_request[index]; } -void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { - +void ul_layers_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { NR_ServingCellConfigCommon_t *scc = mac->scc; NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup; + long transformPrecoder; - long transformPrecoder; if (pusch_Config->transformPrecoder) transformPrecoder = *pusch_Config->transformPrecoder; else { @@ -178,36 +168,34 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled; } - /* PRECOD_NBR_LAYERS */ if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_nonCodebook)); + // 0 bits if the higher layer parameter txConfig = nonCodeBook - if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook)){ - + if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook)) { uint8_t n_antenna_port = 0; //FIXME!!! if (n_antenna_port == 1); // 1 antenna port and the higher layer parameter txConfig = codebook 0 bits - if (n_antenna_port == 4){ // 4 antenna port and the higher layer parameter txConfig = codebook + if (n_antenna_port == 4) { // 4 antenna port and the higher layer parameter txConfig = codebook // Table 7.3.1.1.2-2: transformPrecoder=disabled and maxRank = 2 or 3 or 4 if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) - && ((*pusch_Config->maxRank == 2) || - (*pusch_Config->maxRank == 3) || - (*pusch_Config->maxRank == 4))){ - + && ((*pusch_Config->maxRank == 2) || + (*pusch_Config->maxRank == 3) || + (*pusch_Config->maxRank == 4))) { if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][0]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][1]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][2]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][3]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][4]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][5]; } @@ -215,100 +203,92 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con // Table 7.3.1.1.2-3: transformPrecoder= enabled, or transformPrecoder=disabled and maxRank = 1 if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) - || (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)) - && (*pusch_Config->maxRank == 1)){ - + || (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)) + && (*pusch_Config->maxRank == 1)) { if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][6]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][7]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][8]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][9]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][10]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][11]; } } } - if (n_antenna_port == 4){ // 2 antenna port and the higher layer parameter txConfig = codebook + if (n_antenna_port == 4) { // 2 antenna port and the higher layer parameter txConfig = codebook // Table 7.3.1.1.2-4: transformPrecoder=disabled and maxRank = 2 - if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (*pusch_Config->maxRank == 2)){ - + if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (*pusch_Config->maxRank == 2)) { if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][12]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][13]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][14]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][15]; } - } // Table 7.3.1.1.2-5: transformPrecoder= enabled, or transformPrecoder= disabled and maxRank = 1 if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) - || (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)) - && (*pusch_Config->maxRank == 1)){ - + || (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)) + && (*pusch_Config->maxRank == 1)) { if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][16]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][17]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][18]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][19]; } - } } } /*-------------------- Changed to enable Transform precoding in RF SIM------------------------------------------------*/ + /*if (pusch_config_pdu->transform_precoding == transform_precoder_enabled) { - /*if (pusch_config_pdu->transform_precoding == transform_precoder_enabled) { + pusch_config_dedicated->transform_precoder = transform_precoder_enabled; - pusch_config_dedicated->transform_precoder = transform_precoder_enabled; + if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) { - if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) { + NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; - NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; + if (NR_DMRS_ulconfig->dmrs_Type == NULL) + pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_a.dmrs_type = 1; + if (NR_DMRS_ulconfig->maxLength == NULL) + pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_a.max_length = 1; - if (NR_DMRS_ulconfig->dmrs_Type == NULL) - pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_a.dmrs_type = 1; - if (NR_DMRS_ulconfig->maxLength == NULL) - pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_a.max_length = 1; + } else if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) { - } else if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) { + NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; - NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; + if (NR_DMRS_ulconfig->dmrs_Type == NULL) + pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_b.dmrs_type = 1; + if (NR_DMRS_ulconfig->maxLength == NULL) + pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_b.max_length = 1; - if (NR_DMRS_ulconfig->dmrs_Type == NULL) - pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_b.dmrs_type = 1; - if (NR_DMRS_ulconfig->maxLength == NULL) - pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_b.max_length = 1; - - } - } else - pusch_config_dedicated->transform_precoder = transform_precoder_disabled;*/ + } + } else + pusch_config_dedicated->transform_precoder = transform_precoder_disabled;*/ } // todo: this function shall be reviewed completely because of the many comments left by the author -void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { - +void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { /* ANTENNA_PORTS */ uint8_t rank = 0; // We need to initialize rank FIXME!!! - NR_ServingCellConfigCommon_t *scc = mac->scc; NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup; + long transformPrecoder; - long transformPrecoder; if (pusch_Config->transformPrecoder) transformPrecoder = *pusch_Config->transformPrecoder; else { @@ -317,48 +297,46 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf else transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled; } + long *max_length = NULL; long *dmrs_type = NULL; + if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA) { max_length = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->maxLength; dmrs_type = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->dmrs_Type; - } - else { + } else { max_length = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->maxLength; dmrs_type = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->dmrs_Type; } - if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) && - (dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-6 - pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC - pusch_config_pdu->dmrs_ports = dci->antenna_ports.val; //TBC + (dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-6 + pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC + pusch_config_pdu->dmrs_ports = dci->antenna_ports.val; //TBC } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) && - (dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-7 - + (dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-7 pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 3)?(dci->antenna_ports.val-4):(dci->antenna_ports.val); //TBC //pusch_config_pdu->n_front_load_symb = (dci->antenna_ports > 3)?2:1; //FIXME } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && - (dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-8/9/10/11 - + (dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-8/9/10/11 if (rank == 1) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1; //TBC pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val-2):(dci->antenna_ports.val); //TBC } - if (rank == 2){ + if (rank == 2) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?0:2):0; //pusch_config_pdu->dmrs_ports[1] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?2:3):1; } - if (rank == 3){ + if (rank == 3) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = 0; @@ -366,7 +344,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf //pusch_config_pdu->dmrs_ports[2] = 2; } - if (rank == 4){ + if (rank == 4) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = 0; @@ -377,15 +355,14 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && - (dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-12/13/14/15 - - if (rank == 1){ + (dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-12/13/14/15 + if (rank == 1) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1; //TBC pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val; //TBC //pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 6)?2:1; //FIXME } - if (rank == 2){ + if (rank == 2) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_13[dci->antenna_ports.val][1]; @@ -393,7 +370,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf //pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 3)?2:1; // FIXME } - if (rank == 3){ + if (rank == 3) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_14[dci->antenna_ports.val][1]; @@ -402,7 +379,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf //pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME } - if (rank == 4){ + if (rank == 4) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_15[dci->antenna_ports.val][1]; @@ -414,22 +391,21 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && - (dmrs_type != NULL) && - (max_length == NULL)) { // tables 7.3.1.1.2-16/17/18/19 - - if (rank == 1){ + (dmrs_type != NULL) && + (max_length == NULL)) { // tables 7.3.1.1.2-16/17/18/19 + if (rank == 1) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?((dci->antenna_ports.val > 5)?3:2):1; //TBC pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val; //TBC } - if (rank == 2){ + if (rank == 2) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?((dci->antenna_ports.val > 2)?3:2):1; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_17[dci->antenna_ports.val][1]; //pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_17[dci->antenna_ports.val][2]; } - if (rank == 3){ + if (rank == 3) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?3:2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_18[dci->antenna_ports.val][1]; @@ -437,7 +413,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf //pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_18[dci->antenna_ports.val][3]; } - if (rank == 4){ + if (rank == 4) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = dci->antenna_ports.val + 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = 0; @@ -448,23 +424,22 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && - (dmrs_type != NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-20/21/22/23 - - if (rank == 1){ + (dmrs_type != NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-20/21/22/23 + if (rank == 1) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_20[dci->antenna_ports.val][0]; //TBC pusch_config_pdu->dmrs_ports = table_7_3_1_1_2_20[dci->antenna_ports.val][1]; //TBC //pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_20[dci->antenna_ports.val][2]; //FIXME } - if (rank == 2){ + if (rank == 2) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_21[dci->antenna_ports.val][0]; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_21[dci->antenna_ports.val][1]; //pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_21[dci->antenna_ports.val][2]; //pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_21[dci->antenna_ports.val][3]; //FIXME - } + } - if (rank == 3){ + if (rank == 3) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_22[dci->antenna_ports.val][0]; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_22[dci->antenna_ports.val][1]; @@ -473,7 +448,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf //pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_22[dci->antenna_ports.val][4]; //FIXME } - if (rank == 4){ + if (rank == 4) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_23[dci->antenna_ports.val][0]; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_23[dci->antenna_ports.val][1]; @@ -498,26 +473,23 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, dci_pdu_rel15_t *dci, RAR_grant_t *rar_grant, uint16_t rnti, - uint8_t *dci_format){ - + uint8_t *dci_format) { int f_alloc; int mask; int StartSymbolIndex; int NrOfSymbols; uint8_t nb_dmrs_re_per_rb; - uint16_t l_prime_mask = 0; uint16_t number_dmrs_symbols = 0; int N_PRB_oh = 0; - int rnti_type = get_rnti_type(mac, rnti); - // Common configuration pusch_config_pdu->dmrs_config_type = pusch_dmrs_type1; pusch_config_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; pusch_config_pdu->nrOfLayers = 1; pusch_config_pdu->rnti = rnti; NR_BWP_UplinkCommon_t *initialUplinkBWP; + if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; @@ -525,41 +497,38 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, pusch_maxLength_t dmrslength = pusch_len1; if (rar_grant) { - // Note: for Msg3 or MsgA PUSCH transmission the N_PRB_oh is always set to 0 NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; NR_BWP_UplinkDedicated_t *ibwp; int scs,abwp_start,abwp_size,startSymbolAndLength,mappingtype; NR_PUSCH_Config_t *pusch_Config=NULL; + if (mac->cg && ubwp && mac->cg->spCellConfig && mac->cg->spCellConfig->spCellConfigDedicated && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) { - ibwp = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP; pusch_Config = ibwp->pusch_Config->choice.setup; startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength; mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType; - // active BWP start abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); abwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; - } - else { + } else { startSymbolAndLength = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength; mappingtype = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType; - // active BWP start abwp_start = NRRIV2PRBOFFSET(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); abwp_size = NRRIV2BW(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); scs = initialUplinkBWP->genericParameters.subcarrierSpacing; } + int ibwp_start = NRRIV2PRBOFFSET(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); int ibwp_size = NRRIV2BW(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - // BWP start selection according to 8.3 of TS 38.213 + // BWP start selection according to 8.3 of TS 38.213 if ((ibwp_start < abwp_start) || (ibwp_size > abwp_size)) { pusch_config_pdu->bwp_start = abwp_start; pusch_config_pdu->bwp_size = abwp_size; @@ -576,43 +545,35 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, mask = (1 << (28 - (int)(ceil(log2((ibwp_size*(ibwp_size+1))>>1))))) - 1; f_alloc = rar_grant->Msg3_f_alloc & mask; + if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, ibwp_size, 0, f_alloc) < 0) return -1; // virtual resource block to physical resource mapping for Msg3 PUSCH (6.3.1.7 in 38.211) //pusch_config_pdu->rb_start += ibwp_start - abwp_start; - // Time domain allocation SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); pusch_config_pdu->start_symbol_index = StartSymbolIndex; pusch_config_pdu->nr_of_symbols = NrOfSymbols; - l_prime_mask = get_l_prime(NrOfSymbols, mappingtype, add_pos, dmrslength, StartSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position); LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask); - - #ifdef DEBUG_MSG3 +#ifdef DEBUG_MSG3 LOG_D(NR_MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size); - #endif - +#endif // MCS pusch_config_pdu->mcs_index = rar_grant->mcs; // Frequency hopping pusch_config_pdu->frequency_hopping = rar_grant->freq_hopping; - // DM-RS configuration according to 6.2.2 UE DM-RS transmission procedure in 38.214 pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; pusch_config_pdu->dmrs_ports = 1; - // DMRS sequence initialization [TS 38.211, sec 6.4.1.1.1]. // Should match what is sent in DCI 0_1, otherwise set to 0. pusch_config_pdu->scid = 0; - // Transform precoding according to 6.1.3 UE procedure for applying transform precoding on PUSCH in 38.214 pusch_config_pdu->transform_precoding = get_transformPrecoding(initialUplinkBWP, pusch_Config, NULL, NULL, NR_RNTI_TC, 0); // TBR fix rnti and take out - // Resource allocation in frequency domain according to 6.1.2.2 in TS 38.214 pusch_config_pdu->resource_alloc = (mac->cg) ? pusch_Config->resourceAllocation : 1; - //// Completing PUSCH PDU pusch_config_pdu->mcs_table = 0; pusch_config_pdu->cyclic_prefix = 0; @@ -626,23 +587,20 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, pusch_config_pdu->pusch_data.harq_process_id = 0; pusch_config_pdu->pusch_data.new_data_indicator = 1; // new data pusch_config_pdu->pusch_data.num_cb = 0; - } else if (dci) { - int target_ss; bool valid_ptrs_setup = 0; uint16_t n_RB_ULBWP; + if (mac->ULbwp[0] && mac->ULbwp[0]->bwp_Common) { n_RB_ULBWP = NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); pusch_config_pdu->bwp_start = NRRIV2PRBOFFSET(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - } - else { + } else { pusch_config_pdu->bwp_start = NRRIV2PRBOFFSET(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); n_RB_ULBWP = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); } pusch_config_pdu->bwp_size = n_RB_ULBWP; - NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0] ? mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup : NULL; // Basic sanity check for MCS value to check for a false or erroneous DCI @@ -658,46 +616,40 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, /*DCI format-related configuration*/ if (*dci_format == NR_UL_DCI_FORMAT_0_0) { - target_ss = NR_SearchSpace__searchSpaceType_PR_common; - } else if (*dci_format == NR_UL_DCI_FORMAT_0_1) { - /* BANDWIDTH_PART_IND */ if (dci->bwp_indicator.val != 1) { LOG_W(NR_MAC, "bwp_indicator != 1! Possibly due to false DCI. Ignoring DCI!\n"); return -1; } + config_bwp_ue(mac, &dci->bwp_indicator.val, dci_format); target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; ul_layers_config(mac, pusch_config_pdu, dci); ul_ports_config(mac, pusch_config_pdu, dci); - } else { - LOG_E(NR_MAC, "In %s: UL grant from DCI format %d is not handled...\n", __FUNCTION__, *dci_format); return -1; - } NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; + if (pusch_Config && pusch_Config->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = pusch_Config->pusch_TimeDomainAllocationList->choice.setup; - } - else if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Common&& - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon&& - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { + } else if (mac->ULbwp[0] && + mac->ULbwp[0]->bwp_Common&& + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon&& + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - } - else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) + } else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) pusch_TimeDomainAllocationList=mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; else AssertFatal(1==0,"need to fall back to default PUSCH time-domain allocations\n"); int mappingtype = pusch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType; - NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = NULL; + if(pusch_Config) { NR_DMRS_ulconfig = (mappingtype == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) ? pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup : pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; @@ -706,10 +658,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, /* TRANSFORM PRECODING ------------------------------------------------------------------------------------------*/ if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) { - pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; - uint32_t n_RS_Id = 0; + if (NR_DMRS_ulconfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) n_RS_Id = *NR_DMRS_ulconfig->transformPrecodingEnabled->nPUSCH_Identity; else @@ -720,29 +671,30 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, // V as specified in section 6.4.1.1.1.2 in 38.211 V = 0 if sequence hopping and group hopping are disabled if ((NR_DMRS_ulconfig->transformPrecodingEnabled->sequenceGroupHopping == NULL) && - (NR_DMRS_ulconfig->transformPrecodingEnabled->sequenceHopping == NULL)) - pusch_config_pdu->dfts_ofdm.low_papr_sequence_number = 0; + (NR_DMRS_ulconfig->transformPrecodingEnabled->sequenceHopping == NULL)) + pusch_config_pdu->dfts_ofdm.low_papr_sequence_number = 0; else AssertFatal(1==0,"SequenceGroupHopping or sequenceHopping are NOT Supported\n"); LOG_D(NR_MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d \n", pusch_config_pdu->num_dmrs_cdm_grps_no_data, - pusch_config_pdu->dfts_ofdm.low_papr_group_number); + pusch_config_pdu->dfts_ofdm.low_papr_group_number); } /* TRANSFORM PRECODING --------------------------------------------------------------------------------------------------------*/ /* IDENTIFIER_DCI_FORMATS */ /* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */ - if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, n_RB_ULBWP, 0, dci->frequency_domain_assignment.val) < 0){ + if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, n_RB_ULBWP, 0, dci->frequency_domain_assignment.val) < 0) { return -1; } + /* TIME_DOM_RESOURCE_ASSIGNMENT */ if (nr_ue_process_dci_time_dom_resource_assignment(mac, pusch_config_pdu, NULL, dci->time_domain_assignment.val,0,false) < 0) { return -1; } /* FREQ_HOPPING_FLAG */ - if ((pusch_Config!=NULL) && (pusch_Config->frequencyHopping!=NULL) && (pusch_Config->resourceAllocation != NR_PUSCH_Config__resourceAllocation_resourceAllocationType0)){ + if ((pusch_Config!=NULL) && (pusch_Config->frequencyHopping!=NULL) && (pusch_Config->resourceAllocation != NR_PUSCH_Config__resourceAllocation_resourceAllocationType0)) { pusch_config_pdu->frequency_hopping = dci->frequency_hopping_flag.val; } @@ -762,17 +714,21 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, pusch_config_pdu->pusch_data.rv_index = dci->rv; /* HARQ_PROCESS_NUMBER */ pusch_config_pdu->pusch_data.harq_process_id = dci->harq_pid; + /* TPC_PUSCH */ // according to TS 38.213 Table Table 7.1.1-1 if (dci->tpc == 0) { pusch_config_pdu->absolute_delta_PUSCH = -4; } + if (dci->tpc == 1) { pusch_config_pdu->absolute_delta_PUSCH = -1; } + if (dci->tpc == 2) { pusch_config_pdu->absolute_delta_PUSCH = 1; } + if (dci->tpc == 3) { pusch_config_pdu->absolute_delta_PUSCH = 4; } @@ -787,6 +743,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, mappingtype, add_pos, dmrslength, pusch_config_pdu->start_symbol_index, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position); + if ((mac->ULbwp[0] && pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled)) pusch_config_pdu->num_dmrs_cdm_grps_no_data = 1; else if (*dci_format == NR_UL_DCI_FORMAT_0_0 || (mac->ULbwp[0] && pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled)) @@ -800,16 +757,15 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead) N_PRB_oh = *mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead; - else N_PRB_oh = 0; /* PTRS */ if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Dedicated && - mac->ULbwp[0]->bwp_Dedicated->pusch_Config && - mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup && - mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB && - mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) { + mac->ULbwp[0]->bwp_Dedicated && + mac->ULbwp[0]->bwp_Dedicated->pusch_Config && + mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup && + mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB && + mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) { if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled) { nfapi_nr_ue_ptrs_ports_t ptrs_ports_list; pusch_config_pdu->pusch_ptrs.ptrs_ports_list = &ptrs_ports_list; @@ -818,23 +774,23 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, &pusch_config_pdu->pusch_ptrs.ptrs_freq_density,&pusch_config_pdu->pusch_ptrs.ptrs_time_density, &pusch_config_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,&pusch_config_pdu->pusch_ptrs.num_ptrs_ports, &pusch_config_pdu->pusch_ptrs.ul_ptrs_power, pusch_config_pdu->nr_of_symbols); + if(valid_ptrs_setup==true) { pusch_config_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; } + LOG_D(NR_MAC, "UL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", pusch_config_pdu->pusch_ptrs.ptrs_time_density, pusch_config_pdu->pusch_ptrs.ptrs_freq_density); } } - } LOG_D(NR_MAC, "In %s: received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n", - __FUNCTION__, - pusch_config_pdu->rb_start, - pusch_config_pdu->rb_size, - pusch_config_pdu->start_symbol_index, - pusch_config_pdu->nr_of_symbols, - rnti_types[rnti_type]); - + __FUNCTION__, + pusch_config_pdu->rb_start, + pusch_config_pdu->rb_size, + pusch_config_pdu->start_symbol_index, + pusch_config_pdu->nr_of_symbols, + rnti_types[rnti_type]); pusch_config_pdu->ul_dmrs_symb_pos = l_prime_mask; pusch_config_pdu->target_code_rate = nr_get_code_rate_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table); pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table); @@ -845,42 +801,35 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, } get_num_re_dmrs(pusch_config_pdu, &nb_dmrs_re_per_rb, &number_dmrs_symbols); - // Compute TBS pusch_config_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_config_pdu->qam_mod_order, - pusch_config_pdu->target_code_rate, - pusch_config_pdu->rb_size, - pusch_config_pdu->nr_of_symbols, - nb_dmrs_re_per_rb*number_dmrs_symbols, - N_PRB_oh, - 0, // TBR to verify tb scaling - pusch_config_pdu->nrOfLayers)/8; - + pusch_config_pdu->target_code_rate, + pusch_config_pdu->rb_size, + pusch_config_pdu->nr_of_symbols, + nb_dmrs_re_per_rb*number_dmrs_symbols, + N_PRB_oh, + 0, // TBR to verify tb scaling + pusch_config_pdu->nrOfLayers)/8; return 0; - } // Performs : // 1. TODO: Call RRC for link status return to PHY // 2. TODO: Perform SR/BSR procedures for scheduling feedback // 3. TODO: Perform PHR procedures -NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_indication_t *ul_info){ - - if (dl_info){ - +NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_indication_t *ul_info) { + if (dl_info) { module_id_t mod_id = dl_info->module_id; uint32_t gNB_index = dl_info->gNB_index; int cc_id = dl_info->cc_id; frame_t rx_frame = dl_info->frame; slot_t rx_slot = dl_info->slot; NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); - fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; - nr_scheduled_response_t scheduled_response; nr_dcireq_t dcireq; - if(mac->cg != NULL){ // we have a cg + if(mac->cg != NULL) { // we have a cg dcireq.module_id = mod_id; dcireq.gNB_index = gNB_index; dcireq.cc_id = cc_id; @@ -888,30 +837,31 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in dcireq.slot = rx_slot; dcireq.dl_config_req.number_pdus = 0; nr_ue_dcireq(&dcireq); //to be replaced with function pointer later - fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id); + if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); - } - else { + } else { // this is for Msg2/Msg4 if (mac->ra.ra_state >= WAIT_RAR) { fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; rel15->num_dci_options = mac->ra.ra_state == WAIT_RAR ? 1 : 2; rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0; + if (mac->ra.ra_state == WAIT_CONTENTION_RESOLUTION) rel15->dci_format_options[1] = NR_UL_DCI_FORMAT_0_0; // msg3 retransmission - config_dci_pdu(mac, rel15, dl_config, mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC , -1); + + config_dci_pdu(mac, rel15, dl_config, mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC, -1); fill_dci_search_candidates(mac->ra.ss, rel15); dl_config->number_pdus = 1; LOG_D(MAC,"mac->cg %p: Calling fill_scheduled_response rnti %x, type0_pdcch, num_pdus %d\n",mac->cg,rel15->rnti,dl_config->number_pdus); fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id); + if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); } } } else if (ul_info) { - int cc_id = ul_info->cc_id; frame_t rx_frame = ul_info->frame_rx; slot_t rx_slot = ul_info->slot_rx; @@ -919,51 +869,46 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in slot_t slot_tx = ul_info->slot_tx; module_id_t mod_id = ul_info->module_id; uint32_t gNB_index = ul_info->gNB_index; - NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); RA_config_t *ra = &mac->ra; - fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); // Schedule ULSCH only if the current frame and slot match those in ul_config_req // AND if a UL grant (UL DCI or Msg3) has been received (as indicated by num_pdus) - if (ul_config && (ul_info->slot_tx == ul_config->slot && ul_info->frame_tx == ul_config->sfn) && ul_config->number_pdus > 0){ - + if (ul_config && (ul_info->slot_tx == ul_config->slot && ul_info->frame_tx == ul_config->sfn) && ul_config->number_pdus > 0) { LOG_D(NR_MAC, "In %s:[%d.%d]: number of UL PDUs: %d with UL transmission in [%d.%d]\n", __FUNCTION__, frame_tx, slot_tx, ul_config->number_pdus, ul_config->sfn, ul_config->slot); - uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES]; nr_scheduled_response_t scheduled_response; fapi_nr_tx_request_t tx_req; for (int j = 0; j < ul_config->number_pdus; j++) { - fapi_nr_ul_config_request_pdu_t *ulcfg_pdu = &ul_config->ul_config_list[j]; if (ulcfg_pdu->pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) { - uint16_t TBS_bytes = ulcfg_pdu->pusch_config_pdu.pusch_data.tb_size; LOG_D(NR_MAC,"harq_id %d, NDI %d NDI_DCI %d, TBS_bytes %d\n", ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id, mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id], ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator, TBS_bytes); - if (ra->ra_state == WAIT_RAR && !ra->cfra){ + + if (ra->ra_state == WAIT_RAR && !ra->cfra) { memcpy(ulsch_input_buffer, mac->ulsch_pdu.payload, TBS_bytes); LOG_D(NR_MAC,"[RAPROC] Msg3 to be transmitted:\n"); + for (int k = 0; k < TBS_bytes; k++) { LOG_D(NR_MAC,"(%i): 0x%x\n",k,mac->ulsch_pdu.payload[k]); } + LOG_D(NR_MAC,"Flipping NDI for harq_id %d (Msg3)\n",ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator); mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator; mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = 0; } else { - if ((mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] != ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator || - mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id]==1) && + mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id]==1) && ((get_softmodem_params()->phy_test == 1) || - (ra->ra_state == RA_SUCCEEDED) || - (ra->ra_state == WAIT_RAR && ra->cfra))){ - + (ra->ra_state == RA_SUCCEEDED) || + (ra->ra_state == WAIT_RAR && ra->cfra))) { // Getting IP traffic to be transmitted nr_ue_get_sdu(mod_id, frame_tx, slot_tx, gNB_index, ulsch_input_buffer, TBS_bytes); } @@ -971,7 +916,6 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in LOG_D(NR_MAC,"Flipping NDI for harq_id %d\n",ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator); mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator; mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = 0; - } // Config UL TX PDU @@ -982,12 +926,13 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in tx_req.tx_request_body[0].pdu_index = j; tx_req.tx_request_body[0].pdu = ulsch_input_buffer; - if (ra->ra_state == WAIT_CONTENTION_RESOLUTION && !ra->cfra){ + if (ra->ra_state == WAIT_CONTENTION_RESOLUTION && !ra->cfra) { LOG_I(NR_MAC,"[RAPROC] RA-Msg3 retransmitted\n"); // 38.321 restart the ra-ContentionResolutionTimer at each HARQ retransmission in the first symbol after the end of the Msg3 transmission nr_Msg3_transmitted(ul_info->module_id, ul_info->cc_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->gNB_index); } - if (ra->ra_state == WAIT_RAR && !ra->cfra){ + + if (ra->ra_state == WAIT_RAR && !ra->cfra) { LOG_I(NR_MAC,"[RAPROC] RA-Msg3 transmitted\n"); nr_Msg3_transmitted(ul_info->module_id, ul_info->cc_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->gNB_index); } @@ -995,19 +940,20 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in } fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, mod_id, cc_id, rx_frame, rx_slot, ul_info->thread_id); - if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){ + + if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) { mac->if_module->scheduled_response(&scheduled_response); } } } if (dl_info) { - return (CONNECTION_OK); + return (CONNECTION_OK); } + module_id_t mod_id = ul_info->module_id; frame_t txFrameP = ul_info->frame_tx; slot_t txSlotP = ul_info->slot_tx; - // Handle the SR/BSR procedures per subframe NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); uint8_t gNB_indexP=0; @@ -1041,13 +987,13 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in "[UE %d][BSR] Regular BSR Triggered Frame %d slot %d SR for PUSCH is pending\n", mod_id, txFrameP, txSlotP); } - return UE_CONNECTION_OK; + return UE_CONNECTION_OK; } boolean_t nr_update_bsr(module_id_t module_idP, frame_t frameP, - slot_t slotP, uint8_t gNB_index) { + slot_t slotP, uint8_t gNB_index) { mac_rlc_status_resp_t rlc_status; boolean_t bsr_regular_triggered = FALSE; uint8_t lcid; @@ -1056,11 +1002,11 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, uint32_t lcgid_buffer_remain[NR_MAX_NUM_LCGID] = {0,0,0,0,0,0,0,0}; int32_t lcid_bytes_in_buffer[NR_MAX_NUM_LCID]; /* Array for ordering LCID with data per decreasing priority order */ - uint8_t lcid_reordered_array[NR_MAX_NUM_LCID]= - {NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, - NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, - NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, - NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + uint8_t lcid_reordered_array[NR_MAX_NUM_LCID]= { + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, }; uint8_t pos_next = 0; //uint8_t highest_priority = 16; @@ -1068,6 +1014,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, // Reset All BSR Infos lcid_bytes_in_buffer[0] = 0; NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); + for (lcid=DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { // Reset transmission status lcid_bytes_in_buffer[lcid] = 0; @@ -1095,7 +1042,6 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, lcid, 0, 0 ); - lcid_bytes_in_buffer[lcid] = rlc_status.bytes_in_buffer; if (rlc_status.bytes_in_buffer > 0) { @@ -1141,7 +1087,6 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, for (array_index = 0; array_index < num_lcid_with_data; array_index++) { lcid = lcid_reordered_array[array_index]; - /* UL data, for a logical channel which belongs to a LCG, becomes available for transmission in the RLC entity either the data belongs to a logical channel with higher priority than the priorities of the logical channels which belong to any LCG and for which data is already available for transmission @@ -1339,7 +1284,7 @@ int nr_get_sf_retxBSRTimer(uint8_t sf_offset) { // PUSCH scheduler: // - Calculate the slot in which ULSCH should be scheduled. This is current slot + K2, // - where K2 is the offset between the slot in which UL DCI is received and the slot -// - in which ULSCH should be scheduled. K2 is configured in RRC configuration. +// - in which ULSCH should be scheduled. K2 is configured in RRC configuration. // PUSCH Msg3 scheduler: // - scheduled by RAR UL grant according to 8.3 of TS 38.213 // Note: Msg3 tx in the uplink symbols of mixed slot @@ -1349,18 +1294,16 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, int current_slot, frame_t *frame_tx, int *slot_tx, - uint8_t tda_id){ - + uint8_t tda_id) { int delta = 0; NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; // Get the numerology to calculate the Tx frame and slot int mu = ubwp ? - ubwp->bwp_Common->genericParameters.subcarrierSpacing : - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing; - + ubwp->bwp_Common->genericParameters.subcarrierSpacing : + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing; NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ubwp ? - ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList: - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList: + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; // k2 as per 3GPP TS 38.214 version 15.9.0 Release 15 ch 6.1.2.1.1 // PUSCH time domain resource allocation is higher layer configured from uschTimeDomainAllocationList in either pusch-ConfigCommon int k2; @@ -1372,12 +1315,15 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, case 0: delta = 2; break; + case 1: delta = 3; break; + case 2: delta = 4; break; + case 3: delta = 6; break; @@ -1386,18 +1332,17 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, AssertFatal((k2+delta) >= DURATION_RX_TO_TX, "Slot offset (%d) for Msg3 cannot be less than DURATION_RX_TO_TX (%d)\n", k2+delta,DURATION_RX_TO_TX); - *slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu]; - if (current_slot + k2 + delta > nr_slots_per_frame[mu]){ + + if (current_slot + k2 + delta > nr_slots_per_frame[mu]) { *frame_tx = (current_frame + 1) % 1024; } else { *frame_tx = current_frame; } - } else { - // Get slot offset K2 which will be used to calculate TX slot k2 = get_k2(mac, tda_id); + if (k2 < 0) { // This can happen when a false DCI is received return -1; } @@ -1405,18 +1350,14 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, // Calculate TX slot and frame *slot_tx = (current_slot + k2) % nr_slots_per_frame[mu]; *frame_tx = ((current_slot + k2) > nr_slots_per_frame[mu]) ? (current_frame + 1) % 1024 : current_frame; - } LOG_D(NR_MAC, "In %s: currently at [%d.%d] UL transmission in [%d.%d] (k2 %d delta %d)\n", __FUNCTION__, current_frame, current_slot, *frame_tx, *slot_tx, k2, delta); - return 0; - } // Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config static void build_ro_list(NR_UE_MAC_INST_t *mac) { - int x,y; // PRACH Configuration Index table variables used to compute the valid frame numbers int y2; // PRACH Configuration Index table additional variable used to compute the valid frame numbers uint8_t slot_shift_for_map; @@ -1431,20 +1372,16 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { uint16_t format = 0xffff; uint8_t format2 = 0xff; int nb_fdm; - uint8_t config_index, mu; int msg1_FDM; - uint8_t prach_conf_period_idx; uint8_t nb_of_frames_per_prach_conf_period; uint8_t prach_conf_period_frame_idx; int64_t *prach_config_info_p; - NR_RACH_ConfigCommon_t *setup = (mac->scc) ? - mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; + mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; - config_index = rach_ConfigGeneric->prach_ConfigurationIndex; if (setup->msg1_SubcarrierSpacing) { @@ -1457,13 +1394,14 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { msg1_FDM = rach_ConfigGeneric->msg1_FDM; - switch (msg1_FDM){ + switch (msg1_FDM) { case 0: case 1: case 2: case 3: nb_fdm = 1 << msg1_FDM; break; + default: AssertFatal(1 == 0, "Unknown msg1_FDM from rach_ConfigGeneric %d\n", msg1_FDM); } @@ -1471,51 +1409,46 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { // Create the PRACH occasions map // ============================== // WIP: For now assume no rejected PRACH occasions because of conflict with SSB or TDD_UL_DL_ConfigurationCommon schedule - int unpaired = mac->phy_config.config_req.cell_config.frame_duplex_type; - prach_config_info_p = get_prach_config_info(mac->frequency_range, config_index, unpaired); - // Identify the proper PRACH Configuration Index table according to the operating frequency LOG_D(NR_MAC,"mu = %u, PRACH config index = %u, unpaired = %u\n", mu, config_index, unpaired); if (mac->frequency_range == FR2) { //FR2 - x = prach_config_info_p[2]; y = prach_config_info_p[3]; y2 = prach_config_info_p[4]; - s_map = prach_config_info_p[5]; - prach_conf_start_symbol = prach_config_info_p[6]; N_t_slot = prach_config_info_p[8]; N_dur = prach_config_info_p[9]; + if (prach_config_info_p[1] != -1) format2 = (uint8_t) prach_config_info_p[1]; - format = ((uint8_t) prach_config_info_p[0]) | (format2<<8); + format = ((uint8_t) prach_config_info_p[0]) | (format2<<8); slot_shift_for_map = mu-2; + if ( (mu == 3) && (prach_config_info_p[7] == 1) ) even_slot_invalid = true; else even_slot_invalid = false; - } - else { // FR1 + } else { // FR1 x = prach_config_info_p[2]; y = prach_config_info_p[3]; y2 = y; - s_map = prach_config_info_p[4]; - prach_conf_start_symbol = prach_config_info_p[5]; N_t_slot = prach_config_info_p[7]; N_dur = prach_config_info_p[8]; LOG_D(NR_MAC,"N_t_slot %d, N_dur %d\n",N_t_slot,N_dur); + if (prach_config_info_p[1] != -1) format2 = (uint8_t) prach_config_info_p[1]; - format = ((uint8_t) prach_config_info_p[0]) | (format2<<8); + format = ((uint8_t) prach_config_info_p[0]) | (format2<<8); slot_shift_for_map = mu; + if ( (mu == 1) && (prach_config_info_p[6] <= 1) ) // no prach in even slots @ 30kHz for 1 prach per subframe even_slot_invalid = true; @@ -1525,7 +1458,6 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { prach_assoc_pattern.nb_of_prach_conf_period_in_max_period = MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD / x; nb_of_frames_per_prach_conf_period = x; - LOG_D(NR_MAC,"nb_of_prach_conf_period_in_max_period %d\n", prach_assoc_pattern.nb_of_prach_conf_period_in_max_period); // Fill in the PRACH occasions table for every slot in every frame in every PRACH configuration periods in the maximum association pattern period @@ -1537,36 +1469,33 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion = 0; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_frame = nb_of_frames_per_prach_conf_period; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_slot = nr_slots_per_frame[mu]; - LOG_D(NR_MAC,"PRACH Conf Period Idx %d\n", prach_conf_period_idx); // For every frames in a PRACH configuration period // ------------------------------------------------ for (prach_conf_period_frame_idx=0; prach_conf_period_frame_idx> slot_shift_for_map; // in PRACH configuration index table slots are numbered wrt 60kHz + if ( (s_map>>map_shift)&0x01 ) { // Valid slot // Additionally, for 30kHz/120kHz, we must check for the n_RA_Slot param also if ( even_slot_invalid && (slot%2 == 0) ) - continue; // no prach in even slots @ 30kHz/120kHz for 1 prach per 60khz slot/subframe + continue; // no prach in even slots @ 30kHz/120kHz for 1 prach per 60khz slot/subframe // We're good: valid frame and valid slot // Compute all the PRACH occasions in the slot - uint8_t n_prach_occ_in_time; uint8_t n_prach_occ_in_freq; - prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_time = N_t_slot; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_freq = nb_fdm; @@ -1575,19 +1504,18 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { LOG_D(NR_MAC,"PRACH Occ in time %d\n", n_prach_occ_in_time); for (n_prach_occ_in_freq=0; n_prach_occ_in_freqstart_symbol = start_symbol; prach_occasion_p->fdm = n_prach_occ_in_freq; prach_occasion_p->frame = frame; prach_occasion_p->slot = slot; prach_occasion_p->format = format; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion++; - LOG_D(NR_MAC,"Adding a PRACH occasion: frame %u, slot-symbol %d-%d, occ_in_time-occ_in-freq %d-%d, nb ROs in conf period %d, for this slot: RO# in time %d, RO# in freq %d\n", - frame, slot, start_symbol, n_prach_occ_in_time, n_prach_occ_in_freq, prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion, - prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_time, - prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_freq); + frame, slot, start_symbol, n_prach_occ_in_time, n_prach_occ_in_freq, prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion, + prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_time, + prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_freq); } // For every freq in the slot } // For every time occasions in the slot } // Valid slot? @@ -1599,7 +1527,6 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { // Build the list of all the valid/transmitted SSBs according to the config static void build_ssb_list(NR_UE_MAC_INST_t *mac) { - // Create the list of transmitted SSBs // =================================== BIT_STRING_t *ssb_bitmap; @@ -1608,10 +1535,10 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { if (mac->scc) { NR_ServingCellConfigCommon_t *scc = mac->scc; + switch (scc->ssb_PositionsInBurst->present) { case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap: ssb_bitmap = &scc->ssb_PositionsInBurst->choice.shortBitmap; - ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); @@ -1622,12 +1549,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ssb_list.tx_ssb[ssb_idx].transmitted = true; LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx); } + ssb_idx++; } + break; + case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap: ssb_bitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap; - ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); @@ -1638,12 +1567,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ssb_list.tx_ssb[ssb_idx].transmitted = true; LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx); } + ssb_idx++; } + break; + case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap: ssb_bitmap = &scc->ssb_PositionsInBurst->choice.longBitmap; - ssb_positionsInBurst = BIT_STRING_to_uint64(ssb_bitmap); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); @@ -1654,20 +1585,20 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ssb_list.tx_ssb[ssb_idx].transmitted = true; LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx); } + ssb_idx++; } + break; + default: AssertFatal(false,"ssb_PositionsInBurst not present\n"); break; } } else { // This is configuration from SIB1 - AssertFatal(mac->scc_SIB->ssb_PositionsInBurst.groupPresence == NULL, "Handle case for >8 SSBs\n"); ssb_bitmap = &mac->scc_SIB->ssb_PositionsInBurst.inOneGroup; - ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap); - LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); for (uint8_t bit_nb=7; bit_nb<=7; bit_nb--) { @@ -1677,6 +1608,7 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ssb_list.tx_ssb[ssb_idx].transmitted = true; LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx); } + ssb_idx++; } } @@ -1684,15 +1616,13 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { // Map the transmitted SSBs to the ROs and create the association pattern according to the config static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { - // Map SSBs to PRACH occasions // =========================== // WIP: Assumption: No PRACH occasion is rejected because of a conflict with SSBs or TDD_UL_DL_ConfigurationCommon schedule NR_RACH_ConfigCommon_t *setup = (mac->scc) ? - mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; + mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR ssb_perRACH_config = setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present; - boolean_t multiple_ssb_per_ro; // true if more than one or exactly one SSB per RACH occasion, false if more than one RO per SSB uint8_t ssb_rach_ratio; // Nb of SSBs per RACH or RACHs per SSB uint16_t required_nb_of_prach_occasion; // Nb of RACH occasions required to map all the SSBs @@ -1700,55 +1630,63 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { // Determine the SSB to RACH mapping ratio // ======================================= - switch (ssb_perRACH_config){ + switch (ssb_perRACH_config) { case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_oneEighth: multiple_ssb_per_ro = false; ssb_rach_ratio = 8; break; + case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_oneFourth: multiple_ssb_per_ro = false; ssb_rach_ratio = 4; break; + case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_oneHalf: multiple_ssb_per_ro = false; ssb_rach_ratio = 2; break; + case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one: multiple_ssb_per_ro = true; ssb_rach_ratio = 1; break; + case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_two: multiple_ssb_per_ro = true; ssb_rach_ratio = 2; break; + case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_four: multiple_ssb_per_ro = true; ssb_rach_ratio = 4; break; + case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_eight: multiple_ssb_per_ro = true; ssb_rach_ratio = 8; break; + case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_sixteen: multiple_ssb_per_ro = true; ssb_rach_ratio = 16; break; + default: AssertFatal(1 == 0, "Unsupported ssb_perRACH_config %d\n", ssb_perRACH_config); break; } - LOG_D(NR_MAC,"SSB rach ratio %d, Multiple SSB per RO %d\n", ssb_rach_ratio, multiple_ssb_per_ro); + LOG_D(NR_MAC,"SSB rach ratio %d, Multiple SSB per RO %d\n", ssb_rach_ratio, multiple_ssb_per_ro); // Evaluate the number of PRACH configuration periods required to map all the SSBs and set the association period // ============================================================================================================== // WIP: Assumption for now is that all the PRACH configuration periods within a maximum association pattern period have the same number of PRACH occasions // (No PRACH occasions are conflicting with SSBs nor TDD_UL_DL_ConfigurationCommon schedule) // There is only one possible association period which can contain up to 16 PRACH configuration periods LOG_D(NR_MAC,"Evaluate the number of PRACH configuration periods required to map all the SSBs and set the association period\n"); + if (true == multiple_ssb_per_ro) { required_nb_of_prach_occasion = ((ssb_list.nb_tx_ssb-1) + ssb_rach_ratio) / ssb_rach_ratio; - } - else { + } else { required_nb_of_prach_occasion = ssb_list.nb_tx_ssb * ssb_rach_ratio; } @@ -1760,47 +1698,40 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { if (required_nb_of_prach_conf_period == 1) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 1; - } - else if (required_nb_of_prach_conf_period == 2) { + } else if (required_nb_of_prach_conf_period == 2) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 2; - } - else if (required_nb_of_prach_conf_period <= 4) { + } else if (required_nb_of_prach_conf_period <= 4) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 4; - } - else if (required_nb_of_prach_conf_period <= 8) { + } else if (required_nb_of_prach_conf_period <= 8) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 8; - } - else if (required_nb_of_prach_conf_period <= 16) { + } else if (required_nb_of_prach_conf_period <= 16) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 16; - } - else { + } else { AssertFatal(1 == 0, "Invalid number of PRACH config periods within an association period %d\n", required_nb_of_prach_conf_period); } prach_assoc_pattern.nb_of_assoc_period = 1; // WIP: only one possible association period - prach_assoc_pattern.prach_association_period_list[0].nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period * prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame; + prach_assoc_pattern.prach_association_period_list[0].nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period * + prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame; prach_assoc_pattern.nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_frame; - LOG_D(NR_MAC,"Assoc period %d, Nb of frames in assoc period %d\n", prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period, prach_assoc_pattern.prach_association_period_list[0].nb_of_frame); - // Proceed to the SSB to RO mapping // ================================ uint8_t association_period_idx; // Association period index within the association pattern uint8_t ssb_idx = 0; uint8_t prach_configuration_period_idx; // PRACH Configuration period index within the association pattern prach_conf_period_t *prach_conf_period_p; - // Map all the association periods within the association pattern period LOG_D(NR_MAC,"Proceed to the SSB to RO mapping\n"); + for (association_period_idx=0; association_period_idx ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro); - LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq); @@ -1875,32 +1804,26 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { } // for n_prach_conf // WIP: note that there is no re-mapping of the SSBs within the association period since there is no invalid ROs in the PRACH config periods that would create this situation - } // if multiple_ssbs_per_ro - else { // -------------------- // -------------------- // Multiple ROs per SSB // -------------------- // -------------------- - n_prach_conf = 0; // Go through the list of transmitted SSBs for (ssb_idx=0; ssb_idx %d\n", - ssb_idx,ssb_list.tx_ssb[ssb_idx].transmitted); + LOG_D(NR_MAC,"Checking ssb_idx %d => %d\n", + ssb_idx,ssb_list.tx_ssb[ssb_idx].transmitted); // Map only the transmitted ssb_idx if (true == ssb_list.tx_ssb[ssb_idx].transmitted) { - // Map all the required ROs to this SSB // Go through the list of PRACH config periods within this association period for (; n_prach_confprach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_time; ro_in_time++) { for (; ro_in_freqprach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq; ro_in_freq++) { prach_occasion_info_t *ro_p = &prach_conf_period_p->prach_occasion_slot_map[frame][slot].prach_occasion[ro_in_time][ro_in_freq]; - ro_p->mapped_ssb_idx[0] = ssb_idx; ro_p->nb_mapped_ssb = 1; ssb_list.tx_ssb[ssb_idx].mapped_ro[ssb_list.tx_ssb[ssb_idx].nb_mapped_ro] = ro_p; @@ -1918,7 +1840,6 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { AssertFatal(MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN > ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro); nb_mapped_ro_in_association_period++; - LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq); @@ -1937,49 +1858,40 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { // Exit the loop if this SSB has been mapped to all the required ROs if (nb_mapped_ro_in_association_period == ssb_rach_ratio) { break; - } - else ro_in_freq = 0; // else go to the next time symbol in that slot and reset the freq index + } else ro_in_freq = 0; // else go to the next time symbol in that slot and reset the freq index } // for ro_in_time // Exit the loop if this SSB has been mapped to all the required ROs if (nb_mapped_ro_in_association_period == ssb_rach_ratio) { break; - } - else ro_in_time = 0; // else go to the next slot in that PRACH config period and reset the symbol index + } else ro_in_time = 0; // else go to the next slot in that PRACH config period and reset the symbol index } // for slot // Exit the loop if this SSB has been mapped to all the required ROs if (nb_mapped_ro_in_association_period == ssb_rach_ratio) { break; - } - else slot = 0; // else go to the next frame in that PRACH config period and reset the slot index + } else slot = 0; // else go to the next frame in that PRACH config period and reset the slot index } // for frame // Exit the loop if this SSB has been mapped to all the required ROs if (nb_mapped_ro_in_association_period == ssb_rach_ratio) { break; - } - else frame = 0; // else go to the next PRACH config period in that association period and reset the frame index + } else frame = 0; // else go to the next PRACH config period in that association period and reset the frame index } // for n_prach_conf - } // if ssb_idx is transmitted } // for ssb_idx } // else if multiple_ssbs_per_ro - } // for association_period_index } // Returns a RACH occasion if any matches the SSB idx, the frame and the slot static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, - int frame, - int slot, - prach_occasion_info_t **prach_occasion_info_pp) { - + int frame, + int slot, + prach_occasion_info_t **prach_occasion_info_pp) { ssb_info_t *ssb_info_p; prach_occasion_slot_t *prach_occasion_slot_p = NULL; - *prach_occasion_info_pp = NULL; - // Search for a matching RO slot in the SSB_to_RO map // A valid RO slot will match: // - ssb_idx mapped to one of the ROs in that RO slot @@ -1987,12 +1899,13 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, // - frame offset ssb_info_p = &ssb_list.tx_ssb[ssb_idx]; LOG_D(NR_MAC,"checking for prach : ssb_info_p->nb_mapped_ro %d\n",ssb_info_p->nb_mapped_ro); + for (uint8_t n_mapped_ro=0; n_mapped_ronb_mapped_ro; n_mapped_ro++) { LOG_D(NR_MAC,"%d.%d: mapped_ro[%d]->frame.slot %d.%d, prach_assoc_pattern.nb_of_frame %d\n", frame,slot,n_mapped_ro,ssb_info_p->mapped_ro[n_mapped_ro]->frame,ssb_info_p->mapped_ro[n_mapped_ro]->slot,prach_assoc_pattern.nb_of_frame); + if ((slot == ssb_info_p->mapped_ro[n_mapped_ro]->slot) && (ssb_info_p->mapped_ro[n_mapped_ro]->frame == (frame % prach_assoc_pattern.nb_of_frame))) { - uint8_t prach_config_period_nb = ssb_info_p->mapped_ro[n_mapped_ro]->frame / prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame; uint8_t frame_nb_in_prach_config_period = ssb_info_p->mapped_ro[n_mapped_ro]->frame % prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame; prach_occasion_slot_p = &prach_assoc_pattern.prach_conf_period_list[prach_config_period_nb].prach_occasion_slot_map[frame_nb_in_prach_config_period][slot]; @@ -2000,10 +1913,8 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, } // If there is a matching RO slot in the SSB_to_RO map - if (NULL != prach_occasion_slot_p) - { + if (NULL != prach_occasion_slot_p) { // A random RO mapped to the SSB index should be selected in the slot - // First count the number of times the SSB index is found in that RO uint8_t nb_mapped_ssb = 0; @@ -2021,11 +1932,10 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, // Choose a random SSB nb uint8_t random_ssb_nb = 0; - random_ssb_nb = ((taus()) % nb_mapped_ssb); - // Select the RO according to the chosen random SSB nb nb_mapped_ssb=0; + for (int ro_in_time=0; ro_in_time < prach_occasion_slot_p->nb_of_prach_occasion_in_time; ro_in_time++) { for (int ro_in_freq=0; ro_in_freq < prach_occasion_slot_p->nb_of_prach_occasion_in_freq; ro_in_freq++) { prach_occasion_info_t *prach_occasion_info_p = &prach_occasion_slot_p->prach_occasion[ro_in_time][ro_in_freq]; @@ -2035,8 +1945,7 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, if (nb_mapped_ssb == random_ssb_nb) { *prach_occasion_info_pp = prach_occasion_info_p; return 1; - } - else { + } else { nb_mapped_ssb++; } } @@ -2050,19 +1959,15 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, // Build the SSB to RO mapping upon RRC configuration update void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac) { - // Clear all the lists and maps memset(&prach_assoc_pattern, 0, sizeof(prach_association_pattern_t)); memset(&ssb_list, 0, sizeof(ssb_list_info_t)); - // Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config LOG_D(NR_MAC,"Build RO list\n"); build_ro_list(mac); - // Build the list of all the valid/transmitted SSBs according to the config LOG_D(NR_MAC,"Build SSB list\n"); build_ssb_list(mac); - // Map the transmitted SSBs to the ROs and create the association pattern according to the config LOG_D(NR_MAC,"Map SSB to RO\n"); map_ssb_to_ro(mac); @@ -2071,13 +1976,11 @@ void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac) { void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, int thread_id) { - NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); int O_SR = 0; int O_ACK = 0; int O_CSI = 0; int N_UCI = 0; - PUCCH_sched_t *pucch = calloc(1,sizeof(*pucch)); pucch->resource_indicator = -1; pucch->initial_pucch_id = -1; @@ -2098,7 +2001,6 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in // ACKNACK O_ACK = get_downlink_ack(mac, frameP, slotP, pucch); - NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; NR_PUCCH_Config_t *pucch_Config = NULL; @@ -2108,18 +2010,16 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) { pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup; + } else if (bwp_id==0 && + mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { + pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; } - else if (bwp_id==0 && - mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { - pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; - } - // if multiplexing of HARQ and CSI is not possible, transmit only HARQ bits if ((O_ACK != 0) && (O_CSI != 0) && @@ -2138,7 +2038,6 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in return; if (N_UCI > 0) { - pucch->resource_set_id = find_pucch_resource_set(mac, N_UCI); select_pucch_resource(mac, pucch); fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slotP); @@ -2152,10 +2051,10 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in fill_ul_config(ul_config, frameP, slotP, FAPI_NR_UL_CONFIG_TYPE_PUCCH); nr_scheduled_response_t scheduled_response; fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id); + if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); } - } // This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x @@ -2163,73 +2062,59 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in // - todo: // - Partial configuration is actually already stored in (fapi_nr_prach_config_t) &mac->phy_config.config_req->prach_config void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int thread_id) { - uint16_t format, format0, format1, ncs; int is_nr_prach_slot; prach_occasion_info_t *prach_occasion_info_p; - NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); RA_config_t *ra = &mac->ra; - //fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slotP); fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request[0]; fapi_nr_ul_config_prach_pdu *prach_config_pdu; fapi_nr_config_request_t *cfg = &mac->phy_config.config_req; fapi_nr_prach_config_t *prach_config = &cfg->prach_config; nr_scheduled_response_t scheduled_response; - NR_ServingCellConfigCommon_t *scc = mac->scc; NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB; NR_RACH_ConfigCommon_t *setup; + if (scc!=NULL) setup = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup; else setup = scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; - NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; + NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; ra->RA_offset = 2; // to compensate the rx frame offset at the gNB ra->generate_nr_prach = GENERATE_IDLE; // Reset flag for PRACH generation NR_TDD_UL_DL_ConfigCommon_t *tdd_config = scc==NULL ? scc_SIB->tdd_UL_DL_ConfigurationCommon : scc->tdd_UL_DL_ConfigurationCommon; if (is_nr_UL_slot(tdd_config, slotP, mac->frame_type)) { - // WIP Need to get the proper selected ssb_idx // Initial beam selection functionality is not available yet uint8_t selected_gnb_ssb_idx = mac->mib_ssb; - // Get any valid PRACH occasion in the current slot for the selected SSB index is_nr_prach_slot = get_nr_prach_info_from_ssb_index(selected_gnb_ssb_idx, - (int)frameP, - (int)slotP, - &prach_occasion_info_p); + (int)frameP, + (int)slotP, + &prach_occasion_info_p); if (is_nr_prach_slot && ra->ra_state == RA_UE_IDLE) { AssertFatal(NULL != prach_occasion_info_p,"PRACH Occasion Info not returned in a valid NR Prach Slot\n"); - ra->generate_nr_prach = GENERATE_PREAMBLE; - format = prach_occasion_info_p->format; format0 = format & 0xff; // single PRACH format format1 = (format >> 8) & 0xff; // dual PRACH format - prach_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].prach_config_pdu; memset(prach_config_pdu, 0, sizeof(fapi_nr_ul_config_prach_pdu)); - fill_ul_config(ul_config, frameP, slotP, FAPI_NR_UL_CONFIG_TYPE_PRACH); - LOG_D(PHY, "In %s: (%p) %d UL PDUs:\n", __FUNCTION__, ul_config, ul_config->number_pdus); - ncs = get_NCS(rach_ConfigGeneric->zeroCorrelationZoneConfig, format0, setup->restrictedSetConfig); - prach_config_pdu->phys_cell_id = mac->physCellId; prach_config_pdu->num_prach_ocas = 1; prach_config_pdu->prach_slot = prach_occasion_info_p->slot; prach_config_pdu->prach_start_symbol = prach_occasion_info_p->start_symbol; prach_config_pdu->num_ra = prach_occasion_info_p->fdm; - prach_config_pdu->num_cs = ncs; prach_config_pdu->root_seq_id = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].prach_root_sequence_index; prach_config_pdu->restricted_set = prach_config->restricted_set_config; prach_config_pdu->freq_msg1 = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].k1; - LOG_D(NR_MAC,"Selected RO Frame %u, Slot %u, Symbol %u, Fdm %u\n", frameP, prach_config_pdu->prach_slot, prach_config_pdu->prach_start_symbol, prach_config_pdu->num_ra); // Search which SSB is mapped in the RO (among all the SSBs mapped to this RO) @@ -2237,6 +2122,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s if (prach_occasion_info_p->mapped_ssb_idx[prach_config_pdu->ssb_nb_in_ro] == selected_gnb_ssb_idx) break; } + AssertFatal(prach_config_pdu->ssb_nb_in_ronb_mapped_ssb, "%u not found in the mapped SSBs to the PRACH occasion", selected_gnb_ssb_idx); if (format1 != 0xff) { @@ -2244,55 +2130,71 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s case 0xa1: prach_config_pdu->prach_format = 11; break; + case 0xa2: prach_config_pdu->prach_format = 12; break; + case 0xa3: prach_config_pdu->prach_format = 13; break; - default: - AssertFatal(1 == 0, "Only formats A1/B1 A2/B2 A3/B3 are valid for dual format"); + + default: + AssertFatal(1 == 0, "Only formats A1/B1 A2/B2 A3/B3 are valid for dual format"); } } else { switch(format0) { // single PRACH format case 0: prach_config_pdu->prach_format = 0; break; + case 1: prach_config_pdu->prach_format = 1; break; + case 2: prach_config_pdu->prach_format = 2; break; + case 3: prach_config_pdu->prach_format = 3; break; + case 0xa1: prach_config_pdu->prach_format = 4; break; + case 0xa2: prach_config_pdu->prach_format = 5; break; + case 0xa3: prach_config_pdu->prach_format = 6; break; + case 0xb1: prach_config_pdu->prach_format = 7; break; + case 0xb4: prach_config_pdu->prach_format = 8; break; + case 0xc0: prach_config_pdu->prach_format = 9; break; + case 0xc2: prach_config_pdu->prach_format = 10; break; + default: AssertFatal(1 == 0, "Invalid PRACH format"); } } // if format1 + fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id); + if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); } // is_nr_prach_slot @@ -2308,16 +2210,13 @@ void nr_ue_sib1_scheduler(module_id_t module_idP, uint32_t ssb_index, uint16_t ssb_start_subcarrier, frequency_range_t frequency_range) { - NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); nr_scheduled_response_t scheduled_response; int frame_s,slot_s,ret; fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15; - uint8_t scs_ssb = get_softmodem_params()->numerology; uint16_t ssb_offset_point_a = (ssb_start_subcarrier - ssb_subcarrier_offset)/12; - get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config, frame, mac->mib, @@ -2331,12 +2230,13 @@ void nr_ue_sib1_scheduler(module_id_t module_idP, ssb_offset_point_a); if(mac->search_space_zero == NULL) mac->search_space_zero=calloc(1,sizeof(*mac->search_space_zero)); + if(mac->coreset0 == NULL) mac->coreset0 = calloc(1,sizeof(*mac->coreset0)); for (int i=0; i<3; i++) { // loop over possible aggregation levels - fill_coresetZero(mac->coreset0, &mac->type0_PDCCH_CSS_config); ret = fill_searchSpaceZero(mac->search_space_zero, &mac->type0_PDCCH_CSS_config,4<dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; rel15->num_dci_options = 1; @@ -2344,27 +2244,28 @@ void nr_ue_sib1_scheduler(module_id_t module_idP, config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1); fill_dci_search_candidates(mac->search_space_zero, rel15); - if(mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern == 1){ + if(mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern == 1) { // same frame as ssb if ((mac->type0_PDCCH_CSS_config.frame & 0x1) == mac->type0_PDCCH_CSS_config.sfn_c) frame_s = 0; else frame_s = 1; + slot_s = mac->type0_PDCCH_CSS_config.n_0; - } - else{ + } else { frame_s = 0; // same frame as ssb slot_s = mac->type0_PDCCH_CSS_config.n_c; } + LOG_D(MAC,"Calling fill_scheduled_response, type0_pdcch, num_pdus %d\n",dl_config->number_pdus); fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, module_idP, cc_id, frame_s, slot_s, 0); // TODO fix thread_id, for now assumed 0 } } + if (dl_config->number_pdus) { if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); - } - else + } else AssertFatal(1==0,"Unable to find aggregation level for type0 CSS\n"); } @@ -2388,7 +2289,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, uint8_t gNB_index, uint8_t *ulsch_buffer, uint16_t buflen) { - int16_t buflen_remain = 0; uint8_t bsr_len = 0, bsr_ce_len = 0, bsr_header_len = 0; //uint8_t phr_header_len = 0, phr_ce_len = 0, phr_len = 0; @@ -2413,10 +2313,8 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, //int highest_priority = 16; int num_lcg_id_with_data = 0; const uint8_t sh_size = sizeof(NR_MAC_SUBHEADER_LONG); - // Pointer used to build the MAC PDU by placing the RLC SDUs in the ULSCH buffer uint8_t *pdu = ulsch_buffer; - // Preparing the MAC CEs sub-PDUs and get the total size bsr_header_len = 0; //phr_header_len = 1; //sizeof(SCH_SUBHEADER_FIXED); @@ -2474,16 +2372,13 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, bsr_len = bsr_ce_len + bsr_header_len; int tot_mac_ce_len = bsr_len + phr_len; uint8_t total_mac_pdu_header_len = tot_mac_ce_len; - LOG_D(NR_MAC, "In %s: [UE %d] [%d.%d] process UL transport block at with size TBS = %d bytes \n", __FUNCTION__, module_idP, frameP, subframe, buflen); // Check for DCCH first // TO DO: Multiplex in the order defined by the logical channel prioritization for (lcid = UL_SCH_LCID_SRB1; lcid < MAX_LCID; lcid++) { - buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total + sh_size); - LOG_D(NR_MAC, "In %s: [UE %d] [%d.%d] UL-DXCH -> ULSCH, RLC with LCID 0x%02x (TBS %d bytes, sdu_length_total %d bytes, MAC header len %d bytes, buflen_remain %d bytes)\n", __FUNCTION__, module_idP, @@ -2495,13 +2390,10 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, tot_mac_ce_len, buflen_remain); - while (buflen_remain > 0){ - + while (buflen_remain > 0) { // Pointer used to build the MAC sub-PDU headers in the ULSCH buffer for each SDU NR_MAC_SUBHEADER_LONG *header = (NR_MAC_SUBHEADER_LONG *) pdu; - pdu += sh_size; - sdu_length = mac_rlc_data_req(module_idP, mac->crnti, gNB_index, @@ -2513,7 +2405,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, (char *)pdu, 0, 0); - AssertFatal(buflen_remain >= sdu_length, "In %s: LCID = 0x%02x RLC has segmented %d bytes but MAC has max %d remaining bytes\n", __FUNCTION__, lcid, @@ -2521,32 +2412,26 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, buflen_remain); if (sdu_length > 0) { - LOG_D(NR_MAC, "In %s: Generating UL MAC sub-PDU for SDU %d, length %d bytes, RB with LCID 0x%02x (buflen (TBS) %d bytes)\n", __FUNCTION__, - num_sdus + 1, - sdu_length, - lcid, - buflen); - + num_sdus + 1, + sdu_length, + lcid, + buflen); header->R = 0; header->F = 1; header->LCID = lcid; header->L1 = ((unsigned short) sdu_length >> 8) & 0x7f; header->L2 = (unsigned short) sdu_length & 0xff; - - #ifdef ENABLE_MAC_PAYLOAD_DEBUG +#ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: dumping MAC sub-header with length %d: \n", __FUNCTION__, sh_size); log_dump(NR_MAC, header, sh_size, LOG_DUMP_CHAR, "\n"); LOG_I(NR_MAC, "In %s: dumping MAC SDU with length %d \n", __FUNCTION__, sdu_length); log_dump(NR_MAC, pdu, sdu_length, LOG_DUMP_CHAR, "\n"); - #endif - +#endif pdu += sdu_length; sdu_length_total += sdu_length; total_mac_pdu_header_len += sh_size; - num_sdus++; - } else { pdu -= sh_size; LOG_D(NR_MAC, "In %s: no data to transmit for RB with LCID 0x%02x\n", __FUNCTION__, lcid); @@ -2554,7 +2439,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total + sh_size); - //Update Buffer remain and BSR bytes after transmission mac->scheduling_info.LCID_buffer_remain[lcid] -= sdu_length; mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] -= sdu_length; @@ -2562,6 +2446,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, "[UE %d] Update BSR [%d.%d] num_lcg_id_with_data %d. BSR_bytes for LCG%d=%d\n", module_idP, frameP, subframe, num_lcg_id_with_data, mac->scheduling_info.LCGID[lcid], mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]]); + if (mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] < 0) mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] = 0; @@ -2581,17 +2466,18 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, lcg_id_bsr_trunc = 0; for (lcg_id = 0; lcg_id < NR_MAX_NUM_LCGID; lcg_id++) { - if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { + if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { mac->scheduling_info.BSR[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE, NR_SHORT_BSR_TABLE_SIZE, - mac->scheduling_info. - BSR_bytes[lcg_id]); - } else { + mac->scheduling_info. + BSR_bytes[lcg_id]); + } else { mac->scheduling_info.BSR[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE, NR_LONG_BSR_TABLE_SIZE, - mac->scheduling_info. - BSR_bytes[lcg_id]); - } + mac->scheduling_info. + BSR_bytes[lcg_id]); + } + if (mac->scheduling_info.BSR_bytes[lcg_id]) { num_lcg_id_with_data++; lcg_id_bsr_trunc = lcg_id; @@ -2628,8 +2514,8 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // REPORT SHORT TRUNCATED BSR //Get LCGID of highest priority LCID with data for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { -// if (mac-> -// logicalChannelConfig[lcid] != NULL) { + // if (mac-> + // logicalChannelConfig[lcid] != NULL) { if (1) { // todo lcg_id = mac->scheduling_info. @@ -2639,14 +2525,14 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, && (mac-> scheduling_info.BSR_bytes[lcg_id]) && -// (mac->logicalChannelConfig -// [lcid]->ul_SpecificParameters->priority <= -// highest_priority)) { + // (mac->logicalChannelConfig + // [lcid]->ul_SpecificParameters->priority <= + // highest_priority)) { (1)) { //todo -// highest_priority = -// mac-> -// logicalChannelConfig[lcid]-> -// ul_SpecificParameters->priority; + // highest_priority = + // mac-> + // logicalChannelConfig[lcid]-> + // ul_SpecificParameters->priority; lcg_id_bsr_trunc = lcg_id; } } @@ -2736,32 +2622,26 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } if (tot_mac_ce_len > 0) { - LOG_D(NR_MAC, "In %s copying %d bytes of MAC CEs to the UL PDU \n", __FUNCTION__, tot_mac_ce_len); nr_write_ce_ulsch_pdu(pdu, mac, 0, NULL, bsr_t, bsr_s, bsr_l); pdu += (unsigned char) tot_mac_ce_len; - - #ifdef ENABLE_MAC_PAYLOAD_DEBUG +#ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: dumping MAC CE with length tot_mac_ce_len %d: \n", __FUNCTION__, tot_mac_ce_len); log_dump(NR_MAC, mac_header_control_elements, tot_mac_ce_len, LOG_DUMP_CHAR, "\n"); - #endif - +#endif } buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total); // Compute final offset for padding and fill remainder of ULSCH with 0 if (buflen_remain > 0) { - - LOG_D(NR_MAC, "In %s filling remainder %d bytes to the UL PDU \n", __FUNCTION__, buflen_remain); + LOG_D(NR_MAC, "In %s filling remainder %d bytes to the UL PDU \n", __FUNCTION__, buflen_remain); ((NR_MAC_SUBHEADER_FIXED *) pdu)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) pdu)->LCID = UL_SCH_LCID_PADDING; - - #ifdef ENABLE_MAC_PAYLOAD_DEBUG +#ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: padding MAC sub-header with length %ld bytes \n", __FUNCTION__, sizeof(NR_MAC_SUBHEADER_FIXED)); log_dump(NR_MAC, pdu, sizeof(NR_MAC_SUBHEADER_FIXED), LOG_DUMP_CHAR, "\n"); - #endif - +#endif pdu++; buflen_remain--; @@ -2773,18 +2653,16 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, memset(pdu, 0, buflen_remain); } - #ifdef ENABLE_MAC_PAYLOAD_DEBUG +#ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: MAC padding sub-PDU with length %d bytes \n", __FUNCTION__, buflen_remain); log_dump(NR_MAC, pdu, buflen_remain, LOG_DUMP_CHAR, "\n"); - #endif - +#endif } - #ifdef ENABLE_MAC_PAYLOAD_DEBUG +#ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: dumping MAC PDU with length %d: \n", __FUNCTION__, buflen); log_dump(NR_MAC, ulsch_buffer, buflen, LOG_DUMP_CHAR, "\n"); - #endif - +#endif LOG_D(NR_MAC, "[UE %d][SR] Gave SDU to PHY, clearing any scheduling request\n", module_idP); @@ -2799,7 +2677,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // Reset ReTx BSR Timer mac->scheduling_info.retxBSR_SF = nr_get_sf_retxBSRTimer(mac-> - scheduling_info.retxBSR_Timer); + scheduling_info.retxBSR_Timer); LOG_D(NR_MAC, "[UE %d] MAC ReTx BSR Timer Reset =%d\n", module_idP, mac->scheduling_info.retxBSR_SF); @@ -2809,7 +2687,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity)) { mac->scheduling_info.periodicBSR_SF = nr_get_sf_periodicBSRTimer(mac->scheduling_info. - periodicBSR_Timer); + periodicBSR_Timer); LOG_D(NR_MAC, "[UE %d] MAC Periodic BSR Timer Reset =%d\n", module_idP, mac->scheduling_info.periodicBSR_SF); @@ -2820,5 +2698,4 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } return num_sdus > 0 ? 1 : 0; - } From cf0430a5bc444aee126bd901a83151645a3f9eec Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Wed, 29 Sep 2021 12:15:58 -0700 Subject: [PATCH 039/102] Correctly packing UCI indications. Also, removing memset for def_dci_pdu_rel15 because it is setting the DL_BWP_ID = 0 before we have used it. --- nfapi/open-nFAPI/nfapi/src/nfapi_p7.c | 4 ++-- openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 2 +- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 1 - 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c b/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c index 919fc577a9..97e22d3747 100644 --- a/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c +++ b/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c @@ -3301,8 +3301,8 @@ static uint8_t pack_nr_uci_indication(void *msg, uint8_t **ppWritePackedMsg, uin for(int i=0; inum_ucis;i++) { - if(!pack_nr_uci_indication_body(pNfapiMsg->uci_list,ppWritePackedMsg,end)) - return 0; + if (!pack_nr_uci_indication_body(&pNfapiMsg->uci_list[i], ppWritePackedMsg, end)) + return 0; } return 1; diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index 954b9867dc..4bf3717c9b 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -184,7 +184,7 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response uci_ind->uci_list[j].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t); pdu_0_1->pduBitmap = 2; // (value->pduBitmap >> 1) & 0x01) == HARQ and (value->pduBitmap) & 0x01) == SR pdu_0_1->handle = 0; - pdu_0_1->rnti = dl_config->dl_config_list[0].dlsch_config_pdu.rnti; + pdu_0_1->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti; pdu_0_1->pucch_format = 1; pdu_0_1->ul_cqi = 27; pdu_0_1->timing_advance = 0; diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 318efebfd7..ace5a2d536 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -905,7 +905,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dci_index->dci_format]; g_harq_pid = def_dci_pdu_rel15->harq_pid; LOG_D(NR_MAC, "Setting harq_pid = %d and dci_index = %d (based on format)\n", g_harq_pid, dci_index->dci_format); - memset(def_dci_pdu_rel15, 0, sizeof(*def_dci_pdu_rel15)); ret_mask |= (ret << FAPI_NR_DCI_IND); if (ret >= 0) { From b2d1052fe91db5aacdc99dbb22caf2dce829fab2 Mon Sep 17 00:00:00 2001 From: David Kim Date: Thu, 30 Sep 2021 17:07:44 -0700 Subject: [PATCH 040/102] Added some config files after restoring original config files. --- ci-scripts/conf_files/episci_nr-ue.nfapi.conf | 44 +++ .../episci_rcc.band7.tm1.nfapi.conf | 247 ++++++++++++++++ ci-scripts/conf_files/episci_ue.nfapi.conf | 44 +++ .../conf_files/rcc.band7.tm1.nfapi.conf | 27 +- ci-scripts/conf_files/ue.nfapi.conf | 4 +- .../episci_rcc.band78.tm1.106PRB.nfapi.conf | 265 ++++++++++++++++++ .../CONF/rcc.band78.tm1.106PRB.nfapi.conf | 140 +++++---- 7 files changed, 698 insertions(+), 73 deletions(-) create mode 100644 ci-scripts/conf_files/episci_nr-ue.nfapi.conf create mode 100644 ci-scripts/conf_files/episci_rcc.band7.tm1.nfapi.conf create mode 100644 ci-scripts/conf_files/episci_ue.nfapi.conf create mode 100644 targets/PROJECTS/GENERIC-LTE-EPC/CONF/episci_rcc.band78.tm1.106PRB.nfapi.conf diff --git a/ci-scripts/conf_files/episci_nr-ue.nfapi.conf b/ci-scripts/conf_files/episci_nr-ue.nfapi.conf new file mode 100644 index 0000000000..b12e0c8d05 --- /dev/null +++ b/ci-scripts/conf_files/episci_nr-ue.nfapi.conf @@ -0,0 +1,44 @@ +log_config = { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="medium"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="full"; +}; + + +L1s = ( + { + num_cc = 1; + tr_n_preference = "nfapi"; + local_n_if_name = "ens3"; + remote_n_address = "127.0.0.1"; //Proxy IP + local_n_address = "127.0.0.1"; + local_n_portc = 50600; + remote_n_portc = 50601; + local_n_portd = 50610; + remote_n_portd = 50611; + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 1 + nb_rx = 1 + att_tx = 90 + att_rx = 0; + bands = [7,38,42,43]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 125; + } +); diff --git a/ci-scripts/conf_files/episci_rcc.band7.tm1.nfapi.conf b/ci-scripts/conf_files/episci_rcc.band7.tm1.nfapi.conf new file mode 100644 index 0000000000..4e596f81b5 --- /dev/null +++ b/ci-scripts/conf_files/episci_rcc.band7.tm1.nfapi.conf @@ -0,0 +1,247 @@ +Active_eNBs = ( "eNB-Eurecom-LTEBox"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +eNBs = +( + { + ////////// Identification parameters: + eNB_ID = 0xe00; + + cell_type = "CELL_MACRO_ENB"; + + eNB_name = "eNB-Eurecom-LTEBox"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 5; + + plmn_list = ( { mcc = 320; mnc = 230; mnc_length = 3; } ); + + tr_s_preference = "local_mac" + + ////////// Physical parameters: + + component_carriers = ( + { + node_function = "3GPP_eNODEB"; + node_timing = "synch_to_ext_device"; + node_synch_ref = 0; + frame_type = "FDD"; + tdd_config = 3; + tdd_config_s = 0; + prefix_type = "NORMAL"; + eutra_band = 7; + downlink_frequency = 2685000000L; + uplink_frequency_offset = -120000000; + Nid_cell = 0; + N_RB_DL = 50; + Nid_cell_mbsfn = 0; + nb_antenna_ports = 1; + nb_antennas_tx = 1; + nb_antennas_rx = 1; + tx_gain = 90; + rx_gain = 125; + pbch_repetition = "FALSE"; + prach_root = 0; + prach_config_index = 0; + prach_high_speed = "DISABLE"; + prach_zero_correlation = 1; + prach_freq_offset = 2; + pucch_delta_shift = 1; + pucch_nRB_CQI = 0; + pucch_nCS_AN = 0; + pucch_n1_AN = 0; + pdsch_referenceSignalPower = -27; + pdsch_p_b = 0; + pusch_n_SB = 1; + pusch_enable64QAM = "DISABLE"; + pusch_hoppingMode = "interSubFrame"; + pusch_hoppingOffset = 0; + pusch_groupHoppingEnabled = "ENABLE"; + pusch_groupAssignment = 0; + pusch_sequenceHoppingEnabled = "DISABLE"; + pusch_nDMRS1 = 1; + phich_duration = "NORMAL"; + phich_resource = "ONESIXTH"; + srs_enable = "DISABLE"; + /* srs_BandwidthConfig =; + srs_SubframeConfig =; + srs_ackNackST =; + srs_MaxUpPts =;*/ + + pusch_p0_Nominal = -96; + pusch_alpha = "AL1"; + pucch_p0_Nominal = -104; + msg3_delta_Preamble = 6; + pucch_deltaF_Format1 = "deltaF2"; + pucch_deltaF_Format1b = "deltaF3"; + pucch_deltaF_Format2 = "deltaF0"; + pucch_deltaF_Format2a = "deltaF0"; + pucch_deltaF_Format2b = "deltaF0"; + + rach_numberOfRA_Preambles = 64; + rach_preamblesGroupAConfig = "DISABLE"; + /* + rach_sizeOfRA_PreamblesGroupA = ; + rach_messageSizeGroupA = ; + rach_messagePowerOffsetGroupB = ; + */ + rach_powerRampingStep = 4; + rach_preambleInitialReceivedTargetPower = -108; + rach_preambleTransMax = 10; + rach_raResponseWindowSize = 10; + rach_macContentionResolutionTimer = 48; + rach_maxHARQ_Msg3Tx = 4; + + pcch_default_PagingCycle = 128; + pcch_nB = "oneT"; + bcch_modificationPeriodCoeff = 2; + ue_TimersAndConstants_t300 = 1000; + ue_TimersAndConstants_t301 = 1000; + ue_TimersAndConstants_t310 = 1000; + ue_TimersAndConstants_t311 = 10000; + ue_TimersAndConstants_n310 = 20; + ue_TimersAndConstants_n311 = 1; + ue_TransmissionMode = 1; + + //Parameters for SIB18 + rxPool_sc_CP_Len = "normal"; + rxPool_sc_Period = "sf40"; + rxPool_data_CP_Len = "normal"; + rxPool_ResourceConfig_prb_Num = 20; + rxPool_ResourceConfig_prb_Start = 5; + rxPool_ResourceConfig_prb_End = 44; + rxPool_ResourceConfig_offsetIndicator_present = "prSmall"; + rxPool_ResourceConfig_offsetIndicator_choice = 0; + rxPool_ResourceConfig_subframeBitmap_present = "prBs40"; + rxPool_ResourceConfig_subframeBitmap_choice_bs_buf = "00000000000000000000"; + rxPool_ResourceConfig_subframeBitmap_choice_bs_size = 5; + rxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0; +/* rxPool_dataHoppingConfig_hoppingParameter = 0; + rxPool_dataHoppingConfig_numSubbands = "ns1"; + rxPool_dataHoppingConfig_rbOffset = 0; + rxPool_commTxResourceUC-ReqAllowed = "TRUE"; +*/ + // Parameters for SIB19 + discRxPool_cp_Len = "normal" + discRxPool_discPeriod = "rf32" + discRxPool_numRetx = 1; + discRxPool_numRepetition = 2; + discRxPool_ResourceConfig_prb_Num = 5; + discRxPool_ResourceConfig_prb_Start = 3; + discRxPool_ResourceConfig_prb_End = 21; + discRxPool_ResourceConfig_offsetIndicator_present = "prSmall"; + discRxPool_ResourceConfig_offsetIndicator_choice = 0; + discRxPool_ResourceConfig_subframeBitmap_present = "prBs40"; + discRxPool_ResourceConfig_subframeBitmap_choice_bs_buf = "f0ffffffff"; + discRxPool_ResourceConfig_subframeBitmap_choice_bs_size = 5; + discRxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0; + + } + ); + + + srb1_parameters : + { + # timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500] + timer_poll_retransmit = 80; + + # timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200] + timer_reordering = 35; + + # timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500] + timer_status_prohibit = 0; + + # poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)] + poll_pdu = 4; + + # poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)] + poll_byte = 99999; + + # max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32] + max_retx_threshold = 4; + } + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// MME parameters: + mme_ip_address = ( { ipv4 = "192.168.61.195"; + ipv6 = "192:168:30::17"; + port = 36412 ; + active = "yes"; + preference = "ipv4"; + } + ); + + enable_measurement_reports = "yes"; + + ///X2 + enable_x2 = "yes"; + t_reloc_prep = 1000; /* unit: millisecond */ + tx2_reloc_overall = 2000; /* unit: millisecond */ + t_dc_prep = 1000; /* unit: millisecond */ + t_dc_overall = 2000; /* unit: millisecond */ + + NETWORK_INTERFACES : + { + ENB_INTERFACE_NAME_FOR_S1_MME = "ctrl0"; + ENB_IPV4_ADDRESS_FOR_S1_MME = "172.16.0.1"; + ENB_INTERFACE_NAME_FOR_S1U = "ctrl0"; + ENB_IPV4_ADDRESS_FOR_S1U = "172.16.0.1"; + ENB_PORT_FOR_S1U = 2152; # Spec 2152 + ENB_IPV4_ADDRESS_FOR_X2C = "172.16.0.1"; + ENB_PORT_FOR_X2C = 36422; # Spec 36422 + + }; + } +); + +MACRLCs = ( + { + num_cc = 1; + local_s_if_name = "lo"; + remote_s_address = "127.0.0.1"; + local_s_address = "127.0.0.1"; + local_s_portc = 50001; + remote_s_portc = 50000; + local_s_portd = 50011; + remote_s_portd = 50010; + tr_s_preference = "nfapi"; + tr_n_preference = "local_RRC"; + scheduler_mode = "fairRR"; + } +); + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_RU_L1_SPLIT"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +log_config = + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + }; diff --git a/ci-scripts/conf_files/episci_ue.nfapi.conf b/ci-scripts/conf_files/episci_ue.nfapi.conf new file mode 100644 index 0000000000..0170a46655 --- /dev/null +++ b/ci-scripts/conf_files/episci_ue.nfapi.conf @@ -0,0 +1,44 @@ +log_config = { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="medium"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="full"; +}; + + +L1s = ( + { + num_cc = 1; + tr_n_preference = "nfapi"; + local_n_if_name = "ens3"; + remote_n_address = "127.0.0.1"; //Proxy IP + local_n_address = "127.0.0.1"; + local_n_portc = 50000; + remote_n_portc = 50001; + local_n_portd = 50010; + remote_n_portd = 50011; + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 1 + nb_rx = 1 + att_tx = 90 + att_rx = 0; + bands = [7,38,42,43]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 125; + } +); diff --git a/ci-scripts/conf_files/rcc.band7.tm1.nfapi.conf b/ci-scripts/conf_files/rcc.band7.tm1.nfapi.conf index 4e596f81b5..281f7433af 100644 --- a/ci-scripts/conf_files/rcc.band7.tm1.nfapi.conf +++ b/ci-scripts/conf_files/rcc.band7.tm1.nfapi.conf @@ -13,9 +13,9 @@ eNBs = eNB_name = "eNB-Eurecom-LTEBox"; // Tracking area code, 0x0000 and 0xfffe are reserved values - tracking_area_code = 5; + tracking_area_code = 1; - plmn_list = ( { mcc = 320; mnc = 230; mnc_length = 3; } ); + plmn_list = ( { mcc = 208; mnc = 93; mnc_length = 2; } ); tr_s_preference = "local_mac" @@ -172,7 +172,7 @@ eNBs = ////////// MME parameters: - mme_ip_address = ( { ipv4 = "192.168.61.195"; + mme_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; ipv6 = "192:168:30::17"; port = 36412 ; active = "yes"; @@ -180,10 +180,10 @@ eNBs = } ); - enable_measurement_reports = "yes"; + enable_measurement_reports = "no"; ///X2 - enable_x2 = "yes"; + enable_x2 = "no"; t_reloc_prep = 1000; /* unit: millisecond */ tx2_reloc_overall = 2000; /* unit: millisecond */ t_dc_prep = 1000; /* unit: millisecond */ @@ -191,12 +191,12 @@ eNBs = NETWORK_INTERFACES : { - ENB_INTERFACE_NAME_FOR_S1_MME = "ctrl0"; - ENB_IPV4_ADDRESS_FOR_S1_MME = "172.16.0.1"; - ENB_INTERFACE_NAME_FOR_S1U = "ctrl0"; - ENB_IPV4_ADDRESS_FOR_S1U = "172.16.0.1"; + ENB_INTERFACE_NAME_FOR_S1_MME = "ens3"; + ENB_IPV4_ADDRESS_FOR_S1_MME = "CI_ENB_IP_ADDR"; + ENB_INTERFACE_NAME_FOR_S1U = "ens3"; + ENB_IPV4_ADDRESS_FOR_S1U = "CI_ENB_IP_ADDR"; ENB_PORT_FOR_S1U = 2152; # Spec 2152 - ENB_IPV4_ADDRESS_FOR_X2C = "172.16.0.1"; + ENB_IPV4_ADDRESS_FOR_X2C = "CI_ENB_IP_ADDR"; ENB_PORT_FOR_X2C = 36422; # Spec 36422 }; @@ -206,16 +206,15 @@ eNBs = MACRLCs = ( { num_cc = 1; - local_s_if_name = "lo"; - remote_s_address = "127.0.0.1"; - local_s_address = "127.0.0.1"; + local_s_if_name = "ens3"; + remote_s_address = "CI_UE_IP_ADDR"; + local_s_address = "CI_ENB_IP_ADDR"; local_s_portc = 50001; remote_s_portc = 50000; local_s_portd = 50011; remote_s_portd = 50010; tr_s_preference = "nfapi"; tr_n_preference = "local_RRC"; - scheduler_mode = "fairRR"; } ); diff --git a/ci-scripts/conf_files/ue.nfapi.conf b/ci-scripts/conf_files/ue.nfapi.conf index 0170a46655..2b602cbcf2 100644 --- a/ci-scripts/conf_files/ue.nfapi.conf +++ b/ci-scripts/conf_files/ue.nfapi.conf @@ -21,8 +21,8 @@ L1s = ( num_cc = 1; tr_n_preference = "nfapi"; local_n_if_name = "ens3"; - remote_n_address = "127.0.0.1"; //Proxy IP - local_n_address = "127.0.0.1"; + remote_n_address = "CI_ENB_IP_ADDR"; + local_n_address = "CI_UE_IP_ADDR"; local_n_portc = 50000; remote_n_portc = 50001; local_n_portd = 50010; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/episci_rcc.band78.tm1.106PRB.nfapi.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/episci_rcc.band78.tm1.106PRB.nfapi.conf new file mode 100644 index 0000000000..b64b88ddea --- /dev/null +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/episci_rcc.band78.tm1.106PRB.nfapi.conf @@ -0,0 +1,265 @@ +Active_gNBs = ( "gNB-Eurecom-5GNRBox"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_ID = 0xe00; + + cell_type = "CELL_MACRO_GNB"; + + gNB_name = "gNB-Eurecom-5GNRBox"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 5; + + plmn_list = ({mcc = 320; mnc = 230; mnc_length = 3;}); + + tr_s_preference = "local_mac" + + ////////// Physical parameters: + + ssb_SubcarrierOffset = 31; //0; + pdsch_AntennaPorts = 1; + pusch_AntennaPorts = 1; + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + +# downlinkConfigCommon + #frequencyInfoDL + # this is 3600 MHz + 84 PRBs@30kHz SCS (same as initial BWP) + absoluteFrequencySSB = 641272; //641032; #641968; 641968=start of ssb at 3600MHz + 82 RBs 641032=center of SSB at center of cell + dl_frequencyBand = 78; + # this is 3600 MHz + dl_absoluteFrequencyPointA = 640000; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 106; + #initialDownlinkBWP + #genericParameters + # this is RBstart=84,L=13 (275*(L-1))+RBstart + initialDLBWPlocationAndBandwidth = 6368; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 0; + initialDLBWPsearchSpaceZero = 0; + #pdsch-ConfigCommon + #pdschTimeDomainAllocationList (up to 16 entries) + initialDLBWPk0_0 = 0; #for DL slot + initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB + initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + + initialDLBWPk0_1 = 0; #for mixed slot + initialDLBWPmappingType_1 = 0; + initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 78; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 106; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 6368; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 98; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 13; + preambleReceivedTargetPower = -100; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 5; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14; //15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, + +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) + initialULBWPk2_0 = 6; # used for UL slot + initialULBWPmappingType_0 = 1 + initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + + initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPmappingType_1 = 1; + initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 + + initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPmappingType_2 = 1; + initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + + msg3_DeltaPreamble = 1; + p0_NominalWithGrant =-90; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -90; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; #0x80; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; //8; //7; + nrofDownlinkSymbols = 6; //0; //6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; //0; //4; + + ssPBCH_BlockPower = -25; + } + + ); + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// MME parameters: + mme_ip_address = ( { ipv4 = "192.168.61.195"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + ///X2 + enable_x2 = "yes"; + t_reloc_prep = 1000; /* unit: millisecond */ + tx2_reloc_overall = 2000; /* unit: millisecond */ + t_dc_prep = 1000; /* unit: millisecond */ + t_dc_overall = 2000; /* unit: millisecond */ + target_enb_x2_ip_address = ( + { ipv4 = "172.16.0.1"; # rrc.band7.tm1.nfapi.conf:line 201 + ipv6 = "192:168:30::17"; + preference = "ipv4"; + } + ); + + NETWORK_INTERFACES : + { # All of these have to be IP addr of gNB + # if in CORE container, make it 172.16.0.X + # if not launched in CORE, can set to lo (127.0.0.2) + GNB_INTERFACE_NAME_FOR_S1_MME = "ctrl0"; + GNB_IPV4_ADDRESS_FOR_S1_MME = "172.16.0.2"; + GNB_INTERFACE_NAME_FOR_S1U = "ctrl0"; + GNB_IPV4_ADDRESS_FOR_S1U = "172.16.0.2"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + GNB_IPV4_ADDRESS_FOR_X2C = "172.16.0.2"; + GNB_PORT_FOR_X2C = 36422; # Spec 36422 + }; + } +); + + +MACRLCs = ( + { + num_cc = 1; + local_s_if_name = "lo:"; + remote_s_address = "127.0.0.1"; // pnf addr [!] + local_s_address = "127.0.0.2"; // vnf addr + local_s_portc = 50601; // vnf p5 port + remote_s_portc = 50600; // pnf p5 port [!] + local_s_portd = 50611; // vnf p7 port [!] + remote_s_portd = 50610; // pnf p7 port [!] + tr_s_preference = "nfapi"; + tr_n_preference = "local_RRC"; + } +) + + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_RU_L1_TRX_SPLIT"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +log_config = + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + }; + diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf index b64b88ddea..e541607559 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf @@ -13,18 +13,18 @@ gNBs = gNB_name = "gNB-Eurecom-5GNRBox"; // Tracking area code, 0x0000 and 0xfffe are reserved values - tracking_area_code = 5; + tracking_area_code = 1; - plmn_list = ({mcc = 320; mnc = 230; mnc_length = 3;}); + plmn_list = ({mcc = 208; mnc = 93; mnc_length = 2;}); tr_s_preference = "local_mac" ////////// Physical parameters: - ssb_SubcarrierOffset = 31; //0; + ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - + servingCellConfigCommon = ( { #spCellConfigCommon @@ -33,8 +33,8 @@ gNBs = # downlinkConfigCommon #frequencyInfoDL - # this is 3600 MHz + 84 PRBs@30kHz SCS (same as initial BWP) - absoluteFrequencySSB = 641272; //641032; #641968; 641968=start of ssb at 3600MHz + 82 RBs 641032=center of SSB at center of cell + # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP) + absoluteFrequencySSB = 641032; dl_frequencyBand = 78; # this is 3600 MHz dl_absoluteFrequencyPointA = 640000; @@ -46,23 +46,37 @@ gNBs = dl_carrierBandwidth = 106; #initialDownlinkBWP #genericParameters - # this is RBstart=84,L=13 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 6368; + # this is RBstart=41,L=24 (275*(L-1))+RBstart + initialDLBWPlocationAndBandwidth = 6366; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialDLBWPsubcarrierSpacing = 1; #pdcch-ConfigCommon - initialDLBWPcontrolResourceSetZero = 0; + initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; #pdsch-ConfigCommon #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 + initialDLBWPk0_0 = 0; + #initialULBWPmappingType + #0=typeA,1=typeB + initialDLBWPmappingType_0 = 0; + #this is SS=1,L=13 + initialDLBWPstartSymbolAndLength_0 = 40; - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 + initialDLBWPk0_1 = 0; + initialDLBWPmappingType_1 = 0; + #this is SS=2,L=12 + initialDLBWPstartSymbolAndLength_1 = 53; + + initialDLBWPk0_2 = 0; + initialDLBWPmappingType_2 = 0; + #this is SS=1,L=12 + initialDLBWPstartSymbolAndLength_2 = 54; + + initialDLBWPk0_3 = 0; + initialDLBWPmappingType_3 = 0; + #this is SS=1,L=5 + initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -76,7 +90,7 @@ gNBs = pMax = 20; #initialUplinkBWP #genericParameters - initialULBWPlocationAndBandwidth = 6368; + initialULBWPlocationAndBandwidth = 6366; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialULBWPsubcarrierSpacing = 1; @@ -88,7 +102,7 @@ gNBs = prach_msg1_FDM = 0; prach_msg1_FrequencyStart = 0; zeroCorrelationZoneConfig = 13; - preambleReceivedTargetPower = -100; + preambleReceivedTargetPower = -118; #preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) preambleTransMax = 6; #powerRampingStep @@ -96,12 +110,12 @@ gNBs = powerRampingStep = 1; #ra_ReponseWindow #1,2,4,8,10,20,40,80 - ra_ResponseWindow = 5; + ra_ResponseWindow = 4; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; #oneHalf (0..15) 4,8,12,16,...60,64 - ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14; //15; + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; #ra_ContentionResolutionTimer #(0..7) 8,16,24,32,40,48,56,64 ra_ContentionResolutionTimer = 7; @@ -113,22 +127,25 @@ gNBs = # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex # msg1_SubcarrierSpacing = 1, - # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, + # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot + initialULBWPk2_0 = 6; initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 + # this is SS=0 L=11 + initialULBWPstartSymbolAndLength_0 = 55; - initialULBWPk2_1 = 6; # used for mixed slot + initialULBWPk2_1 = 6; initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 + # this is SS=0 L=12 + initialULBWPstartSymbolAndLength_1 = 69; - initialULBWPk2_2 = 7; # used for Msg.3 during RA + initialULBWPk2_2 = 7; initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 + # this is SS=10 L=4 + initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; @@ -142,7 +159,7 @@ gNBs = # ssb_PositionsInBurs_BitmapPR # 1=short, 2=medium, 3=long ssb_PositionsInBurst_PR = 2; - ssb_PositionsInBurst_Bitmap = 1; #0x80; + ssb_PositionsInBurst_Bitmap = 1; # ssb_periodicityServingCell # 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 @@ -165,16 +182,40 @@ gNBs = # dl_UL_TransmissionPeriodicity # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 dl_UL_TransmissionPeriodicity = 6; - nrofDownlinkSlots = 7; //8; //7; - nrofDownlinkSymbols = 6; //0; //6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; nrofUplinkSlots = 2; - nrofUplinkSymbols = 4; //0; //4; + nrofUplinkSymbols = 4; - ssPBCH_BlockPower = -25; + ssPBCH_BlockPower = 10; } + ); + + + srb1_parameters : + { + # timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500] + timer_poll_retransmit = 80; + + # timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200] + timer_reordering = 35; + + # timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500] + timer_status_prohibit = 0; + + # poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)] + poll_pdu = 4; + + # poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)] + poll_byte = 99999; + + # max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32] + max_retx_threshold = 4; + } + # ------- SCTP definitions SCTP : { @@ -185,36 +226,21 @@ gNBs = ////////// MME parameters: - mme_ip_address = ( { ipv4 = "192.168.61.195"; + mme_ip_address = ( { ipv4 = "192.168.12.26"; ipv6 = "192:168:30::17"; active = "yes"; preference = "ipv4"; } ); - ///X2 - enable_x2 = "yes"; - t_reloc_prep = 1000; /* unit: millisecond */ - tx2_reloc_overall = 2000; /* unit: millisecond */ - t_dc_prep = 1000; /* unit: millisecond */ - t_dc_overall = 2000; /* unit: millisecond */ - target_enb_x2_ip_address = ( - { ipv4 = "172.16.0.1"; # rrc.band7.tm1.nfapi.conf:line 201 - ipv6 = "192:168:30::17"; - preference = "ipv4"; - } - ); NETWORK_INTERFACES : - { # All of these have to be IP addr of gNB - # if in CORE container, make it 172.16.0.X - # if not launched in CORE, can set to lo (127.0.0.2) - GNB_INTERFACE_NAME_FOR_S1_MME = "ctrl0"; - GNB_IPV4_ADDRESS_FOR_S1_MME = "172.16.0.2"; - GNB_INTERFACE_NAME_FOR_S1U = "ctrl0"; - GNB_IPV4_ADDRESS_FOR_S1U = "172.16.0.2"; + { + + GNB_INTERFACE_NAME_FOR_S1_MME = "eth0"; + GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24"; + GNB_INTERFACE_NAME_FOR_S1U = "eth0"; + GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24"; GNB_PORT_FOR_S1U = 2152; # Spec 2152 - GNB_IPV4_ADDRESS_FOR_X2C = "172.16.0.2"; - GNB_PORT_FOR_X2C = 36422; # Spec 36422 }; } ); @@ -226,10 +252,10 @@ MACRLCs = ( local_s_if_name = "lo:"; remote_s_address = "127.0.0.1"; // pnf addr [!] local_s_address = "127.0.0.2"; // vnf addr - local_s_portc = 50601; // vnf p5 port - remote_s_portc = 50600; // pnf p5 port [!] - local_s_portd = 50611; // vnf p7 port [!] - remote_s_portd = 50610; // pnf p7 port [!] + local_s_portc = 50001; // vnf p5 port + remote_s_portc = 50000; // pnf p5 port [!] + local_s_portd = 50011; // vnf p7 port [!] + remote_s_portd = 50010; // pnf p7 port [!] tr_s_preference = "nfapi"; tr_n_preference = "local_RRC"; } From ce8301ba3806b759a63e22c150b009a90b786881 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 30 Sep 2021 19:25:57 -0700 Subject: [PATCH 041/102] Setting SR flag to 0 in NR UE to ensure we dont handle SRs --- openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 1 + openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 18 ++++++++++++++++-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index 4bf3717c9b..5e441a804f 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -182,6 +182,7 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[j].pucch_pdu_format_0_1; uci_ind->uci_list[j].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE; uci_ind->uci_list[j].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t); + memset(pdu_0_1, 0, sizeof(*pdu_0_1)); pdu_0_1->pduBitmap = 2; // (value->pduBitmap >> 1) & 0x01) == HARQ and (value->pduBitmap) & 0x01) == SR pdu_0_1->handle = 0; pdu_0_1->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti; diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index ace5a2d536..307c6fd5aa 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -396,13 +396,26 @@ static void copy_ul_tti_data_req_to_dl_info(nr_downlink_indication_t *dl_info, n pdu_list->pdu_type, ul_tti_req->pdus_list[i].pucch_pdu.rnti); if (pdu_list->pdu_type == NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE && pdu_list->pucch_pdu.rnti == mac->crnti) { + LOG_I(NR_MAC, "This is the number of UCIs in the queue %ld\n", nr_uci_ind_queue.num_items); nfapi_nr_uci_indication_t *uci_ind = get_queue(&nr_uci_ind_queue); if (uci_ind) { + LOG_I(NR_MAC, "This is the SFN/SF [%d, %d] of the UCI ind. \n", uci_ind->sfn, uci_ind->slot); if (uci_ind->num_ucis > 0) { uci_ind->sfn = ul_tti_req->SFN; uci_ind->slot = ul_tti_req->Slot; + if (pdu_list->pucch_pdu.sr_flag) + { + for (int j = 0; j < uci_ind->num_ucis; j++) + { + nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[j].pucch_pdu_format_0_1; + pdu_0_1->sr = CALLOC(1, sizeof(*pdu_0_1->sr)); + pdu_0_1->sr->sr_confidence_level = 0; + pdu_0_1->sr->sr_indication = 0; + } + + } LOG_I(NR_MAC, "We have dequeued the previously filled uci_ind and updated the snf/slot to %d/%d.\n", uci_ind->sfn, uci_ind->slot); NR_UL_IND_t UL_INFO = { @@ -410,9 +423,10 @@ static void copy_ul_tti_data_req_to_dl_info(nr_downlink_indication_t *dl_info, n }; send_nsa_standalone_msg(&UL_INFO, uci_ind->header.message_id); } - for (int j = 0; j < uci_ind->num_ucis; j++) + for (int k = 0; k < uci_ind->num_ucis; k++) { - nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[j].pucch_pdu_format_0_1; + nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[k].pucch_pdu_format_0_1; + free(pdu_0_1->sr); free(pdu_0_1->harq->harq_list); free(pdu_0_1->harq); } From a5d6ff5a75c551b4d70c763e2ca870fe0419978d Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Fri, 1 Oct 2021 14:24:15 -0700 Subject: [PATCH 042/102] We are now sending either SR or HARQ based on UL_TTI_REQ This requires some updates to the nFAPI code as well. We also have declared the def_dci_rel15 extern variable consistently throughout the code. In this commit, the gNB is still crashing. However, it seems that the NSA UE is sending the proper responses back, but there some sort of incorrect management of the def_dci_pdu_rel15 variable. If we memset this array to 0, we can see incorrect 0 assignments to elements of the UCI indications. Hopefully fixing this issue will result in less gNB crashes. --- nfapi/oai_integration/nfapi_vnf.c | 38 ++++++---- nfapi/open-nFAPI/nfapi/src/nfapi_p7.c | 7 +- openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 25 ++----- openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h | 2 +- openair2/LAYER2/NR_MAC_UE/mac_extern.h | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 6 +- openair2/NR_PHY_INTERFACE/NR_IF_Module.c | 13 +++- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 72 ++++++++++++------- 8 files changed, 102 insertions(+), 63 deletions(-) diff --git a/nfapi/oai_integration/nfapi_vnf.c b/nfapi/oai_integration/nfapi_vnf.c index cfaf71b3f3..fb01064f09 100644 --- a/nfapi/oai_integration/nfapi_vnf.c +++ b/nfapi/oai_integration/nfapi_vnf.c @@ -788,17 +788,21 @@ int phy_nr_uci_indication(nfapi_nr_uci_indication_t *ind) case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: { nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_ind_pdu = &uci_ind->uci_list[i].pucch_pdu_format_0_1; nfapi_nr_uci_pucch_pdu_format_0_1_t *ind_pdu = &ind->uci_list[i].pucch_pdu_format_0_1; - - uci_ind_pdu->harq = CALLOC(1, sizeof(*uci_ind_pdu->harq)); - AssertFatal(uci_ind_pdu->harq != NULL, "Memory not allocated for uci_ind_pdu->harq in phy_nr_uci_indication."); + if (ind_pdu->sr) { + uci_ind_pdu->sr = CALLOC(1, sizeof(*uci_ind_pdu->sr)); + AssertFatal(uci_ind_pdu->sr != NULL, "Memory not allocated for uci_ind_pdu->harq in phy_nr_uci_indication."); + *uci_ind_pdu->sr = *ind_pdu->sr; + } + if (ind_pdu->harq) { + uci_ind_pdu->harq = CALLOC(1, sizeof(*uci_ind_pdu->harq)); + AssertFatal(uci_ind_pdu->harq != NULL, "Memory not allocated for uci_ind_pdu->harq in phy_nr_uci_indication."); - *uci_ind_pdu->harq = *ind_pdu->harq; - - uci_ind_pdu->harq->harq_list = CALLOC(uci_ind_pdu->harq->num_harq, sizeof(*uci_ind_pdu->harq->harq_list)); - AssertFatal(uci_ind_pdu->harq->harq_list != NULL, "Memory not allocated for uci_ind_pdu->harq->harq_list in phy_nr_uci_indication."); - for (int j = 0; j < uci_ind_pdu->harq->num_harq; j++) - uci_ind_pdu->harq->harq_list[j].harq_value = ind_pdu->harq->harq_list[j].harq_value; - + *uci_ind_pdu->harq = *ind_pdu->harq; + uci_ind_pdu->harq->harq_list = CALLOC(uci_ind_pdu->harq->num_harq, sizeof(*uci_ind_pdu->harq->harq_list)); + AssertFatal(uci_ind_pdu->harq->harq_list != NULL, "Memory not allocated for uci_ind_pdu->harq->harq_list in phy_nr_uci_indication."); + for (int j = 0; j < uci_ind_pdu->harq->num_harq; j++) + uci_ind_pdu->harq->harq_list[j].harq_value = ind_pdu->harq->harq_list[j].harq_value; + } break; } @@ -832,8 +836,16 @@ int phy_nr_uci_indication(nfapi_nr_uci_indication_t *ind) { if (uci_ind->uci_list[i].pdu_type == NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE) { - free(uci_ind->uci_list[i].pucch_pdu_format_0_1.harq->harq_list); - free(uci_ind->uci_list[i].pucch_pdu_format_0_1.harq); + if (uci_ind->uci_list[i].pucch_pdu_format_0_1.harq) { + free(uci_ind->uci_list[i].pucch_pdu_format_0_1.harq->harq_list); + uci_ind->uci_list[i].pucch_pdu_format_0_1.harq->harq_list = NULL; + free(uci_ind->uci_list[i].pucch_pdu_format_0_1.harq); + uci_ind->uci_list[i].pucch_pdu_format_0_1.harq = NULL; + } + if (uci_ind->uci_list[i].pucch_pdu_format_0_1.sr) { + free(uci_ind->uci_list[i].pucch_pdu_format_0_1.sr); + uci_ind->uci_list[i].pucch_pdu_format_0_1.sr = NULL; + } } if (uci_ind->uci_list[i].pdu_type == NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE) { @@ -843,7 +855,9 @@ int phy_nr_uci_indication(nfapi_nr_uci_indication_t *ind) } } free(uci_ind->uci_list); + uci_ind->uci_list = NULL; free(uci_ind); + uci_ind = NULL; } } else { diff --git a/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c b/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c index 97e22d3747..b0ff94e684 100644 --- a/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c +++ b/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c @@ -5865,7 +5865,12 @@ static uint8_t unpack_nr_uci_pucch_0_1(nfapi_nr_uci_pucch_pdu_format_0_1_t *valu )) return 0; if (value->pduBitmap & 0x01) { //SR - value->sr = (nfapi_nr_sr_pdu_0_1_t*) malloc(sizeof(nfapi_nr_sr_pdu_0_1_t)); + value->sr = nfapi_p7_allocate(sizeof(*value->sr), config); + if (value->sr == NULL) + { + NFAPI_TRACE(NFAPI_TRACE_ERROR, "%s failed to allocate sr pdu\n", __FUNCTION__); + return 0; + } if(!(pull8(ppReadPackedMsg, &value->sr->sr_indication, end) && pull8(ppReadPackedMsg, &value->sr->sr_confidence_level, end) )) diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index 5e441a804f..e2a92781d8 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -92,7 +92,7 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response memcpy(rx_ind->pdu_list[j].pdu, tx_req_body->pdu, tx_req_body->pdu_length * sizeof(*rx_ind->pdu_list[j].pdu)); rx_ind->pdu_list[j].rnti = pusch_config_pdu->rnti; rx_ind->pdu_list[j].timing_advance = scheduled_response->tx_request->tx_config.timing_advance; - rx_ind->pdu_list[j].ul_cqi = scheduled_response->tx_request->tx_config.ul_cqi; + rx_ind->pdu_list[j].ul_cqi = 255; // scheduled_response->tx_request->tx_config.ul_cqi; char buffer[1024]; hexdump(rx_ind->pdu_list[j].pdu, rx_ind->pdu_list[j].pdu_length, buffer, sizeof(buffer)); LOG_D(MAC, "Melissa Elkadi, this is hexdump of pdu %s before queuing rx_ind\n", @@ -183,38 +183,21 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response uci_ind->uci_list[j].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE; uci_ind->uci_list[j].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t); memset(pdu_0_1, 0, sizeof(*pdu_0_1)); - pdu_0_1->pduBitmap = 2; // (value->pduBitmap >> 1) & 0x01) == HARQ and (value->pduBitmap) & 0x01) == SR pdu_0_1->handle = 0; pdu_0_1->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti; pdu_0_1->pucch_format = 1; - pdu_0_1->ul_cqi = 27; + pdu_0_1->ul_cqi = 255; pdu_0_1->timing_advance = 0; pdu_0_1->rssi = 0; - pdu_0_1->harq = CALLOC(1, sizeof(*pdu_0_1->harq)); - pdu_0_1->harq->num_harq = 1; - pdu_0_1->harq->harq_confidence_level = 0; - pdu_0_1->harq->harq_list = CALLOC(pdu_0_1->harq->num_harq, sizeof(*pdu_0_1->harq->harq_list)); - for (int k = 0; k < pdu_0_1->harq->num_harq; k++) - { - pdu_0_1->harq->harq_list[k].harq_value = 0; - } } LOG_I(NR_PHY, "In %s: Filled queue uci_ind which was filled by dlconfig.\n" - "uci_num %d, uci_slot %d, uci_frame %d and num_harqs %d\n", - __FUNCTION__, uci_ind->num_ucis, uci_ind->slot, uci_ind->sfn, uci_ind->uci_list[0].pucch_pdu_format_0_1.harq->num_harq); + "uci_num %d, SFN/SLOT: [%d, %d]\n", + __FUNCTION__, uci_ind->num_ucis, uci_ind->sfn, uci_ind->slot); if (!put_queue(&nr_uci_ind_queue, uci_ind)) { LOG_E(NR_MAC, "Put_queue failed for uci_ind\n"); - //free(uci_ind->uci_list[0].pucch_pdu_format_0_1.harq->harq_list); - //free(uci_ind->uci_list[0].pucch_pdu_format_0_1.harq); - for (int j = 0; j < uci_ind->num_ucis; j++) - { - nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[j].pucch_pdu_format_0_1; - free(pdu_0_1->harq->harq_list); - free(pdu_0_1->harq); - } free(uci_ind->uci_list); free(uci_ind); } diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h index f81e15d5fd..8145a37b45 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h @@ -39,7 +39,7 @@ extern const uint8_t nr_slots_per_frame[5]; -extern dci_pdu_rel15_t *def_dci_pdu_rel15; +extern dci_pdu_rel15_t def_dci_pdu_rel15[8]; /* extern const uint32_t BSR_TABLE[BSR_TABLE_SIZE]; extern const uint32_t Extended_BSR_TABLE[BSR_TABLE_SIZE]; diff --git a/openair2/LAYER2/NR_MAC_UE/mac_extern.h b/openair2/LAYER2/NR_MAC_UE/mac_extern.h index 7fd63666f0..7dd2a740f6 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_extern.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_extern.h @@ -66,7 +66,7 @@ extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10]; extern const uint16_t table_7_2_1[16]; -extern dci_pdu_rel15_t *def_dci_pdu_rel15; +extern dci_pdu_rel15_t def_dci_pdu_rel15[8]; extern void mac_rlc_data_ind(const module_id_t module_idP, const rnti_t rntiP, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 9cc9221d25..50e8a82f9d 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1109,8 +1109,10 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id, // tpc (power control) only if we received AckNack or positive SR. For a // negative SR, the UE won't have sent anything, and the SNR is not valid if (((uci_01->pduBitmap >> 1) & 0x1) || sched_ctrl->SR) { - if (uci_01->harq->harq_confidence_level==0) sched_ctrl->tpc1 = nr_get_tpc(RC.nrmac[mod_id]->pucch_target_snrx10, uci_01->ul_cqi, 30); - else sched_ctrl->tpc1 = 3; + if (((uci_01->pduBitmap >> 1) & 0x1) && uci_01->harq->harq_confidence_level==0) + sched_ctrl->tpc1 = nr_get_tpc(RC.nrmac[mod_id]->pucch_target_snrx10, uci_01->ul_cqi, 30); + else + sched_ctrl->tpc1 = 3; sched_ctrl->pucch_snrx10 = uci_01->ul_cqi * 5 - 640; } } diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c index 291d445969..afc335f1bb 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c @@ -156,8 +156,16 @@ void handle_nr_uci(NR_UL_IND_t *UL_info) for (int i = 0; i < num_ucis; i++) { switch (uci_list[i].pdu_type) { case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: + if (uci_list[i].pucch_pdu_format_0_1.harq) { free(uci_list[i].pucch_pdu_format_0_1.harq->harq_list); + uci_list[i].pucch_pdu_format_0_1.harq->harq_list = NULL; free(uci_list[i].pucch_pdu_format_0_1.harq); + uci_list[i].pucch_pdu_format_0_1.harq = NULL; + } + if (uci_list[i].pucch_pdu_format_0_1.sr) { + free(uci_list[i].pucch_pdu_format_0_1.sr); + uci_list[i].pucch_pdu_format_0_1.sr = NULL; + } break; case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: @@ -167,9 +175,12 @@ void handle_nr_uci(NR_UL_IND_t *UL_info) break; } } - if (uci_ind && num_ucis > 0) + if (uci_ind && num_ucis > 0) { free(uci_list); + uci_list = NULL; + } free(uci_ind); + uci_ind = NULL; } static bool crc_sfn_slot_matcher(void *wanted, void *candidate) diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 307c6fd5aa..2aeb289b41 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -392,46 +392,70 @@ static void copy_ul_tti_data_req_to_dl_info(nr_downlink_indication_t *dl_info, n for (int i = 0; i < num_pdus; i++) { nfapi_nr_ul_tti_request_number_of_pdus_t *pdu_list = &ul_tti_req->pdus_list[i]; - LOG_D(NR_PHY, "This is the pdu type %d and rnti %x in ul_tti_req\n", - pdu_list->pdu_type, ul_tti_req->pdus_list[i].pucch_pdu.rnti); + LOG_D(NR_PHY, "This is the pdu type %d and rnti %x and SR flag %d and harq_pdu_len %d in in ul_tti_req\n", + pdu_list->pdu_type, ul_tti_req->pdus_list[i].pucch_pdu.rnti, pdu_list->pucch_pdu.sr_flag, pdu_list->pucch_pdu.bit_len_harq); if (pdu_list->pdu_type == NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE && pdu_list->pucch_pdu.rnti == mac->crnti) { LOG_I(NR_MAC, "This is the number of UCIs in the queue %ld\n", nr_uci_ind_queue.num_items); nfapi_nr_uci_indication_t *uci_ind = get_queue(&nr_uci_ind_queue); - if (uci_ind) + if (uci_ind && uci_ind->num_ucis > 0) { - LOG_I(NR_MAC, "This is the SFN/SF [%d, %d] of the UCI ind. \n", uci_ind->sfn, uci_ind->slot); - if (uci_ind->num_ucis > 0) + LOG_D(NR_MAC, "This is the SFN/SF [%d, %d] and RNTI %x of the UCI ind. ul_tti_req.pdu[%d]->rnti = %x \n", + uci_ind->sfn, uci_ind->slot, uci_ind->uci_list[0].pucch_pdu_format_0_1.rnti, i, ul_tti_req->pdus_list[i].pucch_pdu.rnti); + uci_ind->sfn = ul_tti_req->SFN; + uci_ind->slot = ul_tti_req->Slot; + for (int j = 0; j < uci_ind->num_ucis; j++) { - uci_ind->sfn = ul_tti_req->SFN; - uci_ind->slot = ul_tti_req->Slot; + nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[j].pucch_pdu_format_0_1; if (pdu_list->pucch_pdu.sr_flag) { - for (int j = 0; j < uci_ind->num_ucis; j++) + LOG_D(NR_MAC, "We have the SR flag in pdu i %d\n", i); + pdu_0_1->pduBitmap = 1; // (value->pduBitmap >> 1) & 0x01) == HARQ and (value->pduBitmap) & 0x01) == SR + pdu_0_1->sr = CALLOC(1, sizeof(*pdu_0_1->sr)); + pdu_0_1->sr->sr_confidence_level = 0; + pdu_0_1->sr->sr_indication = 1; + } + if (pdu_list->pucch_pdu.bit_len_harq > 0) + { + LOG_D(NR_MAC, "We have the Harq len bits %d\n", pdu_list->pucch_pdu.bit_len_harq); + pdu_0_1->pduBitmap = 2; // (value->pduBitmap >> 1) & 0x01) == HARQ and (value->pduBitmap) & 0x01) == SR + pdu_0_1->harq = CALLOC(1, sizeof(*pdu_0_1->harq)); + pdu_0_1->harq->num_harq = 1; + pdu_0_1->harq->harq_confidence_level = 0; + pdu_0_1->harq->harq_list = CALLOC(pdu_0_1->harq->num_harq, sizeof(*pdu_0_1->harq->harq_list)); + for (int k = 0; k < pdu_0_1->harq->num_harq; k++) { - nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[j].pucch_pdu_format_0_1; - pdu_0_1->sr = CALLOC(1, sizeof(*pdu_0_1->sr)); - pdu_0_1->sr->sr_confidence_level = 0; - pdu_0_1->sr->sr_indication = 0; + pdu_0_1->harq->harq_list[k].harq_value = 0; } - } - LOG_I(NR_MAC, "We have dequeued the previously filled uci_ind and updated the snf/slot to %d/%d.\n", - uci_ind->sfn, uci_ind->slot); - NR_UL_IND_t UL_INFO = { - .uci_ind = *uci_ind, - }; - send_nsa_standalone_msg(&UL_INFO, uci_ind->header.message_id); } + LOG_I(NR_MAC, "We have dequeued the previously filled uci_ind and updated the snf/slot to %d/%d.\n", + uci_ind->sfn, uci_ind->slot); + NR_UL_IND_t UL_INFO = { + .uci_ind = *uci_ind, + }; + send_nsa_standalone_msg(&UL_INFO, uci_ind->header.message_id); + for (int k = 0; k < uci_ind->num_ucis; k++) { - nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[k].pucch_pdu_format_0_1; - free(pdu_0_1->sr); - free(pdu_0_1->harq->harq_list); - free(pdu_0_1->harq); + nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[k].pucch_pdu_format_0_1; + if (pdu_list->pucch_pdu.sr_flag) + { + free(pdu_0_1->sr); + pdu_0_1->sr = NULL; + } + if (pdu_list->pucch_pdu.bit_len_harq > 1) + { + free(pdu_0_1->harq->harq_list); + pdu_0_1->harq->harq_list = NULL; + free(pdu_0_1->harq); + pdu_0_1->harq = NULL; + } } free(uci_ind->uci_list); + uci_ind->uci_list = NULL; free(uci_ind); + uci_ind = NULL; } } @@ -898,7 +922,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; - if ((!dl_info->dci_ind && !dl_info->rx_ind)) { //Melissa review this with Raymond|| !def_dci_pdu_rel15 + if ((!dl_info->dci_ind && !dl_info->rx_ind)) { // UL indication to schedule DCI reception nr_ue_scheduler(dl_info, NULL); } else { From eb5f517165f80d4d439556b73ffc8fb0f9749cbb Mon Sep 17 00:00:00 2001 From: David Kim Date: Fri, 1 Oct 2021 10:21:42 -0700 Subject: [PATCH 043/102] updated configuration file location for ci test. --- ci-scripts/conf_files/{ => episci}/episci_nr-ue.nfapi.conf | 0 .../conf_files/{ => episci}/episci_rcc.band7.tm1.nfapi.conf | 0 .../conf_files/episci}/episci_rcc.band78.tm1.106PRB.nfapi.conf | 0 ci-scripts/conf_files/{ => episci}/episci_ue.nfapi.conf | 0 ci-scripts/conf_files/{ => episci}/proxy_nr-ue.nfapi.conf | 0 ci-scripts/conf_files/{ => episci}/proxy_rcc.band7.tm1.nfapi.conf | 0 .../conf_files/episci}/proxy_rcc.band78.tm1.106PRB.nfapi.conf | 0 ci-scripts/conf_files/{ => episci}/proxy_ue.nfapi.conf | 0 8 files changed, 0 insertions(+), 0 deletions(-) rename ci-scripts/conf_files/{ => episci}/episci_nr-ue.nfapi.conf (100%) rename ci-scripts/conf_files/{ => episci}/episci_rcc.band7.tm1.nfapi.conf (100%) rename {targets/PROJECTS/GENERIC-LTE-EPC/CONF => ci-scripts/conf_files/episci}/episci_rcc.band78.tm1.106PRB.nfapi.conf (100%) rename ci-scripts/conf_files/{ => episci}/episci_ue.nfapi.conf (100%) rename ci-scripts/conf_files/{ => episci}/proxy_nr-ue.nfapi.conf (100%) rename ci-scripts/conf_files/{ => episci}/proxy_rcc.band7.tm1.nfapi.conf (100%) rename {targets/PROJECTS/GENERIC-LTE-EPC/CONF => ci-scripts/conf_files/episci}/proxy_rcc.band78.tm1.106PRB.nfapi.conf (100%) rename ci-scripts/conf_files/{ => episci}/proxy_ue.nfapi.conf (100%) diff --git a/ci-scripts/conf_files/episci_nr-ue.nfapi.conf b/ci-scripts/conf_files/episci/episci_nr-ue.nfapi.conf similarity index 100% rename from ci-scripts/conf_files/episci_nr-ue.nfapi.conf rename to ci-scripts/conf_files/episci/episci_nr-ue.nfapi.conf diff --git a/ci-scripts/conf_files/episci_rcc.band7.tm1.nfapi.conf b/ci-scripts/conf_files/episci/episci_rcc.band7.tm1.nfapi.conf similarity index 100% rename from ci-scripts/conf_files/episci_rcc.band7.tm1.nfapi.conf rename to ci-scripts/conf_files/episci/episci_rcc.band7.tm1.nfapi.conf diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/episci_rcc.band78.tm1.106PRB.nfapi.conf b/ci-scripts/conf_files/episci/episci_rcc.band78.tm1.106PRB.nfapi.conf similarity index 100% rename from targets/PROJECTS/GENERIC-LTE-EPC/CONF/episci_rcc.band78.tm1.106PRB.nfapi.conf rename to ci-scripts/conf_files/episci/episci_rcc.band78.tm1.106PRB.nfapi.conf diff --git a/ci-scripts/conf_files/episci_ue.nfapi.conf b/ci-scripts/conf_files/episci/episci_ue.nfapi.conf similarity index 100% rename from ci-scripts/conf_files/episci_ue.nfapi.conf rename to ci-scripts/conf_files/episci/episci_ue.nfapi.conf diff --git a/ci-scripts/conf_files/proxy_nr-ue.nfapi.conf b/ci-scripts/conf_files/episci/proxy_nr-ue.nfapi.conf similarity index 100% rename from ci-scripts/conf_files/proxy_nr-ue.nfapi.conf rename to ci-scripts/conf_files/episci/proxy_nr-ue.nfapi.conf diff --git a/ci-scripts/conf_files/proxy_rcc.band7.tm1.nfapi.conf b/ci-scripts/conf_files/episci/proxy_rcc.band7.tm1.nfapi.conf similarity index 100% rename from ci-scripts/conf_files/proxy_rcc.band7.tm1.nfapi.conf rename to ci-scripts/conf_files/episci/proxy_rcc.band7.tm1.nfapi.conf diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/proxy_rcc.band78.tm1.106PRB.nfapi.conf b/ci-scripts/conf_files/episci/proxy_rcc.band78.tm1.106PRB.nfapi.conf similarity index 100% rename from targets/PROJECTS/GENERIC-LTE-EPC/CONF/proxy_rcc.band78.tm1.106PRB.nfapi.conf rename to ci-scripts/conf_files/episci/proxy_rcc.band78.tm1.106PRB.nfapi.conf diff --git a/ci-scripts/conf_files/proxy_ue.nfapi.conf b/ci-scripts/conf_files/episci/proxy_ue.nfapi.conf similarity index 100% rename from ci-scripts/conf_files/proxy_ue.nfapi.conf rename to ci-scripts/conf_files/episci/proxy_ue.nfapi.conf From fb0a80ee84a9ce6240b46369c8ec09e96e6f1623 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Fri, 1 Oct 2021 15:53:23 -0700 Subject: [PATCH 044/102] Adding memset of def_dci_pdu_rel15 back in Removing the memset seemed to hide the problem and now the problem is appearing in a differnt manner... it is causing the NRUE to skip HARQ PIDs as its filling the UCI indication and process the DCI PDUs. So adding the memset causes the NR UE to crash becasue the DL_BWP_ID is becoming 0 which leads us to index into an pointer that is not allocated and then a crash happens in DCI handling. --- openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h | 2 -- openair2/LAYER2/NR_MAC_UE/mac_extern.h | 2 -- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 1 + 3 files changed, 1 insertion(+), 4 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h index 8145a37b45..5b4ebe2397 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h @@ -39,8 +39,6 @@ extern const uint8_t nr_slots_per_frame[5]; -extern dci_pdu_rel15_t def_dci_pdu_rel15[8]; - /* extern const uint32_t BSR_TABLE[BSR_TABLE_SIZE]; extern const uint32_t Extended_BSR_TABLE[BSR_TABLE_SIZE]; extern const uint8_t cqi2fmt0_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE]; diff --git a/openair2/LAYER2/NR_MAC_UE/mac_extern.h b/openair2/LAYER2/NR_MAC_UE/mac_extern.h index 7dd2a740f6..7959b07694 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_extern.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_extern.h @@ -66,8 +66,6 @@ extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10]; extern const uint16_t table_7_2_1[16]; -extern dci_pdu_rel15_t def_dci_pdu_rel15[8]; - extern void mac_rlc_data_ind(const module_id_t module_idP, const rnti_t rntiP, const eNB_index_t eNB_index, diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 2aeb289b41..d816d294cf 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -951,6 +951,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot, dl_info->thread_id); nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response); } + memset(def_dci_pdu_rel15, 0, sizeof(*def_dci_pdu_rel15)); } } From 1b2d8b5288bf9dde6dd1af4e6cc78891b0877acd Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Tue, 5 Oct 2021 11:40:40 -0700 Subject: [PATCH 045/102] def_dci_pdu_rel15 fix. In this commit we were trying to understand why the memset of the def_dci_pdu_rel15 array in the NRUE was casuing the NR UE to crash. This was happening becuase some of the members of the def_dci_pdu_rel15 array canont be zero in NSA mode. This was happening because sometimes, we would recevied two DCI indications in a row, after the first one, we would be memesetting the array to all 0s and then try to process the second DCI. The fix we have implemnted is to call the configure_dci() prior to processing ANY DCI, to ensure we have properly configured the UE to handle these DCIs. Also, in the gNB, it was not able to find the UL scheduled slot for the feedback harq because it was not accounting for the slot wrapping. --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 2 +- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 50e8a82f9d..847a6a808f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1317,7 +1317,7 @@ int nr_acknack_scheduling(int mod_id, while (i < 8) { LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot); - if (pdsch_to_harq_feedback[i] == pucch->ul_slot - slot) { + if (pdsch_to_harq_feedback[i] == (pucch->ul_slot - slot) % n_slots_frame) { ind_found = i; break; } diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index d816d294cf..0b5255d235 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -480,7 +480,7 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_ int num_dci_options = rel15_dci->num_dci_options; if (num_dci_options <= 0) { - LOG_I(NR_MAC, "num_dci_opts = %d for %dth pdu in dl_config_list\n", rel15_dci->num_dci_options, i); + LOG_I(NR_MAC, "num_dci_opts = %d for pdu[%d] in dl_config_list\n", rel15_dci->num_dci_options, i); } AssertFatal(num_dci_options <= sizeof(rel15_dci->dci_length_options) / sizeof(rel15_dci->dci_length_options[0]), "num_dci_options %d > dci_length_options array\n", num_dci_options); @@ -932,6 +932,8 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ for (int i = 0; i < dl_info->dci_ind->number_of_dcis; i++) { LOG_D(MAC,">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis); nr_scheduled_response_t scheduled_response; + nr_dcireq_t dcireq; + nr_ue_dcireq(&dcireq); int8_t ret = handle_dci(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, From 47e96132f629bbb0dd9e95448a581f9d33b5c33c Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Tue, 5 Oct 2021 16:09:52 -0700 Subject: [PATCH 046/102] Handling multiple DCIs in a single DL_TTI and TX_REQ --- openair2/LAYER2/NR_MAC_UE/mac_defs.h | 2 + openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 2 +- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 94 ++++++++++++-------- 3 files changed, 58 insertions(+), 40 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index 8d60aa74f5..fddd14bb8e 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -434,7 +434,9 @@ typedef struct { // Defined for abstracted mode nr_downlink_indication_t dl_info; NR_UE_HARQ_STATUS_t dl_harq_info[16]; + bool expected_dci; + bool index_has_dci[16]; pthread_mutex_t mutex_dl_info; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 16f4a6b215..03c8078953 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -2757,7 +2757,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, // check BWP id if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); else N_RB=mac->type0_PDCCH_CSS_config.num_rbs; -; + // indicating a DL DCI format 1bit pos++; diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 0b5255d235..dae821f897 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -229,6 +229,7 @@ static void copy_dl_tti_req_to_dl_info(nr_downlink_indication_t *dl_info, nfapi_ { NR_UE_MAC_INST_t *mac = get_mac_inst(dl_info->module_id); mac->expected_dci = false; + memset(mac->index_has_dci, 0, sizeof(*mac->index_has_dci)); int pdu_idx = 0; int num_pdus = dl_tti_request->dl_tti_request_body.nPDUs; @@ -262,7 +263,7 @@ static void copy_dl_tti_req_to_dl_info(nr_downlink_indication_t *dl_info, nfapi_ for (int j = 0; j < num_dcis; j++) { nfapi_nr_dl_dci_pdu_t *dci_pdu_list = &pdu_list->pdcch_pdu.pdcch_pdu_rel15.dci_pdu[j]; - if ((dci_pdu_list->RNTI != mac->crnti) && + if ((dci_pdu_list->RNTI != mac->crnti) && ((dci_pdu_list->RNTI != mac->ra.ra_rnti) || mac->ra.RA_RAPID_found)) { LOG_D(NR_MAC, "We are filtering PDCCH DCI pdu because RNTI doesnt match!\n"); @@ -271,6 +272,8 @@ static void copy_dl_tti_req_to_dl_info(nr_downlink_indication_t *dl_info, nfapi_ } fill_dl_info_with_pdcch(dl_info->dci_ind, dci_pdu_list, pdu_idx); mac->expected_dci = true; + LOG_D(NR_MAC, "Setting index_has_dci[%d] = true\n", j); + mac->index_has_dci[j] = true; pdu_idx++; } } @@ -280,6 +283,36 @@ static void copy_dl_tti_req_to_dl_info(nr_downlink_indication_t *dl_info, nfapi_ dl_info->frame = dl_tti_request->SFN; } +static void fill_rx_ind(nfapi_nr_pdu_t *pdu_list, fapi_nr_rx_indication_t *rx_ind, int pdu_idx, int pdu_type) +{ + AssertFatal(pdu_list->num_TLV < sizeof(pdu_list->TLVs) / sizeof(pdu_list->TLVs[0]), "Num TLVs exceeds TLV array size"); + int length = 0; + for (int j = 0; j < pdu_list->num_TLV; j++) + { + length += pdu_list->TLVs[j].length; + } + LOG_I(NR_PHY, "%s: num_tlv %d and length %d, pdu index %d\n", + __FUNCTION__, pdu_list->num_TLV, length, pdu_idx); + uint8_t *pdu = malloc(length); + AssertFatal(pdu != NULL, "%s: Out of memory in malloc", __FUNCTION__); + rx_ind->rx_indication_body[pdu_idx].pdsch_pdu.pdu = pdu; + for (int j = 0; j < pdu_list->num_TLV; j++) + { + const uint32_t *ptr; + if (pdu_list->TLVs[j].tag) + ptr = pdu_list->TLVs[j].value.ptr; + else + ptr = pdu_list->TLVs[j].value.direct; + memcpy(pdu, ptr, pdu_list->TLVs[j].length); + pdu += pdu_list->TLVs[j].length; + } + rx_ind->rx_indication_body[pdu_idx].pdsch_pdu.ack_nack = 1; + rx_ind->rx_indication_body[pdu_idx].pdsch_pdu.pdu_length = length; + rx_ind->rx_indication_body[pdu_idx].pdu_type = pdu_type; + +} + + static void copy_tx_data_req_to_dl_info(nr_downlink_indication_t *dl_info, nfapi_nr_tx_data_request_t *tx_data_request) { NR_UE_MAC_INST_t *mac = get_mac_inst(dl_info->module_id); @@ -292,45 +325,34 @@ static void copy_tx_data_req_to_dl_info(nr_downlink_indication_t *dl_info, nfapi dl_info->rx_ind = CALLOC(1, sizeof(fapi_nr_rx_indication_t)); AssertFatal(dl_info->rx_ind != NULL, "%s: Out of memory in calloc", __FUNCTION__); - dl_info->rx_ind->sfn = tx_data_request->SFN; - dl_info->rx_ind->slot = tx_data_request->Slot; - dl_info->rx_ind->number_pdus = num_pdus; + fapi_nr_rx_indication_t *rx_ind = dl_info->rx_ind; + rx_ind->sfn = tx_data_request->SFN; + rx_ind->slot = tx_data_request->Slot; + + int pdu_idx = 0; for (int i = 0; i < num_pdus; i++) { nfapi_nr_pdu_t *pdu_list = &tx_data_request->pdu_list[i]; - AssertFatal(pdu_list->num_TLV < sizeof(pdu_list->TLVs) / sizeof(pdu_list->TLVs[0]), "Num TLVs exceeds TLV array size"); - int length = 0; - for (int j = 0; j < pdu_list->num_TLV; j++) + if(mac->ra.ra_state <= WAIT_RAR) { - length += pdu_list->TLVs[j].length; + fill_rx_ind(pdu_list, rx_ind, pdu_idx, FAPI_NR_RX_PDU_TYPE_RAR); + pdu_idx++; } - LOG_I(NR_PHY, "%s: num_tlv %d and length %d, pdu index %d\n", - __FUNCTION__, pdu_list->num_TLV, length, i); - uint8_t *pdu = malloc(length); - AssertFatal(pdu != NULL, "%s: Out of memory in malloc", __FUNCTION__); - dl_info->rx_ind->rx_indication_body[i].pdsch_pdu.pdu = pdu; - for (int j = 0; j < pdu_list->num_TLV; j++) + else if (mac->index_has_dci[i]) { - const uint32_t *ptr; - if (pdu_list->TLVs[j].tag) - ptr = pdu_list->TLVs[j].value.ptr; - else - ptr = pdu_list->TLVs[j].value.direct; - memcpy(pdu, ptr, pdu_list->TLVs[j].length); - pdu += pdu_list->TLVs[j].length; + fill_rx_ind(pdu_list, rx_ind, pdu_idx, FAPI_NR_RX_PDU_TYPE_DLSCH); + pdu_idx++; } - dl_info->rx_ind->rx_indication_body[i].pdsch_pdu.ack_nack = 1; // Melissa we will come back during channel modelling - dl_info->rx_ind->rx_indication_body[i].pdsch_pdu.pdu_length = length; - if (tx_data_request->Slot == 7 && mac->ra.ra_state <= WAIT_RAR) { //Melissa this means we have an RAR, sorta hacky though - dl_info->rx_ind->rx_indication_body[i].pdu_type = FAPI_NR_RX_PDU_TYPE_RAR; - } - else { - dl_info->rx_ind->rx_indication_body[i].pdu_type = FAPI_NR_RX_PDU_TYPE_DLSCH; + else + { + LOG_D(NR_MAC, "mac->index_has_dci[%d] = 0, so this index contained a DCI for a different UE\n", i); } + } dl_info->slot = tx_data_request->Slot; dl_info->frame = tx_data_request->SFN; + dl_info->rx_ind->number_pdus = pdu_idx; } static void copy_ul_dci_data_req_to_dl_info(nr_downlink_indication_t *dl_info, nfapi_nr_ul_dci_request_t *ul_dci_req) @@ -587,16 +609,6 @@ static void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, { nr_ue_ul_indication(&ul_info); } - - - #if 0 //Melissa may want to free this - free(dl_info.dci_ind); - dl_info.dci_ind = NULL; - - free(dl_info.rx_ind); - dl_info.rx_ind = NULL; - #endif - } static void save_nr_measurement_info(nfapi_nr_dl_tti_request_t *dl_tti_request) @@ -746,7 +758,7 @@ void *nrue_standalone_pnf_task(void *context) save_nr_measurement_info(&dl_tti_request); check_and_process_dci(&dl_tti_request, NULL, NULL, NULL); if (mac->expected_dci) - { + { sfn_of_dl_tti_req = dl_tti_request.SFN; slot_of_dl_tti_req = dl_tti_request.Slot; } @@ -955,6 +967,8 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ } memset(def_dci_pdu_rel15, 0, sizeof(*def_dci_pdu_rel15)); } + free(dl_info->dci_ind); + dl_info->dci_ind = NULL; } if (dl_info->rx_ind != NULL) { @@ -995,6 +1009,8 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ break; } } + free(dl_info->rx_ind); + dl_info->rx_ind = NULL; } //clean up nr_downlink_indication_t *dl_info From 98bc149e98bd0002c02caf33481815938c031dc9 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Wed, 6 Oct 2021 09:47:19 -0700 Subject: [PATCH 047/102] Reverting change that that forces DCI config before handling By reverting this change, we will see the NRUE2 crash because the DCI wont be configured before handling. This will get fixed in the next commit by adding queues for the nFAPI messages, therefore forcing us to handle the nfapi messages only after we have processes the corresponding slot indication. --- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index dae821f897..f505022336 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -944,8 +944,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ for (int i = 0; i < dl_info->dci_ind->number_of_dcis; i++) { LOG_D(MAC,">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis); nr_scheduled_response_t scheduled_response; - nr_dcireq_t dcireq; - nr_ue_dcireq(&dcireq); int8_t ret = handle_dci(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, From 746d07464657edd4397c9e075dffa659db025493 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Wed, 6 Oct 2021 18:13:13 -0700 Subject: [PATCH 048/102] Queuing all nFAPI messages and handling after slot ind This commit changes the stub functionality entirely. We are now queueing any received NR nFAPI message and handling it only after we recevie a slot ind that corresponds with the nFAPI message's sfn/slot value. When doing this, an existing issue has been brought to light. The gNB and NR UE are not in sync when it comes to their slot indications. Generally, the NR UE seems to be ahead of the gNB by around 6-7 slots. This commit has a hack... when we receive a slot indication at the moment, we decrament it by 6 to try to keep the NRUE from being ahead of the gNB. This will be fixed shortly... This was a temporary fix.. --- executables/nr-ue.c | 215 ++++++++---- openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 1 - openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 359 +++++++++++++------- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h | 7 + openair2/RRC/NR_UE/rrc_UE.c | 4 + openair2/RRC/NR_UE/rrc_proto.h | 4 + 6 files changed, 405 insertions(+), 185 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 00aa1f9125..43dc7f7fc6 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -30,6 +30,7 @@ #include "LAYER2/nr_pdcp/nr_pdcp_entity.h" //#include "executables/softmodem-common.h" #include "SCHED_NR_UE/pucch_uci_ue_nr.h" +#include "openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h" /* * NR SLOT PROCESSING SEQUENCE @@ -224,6 +225,30 @@ static bool sfn_slot_matcher(void *wanted, void *candidate) return NFAPI_SFNSLOT2SFN(sfn_sf) == ind->sfn && NFAPI_SFNSLOT2SLOT(sfn_sf) == ind->slot; } + case NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST: + { + nfapi_nr_dl_tti_request_t *ind = candidate; + return NFAPI_SFNSLOT2SFN(sfn_sf) == ind->SFN && NFAPI_SFNSLOT2SLOT(sfn_sf) == ind->Slot; + } + + case NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST: + { + nfapi_nr_tx_data_request_t *ind = candidate; + return NFAPI_SFNSLOT2SFN(sfn_sf) == ind->SFN && NFAPI_SFNSLOT2SLOT(sfn_sf) == ind->Slot; + } + + case NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST: + { + nfapi_nr_ul_dci_request_t *ind = candidate; + return NFAPI_SFNSLOT2SFN(sfn_sf) == ind->SFN && NFAPI_SFNSLOT2SLOT(sfn_sf) == ind->Slot; + } + + case NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST: + { + nfapi_nr_ul_tti_request_t *ind = candidate; + return NFAPI_SFNSLOT2SFN(sfn_sf) == ind->SFN && NFAPI_SFNSLOT2SLOT(sfn_sf) == ind->Slot; + } + default: LOG_E(NR_MAC, "sfn_slot_match bad ID: %d\n", msg->message_id); @@ -232,6 +257,130 @@ static bool sfn_slot_matcher(void *wanted, void *candidate) return false; } +static void process_queued_nr_nfapi_msgs(int sfn_slot) +{ + nfapi_nr_rach_indication_t *rach_ind = unqueue_matching(&nr_rach_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); + nfapi_nr_rx_data_indication_t *rx_ind = unqueue_matching(&nr_rx_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); + nfapi_nr_crc_indication_t *crc_ind = unqueue_matching(&nr_crc_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); + nfapi_nr_dl_tti_request_t *dl_tti_request = unqueue_matching(&nr_dl_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); + nfapi_nr_tx_data_request_t *tx_data_request = unqueue_matching(&nr_tx_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); + nfapi_nr_ul_dci_request_t *ul_dci_request = unqueue_matching(&nr_ul_dci_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); + nfapi_nr_ul_tti_request_t *ul_tti_request = unqueue_matching(&nr_ul_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); + + if (rach_ind && rach_ind->number_of_pdus > 0) + { + NR_UL_IND_t UL_INFO = { + .rach_ind = *rach_ind, + }; + send_nsa_standalone_msg(&UL_INFO, rach_ind->header.message_id); + for (int i = 0; i < rach_ind->number_of_pdus; i++) + { + free(rach_ind->pdu_list[i].preamble_list); + } + free(rach_ind->pdu_list); + free(rach_ind); + nr_Msg1_transmitted(0, 0, NFAPI_SFNSLOT2SFN(sfn_slot), 0); + } + if (crc_ind && crc_ind->number_crcs > 0) + { + NR_UL_IND_t UL_INFO = { + .crc_ind = *crc_ind, + }; + send_nsa_standalone_msg(&UL_INFO, crc_ind->header.message_id); + free(crc_ind->crc_list); + free(crc_ind); + } + if (rx_ind && rx_ind->number_of_pdus > 0) + { + NR_UL_IND_t UL_INFO = { + .rx_ind = *rx_ind, + }; + send_nsa_standalone_msg(&UL_INFO, rx_ind->header.message_id); + free(rx_ind->pdu_list); + free(rx_ind); + } + if (dl_tti_request || tx_data_request) + { + if (!tx_data_request) + { + save_nr_measurement_info(dl_tti_request); + LOG_E(NR_MAC, "[%d %d] No corresponding tx_data_request for given dl_tti_request\n", + NFAPI_SFNSLOT2SFN(sfn_slot), NFAPI_SFNSLOT2SLOT(sfn_slot)); + if (!put_queue(&nr_dl_tti_req_queue, dl_tti_request)) + { + LOG_E(NR_PHY, "put_queue failed for dl_tti_request.\n"); + free(dl_tti_request); + dl_tti_request = NULL; + } + } + else if (!dl_tti_request) + { + LOG_E(NR_MAC, "[%d %d] No corresponding dl_tti_request for given tx_data_request \n", + NFAPI_SFNSLOT2SFN(sfn_slot), NFAPI_SFNSLOT2SLOT(sfn_slot)); + if (!put_queue(&nr_tx_req_queue, tx_data_request)) + { + LOG_E(NR_PHY, "put_queue failed for tx_request.\n"); + free(tx_data_request); + tx_data_request = NULL; + } + } + else if (dl_tti_request->dl_tti_request_body.nPDUs > 0 && tx_data_request->Number_of_PDUs > 0) + { + save_nr_measurement_info(dl_tti_request); + check_and_process_dci(dl_tti_request, tx_data_request, NULL, NULL); + } + } + if (ul_dci_request && ul_dci_request->numPdus > 0) + { + check_and_process_dci(NULL, NULL, ul_dci_request, NULL); + //free(ul_dci_request); + //ul_dci_request = NULL; + } + if (ul_tti_request && ul_tti_request->n_pdus > 0) + { + check_and_process_dci(NULL, NULL, NULL, ul_tti_request); + //free(ul_tti_request); + //ul_tti_request = NULL; + } +} + +static void check_nr_prach(NR_UE_MAC_INST_t *mac, nr_uplink_indication_t *ul_info, NR_PRACH_RESOURCES_t *prach_resources) +{ + fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, ul_info->slot_tx); + if (!ul_config) + { + LOG_E(NR_MAC, "mac->ul_config is null! \n"); + return; + } + if (mac->ra.ra_state != RA_SUCCEEDED) + { + AssertFatal(ul_config->number_pdus < sizeof(ul_config->ul_config_list) / sizeof(ul_config->ul_config_list[0]), + "Number of PDUS in ul_config = %d > ul_config_list num elements", ul_config->number_pdus); + fapi_nr_ul_config_prach_pdu *prach_pdu = &ul_config->ul_config_list[ul_config->number_pdus].prach_config_pdu; + uint8_t nr_prach = nr_ue_get_rach(prach_resources, + prach_pdu, + ul_info->module_id, + ul_info->cc_id, + ul_info->frame_tx, + ul_info->gNB_index, + ul_info->slot_tx); + if (nr_prach == 1) + { + L1_nsa_prach_procedures(ul_info->frame_tx, ul_info->slot_tx, prach_pdu); + ul_config->number_pdus = 0; + ul_info->ue_sched_mode = SCHED_ALL; + } + else if (nr_prach == 2) + { + LOG_I(NR_PHY, "In %s: [UE %d] RA completed, setting UE mode to PUSCH\n", __FUNCTION__, ul_info->module_id); + } + else if(nr_prach == 3) + { + LOG_I(NR_PHY, "In %s: [UE %d] RA failed, setting UE mode to PRACH\n", __FUNCTION__, ul_info->module_id); + } + } +} + static void *NRUE_phy_stub_standalone_pnf_task(void *arg) { LOG_I(MAC, "Clearing Queues\n"); @@ -319,71 +468,9 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) { LOG_D(NR_MAC, "Slot %d. calling nr_ue_ul_ind() from %s\n", ul_info.slot_tx, __FUNCTION__); nr_ue_ul_indication(&ul_info); - fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, ul_info.slot_tx); - if (!ul_config) - { - LOG_E(NR_MAC, "mac->ul_config is null! \n"); - continue; - } - if (mac->ra.ra_state != RA_SUCCEEDED) - { - AssertFatal(ul_config->number_pdus < sizeof(ul_config->ul_config_list) / sizeof(ul_config->ul_config_list[0]), - "Number of PDUS in ul_config = %d > ul_config_list num elements", ul_config->number_pdus); - fapi_nr_ul_config_prach_pdu *prach_pdu = &ul_config->ul_config_list[ul_config->number_pdus].prach_config_pdu; - uint8_t nr_prach = nr_ue_get_rach(&prach_resources, prach_pdu, mod_id, CC_id, ul_info.frame_tx, gNB_id, ul_info.slot_tx); - if (nr_prach == 1) - { - L1_nsa_prach_procedures(ul_info.frame_tx, ul_info.slot_tx, prach_pdu); - ul_config->number_pdus = 0; - ul_info.ue_sched_mode = SCHED_ALL; - } - else if (nr_prach == 2) - { - LOG_I(NR_PHY, "In %s: [UE %d] RA completed, setting UE mode to PUSCH\n", __FUNCTION__, mod_id); - } - else if(nr_prach == 3) - { - LOG_I(NR_PHY, "In %s: [UE %d] RA failed, setting UE mode to PRACH\n", __FUNCTION__, mod_id); - } - } - } - - nfapi_nr_rach_indication_t *rach_ind = unqueue_matching(&nr_rach_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); - nfapi_nr_rx_data_indication_t *rx_ind = unqueue_matching(&nr_rx_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); - nfapi_nr_crc_indication_t *crc_ind = unqueue_matching(&nr_crc_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); - - if (rach_ind && rach_ind->number_of_pdus > 0) - { - NR_UL_IND_t UL_INFO = { - .rach_ind = *rach_ind, - }; - send_nsa_standalone_msg(&UL_INFO, rach_ind->header.message_id); - for (int i = 0; i < rach_ind->number_of_pdus; i++) - { - free(rach_ind->pdu_list[i].preamble_list); - } - free(rach_ind->pdu_list); - free(rach_ind); - nr_Msg1_transmitted(mod_id, CC_id, frame, gNB_id); - } - if (crc_ind && crc_ind->number_crcs > 0) - { - NR_UL_IND_t UL_INFO = { - .crc_ind = *crc_ind, - }; - send_nsa_standalone_msg(&UL_INFO, crc_ind->header.message_id); - free(crc_ind->crc_list); - free(crc_ind); - } - if (rx_ind && rx_ind->number_of_pdus > 0) - { - NR_UL_IND_t UL_INFO = { - .rx_ind = *rx_ind, - }; - send_nsa_standalone_msg(&UL_INFO, rx_ind->header.message_id); - free(rx_ind->pdu_list); - free(rx_ind); + check_nr_prach(mac, &ul_info, &prach_resources); } + process_queued_nr_nfapi_msgs(sfn_slot); } return NULL; } diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index e2a92781d8..dcb1262a26 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -48,7 +48,6 @@ const char *ul_pdu_type[]={"PRACH", "PUCCH", "PUSCH", "SRS"}; queue_t nr_rx_ind_queue; queue_t nr_crc_ind_queue; queue_t nr_uci_ind_queue; -queue_t nr_sfn_slot_queue; int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response) { diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index f505022336..ba482d5d0f 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -55,6 +55,12 @@ static int g_harq_pid; int current_sfn_slot; sem_t sfn_slot_semaphore; +queue_t nr_sfn_slot_queue; +queue_t nr_dl_tti_req_queue; +queue_t nr_tx_req_queue; +queue_t nr_ul_dci_req_queue; +queue_t nr_ul_tti_req_queue; + void nrue_init_standalone_socket(int tx_port, int rx_port) { { @@ -532,10 +538,10 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_ } } -static void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, - nfapi_nr_tx_data_request_t *tx_data_request, - nfapi_nr_ul_dci_request_t *ul_dci_request, - nfapi_nr_ul_tti_request_t *ul_tti_request) +void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, + nfapi_nr_tx_data_request_t *tx_data_request, + nfapi_nr_ul_dci_request_t *ul_dci_request, + nfapi_nr_ul_tti_request_t *ul_tti_request) { frame_t frame = 0; int slot = 0; @@ -560,7 +566,7 @@ static void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, incoming tx_data_request is also destined for the current UE. If the RAR hasn't been processed yet, we do not want to be filtering the tx_data_requests. */ - else if (tx_data_request && (mac->expected_dci || mac->ra.ra_state == WAIT_RAR)) + if (tx_data_request && (mac->expected_dci || mac->ra.ra_state == WAIT_RAR)) { frame = tx_data_request->SFN; slot = tx_data_request->Slot; @@ -584,6 +590,7 @@ static void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, else { if (pthread_mutex_unlock(&mac->mutex_dl_info)) abort(); + LOG_E(NR_MAC, "Error! All indications were NULL\n"); return; } @@ -611,7 +618,7 @@ static void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, } } -static void save_nr_measurement_info(nfapi_nr_dl_tti_request_t *dl_tti_request) +void save_nr_measurement_info(nfapi_nr_dl_tti_request_t *dl_tti_request) { int num_pdus = dl_tti_request->dl_tti_request_body.nPDUs; char buffer[MAX_MESSAGE_SIZE]; @@ -647,26 +654,183 @@ static void save_nr_measurement_info(nfapi_nr_dl_tti_request_t *dl_tti_request) nsa_sendmsg_to_lte_ue(buffer, pack_len, NR_UE_RRC_MEASUREMENT); LOG_A(NR_RRC, "Populated NR_UE_RRC_MEASUREMENT information and sent to LTE UE\n"); } +# if 0 +static void process_nr_dl_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_header_t header) +{ + NR_UE_MAC_INST_t *mac = get_mac_inst(0); + char buffer_for_tx_data_req[NFAPI_MAX_PACKED_MESSAGE_SIZE]; + ssize_t len_of_tx_data_req = 0; + int sfn_of_tx_data_req = 0; + int slot_of_tx_data_req = 0; + int sfn_of_dl_tti_req = 0; + int slot_of_dl_tti_req = 0; + int delta = 0; + nfapi_nr_dl_tti_request_t dl_tti_request; + nfapi_nr_ul_tti_request_t ul_tti_request; + nfapi_nr_tx_data_request_t tx_data_request; + nfapi_nr_ul_dci_request_t ul_dci_request; + if (dl_tti_req) + { + LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST message in sfn/slot %d %d. \n", + dl_tti_request.SFN, dl_tti_request.Slot); + save_nr_measurement_info(&dl_tti_request); + check_and_process_dci(&dl_tti_request, NULL, NULL, NULL); + if (mac->expected_dci) + { + sfn_of_dl_tti_req = dl_tti_request.SFN; + slot_of_dl_tti_req = dl_tti_request.Slot; + } + if (len_of_tx_data_req > 0 + && sfn_of_dl_tti_req == sfn_of_tx_data_req + && slot_of_dl_tti_req == slot_of_tx_data_req) + { + if (nfapi_nr_p7_message_unpack((void *)buffer_for_tx_data_req, len_of_tx_data_req, &tx_data_request, + sizeof(tx_data_request), NULL) < 0) + { + LOG_E(NR_PHY, "Message tx_data_request failed to unpack\n"); + break; + } + LOG_I(NR_PHY, "Processing an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", + tx_data_request.SFN, tx_data_request.Slot); + check_and_process_dci(NULL, &tx_data_request, NULL, NULL); + len_of_tx_data_req = 0; + } + } + if (tx_request) + { + LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", + tx_data_request.SFN, tx_data_request.Slot); + + if (tx_data_request.SFN == sfn_of_dl_tti_req && tx_data_request.Slot == slot_of_dl_tti_req + && (mac->expected_dci || mac->ra.ra_state <= WAIT_RAR)) + { + check_and_process_dci(NULL, &tx_data_request, NULL, NULL); + } + else + { + len_of_tx_data_req = len; + sfn_of_tx_data_req = tx_data_request.SFN; + slot_of_tx_data_req = tx_data_request.Slot; + memcpy(buffer_for_tx_data_req, buffer, len); + LOG_I(NR_PHY, "Saved an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", + tx_data_request.SFN, tx_data_request.Slot); + } + } + if (ul_dci_request) + { + LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST message in SFN/slot %d %d. \n", + ul_dci_request.SFN, ul_dci_request.Slot); + delta = NFAPI_SFNSLOT2DEC(sfn, slot) - NFAPI_SFNSLOT2DEC(ul_dci_request.SFN, ul_dci_request.Slot); + if (delta < -NFAPI_SFNSLOT2DEC(512, 0)) + { + delta += NFAPI_SFNSLOT2DEC(1024, 0); + } + if (delta < 6) + { + check_and_process_dci(NULL, NULL, &ul_dci_request, NULL); + } + } + if (ul_tti_request) + { + LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST message in SFN/slot %d %d. \n", + ul_tti_request.SFN, ul_tti_request.Slot); + check_and_process_dci(NULL, NULL, NULL, &ul_tti_request); + } + else + LOG_E(NR_PHY, "Case Statement has no corresponding nfapi message, this is the header ID %d\n", header.message_id); + +} +#endif +static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_header_t header) +{ + nfapi_nr_dl_tti_request_t dl_tti_request; + nfapi_nr_tx_data_request_t tx_data_request; + nfapi_nr_ul_dci_request_t ul_dci_request; + nfapi_nr_ul_tti_request_t ul_tti_request; + switch (header.message_id) + { + case NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST: + if (nfapi_nr_p7_message_unpack((void *)buffer, len, &dl_tti_request, + sizeof(dl_tti_request), NULL) < 0) + { + LOG_E(NR_PHY, "Message dl_tti_request failed to unpack\n"); + break; + } + LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST message in sfn/slot %d %d. \n", + dl_tti_request.SFN, dl_tti_request.Slot); + if (!put_queue(&nr_dl_tti_req_queue, &dl_tti_request)) + { + LOG_E(NR_PHY, "put_queue failed for dl_tti_request.\n"); + } + break; + + case NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST: + if (nfapi_nr_p7_message_unpack((void *)buffer, len, &tx_data_request, + sizeof(tx_data_request), NULL) < 0) + { + LOG_E(NR_PHY, "Message tx_data_request failed to unpack\n"); + break; + } + LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", + tx_data_request.SFN, tx_data_request.Slot); + if (!put_queue(&nr_tx_req_queue, &tx_data_request)) + { + LOG_E(NR_PHY, "put_queue failed for tx_request.\n"); + } + break; + + case NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST: + if (nfapi_nr_p7_message_unpack((void *)buffer, len, &ul_dci_request, + sizeof(ul_dci_request), NULL) < 0) + { + LOG_E(NR_PHY, "Message ul_dci_request failed to unpack\n"); + break; + } + LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST message in SFN/slot %d %d. \n", + ul_dci_request.SFN, ul_dci_request.Slot); + if (!put_queue(&nr_ul_dci_req_queue, &ul_dci_request)) + { + LOG_E(NR_PHY, "put_queue failed for ul_dci_request.\n"); + } + break; + + case NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST: + if (nfapi_nr_p7_message_unpack((void *)buffer, len, &ul_tti_request, + sizeof(ul_tti_request), NULL) < 0) + { + LOG_E(NR_PHY, "Message ul_tti_request failed to unpack\n"); + break; + } + LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST message in SFN/slot %d %d. \n", + ul_tti_request.SFN, ul_tti_request.Slot); + if (!put_queue(&nr_ul_tti_req_queue, &ul_tti_request)) + { + LOG_E(NR_PHY, "put_queue failed for ul_tti_request.\n"); + } + break; + + default: + LOG_E(NR_PHY, "Invalid nFAPI message. Header ID %d\n", + header.message_id); + break; + } + return; +} + uint16_t sfn_slot_pool[512]; uint16_t sfn_slot_id; - void *nrue_standalone_pnf_task(void *context) { - NR_UE_MAC_INST_t *mac = get_mac_inst(0); struct sockaddr_in server_address; socklen_t addr_len = sizeof(server_address); - char buffer[NFAPI_MAX_PACKED_MESSAGE_SIZE]; - char buffer_for_tx_data_req[NFAPI_MAX_PACKED_MESSAGE_SIZE]; - ssize_t len_of_tx_data_req = 0; - int sfn_of_tx_data_req = 0; - int slot_of_tx_data_req = 0; - int sfn_of_dl_tti_req = 0; - int slot_of_dl_tti_req = 0; - int sfn = 0; - int slot = 0; - int delta = 0; int sd = ue_rx_sock_descriptor; assert(sd > 0); + + char buffer[NFAPI_MAX_PACKED_MESSAGE_SIZE]; + int sfn = 0; + int slot = 0; + + LOG_I(NR_RRC, "Sucessfully started %s.\n", __FUNCTION__); while (true) @@ -686,6 +850,61 @@ void *nrue_standalone_pnf_task(void *context) { uint16_t sfn_slot = 0; memcpy((void *)&sfn_slot, buffer, sizeof(sfn_slot)); + sfn = NFAPI_SFNSLOT2SFN(sfn_slot); + slot = NFAPI_SFNSLOT2SLOT(sfn_slot); + if (slot == 5) + { + slot = 19; + if (sfn == 0) + sfn = 1023; + else + sfn = sfn - 1; + } + else if (slot == 4) + { + slot = 18; + if (sfn == 0) + sfn = 1023; + else + sfn = sfn - 1; + } + else if (slot == 3) + { + slot = 17; + if (sfn == 0) + sfn = 1023; + else + sfn = sfn - 1; + } + else if (slot == 2) + { + slot = 16; + if (sfn == 0) + sfn = 1023; + else + sfn = sfn - 1; + } + else if (slot == 1) + { + slot = 15; + if (sfn == 0) + sfn = 1023; + else + sfn = sfn - 1; + } + else if (slot == 0) + { + slot = 14; + if (sfn == 0) + sfn = 1023; + else + sfn = sfn - 1; + } + else + { + slot = slot - 6; + } + sfn_slot = NFAPI_SFNSLOT2HEX(sfn, slot); current_sfn_slot = sfn_slot; sfn_slot_pool[sfn_slot_id] = sfn_slot; @@ -702,8 +921,7 @@ void *nrue_standalone_pnf_task(void *context) LOG_E(NR_PHY, "sem_post() error\n"); abort(); } - sfn = NFAPI_SFNSLOT2SFN(sfn_slot); - slot = NFAPI_SFNSLOT2SLOT(sfn_slot); + LOG_I(NR_PHY, "Received from proxy sfn %d slot %d\n", sfn, slot); } else if (len == sizeof(nr_phy_channel_params_t)) @@ -733,111 +951,12 @@ void *nrue_standalone_pnf_task(void *context) else { nfapi_p7_message_header_t header; - nfapi_nr_dl_tti_request_t dl_tti_request; - nfapi_nr_ul_tti_request_t ul_tti_request; - nfapi_nr_tx_data_request_t tx_data_request; - nfapi_nr_ul_dci_request_t ul_dci_request; if (nfapi_p7_message_header_unpack((void *)buffer, len, &header, sizeof(header), NULL) < 0) { LOG_E(NR_PHY, "Header unpack failed for nrue_standalone pnf\n"); continue; } - else - { - switch (header.message_id) - { - case NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST: - if (nfapi_nr_p7_message_unpack((void *)buffer, len, &dl_tti_request, - sizeof(nfapi_nr_dl_tti_request_t), NULL) < 0) - { - LOG_E(NR_PHY, "Message dl_tti_request failed to unpack\n"); - break; - } - LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST message in sfn/slot %d %d. \n", - dl_tti_request.SFN, dl_tti_request.Slot); - save_nr_measurement_info(&dl_tti_request); - check_and_process_dci(&dl_tti_request, NULL, NULL, NULL); - if (mac->expected_dci) - { - sfn_of_dl_tti_req = dl_tti_request.SFN; - slot_of_dl_tti_req = dl_tti_request.Slot; - } - if (len_of_tx_data_req > 0 - && sfn_of_dl_tti_req == sfn_of_tx_data_req - && slot_of_dl_tti_req == slot_of_tx_data_req) - { - if (nfapi_nr_p7_message_unpack((void *)buffer_for_tx_data_req, len_of_tx_data_req, &tx_data_request, - sizeof(tx_data_request), NULL) < 0) - { - LOG_E(NR_PHY, "Message tx_data_request failed to unpack\n"); - break; - } - LOG_I(NR_PHY, "Processing an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", - tx_data_request.SFN, tx_data_request.Slot); - check_and_process_dci(NULL, &tx_data_request, NULL, NULL); - len_of_tx_data_req = 0; - } - break; - case NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST: - if (nfapi_nr_p7_message_unpack((void *)buffer, len, &tx_data_request, - sizeof(tx_data_request), NULL) < 0) - { - LOG_E(NR_PHY, "Message tx_data_request failed to unpack\n"); - break; - } - LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", - tx_data_request.SFN, tx_data_request.Slot); - - if (tx_data_request.SFN == sfn_of_dl_tti_req && tx_data_request.Slot == slot_of_dl_tti_req - && (mac->expected_dci || mac->ra.ra_state <= WAIT_RAR)) - { - check_and_process_dci(NULL, &tx_data_request, NULL, NULL); - } - else - { - len_of_tx_data_req = len; - sfn_of_tx_data_req = tx_data_request.SFN; - slot_of_tx_data_req = tx_data_request.Slot; - memcpy(buffer_for_tx_data_req, buffer, len); - LOG_I(NR_PHY, "Saved an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", - tx_data_request.SFN, tx_data_request.Slot); - } - break; - case NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST: - if (nfapi_nr_p7_message_unpack((void *)buffer, len, &ul_dci_request, - sizeof(ul_dci_request), NULL) < 0) - { - LOG_E(NR_PHY, "Message ul_dci_request failed to unpack\n"); - break; - } - LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST message in SFN/slot %d %d. \n", - ul_dci_request.SFN, ul_dci_request.Slot); - delta = NFAPI_SFNSLOT2DEC(sfn, slot) - NFAPI_SFNSLOT2DEC(ul_dci_request.SFN, ul_dci_request.Slot); - if (delta < -NFAPI_SFNSLOT2DEC(512, 0)) - { - delta += NFAPI_SFNSLOT2DEC(1024, 0); - } - if (delta < 6) - { - check_and_process_dci(NULL, NULL, &ul_dci_request, NULL); - } - break; - case NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST: - if (nfapi_nr_p7_message_unpack((void *)buffer, len, &ul_tti_request, - sizeof(ul_tti_request), NULL) < 0) - { - LOG_E(NR_PHY, "Message ul_tti_request failed to unpack\n"); - break; - } - LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST message in SFN/slot %d %d. \n", - ul_tti_request.SFN, ul_tti_request.Slot); - check_and_process_dci(NULL, NULL, NULL, &ul_tti_request); - break; - default: - LOG_E(NR_PHY, "Case Statement has no corresponding nfapi message, this is the header ID %d\n", header.message_id); - break; - } - } + enqueue_nr_nfapi_msg(buffer, len, header); } } //while(true) } diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h index 055da7e3a6..2bd1888c18 100755 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h @@ -234,6 +234,13 @@ typedef struct nfapi_dl_tti_config_req_tx_data_req_t void send_nsa_standalone_msg(NR_UL_IND_t *UL_INFO, uint16_t msg_id); +void save_nr_measurement_info(nfapi_nr_dl_tti_request_t *dl_tti_request); + +void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, + nfapi_nr_tx_data_request_t *tx_data_request, + nfapi_nr_ul_dci_request_t *ul_dci_request, + nfapi_nr_ul_tti_request_t *ul_tti_request); + /**\brief done free of memory allocation by module_id and release to pointer pool. \param module_id module id*/ int nr_ue_if_module_kill(uint32_t module_id); diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index d413513c7a..a5ce7c926d 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -2890,6 +2890,10 @@ static void start_oai_nrue_threads() init_queue(&nr_crc_ind_queue); init_queue(&nr_uci_ind_queue); init_queue(&nr_sfn_slot_queue); + init_queue(&nr_dl_tti_req_queue); + init_queue(&nr_tx_req_queue); + init_queue(&nr_ul_dci_req_queue); + init_queue(&nr_ul_tti_req_queue); if (sem_init(&sfn_slot_semaphore, 0, 0) != 0) { diff --git a/openair2/RRC/NR_UE/rrc_proto.h b/openair2/RRC/NR_UE/rrc_proto.h index 0b37036fd1..f5178f469f 100644 --- a/openair2/RRC/NR_UE/rrc_proto.h +++ b/openair2/RRC/NR_UE/rrc_proto.h @@ -46,6 +46,10 @@ extern queue_t nr_rx_ind_queue; extern queue_t nr_crc_ind_queue; extern queue_t nr_uci_ind_queue; extern queue_t nr_sfn_slot_queue; +extern queue_t nr_dl_tti_req_queue; +extern queue_t nr_tx_req_queue; +extern queue_t nr_ul_dci_req_queue; +extern queue_t nr_ul_tti_req_queue; // // main_rrc.c // From c6d668b0db2f85b9076b3f17249b6f905b7f946a Mon Sep 17 00:00:00 2001 From: francescomani Date: Thu, 7 Oct 2021 17:10:54 +0200 Subject: [PATCH 049/102] fix in dlsch allocation mask --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index b14b078597..b8478e41b3 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -741,11 +741,11 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map; uint8_t rballoc_mask[bwpSize]; int n_rb_sched = 0; - for (int i = BWPStart; i < bwpSize; i++) { + for (int i = 0; i < bwpSize; i++) { // calculate mask: init with "NOT" vrb_map: // if any RB in vrb_map is blocked (1), the current RBG will be 0 - rballoc_mask[i-BWPStart] = !vrb_map[i]; - n_rb_sched += rballoc_mask[i-BWPStart]; + rballoc_mask[i] = !vrb_map[i+BWPStart]; + n_rb_sched += rballoc_mask[i]; } /* Retrieve amount of data to send for this UE */ From 5552d53b08a6e433fe5df2e08a62fcc49fc20495 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 7 Oct 2021 10:06:40 -0700 Subject: [PATCH 050/102] gNB and NRUE slots not matching is what happens in LTE This commit allows us to call the scheduler for every slot indication we get to ensure we properly configure the DCI. Also, we are sure to process the DCI only when we have both the config (dl_tti) and the payload (tx_req). Lastly, removed the hack to the slot indication (we do not shift the slot indication by -6 anymore). We are passing up to 4 NSA UEs, but sometimes one will not complete the CFRA procedure. --- executables/nr-ue.c | 36 ++--- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 143 +------------------- 2 files changed, 11 insertions(+), 168 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 43dc7f7fc6..48d44ae1ca 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -262,10 +262,9 @@ static void process_queued_nr_nfapi_msgs(int sfn_slot) nfapi_nr_rach_indication_t *rach_ind = unqueue_matching(&nr_rach_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); nfapi_nr_rx_data_indication_t *rx_ind = unqueue_matching(&nr_rx_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); nfapi_nr_crc_indication_t *crc_ind = unqueue_matching(&nr_crc_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); - nfapi_nr_dl_tti_request_t *dl_tti_request = unqueue_matching(&nr_dl_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); - nfapi_nr_tx_data_request_t *tx_data_request = unqueue_matching(&nr_tx_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); - nfapi_nr_ul_dci_request_t *ul_dci_request = unqueue_matching(&nr_ul_dci_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); - nfapi_nr_ul_tti_request_t *ul_tti_request = unqueue_matching(&nr_ul_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); + nfapi_nr_dl_tti_request_t *dl_tti_request = get_queue(&nr_dl_tti_req_queue); + nfapi_nr_ul_dci_request_t *ul_dci_request = get_queue(&nr_ul_dci_req_queue); + nfapi_nr_ul_tti_request_t *ul_tti_request = get_queue(&nr_ul_tti_req_queue); if (rach_ind && rach_ind->number_of_pdus > 0) { @@ -299,13 +298,14 @@ static void process_queued_nr_nfapi_msgs(int sfn_slot) free(rx_ind->pdu_list); free(rx_ind); } - if (dl_tti_request || tx_data_request) + if (dl_tti_request) { + int dl_tti_sfn_slot = NFAPI_SFNSLOT2HEX(dl_tti_request->SFN, dl_tti_request->Slot); + nfapi_nr_tx_data_request_t *tx_data_request = unqueue_matching(&nr_tx_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &dl_tti_sfn_slot); if (!tx_data_request) { - save_nr_measurement_info(dl_tti_request); - LOG_E(NR_MAC, "[%d %d] No corresponding tx_data_request for given dl_tti_request\n", - NFAPI_SFNSLOT2SFN(sfn_slot), NFAPI_SFNSLOT2SLOT(sfn_slot)); + LOG_E(NR_MAC, "[%d %d] No corresponding tx_data_request for given dl_tti_request sfn/slot\n", + NFAPI_SFNSLOT2SFN(dl_tti_sfn_slot), NFAPI_SFNSLOT2SLOT(dl_tti_sfn_slot)); if (!put_queue(&nr_dl_tti_req_queue, dl_tti_request)) { LOG_E(NR_PHY, "put_queue failed for dl_tti_request.\n"); @@ -313,17 +313,6 @@ static void process_queued_nr_nfapi_msgs(int sfn_slot) dl_tti_request = NULL; } } - else if (!dl_tti_request) - { - LOG_E(NR_MAC, "[%d %d] No corresponding dl_tti_request for given tx_data_request \n", - NFAPI_SFNSLOT2SFN(sfn_slot), NFAPI_SFNSLOT2SLOT(sfn_slot)); - if (!put_queue(&nr_tx_req_queue, tx_data_request)) - { - LOG_E(NR_PHY, "put_queue failed for tx_request.\n"); - free(tx_data_request); - tx_data_request = NULL; - } - } else if (dl_tti_request->dl_tti_request_body.nPDUs > 0 && tx_data_request->Number_of_PDUs > 0) { save_nr_measurement_info(dl_tti_request); @@ -333,14 +322,10 @@ static void process_queued_nr_nfapi_msgs(int sfn_slot) if (ul_dci_request && ul_dci_request->numPdus > 0) { check_and_process_dci(NULL, NULL, ul_dci_request, NULL); - //free(ul_dci_request); - //ul_dci_request = NULL; } if (ul_tti_request && ul_tti_request->n_pdus > 0) { check_and_process_dci(NULL, NULL, NULL, ul_tti_request); - //free(ul_tti_request); - //ul_tti_request = NULL; } } @@ -457,10 +442,7 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) mac->dl_info.dci_ind = NULL; mac->dl_info.rx_ind = NULL; - if (is_nr_DL_slot(mac->scc->tdd_UL_DL_ConfigurationCommon, ul_info.slot_rx)) - { - nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment); - } + nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment); if (pthread_mutex_unlock(&mac->mutex_dl_info)) abort(); diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index ba482d5d0f..827fd3e0f1 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -654,93 +654,7 @@ void save_nr_measurement_info(nfapi_nr_dl_tti_request_t *dl_tti_request) nsa_sendmsg_to_lte_ue(buffer, pack_len, NR_UE_RRC_MEASUREMENT); LOG_A(NR_RRC, "Populated NR_UE_RRC_MEASUREMENT information and sent to LTE UE\n"); } -# if 0 -static void process_nr_dl_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_header_t header) -{ - NR_UE_MAC_INST_t *mac = get_mac_inst(0); - char buffer_for_tx_data_req[NFAPI_MAX_PACKED_MESSAGE_SIZE]; - ssize_t len_of_tx_data_req = 0; - int sfn_of_tx_data_req = 0; - int slot_of_tx_data_req = 0; - int sfn_of_dl_tti_req = 0; - int slot_of_dl_tti_req = 0; - int delta = 0; - nfapi_nr_dl_tti_request_t dl_tti_request; - nfapi_nr_ul_tti_request_t ul_tti_request; - nfapi_nr_tx_data_request_t tx_data_request; - nfapi_nr_ul_dci_request_t ul_dci_request; - if (dl_tti_req) - { - LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST message in sfn/slot %d %d. \n", - dl_tti_request.SFN, dl_tti_request.Slot); - save_nr_measurement_info(&dl_tti_request); - check_and_process_dci(&dl_tti_request, NULL, NULL, NULL); - if (mac->expected_dci) - { - sfn_of_dl_tti_req = dl_tti_request.SFN; - slot_of_dl_tti_req = dl_tti_request.Slot; - } - if (len_of_tx_data_req > 0 - && sfn_of_dl_tti_req == sfn_of_tx_data_req - && slot_of_dl_tti_req == slot_of_tx_data_req) - { - if (nfapi_nr_p7_message_unpack((void *)buffer_for_tx_data_req, len_of_tx_data_req, &tx_data_request, - sizeof(tx_data_request), NULL) < 0) - { - LOG_E(NR_PHY, "Message tx_data_request failed to unpack\n"); - break; - } - LOG_I(NR_PHY, "Processing an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", - tx_data_request.SFN, tx_data_request.Slot); - check_and_process_dci(NULL, &tx_data_request, NULL, NULL); - len_of_tx_data_req = 0; - } - } - if (tx_request) - { - LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", - tx_data_request.SFN, tx_data_request.Slot); - if (tx_data_request.SFN == sfn_of_dl_tti_req && tx_data_request.Slot == slot_of_dl_tti_req - && (mac->expected_dci || mac->ra.ra_state <= WAIT_RAR)) - { - check_and_process_dci(NULL, &tx_data_request, NULL, NULL); - } - else - { - len_of_tx_data_req = len; - sfn_of_tx_data_req = tx_data_request.SFN; - slot_of_tx_data_req = tx_data_request.Slot; - memcpy(buffer_for_tx_data_req, buffer, len); - LOG_I(NR_PHY, "Saved an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", - tx_data_request.SFN, tx_data_request.Slot); - } - } - if (ul_dci_request) - { - LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST message in SFN/slot %d %d. \n", - ul_dci_request.SFN, ul_dci_request.Slot); - delta = NFAPI_SFNSLOT2DEC(sfn, slot) - NFAPI_SFNSLOT2DEC(ul_dci_request.SFN, ul_dci_request.Slot); - if (delta < -NFAPI_SFNSLOT2DEC(512, 0)) - { - delta += NFAPI_SFNSLOT2DEC(1024, 0); - } - if (delta < 6) - { - check_and_process_dci(NULL, NULL, &ul_dci_request, NULL); - } - } - if (ul_tti_request) - { - LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST message in SFN/slot %d %d. \n", - ul_tti_request.SFN, ul_tti_request.Slot); - check_and_process_dci(NULL, NULL, NULL, &ul_tti_request); - } - else - LOG_E(NR_PHY, "Case Statement has no corresponding nfapi message, this is the header ID %d\n", header.message_id); - -} -#endif static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_header_t header) { nfapi_nr_dl_tti_request_t dl_tti_request; @@ -850,61 +764,6 @@ void *nrue_standalone_pnf_task(void *context) { uint16_t sfn_slot = 0; memcpy((void *)&sfn_slot, buffer, sizeof(sfn_slot)); - sfn = NFAPI_SFNSLOT2SFN(sfn_slot); - slot = NFAPI_SFNSLOT2SLOT(sfn_slot); - if (slot == 5) - { - slot = 19; - if (sfn == 0) - sfn = 1023; - else - sfn = sfn - 1; - } - else if (slot == 4) - { - slot = 18; - if (sfn == 0) - sfn = 1023; - else - sfn = sfn - 1; - } - else if (slot == 3) - { - slot = 17; - if (sfn == 0) - sfn = 1023; - else - sfn = sfn - 1; - } - else if (slot == 2) - { - slot = 16; - if (sfn == 0) - sfn = 1023; - else - sfn = sfn - 1; - } - else if (slot == 1) - { - slot = 15; - if (sfn == 0) - sfn = 1023; - else - sfn = sfn - 1; - } - else if (slot == 0) - { - slot = 14; - if (sfn == 0) - sfn = 1023; - else - sfn = sfn - 1; - } - else - { - slot = slot - 6; - } - sfn_slot = NFAPI_SFNSLOT2HEX(sfn, slot); current_sfn_slot = sfn_slot; sfn_slot_pool[sfn_slot_id] = sfn_slot; @@ -922,6 +781,8 @@ void *nrue_standalone_pnf_task(void *context) abort(); } + sfn = NFAPI_SFNSLOT2SFN(sfn_slot); + slot = NFAPI_SFNSLOT2SLOT(sfn_slot); LOG_I(NR_PHY, "Received from proxy sfn %d slot %d\n", sfn, slot); } else if (len == sizeof(nr_phy_channel_params_t)) From 39563f3cd5ff550dc478b3173f7f686e04cdc7bf Mon Sep 17 00:00:00 2001 From: David Kim Date: Wed, 6 Oct 2021 11:52:49 -0700 Subject: [PATCH 051/102] Restored the original NAS configuration file. --- .../conf_files/episci/episci_ue_test_sfr.conf | 786 ++++++++++++++++++ openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf | 686 +-------------- 2 files changed, 793 insertions(+), 679 deletions(-) create mode 100644 ci-scripts/conf_files/episci/episci_ue_test_sfr.conf diff --git a/ci-scripts/conf_files/episci/episci_ue_test_sfr.conf b/ci-scripts/conf_files/episci/episci_ue_test_sfr.conf new file mode 100644 index 0000000000..e98e1b92f1 --- /dev/null +++ b/ci-scripts/conf_files/episci/episci_ue_test_sfr.conf @@ -0,0 +1,786 @@ +# List of known PLMNS +PLMN: { + PLMN0: { + FULLNAME="Test network"; + SHORTNAME="OAI4G"; + MNC="01"; + MCC="001"; + + }; + PLMN1: { + FULLNAME="SFR France"; + SHORTNAME="SFR"; + MNC="10"; + MCC="208"; + + }; + PLMN2: { + FULLNAME="SFR France"; + SHORTNAME="SFR"; + MNC="11"; + MCC="208"; + }; + PLMN3: { + FULLNAME="SFR France"; + SHORTNAME="SFR"; + MNC="13"; + MCC="208"; + }; + PLMN4: { + FULLNAME="OAI LTEBOX"; + SHORTNAME="OAIALU"; + MNC="95"; + MCC="208"; + }; + PLMN5: { + FULLNAME="T-Mobile USA"; + SHORTNAME="T-Mobile"; + MNC="280"; + MCC="310"; + }; + PLMN6: { + FULLNAME="FICTITIOUS USA"; + SHORTNAME="FICTITIO"; + MNC="028"; + MCC="310"; + }; + PLMN7: { + FULLNAME="Vodafone Italia"; + SHORTNAME="VODAFONE"; + MNC="10"; + MCC="222"; + }; + PLMN8: { + FULLNAME="Vodafone Spain"; + SHORTNAME="VODAFONE"; + MNC="01"; + MCC="214"; + }; + PLMN9: { + FULLNAME="Vodafone Spain"; + SHORTNAME="VODAFONE"; + MNC="06"; + MCC="214"; + }; + PLMN10: { + FULLNAME="Vodafone Germ"; + SHORTNAME="VODAFONE"; + MNC="02"; + MCC="262"; + }; + PLMN11: { + FULLNAME="Vodafone Germ"; + SHORTNAME="VODAFONE"; + MNC="04"; + MCC="262"; + }; + PLMN12: { + FULLNAME="Vodafone Germ"; + SHORTNAME="VODAFONE"; + MNC="230"; + MCC="320"; + }; +}; + +UE0: +{ + USER: { + IMEI="356113022094148"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000025"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561024"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE1: +{ + USER: { + IMEI="356113022094149"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000166"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561165"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE2: +{ + USER: { + IMEI="356113022094150"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000012"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561011"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE3: +{ + USER: { + IMEI="356113022094151"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000064"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561063"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE4: +{ + USER: { + IMEI="356113022094152"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000082"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561081"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE5: +{ + USER: { + IMEI="356113022094153"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000011"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561010"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE6: +{ + USER: { + IMEI="356113022094154"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000093"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561092"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE7: +{ + USER: { + IMEI="356113022094155"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000188"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561187"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE8: +{ + USER: { + IMEI="356113022094158"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000017"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561016"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE9: +{ + USER: { + IMEI="356113022094159"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000071"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561070"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE10: +{ + USER: { + IMEI="356113022094110"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000125"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561124"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE11: +{ + USER: { + IMEI="356113022094111"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000067"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561066"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE12: +{ + USER: { + IMEI="356113022094112"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000152"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561151"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE13: +{ + USER: { + IMEI="356113022094113"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000083"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561082"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE14: +{ + USER: { + IMEI="356113022094114"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000086"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561085"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE15: +{ + USER: { + IMEI="356113022094115"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000026"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561025"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE16: +{ + USER: { + IMEI="356113022094116"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000114"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561113"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE17: +{ + USER: { + IMEI="356113022094117"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000159"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561158"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; + +UE18: +{ + USER: { + IMEI="356113022094118"; + MANUFACTURER="EURECOM"; + MODEL="LTE Android PC"; + PIN="0000"; + }; + + SIM: { + MSIN="100000113"; + USIM_API_K="0c0a34601d4f07677303652c0462535b"; + OPC="ba05688178e398bedc100674071002cb"; + MSISDN="1011234561112"; + }; + + # Home PLMN Selector with Access Technology + HPLMN= "320230"; + + # User controlled PLMN Selector with Access Technology + UCPLMN_LIST = (); + + # Operator PLMN List + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + + # Operator controlled PLMN Selector with Access Technology + OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); + + # Forbidden plmns + FPLMN_LIST = (); + + # List of Equivalent HPLMNs +#TODO: UE does not connect if set, to be fixed in the UE +# EHPLMN_LIST= ("20811", "20813"); + EHPLMN_LIST= (); +}; \ No newline at end of file diff --git a/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf b/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf index e98e1b92f1..33405805a6 100644 --- a/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf +++ b/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf @@ -29,7 +29,7 @@ PLMN: { PLMN4: { FULLNAME="OAI LTEBOX"; SHORTNAME="OAIALU"; - MNC="95"; + MNC="93"; MCC="208"; }; PLMN5: { @@ -74,52 +74,9 @@ PLMN: { MNC="04"; MCC="262"; }; - PLMN12: { - FULLNAME="Vodafone Germ"; - SHORTNAME="VODAFONE"; - MNC="230"; - MCC="320"; - }; }; UE0: -{ - USER: { - IMEI="356113022094148"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000025"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561024"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE1: { USER: { IMEI="356113022094149"; @@ -129,20 +86,20 @@ UE1: }; SIM: { - MSIN="100000166"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561165"; + MSIN="0100001111"; + USIM_API_K="8baf473f2f8fd09487cccbd7097c6862"; + OPC="e734f8734007d6c5ce7a0508809e7e9c"; + MSISDN="33611123456"; }; # Home PLMN Selector with Access Technology - HPLMN= "320230"; + HPLMN= "20893"; # User controlled PLMN Selector with Access Technology UCPLMN_LIST = (); # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); + OPLMN_LIST = ("00101", "20810", "20811", "20813", "20893", "310280", "310028"); # Operator controlled PLMN Selector with Access Technology OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); @@ -155,632 +112,3 @@ UE1: # EHPLMN_LIST= ("20811", "20813"); EHPLMN_LIST= (); }; - -UE2: -{ - USER: { - IMEI="356113022094150"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000012"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561011"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE3: -{ - USER: { - IMEI="356113022094151"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000064"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561063"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE4: -{ - USER: { - IMEI="356113022094152"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000082"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561081"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE5: -{ - USER: { - IMEI="356113022094153"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000011"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561010"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE6: -{ - USER: { - IMEI="356113022094154"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000093"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561092"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE7: -{ - USER: { - IMEI="356113022094155"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000188"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561187"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE8: -{ - USER: { - IMEI="356113022094158"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000017"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561016"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE9: -{ - USER: { - IMEI="356113022094159"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000071"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561070"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE10: -{ - USER: { - IMEI="356113022094110"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000125"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561124"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE11: -{ - USER: { - IMEI="356113022094111"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000067"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561066"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE12: -{ - USER: { - IMEI="356113022094112"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000152"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561151"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE13: -{ - USER: { - IMEI="356113022094113"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000083"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561082"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE14: -{ - USER: { - IMEI="356113022094114"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000086"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561085"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE15: -{ - USER: { - IMEI="356113022094115"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000026"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561025"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE16: -{ - USER: { - IMEI="356113022094116"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000114"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561113"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE17: -{ - USER: { - IMEI="356113022094117"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000159"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561158"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; - -UE18: -{ - USER: { - IMEI="356113022094118"; - MANUFACTURER="EURECOM"; - MODEL="LTE Android PC"; - PIN="0000"; - }; - - SIM: { - MSIN="100000113"; - USIM_API_K="0c0a34601d4f07677303652c0462535b"; - OPC="ba05688178e398bedc100674071002cb"; - MSISDN="1011234561112"; - }; - - # Home PLMN Selector with Access Technology - HPLMN= "320230"; - - # User controlled PLMN Selector with Access Technology - UCPLMN_LIST = (); - - # Operator PLMN List - OPLMN_LIST = ("00101", "20810", "20811", "20813", "20895", "310280", "310028", "320230"); - - # Operator controlled PLMN Selector with Access Technology - OCPLMN_LIST = ("22210", "21401", "21406", "26202", "26204"); - - # Forbidden plmns - FPLMN_LIST = (); - - # List of Equivalent HPLMNs -#TODO: UE does not connect if set, to be fixed in the UE -# EHPLMN_LIST= ("20811", "20813"); - EHPLMN_LIST= (); -}; \ No newline at end of file From 9355495ad164549b98e5242eebb0d739b333f9f9 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 7 Oct 2021 16:44:42 -0700 Subject: [PATCH 052/102] Unqueueing UL_TTI_REQs based on active harq sfn sf Also fixed some silly spelling errors. --- executables/nr-ue.c | 18 +++++++++++++++--- openair2/LAYER2/NR_MAC_UE/mac_defs.h | 1 + openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 4 +++- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 6 +++--- 4 files changed, 22 insertions(+), 7 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 48d44ae1ca..2ac77f66b2 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -257,14 +257,17 @@ static bool sfn_slot_matcher(void *wanted, void *candidate) return false; } -static void process_queued_nr_nfapi_msgs(int sfn_slot) +static void process_queued_nr_nfapi_msgs(NR_UE_MAC_INST_t *mac, int sfn_slot) { nfapi_nr_rach_indication_t *rach_ind = unqueue_matching(&nr_rach_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); nfapi_nr_rx_data_indication_t *rx_ind = unqueue_matching(&nr_rx_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); nfapi_nr_crc_indication_t *crc_ind = unqueue_matching(&nr_crc_ind_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &sfn_slot); nfapi_nr_dl_tti_request_t *dl_tti_request = get_queue(&nr_dl_tti_req_queue); nfapi_nr_ul_dci_request_t *ul_dci_request = get_queue(&nr_ul_dci_req_queue); - nfapi_nr_ul_tti_request_t *ul_tti_request = get_queue(&nr_ul_tti_req_queue); + + LOG_D(NR_MAC, "Try to get a ul_tti_req for sfn/slot %d %d from queue with %d items\n", + NFAPI_SFNSLOT2SFN(mac->active_harq_sfn_sf),NFAPI_SFNSLOT2SLOT(mac->active_harq_sfn_sf), nr_ul_tti_req_queue.num_items); + nfapi_nr_ul_tti_request_t *ul_tti_request = unqueue_matching(&nr_ul_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &mac->active_harq_sfn_sf); if (rach_ind && rach_ind->number_of_pdus > 0) { @@ -318,6 +321,11 @@ static void process_queued_nr_nfapi_msgs(int sfn_slot) save_nr_measurement_info(dl_tti_request); check_and_process_dci(dl_tti_request, tx_data_request, NULL, NULL); } + else + { + AssertFatal(false, "We dont have PDUs in either dl_tti %d or tx_req %d\n", + dl_tti_request->dl_tti_request_body.nPDUs, tx_data_request->Number_of_PDUs); + } } if (ul_dci_request && ul_dci_request->numPdus > 0) { @@ -373,6 +381,10 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) reset_queue(&nr_rx_ind_queue); reset_queue(&nr_crc_ind_queue); reset_queue(&nr_uci_ind_queue); + reset_queue(&nr_dl_tti_req_queue); + reset_queue(&nr_tx_req_queue); + reset_queue(&nr_ul_dci_req_queue); + reset_queue(&nr_ul_tti_req_queue); NR_PRACH_RESOURCES_t prach_resources; memset(&prach_resources, 0, sizeof(prach_resources)); @@ -452,7 +464,7 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) nr_ue_ul_indication(&ul_info); check_nr_prach(mac, &ul_info, &prach_resources); } - process_queued_nr_nfapi_msgs(sfn_slot); + process_queued_nr_nfapi_msgs(mac, sfn_slot); } return NULL; } diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index fddd14bb8e..8aa1be3e59 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -437,6 +437,7 @@ typedef struct { bool expected_dci; bool index_has_dci[16]; + int active_harq_sfn_sf; pthread_mutex_t mutex_dl_info; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 03c8078953..4cd398c1f2 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -1283,8 +1283,10 @@ void set_harq_status(NR_UE_MAC_INST_t *mac, // FIXME k0 != 0 currently not taken into consideration current_harq->dl_frame = frame; current_harq->dl_slot = slot; + mac->active_harq_sfn_sf = NFAPI_SFNSLOT2HEX(frame, (slot + data_toul_fb)); - LOG_D(PHY,"Setting harq_status for harq_id %d, dl %d.%d\n",harq_id,frame,slot); + LOG_D(NR_PHY,"Setting harq_status for harq_id %d, dl %d.%d, sched ul %d.%d\n", + harq_id, frame, slot, frame, (slot + data_toul_fb)); } diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 827fd3e0f1..dd14754d8a 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -93,7 +93,7 @@ void nrue_init_standalone_socket(int tx_port, int rx_port) } assert(ue_tx_sock_descriptor == -1); ue_tx_sock_descriptor = sd; - LOG_D(NR_RRC, "Sucessfully set up tx_socket in %s.\n", __FUNCTION__); + LOG_D(NR_RRC, "Successfully set up tx_socket in %s.\n", __FUNCTION__); } { @@ -119,7 +119,7 @@ void nrue_init_standalone_socket(int tx_port, int rx_port) } assert(ue_rx_sock_descriptor == -1); ue_rx_sock_descriptor = sd; - LOG_D(NR_RRC, "Sucessfully set up rx_socket in %s.\n", __FUNCTION__); + LOG_D(NR_RRC, "Successfully set up rx_socket in %s.\n", __FUNCTION__); } LOG_I(NR_RRC, "NRUE standalone socket info: tx_port %d rx_port %d on %s.\n", tx_port, rx_port, stub_eth_params.remote_addr); @@ -745,7 +745,7 @@ void *nrue_standalone_pnf_task(void *context) int slot = 0; - LOG_I(NR_RRC, "Sucessfully started %s.\n", __FUNCTION__); + LOG_I(NR_RRC, "Successfully started %s.\n", __FUNCTION__); while (true) { From 4b8a15fa148a9c72e12d8acc3d3fa6dc0f181db3 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 7 Oct 2021 18:37:20 -0700 Subject: [PATCH 053/102] Allocating NR nFAPI messages on the heap prior to queueing This commit is properly allocating the NR nFAPI messages on the heap; however, when we do this, it makes the NR UE behind the gNB even more and casuses us to not finish the CFRA procedure. This is because the RAR is recevied in the NR UE, but the slot indications are too far in advance, so the CRC/RX pair (msg3) is never sent because the scheduled ul_slot and ul_frame already was received prior to getting the RAR. Need to fix this!! --- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 146 ++++++++++++++++++-- 1 file changed, 131 insertions(+), 15 deletions(-) diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index dd14754d8a..8d85af5f03 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -655,60 +655,173 @@ void save_nr_measurement_info(nfapi_nr_dl_tti_request_t *dl_tti_request) LOG_A(NR_RRC, "Populated NR_UE_RRC_MEASUREMENT information and sent to LTE UE\n"); } -static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_header_t header) +#if 0 +static void *memcpy_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_tti) { + nfapi_nr_dl_tti_request_t *p = malloc(sizeof(nfapi_nr_dl_tti_request_t)); + + p->header = dl_tti->header; + p->SFN = dl_tti->SFN; + p->Slot = dl_tti->Slot; + p->dl_tti_request_body = dl_tti->dl_tti_request_body; + p->vendor_extension = dl_tti->vendor_extension; + + p->dl_tti_request_body.nGroup = dl_tti->dl_tti_request_body.nGroup; + p->dl_tti_request_body.nPDUs = dl_tti->dl_tti_request_body.nPDUs; + + for (int i = 0; i < p->dl_tti_request_body.nPDUs; i++) + { + p->dl_tti_request_body.dl_tti_pdu_list[i] = + dl_tti->dl_tti_request_body.dl_tti_pdu_list[i]; + p->dl_tti_request_body.dl_tti_pdu_list[i].pdcch_pdu = + dl_tti->dl_tti_request_body.dl_tti_pdu_list[i].pdcch_pdu; + p->dl_tti_request_body.dl_tti_pdu_list[i].pdsch_pdu = + dl_tti->dl_tti_request_body.dl_tti_pdu_list[i].pdsch_pdu; + p->dl_tti_request_body.dl_tti_pdu_list[i].ssb_pdu = + dl_tti->dl_tti_request_body.dl_tti_pdu_list[i].ssb_pdu; + p->dl_tti_request_body.dl_tti_pdu_list[i].csi_rs_pdu = + dl_tti->dl_tti_request_body.dl_tti_pdu_list[i].csi_rs_pdu; + } + return p; +} + +static void *memcpy_tx_data_req(nfapi_nr_tx_data_request_t *tx_data) +{ + nfapi_nr_tx_data_request_t *p = malloc(sizeof(nfapi_nr_tx_data_request_t)); + + p->header = tx_data->header; + p->SFN = tx_data->SFN; + p->Slot = tx_data->Slot; + p->Number_of_PDUs = tx_data->Number_of_PDUs; + + for (int i = 0; i < p->Number_of_PDUs; i++) + { + p->pdu_list[i] = tx_data->pdu_list[i]; + for (int j = 0; j < p->pdu_list[i].num_TLV; j++) + p->pdu_list[i].TLVs[j] = tx_data->pdu_list[i].TLVs[j]; + + } + return p; +} + +static void *memcpy_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci) +{ + nfapi_nr_ul_dci_request_t *p = malloc(sizeof(nfapi_nr_ul_dci_request_t)); + + p->header = ul_dci->header; + p->SFN = ul_dci->SFN; + p->Slot = ul_dci->Slot; + p->numPdus = ul_dci->numPdus; + + for (int i = 0; i < p->numPdus; i++) + { + p->ul_dci_pdu_list[i] = ul_dci->ul_dci_pdu_list[i]; + p->ul_dci_pdu_list[i].pdcch_pdu = ul_dci->ul_dci_pdu_list[i].pdcch_pdu; + } + return p; +} + +static void *memcpy_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti) +{ + nfapi_nr_ul_tti_request_t *p = malloc(sizeof(nfapi_nr_ul_tti_request_t)); + + p->header = ul_tti->header; + p->SFN = ul_tti->SFN; + p->Slot = ul_tti->Slot; + p->n_pdus = ul_tti->n_pdus; + p->n_ulcch = ul_tti->n_ulcch; + p->n_ulsch = ul_tti->n_ulsch; + p->rach_present = ul_tti->rach_present; + + for (int i = 0; i < p->n_pdus; i++) + { + p->pdus_list[i] = ul_tti->pdus_list[i]; + p->pdus_list[i].prach_pdu = ul_tti->pdus_list[i].prach_pdu; + p->pdus_list[i].pucch_pdu = ul_tti->pdus_list[i].pucch_pdu; + p->pdus_list[i].pusch_pdu = ul_tti->pdus_list[i].pusch_pdu; + p->pdus_list[i].srs_pdu = ul_tti->pdus_list[i].srs_pdu; + } + return p; +} nfapi_nr_dl_tti_request_t dl_tti_request; nfapi_nr_tx_data_request_t tx_data_request; nfapi_nr_ul_dci_request_t ul_dci_request; nfapi_nr_ul_tti_request_t ul_tti_request; + + nfapi_nr_dl_tti_request_t *dl_tti_req_temp = memcpy_dl_tti_req(&dl_tti_request); + nfapi_nr_tx_data_request_t *tx_data_req_temp = memcpy_tx_data_req(&tx_data_request); + nfapi_nr_ul_dci_request_t *ul_dci_req_temp = memcpy_ul_dci_req(&ul_dci_request); + nfapi_nr_ul_tti_request_t *ul_tti_req_temp = memcpy_ul_tti_req(&ul_tti_request); +#endif + +static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_header_t header) +{ + switch (header.message_id) { case NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST: - if (nfapi_nr_p7_message_unpack((void *)buffer, len, &dl_tti_request, - sizeof(dl_tti_request), NULL) < 0) + { + nfapi_nr_dl_tti_request_t *dl_tti_request = MALLOC(sizeof(*dl_tti_request)); + if (nfapi_nr_p7_message_unpack((void *)buffer, len, dl_tti_request, + sizeof(*dl_tti_request), NULL) < 0) { LOG_E(NR_PHY, "Message dl_tti_request failed to unpack\n"); break; } LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST message in sfn/slot %d %d. \n", - dl_tti_request.SFN, dl_tti_request.Slot); - if (!put_queue(&nr_dl_tti_req_queue, &dl_tti_request)) + dl_tti_request->SFN, dl_tti_request->Slot); + if (!put_queue(&nr_dl_tti_req_queue, dl_tti_request)) { LOG_E(NR_PHY, "put_queue failed for dl_tti_request.\n"); + free(dl_tti_request); + dl_tti_request = NULL; } break; + } case NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST: - if (nfapi_nr_p7_message_unpack((void *)buffer, len, &tx_data_request, - sizeof(tx_data_request), NULL) < 0) + { + nfapi_nr_tx_data_request_t *tx_data_request = MALLOC(sizeof(*tx_data_request)); + if (nfapi_nr_p7_message_unpack((void *)buffer, len, tx_data_request, + sizeof(*tx_data_request), NULL) < 0) { LOG_E(NR_PHY, "Message tx_data_request failed to unpack\n"); break; } LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST message in SFN/slot %d %d. \n", - tx_data_request.SFN, tx_data_request.Slot); - if (!put_queue(&nr_tx_req_queue, &tx_data_request)) + tx_data_request->SFN, tx_data_request->Slot); + if (!put_queue(&nr_tx_req_queue, tx_data_request)) { LOG_E(NR_PHY, "put_queue failed for tx_request.\n"); + free(tx_data_request); + tx_data_request = NULL; } break; + } case NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST: - if (nfapi_nr_p7_message_unpack((void *)buffer, len, &ul_dci_request, - sizeof(ul_dci_request), NULL) < 0) + { + nfapi_nr_ul_dci_request_t *ul_dci_request = MALLOC(sizeof(*ul_dci_request)); + if (nfapi_nr_p7_message_unpack((void *)buffer, len, ul_dci_request, + sizeof(*ul_dci_request), NULL) < 0) { LOG_E(NR_PHY, "Message ul_dci_request failed to unpack\n"); break; } LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST message in SFN/slot %d %d. \n", - ul_dci_request.SFN, ul_dci_request.Slot); - if (!put_queue(&nr_ul_dci_req_queue, &ul_dci_request)) + ul_dci_request->SFN, ul_dci_request->Slot); + if (!put_queue(&nr_ul_dci_req_queue, ul_dci_request)) { LOG_E(NR_PHY, "put_queue failed for ul_dci_request.\n"); + free(ul_dci_request); + ul_dci_request = NULL; } break; + } case NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST: + { + nfapi_nr_ul_tti_request_t *ul_tti_request = MALLOC(sizeof(*ul_tti_request)); if (nfapi_nr_p7_message_unpack((void *)buffer, len, &ul_tti_request, sizeof(ul_tti_request), NULL) < 0) { @@ -716,12 +829,15 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea break; } LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST message in SFN/slot %d %d. \n", - ul_tti_request.SFN, ul_tti_request.Slot); - if (!put_queue(&nr_ul_tti_req_queue, &ul_tti_request)) + ul_tti_request->SFN, ul_tti_request->Slot); + if (!put_queue(&nr_ul_tti_req_queue, ul_tti_request)) { LOG_E(NR_PHY, "put_queue failed for ul_tti_request.\n"); + free(ul_tti_request); + ul_tti_request = NULL; } break; + } default: LOG_E(NR_PHY, "Invalid nFAPI message. Header ID %d\n", From b3145dec04a580316c315e99fc267d49741a1b2c Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Fri, 8 Oct 2021 08:53:49 -0700 Subject: [PATCH 054/102] Removing commented code --- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 99 --------------------- 1 file changed, 99 deletions(-) diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 8d85af5f03..78950ea176 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -655,105 +655,6 @@ void save_nr_measurement_info(nfapi_nr_dl_tti_request_t *dl_tti_request) LOG_A(NR_RRC, "Populated NR_UE_RRC_MEASUREMENT information and sent to LTE UE\n"); } -#if 0 -static void *memcpy_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_tti) -{ - nfapi_nr_dl_tti_request_t *p = malloc(sizeof(nfapi_nr_dl_tti_request_t)); - - p->header = dl_tti->header; - p->SFN = dl_tti->SFN; - p->Slot = dl_tti->Slot; - p->dl_tti_request_body = dl_tti->dl_tti_request_body; - p->vendor_extension = dl_tti->vendor_extension; - - p->dl_tti_request_body.nGroup = dl_tti->dl_tti_request_body.nGroup; - p->dl_tti_request_body.nPDUs = dl_tti->dl_tti_request_body.nPDUs; - - for (int i = 0; i < p->dl_tti_request_body.nPDUs; i++) - { - p->dl_tti_request_body.dl_tti_pdu_list[i] = - dl_tti->dl_tti_request_body.dl_tti_pdu_list[i]; - p->dl_tti_request_body.dl_tti_pdu_list[i].pdcch_pdu = - dl_tti->dl_tti_request_body.dl_tti_pdu_list[i].pdcch_pdu; - p->dl_tti_request_body.dl_tti_pdu_list[i].pdsch_pdu = - dl_tti->dl_tti_request_body.dl_tti_pdu_list[i].pdsch_pdu; - p->dl_tti_request_body.dl_tti_pdu_list[i].ssb_pdu = - dl_tti->dl_tti_request_body.dl_tti_pdu_list[i].ssb_pdu; - p->dl_tti_request_body.dl_tti_pdu_list[i].csi_rs_pdu = - dl_tti->dl_tti_request_body.dl_tti_pdu_list[i].csi_rs_pdu; - } - return p; -} - -static void *memcpy_tx_data_req(nfapi_nr_tx_data_request_t *tx_data) -{ - nfapi_nr_tx_data_request_t *p = malloc(sizeof(nfapi_nr_tx_data_request_t)); - - p->header = tx_data->header; - p->SFN = tx_data->SFN; - p->Slot = tx_data->Slot; - p->Number_of_PDUs = tx_data->Number_of_PDUs; - - for (int i = 0; i < p->Number_of_PDUs; i++) - { - p->pdu_list[i] = tx_data->pdu_list[i]; - for (int j = 0; j < p->pdu_list[i].num_TLV; j++) - p->pdu_list[i].TLVs[j] = tx_data->pdu_list[i].TLVs[j]; - - } - return p; -} - -static void *memcpy_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci) -{ - nfapi_nr_ul_dci_request_t *p = malloc(sizeof(nfapi_nr_ul_dci_request_t)); - - p->header = ul_dci->header; - p->SFN = ul_dci->SFN; - p->Slot = ul_dci->Slot; - p->numPdus = ul_dci->numPdus; - - for (int i = 0; i < p->numPdus; i++) - { - p->ul_dci_pdu_list[i] = ul_dci->ul_dci_pdu_list[i]; - p->ul_dci_pdu_list[i].pdcch_pdu = ul_dci->ul_dci_pdu_list[i].pdcch_pdu; - } - return p; -} - -static void *memcpy_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti) -{ - nfapi_nr_ul_tti_request_t *p = malloc(sizeof(nfapi_nr_ul_tti_request_t)); - - p->header = ul_tti->header; - p->SFN = ul_tti->SFN; - p->Slot = ul_tti->Slot; - p->n_pdus = ul_tti->n_pdus; - p->n_ulcch = ul_tti->n_ulcch; - p->n_ulsch = ul_tti->n_ulsch; - p->rach_present = ul_tti->rach_present; - - for (int i = 0; i < p->n_pdus; i++) - { - p->pdus_list[i] = ul_tti->pdus_list[i]; - p->pdus_list[i].prach_pdu = ul_tti->pdus_list[i].prach_pdu; - p->pdus_list[i].pucch_pdu = ul_tti->pdus_list[i].pucch_pdu; - p->pdus_list[i].pusch_pdu = ul_tti->pdus_list[i].pusch_pdu; - p->pdus_list[i].srs_pdu = ul_tti->pdus_list[i].srs_pdu; - } - return p; -} - nfapi_nr_dl_tti_request_t dl_tti_request; - nfapi_nr_tx_data_request_t tx_data_request; - nfapi_nr_ul_dci_request_t ul_dci_request; - nfapi_nr_ul_tti_request_t ul_tti_request; - - nfapi_nr_dl_tti_request_t *dl_tti_req_temp = memcpy_dl_tti_req(&dl_tti_request); - nfapi_nr_tx_data_request_t *tx_data_req_temp = memcpy_tx_data_req(&tx_data_request); - nfapi_nr_ul_dci_request_t *ul_dci_req_temp = memcpy_ul_dci_req(&ul_dci_request); - nfapi_nr_ul_tti_request_t *ul_tti_req_temp = memcpy_ul_tti_req(&ul_tti_request); -#endif - static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_header_t header) { From f37264e6767794ee51f1f1a981df4e8dae708d46 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Fri, 8 Oct 2021 15:45:28 -0700 Subject: [PATCH 055/102] Avoiding unnecessary casting and fixed bug in ul_tti handling --- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 78950ea176..c1d5a04a2d 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -663,7 +663,7 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea case NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST: { nfapi_nr_dl_tti_request_t *dl_tti_request = MALLOC(sizeof(*dl_tti_request)); - if (nfapi_nr_p7_message_unpack((void *)buffer, len, dl_tti_request, + if (nfapi_nr_p7_message_unpack(buffer, len, dl_tti_request, sizeof(*dl_tti_request), NULL) < 0) { LOG_E(NR_PHY, "Message dl_tti_request failed to unpack\n"); @@ -683,7 +683,7 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea case NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST: { nfapi_nr_tx_data_request_t *tx_data_request = MALLOC(sizeof(*tx_data_request)); - if (nfapi_nr_p7_message_unpack((void *)buffer, len, tx_data_request, + if (nfapi_nr_p7_message_unpack(buffer, len, tx_data_request, sizeof(*tx_data_request), NULL) < 0) { LOG_E(NR_PHY, "Message tx_data_request failed to unpack\n"); @@ -703,7 +703,7 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea case NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST: { nfapi_nr_ul_dci_request_t *ul_dci_request = MALLOC(sizeof(*ul_dci_request)); - if (nfapi_nr_p7_message_unpack((void *)buffer, len, ul_dci_request, + if (nfapi_nr_p7_message_unpack(buffer, len, ul_dci_request, sizeof(*ul_dci_request), NULL) < 0) { LOG_E(NR_PHY, "Message ul_dci_request failed to unpack\n"); @@ -723,8 +723,8 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea case NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST: { nfapi_nr_ul_tti_request_t *ul_tti_request = MALLOC(sizeof(*ul_tti_request)); - if (nfapi_nr_p7_message_unpack((void *)buffer, len, &ul_tti_request, - sizeof(ul_tti_request), NULL) < 0) + if (nfapi_nr_p7_message_unpack(buffer, len, ul_tti_request, + sizeof(*ul_tti_request), NULL) < 0) { LOG_E(NR_PHY, "Message ul_tti_request failed to unpack\n"); break; @@ -829,7 +829,7 @@ void *nrue_standalone_pnf_task(void *context) else { nfapi_p7_message_header_t header; - if (nfapi_p7_message_header_unpack((void *)buffer, len, &header, sizeof(header), NULL) < 0) + if (nfapi_p7_message_header_unpack(buffer, len, &header, sizeof(header), NULL) < 0) { LOG_E(NR_PHY, "Header unpack failed for nrue_standalone pnf\n"); continue; From 1fac8d696320c22e45f0d68e283fb948ea6235b4 Mon Sep 17 00:00:00 2001 From: mjoang Date: Sat, 9 Oct 2021 13:07:23 -0400 Subject: [PATCH 056/102] Revert "run astyle to change format" This reverts commit 721594102a4f2fbcdbc5941ff11cc49a27952b46. --- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 3452 +++++++++--------- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 771 ++-- 2 files changed, 2191 insertions(+), 2032 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 506c71e452..8adc552bd2 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -97,46 +97,47 @@ static const int sequence_cyclic_shift_2_harq_ack_bits[4] /* TS 38.211 Table 6.4.1.3.3.2-1: DM-RS positions for PUCCH format 3 and 4 */ static const int nb_symbols_excluding_dmrs[11][2][2] = { - /* No additional DMRS Additional DMRS */ - /* PUCCH length No hopping hopping No hopping hopping */ - /* index 0 1 0 1 */ - /* 4 */ {{ 3, 2 }, { 3, 2 }}, - /* 5 */ {{ 3, 3 }, { 3, 3 }}, - /* 6 */ {{ 4, 4 }, { 4, 4 }}, - /* 7 */ {{ 5, 5 }, { 5, 5 }}, - /* 8 */ {{ 6, 6 }, { 6, 6 }}, - /* 9 */ {{ 7, 7 }, { 7, 7 }}, - /* 10 */ {{ 8, 8 }, { 6, 6 }}, - /* 11 */ {{ 9, 9 }, { 7, 7 }}, - /* 12 */ {{ 10, 10 }, { 8, 8 }}, - /* 13 */ {{ 11, 11 }, { 9, 9 }}, - /* 14 */ {{ 12, 12 }, { 10, 10 }}, +/* No additional DMRS Additional DMRS */ +/* PUCCH length No hopping hopping No hopping hopping */ +/* index 0 1 0 1 */ +/* 4 */ {{ 3 , 2 } , { 3 , 2 }}, +/* 5 */ {{ 3 , 3 } , { 3 , 3 }}, +/* 6 */ {{ 4 , 4 } , { 4 , 4 }}, +/* 7 */ {{ 5 , 5 } , { 5 , 5 }}, +/* 8 */ {{ 6 , 6 } , { 6 , 6 }}, +/* 9 */ {{ 7 , 7 } , { 7 , 7 }}, +/* 10 */ {{ 8 , 8 } , { 6 , 6 }}, +/* 11 */ {{ 9 , 9 } , { 7 , 7 }}, +/* 12 */ {{ 10 , 10 } , { 8 , 8 }}, +/* 13 */ {{ 11 , 11 } , { 9 , 9 }}, +/* 14 */ {{ 12 , 12 } , { 10 , 10 }}, }; /* TS 36.213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */ const initial_pucch_resource_t initial_pucch_resource[16] = { - /* format first symbol Number of symbols PRB offset nb index for set of initial CS */ - /* 0 */ { 0, 12, 2, 0, 2, { 0, 3, 0, 0 } }, - /* 1 */ { 0, 12, 2, 0, 3, { 0, 4, 8, 0 } }, - /* 2 */ { 0, 12, 2, 3, 3, { 0, 4, 8, 0 } }, - /* 3 */ { 1, 10, 4, 0, 2, { 0, 6, 0, 0 } }, - /* 4 */ { 1, 10, 4, 0, 4, { 0, 3, 6, 9 } }, - /* 5 */ { 1, 10, 4, 2, 4, { 0, 3, 6, 9 } }, - /* 6 */ { 1, 10, 4, 4, 4, { 0, 3, 6, 9 } }, - /* 7 */ { 1, 4, 10, 0, 2, { 0, 6, 0, 0 } }, - /* 8 */ { 1, 4, 10, 0, 4, { 0, 3, 6, 9 } }, - /* 9 */ { 1, 4, 10, 2, 4, { 0, 3, 6, 9 } }, - /* 10 */ { 1, 4, 10, 4, 4, { 0, 3, 6, 9 } }, - /* 11 */ { 1, 0, 14, 0, 2, { 0, 6, 0, 0 } }, - /* 12 */ { 1, 0, 14, 0, 4, { 0, 3, 6, 9 } }, - /* 13 */ { 1, 0, 14, 2, 4, { 0, 3, 6, 9 } }, - /* 14 */ { 1, 0, 14, 4, 4, { 0, 3, 6, 9 } }, - /* 15 */ { 1, 0, 14, 0, 4, { 0, 3, 6, 9 } }, +/* format first symbol Number of symbols PRB offset nb index for set of initial CS */ +/* 0 */ { 0, 12, 2, 0, 2, { 0, 3, 0, 0 } }, +/* 1 */ { 0, 12, 2, 0, 3, { 0, 4, 8, 0 } }, +/* 2 */ { 0, 12, 2, 3, 3, { 0, 4, 8, 0 } }, +/* 3 */ { 1, 10, 4, 0, 2, { 0, 6, 0, 0 } }, +/* 4 */ { 1, 10, 4, 0, 4, { 0, 3, 6, 9 } }, +/* 5 */ { 1, 10, 4, 2, 4, { 0, 3, 6, 9 } }, +/* 6 */ { 1, 10, 4, 4, 4, { 0, 3, 6, 9 } }, +/* 7 */ { 1, 4, 10, 0, 2, { 0, 6, 0, 0 } }, +/* 8 */ { 1, 4, 10, 0, 4, { 0, 3, 6, 9 } }, +/* 9 */ { 1, 4, 10, 2, 4, { 0, 3, 6, 9 } }, +/* 10 */ { 1, 4, 10, 4, 4, { 0, 3, 6, 9 } }, +/* 11 */ { 1, 0, 14, 0, 2, { 0, 6, 0, 0 } }, +/* 12 */ { 1, 0, 14, 0, 4, { 0, 3, 6, 9 } }, +/* 13 */ { 1, 0, 14, 2, 4, { 0, 3, 6, 9 } }, +/* 14 */ { 1, 0, 14, 4, 4, { 0, 3, 6, 9 } }, +/* 15 */ { 1, 0, 14, 0, 4, { 0, 3, 6, 9 } }, }; void nr_ue_init_mac(module_id_t module_idP) { int i; + NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); // default values as deined in 38.331 sec 9.2.2 LOG_I(NR_MAC, "[UE%d] Applying default macMainConfig\n", module_idP); @@ -145,45 +146,45 @@ void nr_ue_init_mac(module_id_t module_idP) { NR_BSR_Config__retxBSR_Timer_sf10240; mac->scheduling_info.periodicBSR_Timer = NR_BSR_Config__periodicBSR_Timer_infinity; - // mac->scheduling_info.periodicPHR_Timer = - // NR_MAC_MainConfig__phr_Config__setup__periodicPHR_Timer_sf20; - // mac->scheduling_info.prohibitPHR_Timer = - // NR_MAC_MainConfig__phr_Config__setup__prohibitPHR_Timer_sf20; - // mac->scheduling_info.PathlossChange_db = - // NR_MAC_MainConfig__phr_Config__setup__dl_PathlossChange_dB1; - // mac->PHR_state = - // NR_MAC_MainConfig__phr_Config_PR_setup; +// mac->scheduling_info.periodicPHR_Timer = +// NR_MAC_MainConfig__phr_Config__setup__periodicPHR_Timer_sf20; +// mac->scheduling_info.prohibitPHR_Timer = +// NR_MAC_MainConfig__phr_Config__setup__prohibitPHR_Timer_sf20; +// mac->scheduling_info.PathlossChange_db = +// NR_MAC_MainConfig__phr_Config__setup__dl_PathlossChange_dB1; +// mac->PHR_state = +// NR_MAC_MainConfig__phr_Config_PR_setup; mac->scheduling_info.SR_COUNTER = 0; mac->scheduling_info.sr_ProhibitTimer = 0; mac->scheduling_info.sr_ProhibitTimer_Running = 0; - // mac->scheduling_info.maxHARQ_Tx = - // NR_MAC_MainConfig__ul_SCH_Config__maxHARQ_Tx_n5; - // mac->scheduling_info.ttiBundling = 0; - // mac->scheduling_info.extendedBSR_Sizes_r10 = 0; - // mac->scheduling_info.extendedPHR_r10 = 0; - // mac->scheduling_info.drx_config = NULL; - // mac->scheduling_info.phr_config = NULL; +// mac->scheduling_info.maxHARQ_Tx = +// NR_MAC_MainConfig__ul_SCH_Config__maxHARQ_Tx_n5; +// mac->scheduling_info.ttiBundling = 0; +// mac->scheduling_info.extendedBSR_Sizes_r10 = 0; +// mac->scheduling_info.extendedPHR_r10 = 0; +// mac->scheduling_info.drx_config = NULL; +// mac->scheduling_info.phr_config = NULL; // set init value 0xFFFF, make sure periodic timer and retx time counters are NOT active, after bsr transmission set the value configured by the NW. mac->scheduling_info.periodicBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING; mac->scheduling_info.retxBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING; mac->BSR_reporting_active = BSR_TRIGGER_NONE; - // mac->scheduling_info.periodicPHR_SF = - // nr_get_sf_perioidicPHR_Timer(mac-> - // scheduling_info.periodicPHR_Timer); - // mac->scheduling_info.prohibitPHR_SF = - // nr_get_sf_prohibitPHR_Timer(mac-> - // scheduling_info.prohibitPHR_Timer); - // mac->scheduling_info.PathlossChange_db = - // nr_get_db_dl_PathlossChange(mac-> - // scheduling_info.PathlossChange); - // mac->PHR_reporting_active = 0; +// mac->scheduling_info.periodicPHR_SF = +// nr_get_sf_perioidicPHR_Timer(mac-> +// scheduling_info.periodicPHR_Timer); +// mac->scheduling_info.prohibitPHR_SF = +// nr_get_sf_prohibitPHR_Timer(mac-> +// scheduling_info.prohibitPHR_Timer); +// mac->scheduling_info.PathlossChange_db = +// nr_get_db_dl_PathlossChange(mac-> +// scheduling_info.PathlossChange); +// mac->PHR_reporting_active = 0; for (i = 0; i < NR_MAX_NUM_LCID; i++) { LOG_D(NR_MAC, "[UE%d] Applying default logical channel config for LCGID %d\n", - module_idP, i); + module_idP, i); mac->scheduling_info.Bj[i] = -1; mac->scheduling_info.bucket_size[i] = -1; @@ -196,47 +197,53 @@ void nr_ue_init_mac(module_id_t module_idP) { mac->scheduling_info.LCID_status[i] = LCID_EMPTY; mac->scheduling_info.LCID_buffer_remain[i] = 0; - - for (int i=0; ifirst_ul_tx[i]=1; + for (int i=0;ifirst_ul_tx[i]=1; } } -int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti) { - RA_config_t *ra = &mac->ra; - int rnti_type; +int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){ - if (rnti == ra->ra_rnti) { - rnti_type = NR_RNTI_RA; - } else if (rnti == ra->t_crnti && (ra->ra_state == WAIT_RAR || ra->ra_state == WAIT_CONTENTION_RESOLUTION) ) { - rnti_type = NR_RNTI_TC; - } else if (rnti == mac->crnti) { - rnti_type = NR_RNTI_C; - } else if (rnti == 0xFFFE) { - rnti_type = NR_RNTI_P; - } else if (rnti == 0xFFFF) { - rnti_type = NR_RNTI_SI; - } else { - AssertFatal(1 == 0, "In %s: Not identified/handled rnti %d \n", __FUNCTION__, rnti); - } + RA_config_t *ra = &mac->ra; + int rnti_type; + + if (rnti == ra->ra_rnti) { + rnti_type = NR_RNTI_RA; + } else if (rnti == ra->t_crnti && (ra->ra_state == WAIT_RAR || ra->ra_state == WAIT_CONTENTION_RESOLUTION) ) { + rnti_type = NR_RNTI_TC; + } else if (rnti == mac->crnti) { + rnti_type = NR_RNTI_C; + } else if (rnti == 0xFFFE) { + rnti_type = NR_RNTI_P; + } else if (rnti == 0xFFFF) { + rnti_type = NR_RNTI_SI; + } else { + AssertFatal(1 == 0, "In %s: Not identified/handled rnti %d \n", __FUNCTION__, rnti); + } + + LOG_D(MAC, "In %s: returning rnti_type %s \n", __FUNCTION__, rnti_types[rnti_type]); + + return rnti_type; - LOG_D(MAC, "In %s: returning rnti_type %s \n", __FUNCTION__, rnti_types[rnti_type]); - return rnti_type; } int8_t nr_ue_decode_mib(module_id_t module_id, int cc_id, uint8_t gNB_index, - uint8_t extra_bits, // 8bits 38.212 c7.1.1 + uint8_t extra_bits, // 8bits 38.212 c7.1.1 uint32_t ssb_length, uint32_t ssb_index, void *pduP, uint16_t ssb_start_subcarrier, - uint16_t cell_id) { + uint16_t cell_id) +{ LOG_I(MAC,"[L2][MAC] decode mib\n"); + NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); mac->physCellId = cell_id; + nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, 0, 0, 0, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU + AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n"); //if(mac->mib != NULL){ uint16_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused); @@ -245,26 +252,24 @@ int8_t nr_ue_decode_mib(module_id_t module_id, for (int i=0; i<4; i++) frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i); - uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] + uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset; + frame = frame << 4; frame = frame | frame_number_4lsb; - - if(ssb_length == 64) { + if(ssb_length == 64){ mac->frequency_range = FR2; - for (int i=0; i<3; i++) ssb_index += (((extra_bits>>(7-i))&0x01)<<(3+i)); - } else { + }else{ mac->frequency_range = FR1; - - if(ssb_subcarrier_offset_msb) { + if(ssb_subcarrier_offset_msb){ ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10; } } #ifdef DEBUG_MIB - uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] + uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] LOG_I(MAC,"system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]); LOG_I(MAC,"system frame number(with LSB): %d\n", (int)frame); LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon); @@ -277,14 +282,17 @@ int8_t nr_ue_decode_mib(module_id_t module_id, LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit); LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index); #endif + //storing ssb index in the mac structure mac->mib_ssb = ssb_index; mac->ssb_subcarrier_offset = ssb_subcarrier_offset; + uint8_t scs_ssb; uint32_t band; uint16_t ssb_start_symbol; if (get_softmodem_params()->sa == 1) { + scs_ssb = get_softmodem_params()->numerology; band = mac->nr_band; ssb_start_symbol = get_ssb_start_symbol(band,scs_ssb,ssb_index); @@ -298,7 +306,8 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ssb_index, ssb_start_subcarrier, mac->frequency_range); - } else { + } + else { NR_ServingCellConfigCommon_t *scc = mac->scc; scs_ssb = *scc->ssbSubcarrierSpacing; band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]; @@ -307,6 +316,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id, mac->dl_config_request.sfn = frame; mac->dl_config_request.slot = ssb_start_symbol/14; + return 0; } @@ -319,14 +329,14 @@ int8_t nr_ue_decode_BCCH_DL_SCH(module_id_t module_id, if(ack_nack) { LOG_D(NR_MAC, "Decoding NR-BCCH-DL-SCH-Message (SIB1 or SI)\n"); nr_mac_rrc_data_ind_ue(module_id, cc_id, gNB_index, 0, 0, 0, NR_BCCH_DL_SCH, (uint8_t *) pduP, pdu_len); - } else + } + else LOG_E(NR_MAC, "Got NACK on NR-BCCH-DL-SCH-Message (SIB1 or SI)\n"); - return 0; } // TODO: change to UE parameter, scs: 15KHz, slot duration: 1ms -uint32_t get_ssb_frame(uint32_t test) { +uint32_t get_ssb_frame(uint32_t test){ return test; } @@ -335,16 +345,18 @@ uint32_t get_ssb_frame(uint32_t test) { * These tables and functions are going to be called by function nr_ue_process_dci */ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, - uint16_t n_RB_ULBWP, - uint16_t n_RB_DLBWP, - uint16_t riv - ) { + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, + uint16_t n_RB_ULBWP, + uint16_t n_RB_DLBWP, + uint16_t riv + ){ + /* * TS 38.214 subclause 5.1.2.2 Resource allocation in frequency domain (downlink) * when the scheduling grant is received with DCI format 1_0, then downlink resource allocation type 1 is used */ - if(dlsch_config_pdu != NULL) { + if(dlsch_config_pdu != NULL){ + /* * TS 38.214 subclause 5.1.2.2.1 Downlink resource allocation type 0 */ @@ -365,9 +377,9 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p LOG_D(MAC,"DLSCH n_RB_DLBWP = %i\n", n_RB_DLBWP); LOG_D(MAC,"DLSCH number_rbs = %i\n", dlsch_config_pdu->number_rbs); LOG_D(MAC,"DLSCH start_rb = %i\n", dlsch_config_pdu->start_rb); - } - if(pusch_config_pdu != NULL) { + } + if(pusch_config_pdu != NULL){ /* * TS 38.214 subclause 6.1.2.2 Resource allocation in frequency domain (uplink) */ @@ -377,6 +389,7 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p /* * TS 38.214 subclause 6.1.2.2.2 Uplink resource allocation type 1 */ + pusch_config_pdu->rb_size = NRRIV2BW(riv,n_RB_ULBWP); pusch_config_pdu->rb_start = NRRIV2PRBOFFSET(riv,n_RB_ULBWP); @@ -386,30 +399,31 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p LOG_W(MAC, "Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_ULBWP: %d \n",pusch_config_pdu->rb_size, pusch_config_pdu->rb_start, n_RB_ULBWP); return -1; } - LOG_D(MAC,"ULSCH riv = %i\n", riv); LOG_D(MAC,"ULSCH n_RB_DLBWP = %i\n", n_RB_ULBWP); LOG_D(MAC,"ULSCH number_rbs = %i\n", pusch_config_pdu->rb_size); LOG_D(MAC,"ULSCH start_rb = %i\n", pusch_config_pdu->rb_start); } - return 0; } int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, - nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, - uint8_t time_domain_ind, - int default_abc, - bool use_default) { + nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, + uint8_t time_domain_ind, + int default_abc, + bool use_default){ + int dmrs_typeA_pos = (mac->scc != NULL) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position; - // uint8_t k_offset=0; + +// uint8_t k_offset=0; int sliv_S=0; int sliv_L=0; uint8_t mu_pusch = 1; + // definition table j Table 6.1.2.1.1-4 uint8_t j = (mu_pusch==3)?3:(mu_pusch==2)?2:1; - uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]= { // for PUSCH from TS 38.214 subclause 6.1.2.1.1 + uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1 {j, 0,14}, // row index 1 {j, 0,12}, // row index 2 {j, 0,10}, // row index 3 @@ -449,9 +463,8 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, /* * TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink) */ - if(dlsch_config_pdu != NULL) { + if(dlsch_config_pdu != NULL){ NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; - if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && @@ -463,6 +476,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; if (pdsch_TimeDomainAllocationList && use_default==false) { + if (time_domain_ind >= pdsch_TimeDomainAllocationList->list.count) { LOG_E(MAC, "time_domain_ind %d >= pdsch->TimeDomainAllocationList->list.count %d\n", time_domain_ind, pdsch_TimeDomainAllocationList->list.count); @@ -476,40 +490,44 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, SLIV2SL(startSymbolAndLength,&S,&L); dlsch_config_pdu->start_symbol=S; dlsch_config_pdu->number_symbols=L; + LOG_D(MAC,"SLIV = %i\n", startSymbolAndLength); LOG_D(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol); LOG_D(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols); - } else { // Default configuration from tables + + } + else {// Default configuration from tables + get_info_from_tda_tables(default_abc, time_domain_ind, dmrs_typeA_pos, 1, // normal CP &sliv_S, &sliv_L); + dlsch_config_pdu->number_symbols = sliv_L; dlsch_config_pdu->start_symbol = sliv_S; } - } /* - - * TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink) - */ - - if(pusch_config_pdu != NULL) { + } /* + * TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink) + */ + if(pusch_config_pdu != NULL){ NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; - if (mac->ULbwp[0] && mac->ULbwp[0]->bwp_Dedicated && mac->ULbwp[0]->bwp_Dedicated->pusch_Config && mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup && mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup; - } else if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Common && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { + } + else if (mac->ULbwp[0] && + mac->ULbwp[0]->bwp_Common && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - } else pusch_TimeDomainAllocationList = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + } + else pusch_TimeDomainAllocationList = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; if (pusch_TimeDomainAllocationList && use_default==false) { if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) { @@ -519,16 +537,17 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, pusch_config_pdu->nr_of_symbols=0; return -1; } - + LOG_D(NR_MAC,"Filling Time-Domain Allocation from pusch_TimeDomainAllocationList\n"); int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[time_domain_ind]->startSymbolAndLength; int S,L; SLIV2SL(startSymbolAndLength,&S,&L); pusch_config_pdu->start_symbol_index=S; pusch_config_pdu->nr_of_symbols=L; - } else { + } + else { LOG_D(NR_MAC,"Filling Time-Domain Allocation from tables\n"); - // k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; +// k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1]; sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2]; // k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0]; @@ -537,33 +556,32 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, pusch_config_pdu->nr_of_symbols = sliv_L; pusch_config_pdu->start_symbol_index = sliv_S; } - LOG_D(NR_MAC,"start_symbol = %i\n", pusch_config_pdu->start_symbol_index); LOG_D(NR_MAC,"number_symbols = %i\n", pusch_config_pdu->nr_of_symbols); } - return 0; } int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci) { + NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dci->dci_format]; - LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n", - dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long *)dci->payloadBits); - int8_t ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15); + LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n", + dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits); + int8_t ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15); if ((ret&1) == 1) return -1; else if (ret == 2) { dci->dci_format = NR_UL_DCI_FORMAT_0_0; def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dci->dci_format]; } - int8_t ret_proc = nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci); memset(def_dci_pdu_rel15, 0, sizeof(dci_pdu_rel15_t)); return ret_proc; } int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, fapi_nr_dci_indication_pdu_t *dci_ind) { + uint16_t rnti = dci_ind->rnti; uint8_t dci_format = dci_ind->dci_format; int ret = 0; @@ -576,697 +594,681 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; uint8_t is_Msg3 = 0; int default_abc = 1; - uint16_t n_RB_DLBWP; + uint16_t n_RB_DLBWP; if (mac->DLbwp[0]) n_RB_DLBWP = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); else if (mac->scc_SIB) n_RB_DLBWP = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth,MAX_BWP_SIZE); else n_RB_DLBWP = mac->type0_PDCCH_CSS_config.num_rbs; LOG_D(MAC, "In %s: Processing received DCI format %s (DL BWP %d)\n", __FUNCTION__, dci_formats[dci_format], n_RB_DLBWP); - switch(dci_format) { - case NR_UL_DCI_FORMAT_0_0: { - /* - * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 32 TPC_PUSCH: - * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space - * 50 SUL_IND_0_0: - */ - // Calculate the slot in which ULSCH should be scheduled. This is current slot + K2, - // where K2 is the offset between the slot in which UL DCI is received and the slot - // in which ULSCH should be scheduled. K2 is configured in RRC configuration. - // todo: - // - SUL_IND_0_0 - // Schedule PUSCH - ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); + switch(dci_format){ + case NR_UL_DCI_FORMAT_0_0: { + /* + * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 32 TPC_PUSCH: + * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space + * 50 SUL_IND_0_0: + */ + // Calculate the slot in which ULSCH should be scheduled. This is current slot + K2, + // where K2 is the offset between the slot in which UL DCI is received and the slot + // in which ULSCH should be scheduled. K2 is configured in RRC configuration. + // todo: + // - SUL_IND_0_0 - if (ret != -1) { - // Get UL config request corresponding slot_tx - fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); + // Schedule PUSCH + ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); - if (!ul_config) { - LOG_W(MAC, "In %s: ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n", __FUNCTION__, frame, slot); - return -1; - } + if (ret != -1){ - AssertFatal(ul_config->number_pdusnumber_pdus %d out of bounds\n",ul_config->number_pdus); - nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; - fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); - // Config PUSCH PDU - ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); + // Get UL config request corresponding slot_tx + fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); + + if (!ul_config) { + LOG_W(MAC, "In %s: ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n", __FUNCTION__, frame, slot); + return -1; } - break; + AssertFatal(ul_config->number_pdusnumber_pdus %d out of bounds\n",ul_config->number_pdus); + nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; + + fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); + + // Config PUSCH PDU + ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); + } + + break; + } - case NR_UL_DCI_FORMAT_0_1: { - /* - * with CRC scrambled by C-RNTI or CS-RNTI or SP-CSI-RNTI or new-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 1 CARRIER_IND - * 2 SUL_IND_0_1 - * 7 BANDWIDTH_PART_IND - * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 29 FIRST_DAI - * 30 SECOND_DAI - * 32 TPC_PUSCH: - * 36 SRS_RESOURCE_IND: - * 37 PRECOD_NBR_LAYERS: - * 38 ANTENNA_PORTS: - * 40 SRS_REQUEST: - * 42 CSI_REQUEST: - * 43 CBGTI - * 45 PTRS_DMRS - * 46 BETA_OFFSET_IND - * 47 DMRS_SEQ_INI - * 48 UL_SCH_IND - * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space - */ - // TODO: - // - FIRST_DAI - // - SECOND_DAI - // - SRS_RESOURCE_IND - // Schedule PUSCH - ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); + case NR_UL_DCI_FORMAT_0_1: { + /* + * with CRC scrambled by C-RNTI or CS-RNTI or SP-CSI-RNTI or new-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 1 CARRIER_IND + * 2 SUL_IND_0_1 + * 7 BANDWIDTH_PART_IND + * 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 29 FIRST_DAI + * 30 SECOND_DAI + * 32 TPC_PUSCH: + * 36 SRS_RESOURCE_IND: + * 37 PRECOD_NBR_LAYERS: + * 38 ANTENNA_PORTS: + * 40 SRS_REQUEST: + * 42 CSI_REQUEST: + * 43 CBGTI + * 45 PTRS_DMRS + * 46 BETA_OFFSET_IND + * 47 DMRS_SEQ_INI + * 48 UL_SCH_IND + * 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space + */ + // TODO: + // - FIRST_DAI + // - SECOND_DAI + // - SRS_RESOURCE_IND - if (ret != -1) { - // Get UL config request corresponding slot_tx - fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); + // Schedule PUSCH + ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); - if (!ul_config) { - LOG_W(MAC, "In %s: ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n", __FUNCTION__, frame, slot); - return -1; - } + if (ret != -1){ - nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; - fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); - // Config PUSCH PDU - ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); + // Get UL config request corresponding slot_tx + fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); + + if (!ul_config) { + LOG_W(MAC, "In %s: ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n", __FUNCTION__, frame, slot); + return -1; } - break; + nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; + + fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); + + // Config PUSCH PDU + ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); + } + break; + } - case NR_DL_DCI_FORMAT_1_0: { - /* - * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI - * 33 TPC_PUCCH: - * 34 PUCCH_RESOURCE_IND: - * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: - * 55 RESERVED_NR_DCI - * with CRC scrambled by P-RNTI - * 8 SHORT_MESSAGE_IND - * 9 SHORT_MESSAGES - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 31 TB_SCALING - * 55 RESERVED_NR_DCI - * with CRC scrambled by SI-RNTI - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 26 RV: - * 55 RESERVED_NR_DCI - * with CRC scrambled by RA-RNTI - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 31 TB_SCALING - * 55 RESERVED_NR_DCI - * with CRC scrambled by TC-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 24 MCS: - * 25 NDI: - * 26 RV: - * 27 HARQ_PROCESS_NUMBER: - * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI - * 33 TPC_PUCCH: - */ - dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; - NR_PDSCH_Config_t *pdsch_config= (mac->DLbwp[0]) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL; - uint16_t BWPSize = n_RB_DLBWP; + case NR_DL_DCI_FORMAT_1_0: { + /* + * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + * 33 TPC_PUCCH: + * 34 PUCCH_RESOURCE_IND: + * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: + * 55 RESERVED_NR_DCI + * with CRC scrambled by P-RNTI + * 8 SHORT_MESSAGE_IND + * 9 SHORT_MESSAGES + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 31 TB_SCALING + * 55 RESERVED_NR_DCI + * with CRC scrambled by SI-RNTI + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 26 RV: + * 55 RESERVED_NR_DCI + * with CRC scrambled by RA-RNTI + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 31 TB_SCALING + * 55 RESERVED_NR_DCI + * with CRC scrambled by TC-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 24 MCS: + * 25 NDI: + * 26 RV: + * 27 HARQ_PROCESS_NUMBER: + * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + * 33 TPC_PUCCH: + */ - if(rnti == SI_RNTI) { - NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = mac->type0_PDCCH_CSS_config; - default_abc = type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern; - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH; - dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; - dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; - dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; + dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; - if (pdsch_config) pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL; // For PDSCH with mapping type A, the UE shall assume dmrs-AdditionalPosition='pos2' + NR_PDSCH_Config_t *pdsch_config= (mac->DLbwp[0]) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL; + uint16_t BWPSize = n_RB_DLBWP; - BWPSize = dlsch_config_pdu_1_0->BWPSize; + if(rnti == SI_RNTI) { + NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = mac->type0_PDCCH_CSS_config; + default_abc = type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern; + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH; + dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; + dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; + if (pdsch_config) pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL; // For PDSCH with mapping type A, the UE shall assume dmrs-AdditionalPosition='pos2' + BWPSize = dlsch_config_pdu_1_0->BWPSize; + } else { + if (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti){ + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH; } else { - if (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) { - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH; - } else { - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - } - - if( (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) || (rnti == ra->t_crnti) ) { - if (mac->scc == NULL) { - dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - } else { - dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - } - - if (!get_softmodem_params()->sa) { // NSA mode is not using the Initial BWP - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup; - BWPSize = dlsch_config_pdu_1_0->BWPSize; - } - } else if (mac->DLbwp[0]) { - dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; - pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup; - } else if (mac->scc_SIB) { + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + } + if( (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) || (rnti == ra->t_crnti) ) { + if (mac->scc == NULL) { dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_0->SubcarrierSpacing = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.subcarrierSpacing; - pdsch_config = NULL; } - } - - /* IDENTIFIER_DCI_FORMATS */ - /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ - if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,BWPSize,dci->frequency_domain_assignment.val) < 0) { - LOG_W(MAC, "[%d.%d] Invalid frequency_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } - - /* TIME_DOM_RESOURCE_ASSIGNMENT */ - if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val,default_abc,rnti==SI_RNTI) < 0) { - LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } - - NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; - - if (mac->DLbwp[0] && - mac->DLbwp[0]->bwp_Dedicated && - mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && - mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList) - pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup; - else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList) - pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; - else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup) - pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; - - int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_0->start_symbol <= 3)? typeA: typeB); - /* dmrs symbol positions*/ - dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, - mac->mib->dmrs_TypeA_Position, - dlsch_config_pdu_1_0->number_symbols, - dlsch_config_pdu_1_0->start_symbol, - mappingtype); - dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ? - (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0; - - /* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */ - if (dlsch_config_pdu_1_0->number_symbols == 2) - dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1; - else - dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2; - - /* VRB_TO_PRB_MAPPING */ - dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; - /* MCS TABLE INDEX */ - dlsch_config_pdu_1_0->mcs_table = (pdsch_config) ? ((pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0) : 0; - /* MCS */ - dlsch_config_pdu_1_0->mcs = dci->mcs; - - // Basic sanity check for MCS value to check for a false or erroneous DCI - if (dlsch_config_pdu_1_0->mcs > 28) { - LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_0->mcs); - return -1; - } - - /* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->ndi = dci->ndi; - /* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->rv = dci->rv; - /* HARQ_PROCESS_NUMBER (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - dlsch_config_pdu_1_0->harq_process_nbr = dci->harq_pid; - - /* TB_SCALING (only if CRC scrambled by P-RNTI or RA-RNTI) */ - // according to TS 38.214 Table 5.1.3.2-3 - if (dci->tb_scaling == 0) dlsch_config_pdu_1_0->scaling_factor_S = 1; - - if (dci->tb_scaling == 1) dlsch_config_pdu_1_0->scaling_factor_S = 0.5; - - if (dci->tb_scaling == 2) dlsch_config_pdu_1_0->scaling_factor_S = 0.25; - - if (dci->tb_scaling == 3) dlsch_config_pdu_1_0->scaling_factor_S = 0; // value not defined in table - - /* TPC_PUCCH (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ - // according to TS 38.213 Table 7.2.1-1 - if (dci->tpc == 0) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = -1; - - if (dci->tpc == 1) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 0; - - if (dci->tpc == 2) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 1; - - if (dci->tpc == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3; - - // Sanity check for pucch_resource_indicator value received to check for false DCI. - valid = 0; - - if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Dedicated && - mac->ULbwp[0]->bwp_Dedicated->pucch_Config && - mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup&& - mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList) { - pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count; - - for (int id = 0; id < pucch_res_set_cnt; id++) { - if (dci->pucch_resource_indicator < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { - valid = 1; - break; - } + else { + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); } - } else if (mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList) { - pucch_res_set_cnt = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.count; - - for (int id = 0; id < pucch_res_set_cnt; id++) { - if (dci->pucch_resource_indicator < - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { - valid = 1; - break; - } + if (!get_softmodem_params()->sa) { // NSA mode is not using the Initial BWP + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup; + BWPSize = dlsch_config_pdu_1_0->BWPSize; } - } else valid=1; - - if (!valid) { - LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator); - return -1; + } else if (mac->DLbwp[0]) { + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup; + } else if (mac->scc_SIB) { + dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_0->SubcarrierSpacing = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.subcarrierSpacing; + pdsch_config = NULL; } - - // set the harq status at MAC for feedback - set_harq_status(mac,dci->pucch_resource_indicator, - dci->harq_pid, - dlsch_config_pdu_1_0->accumulated_delta_PUCCH, - 1+dci->pdsch_to_harq_feedback_timing_indicator.val, - dci->dai[0].val, - dci_ind->n_CCE,dci_ind->N_CCE, - frame,slot); - LOG_D(MAC,"(nr_ue_procedures.c) rnti = %x dl_config->number_pdus = %d\n", - dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti, - dl_config->number_pdus); - LOG_D(MAC,"(nr_ue_procedures.c) frequency_domain_resource_assignment=%d \t number_rbs=%d \t start_rb=%d\n", - dci->frequency_domain_assignment.val, - dlsch_config_pdu_1_0->number_rbs, - dlsch_config_pdu_1_0->start_rb); - LOG_D(MAC,"(nr_ue_procedures.c) time_domain_resource_assignment=%d \t number_symbols=%d \t start_symbol=%d\n", - dci->time_domain_assignment.val, - dlsch_config_pdu_1_0->number_symbols, - dlsch_config_pdu_1_0->start_symbol); - LOG_D(MAC, - "(nr_ue_procedures.c) vrb_to_prb_mapping=%d \n>>> mcs=%d\n>>> ndi=%d\n>>> rv=%d\n>>> harq_process_nbr=%d\n>>> dai=%d\n>>> scaling_factor_S=%f\n>>> tpc_pucch=%d\n>>> pucch_res_ind=%d\n>>> pdsch_to_harq_feedback_time_ind=%d\n", - dlsch_config_pdu_1_0->vrb_to_prb_mapping, - dlsch_config_pdu_1_0->mcs, - dlsch_config_pdu_1_0->ndi, - dlsch_config_pdu_1_0->rv, - dlsch_config_pdu_1_0->harq_process_nbr, - dci->dai[0].val, - dlsch_config_pdu_1_0->scaling_factor_S, - dlsch_config_pdu_1_0->accumulated_delta_PUCCH, - dci->pucch_resource_indicator, - 1+dci->pdsch_to_harq_feedback_timing_indicator.val); - // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; - LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); - dl_config->number_pdus = dl_config->number_pdus + 1; - break; } - case NR_DL_DCI_FORMAT_1_1: { - /* - * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI - * 0 IDENTIFIER_DCI_FORMATS: - * 1 CARRIER_IND: - * 7 BANDWIDTH_PART_IND: - * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: - * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, - * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 - * 14 PRB_BUNDLING_SIZE_IND: - * 15 RATE_MATCHING_IND: - * 16 ZP_CSI_RS_TRIGGER: - * 18 TB1_MCS: - * 19 TB1_NDI: - * 20 TB1_RV: - * 21 TB2_MCS: - * 22 TB2_NDI: - * 23 TB2_RV: - * 27 HARQ_PROCESS_NUMBER: - * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI - * 33 TPC_PUCCH: - * 34 PUCCH_RESOURCE_IND: - * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: - * 38 ANTENNA_PORTS: - * 39 TCI: - * 40 SRS_REQUEST: - * 43 CBGTI: - * 44 CBGFI: - * 47 DMRS_SEQ_INI: - */ - if (dci->bwp_indicator.val != 1) { - LOG_W(MAC, "[%d.%d] bwp_indicator != 1! Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } + /* IDENTIFIER_DCI_FORMATS */ + /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ + if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,BWPSize,dci->frequency_domain_assignment.val) < 0) { + LOG_W(MAC, "[%d.%d] Invalid frequency_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } + /* TIME_DOM_RESOURCE_ASSIGNMENT */ + if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val,default_abc,rnti==SI_RNTI) < 0) { + LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } - config_bwp_ue(mac, &dci->bwp_indicator.val, &dci_format); - NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id; - NR_PDSCH_Config_t *pdsch_config=mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup; - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; - fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_1 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; - dlsch_config_pdu_1_1->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_1->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - dlsch_config_pdu_1_1->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; + if (mac->DLbwp[0] && + mac->DLbwp[0]->bwp_Dedicated && + mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && + mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList) + pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup; + else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList) + pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup) + pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; - /* IDENTIFIER_DCI_FORMATS */ - /* CARRIER_IND */ - /* BANDWIDTH_PART_IND */ - // dlsch_config_pdu_1_1->bandwidth_part_ind = dci->bandwidth_part_ind; - /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ - if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->frequency_domain_assignment.val) < 0) { - LOG_W(MAC, "[%d.%d] Invalid frequency_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } + int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_0->start_symbol <= 3)? typeA: typeB); - /* TIME_DOM_RESOURCE_ASSIGNMENT */ - if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val,0,false) < 0) { - LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); - return -1; - } - - NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; - - if (mac->DLbwp[0] && - mac->DLbwp[0]->bwp_Dedicated && - mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && - mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList) - pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup; - else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList) - pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; - else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup) - pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; - - int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_1->start_symbol <= 3)? typeA: typeB); - /* dmrs symbol positions*/ - dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, - mac->scc->dmrs_TypeA_Position, - dlsch_config_pdu_1_1->number_symbols, - dlsch_config_pdu_1_1->start_symbol, - mappingtype); - dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : - NFAPI_NR_DMRS_TYPE2; - /* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214, - using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */ - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = 1; - - /* VRB_TO_PRB_MAPPING */ - if ((pdsch_config->resourceAllocation == 1) && (pdsch_config->vrb_ToPRB_Interleaver != NULL)) - dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; - - /* PRB_BUNDLING_SIZE_IND */ - dlsch_config_pdu_1_1->prb_bundling_size_ind = dci->prb_bundling_size_indicator.val; - /* RATE_MATCHING_IND */ - dlsch_config_pdu_1_1->rate_matching_ind = dci->rate_matching_indicator.val; - /* ZP_CSI_RS_TRIGGER */ - dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val; - /* MCS (for transport block 1)*/ - dlsch_config_pdu_1_1->mcs = dci->mcs; - - // Basic sanity check for MCS value to check for a false or erroneous DCI - if (dlsch_config_pdu_1_1->mcs > 28) { - LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->mcs); - return -1; - } - - /* NDI (for transport block 1)*/ - dlsch_config_pdu_1_1->ndi = dci->ndi; - /* RV (for transport block 1)*/ - dlsch_config_pdu_1_1->rv = dci->rv; - /* MCS (for transport block 2)*/ - dlsch_config_pdu_1_1->tb2_mcs = dci->mcs2.val; - - // Basic sanity check for MCS value to check for a false or erroneous DCI - if (dlsch_config_pdu_1_1->tb2_mcs > 28) { - LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->tb2_mcs); - return -1; - } - - /* NDI (for transport block 2)*/ - dlsch_config_pdu_1_1->tb2_ndi = dci->ndi2.val; - /* RV (for transport block 2)*/ - dlsch_config_pdu_1_1->tb2_rv = dci->rv2.val; - /* HARQ_PROCESS_NUMBER */ - dlsch_config_pdu_1_1->harq_process_nbr = dci->harq_pid; - - /* TPC_PUCCH */ - // according to TS 38.213 Table 7.2.1-1 - if (dci->tpc == 0) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = -1; - - if (dci->tpc == 1) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 0; - - if (dci->tpc == 2) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 1; - - if (dci->tpc == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3; - - // Sanity check for pucch_resource_indicator value received to check for false DCI. - valid = 0; + /* dmrs symbol positions*/ + dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, + mac->mib->dmrs_TypeA_Position, + dlsch_config_pdu_1_0->number_symbols, + dlsch_config_pdu_1_0->start_symbol, + mappingtype); + dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ? + (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0; + /* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */ + if (dlsch_config_pdu_1_0->number_symbols == 2) + dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1; + else + dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2; + /* VRB_TO_PRB_MAPPING */ + dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; + /* MCS TABLE INDEX */ + dlsch_config_pdu_1_0->mcs_table = (pdsch_config) ? ((pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0) : 0; + /* MCS */ + dlsch_config_pdu_1_0->mcs = dci->mcs; + // Basic sanity check for MCS value to check for a false or erroneous DCI + if (dlsch_config_pdu_1_0->mcs > 28) { + LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_0->mcs); + return -1; + } + /* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->ndi = dci->ndi; + /* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->rv = dci->rv; + /* HARQ_PROCESS_NUMBER (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + dlsch_config_pdu_1_0->harq_process_nbr = dci->harq_pid; + /* TB_SCALING (only if CRC scrambled by P-RNTI or RA-RNTI) */ + // according to TS 38.214 Table 5.1.3.2-3 + if (dci->tb_scaling == 0) dlsch_config_pdu_1_0->scaling_factor_S = 1; + if (dci->tb_scaling == 1) dlsch_config_pdu_1_0->scaling_factor_S = 0.5; + if (dci->tb_scaling == 2) dlsch_config_pdu_1_0->scaling_factor_S = 0.25; + if (dci->tb_scaling == 3) dlsch_config_pdu_1_0->scaling_factor_S = 0; // value not defined in table + /* TPC_PUCCH (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ + // according to TS 38.213 Table 7.2.1-1 + if (dci->tpc == 0) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = -1; + if (dci->tpc == 1) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 0; + if (dci->tpc == 2) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 1; + if (dci->tpc == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3; + // Sanity check for pucch_resource_indicator value received to check for false DCI. + valid = 0; + if (mac->ULbwp[0] && + mac->ULbwp[0]->bwp_Dedicated && + mac->ULbwp[0]->bwp_Dedicated->pucch_Config && + mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup&& + mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList) { pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count; - for (int id = 0; id < pucch_res_set_cnt; id++) { - if (dci->pucch_resource_indicator < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { + if (dci->pucch_resource_indicator < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { + valid = 1; + break; + } + } + } + else if (mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList){ + pucch_res_set_cnt = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.count; + for (int id = 0; id < pucch_res_set_cnt; id++) { + if (dci->pucch_resource_indicator < mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { valid = 1; break; } } - - if (!valid) { - LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator); - return -1; - } - - /* ANTENNA_PORTS */ - uint8_t n_codewords = 1; // FIXME!!! - long *max_length = NULL; - long *dmrs_type = NULL; - - if (pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA) { - max_length = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength; - dmrs_type = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type; - } - - if (pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB) { - max_length = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->maxLength; - dmrs_type = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type; - } - - if ((dmrs_type == NULL) && (max_length == NULL)) { - // Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1 - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_1[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_1[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_1[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_1[dci->antenna_ports.val][4]; - } - - if ((dmrs_type == NULL) && (max_length != NULL)) { - // Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2 - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][5]; - } - - if (n_codewords == 2) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][5]; - dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][6]; - dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][7]; - dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][8]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][9]; - } - } - - if ((dmrs_type != NULL) && (max_length == NULL)) { - // Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1 - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][4]; - } - - if (n_codewords == 2) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][5]; - dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][6]; - } - } - - if ((dmrs_type != NULL) && (max_length != NULL)) { - // Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2 - if (n_codewords == 1) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][5]; - } - - if (n_codewords == 2) { - dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][0]; - dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][1]; - dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][2]; - dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][3]; - dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][4]; - dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][5]; - dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][6]; - dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][7]; - dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][8]; - dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][9]; - } - } - - /* TCI */ - if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1) { - // 0 bit if higher layer parameter tci-PresentInDCI is not enabled - // otherwise 3 bits as defined in Subclause 5.1.5 of [6, TS38.214] - dlsch_config_pdu_1_1->tci_state = dci->transmission_configuration_indication.val; - } - - /* SRS_REQUEST */ - // if SUL is supported in the cell, there is an additional bit in this field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!! - dlsch_config_pdu_1_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request.val & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 - /* CBGTI */ - dlsch_config_pdu_1_1->cbgti = dci->cbgti.val; - /* CBGFI */ - dlsch_config_pdu_1_1->codeBlockGroupFlushIndicator = dci->cbgfi.val; - /* DMRS_SEQ_INI */ - //FIXME!!! - // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; - /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */ - // according to TS 38.213 Table 9.2.3-1 - NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id; - uint8_t feedback_ti = - mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0]; - // set the harq status at MAC for feedback - set_harq_status(mac,dci->pucch_resource_indicator, - dci->harq_pid, - dlsch_config_pdu_1_1->accumulated_delta_PUCCH, - feedback_ti, - dci->dai[0].val, - dci_ind->n_CCE,dci_ind->N_CCE, - frame,slot); - dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; - LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); - dl_config->number_pdus = dl_config->number_pdus + 1; - /* TODO same calculation for MCS table as done in UL */ - dlsch_config_pdu_1_1->mcs_table = (pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0; - - /*PTRS configuration */ - if(mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) { - valid_ptrs_setup = set_dl_ptrs_values(mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup, - dlsch_config_pdu_1_1->number_rbs, dlsch_config_pdu_1_1->mcs, dlsch_config_pdu_1_1->mcs_table, - &dlsch_config_pdu_1_1->PTRSFreqDensity,&dlsch_config_pdu_1_1->PTRSTimeDensity, - &dlsch_config_pdu_1_1->PTRSPortIndex,&dlsch_config_pdu_1_1->nEpreRatioOfPDSCHToPTRS, - &dlsch_config_pdu_1_1->PTRSReOffset, dlsch_config_pdu_1_1->number_symbols); - - if(valid_ptrs_setup==true) { - dlsch_config_pdu_1_1->pduBitmap |= 0x1; - LOG_D(MAC, "DL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", dlsch_config_pdu_1_1->PTRSTimeDensity, dlsch_config_pdu_1_1->PTRSFreqDensity); - } - } - - break; + } else valid=1; + if (!valid) { + LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator); + return -1; } - case NR_DL_DCI_FORMAT_2_0: - break; + // set the harq status at MAC for feedback + set_harq_status(mac,dci->pucch_resource_indicator, + dci->harq_pid, + dlsch_config_pdu_1_0->accumulated_delta_PUCCH, + 1+dci->pdsch_to_harq_feedback_timing_indicator.val, + dci->dai[0].val, + dci_ind->n_CCE,dci_ind->N_CCE, + frame,slot); - case NR_DL_DCI_FORMAT_2_1: - break; + LOG_D(MAC,"(nr_ue_procedures.c) rnti = %x dl_config->number_pdus = %d\n", + dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti, + dl_config->number_pdus); + LOG_D(MAC,"(nr_ue_procedures.c) frequency_domain_resource_assignment=%d \t number_rbs=%d \t start_rb=%d\n", + dci->frequency_domain_assignment.val, + dlsch_config_pdu_1_0->number_rbs, + dlsch_config_pdu_1_0->start_rb); + LOG_D(MAC,"(nr_ue_procedures.c) time_domain_resource_assignment=%d \t number_symbols=%d \t start_symbol=%d\n", + dci->time_domain_assignment.val, + dlsch_config_pdu_1_0->number_symbols, + dlsch_config_pdu_1_0->start_symbol); + LOG_D(MAC,"(nr_ue_procedures.c) vrb_to_prb_mapping=%d \n>>> mcs=%d\n>>> ndi=%d\n>>> rv=%d\n>>> harq_process_nbr=%d\n>>> dai=%d\n>>> scaling_factor_S=%f\n>>> tpc_pucch=%d\n>>> pucch_res_ind=%d\n>>> pdsch_to_harq_feedback_time_ind=%d\n", + dlsch_config_pdu_1_0->vrb_to_prb_mapping, + dlsch_config_pdu_1_0->mcs, + dlsch_config_pdu_1_0->ndi, + dlsch_config_pdu_1_0->rv, + dlsch_config_pdu_1_0->harq_process_nbr, + dci->dai[0].val, + dlsch_config_pdu_1_0->scaling_factor_S, + dlsch_config_pdu_1_0->accumulated_delta_PUCCH, + dci->pucch_resource_indicator, + 1+dci->pdsch_to_harq_feedback_timing_indicator.val); - case NR_DL_DCI_FORMAT_2_2: - break; + // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; + + LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); + + dl_config->number_pdus = dl_config->number_pdus + 1; - case NR_DL_DCI_FORMAT_2_3: - break; - - default: - break; + break; } - if(rnti == SI_RNTI) { + case NR_DL_DCI_FORMAT_1_1: { + /* + * with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI + * 0 IDENTIFIER_DCI_FORMATS: + * 1 CARRIER_IND: + * 7 BANDWIDTH_PART_IND: + * 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: + * 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits, + * 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0 + * 14 PRB_BUNDLING_SIZE_IND: + * 15 RATE_MATCHING_IND: + * 16 ZP_CSI_RS_TRIGGER: + * 18 TB1_MCS: + * 19 TB1_NDI: + * 20 TB1_RV: + * 21 TB2_MCS: + * 22 TB2_NDI: + * 23 TB2_RV: + * 27 HARQ_PROCESS_NUMBER: + * 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI + * 33 TPC_PUCCH: + * 34 PUCCH_RESOURCE_IND: + * 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: + * 38 ANTENNA_PORTS: + * 39 TCI: + * 40 SRS_REQUEST: + * 43 CBGTI: + * 44 CBGFI: + * 47 DMRS_SEQ_INI: + */ + + if (dci->bwp_indicator.val != 1) { + LOG_W(MAC, "[%d.%d] bwp_indicator != 1! Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } + config_bwp_ue(mac, &dci->bwp_indicator.val, &dci_format); + NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id; + NR_PDSCH_Config_t *pdsch_config=mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup; + + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; + + fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_1 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; + + dlsch_config_pdu_1_1->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_1->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + dlsch_config_pdu_1_1->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; + + /* IDENTIFIER_DCI_FORMATS */ + /* CARRIER_IND */ + /* BANDWIDTH_PART_IND */ + // dlsch_config_pdu_1_1->bandwidth_part_ind = dci->bandwidth_part_ind; + /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ + if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->frequency_domain_assignment.val) < 0) { + LOG_W(MAC, "[%d.%d] Invalid frequency_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } + /* TIME_DOM_RESOURCE_ASSIGNMENT */ + if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val,0,false) < 0) { + LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); + return -1; + } + + NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; + if (mac->DLbwp[0] && + mac->DLbwp[0]->bwp_Dedicated && + mac->DLbwp[0]->bwp_Dedicated->pdsch_Config && + mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList) + pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup; + else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList) + pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup) + pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; + + int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_1->start_symbol <= 3)? typeA: typeB); + + /* dmrs symbol positions*/ + dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, + mac->scc->dmrs_TypeA_Position, + dlsch_config_pdu_1_1->number_symbols, + dlsch_config_pdu_1_1->start_symbol, + mappingtype); + + dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2; + + /* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214, + using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */ + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = 1; + /* VRB_TO_PRB_MAPPING */ + if ((pdsch_config->resourceAllocation == 1) && (pdsch_config->vrb_ToPRB_Interleaver != NULL)) + dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; + /* PRB_BUNDLING_SIZE_IND */ + dlsch_config_pdu_1_1->prb_bundling_size_ind = dci->prb_bundling_size_indicator.val; + /* RATE_MATCHING_IND */ + dlsch_config_pdu_1_1->rate_matching_ind = dci->rate_matching_indicator.val; + /* ZP_CSI_RS_TRIGGER */ + dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val; + /* MCS (for transport block 1)*/ + dlsch_config_pdu_1_1->mcs = dci->mcs; + // Basic sanity check for MCS value to check for a false or erroneous DCI + if (dlsch_config_pdu_1_1->mcs > 28) { + LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->mcs); + return -1; + } + /* NDI (for transport block 1)*/ + dlsch_config_pdu_1_1->ndi = dci->ndi; + /* RV (for transport block 1)*/ + dlsch_config_pdu_1_1->rv = dci->rv; + /* MCS (for transport block 2)*/ + dlsch_config_pdu_1_1->tb2_mcs = dci->mcs2.val; + // Basic sanity check for MCS value to check for a false or erroneous DCI + if (dlsch_config_pdu_1_1->tb2_mcs > 28) { + LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->tb2_mcs); + return -1; + } + /* NDI (for transport block 2)*/ + dlsch_config_pdu_1_1->tb2_ndi = dci->ndi2.val; + /* RV (for transport block 2)*/ + dlsch_config_pdu_1_1->tb2_rv = dci->rv2.val; + /* HARQ_PROCESS_NUMBER */ + dlsch_config_pdu_1_1->harq_process_nbr = dci->harq_pid; + /* TPC_PUCCH */ + // according to TS 38.213 Table 7.2.1-1 + if (dci->tpc == 0) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = -1; + if (dci->tpc == 1) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 0; + if (dci->tpc == 2) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 1; + if (dci->tpc == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3; + + // Sanity check for pucch_resource_indicator value received to check for false DCI. + valid = 0; + pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count; + for (int id = 0; id < pucch_res_set_cnt; id++) { + if (dci->pucch_resource_indicator < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { + valid = 1; + break; + } + } + if (!valid) { + LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator); + return -1; + } + + /* ANTENNA_PORTS */ + uint8_t n_codewords = 1; // FIXME!!! + long *max_length = NULL; + long *dmrs_type = NULL; + if (pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA) { + max_length = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength; + dmrs_type = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type; + } + if (pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB) { + max_length = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->maxLength; + dmrs_type = pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type; + } + if ((dmrs_type == NULL) && (max_length == NULL)){ + // Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1 + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_1[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_1[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_1[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_1[dci->antenna_ports.val][4]; + } + if ((dmrs_type == NULL) && (max_length != NULL)){ + // Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2 + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][5]; + } + if (n_codewords == 2) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][5]; + dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][6]; + dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][7]; + dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][8]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][9]; + } + } + if ((dmrs_type != NULL) && (max_length == NULL)){ + // Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1 + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][4]; + } + if (n_codewords == 2) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][5]; + dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][6]; + } + } + if ((dmrs_type != NULL) && (max_length != NULL)){ + // Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2 + if (n_codewords == 1) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][5]; + } + if (n_codewords == 2) { + dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][0]; + dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][1]; + dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][2]; + dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][3]; + dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][4]; + dlsch_config_pdu_1_1->dmrs_ports[4] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][5]; + dlsch_config_pdu_1_1->dmrs_ports[5] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][6]; + dlsch_config_pdu_1_1->dmrs_ports[6] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][7]; + dlsch_config_pdu_1_1->dmrs_ports[7] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][8]; + dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][9]; + } + } + /* TCI */ + if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){ + // 0 bit if higher layer parameter tci-PresentInDCI is not enabled + // otherwise 3 bits as defined in Subclause 5.1.5 of [6, TS38.214] + dlsch_config_pdu_1_1->tci_state = dci->transmission_configuration_indication.val; + } + /* SRS_REQUEST */ + // if SUL is supported in the cell, there is an additional bit in this field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!! + dlsch_config_pdu_1_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request.val & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 + /* CBGTI */ + dlsch_config_pdu_1_1->cbgti = dci->cbgti.val; + /* CBGFI */ + dlsch_config_pdu_1_1->codeBlockGroupFlushIndicator = dci->cbgfi.val; + /* DMRS_SEQ_INI */ + //FIXME!!! + + // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; + + /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */ + // according to TS 38.213 Table 9.2.3-1 + NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id; + uint8_t feedback_ti = + mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0]; + + // set the harq status at MAC for feedback + set_harq_status(mac,dci->pucch_resource_indicator, + dci->harq_pid, + dlsch_config_pdu_1_1->accumulated_delta_PUCCH, + feedback_ti, + dci->dai[0].val, + dci_ind->n_CCE,dci_ind->N_CCE, + frame,slot); + + dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; + LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); + + dl_config->number_pdus = dl_config->number_pdus + 1; + /* TODO same calculation for MCS table as done in UL */ + dlsch_config_pdu_1_1->mcs_table = (pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0; + /*PTRS configuration */ + if(mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) { + valid_ptrs_setup = set_dl_ptrs_values(mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup, + dlsch_config_pdu_1_1->number_rbs, dlsch_config_pdu_1_1->mcs, dlsch_config_pdu_1_1->mcs_table, + &dlsch_config_pdu_1_1->PTRSFreqDensity,&dlsch_config_pdu_1_1->PTRSTimeDensity, + &dlsch_config_pdu_1_1->PTRSPortIndex,&dlsch_config_pdu_1_1->nEpreRatioOfPDSCHToPTRS, + &dlsch_config_pdu_1_1->PTRSReOffset, dlsch_config_pdu_1_1->number_symbols); + if(valid_ptrs_setup==true) { + dlsch_config_pdu_1_1->pduBitmap |= 0x1; + LOG_D(MAC, "DL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", dlsch_config_pdu_1_1->PTRSTimeDensity, dlsch_config_pdu_1_1->PTRSFreqDensity); + } + } + + break; + } + + case NR_DL_DCI_FORMAT_2_0: + break; + + case NR_DL_DCI_FORMAT_2_1: + break; + + case NR_DL_DCI_FORMAT_2_2: + break; + + case NR_DL_DCI_FORMAT_2_3: + break; + + default: + break; + } + + + if(rnti == SI_RNTI){ + // }else if(rnti == mac->ra_rnti){ - } else if(rnti == P_RNTI) { - } else { // c-rnti - /// check if this is pdcch order + + }else if(rnti == P_RNTI){ + + }else{ // c-rnti + + /// check if this is pdcch order //dci->random_access_preamble_index; //dci->ss_pbch_index; //dci->prach_mask_index; + /// else normal DL-SCH grant } return ret; + } void set_harq_status(NR_UE_MAC_INST_t *mac, @@ -1279,7 +1281,9 @@ void set_harq_status(NR_UE_MAC_INST_t *mac, int N_CCE, frame_t frame, int slot) { + NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[harq_id]; + current_harq->active = true; current_harq->ack_received = false; current_harq->pucch_resource_indicator = pucch_id; @@ -1291,10 +1295,12 @@ void set_harq_status(NR_UE_MAC_INST_t *mac, // FIXME k0 != 0 currently not taken into consideration current_harq->dl_frame = frame; current_harq->dl_slot = slot; + } void update_harq_status(nr_downlink_indication_t *dl_info, int pdu_id) { + NR_UE_MAC_INST_t *mac = get_mac_inst(dl_info->module_id); uint8_t harq_pid = dl_info->rx_ind->rx_indication_body[pdu_id].pdsch_pdu.harq_pid; NR_UE_HARQ_STATUS_t *current_harq = &mac->dl_harq_info[harq_pid]; @@ -1302,7 +1308,8 @@ void update_harq_status(nr_downlink_indication_t *dl_info, int pdu_id) { if (current_harq->active) { current_harq->ack = dl_info->rx_ind->rx_indication_body[pdu_id].pdsch_pdu.ack_nack; current_harq->ack_received = true; - } else { + } + else { //shouldn't get here LOG_E(MAC, "Trying to process acknack for an inactive harq process (%d)\n", harq_pid); } @@ -1315,6 +1322,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch, fapi_nr_ul_config_pucch_pdu *pucch_pdu, int O_SR, int O_ACK, int O_CSI) { + int O_CRC = 0; //FIXME uint16_t O_uci = O_CSI + O_ACK; NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; @@ -1323,38 +1331,39 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, long *id0 = NULL; int scs; NR_BWP_UplinkCommon_t *initialUplinkBWP; - if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; - NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; - if (mac->cg && ubwp && mac->cg->spCellConfig && mac->cg->spCellConfig->spCellConfigDedicated && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) { scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; - } else + } + else scs = initialUplinkBWP->genericParameters.subcarrierSpacing; int subframe_number = slot / (nr_slots_per_frame[scs]/10); nb_pucch_format_4_in_subframes[subframe_number] = 0; + pucch_pdu->rnti = rnti; // configure pucch from Table 9.2.1-1 if (pucch->initial_pucch_id > -1 && pucch->pucch_resource == NULL) { + pucch_pdu->format_type = initial_pucch_resource[pucch->initial_pucch_id].format; pucch_pdu->start_symbol_index = initial_pucch_resource[pucch->initial_pucch_id].startingSymbolIndex; pucch_pdu->nr_of_symbols = initial_pucch_resource[pucch->initial_pucch_id].nrofSymbols; + pucch_pdu->bwp_size = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); pucch_pdu->bwp_start = NRRIV2PRBOFFSET(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + pucch_pdu->prb_size = 1; // format 0 or 1 int RB_BWP_offset; - if (pucch->initial_pucch_id == 15) RB_BWP_offset = pucch_pdu->bwp_size>>2; else @@ -1362,15 +1371,14 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, int N_CS = initial_pucch_resource[pucch->initial_pucch_id].nb_CS_indexes; pucch_pdu->prb_start = RB_BWP_offset + (pucch->initial_pucch_id/N_CS); - if (pucch->initial_pucch_id>>3 == 0) { pucch_pdu->second_hop_prb = pucch_pdu->bwp_size - 1 - RB_BWP_offset - (pucch->initial_pucch_id/N_CS); pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch->initial_pucch_id].initial_CS_indexes[pucch->initial_pucch_id%N_CS]; - } else { + } + else { pucch_pdu->second_hop_prb = pucch_pdu->bwp_size - 1 - RB_BWP_offset - ((pucch->initial_pucch_id - 8)/N_CS); pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch->initial_pucch_id].initial_CS_indexes[(pucch->initial_pucch_id - 8)%N_CS]; } - pucch_pdu->freq_hop_flag = 1; pucch_pdu->time_domain_occ_idx = 0; @@ -1379,7 +1387,8 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit[pucch->ack_payload & 0x1]; /* only harq of 1 bit */ else pucch_pdu->mcs = sequence_cyclic_shift_2_harq_ack_bits[pucch->ack_payload & 0x3]; /* only harq with 2 bits */ - } else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ + } + else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ if (pucch->sr_payload == 1) { /* positive scheduling request */ if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */ @@ -1392,27 +1401,29 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, // TODO verify if SR can be transmitted in this mode pucch_pdu->payload = (pucch->sr_payload << O_ACK) | pucch->ack_payload; - } else if (pucch->pucch_resource != NULL) { + + } + else if (pucch->pucch_resource != NULL) { + NR_PUCCH_Resource_t *pucchres = pucch->pucch_resource; if (mac->cg && mac->cg->physicalCellGroupConfig && (mac->cg->physicalCellGroupConfig->harq_ACK_SpatialBundlingPUCCH != NULL || - mac->cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook != 1)) { - LOG_E(PHY,"PUCCH Unsupported cell group configuration : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); + mac->cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook != 1)) { + LOG_E(PHY,"PUCCH Unsupported cell group configuration : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); return; - } else if (mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup && - mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { - LOG_E(MAC,"PUCCH Unsupported code block group for serving cell config : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); + } + else if (mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup && + mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { + LOG_E(MAC,"PUCCH Unsupported code block group for serving cell config : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); return; } - NR_PUCCH_Config_t *pucch_Config; - if (bwp_id>0 && mac->ULbwp[bwp_id-1] && mac->ULbwp[bwp_id-1]->bwp_Dedicated && @@ -1420,60 +1431,55 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) { NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup; pusch_id = pusch_Config->dataScramblingIdentityPUSCH; - if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0; else if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->transformPrecodingDisabled->scramblingID0; else *id0 = mac->physCellId; - pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup; pucch_pdu->bwp_size = NRRIV2BW(mac->ULbwp[bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth,MAX_BWP_SIZE); pucch_pdu->bwp_start = NRRIV2PRBOFFSET(mac->ULbwp[bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth,MAX_BWP_SIZE); - } else if (bwp_id==0 && - mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { + } + else if (bwp_id==0 && + mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; pucch_pdu->bwp_size = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth,MAX_BWP_SIZE); pucch_pdu->bwp_start = NRRIV2PRBOFFSET(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth,MAX_BWP_SIZE); - } else AssertFatal(1==0,"no pucch_Config\n"); + } + else AssertFatal(1==0,"no pucch_Config\n"); NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon; - if (mac->scc) pucch_ConfigCommon = mac->scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup; else pucch_ConfigCommon = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pucch_ConfigCommon->choice.setup; - if (pucch_ConfigCommon->hoppingId != NULL) pucch_pdu->hopping_id = *pucch_ConfigCommon->hoppingId; else pucch_pdu->hopping_id = mac->physCellId; - switch (pucch_ConfigCommon->pucch_GroupHopping) { + switch (pucch_ConfigCommon->pucch_GroupHopping){ case 0 : - // if neither, both disabled - pucch_pdu->group_hop_flag = 0; - pucch_pdu->sequence_hop_flag = 0; - break; - - case 1 : - // if enable, group enabled - pucch_pdu->group_hop_flag = 1; - pucch_pdu->sequence_hop_flag = 0; - break; - - case 2 : - // if disable, sequence disabled - pucch_pdu->group_hop_flag = 0; - pucch_pdu->sequence_hop_flag = 1; - break; - - default: - AssertFatal(1==0,"Group hopping flag undefined (0,1,2) \n"); + // if neither, both disabled + pucch_pdu->group_hop_flag = 0; + pucch_pdu->sequence_hop_flag = 0; + break; + case 1 : + // if enable, group enabled + pucch_pdu->group_hop_flag = 1; + pucch_pdu->sequence_hop_flag = 0; + break; + case 2 : + // if disable, sequence disabled + pucch_pdu->group_hop_flag = 0; + pucch_pdu->sequence_hop_flag = 1; + break; + default: + AssertFatal(1==0,"Group hopping flag undefined (0,1,2) \n"); } pucch_pdu->prb_start = pucchres->startingPRB; @@ -1482,10 +1488,9 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->prb_size = 1; // format 0 or 1 if ((O_SR+O_CSI+O_SR) > (sizeof(uint64_t)*8)) { - LOG_E(MAC,"PUCCH number of UCI bits exceeds payload size : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); + LOG_E(MAC,"PUCCH number of UCI bits exceeds payload size : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); return; } - pucch_pdu->payload = (pucch->csi_part1_payload << (O_ACK + O_SR)) | (pucch->sr_payload << O_ACK) | pucch->ack_payload; switch(pucchres->format.present) { @@ -1494,13 +1499,13 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->initial_cyclic_shift = pucchres->format.choice.format0->initialCyclicShift; pucch_pdu->nr_of_symbols = pucchres->format.choice.format0->nrofSymbols; pucch_pdu->start_symbol_index = pucchres->format.choice.format0->startingSymbolIndex; - if (O_SR == 0 || pucch->sr_payload == 0) { /* only ack is transmitted TS 36.213 9.2.3 UE procedure for reporting HARQ-ACK */ if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit[pucch->ack_payload & 0x1]; /* only harq of 1 bit */ else pucch_pdu->mcs = sequence_cyclic_shift_2_harq_ack_bits[pucch->ack_payload & 0x3]; /* only harq with 2 bits */ - } else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ + } + else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */ if (pucch->sr_payload == 1) { /* positive scheduling request */ if (O_ACK == 1) pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */ @@ -1510,9 +1515,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->mcs = 0; /* only positive SR */ } } - break; - case NR_PUCCH_Resource__format_PR_format1 : pucch_pdu->format_type = 1; pucch_pdu->initial_cyclic_shift = pucchres->format.choice.format1->initialCyclicShift; @@ -1520,7 +1523,6 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->start_symbol_index = pucchres->format.choice.format1->startingSymbolIndex; pucch_pdu->time_domain_occ_idx = pucchres->format.choice.format1->timeDomainOCC; break; - case NR_PUCCH_Resource__format_PR_format2 : pucch_pdu->format_type = 2; pucch_pdu->n_bit = O_uci+O_SR; @@ -1529,28 +1531,25 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId; pucch_pdu->dmrs_scrambling_id = id0!= NULL ? *id0 : mac->physCellId; pucch_pdu->prb_size = compute_pucch_prb_size(2,pucchres->format.choice.format2->nrofPRBs, - O_uci+O_SR,O_CSI,pucch_Config->format2->choice.setup->maxCodeRate, - 2,pucchres->format.choice.format2->nrofSymbols,8); + O_uci+O_SR,O_CSI,pucch_Config->format2->choice.setup->maxCodeRate, + 2,pucchres->format.choice.format2->nrofSymbols,8); break; - case NR_PUCCH_Resource__format_PR_format3 : pucch_pdu->format_type = 3; pucch_pdu->n_bit = O_uci+O_SR; pucch_pdu->nr_of_symbols = pucchres->format.choice.format3->nrofSymbols; pucch_pdu->start_symbol_index = pucchres->format.choice.format3->startingSymbolIndex; pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId; - if (pucch_Config->format3 == NULL) { pucch_pdu->pi_2bpsk = 0; pucch_pdu->add_dmrs_flag = 0; - } else { + } + else { pucchfmt = pucch_Config->format3->choice.setup; pucch_pdu->pi_2bpsk = pucchfmt->pi2BPSK!= NULL ? 1 : 0; pucch_pdu->add_dmrs_flag = pucchfmt->additionalDMRS!= NULL ? 1 : 0; } - int f3_dmrs_symbols; - if (pucchres->format.choice.format3->nrofSymbols==4) f3_dmrs_symbols = 1<freq_hop_flag; else { @@ -1559,12 +1558,10 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, else f3_dmrs_symbols = 2<add_dmrs_flag; } - pucch_pdu->prb_size = compute_pucch_prb_size(3,pucchres->format.choice.format3->nrofPRBs, - O_uci+O_SR,O_CSI,pucch_Config->format3->choice.setup->maxCodeRate, - 2-pucch_pdu->pi_2bpsk,pucchres->format.choice.format3->nrofSymbols-f3_dmrs_symbols,12); + O_uci+O_SR,O_CSI,pucch_Config->format3->choice.setup->maxCodeRate, + 2-pucch_pdu->pi_2bpsk,pucchres->format.choice.format3->nrofSymbols-f3_dmrs_symbols,12); break; - case NR_PUCCH_Resource__format_PR_format4 : pucch_pdu->format_type = 4; pucch_pdu->nr_of_symbols = pucchres->format.choice.format4->nrofSymbols; @@ -1572,33 +1569,30 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, pucch_pdu->pre_dft_occ_len = pucchres->format.choice.format4->occ_Length; pucch_pdu->pre_dft_occ_idx = pucchres->format.choice.format4->occ_Index; pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId; - if (pucch_Config->format3 == NULL) { pucch_pdu->pi_2bpsk = 0; pucch_pdu->add_dmrs_flag = 0; - } else { + } + else { pucchfmt = pucch_Config->format3->choice.setup; pucch_pdu->pi_2bpsk = pucchfmt->pi2BPSK!= NULL ? 1 : 0; pucch_pdu->add_dmrs_flag = pucchfmt->additionalDMRS!= NULL ? 1 : 0; } - break; - default : AssertFatal(1==0,"Undefined PUCCH format \n"); } - pucch_pdu->pucch_tx_power = get_pucch_tx_power_ue(mac, - pucch_Config, - pucch, - pucch_pdu->format_type, - pucch_pdu->prb_size, - pucch_pdu->freq_hop_flag, - pucch_pdu->add_dmrs_flag, - pucch_pdu->nr_of_symbols, - subframe_number, - O_ACK, O_SR, - O_CSI, O_CRC); + pucch_Config, + pucch, + pucch_pdu->format_type, + pucch_pdu->prb_size, + pucch_pdu->freq_hop_flag, + pucch_pdu->add_dmrs_flag, + pucch_pdu->nr_of_symbols, + subframe_number, + O_ACK, O_SR, + O_CSI, O_CRC); } } @@ -1614,9 +1608,9 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, int subframe_number, int O_ACK, int O_SR, int O_CSI, int O_CRC) { + int PUCCH_POWER_DEFAULT = 0; int16_t P_O_NOMINAL_PUCCH; - if (mac->scc) P_O_NOMINAL_PUCCH = *mac->scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal; else P_O_NOMINAL_PUCCH = *mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pucch_ConfigCommon->choice.setup->p0_nominal; @@ -1629,20 +1623,22 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, int16_t G_b_f_c = 0; if (pucch_Config->spatialRelationInfoToAddModList != NULL) { /* FFS TODO NR */ - LOG_D(MAC,"PUCCH Spatial relation infos are not yet implemented : at line %d in function %s of file %s \n", LINE_FILE, __func__, __FILE__); + LOG_D(MAC,"PUCCH Spatial relation infos are not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__); return (PUCCH_POWER_DEFAULT); } if (power_config->p0_Set != NULL) { P_O_UE_PUCCH = power_config->p0_Set->list.array[0]->p0_PUCCH_Value; /* get from index 0 if no spatial relation set */ G_b_f_c = 0; - } else { + } + else { G_b_f_c = pucch->delta_pucch; - LOG_D(MAC,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE, __func__, __FILE__); + LOG_D(MAC,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__); return (PUCCH_POWER_DEFAULT); } int P_O_PUCCH = P_O_NOMINAL_PUCCH + P_O_UE_PUCCH; + int16_t delta_F_PUCCH; int DELTA_TF; uint16_t N_ref_PUCCH; @@ -1655,13 +1651,11 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH); delta_F_PUCCH = *power_config->deltaF_PUCCH_f0; break; - case 1: N_ref_PUCCH = 14; DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH); delta_F_PUCCH = *power_config->deltaF_PUCCH_f1; break; - case 2: N_sc_ctrl_RB = 10; DELTA_TF = get_deltatf(nb_of_prbs, @@ -1674,7 +1668,6 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, O_CSI, O_CRC); delta_F_PUCCH = *power_config->deltaF_PUCCH_f2; break; - case 3: N_sc_ctrl_RB = 14; DELTA_TF = get_deltatf(nb_of_prbs, @@ -1687,7 +1680,6 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, O_CSI, O_CRC); delta_F_PUCCH = *power_config->deltaF_PUCCH_f3; break; - case 4: N_sc_ctrl_RB = 14/(nb_pucch_format_4_in_subframes[subframe_number]); DELTA_TF = get_deltatf(nb_of_prbs, @@ -1700,21 +1692,23 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, O_CSI, O_CRC); delta_F_PUCCH = *power_config->deltaF_PUCCH_f4; break; - - default: { - LOG_E(MAC,"PUCCH unknown pucch format : at line %d in function %s of file %s \n", LINE_FILE, __func__, __FILE__); + default: + { + LOG_E(MAC,"PUCCH unknown pucch format : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__); return (0); } } if (*power_config->twoPUCCH_PC_AdjustmentStates > 1) { - LOG_E(MAC,"PUCCH power control adjustment states with 2 states not yet implemented : at line %d in function %s of file %s \n", LINE_FILE, __func__, __FILE__); + LOG_E(MAC,"PUCCH power control adjustment states with 2 states not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__); return (PUCCH_POWER_DEFAULT); } int16_t pucch_power = P_O_PUCCH + delta_F_PUCCH + DELTA_TF + G_b_f_c; + NR_TST_PHY_PRINTF("PUCCH ( Tx power : %d dBm ) ( 10Log(...) : %d ) ( from Path Loss : %d ) ( delta_F_PUCCH : %d ) ( DELTA_TF : %d ) ( G_b_f_c : %d ) \n", pucch_power, contributor, PL, delta_F_PUCCH, DELTA_TF, G_b_f_c); + return (pucch_power); } @@ -1725,13 +1719,13 @@ int get_deltatf(uint16_t nb_of_prbs, int N_sc_ctrl_RB, int n_HARQ_ACK, int O_ACK, int O_SR, - int O_CSI, int O_CRC) { + int O_CSI, int O_CRC){ + int DELTA_TF; int O_UCI = O_ACK + O_SR + O_CSI + O_CRC; int N_symb = nb_symbols_excluding_dmrs[N_symb_PUCCH-4][add_dmrs_flag][freq_hop_flag]; float N_RE = nb_of_prbs * N_sc_ctrl_RB * N_symb; float K1 = 6; - if (O_UCI < 12) DELTA_TF = 10 * log10((double)(((K1 * (n_HARQ_ACK + O_SR + O_CSI))/N_RE))); else { @@ -1739,7 +1733,6 @@ int get_deltatf(uint16_t nb_of_prbs, float BPRE = O_UCI/N_RE; DELTA_TF = 10 * log10((double)(pow(2,(K2*BPRE)) - 1)); } - return DELTA_TF; } @@ -1794,17 +1787,18 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) { pucch_resource_set_id = 0; return (pucch_resource_set_id); break; - } else { + } + else { pucch_resource_set_id = 1; return (pucch_resource_set_id); break; } } - pucch_resource_set_id++; } pucch_resource_set_id = MAX_NB_OF_PUCCH_RESOURCE_SETS; + return (pucch_resource_set_id); } @@ -1828,6 +1822,7 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) { void select_pucch_resource(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch) { + NR_PUCCH_ResourceId_t *current_resource_id = NULL; NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; int n_list; @@ -1850,53 +1845,48 @@ void select_pucch_resource(NR_UE_MAC_INST_t *mac, mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[0] == NULL) - ) { + ){ + /* see TS 38.213 9.2.1 PUCCH Resource Sets */ int delta_PRI = pucch->resource_indicator; int n_CCE_0 = pucch->n_CCE; int N_CCE_0 = pucch->N_CCE; - if (N_CCE_0 == 0) { - AssertFatal(1==0,"PUCCH No compatible pucch format found : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); + AssertFatal(1==0,"PUCCH No compatible pucch format found : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); } - int r_PUCCH = ((2 * n_CCE_0)/N_CCE_0) + (2 * delta_PRI); pucch->initial_pucch_id = r_PUCCH; pucch->pucch_resource = NULL; - } else { + } + else { struct NR_PUCCH_Config__resourceSetToAddModList *resourceSetToAddModList = NULL; struct NR_PUCCH_Config__resourceToAddModList *resourceToAddModList = NULL; - if (bwp_id > 0 && mac->ULbwp[bwp_id-1]) { AssertFatal(mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList!=NULL, "mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList is null\n"); resourceSetToAddModList = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList; resourceToAddModList = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceToAddModList; - } else if (bwp_id == 0 && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList!=NULL) { + } + else if (bwp_id == 0 && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList!=NULL) { resourceSetToAddModList = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList; resourceToAddModList = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceToAddModList; } n_list = resourceSetToAddModList->list.count; - if (pucch->resource_set_id > n_list) { LOG_E(MAC,"Invalid PUCCH resource set id %d\n",pucch->resource_set_id); pucch->pucch_resource = NULL; return; } - n_list = resourceSetToAddModList->list.array[pucch->resource_set_id]->resourceList.list.count; - if (pucch->resource_indicator > n_list) { LOG_E(MAC,"Invalid PUCCH resource id %d\n",pucch->resource_indicator); pucch->pucch_resource = NULL; return; } - current_resource_id = resourceSetToAddModList->list.array[pucch->resource_set_id]->resourceList.list.array[pucch->resource_indicator]; n_list = resourceToAddModList->list.count; int res_found = 0; - for (int i=0; ilist.array[i]->pucch_ResourceId == *current_resource_id) { pucch->pucch_resource = resourceToAddModList->list.array[i]; @@ -1904,7 +1894,6 @@ void select_pucch_resource(NR_UE_MAC_INST_t *mac, break; } } - if (res_found == 0) { LOG_E(MAC,"Couldn't find PUCCH Resource\n"); pucch->pucch_resource = NULL; @@ -1943,6 +1932,8 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, PUCCH_sched_t *pucch) { + + uint32_t ack_data[NR_DL_MAX_NB_CW][NR_DL_MAX_DAI] = {{0},{0}}; uint32_t dai[NR_DL_MAX_NB_CW][NR_DL_MAX_DAI] = {{0},{0}}; /* for serving cell */ uint32_t dai_total[NR_DL_MAX_NB_CW][NR_DL_MAX_DAI] = {{0},{0}}; /* for multiple cells */ @@ -1957,10 +1948,8 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, NR_UE_HARQ_STATUS_t *current_harq; int sched_frame,sched_slot; NR_BWP_UplinkCommon_t *initialUplinkBWP; - if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; - int slots_per_frame,scs; if (mac->DLbwp[0] && @@ -1970,63 +1959,68 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI[0] == 2) { two_transport_blocks = TRUE; number_of_code_word = 2; - } else { + } + else { number_of_code_word = 1; } NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; - if (mac->cg && ubwp && mac->cg->spCellConfig && mac->cg->spCellConfig->spCellConfigDedicated && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) { scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; - } else + } + else scs = initialUplinkBWP->genericParameters.subcarrierSpacing; slots_per_frame = nr_slots_per_frame[scs]; /* look for dl acknowledgment which should be done on current uplink slot */ for (int code_word = 0; code_word < number_of_code_word; code_word++) { + for (int dl_harq_pid = 0; dl_harq_pid < 16; dl_harq_pid++) { + current_harq = &mac->dl_harq_info[dl_harq_pid]; if (current_harq->active) { + sched_slot = current_harq->dl_slot + current_harq->feedback_to_ul; sched_frame = current_harq->dl_frame; - - if (sched_slot>=slots_per_frame) { + if (sched_slot>=slots_per_frame){ sched_slot %= slots_per_frame; sched_frame++; } /* check if current tx slot should transmit downlink acknowlegment */ if (sched_frame == frame && sched_slot == slot) { + if (current_harq->dai > NR_DL_MAX_DAI) { - LOG_E(MAC,"PUCCH Downlink DAI has an invalid value : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); - } else { + LOG_E(MAC,"PUCCH Downlink DAI has an invalid value : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); + } + else { + if ((pucch->resource_indicator != -1) && (pucch->resource_indicator != current_harq->pucch_resource_indicator)) LOG_E(MAC, "Value of pucch_resource_indicator %d not matching with what set before %d (Possibly due to a false DCI) \n", current_harq->pucch_resource_indicator,pucch->resource_indicator); - else { + else{ dai_current = current_harq->dai+1; // DCI DAI to counter DAI conversion if (dai_current == 0) { - LOG_E(MAC,"PUCCH Downlink dai is invalid : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); + LOG_E(MAC,"PUCCH Downlink dai is invalid : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); return(0); } else if (dai_current > dai_max) { dai_max = dai_current; } number_harq_feedback++; - if (current_harq->ack_received) ack_data[code_word][dai_current - 1] = current_harq->ack; else ack_data[code_word][dai_current - 1] = 0; - dai[code_word][dai_current - 1] = dai_current; + pucch->resource_indicator = current_harq->pucch_resource_indicator; pucch->n_CCE = current_harq->n_CCE; pucch->N_CCE = current_harq->N_CCE; @@ -2044,8 +2038,9 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, if (number_harq_feedback == 0) { pucch->n_HARQ_ACK = 0; return(0); - } else if (number_harq_feedback > (sizeof(uint32_t)*8)) { - LOG_E(MAC,"PUCCH number of ack bits exceeds payload size : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); + } + else if (number_harq_feedback > (sizeof(uint32_t)*8)) { + LOG_E(MAC,"PUCCH number of ack bits exceeds payload size : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); return(0); } @@ -2054,7 +2049,6 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, U_DAI_c = number_harq_feedback/number_of_code_word; N_m_c_rx = number_harq_feedback; int N_SPS_c = 0; /* FFS TODO_NR multicells and SPS are not supported at the moment */ - if (mac->cg != NULL && mac->cg->physicalCellGroupConfig != NULL && mac->cg->physicalCellGroupConfig->harq_ACK_SpatialBundlingPUCCH != NULL) { @@ -2078,7 +2072,6 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ack_data[code_word][i] = 0; /* nack data transport block which has been missed */ number_harq_feedback++; } - if (two_transport_blocks == TRUE) { dai_total[code_word][i] = dai[code_word][i]; /* for a single cell, dai_total is the same as dai of first cell */ } @@ -2095,6 +2088,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, int O_bit_number_cw1 = 0; for (int m = 0; m < M ; m++) { + if (dai[0][m] <= V_temp) { j = j + 1; } @@ -2111,7 +2105,8 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, if (two_transport_blocks == TRUE) { O_bit_number_cw0 = (8 * j) + 2*(V_temp - 1); - } else { + } + else { O_bit_number_cw0 = (4 * j) + (V_temp - 1); } @@ -2124,30 +2119,32 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, if (two_transport_blocks == TRUE) { O_ACK = 2 * ( 4 * j + V_temp2); /* for two transport blocks */ - } else { + } + else { O_ACK = 4 * j + V_temp2; /* only one transport block */ } if (number_harq_feedback != O_ACK) { - LOG_E(MAC,"PUCCH Error for number of bits for acknowledgment : at line %d in function %s of file %s \n", LINE_FILE, __func__, FILE_NAME); + LOG_E(MAC,"PUCCH Error for number of bits for acknowledgment : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME); return (0); } pucch->ack_payload = o_ACK; + return(number_harq_feedback); } bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, - PUCCH_sched_t *pucch, - frame_t frame, - int slot) { + PUCCH_sched_t *pucch, + frame_t frame, + int slot) { + NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; NR_PUCCH_Config_t *pucch_Config = NULL; int scs; NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; NR_BWP_UplinkCommon_t *initialUplinkBWP; - if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; @@ -2157,7 +2154,8 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) { scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; - } else + } + else scs = initialUplinkBWP->genericParameters.subcarrierSpacing; const int n_slots_frame = nr_slots_per_frame[scs]; @@ -2168,55 +2166,52 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) { pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup; - } else if (bwp_id==0 && - mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { + } + else if (bwp_id==0 && + mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; } - if(!pucch_Config || pucch_Config->schedulingRequestResourceToAddModList->list.count==0) return false; // SR not configured - for (int SR_resource_id =0; SR_resource_id < pucch_Config->schedulingRequestResourceToAddModList->list.count; SR_resource_id++) { + for (int SR_resource_id =0; SR_resource_id < pucch_Config->schedulingRequestResourceToAddModList->list.count;SR_resource_id++) { NR_SchedulingRequestResourceConfig_t *SchedulingRequestResourceConfig = pucch_Config->schedulingRequestResourceToAddModList->list.array[SR_resource_id]; - int SR_period; - int SR_offset; + int SR_period; int SR_offset; + find_period_offest_SR(SchedulingRequestResourceConfig,&SR_period,&SR_offset); int sfn_sf = frame * n_slots_frame + slot; if ((sfn_sf - SR_offset) % SR_period == 0) { LOG_D(MAC, "Scheduling Request active in frame %d slot %d \n", frame, slot); NR_PUCCH_ResourceId_t *PucchResourceId = SchedulingRequestResourceConfig->resource; + int found = -1; NR_PUCCH_ResourceSet_t *pucchresset = pucch_Config->resourceSetToAddModList->list.array[0]; // set with formats 0,1 int n_list = pucchresset->resourceList.list.count; - - for (int i=0; iresourceList.list.array[i] == *PucchResourceId ) { found = i; break; } } - if (found == -1) { LOG_E(MAC,"Couldn't find PUCCH resource for SR\n"); return false; } - pucch->resource_indicator = found; return true; } } - return false; } -int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot) { +int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ // no UL-SCH resources available for this tti && UE has a valid PUCCH resources for SR configuration for this tti DevCheck(module_idP < (int) NB_UE_INST, module_idP, NB_NR_UE_MAC_INST, 0); NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); @@ -2227,38 +2222,36 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot) { mac->scheduling_info.SR_COUNTER, (1 << (2 + - // mac-> - // physicalConfigDedicated->schedulingRequestConfig->choice. - // setup.dsr_TransMax)), +// mac-> +// physicalConfigDedicated->schedulingRequestConfig->choice. +// setup.dsr_TransMax)), dsr_TransMax)), mac->scheduling_info.SR_pending); // todo - - /* - if ((mac->scheduling_info.sr_ProhibitTimer_Running == 0)) { - mac->scheduling_info.SR_pending = 1; - LOG_D(NR_MAC, - "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n", - module_idP, frameP, slot, - mac->scheduling_info.SR_COUNTER, - (1 << - (2 + - // mac-> - // physicalConfigDedicated->schedulingRequestConfig->choice. - // setup.dsr_TransMax)), - dsr_TransMax)), - mac->scheduling_info.SR_pending); // todo - return (0); - } - */ // todo - +/* + if ((mac->scheduling_info.sr_ProhibitTimer_Running == 0)) { + mac->scheduling_info.SR_pending = 1; + LOG_D(NR_MAC, + "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n", + module_idP, frameP, slot, + mac->scheduling_info.SR_COUNTER, + (1 << + (2 + +// mac-> +// physicalConfigDedicated->schedulingRequestConfig->choice. +// setup.dsr_TransMax)), + dsr_TransMax)), + mac->scheduling_info.SR_pending); // todo + return (0); + } +*/ // todo if ((mac->scheduling_info.SR_pending == 1) && (mac->scheduling_info.SR_COUNTER < (1 << (2 + //mac-> //physicalConfigDedicated->schedulingRequestConfig->choice.setup. - //dsr_TransMax)))) { - dsr_TransMax)))) { + //dsr_TransMax)))) { + dsr_TransMax)))) { LOG_D(NR_MAC, "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n", module_idP, frameP, slot, @@ -2281,7 +2274,6 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot) { mac->scheduling_info. sr_ProhibitTimer_Running = 0; } - //mac->ul_active =1; return (1); //instruct phy to signal SR } else { @@ -2308,26 +2300,28 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, PUCCH_sched_t *pucch) { + NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; NR_PUCCH_Config_t *pucch_Config = NULL; int csi_bits = 0; if(mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig) { + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig) { + NR_CSI_MeasConfig_t *csi_measconfig = mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup; - for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++) { + for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){ NR_CSI_ReportConfig_t *csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id]; - if(csirep->reportConfigType.present == NR_CSI_ReportConfig__reportConfigType_PR_periodic) { + if(csirep->reportConfigType.present == NR_CSI_ReportConfig__reportConfigType_PR_periodic){ int period, offset; csi_period_offset(csirep, NULL, &period, &offset); + int scs; NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; NR_BWP_UplinkCommon_t *initialUplinkBWP; - if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; @@ -2344,36 +2338,38 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac, mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) { pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup; - } else if (bwp_id==0 && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { + } + else if (bwp_id==0 && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; } const int n_slots_frame = nr_slots_per_frame[scs]; - if (((n_slots_frame*frame + slot - offset)%period) == 0 && pucch_Config) { + NR_PUCCH_CSI_Resource_t *pucchcsires = csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list.array[0]; NR_PUCCH_ResourceSet_t *pucchresset = pucch_Config->resourceSetToAddModList->list.array[1]; // set with formats >1 int n = pucchresset->resourceList.list.count; + int res_index; int found = -1; - for (res_index = 0; res_index < n; res_index++) { if (*pucchresset->resourceList.list.array[res_index] == pucchcsires->pucch_Resource) { found = res_index; break; } } - AssertFatal(found != -1, "CSI resource not found among PUCCH resources\n"); + pucch->resource_indicator = found; csi_bits = nr_get_csi_payload(mac, pucch, csi_measconfig); } - } else + } + else AssertFatal(1==0,"Only periodic CSI reporting is currently implemented\n"); } } @@ -2385,21 +2381,20 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac, uint8_t nr_get_csi_payload(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch, NR_CSI_MeasConfig_t *csi_MeasConfig) { + int n_csi_bits = 0; + AssertFatal(csi_MeasConfig->csi_ReportConfigToAddModList->list.count>0,"No CSI Report configuration available\n"); - for (int csi_report_id=0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++) { + for (int csi_report_id=0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){ struct NR_CSI_ReportConfig *csi_reportconfig = csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id]; NR_CSI_ResourceConfigId_t csi_ResourceConfigId = csi_reportconfig->resourcesForChannelMeasurement; - switch(csi_reportconfig->reportQuantity.present) { case NR_CSI_ReportConfig__reportQuantity_PR_none: break; - case NR_CSI_ReportConfig__reportQuantity_PR_ssb_Index_RSRP: n_csi_bits += get_ssb_rsrp_payload(mac,pucch,csi_reportconfig,csi_ResourceConfigId,csi_MeasConfig); break; - case NR_CSI_ReportConfig__reportQuantity_PR_cri_RSRP: case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_PMI_CQI: case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_i1: @@ -2407,12 +2402,10 @@ uint8_t nr_get_csi_payload(NR_UE_MAC_INST_t *mac, case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_CQI: case NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_LI_PMI_CQI: AssertFatal(1==0,"Measurement report based on CSI-RS not availalble\n"); - default: AssertFatal(1==0,"Invalid CSI report quantity type %d\n",csi_reportconfig->reportQuantity.present); } } - return (n_csi_bits); } @@ -2422,6 +2415,7 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, struct NR_CSI_ReportConfig *csi_reportconfig, NR_CSI_ResourceConfigId_t csi_ResourceConfigId, NR_CSI_MeasConfig_t *csi_MeasConfig) { + int nb_ssb = 0; // nb of ssb in the resource int nb_meas = 0; // nb of ssb to report measurements on int bits = 0; @@ -2429,8 +2423,8 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, for (int csi_resourceidx = 0; csi_resourceidx < csi_MeasConfig->csi_ResourceConfigToAddModList->list.count; csi_resourceidx++) { struct NR_CSI_ResourceConfig *csi_resourceconfig = csi_MeasConfig->csi_ResourceConfigToAddModList->list.array[csi_resourceidx]; - if (csi_resourceconfig->csi_ResourceConfigId == csi_ResourceConfigId) { + if (csi_reportconfig->groupBasedBeamReporting.present == NR_CSI_ReportConfig__groupBasedBeamReporting_PR_disabled) { if (csi_reportconfig->groupBasedBeamReporting.choice.disabled->nrofReportedRS != NULL) nb_meas = *(csi_reportconfig->groupBasedBeamReporting.choice.disabled->nrofReportedRS)+1; @@ -2441,7 +2435,8 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, for (int csi_ssb_idx = 0; csi_ssb_idx < csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.count; csi_ssb_idx++) { if (csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.array[csi_ssb_idx]->csi_SSB_ResourceSetId == - *(csi_resourceconfig->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->csi_SSB_ResourceSetList->list.array[0])) { + *(csi_resourceconfig->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->csi_SSB_ResourceSetList->list.array[0])){ + ///only one SSB resource set from spec 38.331 IE CSI-ResourceConfig nb_ssb = csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.array[csi_ssb_idx]->csi_SSB_ResourceList.list.count; break; @@ -2456,9 +2451,11 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, LOG_E(MAC, "In current implementation only the SSB of synchronization is measured at PHY. This works only for a single SSB scenario\n"); int ssb_rsrp[2][nb_meas]; // the array contains index and RSRP of each SSB to be reported (nb_meas highest RSRPs) + //TODO replace the following 2 lines with a function to order the nb_meas highest SSB RSRPs ssb_rsrp[0][0] = mac->mib_ssb; ssb_rsrp[1][0] = mac->ssb_rsrp_dBm; + uint8_t ssbi; if (ssbri_bits > 0) { @@ -2474,21 +2471,20 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, bits += 7; // 7 bits for highest RSRP // from the second SSB, differential report - for (int i=1; icsi_part1_payload = temp_payload; return bits; } @@ -2498,11 +2494,10 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac, // according to Table 10.1.6.1-1 in 38.133 uint8_t get_rsrp_index(int rsrp) { - int index = rsrp + 157; + int index = rsrp + 157; if (rsrp>-44) index = 113; - if (rsrp<-140) index = 16; @@ -2513,46 +2508,47 @@ uint8_t get_rsrp_index(int rsrp) { // returns index from differential RSRP // according to Table 10.1.6.1-2 in 38.133 uint8_t get_rsrp_diff_index(int best_rsrp,int current_rsrp) { - int diff = best_rsrp-current_rsrp; + int diff = best_rsrp-current_rsrp; if (diff>30) return 15; else return (diff>>1); + } -void nr_ue_send_sdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id) { +void nr_ue_send_sdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id){ + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_SDU, VCD_FUNCTION_IN); + LOG_D(MAC, "In %s [%d.%d] Handling DLSCH PDU...\n", __FUNCTION__, dl_info->frame, dl_info->slot); // Processing MAC PDU // it parses MAC CEs subheaders, MAC CEs, SDU subheaderds and SDUs - switch (dl_info->rx_ind->rx_indication_body[pdu_id].pdu_type) { + switch (dl_info->rx_ind->rx_indication_body[pdu_id].pdu_type){ case FAPI_NR_RX_PDU_TYPE_DLSCH: - nr_ue_process_mac_pdu(dl_info, ul_time_alignment, pdu_id); - break; - + nr_ue_process_mac_pdu(dl_info, ul_time_alignment, pdu_id); + break; case FAPI_NR_RX_PDU_TYPE_RAR: - nr_ue_process_rar(dl_info, ul_time_alignment, pdu_id); - break; - + nr_ue_process_rar(dl_info, ul_time_alignment, pdu_id); + break; default: - break; + break; } VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_SDU, VCD_FUNCTION_OUT); + } // N_RB configuration according to 7.3.1.0 (DCI size alignment) of TS 38.212 -int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type) { - int N_RB = 0, start_RB; +int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){ + int N_RB = 0, start_RB; switch(rnti_type) { case NR_RNTI_RA: case NR_RNTI_TC: case NR_RNTI_P: { NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id; - if (mac->DLbwp[dl_bwp_id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero) { uint8_t coreset_id = 0; // assuming controlResourceSetId is 0 for controlResourceSetZero NR_ControlResourceSet_t *coreset = mac->coreset[dl_bwp_id-1][coreset_id]; @@ -2560,20 +2556,17 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type) { } else { N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); } - break; } - case NR_RNTI_SI: N_RB = mac->type0_PDCCH_CSS_config.num_rbs; break; - case NR_RNTI_C: N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); break; } - return N_RB; + } uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, @@ -2582,12 +2575,14 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, uint16_t rnti, uint64_t *dci_pdu, dci_pdu_rel15_t *dci_pdu_rel15) { + int N_RB = 0; int pos = 0; int fsize = 0; - int rnti_type = get_rnti_type(mac, rnti); - int N_RB_UL = 0; + int rnti_type = get_rnti_type(mac, rnti); + + int N_RB_UL = 0; if(mac->scc_SIB) { N_RB_UL = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); } else if(mac->ULbwp[0]) { @@ -2597,615 +2592,666 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, } LOG_D(MAC,"nr_extract_dci_info : dci_pdu %lx, size %d\n",*dci_pdu,dci_size); - switch(dci_format) { - case NR_DL_DCI_FORMAT_1_0: - switch(rnti_type) { - case NR_RNTI_RA: - if(mac->scc_SIB) { - N_RB = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - } else { - N_RB = get_n_rb(mac, rnti_type); - } - // Freq domain assignment - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - pos=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = *dci_pdu>>(dci_size-pos)&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,N_RB,dci_size-pos,*dci_pdu); -#endif - // Time domain assignment - pos+=4; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu >> (dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); -#endif - // VRB to PRB mapping - pos++; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,dci_size-pos,*dci_pdu); -#endif - // MCS - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); -#endif - // TB scaling - pos+=2; - dci_pdu_rel15->tb_scaling = (*dci_pdu>>(dci_size-pos))&0x3; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu); -#endif - break; - - case NR_RNTI_C: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; - - //switch to DCI_0_0 - if (dci_pdu_rel15->format_indicator == 0) { - dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; - return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); - } - -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu); -#endif - - // check BWP id - if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - - // Freq domain assignment (275rb >> fsize = 16) - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); -#endif - uint16_t is_ra = 1; - - for (int i=0; ifrequency_domain_assignment.val>>i)&1)) { - is_ra = 0; - break; - } - - if (is_ra) { //fsize are all 1 38.212 p86 - // ra_preamble_index 6 bits - pos+=6; - dci_pdu_rel15->ra_preamble_index = (*dci_pdu>>(dci_size-pos))&0x3f; - // UL/SUL indicator 1 bit - pos++; - dci_pdu_rel15->ul_sul_indicator.val = (*dci_pdu>>(dci_size-pos))&1; - // SS/PBCH index 6 bits - pos+=6; - dci_pdu_rel15->ss_pbch_index = (*dci_pdu>>(dci_size-pos))&0x3f; - // prach_mask_index 4 bits - pos+=4; - dci_pdu_rel15->prach_mask_index = (*dci_pdu>>(dci_size-pos))&0xf; - } //end if - else { - // Time domain assignment 4bit - pos+=4; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,4,dci_size-pos,*dci_pdu); -#endif - // VRB to PRB mapping 1bit - pos++; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,1,dci_size-pos,*dci_pdu); -#endif - // MCS 5bit //bit over 32, so dci_pdu ++ - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu); -#endif - // New data indicator 1bit - pos++; - dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); -#endif - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); -#endif - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); -#endif - // Downlink assignment index 2bit - pos+=2; - dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,2,dci_size-pos,*dci_pdu); -#endif - // TPC command for scheduled PUCCH 2bit - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); -#endif - // PUCCH resource indicator 3bit - pos+=3; - dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x7; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu); -#endif - // PDSCH-to-HARQ_feedback timing indicator 3bit - pos+=3; - dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&0x7; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,3,dci_size-pos,*dci_pdu); -#endif - } //end else - - break; - - case NR_RNTI_P: - /* - // Short Messages Indicator  E2 bits - for (int i=0; i<2; i++) - dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_size-pos++); - // Short Messages  E8 bits - for (int i=0; i<8; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages>>(7-i))&1)<<(dci_size-pos++); - // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++); - // Time domain assignment 4 bit - for (int i=0; i<4; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++); - // VRB to PRB mapping 1 bit - *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); - // MCS 5 bit - for (int i=0; i<5; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); - - // TB scaling 2 bit - for (int i=0; i<2; i++) - *dci_pdu |= (((uint64_t)dci_pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_size-pos++); - */ - break; - - case NR_RNTI_SI: - N_RB = mac->type0_PDCCH_CSS_config.num_rbs; - // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; - // VRB to PRB mapping 1 bit - pos++; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; - // MCS 5bit //bit over 32, so dci_pdu ++ - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; - // Redundancy version 2 bit - pos+=2; - dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; - // System information indicator 1 bit - pos++; - dci_pdu_rel15->system_info_indicator = (*dci_pdu>>(dci_size-pos))&0x1; - LOG_D(MAC,"N_RB = %i\n", N_RB); - LOG_D(MAC,"dci_size = %i\n", dci_size); - LOG_D(MAC,"fsize = %i\n", fsize); - LOG_D(MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); - LOG_D(MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); - LOG_D(MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); - LOG_D(MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); - LOG_D(MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(MAC,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); - break; - - case NR_RNTI_TC: - - // check BWP id - if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - - // indicating a DL DCI format 1bit - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; - - //switch to DCI_0_0 - if (dci_pdu_rel15->format_indicator == 0) { - dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; - return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); - } - - if (dci_pdu_rel15->format_indicator == 0) - return 1; // discard dci, format indicator not corresponding to dci_format - - // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; - // VRB to PRB mapping - 1 bit - pos++; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; - // MCS 5bit //bit over 32, so dci_pdu ++ - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; - // New data indicator - 1 bit - pos++; - dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; - // Redundancy version - 2 bits - pos+=2; - dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; - // HARQ process number - 4 bits - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; - // Downlink assignment index - 2 bits - pos+=2; - dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; - // TPC command for scheduled PUCCH - 2 bits - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; - // PUCCH resource indicator - 3 bits - pos+=3; - dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&7; - // PDSCH-to-HARQ_feedback timing indicator - 3 bits - pos+=3; - dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7; - LOG_D(NR_MAC,"N_RB = %i\n", N_RB); - LOG_D(NR_MAC,"dci_size = %i\n", dci_size); - LOG_D(NR_MAC,"fsize = %i\n", fsize); - LOG_D(NR_MAC,"dci_pdu_rel15->format_indicator = %i\n", dci_pdu_rel15->format_indicator); - LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); - LOG_D(NR_MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); - LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); - LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); - LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); - LOG_D(NR_MAC,"dci_pdu_rel15->dai[0].val = %i\n", dci_pdu_rel15->dai[0].val); - LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); - LOG_D(NR_MAC,"dci_pdu_rel15->pucch_resource_indicator = %i\n", dci_pdu_rel15->pucch_resource_indicator); - LOG_D(NR_MAC,"dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = %i\n", dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val); - break; + case NR_DL_DCI_FORMAT_1_0: + switch(rnti_type) { + case NR_RNTI_RA: + if(mac->scc_SIB) { + N_RB = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + } else { + N_RB = get_n_rb(mac, rnti_type); } - + // Freq domain assignment + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + pos=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = *dci_pdu>>(dci_size-pos)&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,N_RB,dci_size-pos,*dci_pdu); +#endif + // Time domain assignment + pos+=4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu >> (dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); +#endif + // VRB to PRB mapping + + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,dci_size-pos,*dci_pdu); +#endif + // MCS + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); +#endif + // TB scaling + pos+=2; + dci_pdu_rel15->tb_scaling = (*dci_pdu>>(dci_size-pos))&0x3; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu); +#endif break; - case NR_UL_DCI_FORMAT_0_0: - if (mac->ULbwp[0]) N_RB_UL=NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - else N_RB_UL=NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + case NR_RNTI_C: - switch(rnti_type) { - case NR_RNTI_C: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); -#endif + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; - if (dci_pdu_rel15->format_indicator == 1) - return 1; // discard dci, format indicator not corresponding to dci_format - - fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); -#endif - // Time domain assignment 4bit - pos+=4; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); -#endif - // Frequency hopping flag  E1 bit - pos++; - dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"frequency_hopping %d (1 bit)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_hopping_flag.val,dci_size-pos,*dci_pdu); -#endif - // MCS 5 bit - pos+=5; - dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); -#endif - // New data indicator 1bit - pos++; - dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); -#endif - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); -#endif - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); -#endif - // TPC command for scheduled PUSCH  E2 bits - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); -#endif - // UL/SUL indicator  E1 bit - /* commented for now (RK): need to get this from BWP descriptor - if (cfg->pucch_config.pucch_GroupHopping.value) - dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); - */ - break; - - case NR_RNTI_TC: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); -#endif - - if (dci_pdu_rel15->format_indicator == 1) - return 1; // discard dci, format indicator not corresponding to dci_format - - fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); -#endif - // Time domain assignment 4bit - pos+=4; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); -#endif - // Frequency hopping flag  E1 bit - pos++; - dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"frequency_hopping %d (1 bit)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_hopping_flag.val,dci_size-pos,*dci_pdu); -#endif - // MCS 5 bit - pos+=5; - dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); -#endif - // New data indicator 1bit - pos++; - dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); -#endif - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); -#endif - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); -#endif - // TPC command for scheduled PUSCH  E2 bits - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; -#ifdef DEBUG_EXTRACT_DCI - LOG_I(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); -#endif - break; + //switch to DCI_0_0 + if (dci_pdu_rel15->format_indicator == 0) { + dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; + return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); } +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu); +#endif + // check BWP id + if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + + // Freq domain assignment (275rb >> fsize = 16) + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); +#endif + + uint16_t is_ra = 1; + for (int i=0; ifrequency_domain_assignment.val>>i)&1)) { + is_ra = 0; + break; + } + if (is_ra) //fsize are all 1 38.212 p86 + { + // ra_preamble_index 6 bits + pos+=6; + dci_pdu_rel15->ra_preamble_index = (*dci_pdu>>(dci_size-pos))&0x3f; + + // UL/SUL indicator 1 bit + pos++; + dci_pdu_rel15->ul_sul_indicator.val = (*dci_pdu>>(dci_size-pos))&1; + + // SS/PBCH index 6 bits + pos+=6; + dci_pdu_rel15->ss_pbch_index = (*dci_pdu>>(dci_size-pos))&0x3f; + + // prach_mask_index 4 bits + pos+=4; + dci_pdu_rel15->prach_mask_index = (*dci_pdu>>(dci_size-pos))&0xf; + + } //end if + else { + + // Time domain assignment 4bit + + pos+=4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,4,dci_size-pos,*dci_pdu); +#endif + + // VRB to PRB mapping 1bit + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,1,dci_size-pos,*dci_pdu); +#endif + + // MCS 5bit //bit over 32, so dci_pdu ++ + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu); +#endif + + // New data indicator 1bit + pos++; + dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); +#endif + + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); +#endif + + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); +#endif + + // Downlink assignment index 2bit + pos+=2; + dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,2,dci_size-pos,*dci_pdu); +#endif + + // TPC command for scheduled PUCCH 2bit + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); +#endif + + // PUCCH resource indicator 3bit + pos+=3; + dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x7; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu); +#endif + + // PDSCH-to-HARQ_feedback timing indicator 3bit + pos+=3; + dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&0x7; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,3,dci_size-pos,*dci_pdu); +#endif + + } //end else break; - case NR_DL_DCI_FORMAT_1_1: - switch(rnti_type) { - case NR_RNTI_C: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + case NR_RNTI_P: + /* + // Short Messages Indicator  E2 bits + for (int i=0; i<2; i++) + dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_size-pos++); + // Short Messages  E8 bits + for (int i=0; i<8; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages>>(7-i))&1)<<(dci_size-pos++); + // Freq domain assignment 0-16 bit + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + for (int i=0; ifrequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++); + // Time domain assignment 4 bit + for (int i=0; i<4; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++); + // VRB to PRB mapping 1 bit + *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); + // MCS 5 bit + for (int i=0; i<5; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); + + // TB scaling 2 bit + for (int i=0; i<2; i++) + *dci_pdu |= (((uint64_t)dci_pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_size-pos++); + */ + + break; + + case NR_RNTI_SI: + N_RB = mac->type0_PDCCH_CSS_config.num_rbs; + // Freq domain assignment 0-16 bit + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<format_indicator == 0) - return 1; // discard dci, format indicator not corresponding to dci_format + // Time domain assignment 4 bit + pos+=4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; - // Carrier indicator - pos+=dci_pdu_rel15->carrier_indicator.nbits; - dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<carrier_indicator.nbits)-1); - // BWP Indicator - pos+=dci_pdu_rel15->bwp_indicator.nbits; - dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.nbits)-1); - // Frequency domain resource assignment - pos+=dci_pdu_rel15->frequency_domain_assignment.nbits; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<frequency_domain_assignment.nbits)-1); - // Time domain resource assignment - pos+=dci_pdu_rel15->time_domain_assignment.nbits; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits)-1); - // VRB-to-PRB mapping - pos+=dci_pdu_rel15->vrb_to_prb_mapping.nbits; - dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&((1<vrb_to_prb_mapping.nbits)-1); - // PRB bundling size indicator - pos+=dci_pdu_rel15->prb_bundling_size_indicator.nbits; - dci_pdu_rel15->prb_bundling_size_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<prb_bundling_size_indicator.nbits)-1); - // Rate matching indicator - pos+=dci_pdu_rel15->rate_matching_indicator.nbits; - dci_pdu_rel15->rate_matching_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<rate_matching_indicator.nbits)-1); - // ZP CSI-RS trigger - pos+=dci_pdu_rel15->zp_csi_rs_trigger.nbits; - dci_pdu_rel15->zp_csi_rs_trigger.val = (*dci_pdu>>(dci_size-pos))&((1<zp_csi_rs_trigger.nbits)-1); - //TB1 - // MCS 5bit - pos+=5; - dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; - // New data indicator 1bit - pos+=1; - dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&0x1; - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3; - //TB2 - // MCS 5bit - pos+=dci_pdu_rel15->mcs2.nbits; - dci_pdu_rel15->mcs2.val = (*dci_pdu>>(dci_size-pos))&((1<mcs2.nbits)-1); - // New data indicator 1bit - pos+=dci_pdu_rel15->ndi2.nbits; - dci_pdu_rel15->ndi2.val = (*dci_pdu>>(dci_size-pos))&((1<ndi2.nbits)-1); - // Redundancy version 2bit - pos+=dci_pdu_rel15->rv2.nbits; - dci_pdu_rel15->rv2.val = (*dci_pdu>>(dci_size-pos))&((1<rv2.nbits)-1); - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; - // Downlink assignment index - pos+=dci_pdu_rel15->dai[0].nbits; - dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<dai[0].nbits)-1); - // TPC command for scheduled PUCCH 2bit - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&0x3; - // PUCCH resource indicator 3bit - pos+=3; - dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x3; - // PDSCH-to-HARQ_feedback timing indicator - pos+=dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits; - dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<pdsch_to_harq_feedback_timing_indicator.nbits)-1); - // Antenna ports - pos+=dci_pdu_rel15->antenna_ports.nbits; - dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<antenna_ports.nbits)-1); - // TCI - pos+=dci_pdu_rel15->transmission_configuration_indication.nbits; - dci_pdu_rel15->transmission_configuration_indication.val = (*dci_pdu>>(dci_size-pos))&((1<transmission_configuration_indication.nbits)-1); - // SRS request - pos+=dci_pdu_rel15->srs_request.nbits; - dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<srs_request.nbits)-1); - // CBG transmission information - pos+=dci_pdu_rel15->cbgti.nbits; - dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<cbgti.nbits)-1); - // CBG flushing out information - pos+=dci_pdu_rel15->cbgfi.nbits; - dci_pdu_rel15->cbgfi.val = (*dci_pdu>>(dci_size-pos))&((1<cbgfi.nbits)-1); - // DMRS sequence init - pos+=1; - dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&0x1; - break; - } + // VRB to PRB mapping 1 bit + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1; + + // MCS 5bit //bit over 32, so dci_pdu ++ + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + + // Redundancy version 2 bit + pos+=2; + dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; + + // System information indicator 1 bit + pos++; + dci_pdu_rel15->system_info_indicator = (*dci_pdu>>(dci_size-pos))&0x1; + + LOG_D(MAC,"N_RB = %i\n", N_RB); + LOG_D(MAC,"dci_size = %i\n", dci_size); + LOG_D(MAC,"fsize = %i\n", fsize); + LOG_D(MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(MAC,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); break; + + case NR_RNTI_TC: - case NR_UL_DCI_FORMAT_0_1: - switch(rnti_type) { - case NR_RNTI_C: - //Identifier for DCI formats - pos++; - dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + // check BWP id + if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - if (dci_pdu_rel15->format_indicator == 1) - return 1; // discard dci, format indicator not corresponding to dci_format + // indicating a DL DCI format 1bit + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; - // Carrier indicator - pos+=dci_pdu_rel15->carrier_indicator.nbits; - dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<carrier_indicator.nbits)-1); - // UL/SUL Indicator - pos+=dci_pdu_rel15->ul_sul_indicator.nbits; - dci_pdu_rel15->ul_sul_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<ul_sul_indicator.nbits)-1); - // BWP Indicator - pos+=dci_pdu_rel15->bwp_indicator.nbits; - dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.nbits)-1); - // Freq domain assignment max 16 bit - fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); - pos+=fsize; - dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0x3; - // Not supported yet - skip for now - // Frequency hopping flag – 1 bit - //pos++; - //dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; - // MCS 5 bit - pos+=5; - dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; - // New data indicator 1bit - pos++; - dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; - // Redundancy version 2bit - pos+=2; - dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; - // HARQ process number 4bit - pos+=4; - dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; - // 1st Downlink assignment index - pos+=dci_pdu_rel15->dai[0].nbits; - dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<dai[0].nbits)-1); - // 2nd Downlink assignment index - pos+=dci_pdu_rel15->dai[1].nbits; - dci_pdu_rel15->dai[1].val = (*dci_pdu>>(dci_size-pos))&((1<dai[1].nbits)-1); - // TPC command for scheduled PUSCH – 2 bits - pos+=2; - dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; - // SRS resource indicator - pos+=dci_pdu_rel15->srs_resource_indicator.nbits; - dci_pdu_rel15->srs_resource_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<srs_resource_indicator.nbits)-1); - // Precoding info and n. of layers - pos+=dci_pdu_rel15->precoding_information.nbits; - dci_pdu_rel15->precoding_information.val = (*dci_pdu>>(dci_size-pos))&((1<precoding_information.nbits)-1); - // Antenna ports - pos+=dci_pdu_rel15->antenna_ports.nbits; - dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<antenna_ports.nbits)-1); - // SRS request - pos+=dci_pdu_rel15->srs_request.nbits; - dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<srs_request.nbits)-1); - // CSI request - pos+=dci_pdu_rel15->csi_request.nbits; - dci_pdu_rel15->csi_request.val = (*dci_pdu>>(dci_size-pos))&((1<csi_request.nbits)-1); - // CBG transmission information - pos+=dci_pdu_rel15->cbgti.nbits; - dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<cbgti.nbits)-1); - // PTRS DMRS association - pos+=dci_pdu_rel15->ptrs_dmrs_association.nbits; - dci_pdu_rel15->ptrs_dmrs_association.val = (*dci_pdu>>(dci_size-pos))&((1<ptrs_dmrs_association.nbits)-1); - // Beta offset indicator - pos+=dci_pdu_rel15->beta_offset_indicator.nbits; - dci_pdu_rel15->beta_offset_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<beta_offset_indicator.nbits)-1); - // DMRS sequence initialization - pos+=dci_pdu_rel15->dmrs_sequence_initialization.nbits; - dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&((1<dmrs_sequence_initialization.nbits)-1); - // UL-SCH indicator - pos+=1; - dci_pdu_rel15->ulsch_indicator = (*dci_pdu>>(dci_size-pos))&0x1; - // UL/SUL indicator – 1 bit - /* commented for now (RK): need to get this from BWP descriptor - if (cfg->pucch_config.pucch_GroupHopping.value) - dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); - */ - break; + //switch to DCI_0_0 + if (dci_pdu_rel15->format_indicator == 0) { + dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; + return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); } - break; - } + if (dci_pdu_rel15->format_indicator == 0) + return 1; // discard dci, format indicator not corresponding to dci_format - return 0; + // Freq domain assignment 0-16 bit + fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; + + // VRB to PRB mapping - 1 bit + pos++; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; + + // MCS 5bit //bit over 32, so dci_pdu ++ + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + + // New data indicator - 1 bit + pos++; + dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; + + // Redundancy version - 2 bits + pos+=2; + dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; + + // HARQ process number - 4 bits + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; + + // Downlink assignment index - 2 bits + pos+=2; + dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; + + // TPC command for scheduled PUCCH - 2 bits + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; + + // PUCCH resource indicator - 3 bits + pos+=3; + dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&7; + + // PDSCH-to-HARQ_feedback timing indicator - 3 bits + pos+=3; + dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7; + + LOG_D(NR_MAC,"N_RB = %i\n", N_RB); + LOG_D(NR_MAC,"dci_size = %i\n", dci_size); + LOG_D(NR_MAC,"fsize = %i\n", fsize); + LOG_D(NR_MAC,"dci_pdu_rel15->format_indicator = %i\n", dci_pdu_rel15->format_indicator); + LOG_D(NR_MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val); + LOG_D(NR_MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val); + LOG_D(NR_MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val); + LOG_D(NR_MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs); + LOG_D(NR_MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); + LOG_D(NR_MAC,"dci_pdu_rel15->harq_pid = %i\n", dci_pdu_rel15->harq_pid); + LOG_D(NR_MAC,"dci_pdu_rel15->dai[0].val = %i\n", dci_pdu_rel15->dai[0].val); + LOG_D(NR_MAC,"dci_pdu_rel15->tpc = %i\n", dci_pdu_rel15->tpc); + LOG_D(NR_MAC,"dci_pdu_rel15->pucch_resource_indicator = %i\n", dci_pdu_rel15->pucch_resource_indicator); + LOG_D(NR_MAC,"dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = %i\n", dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val); + + break; + } + break; + + case NR_UL_DCI_FORMAT_0_0: + if (mac->ULbwp[0]) N_RB_UL=NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + else N_RB_UL=NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + + switch(rnti_type) + { + case NR_RNTI_C: + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); +#endif + if (dci_pdu_rel15->format_indicator == 1) + return 1; // discard dci, format indicator not corresponding to dci_format + fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); +#endif + // Time domain assignment 4bit + pos+=4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); +#endif + // Frequency hopping flag  E1 bit + pos++; + dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"frequency_hopping %d (1 bit)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_hopping_flag.val,dci_size-pos,*dci_pdu); +#endif + // MCS 5 bit + pos+=5; + dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); +#endif + // New data indicator 1bit + pos++; + dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); +#endif + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); +#endif + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); +#endif + // TPC command for scheduled PUSCH  E2 bits + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); +#endif + // UL/SUL indicator  E1 bit + /* commented for now (RK): need to get this from BWP descriptor + if (cfg->pucch_config.pucch_GroupHopping.value) + dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); + */ + break; + + case NR_RNTI_TC: + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu); +#endif + if (dci_pdu_rel15->format_indicator == 1) + return 1; // discard dci, format indicator not corresponding to dci_format + fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu); +#endif + // Time domain assignment 4bit + pos+=4; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu); +#endif + // Frequency hopping flag  E1 bit + pos++; + dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"frequency_hopping %d (1 bit)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_hopping_flag.val,dci_size-pos,*dci_pdu); +#endif + // MCS 5 bit + pos+=5; + dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu); +#endif + // New data indicator 1bit + pos++; + dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu); +#endif + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu); +#endif + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu); +#endif + // TPC command for scheduled PUSCH  E2 bits + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; +#ifdef DEBUG_EXTRACT_DCI + LOG_I(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu); +#endif + break; + + } + break; + + case NR_DL_DCI_FORMAT_1_1: + switch(rnti_type) + { + case NR_RNTI_C: + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + if (dci_pdu_rel15->format_indicator == 0) + return 1; // discard dci, format indicator not corresponding to dci_format + // Carrier indicator + pos+=dci_pdu_rel15->carrier_indicator.nbits; + dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<carrier_indicator.nbits)-1); + // BWP Indicator + pos+=dci_pdu_rel15->bwp_indicator.nbits; + dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.nbits)-1); + // Frequency domain resource assignment + pos+=dci_pdu_rel15->frequency_domain_assignment.nbits; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<frequency_domain_assignment.nbits)-1); + // Time domain resource assignment + pos+=dci_pdu_rel15->time_domain_assignment.nbits; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits)-1); + // VRB-to-PRB mapping + pos+=dci_pdu_rel15->vrb_to_prb_mapping.nbits; + dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&((1<vrb_to_prb_mapping.nbits)-1); + // PRB bundling size indicator + pos+=dci_pdu_rel15->prb_bundling_size_indicator.nbits; + dci_pdu_rel15->prb_bundling_size_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<prb_bundling_size_indicator.nbits)-1); + // Rate matching indicator + pos+=dci_pdu_rel15->rate_matching_indicator.nbits; + dci_pdu_rel15->rate_matching_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<rate_matching_indicator.nbits)-1); + // ZP CSI-RS trigger + pos+=dci_pdu_rel15->zp_csi_rs_trigger.nbits; + dci_pdu_rel15->zp_csi_rs_trigger.val = (*dci_pdu>>(dci_size-pos))&((1<zp_csi_rs_trigger.nbits)-1); + //TB1 + // MCS 5bit + pos+=5; + dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; + // New data indicator 1bit + pos+=1; + dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&0x1; + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3; + //TB2 + // MCS 5bit + pos+=dci_pdu_rel15->mcs2.nbits; + dci_pdu_rel15->mcs2.val = (*dci_pdu>>(dci_size-pos))&((1<mcs2.nbits)-1); + // New data indicator 1bit + pos+=dci_pdu_rel15->ndi2.nbits; + dci_pdu_rel15->ndi2.val = (*dci_pdu>>(dci_size-pos))&((1<ndi2.nbits)-1); + // Redundancy version 2bit + pos+=dci_pdu_rel15->rv2.nbits; + dci_pdu_rel15->rv2.val = (*dci_pdu>>(dci_size-pos))&((1<rv2.nbits)-1); + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; + // Downlink assignment index + pos+=dci_pdu_rel15->dai[0].nbits; + dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<dai[0].nbits)-1); + // TPC command for scheduled PUCCH 2bit + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&0x3; + // PUCCH resource indicator 3bit + pos+=3; + dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x3; + // PDSCH-to-HARQ_feedback timing indicator + pos+=dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits; + dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<pdsch_to_harq_feedback_timing_indicator.nbits)-1); + // Antenna ports + pos+=dci_pdu_rel15->antenna_ports.nbits; + dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<antenna_ports.nbits)-1); + // TCI + pos+=dci_pdu_rel15->transmission_configuration_indication.nbits; + dci_pdu_rel15->transmission_configuration_indication.val = (*dci_pdu>>(dci_size-pos))&((1<transmission_configuration_indication.nbits)-1); + // SRS request + pos+=dci_pdu_rel15->srs_request.nbits; + dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<srs_request.nbits)-1); + // CBG transmission information + pos+=dci_pdu_rel15->cbgti.nbits; + dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<cbgti.nbits)-1); + // CBG flushing out information + pos+=dci_pdu_rel15->cbgfi.nbits; + dci_pdu_rel15->cbgfi.val = (*dci_pdu>>(dci_size-pos))&((1<cbgfi.nbits)-1); + // DMRS sequence init + pos+=1; + dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&0x1; + break; + } + break; + + case NR_UL_DCI_FORMAT_0_1: + switch(rnti_type) + { + case NR_RNTI_C: + //Identifier for DCI formats + pos++; + dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; + if (dci_pdu_rel15->format_indicator == 1) + return 1; // discard dci, format indicator not corresponding to dci_format + // Carrier indicator + pos+=dci_pdu_rel15->carrier_indicator.nbits; + dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<carrier_indicator.nbits)-1); + + // UL/SUL Indicator + pos+=dci_pdu_rel15->ul_sul_indicator.nbits; + dci_pdu_rel15->ul_sul_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<ul_sul_indicator.nbits)-1); + + // BWP Indicator + pos+=dci_pdu_rel15->bwp_indicator.nbits; + dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.nbits)-1); + + // Freq domain assignment max 16 bit + fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); + pos+=fsize; + dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0x3; + + // Not supported yet - skip for now + // Frequency hopping flag – 1 bit + //pos++; + //dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; + + // MCS 5 bit + pos+=5; + dci_pdu_rel15->mcs= (*dci_pdu>>(dci_size-pos))&0x1f; + + // New data indicator 1bit + pos++; + dci_pdu_rel15->ndi= (*dci_pdu>>(dci_size-pos))&1; + + // Redundancy version 2bit + pos+=2; + dci_pdu_rel15->rv= (*dci_pdu>>(dci_size-pos))&3; + + // HARQ process number 4bit + pos+=4; + dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; + + // 1st Downlink assignment index + pos+=dci_pdu_rel15->dai[0].nbits; + dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<dai[0].nbits)-1); + + // 2nd Downlink assignment index + pos+=dci_pdu_rel15->dai[1].nbits; + dci_pdu_rel15->dai[1].val = (*dci_pdu>>(dci_size-pos))&((1<dai[1].nbits)-1); + + // TPC command for scheduled PUSCH – 2 bits + pos+=2; + dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; + + // SRS resource indicator + pos+=dci_pdu_rel15->srs_resource_indicator.nbits; + dci_pdu_rel15->srs_resource_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<srs_resource_indicator.nbits)-1); + + // Precoding info and n. of layers + pos+=dci_pdu_rel15->precoding_information.nbits; + dci_pdu_rel15->precoding_information.val = (*dci_pdu>>(dci_size-pos))&((1<precoding_information.nbits)-1); + + // Antenna ports + pos+=dci_pdu_rel15->antenna_ports.nbits; + dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<antenna_ports.nbits)-1); + + // SRS request + pos+=dci_pdu_rel15->srs_request.nbits; + dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<srs_request.nbits)-1); + + // CSI request + pos+=dci_pdu_rel15->csi_request.nbits; + dci_pdu_rel15->csi_request.val = (*dci_pdu>>(dci_size-pos))&((1<csi_request.nbits)-1); + + // CBG transmission information + pos+=dci_pdu_rel15->cbgti.nbits; + dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<cbgti.nbits)-1); + + // PTRS DMRS association + pos+=dci_pdu_rel15->ptrs_dmrs_association.nbits; + dci_pdu_rel15->ptrs_dmrs_association.val = (*dci_pdu>>(dci_size-pos))&((1<ptrs_dmrs_association.nbits)-1); + + // Beta offset indicator + pos+=dci_pdu_rel15->beta_offset_indicator.nbits; + dci_pdu_rel15->beta_offset_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<beta_offset_indicator.nbits)-1); + + // DMRS sequence initialization + pos+=dci_pdu_rel15->dmrs_sequence_initialization.nbits; + dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&((1<dmrs_sequence_initialization.nbits)-1); + + // UL-SCH indicator + pos+=1; + dci_pdu_rel15->ulsch_indicator = (*dci_pdu>>(dci_size-pos))&0x1; + + // UL/SUL indicator – 1 bit + /* commented for now (RK): need to get this from BWP descriptor + if (cfg->pucch_config.pucch_GroupHopping.value) + dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); + */ + break; + } + break; + } + + return 0; } /////////////////////////////////// @@ -3240,7 +3286,8 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, //////////////////////////////// void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, - int pdu_id) { + int pdu_id){ + uint8_t rx_lcid; uint16_t mac_ce_len; uint16_t mac_subheader_len; @@ -3256,26 +3303,25 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); RA_config_t *ra = &mac->ra; - if (!pduP) { + if (!pduP){ return; } LOG_D(MAC, "In %s [%d.%d]: processing PDU %d (with length %d) of %d total number of PDUs...\n", __FUNCTION__, frameP, slot, pdu_id, pdu_len, dl_info->rx_ind->number_pdus); - while (!done && pdu_len > 0) { + while (!done && pdu_len > 0){ mac_ce_len = 0x0000; mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct mac_sdu_len = 0x0000; rx_lcid = ((NR_MAC_SUBHEADER_FIXED *)pduP)->LCID; - LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", rx_lcid, pdu_len); - switch(rx_lcid) { + LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", rx_lcid, pdu_len); + switch(rx_lcid){ // MAC CE case DL_SCH_LCID_CCCH: - // MSG4 RRC Setup 38.331 // variable length - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ mac_sdu_len = ((uint16_t)(((NR_MAC_SUBHEADER_LONG *) pduP)->L1 & 0x7f) << 8) | ((uint16_t)((NR_MAC_SUBHEADER_LONG *) pduP)->L2 & 0xff); mac_subheader_len = 3; @@ -3286,13 +3332,11 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, // Check if it is a valid CCCH message, we get all 00's messages very often int i = 0; - for(i=0; i<(mac_subheader_len+mac_sdu_len); i++) { if(pduP[i] != 0) { break; } } - if (i == (mac_subheader_len+mac_sdu_len)) { LOG_D(NR_MAC, "%s() Invalid CCCH message!, pdu_len: %d\n", __func__, pdu_len); done = 1; @@ -3301,140 +3345,118 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, if ( mac_sdu_len > 0 ) { LOG_D(NR_MAC,"DL_SCH_LCID_CCCH (e.g. RRCSetup) with payload len %d\n", mac_sdu_len); - for (int i = 0; i < mac_subheader_len; i++) { LOG_D(NR_MAC, "MAC header %d: 0x%x\n", i, pduP[i]); } - for (int i = 0; i < mac_sdu_len; i++) { LOG_D(NR_MAC, "%d: 0x%x\n", i, pduP[mac_subheader_len + i]); } - nr_mac_rrc_data_ind_ue(module_idP, CC_id, gNB_index, frameP, 0, mac->crnti, CCCH, pduP+mac_subheader_len, mac_sdu_len); } - break; - case DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH: + // 38.321 Ch6.1.3.14 // varialbe length mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; - - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; } - break; - case DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL: // 38.321 Ch6.1.3.13 // varialbe length mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; - - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; } - break; - case DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT: // 38.321 Ch6.1.3.12 // varialbe length mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; - - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; } - break; - case DL_SCH_LCID_SP_SRS_ACTIVATION: // 38.321 Ch6.1.3.17 // varialbe length mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; - - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; } - break; - case DL_SCH_LCID_RECOMMENDED_BITRATE: // 38.321 Ch6.1.3.20 mac_ce_len = 2; break; - case DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT: // 38.321 Ch6.1.3.19 mac_ce_len = 2; break; - case DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT: // 38.321 Ch6.1.3.18 mac_ce_len = 3; break; - case DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT: // 38.321 Ch6.1.3.16 mac_ce_len = 2; break; - case DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH: // 38.321 Ch6.1.3.15 mac_ce_len = 2; break; - case DL_SCH_LCID_DUPLICATION_ACT: // 38.321 Ch6.1.3.11 mac_ce_len = 1; break; - case DL_SCH_LCID_SCell_ACT_4_OCT: // 38.321 Ch6.1.3.10 mac_ce_len = 4; break; - case DL_SCH_LCID_SCell_ACT_1_OCT: // 38.321 Ch6.1.3.10 mac_ce_len = 1; break; - case DL_SCH_LCID_L_DRX: // 38.321 Ch6.1.3.6 // fixed length but not yet specify. mac_ce_len = 0; break; - case DL_SCH_LCID_DRX: // 38.321 Ch6.1.3.5 // fixed length but not yet specify. mac_ce_len = 0; break; - case DL_SCH_LCID_TA_COMMAND: // 38.321 Ch6.1.3.4 mac_ce_len = 1; + /*uint8_t ta_command = ((NR_MAC_CE_TA *)pduP)[1].TA_COMMAND; uint8_t tag_id = ((NR_MAC_CE_TA *)pduP)[1].TAGID;*/ + ul_time_alignment->apply_ta = 1; ul_time_alignment->ta_command = ((NR_MAC_CE_TA *)pduP)[1].TA_COMMAND; ul_time_alignment->tag_id = ((NR_MAC_CE_TA *)pduP)[1].TAGID; + /* #ifdef DEBUG_HEADER_PARSING LOG_D(MAC, "[UE] CE %d : UE Timing Advance : %d\n", i, pduP[1]); #endif */ - LOG_D(MAC, "[%d.%d] Received TA_COMMAND %u TAGID %u CC_id %d\n", frameP, slot, ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id); - break; + LOG_D(MAC, "[%d.%d] Received TA_COMMAND %u TAGID %u CC_id %d\n", frameP, slot, ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id); + + break; case DL_SCH_LCID_CON_RES_ID: // Clause 5.1.5 and 6.1.3.3 of 3GPP TS 38.321 version 16.2.1 Release 16 // MAC Header: 1 byte (R/R/LCID) @@ -3444,8 +3466,8 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, if(ra->ra_state == WAIT_CONTENTION_RESOLUTION) { LOG_I(MAC, "[UE %d][RAPROC] Frame %d : received contention resolution identity: 0x%02x%02x%02x%02x%02x%02x Terminating RA procedure\n", module_idP, frameP, pduP[1], pduP[2], pduP[3], pduP[4], pduP[5], pduP[6]); - bool ra_success = true; + bool ra_success = true; for(int i = 0; icont_res_id[i] != pduP[i+1]) { ra_success = false; @@ -3455,52 +3477,49 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, if ( (ra->RA_active == 1) && ra_success) { nr_ra_succeeded(module_idP, frameP, slot); - } else if (!ra_success) { + } else if (!ra_success){ // TODO: Handle failure of RA procedure @ MAC layer // nr_ra_failed(module_idP, CC_id, prach_resources, frameP, slot); // prach_resources is a PHY structure ra->ra_state = RA_UE_IDLE; ra->RA_active = 0; } } - break; - case DL_SCH_LCID_PADDING: done = 1; // end of MAC PDU, can ignore the rest. break; - - // MAC SDU + // MAC SDU case DL_SCH_LCID_DCCH: - - // check if LCID is valid at current time. - case DL_SCH_LCID_DCCH1: - - // check if LCID is valid at current time. - default: - // check if LCID is valid at current time. - if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F) { + case DL_SCH_LCID_DCCH1: + // check if LCID is valid at current time. + default: + // check if LCID is valid at current time. + if(((NR_MAC_SUBHEADER_SHORT *)pduP)->F){ //mac_sdu_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pduP)->L2)<<8; mac_subheader_len = 3; mac_sdu_len = ((uint16_t)(((NR_MAC_SUBHEADER_LONG *) pduP)->L1 & 0x7f) << 8) | ((uint16_t)((NR_MAC_SUBHEADER_LONG *) pduP)->L2 & 0xff); + } else { mac_sdu_len = (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pduP)->L; mac_subheader_len = 2; } LOG_D(MAC, "[UE %d] Frame %d : DLSCH -> DL-DTCH %d (gNB %d, %d bytes)\n", module_idP, frameP, rx_lcid, gNB_index, mac_sdu_len); -#if defined(ENABLE_MAC_PAYLOAD_DEBUG) - LOG_T(MAC, "[UE %d] First 32 bytes of DLSCH : \n", module_idP); - for (i = 0; i < 32; i++) - LOG_T(MAC, "%x.", (pduP + mac_subheader_len)[i]); + #if defined(ENABLE_MAC_PAYLOAD_DEBUG) + LOG_T(MAC, "[UE %d] First 32 bytes of DLSCH : \n", module_idP); - LOG_T(MAC, "\n"); -#endif + for (i = 0; i < 32; i++) + LOG_T(MAC, "%x.", (pduP + mac_subheader_len)[i]); + + LOG_T(MAC, "\n"); + #endif if (rx_lcid < NB_RB_MAX && rx_lcid >= DL_SCH_LCID_DCCH) { + mac_rlc_data_ind(module_idP, mac->crnti, gNB_index, @@ -3517,14 +3536,12 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, } break; + } + pduP += ( mac_subheader_len + mac_ce_len + mac_sdu_len ); + pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len ); + if (pdu_len < 0) + LOG_E(MAC, "[UE %d][%d.%d] nr_ue_process_mac_pdu, residual mac pdu length %d < 0!\n", module_idP, frameP, slot, pdu_len); } - - pduP += ( mac_subheader_len + mac_ce_len + mac_sdu_len ); - pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len ); - - if (pdu_len < 0) - LOG_E(MAC, "[UE %d][%d.%d] nr_ue_process_mac_pdu, residual mac pdu length %d < 0!\n", module_idP, frameP, slot, pdu_len); - } } /** @@ -3538,85 +3555,102 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, NR_UE_MAC_INST_t *mac, uint8_t power_headroom, // todo: NR_POWER_HEADROOM_CMD *power_headroom, - uint16_t *crnti, + uint16_t *crnti, NR_BSR_SHORT *truncated_bsr, NR_BSR_SHORT *short_bsr, NR_BSR_LONG *long_bsr) { + int mac_ce_len = 0; uint8_t mac_ce_size = 0; uint8_t *pdu = mac_ce; - if (power_headroom) { + // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_SINGLE_ENTRY_PHR; mac_ce++; + // PHR MAC CE (1 octet) ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->PH = power_headroom; ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->R1 = 0; ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->PCMAX = 0; // todo ((NR_SINGLE_ENTRY_PHR_MAC_CE *) mac_ce)->R2 = 0; + // update pointer and length mac_ce_size = sizeof(NR_SINGLE_ENTRY_PHR_MAC_CE); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : power_headroom pdu %p mac_ce %p b\n", - pdu, mac_ce); + pdu, mac_ce); } if (crnti && (!get_softmodem_params()->sa && get_softmodem_params()->do_ra && mac->ra.ra_state != RA_SUCCEEDED)) { + LOG_D(NR_MAC, "In %s: generating C-RNTI MAC CE with C-RNTI %x\n", __FUNCTION__, (*crnti)); + // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_C_RNTI; mac_ce++; + // C-RNTI MAC CE (2 octets) *(uint16_t *) mac_ce = (*crnti); + // update pointer and length mac_ce_size = sizeof(uint16_t); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); + } if (truncated_bsr) { - // MAC CE fixed subheader + + // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_S_TRUNCATED_BSR; mac_ce++; + // Short truncated BSR MAC CE (1 octet) ((NR_BSR_SHORT_TRUNCATED *) mac_ce)-> Buffer_size = truncated_bsr->Buffer_size; ((NR_BSR_SHORT_TRUNCATED *) mac_ce)-> LcgID = truncated_bsr->LcgID;; + // update pointer and length mac_ce_size = sizeof(NR_BSR_SHORT_TRUNCATED); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : truncated_bsr Buffer_size %d LcgID %d pdu %p mac_ce %p\n", - truncated_bsr->Buffer_size, truncated_bsr->LcgID, pdu, mac_ce); + truncated_bsr->Buffer_size, truncated_bsr->LcgID, pdu, mac_ce); + } else if (short_bsr) { - // MAC CE fixed subheader + + // MAC CE fixed subheader ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) mac_ce)->LCID = UL_SCH_LCID_S_BSR; mac_ce++; + // Short truncated BSR MAC CE (1 octet) ((NR_BSR_SHORT *) mac_ce)->Buffer_size = short_bsr->Buffer_size; ((NR_BSR_SHORT *) mac_ce)->LcgID = short_bsr->LcgID; + // update pointer and length mac_ce_size = sizeof(NR_BSR_SHORT); mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : short_bsr Buffer_size %d LcgID %d pdu %p mac_ce %p\n", - short_bsr->Buffer_size, short_bsr->LcgID, pdu, mac_ce); + short_bsr->Buffer_size, short_bsr->LcgID, pdu, mac_ce); } else if (long_bsr) { - // MAC CE variable subheader + + // MAC CE variable subheader // ch 6.1.3.1. TS 38.321 ((NR_MAC_SUBHEADER_SHORT *) mac_ce)->R = 0; ((NR_MAC_SUBHEADER_SHORT *) mac_ce)->F = 0; ((NR_MAC_SUBHEADER_SHORT *) mac_ce)->LCID = UL_SCH_LCID_L_BSR; + NR_MAC_SUBHEADER_SHORT *mac_pdu_subheader_ptr = (NR_MAC_SUBHEADER_SHORT *) mac_ce; mac_ce += 2; - // Could move to nr_get_sdu() - uint8_t *Buffer_size_ptr= (uint8_t *) mac_ce + 1; + // Could move to nr_get_sdu() + uint8_t *Buffer_size_ptr= (uint8_t*) mac_ce + 1; //int NR_BSR_LONG_SIZE = 1; if (long_bsr->Buffer_size0 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID0 = 0; @@ -3625,7 +3659,6 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size0; //NR_BSR_LONG_SIZE++; } - if (long_bsr->Buffer_size1 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID1 = 0; } else { @@ -3633,7 +3666,6 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size1; //NR_BSR_LONG_SIZE++; } - if (long_bsr->Buffer_size2 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID2 = 0; } else { @@ -3641,7 +3673,6 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size2; //NR_BSR_LONG_SIZE++; } - if (long_bsr->Buffer_size3 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID3 = 0; } else { @@ -3649,7 +3680,6 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size3; //NR_BSR_LONG_SIZE++; } - if (long_bsr->Buffer_size4 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID4 = 0; } else { @@ -3657,7 +3687,6 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size4; //NR_BSR_LONG_SIZE++; } - if (long_bsr->Buffer_size5 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID5 = 0; } else { @@ -3665,7 +3694,6 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size5; //NR_BSR_LONG_SIZE++; } - if (long_bsr->Buffer_size6 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID6 = 0; } else { @@ -3673,7 +3701,6 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size6; //NR_BSR_LONG_SIZE++; } - if (long_bsr->Buffer_size7 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID7 = 0; } else { @@ -3681,17 +3708,17 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, *Buffer_size_ptr++ = long_bsr->Buffer_size7; //NR_BSR_LONG_SIZE++; } - - ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_subheader_ptr)->L = mac_ce_size = (uint8_t *) Buffer_size_ptr - (uint8_t *) mac_ce; - LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : long_bsr size %d Lcgbit 0x%02x Buffer_size %d %d %d %d %d %d %d %d\n", mac_ce_size, *((uint8_t *) mac_ce), - ((NR_BSR_LONG *) mac_ce)->Buffer_size0, ((NR_BSR_LONG *) mac_ce)->Buffer_size1, ((NR_BSR_LONG *) mac_ce)->Buffer_size2, ((NR_BSR_LONG *) mac_ce)->Buffer_size3, - ((NR_BSR_LONG *) mac_ce)->Buffer_size4, ((NR_BSR_LONG *) mac_ce)->Buffer_size5, ((NR_BSR_LONG *) mac_ce)->Buffer_size6, ((NR_BSR_LONG *) mac_ce)->Buffer_size7); + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_subheader_ptr)->L = mac_ce_size = (uint8_t*) Buffer_size_ptr - (uint8_t*) mac_ce; + LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : long_bsr size %d Lcgbit 0x%02x Buffer_size %d %d %d %d %d %d %d %d\n", mac_ce_size, *((uint8_t*) mac_ce), + ((NR_BSR_LONG *) mac_ce)->Buffer_size0, ((NR_BSR_LONG *) mac_ce)->Buffer_size1, ((NR_BSR_LONG *) mac_ce)->Buffer_size2, ((NR_BSR_LONG *) mac_ce)->Buffer_size3, + ((NR_BSR_LONG *) mac_ce)->Buffer_size4, ((NR_BSR_LONG *) mac_ce)->Buffer_size5, ((NR_BSR_LONG *) mac_ce)->Buffer_size6, ((NR_BSR_LONG *) mac_ce)->Buffer_size7); // update pointer and length mac_ce = Buffer_size_ptr; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_SHORT); } return mac_ce_len; + } @@ -3728,7 +3755,8 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, // - b buffer // - ulsch power offset // - optimize: mu_pusch, j and table_6_1_2_1_1_2_time_dom_res_alloc_A are already defined in nr_ue_procedures -int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id) { +int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id){ + module_id_t mod_id = dl_info->module_id; frame_t frame = dl_info->frame; int slot = dl_info->slot; @@ -3752,11 +3780,11 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t NR_RA_HEADER_RAPID *rarh = (NR_RA_HEADER_RAPID *) dlsch_buffer; // RAR subheader pointer NR_MAC_RAR *rar = (NR_MAC_RAR *) (dlsch_buffer + 1); // RAR subPDU pointer uint8_t preamble_index = get_ra_PreambleIndex(mod_id, cc_id, gNB_id); //prach_resources->ra_PreambleIndex; + LOG_D(NR_MAC, "In %s:[%d.%d]: [UE %d][RAPROC] invoking MAC for received RAR (current preamble %d)\n", __FUNCTION__, frame, slot, mod_id, preamble_index); while (1) { n_subheaders++; - if (rarh->T == 1) { n_subPDUs++; LOG_I(NR_MAC, "[UE %d][RAPROC] Got RAPID RAR subPDU\n", mod_id); @@ -3764,7 +3792,6 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t ra->RA_backoff_indicator = table_7_2_1[((NR_RA_HEADER_BI *)rarh)->BI]; ra->RA_BI_found = 1; LOG_I(NR_MAC, "[UE %d][RAPROC] Got BI RAR subPDU %d ms\n", mod_id, ra->RA_backoff_indicator); - if ( ((NR_RA_HEADER_BI *)rarh)->E == 1) { rarh += sizeof(NR_RA_HEADER_BI); continue; @@ -3772,14 +3799,12 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t break; } } - if (rarh->RAPID == preamble_index) { LOG_I(NR_MAC, "[UE %d][RAPROC][%d.%d] Found RAR with the intended RAPID %d\n", mod_id, frame, slot, rarh->RAPID); rar = (NR_MAC_RAR *) (dlsch_buffer + n_subheaders + (n_subPDUs - 1) * sizeof(NR_MAC_RAR)); ra->RA_RAPID_found = 1; break; } - if (rarh->E == 0) { LOG_W(NR_MAC,"[UE %d][RAPROC][%d.%d] Received RAR preamble (%d) doesn't match the intended RAPID (%d)\n", mod_id, frame, slot, rarh->RAPID, preamble_index); break; @@ -3788,61 +3813,57 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t } } -#ifdef DEBUG_RAR + #ifdef DEBUG_RAR LOG_D(MAC, "[DEBUG_RAR] (%d,%d) number of RAR subheader %d; number of RAR pyloads %d\n", frame, slot, n_subheaders, n_subPDUs); LOG_D(MAC, "[DEBUG_RAR] Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n", *(uint8_t *) rarh, rar[0], rar[1], rar[2], rar[3], rar[4], rar[5], rarh->RAPID, preamble_index); -#endif + #endif if (ra->RA_RAPID_found) { + RAR_grant_t rar_grant; + unsigned char tpc_command; #ifdef DEBUG_RAR unsigned char csi_req; #endif + // TA command ul_time_alignment->apply_ta = 1; ul_time_alignment->ta_command = 31 + rar->TA2 + (rar->TA1 << 5); + #ifdef DEBUG_RAR // CSI csi_req = (unsigned char) (rar->UL_GRANT_4 & 0x01); #endif + // TPC tpc_command = (unsigned char) ((rar->UL_GRANT_4 >> 1) & 0x07); - - switch (tpc_command) { + switch (tpc_command){ case 0: ra->Msg3_TPC = -6; break; - case 1: ra->Msg3_TPC = -4; break; - case 2: ra->Msg3_TPC = -2; break; - case 3: ra->Msg3_TPC = 0; break; - case 4: ra->Msg3_TPC = 2; break; - case 5: ra->Msg3_TPC = 4; break; - case 6: ra->Msg3_TPC = 6; break; - case 7: ra->Msg3_TPC = 8; break; } - // MCS rar_grant.mcs = (unsigned char) (rar->UL_GRANT_4 >> 4); // time alloc @@ -3851,36 +3872,44 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t rar_grant.Msg3_f_alloc = (uint16_t) ((rar->UL_GRANT_3 >> 4) | (rar->UL_GRANT_2 << 4) | ((rar->UL_GRANT_1 & 0x03) << 12)); // frequency hopping rar_grant.freq_hopping = (unsigned char) (rar->UL_GRANT_1 >> 2); + #ifdef DEBUG_RAR LOG_I(NR_MAC, "rarh->E = 0x%x\n", rarh->E); LOG_I(NR_MAC, "rarh->T = 0x%x\n", rarh->T); LOG_I(NR_MAC, "rarh->RAPID = 0x%x (%i)\n", rarh->RAPID, rarh->RAPID); + LOG_I(NR_MAC, "rar->R = 0x%x\n", rar->R); LOG_I(NR_MAC, "rar->TA1 = 0x%x\n", rar->TA1); + LOG_I(NR_MAC, "rar->TA2 = 0x%x\n", rar->TA2); LOG_I(NR_MAC, "rar->UL_GRANT_1 = 0x%x\n", rar->UL_GRANT_1); + LOG_I(NR_MAC, "rar->UL_GRANT_2 = 0x%x\n", rar->UL_GRANT_2); LOG_I(NR_MAC, "rar->UL_GRANT_3 = 0x%x\n", rar->UL_GRANT_3); LOG_I(NR_MAC, "rar->UL_GRANT_4 = 0x%x\n", rar->UL_GRANT_4); + LOG_I(NR_MAC, "rar->TCRNTI_1 = 0x%x\n", rar->TCRNTI_1); LOG_I(NR_MAC, "rar->TCRNTI_2 = 0x%x\n", rar->TCRNTI_2); + LOG_I(NR_MAC, "In %s:[%d.%d]: [UE %d] Received RAR with t_alloc %d f_alloc %d ta_command %d mcs %d freq_hopping %d tpc_command %d t_crnti %x \n", - __FUNCTION__, - frame, - slot, - mod_id, - rar_grant.Msg3_t_alloc, - rar_grant.Msg3_f_alloc, - ul_time_alignment->ta_command, - rar_grant.mcs, - rar_grant.freq_hopping, - tpc_command, - ra->t_crnti); + __FUNCTION__, + frame, + slot, + mod_id, + rar_grant.Msg3_t_alloc, + rar_grant.Msg3_f_alloc, + ul_time_alignment->ta_command, + rar_grant.mcs, + rar_grant.freq_hopping, + tpc_command, + ra->t_crnti); #endif + // Schedule Msg3 ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, rar_grant.Msg3_t_alloc); - if (ret != -1) { + if (ret != -1){ + fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); uint16_t rnti = mac->crnti; @@ -3896,14 +3925,21 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t } nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; + fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); + // Config Msg3 PDU nr_config_pusch_pdu(mac, pusch_config_pdu, NULL, &rar_grant, rnti, NULL); + } + } else { + ra->t_crnti = 0; ul_time_alignment->ta_command = (0xffff); + } return ret; + } diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 1a65d266c2..4f231b40ca 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -58,12 +58,15 @@ static prach_association_pattern_t prach_assoc_pattern; static ssb_list_info_t ssb_list; -void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type) { +void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type){ + ul_config->ul_config_list[ul_config->number_pdus].pdu_type = pdu_type; ul_config->slot = slot_tx; ul_config->sfn = frame_tx; ul_config->number_pdus++; + LOG_D(NR_MAC, "In %s: Set config request for UL transmission in [%d.%d], number of UL PDUs: %d\n", __FUNCTION__, ul_config->sfn, ul_config->slot, ul_config->number_pdus); + } void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, @@ -74,7 +77,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, int cc_id, frame_t frame, int slot, - int thread_id) { + int thread_id){ + scheduled_response->dl_config = dl_config; scheduled_response->ul_config = ul_config; scheduled_response->tx_request = tx_request; @@ -83,6 +87,7 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, scheduled_response->frame = frame; scheduled_response->slot = slot; scheduled_response->thread_id = thread_id; + } /* @@ -94,16 +99,17 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { // Get K2 from RRC configuration NR_PUSCH_Config_t *pusch_config=mac->ULbwp[0] ? mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup : NULL; NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; - if (pusch_config && pusch_config->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = pusch_config->pusch_TimeDomainAllocationList->choice.setup; - } else if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Common&& - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon&& - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { + } + else if (mac->ULbwp[0] && + mac->ULbwp[0]->bwp_Common&& + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon&& + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - } else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) + } + else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) pusch_TimeDomainAllocationList=mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; else AssertFatal(1==0,"need to fall back to default PUSCH time-domain allocations\n"); @@ -113,13 +119,13 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { time_domain_ind, pusch_TimeDomainAllocationList->list.count); return -1; } - k2 = *pusch_TimeDomainAllocationList->list.array[time_domain_ind]->k2; } AssertFatal(k2 >= DURATION_RX_TO_TX, "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n", k2,DURATION_RX_TO_TX); + LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2); return k2; } @@ -128,7 +134,8 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { * This function returns the UL config corresponding to a given UL slot * from MAC instance . */ -fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot) { +fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot) +{ NR_TDD_UL_DL_ConfigCommon_t *tdd_config = mac->scc==NULL ? mac->scc_SIB->tdd_UL_DL_ConfigurationCommon : mac->scc->tdd_UL_DL_ConfigurationCommon; //Check if request to access ul_config is for a UL slot @@ -141,24 +148,27 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl // based on the TDD pattern (slot configuration period) and number of UL+mixed // slots in the period. TS 38.213 Sec 11.1 int mu = mac->ULbwp[0] ? - mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing : - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing; + mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing : + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing; NR_TDD_UL_DL_Pattern_t *tdd_pattern = &tdd_config->pattern1; const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity); const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0); int index = slot % num_slots_ul; + LOG_D(NR_MAC, "In %s slots per tdd %d, num_slots_ul %d, index %d\n", __FUNCTION__, - num_slots_per_tdd, - num_slots_ul, - index); + num_slots_per_tdd, + num_slots_ul, + index); + return &mac->ul_config_request[index]; } -void ul_layers_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { +void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { + NR_ServingCellConfigCommon_t *scc = mac->scc; NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup; - long transformPrecoder; + long transformPrecoder; if (pusch_Config->transformPrecoder) transformPrecoder = *pusch_Config->transformPrecoder; else { @@ -168,34 +178,36 @@ void ul_layers_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled; } + /* PRECOD_NBR_LAYERS */ if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_nonCodebook)); - // 0 bits if the higher layer parameter txConfig = nonCodeBook - if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook)) { + if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook)){ + uint8_t n_antenna_port = 0; //FIXME!!! if (n_antenna_port == 1); // 1 antenna port and the higher layer parameter txConfig = codebook 0 bits - if (n_antenna_port == 4) { // 4 antenna port and the higher layer parameter txConfig = codebook + if (n_antenna_port == 4){ // 4 antenna port and the higher layer parameter txConfig = codebook // Table 7.3.1.1.2-2: transformPrecoder=disabled and maxRank = 2 or 3 or 4 if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) - && ((*pusch_Config->maxRank == 2) || - (*pusch_Config->maxRank == 3) || - (*pusch_Config->maxRank == 4))) { + && ((*pusch_Config->maxRank == 2) || + (*pusch_Config->maxRank == 3) || + (*pusch_Config->maxRank == 4))){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][0]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][1]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent) { + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){ pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][2]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][3]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){ pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][4]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][5]; } @@ -203,92 +215,100 @@ void ul_layers_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf // Table 7.3.1.1.2-3: transformPrecoder= enabled, or transformPrecoder=disabled and maxRank = 1 if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) - || (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)) - && (*pusch_Config->maxRank == 1)) { + || (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)) + && (*pusch_Config->maxRank == 1)){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][6]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][7]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent) { + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){ pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][8]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][9]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){ pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][10]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][11]; } } } - if (n_antenna_port == 4) { // 2 antenna port and the higher layer parameter txConfig = codebook + if (n_antenna_port == 4){ // 2 antenna port and the higher layer parameter txConfig = codebook // Table 7.3.1.1.2-4: transformPrecoder=disabled and maxRank = 2 - if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (*pusch_Config->maxRank == 2)) { + if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (*pusch_Config->maxRank == 2)){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][12]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][13]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){ pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][14]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][15]; } + } // Table 7.3.1.1.2-5: transformPrecoder= enabled, or transformPrecoder= disabled and maxRank = 1 if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) - || (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)) - && (*pusch_Config->maxRank == 1)) { + || (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)) + && (*pusch_Config->maxRank == 1)){ + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) { pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][16]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][17]; } - if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { + if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){ pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][18]; pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][19]; } + } } } /*-------------------- Changed to enable Transform precoding in RF SIM------------------------------------------------*/ - /*if (pusch_config_pdu->transform_precoding == transform_precoder_enabled) { - pusch_config_dedicated->transform_precoder = transform_precoder_enabled; + /*if (pusch_config_pdu->transform_precoding == transform_precoder_enabled) { - if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) { + pusch_config_dedicated->transform_precoder = transform_precoder_enabled; - NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; + if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) { - if (NR_DMRS_ulconfig->dmrs_Type == NULL) - pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_a.dmrs_type = 1; - if (NR_DMRS_ulconfig->maxLength == NULL) - pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_a.max_length = 1; + NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup; - } else if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) { + if (NR_DMRS_ulconfig->dmrs_Type == NULL) + pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_a.dmrs_type = 1; + if (NR_DMRS_ulconfig->maxLength == NULL) + pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_a.max_length = 1; - NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; + } else if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) { - if (NR_DMRS_ulconfig->dmrs_Type == NULL) - pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_b.dmrs_type = 1; - if (NR_DMRS_ulconfig->maxLength == NULL) - pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_b.max_length = 1; + NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; - } - } else - pusch_config_dedicated->transform_precoder = transform_precoder_disabled;*/ + if (NR_DMRS_ulconfig->dmrs_Type == NULL) + pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_b.dmrs_type = 1; + if (NR_DMRS_ulconfig->maxLength == NULL) + pusch_config_dedicated->dmrs_ul_for_pusch_mapping_type_b.max_length = 1; + + } + } else + pusch_config_dedicated->transform_precoder = transform_precoder_disabled;*/ } // todo: this function shall be reviewed completely because of the many comments left by the author -void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { +void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { + /* ANTENNA_PORTS */ uint8_t rank = 0; // We need to initialize rank FIXME!!! + NR_ServingCellConfigCommon_t *scc = mac->scc; NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup; - long transformPrecoder; + long transformPrecoder; if (pusch_Config->transformPrecoder) transformPrecoder = *pusch_Config->transformPrecoder; else { @@ -297,46 +317,48 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_confi else transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled; } - long *max_length = NULL; long *dmrs_type = NULL; - if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA) { max_length = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->maxLength; dmrs_type = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->dmrs_Type; - } else { + } + else { max_length = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->maxLength; dmrs_type = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->dmrs_Type; } + if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) && - (dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-6 - pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC - pusch_config_pdu->dmrs_ports = dci->antenna_ports.val; //TBC + (dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-6 + pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC + pusch_config_pdu->dmrs_ports = dci->antenna_ports.val; //TBC } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) && - (dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-7 + (dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-7 + pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 3)?(dci->antenna_ports.val-4):(dci->antenna_ports.val); //TBC //pusch_config_pdu->n_front_load_symb = (dci->antenna_ports > 3)?2:1; //FIXME } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && - (dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-8/9/10/11 + (dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-8/9/10/11 + if (rank == 1) { pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1; //TBC pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val-2):(dci->antenna_ports.val); //TBC } - if (rank == 2) { + if (rank == 2){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?0:2):0; //pusch_config_pdu->dmrs_ports[1] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?2:3):1; } - if (rank == 3) { + if (rank == 3){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = 0; @@ -344,7 +366,7 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_confi //pusch_config_pdu->dmrs_ports[2] = 2; } - if (rank == 4) { + if (rank == 4){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = 0; @@ -355,14 +377,15 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_confi } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && - (dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-12/13/14/15 - if (rank == 1) { + (dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-12/13/14/15 + + if (rank == 1){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1; //TBC pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val; //TBC //pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 6)?2:1; //FIXME } - if (rank == 2) { + if (rank == 2){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_13[dci->antenna_ports.val][1]; @@ -370,7 +393,7 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_confi //pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 3)?2:1; // FIXME } - if (rank == 3) { + if (rank == 3){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_14[dci->antenna_ports.val][1]; @@ -379,7 +402,7 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_confi //pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME } - if (rank == 4) { + if (rank == 4){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_15[dci->antenna_ports.val][1]; @@ -391,21 +414,22 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_confi } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && - (dmrs_type != NULL) && - (max_length == NULL)) { // tables 7.3.1.1.2-16/17/18/19 - if (rank == 1) { + (dmrs_type != NULL) && + (max_length == NULL)) { // tables 7.3.1.1.2-16/17/18/19 + + if (rank == 1){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?((dci->antenna_ports.val > 5)?3:2):1; //TBC pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val; //TBC } - if (rank == 2) { + if (rank == 2){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?((dci->antenna_ports.val > 2)?3:2):1; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_17[dci->antenna_ports.val][1]; //pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_17[dci->antenna_ports.val][2]; } - if (rank == 3) { + if (rank == 3){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?3:2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_18[dci->antenna_ports.val][1]; @@ -413,7 +437,7 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_confi //pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_18[dci->antenna_ports.val][3]; } - if (rank == 4) { + if (rank == 4){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = dci->antenna_ports.val + 2; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = 0; @@ -424,22 +448,23 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_confi } if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && - (dmrs_type != NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-20/21/22/23 - if (rank == 1) { + (dmrs_type != NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-20/21/22/23 + + if (rank == 1){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_20[dci->antenna_ports.val][0]; //TBC pusch_config_pdu->dmrs_ports = table_7_3_1_1_2_20[dci->antenna_ports.val][1]; //TBC //pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_20[dci->antenna_ports.val][2]; //FIXME } - if (rank == 2) { + if (rank == 2){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_21[dci->antenna_ports.val][0]; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_21[dci->antenna_ports.val][1]; //pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_21[dci->antenna_ports.val][2]; //pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_21[dci->antenna_ports.val][3]; //FIXME - } + } - if (rank == 3) { + if (rank == 3){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_22[dci->antenna_ports.val][0]; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_22[dci->antenna_ports.val][1]; @@ -448,7 +473,7 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_confi //pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_22[dci->antenna_ports.val][4]; //FIXME } - if (rank == 4) { + if (rank == 4){ pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_23[dci->antenna_ports.val][0]; //TBC pusch_config_pdu->dmrs_ports = 0; //FIXME //pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_23[dci->antenna_ports.val][1]; @@ -473,23 +498,26 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, dci_pdu_rel15_t *dci, RAR_grant_t *rar_grant, uint16_t rnti, - uint8_t *dci_format) { + uint8_t *dci_format){ + int f_alloc; int mask; int StartSymbolIndex; int NrOfSymbols; uint8_t nb_dmrs_re_per_rb; + uint16_t l_prime_mask = 0; uint16_t number_dmrs_symbols = 0; int N_PRB_oh = 0; + int rnti_type = get_rnti_type(mac, rnti); + // Common configuration pusch_config_pdu->dmrs_config_type = pusch_dmrs_type1; pusch_config_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; pusch_config_pdu->nrOfLayers = 1; pusch_config_pdu->rnti = rnti; NR_BWP_UplinkCommon_t *initialUplinkBWP; - if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP; else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; @@ -497,38 +525,41 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, pusch_maxLength_t dmrslength = pusch_len1; if (rar_grant) { + // Note: for Msg3 or MsgA PUSCH transmission the N_PRB_oh is always set to 0 NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; NR_BWP_UplinkDedicated_t *ibwp; int scs,abwp_start,abwp_size,startSymbolAndLength,mappingtype; NR_PUSCH_Config_t *pusch_Config=NULL; - if (mac->cg && ubwp && mac->cg->spCellConfig && mac->cg->spCellConfig->spCellConfigDedicated && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) { + ibwp = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP; pusch_Config = ibwp->pusch_Config->choice.setup; startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength; mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType; + // active BWP start abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); abwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; - } else { + } + else { startSymbolAndLength = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength; mappingtype = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType; + // active BWP start abwp_start = NRRIV2PRBOFFSET(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); abwp_size = NRRIV2BW(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); scs = initialUplinkBWP->genericParameters.subcarrierSpacing; } - int ibwp_start = NRRIV2PRBOFFSET(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); int ibwp_size = NRRIV2BW(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - // BWP start selection according to 8.3 of TS 38.213 + // BWP start selection according to 8.3 of TS 38.213 if ((ibwp_start < abwp_start) || (ibwp_size > abwp_size)) { pusch_config_pdu->bwp_start = abwp_start; pusch_config_pdu->bwp_size = abwp_size; @@ -545,35 +576,43 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, mask = (1 << (28 - (int)(ceil(log2((ibwp_size*(ibwp_size+1))>>1))))) - 1; f_alloc = rar_grant->Msg3_f_alloc & mask; - if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, ibwp_size, 0, f_alloc) < 0) return -1; // virtual resource block to physical resource mapping for Msg3 PUSCH (6.3.1.7 in 38.211) //pusch_config_pdu->rb_start += ibwp_start - abwp_start; + // Time domain allocation SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); pusch_config_pdu->start_symbol_index = StartSymbolIndex; pusch_config_pdu->nr_of_symbols = NrOfSymbols; + l_prime_mask = get_l_prime(NrOfSymbols, mappingtype, add_pos, dmrslength, StartSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position); LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask); -#ifdef DEBUG_MSG3 + + #ifdef DEBUG_MSG3 LOG_D(NR_MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size); -#endif + #endif + // MCS pusch_config_pdu->mcs_index = rar_grant->mcs; // Frequency hopping pusch_config_pdu->frequency_hopping = rar_grant->freq_hopping; + // DM-RS configuration according to 6.2.2 UE DM-RS transmission procedure in 38.214 pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; pusch_config_pdu->dmrs_ports = 1; + // DMRS sequence initialization [TS 38.211, sec 6.4.1.1.1]. // Should match what is sent in DCI 0_1, otherwise set to 0. pusch_config_pdu->scid = 0; + // Transform precoding according to 6.1.3 UE procedure for applying transform precoding on PUSCH in 38.214 pusch_config_pdu->transform_precoding = get_transformPrecoding(initialUplinkBWP, pusch_Config, NULL, NULL, NR_RNTI_TC, 0); // TBR fix rnti and take out + // Resource allocation in frequency domain according to 6.1.2.2 in TS 38.214 pusch_config_pdu->resource_alloc = (mac->cg) ? pusch_Config->resourceAllocation : 1; + //// Completing PUSCH PDU pusch_config_pdu->mcs_table = 0; pusch_config_pdu->cyclic_prefix = 0; @@ -587,20 +626,23 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, pusch_config_pdu->pusch_data.harq_process_id = 0; pusch_config_pdu->pusch_data.new_data_indicator = 1; // new data pusch_config_pdu->pusch_data.num_cb = 0; + } else if (dci) { + int target_ss; bool valid_ptrs_setup = 0; uint16_t n_RB_ULBWP; - if (mac->ULbwp[0] && mac->ULbwp[0]->bwp_Common) { n_RB_ULBWP = NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); pusch_config_pdu->bwp_start = NRRIV2PRBOFFSET(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - } else { + } + else { pusch_config_pdu->bwp_start = NRRIV2PRBOFFSET(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); n_RB_ULBWP = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); } pusch_config_pdu->bwp_size = n_RB_ULBWP; + NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0] ? mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup : NULL; // Basic sanity check for MCS value to check for a false or erroneous DCI @@ -616,40 +658,46 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, /*DCI format-related configuration*/ if (*dci_format == NR_UL_DCI_FORMAT_0_0) { + target_ss = NR_SearchSpace__searchSpaceType_PR_common; + } else if (*dci_format == NR_UL_DCI_FORMAT_0_1) { + /* BANDWIDTH_PART_IND */ if (dci->bwp_indicator.val != 1) { LOG_W(NR_MAC, "bwp_indicator != 1! Possibly due to false DCI. Ignoring DCI!\n"); return -1; } - config_bwp_ue(mac, &dci->bwp_indicator.val, dci_format); target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; ul_layers_config(mac, pusch_config_pdu, dci); ul_ports_config(mac, pusch_config_pdu, dci); + } else { + LOG_E(NR_MAC, "In %s: UL grant from DCI format %d is not handled...\n", __FUNCTION__, *dci_format); return -1; + } NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; - if (pusch_Config && pusch_Config->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = pusch_Config->pusch_TimeDomainAllocationList->choice.setup; - } else if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Common&& - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon&& - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && - mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { + } + else if (mac->ULbwp[0] && + mac->ULbwp[0]->bwp_Common&& + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon&& + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && + mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - } else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) + } + else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) pusch_TimeDomainAllocationList=mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; else AssertFatal(1==0,"need to fall back to default PUSCH time-domain allocations\n"); int mappingtype = pusch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType; - NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = NULL; + NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = NULL; if(pusch_Config) { NR_DMRS_ulconfig = (mappingtype == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA) ? pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup : pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup; @@ -658,9 +706,10 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, /* TRANSFORM PRECODING ------------------------------------------------------------------------------------------*/ if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) { - pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; - uint32_t n_RS_Id = 0; + pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; + + uint32_t n_RS_Id = 0; if (NR_DMRS_ulconfig->transformPrecodingEnabled->nPUSCH_Identity != NULL) n_RS_Id = *NR_DMRS_ulconfig->transformPrecodingEnabled->nPUSCH_Identity; else @@ -671,30 +720,29 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, // V as specified in section 6.4.1.1.1.2 in 38.211 V = 0 if sequence hopping and group hopping are disabled if ((NR_DMRS_ulconfig->transformPrecodingEnabled->sequenceGroupHopping == NULL) && - (NR_DMRS_ulconfig->transformPrecodingEnabled->sequenceHopping == NULL)) - pusch_config_pdu->dfts_ofdm.low_papr_sequence_number = 0; + (NR_DMRS_ulconfig->transformPrecodingEnabled->sequenceHopping == NULL)) + pusch_config_pdu->dfts_ofdm.low_papr_sequence_number = 0; else AssertFatal(1==0,"SequenceGroupHopping or sequenceHopping are NOT Supported\n"); LOG_D(NR_MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d \n", pusch_config_pdu->num_dmrs_cdm_grps_no_data, - pusch_config_pdu->dfts_ofdm.low_papr_group_number); + pusch_config_pdu->dfts_ofdm.low_papr_group_number); } /* TRANSFORM PRECODING --------------------------------------------------------------------------------------------------------*/ /* IDENTIFIER_DCI_FORMATS */ /* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */ - if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, n_RB_ULBWP, 0, dci->frequency_domain_assignment.val) < 0) { + if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, n_RB_ULBWP, 0, dci->frequency_domain_assignment.val) < 0){ return -1; } - /* TIME_DOM_RESOURCE_ASSIGNMENT */ if (nr_ue_process_dci_time_dom_resource_assignment(mac, pusch_config_pdu, NULL, dci->time_domain_assignment.val,0,false) < 0) { return -1; } /* FREQ_HOPPING_FLAG */ - if ((pusch_Config!=NULL) && (pusch_Config->frequencyHopping!=NULL) && (pusch_Config->resourceAllocation != NR_PUSCH_Config__resourceAllocation_resourceAllocationType0)) { + if ((pusch_Config!=NULL) && (pusch_Config->frequencyHopping!=NULL) && (pusch_Config->resourceAllocation != NR_PUSCH_Config__resourceAllocation_resourceAllocationType0)){ pusch_config_pdu->frequency_hopping = dci->frequency_hopping_flag.val; } @@ -714,21 +762,17 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, pusch_config_pdu->pusch_data.rv_index = dci->rv; /* HARQ_PROCESS_NUMBER */ pusch_config_pdu->pusch_data.harq_process_id = dci->harq_pid; - /* TPC_PUSCH */ // according to TS 38.213 Table Table 7.1.1-1 if (dci->tpc == 0) { pusch_config_pdu->absolute_delta_PUSCH = -4; } - if (dci->tpc == 1) { pusch_config_pdu->absolute_delta_PUSCH = -1; } - if (dci->tpc == 2) { pusch_config_pdu->absolute_delta_PUSCH = 1; } - if (dci->tpc == 3) { pusch_config_pdu->absolute_delta_PUSCH = 4; } @@ -743,7 +787,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, mappingtype, add_pos, dmrslength, pusch_config_pdu->start_symbol_index, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position); - if ((mac->ULbwp[0] && pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled)) pusch_config_pdu->num_dmrs_cdm_grps_no_data = 1; else if (*dci_format == NR_UL_DCI_FORMAT_0_0 || (mac->ULbwp[0] && pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled)) @@ -757,15 +800,16 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead) N_PRB_oh = *mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead; + else N_PRB_oh = 0; /* PTRS */ if (mac->ULbwp[0] && - mac->ULbwp[0]->bwp_Dedicated && - mac->ULbwp[0]->bwp_Dedicated->pusch_Config && - mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup && - mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB && - mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) { + mac->ULbwp[0]->bwp_Dedicated && + mac->ULbwp[0]->bwp_Dedicated->pusch_Config && + mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup && + mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB && + mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) { if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled) { nfapi_nr_ue_ptrs_ports_t ptrs_ports_list; pusch_config_pdu->pusch_ptrs.ptrs_ports_list = &ptrs_ports_list; @@ -774,23 +818,23 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, &pusch_config_pdu->pusch_ptrs.ptrs_freq_density,&pusch_config_pdu->pusch_ptrs.ptrs_time_density, &pusch_config_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,&pusch_config_pdu->pusch_ptrs.num_ptrs_ports, &pusch_config_pdu->pusch_ptrs.ul_ptrs_power, pusch_config_pdu->nr_of_symbols); - if(valid_ptrs_setup==true) { pusch_config_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; } - LOG_D(NR_MAC, "UL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", pusch_config_pdu->pusch_ptrs.ptrs_time_density, pusch_config_pdu->pusch_ptrs.ptrs_freq_density); } } + } LOG_D(NR_MAC, "In %s: received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n", - __FUNCTION__, - pusch_config_pdu->rb_start, - pusch_config_pdu->rb_size, - pusch_config_pdu->start_symbol_index, - pusch_config_pdu->nr_of_symbols, - rnti_types[rnti_type]); + __FUNCTION__, + pusch_config_pdu->rb_start, + pusch_config_pdu->rb_size, + pusch_config_pdu->start_symbol_index, + pusch_config_pdu->nr_of_symbols, + rnti_types[rnti_type]); + pusch_config_pdu->ul_dmrs_symb_pos = l_prime_mask; pusch_config_pdu->target_code_rate = nr_get_code_rate_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table); pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table); @@ -801,35 +845,42 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, } get_num_re_dmrs(pusch_config_pdu, &nb_dmrs_re_per_rb, &number_dmrs_symbols); + // Compute TBS pusch_config_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_config_pdu->qam_mod_order, - pusch_config_pdu->target_code_rate, - pusch_config_pdu->rb_size, - pusch_config_pdu->nr_of_symbols, - nb_dmrs_re_per_rb*number_dmrs_symbols, - N_PRB_oh, - 0, // TBR to verify tb scaling - pusch_config_pdu->nrOfLayers)/8; + pusch_config_pdu->target_code_rate, + pusch_config_pdu->rb_size, + pusch_config_pdu->nr_of_symbols, + nb_dmrs_re_per_rb*number_dmrs_symbols, + N_PRB_oh, + 0, // TBR to verify tb scaling + pusch_config_pdu->nrOfLayers)/8; + return 0; + } // Performs : // 1. TODO: Call RRC for link status return to PHY // 2. TODO: Perform SR/BSR procedures for scheduling feedback // 3. TODO: Perform PHR procedures -NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_indication_t *ul_info) { - if (dl_info) { +NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_indication_t *ul_info){ + + if (dl_info){ + module_id_t mod_id = dl_info->module_id; uint32_t gNB_index = dl_info->gNB_index; int cc_id = dl_info->cc_id; frame_t rx_frame = dl_info->frame; slot_t rx_slot = dl_info->slot; NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); + fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; + nr_scheduled_response_t scheduled_response; nr_dcireq_t dcireq; - if(mac->cg != NULL) { // we have a cg + if(mac->cg != NULL){ // we have a cg dcireq.module_id = mod_id; dcireq.gNB_index = gNB_index; dcireq.cc_id = cc_id; @@ -837,31 +888,30 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in dcireq.slot = rx_slot; dcireq.dl_config_req.number_pdus = 0; nr_ue_dcireq(&dcireq); //to be replaced with function pointer later - fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id); + fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id); if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); - } else { + } + else { // this is for Msg2/Msg4 if (mac->ra.ra_state >= WAIT_RAR) { fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; rel15->num_dci_options = mac->ra.ra_state == WAIT_RAR ? 1 : 2; rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0; - if (mac->ra.ra_state == WAIT_CONTENTION_RESOLUTION) rel15->dci_format_options[1] = NR_UL_DCI_FORMAT_0_0; // msg3 retransmission - - config_dci_pdu(mac, rel15, dl_config, mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC, -1); + config_dci_pdu(mac, rel15, dl_config, mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC , -1); fill_dci_search_candidates(mac->ra.ss, rel15); dl_config->number_pdus = 1; LOG_D(MAC,"mac->cg %p: Calling fill_scheduled_response rnti %x, type0_pdcch, num_pdus %d\n",mac->cg,rel15->rnti,dl_config->number_pdus); fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id); - if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); } } } else if (ul_info) { + int cc_id = ul_info->cc_id; frame_t rx_frame = ul_info->frame_rx; slot_t rx_slot = ul_info->slot_rx; @@ -869,46 +919,51 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in slot_t slot_tx = ul_info->slot_tx; module_id_t mod_id = ul_info->module_id; uint32_t gNB_index = ul_info->gNB_index; + NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); RA_config_t *ra = &mac->ra; + fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot_tx); // Schedule ULSCH only if the current frame and slot match those in ul_config_req // AND if a UL grant (UL DCI or Msg3) has been received (as indicated by num_pdus) - if (ul_config && (ul_info->slot_tx == ul_config->slot && ul_info->frame_tx == ul_config->sfn) && ul_config->number_pdus > 0) { + if (ul_config && (ul_info->slot_tx == ul_config->slot && ul_info->frame_tx == ul_config->sfn) && ul_config->number_pdus > 0){ + LOG_D(NR_MAC, "In %s:[%d.%d]: number of UL PDUs: %d with UL transmission in [%d.%d]\n", __FUNCTION__, frame_tx, slot_tx, ul_config->number_pdus, ul_config->sfn, ul_config->slot); + uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES]; nr_scheduled_response_t scheduled_response; fapi_nr_tx_request_t tx_req; for (int j = 0; j < ul_config->number_pdus; j++) { + fapi_nr_ul_config_request_pdu_t *ulcfg_pdu = &ul_config->ul_config_list[j]; if (ulcfg_pdu->pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) { + uint16_t TBS_bytes = ulcfg_pdu->pusch_config_pdu.pusch_data.tb_size; LOG_D(NR_MAC,"harq_id %d, NDI %d NDI_DCI %d, TBS_bytes %d\n", ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id, mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id], ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator, TBS_bytes); - - if (ra->ra_state == WAIT_RAR && !ra->cfra) { + if (ra->ra_state == WAIT_RAR && !ra->cfra){ memcpy(ulsch_input_buffer, mac->ulsch_pdu.payload, TBS_bytes); LOG_D(NR_MAC,"[RAPROC] Msg3 to be transmitted:\n"); - for (int k = 0; k < TBS_bytes; k++) { LOG_D(NR_MAC,"(%i): 0x%x\n",k,mac->ulsch_pdu.payload[k]); } - LOG_D(NR_MAC,"Flipping NDI for harq_id %d (Msg3)\n",ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator); mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator; mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = 0; } else { + if ((mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] != ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator || - mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id]==1) && + mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id]==1) && ((get_softmodem_params()->phy_test == 1) || - (ra->ra_state == RA_SUCCEEDED) || - (ra->ra_state == WAIT_RAR && ra->cfra))) { + (ra->ra_state == RA_SUCCEEDED) || + (ra->ra_state == WAIT_RAR && ra->cfra))){ + // Getting IP traffic to be transmitted nr_ue_get_sdu(mod_id, frame_tx, slot_tx, gNB_index, ulsch_input_buffer, TBS_bytes); } @@ -916,6 +971,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in LOG_D(NR_MAC,"Flipping NDI for harq_id %d\n",ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator); mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator; mac->first_ul_tx[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = 0; + } // Config UL TX PDU @@ -926,13 +982,12 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in tx_req.tx_request_body[0].pdu_index = j; tx_req.tx_request_body[0].pdu = ulsch_input_buffer; - if (ra->ra_state == WAIT_CONTENTION_RESOLUTION && !ra->cfra) { + if (ra->ra_state == WAIT_CONTENTION_RESOLUTION && !ra->cfra){ LOG_I(NR_MAC,"[RAPROC] RA-Msg3 retransmitted\n"); // 38.321 restart the ra-ContentionResolutionTimer at each HARQ retransmission in the first symbol after the end of the Msg3 transmission nr_Msg3_transmitted(ul_info->module_id, ul_info->cc_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->gNB_index); } - - if (ra->ra_state == WAIT_RAR && !ra->cfra) { + if (ra->ra_state == WAIT_RAR && !ra->cfra){ LOG_I(NR_MAC,"[RAPROC] RA-Msg3 transmitted\n"); nr_Msg3_transmitted(ul_info->module_id, ul_info->cc_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->gNB_index); } @@ -940,20 +995,19 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in } fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, mod_id, cc_id, rx_frame, rx_slot, ul_info->thread_id); - - if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) { + if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){ mac->if_module->scheduled_response(&scheduled_response); } } } if (dl_info) { - return (CONNECTION_OK); + return (CONNECTION_OK); } - module_id_t mod_id = ul_info->module_id; frame_t txFrameP = ul_info->frame_tx; slot_t txSlotP = ul_info->slot_tx; + // Handle the SR/BSR procedures per subframe NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); uint8_t gNB_indexP=0; @@ -987,13 +1041,13 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in "[UE %d][BSR] Regular BSR Triggered Frame %d slot %d SR for PUSCH is pending\n", mod_id, txFrameP, txSlotP); } - return UE_CONNECTION_OK; + } boolean_t nr_update_bsr(module_id_t module_idP, frame_t frameP, - slot_t slotP, uint8_t gNB_index) { + slot_t slotP, uint8_t gNB_index) { mac_rlc_status_resp_t rlc_status; boolean_t bsr_regular_triggered = FALSE; uint8_t lcid; @@ -1002,11 +1056,11 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, uint32_t lcgid_buffer_remain[NR_MAX_NUM_LCGID] = {0,0,0,0,0,0,0,0}; int32_t lcid_bytes_in_buffer[NR_MAX_NUM_LCID]; /* Array for ordering LCID with data per decreasing priority order */ - uint8_t lcid_reordered_array[NR_MAX_NUM_LCID]= { - NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, - NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, - NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, - NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + uint8_t lcid_reordered_array[NR_MAX_NUM_LCID]= + {NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, + NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID,NR_MAX_NUM_LCID, }; uint8_t pos_next = 0; //uint8_t highest_priority = 16; @@ -1014,7 +1068,6 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, // Reset All BSR Infos lcid_bytes_in_buffer[0] = 0; NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); - for (lcid=DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { // Reset transmission status lcid_bytes_in_buffer[lcid] = 0; @@ -1042,6 +1095,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, lcid, 0, 0 ); + lcid_bytes_in_buffer[lcid] = rlc_status.bytes_in_buffer; if (rlc_status.bytes_in_buffer > 0) { @@ -1087,6 +1141,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, for (array_index = 0; array_index < num_lcid_with_data; array_index++) { lcid = lcid_reordered_array[array_index]; + /* UL data, for a logical channel which belongs to a LCG, becomes available for transmission in the RLC entity either the data belongs to a logical channel with higher priority than the priorities of the logical channels which belong to any LCG and for which data is already available for transmission @@ -1284,7 +1339,7 @@ int nr_get_sf_retxBSRTimer(uint8_t sf_offset) { // PUSCH scheduler: // - Calculate the slot in which ULSCH should be scheduled. This is current slot + K2, // - where K2 is the offset between the slot in which UL DCI is received and the slot -// - in which ULSCH should be scheduled. K2 is configured in RRC configuration. +// - in which ULSCH should be scheduled. K2 is configured in RRC configuration. // PUSCH Msg3 scheduler: // - scheduled by RAR UL grant according to 8.3 of TS 38.213 // Note: Msg3 tx in the uplink symbols of mixed slot @@ -1294,16 +1349,18 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, int current_slot, frame_t *frame_tx, int *slot_tx, - uint8_t tda_id) { + uint8_t tda_id){ + int delta = 0; NR_BWP_Uplink_t *ubwp = mac->ULbwp[0]; // Get the numerology to calculate the Tx frame and slot int mu = ubwp ? - ubwp->bwp_Common->genericParameters.subcarrierSpacing : - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing; + ubwp->bwp_Common->genericParameters.subcarrierSpacing : + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing; + NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ubwp ? - ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList: - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; + ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList: + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; // k2 as per 3GPP TS 38.214 version 15.9.0 Release 15 ch 6.1.2.1.1 // PUSCH time domain resource allocation is higher layer configured from uschTimeDomainAllocationList in either pusch-ConfigCommon int k2; @@ -1315,15 +1372,12 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, case 0: delta = 2; break; - case 1: delta = 3; break; - case 2: delta = 4; break; - case 3: delta = 6; break; @@ -1332,17 +1386,18 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, AssertFatal((k2+delta) >= DURATION_RX_TO_TX, "Slot offset (%d) for Msg3 cannot be less than DURATION_RX_TO_TX (%d)\n", k2+delta,DURATION_RX_TO_TX); - *slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu]; - if (current_slot + k2 + delta > nr_slots_per_frame[mu]) { + *slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu]; + if (current_slot + k2 + delta > nr_slots_per_frame[mu]){ *frame_tx = (current_frame + 1) % 1024; } else { *frame_tx = current_frame; } + } else { + // Get slot offset K2 which will be used to calculate TX slot k2 = get_k2(mac, tda_id); - if (k2 < 0) { // This can happen when a false DCI is received return -1; } @@ -1350,14 +1405,18 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, // Calculate TX slot and frame *slot_tx = (current_slot + k2) % nr_slots_per_frame[mu]; *frame_tx = ((current_slot + k2) > nr_slots_per_frame[mu]) ? (current_frame + 1) % 1024 : current_frame; + } LOG_D(NR_MAC, "In %s: currently at [%d.%d] UL transmission in [%d.%d] (k2 %d delta %d)\n", __FUNCTION__, current_frame, current_slot, *frame_tx, *slot_tx, k2, delta); + return 0; + } // Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config static void build_ro_list(NR_UE_MAC_INST_t *mac) { + int x,y; // PRACH Configuration Index table variables used to compute the valid frame numbers int y2; // PRACH Configuration Index table additional variable used to compute the valid frame numbers uint8_t slot_shift_for_map; @@ -1372,16 +1431,20 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { uint16_t format = 0xffff; uint8_t format2 = 0xff; int nb_fdm; + uint8_t config_index, mu; int msg1_FDM; + uint8_t prach_conf_period_idx; uint8_t nb_of_frames_per_prach_conf_period; uint8_t prach_conf_period_frame_idx; int64_t *prach_config_info_p; + NR_RACH_ConfigCommon_t *setup = (mac->scc) ? - mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; + mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; + config_index = rach_ConfigGeneric->prach_ConfigurationIndex; if (setup->msg1_SubcarrierSpacing) { @@ -1394,14 +1457,13 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { msg1_FDM = rach_ConfigGeneric->msg1_FDM; - switch (msg1_FDM) { + switch (msg1_FDM){ case 0: case 1: case 2: case 3: nb_fdm = 1 << msg1_FDM; break; - default: AssertFatal(1 == 0, "Unknown msg1_FDM from rach_ConfigGeneric %d\n", msg1_FDM); } @@ -1409,46 +1471,51 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { // Create the PRACH occasions map // ============================== // WIP: For now assume no rejected PRACH occasions because of conflict with SSB or TDD_UL_DL_ConfigurationCommon schedule + int unpaired = mac->phy_config.config_req.cell_config.frame_duplex_type; + prach_config_info_p = get_prach_config_info(mac->frequency_range, config_index, unpaired); + // Identify the proper PRACH Configuration Index table according to the operating frequency LOG_D(NR_MAC,"mu = %u, PRACH config index = %u, unpaired = %u\n", mu, config_index, unpaired); if (mac->frequency_range == FR2) { //FR2 + x = prach_config_info_p[2]; y = prach_config_info_p[3]; y2 = prach_config_info_p[4]; + s_map = prach_config_info_p[5]; + prach_conf_start_symbol = prach_config_info_p[6]; N_t_slot = prach_config_info_p[8]; N_dur = prach_config_info_p[9]; - if (prach_config_info_p[1] != -1) format2 = (uint8_t) prach_config_info_p[1]; - format = ((uint8_t) prach_config_info_p[0]) | (format2<<8); - slot_shift_for_map = mu-2; + slot_shift_for_map = mu-2; if ( (mu == 3) && (prach_config_info_p[7] == 1) ) even_slot_invalid = true; else even_slot_invalid = false; - } else { // FR1 + } + else { // FR1 x = prach_config_info_p[2]; y = prach_config_info_p[3]; y2 = y; + s_map = prach_config_info_p[4]; + prach_conf_start_symbol = prach_config_info_p[5]; N_t_slot = prach_config_info_p[7]; N_dur = prach_config_info_p[8]; LOG_D(NR_MAC,"N_t_slot %d, N_dur %d\n",N_t_slot,N_dur); - if (prach_config_info_p[1] != -1) format2 = (uint8_t) prach_config_info_p[1]; - format = ((uint8_t) prach_config_info_p[0]) | (format2<<8); - slot_shift_for_map = mu; + slot_shift_for_map = mu; if ( (mu == 1) && (prach_config_info_p[6] <= 1) ) // no prach in even slots @ 30kHz for 1 prach per subframe even_slot_invalid = true; @@ -1458,6 +1525,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { prach_assoc_pattern.nb_of_prach_conf_period_in_max_period = MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD / x; nb_of_frames_per_prach_conf_period = x; + LOG_D(NR_MAC,"nb_of_prach_conf_period_in_max_period %d\n", prach_assoc_pattern.nb_of_prach_conf_period_in_max_period); // Fill in the PRACH occasions table for every slot in every frame in every PRACH configuration periods in the maximum association pattern period @@ -1469,33 +1537,36 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion = 0; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_frame = nb_of_frames_per_prach_conf_period; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_slot = nr_slots_per_frame[mu]; + LOG_D(NR_MAC,"PRACH Conf Period Idx %d\n", prach_conf_period_idx); // For every frames in a PRACH configuration period // ------------------------------------------------ for (prach_conf_period_frame_idx=0; prach_conf_period_frame_idx> slot_shift_for_map; // in PRACH configuration index table slots are numbered wrt 60kHz - if ( (s_map>>map_shift)&0x01 ) { // Valid slot // Additionally, for 30kHz/120kHz, we must check for the n_RA_Slot param also if ( even_slot_invalid && (slot%2 == 0) ) - continue; // no prach in even slots @ 30kHz/120kHz for 1 prach per 60khz slot/subframe + continue; // no prach in even slots @ 30kHz/120kHz for 1 prach per 60khz slot/subframe // We're good: valid frame and valid slot // Compute all the PRACH occasions in the slot + uint8_t n_prach_occ_in_time; uint8_t n_prach_occ_in_freq; + prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_time = N_t_slot; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_freq = nb_fdm; @@ -1504,18 +1575,19 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { LOG_D(NR_MAC,"PRACH Occ in time %d\n", n_prach_occ_in_time); for (n_prach_occ_in_freq=0; n_prach_occ_in_freqstart_symbol = start_symbol; prach_occasion_p->fdm = n_prach_occ_in_freq; prach_occasion_p->frame = frame; prach_occasion_p->slot = slot; prach_occasion_p->format = format; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion++; + LOG_D(NR_MAC,"Adding a PRACH occasion: frame %u, slot-symbol %d-%d, occ_in_time-occ_in-freq %d-%d, nb ROs in conf period %d, for this slot: RO# in time %d, RO# in freq %d\n", - frame, slot, start_symbol, n_prach_occ_in_time, n_prach_occ_in_freq, prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion, - prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_time, - prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_freq); + frame, slot, start_symbol, n_prach_occ_in_time, n_prach_occ_in_freq, prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion, + prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_time, + prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_freq); } // For every freq in the slot } // For every time occasions in the slot } // Valid slot? @@ -1527,6 +1599,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { // Build the list of all the valid/transmitted SSBs according to the config static void build_ssb_list(NR_UE_MAC_INST_t *mac) { + // Create the list of transmitted SSBs // =================================== BIT_STRING_t *ssb_bitmap; @@ -1535,10 +1608,10 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { if (mac->scc) { NR_ServingCellConfigCommon_t *scc = mac->scc; - switch (scc->ssb_PositionsInBurst->present) { case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap: ssb_bitmap = &scc->ssb_PositionsInBurst->choice.shortBitmap; + ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); @@ -1549,14 +1622,12 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ssb_list.tx_ssb[ssb_idx].transmitted = true; LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx); } - ssb_idx++; } - break; - case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap: ssb_bitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap; + ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); @@ -1567,14 +1638,12 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ssb_list.tx_ssb[ssb_idx].transmitted = true; LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx); } - ssb_idx++; } - break; - case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap: ssb_bitmap = &scc->ssb_PositionsInBurst->choice.longBitmap; + ssb_positionsInBurst = BIT_STRING_to_uint64(ssb_bitmap); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); @@ -1585,20 +1654,20 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ssb_list.tx_ssb[ssb_idx].transmitted = true; LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx); } - ssb_idx++; } - break; - default: AssertFatal(false,"ssb_PositionsInBurst not present\n"); break; } } else { // This is configuration from SIB1 + AssertFatal(mac->scc_SIB->ssb_PositionsInBurst.groupPresence == NULL, "Handle case for >8 SSBs\n"); ssb_bitmap = &mac->scc_SIB->ssb_PositionsInBurst.inOneGroup; + ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap); + LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); for (uint8_t bit_nb=7; bit_nb<=7; bit_nb--) { @@ -1608,7 +1677,6 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ssb_list.tx_ssb[ssb_idx].transmitted = true; LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx); } - ssb_idx++; } } @@ -1616,13 +1684,15 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { // Map the transmitted SSBs to the ROs and create the association pattern according to the config static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { + // Map SSBs to PRACH occasions // =========================== // WIP: Assumption: No PRACH occasion is rejected because of a conflict with SSBs or TDD_UL_DL_ConfigurationCommon schedule NR_RACH_ConfigCommon_t *setup = (mac->scc) ? - mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: - mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; + mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: + mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR ssb_perRACH_config = setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present; + boolean_t multiple_ssb_per_ro; // true if more than one or exactly one SSB per RACH occasion, false if more than one RO per SSB uint8_t ssb_rach_ratio; // Nb of SSBs per RACH or RACHs per SSB uint16_t required_nb_of_prach_occasion; // Nb of RACH occasions required to map all the SSBs @@ -1630,63 +1700,55 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { // Determine the SSB to RACH mapping ratio // ======================================= - switch (ssb_perRACH_config) { + switch (ssb_perRACH_config){ case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_oneEighth: multiple_ssb_per_ro = false; ssb_rach_ratio = 8; break; - case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_oneFourth: multiple_ssb_per_ro = false; ssb_rach_ratio = 4; break; - case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_oneHalf: multiple_ssb_per_ro = false; ssb_rach_ratio = 2; break; - case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one: multiple_ssb_per_ro = true; ssb_rach_ratio = 1; break; - case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_two: multiple_ssb_per_ro = true; ssb_rach_ratio = 2; break; - case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_four: multiple_ssb_per_ro = true; ssb_rach_ratio = 4; break; - case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_eight: multiple_ssb_per_ro = true; ssb_rach_ratio = 8; break; - case NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_sixteen: multiple_ssb_per_ro = true; ssb_rach_ratio = 16; break; - default: AssertFatal(1 == 0, "Unsupported ssb_perRACH_config %d\n", ssb_perRACH_config); break; } - LOG_D(NR_MAC,"SSB rach ratio %d, Multiple SSB per RO %d\n", ssb_rach_ratio, multiple_ssb_per_ro); + // Evaluate the number of PRACH configuration periods required to map all the SSBs and set the association period // ============================================================================================================== // WIP: Assumption for now is that all the PRACH configuration periods within a maximum association pattern period have the same number of PRACH occasions // (No PRACH occasions are conflicting with SSBs nor TDD_UL_DL_ConfigurationCommon schedule) // There is only one possible association period which can contain up to 16 PRACH configuration periods LOG_D(NR_MAC,"Evaluate the number of PRACH configuration periods required to map all the SSBs and set the association period\n"); - if (true == multiple_ssb_per_ro) { required_nb_of_prach_occasion = ((ssb_list.nb_tx_ssb-1) + ssb_rach_ratio) / ssb_rach_ratio; - } else { + } + else { required_nb_of_prach_occasion = ssb_list.nb_tx_ssb * ssb_rach_ratio; } @@ -1698,40 +1760,47 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { if (required_nb_of_prach_conf_period == 1) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 1; - } else if (required_nb_of_prach_conf_period == 2) { + } + else if (required_nb_of_prach_conf_period == 2) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 2; - } else if (required_nb_of_prach_conf_period <= 4) { + } + else if (required_nb_of_prach_conf_period <= 4) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 4; - } else if (required_nb_of_prach_conf_period <= 8) { + } + else if (required_nb_of_prach_conf_period <= 8) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 8; - } else if (required_nb_of_prach_conf_period <= 16) { + } + else if (required_nb_of_prach_conf_period <= 16) { prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period = 16; - } else { + } + else { AssertFatal(1 == 0, "Invalid number of PRACH config periods within an association period %d\n", required_nb_of_prach_conf_period); } prach_assoc_pattern.nb_of_assoc_period = 1; // WIP: only one possible association period - prach_assoc_pattern.prach_association_period_list[0].nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period * - prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame; + prach_assoc_pattern.prach_association_period_list[0].nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period * prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame; prach_assoc_pattern.nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_frame; + LOG_D(NR_MAC,"Assoc period %d, Nb of frames in assoc period %d\n", prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period, prach_assoc_pattern.prach_association_period_list[0].nb_of_frame); + // Proceed to the SSB to RO mapping // ================================ uint8_t association_period_idx; // Association period index within the association pattern uint8_t ssb_idx = 0; uint8_t prach_configuration_period_idx; // PRACH Configuration period index within the association pattern prach_conf_period_t *prach_conf_period_p; + // Map all the association periods within the association pattern period LOG_D(NR_MAC,"Proceed to the SSB to RO mapping\n"); - for (association_period_idx=0; association_period_idx ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro); + LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq); @@ -1804,26 +1875,32 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { } // for n_prach_conf // WIP: note that there is no re-mapping of the SSBs within the association period since there is no invalid ROs in the PRACH config periods that would create this situation + } // if multiple_ssbs_per_ro + else { // -------------------- // -------------------- // Multiple ROs per SSB // -------------------- // -------------------- + n_prach_conf = 0; // Go through the list of transmitted SSBs for (ssb_idx=0; ssb_idx %d\n", - ssb_idx,ssb_list.tx_ssb[ssb_idx].transmitted); + + LOG_D(NR_MAC,"Checking ssb_idx %d => %d\n", + ssb_idx,ssb_list.tx_ssb[ssb_idx].transmitted); // Map only the transmitted ssb_idx if (true == ssb_list.tx_ssb[ssb_idx].transmitted) { + // Map all the required ROs to this SSB // Go through the list of PRACH config periods within this association period for (; n_prach_confprach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_time; ro_in_time++) { for (; ro_in_freqprach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq; ro_in_freq++) { prach_occasion_info_t *ro_p = &prach_conf_period_p->prach_occasion_slot_map[frame][slot].prach_occasion[ro_in_time][ro_in_freq]; + ro_p->mapped_ssb_idx[0] = ssb_idx; ro_p->nb_mapped_ssb = 1; ssb_list.tx_ssb[ssb_idx].mapped_ro[ssb_list.tx_ssb[ssb_idx].nb_mapped_ro] = ro_p; @@ -1840,6 +1918,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { AssertFatal(MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN > ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro); nb_mapped_ro_in_association_period++; + LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq); @@ -1858,40 +1937,49 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { // Exit the loop if this SSB has been mapped to all the required ROs if (nb_mapped_ro_in_association_period == ssb_rach_ratio) { break; - } else ro_in_freq = 0; // else go to the next time symbol in that slot and reset the freq index + } + else ro_in_freq = 0; // else go to the next time symbol in that slot and reset the freq index } // for ro_in_time // Exit the loop if this SSB has been mapped to all the required ROs if (nb_mapped_ro_in_association_period == ssb_rach_ratio) { break; - } else ro_in_time = 0; // else go to the next slot in that PRACH config period and reset the symbol index + } + else ro_in_time = 0; // else go to the next slot in that PRACH config period and reset the symbol index } // for slot // Exit the loop if this SSB has been mapped to all the required ROs if (nb_mapped_ro_in_association_period == ssb_rach_ratio) { break; - } else slot = 0; // else go to the next frame in that PRACH config period and reset the slot index + } + else slot = 0; // else go to the next frame in that PRACH config period and reset the slot index } // for frame // Exit the loop if this SSB has been mapped to all the required ROs if (nb_mapped_ro_in_association_period == ssb_rach_ratio) { break; - } else frame = 0; // else go to the next PRACH config period in that association period and reset the frame index + } + else frame = 0; // else go to the next PRACH config period in that association period and reset the frame index } // for n_prach_conf + } // if ssb_idx is transmitted } // for ssb_idx } // else if multiple_ssbs_per_ro + } // for association_period_index } // Returns a RACH occasion if any matches the SSB idx, the frame and the slot static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, - int frame, - int slot, - prach_occasion_info_t **prach_occasion_info_pp) { + int frame, + int slot, + prach_occasion_info_t **prach_occasion_info_pp) { + ssb_info_t *ssb_info_p; prach_occasion_slot_t *prach_occasion_slot_p = NULL; + *prach_occasion_info_pp = NULL; + // Search for a matching RO slot in the SSB_to_RO map // A valid RO slot will match: // - ssb_idx mapped to one of the ROs in that RO slot @@ -1899,13 +1987,12 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, // - frame offset ssb_info_p = &ssb_list.tx_ssb[ssb_idx]; LOG_D(NR_MAC,"checking for prach : ssb_info_p->nb_mapped_ro %d\n",ssb_info_p->nb_mapped_ro); - for (uint8_t n_mapped_ro=0; n_mapped_ronb_mapped_ro; n_mapped_ro++) { LOG_D(NR_MAC,"%d.%d: mapped_ro[%d]->frame.slot %d.%d, prach_assoc_pattern.nb_of_frame %d\n", frame,slot,n_mapped_ro,ssb_info_p->mapped_ro[n_mapped_ro]->frame,ssb_info_p->mapped_ro[n_mapped_ro]->slot,prach_assoc_pattern.nb_of_frame); - if ((slot == ssb_info_p->mapped_ro[n_mapped_ro]->slot) && (ssb_info_p->mapped_ro[n_mapped_ro]->frame == (frame % prach_assoc_pattern.nb_of_frame))) { + uint8_t prach_config_period_nb = ssb_info_p->mapped_ro[n_mapped_ro]->frame / prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame; uint8_t frame_nb_in_prach_config_period = ssb_info_p->mapped_ro[n_mapped_ro]->frame % prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame; prach_occasion_slot_p = &prach_assoc_pattern.prach_conf_period_list[prach_config_period_nb].prach_occasion_slot_map[frame_nb_in_prach_config_period][slot]; @@ -1913,8 +2000,10 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, } // If there is a matching RO slot in the SSB_to_RO map - if (NULL != prach_occasion_slot_p) { + if (NULL != prach_occasion_slot_p) + { // A random RO mapped to the SSB index should be selected in the slot + // First count the number of times the SSB index is found in that RO uint8_t nb_mapped_ssb = 0; @@ -1932,10 +2021,11 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, // Choose a random SSB nb uint8_t random_ssb_nb = 0; + random_ssb_nb = ((taus()) % nb_mapped_ssb); + // Select the RO according to the chosen random SSB nb nb_mapped_ssb=0; - for (int ro_in_time=0; ro_in_time < prach_occasion_slot_p->nb_of_prach_occasion_in_time; ro_in_time++) { for (int ro_in_freq=0; ro_in_freq < prach_occasion_slot_p->nb_of_prach_occasion_in_freq; ro_in_freq++) { prach_occasion_info_t *prach_occasion_info_p = &prach_occasion_slot_p->prach_occasion[ro_in_time][ro_in_freq]; @@ -1945,7 +2035,8 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, if (nb_mapped_ssb == random_ssb_nb) { *prach_occasion_info_pp = prach_occasion_info_p; return 1; - } else { + } + else { nb_mapped_ssb++; } } @@ -1959,15 +2050,19 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, // Build the SSB to RO mapping upon RRC configuration update void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac) { + // Clear all the lists and maps memset(&prach_assoc_pattern, 0, sizeof(prach_association_pattern_t)); memset(&ssb_list, 0, sizeof(ssb_list_info_t)); + // Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config LOG_D(NR_MAC,"Build RO list\n"); build_ro_list(mac); + // Build the list of all the valid/transmitted SSBs according to the config LOG_D(NR_MAC,"Build SSB list\n"); build_ssb_list(mac); + // Map the transmitted SSBs to the ROs and create the association pattern according to the config LOG_D(NR_MAC,"Map SSB to RO\n"); map_ssb_to_ro(mac); @@ -1976,11 +2071,13 @@ void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac) { void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, int thread_id) { + NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); int O_SR = 0; int O_ACK = 0; int O_CSI = 0; int N_UCI = 0; + PUCCH_sched_t *pucch = calloc(1,sizeof(*pucch)); pucch->resource_indicator = -1; pucch->initial_pucch_id = -1; @@ -2001,6 +2098,7 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in // ACKNACK O_ACK = get_downlink_ack(mac, frameP, slotP, pucch); + NR_BWP_Id_t bwp_id = mac->UL_BWP_Id; NR_PUCCH_Config_t *pucch_Config = NULL; @@ -2010,16 +2108,18 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config && mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) { pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup; - } else if (bwp_id==0 && - mac->cg && - mac->cg->spCellConfig && - mac->cg->spCellConfig->spCellConfigDedicated && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && - mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { - pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; } + else if (bwp_id==0 && + mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { + pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; + } + // if multiplexing of HARQ and CSI is not possible, transmit only HARQ bits if ((O_ACK != 0) && (O_CSI != 0) && @@ -2038,6 +2138,7 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in return; if (N_UCI > 0) { + pucch->resource_set_id = find_pucch_resource_set(mac, N_UCI); select_pucch_resource(mac, pucch); fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slotP); @@ -2051,10 +2152,10 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in fill_ul_config(ul_config, frameP, slotP, FAPI_NR_UL_CONFIG_TYPE_PUCCH); nr_scheduled_response_t scheduled_response; fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id); - if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); } + } // This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x @@ -2062,59 +2163,73 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in // - todo: // - Partial configuration is actually already stored in (fapi_nr_prach_config_t) &mac->phy_config.config_req->prach_config void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int thread_id) { + uint16_t format, format0, format1, ncs; int is_nr_prach_slot; prach_occasion_info_t *prach_occasion_info_p; + NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); RA_config_t *ra = &mac->ra; + //fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slotP); fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request[0]; fapi_nr_ul_config_prach_pdu *prach_config_pdu; fapi_nr_config_request_t *cfg = &mac->phy_config.config_req; fapi_nr_prach_config_t *prach_config = &cfg->prach_config; nr_scheduled_response_t scheduled_response; + NR_ServingCellConfigCommon_t *scc = mac->scc; NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB; NR_RACH_ConfigCommon_t *setup; - if (scc!=NULL) setup = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup; else setup = scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; - NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; + ra->RA_offset = 2; // to compensate the rx frame offset at the gNB ra->generate_nr_prach = GENERATE_IDLE; // Reset flag for PRACH generation NR_TDD_UL_DL_ConfigCommon_t *tdd_config = scc==NULL ? scc_SIB->tdd_UL_DL_ConfigurationCommon : scc->tdd_UL_DL_ConfigurationCommon; if (is_nr_UL_slot(tdd_config, slotP, mac->frame_type)) { + // WIP Need to get the proper selected ssb_idx // Initial beam selection functionality is not available yet uint8_t selected_gnb_ssb_idx = mac->mib_ssb; + // Get any valid PRACH occasion in the current slot for the selected SSB index is_nr_prach_slot = get_nr_prach_info_from_ssb_index(selected_gnb_ssb_idx, - (int)frameP, - (int)slotP, - &prach_occasion_info_p); + (int)frameP, + (int)slotP, + &prach_occasion_info_p); if (is_nr_prach_slot && ra->ra_state == RA_UE_IDLE) { AssertFatal(NULL != prach_occasion_info_p,"PRACH Occasion Info not returned in a valid NR Prach Slot\n"); + ra->generate_nr_prach = GENERATE_PREAMBLE; + format = prach_occasion_info_p->format; format0 = format & 0xff; // single PRACH format format1 = (format >> 8) & 0xff; // dual PRACH format + prach_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].prach_config_pdu; memset(prach_config_pdu, 0, sizeof(fapi_nr_ul_config_prach_pdu)); + fill_ul_config(ul_config, frameP, slotP, FAPI_NR_UL_CONFIG_TYPE_PRACH); + LOG_D(PHY, "In %s: (%p) %d UL PDUs:\n", __FUNCTION__, ul_config, ul_config->number_pdus); + ncs = get_NCS(rach_ConfigGeneric->zeroCorrelationZoneConfig, format0, setup->restrictedSetConfig); + prach_config_pdu->phys_cell_id = mac->physCellId; prach_config_pdu->num_prach_ocas = 1; prach_config_pdu->prach_slot = prach_occasion_info_p->slot; prach_config_pdu->prach_start_symbol = prach_occasion_info_p->start_symbol; prach_config_pdu->num_ra = prach_occasion_info_p->fdm; + prach_config_pdu->num_cs = ncs; prach_config_pdu->root_seq_id = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].prach_root_sequence_index; prach_config_pdu->restricted_set = prach_config->restricted_set_config; prach_config_pdu->freq_msg1 = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].k1; + LOG_D(NR_MAC,"Selected RO Frame %u, Slot %u, Symbol %u, Fdm %u\n", frameP, prach_config_pdu->prach_slot, prach_config_pdu->prach_start_symbol, prach_config_pdu->num_ra); // Search which SSB is mapped in the RO (among all the SSBs mapped to this RO) @@ -2122,7 +2237,6 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s if (prach_occasion_info_p->mapped_ssb_idx[prach_config_pdu->ssb_nb_in_ro] == selected_gnb_ssb_idx) break; } - AssertFatal(prach_config_pdu->ssb_nb_in_ronb_mapped_ssb, "%u not found in the mapped SSBs to the PRACH occasion", selected_gnb_ssb_idx); if (format1 != 0xff) { @@ -2130,71 +2244,55 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s case 0xa1: prach_config_pdu->prach_format = 11; break; - case 0xa2: prach_config_pdu->prach_format = 12; break; - case 0xa3: prach_config_pdu->prach_format = 13; break; - - default: - AssertFatal(1 == 0, "Only formats A1/B1 A2/B2 A3/B3 are valid for dual format"); + default: + AssertFatal(1 == 0, "Only formats A1/B1 A2/B2 A3/B3 are valid for dual format"); } } else { switch(format0) { // single PRACH format case 0: prach_config_pdu->prach_format = 0; break; - case 1: prach_config_pdu->prach_format = 1; break; - case 2: prach_config_pdu->prach_format = 2; break; - case 3: prach_config_pdu->prach_format = 3; break; - case 0xa1: prach_config_pdu->prach_format = 4; break; - case 0xa2: prach_config_pdu->prach_format = 5; break; - case 0xa3: prach_config_pdu->prach_format = 6; break; - case 0xb1: prach_config_pdu->prach_format = 7; break; - case 0xb4: prach_config_pdu->prach_format = 8; break; - case 0xc0: prach_config_pdu->prach_format = 9; break; - case 0xc2: prach_config_pdu->prach_format = 10; break; - default: AssertFatal(1 == 0, "Invalid PRACH format"); } } // if format1 - fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id); - if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); } // is_nr_prach_slot @@ -2210,13 +2308,16 @@ void nr_ue_sib1_scheduler(module_id_t module_idP, uint32_t ssb_index, uint16_t ssb_start_subcarrier, frequency_range_t frequency_range) { + NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); nr_scheduled_response_t scheduled_response; int frame_s,slot_s,ret; fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15; + uint8_t scs_ssb = get_softmodem_params()->numerology; uint16_t ssb_offset_point_a = (ssb_start_subcarrier - ssb_subcarrier_offset)/12; + get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config, frame, mac->mib, @@ -2230,13 +2331,12 @@ void nr_ue_sib1_scheduler(module_id_t module_idP, ssb_offset_point_a); if(mac->search_space_zero == NULL) mac->search_space_zero=calloc(1,sizeof(*mac->search_space_zero)); - if(mac->coreset0 == NULL) mac->coreset0 = calloc(1,sizeof(*mac->coreset0)); for (int i=0; i<3; i++) { // loop over possible aggregation levels + fill_coresetZero(mac->coreset0, &mac->type0_PDCCH_CSS_config); ret = fill_searchSpaceZero(mac->search_space_zero, &mac->type0_PDCCH_CSS_config,4<dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; rel15->num_dci_options = 1; @@ -2244,28 +2344,27 @@ void nr_ue_sib1_scheduler(module_id_t module_idP, config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1); fill_dci_search_candidates(mac->search_space_zero, rel15); - if(mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern == 1) { + if(mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern == 1){ // same frame as ssb if ((mac->type0_PDCCH_CSS_config.frame & 0x1) == mac->type0_PDCCH_CSS_config.sfn_c) frame_s = 0; else frame_s = 1; - slot_s = mac->type0_PDCCH_CSS_config.n_0; - } else { + } + else{ frame_s = 0; // same frame as ssb slot_s = mac->type0_PDCCH_CSS_config.n_c; } - LOG_D(MAC,"Calling fill_scheduled_response, type0_pdcch, num_pdus %d\n",dl_config->number_pdus); fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, module_idP, cc_id, frame_s, slot_s, 0); // TODO fix thread_id, for now assumed 0 } } - if (dl_config->number_pdus) { if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) mac->if_module->scheduled_response(&scheduled_response); - } else + } + else AssertFatal(1==0,"Unable to find aggregation level for type0 CSS\n"); } @@ -2289,6 +2388,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, uint8_t gNB_index, uint8_t *ulsch_buffer, uint16_t buflen) { + int16_t buflen_remain = 0; uint8_t bsr_len = 0, bsr_ce_len = 0, bsr_header_len = 0; //uint8_t phr_header_len = 0, phr_ce_len = 0, phr_len = 0; @@ -2313,8 +2413,10 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, //int highest_priority = 16; int num_lcg_id_with_data = 0; const uint8_t sh_size = sizeof(NR_MAC_SUBHEADER_LONG); + // Pointer used to build the MAC PDU by placing the RLC SDUs in the ULSCH buffer uint8_t *pdu = ulsch_buffer; + // Preparing the MAC CEs sub-PDUs and get the total size bsr_header_len = 0; //phr_header_len = 1; //sizeof(SCH_SUBHEADER_FIXED); @@ -2372,13 +2474,16 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, bsr_len = bsr_ce_len + bsr_header_len; int tot_mac_ce_len = bsr_len + phr_len; uint8_t total_mac_pdu_header_len = tot_mac_ce_len; + LOG_D(NR_MAC, "In %s: [UE %d] [%d.%d] process UL transport block at with size TBS = %d bytes \n", __FUNCTION__, module_idP, frameP, subframe, buflen); // Check for DCCH first // TO DO: Multiplex in the order defined by the logical channel prioritization for (lcid = UL_SCH_LCID_SRB1; lcid < MAX_LCID; lcid++) { + buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total + sh_size); + LOG_D(NR_MAC, "In %s: [UE %d] [%d.%d] UL-DXCH -> ULSCH, RLC with LCID 0x%02x (TBS %d bytes, sdu_length_total %d bytes, MAC header len %d bytes, buflen_remain %d bytes)\n", __FUNCTION__, module_idP, @@ -2390,10 +2495,13 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, tot_mac_ce_len, buflen_remain); - while (buflen_remain > 0) { + while (buflen_remain > 0){ + // Pointer used to build the MAC sub-PDU headers in the ULSCH buffer for each SDU NR_MAC_SUBHEADER_LONG *header = (NR_MAC_SUBHEADER_LONG *) pdu; + pdu += sh_size; + sdu_length = mac_rlc_data_req(module_idP, mac->crnti, gNB_index, @@ -2405,6 +2513,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, (char *)pdu, 0, 0); + AssertFatal(buflen_remain >= sdu_length, "In %s: LCID = 0x%02x RLC has segmented %d bytes but MAC has max %d remaining bytes\n", __FUNCTION__, lcid, @@ -2412,26 +2521,32 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, buflen_remain); if (sdu_length > 0) { + LOG_D(NR_MAC, "In %s: Generating UL MAC sub-PDU for SDU %d, length %d bytes, RB with LCID 0x%02x (buflen (TBS) %d bytes)\n", __FUNCTION__, - num_sdus + 1, - sdu_length, - lcid, - buflen); + num_sdus + 1, + sdu_length, + lcid, + buflen); + header->R = 0; header->F = 1; header->LCID = lcid; header->L1 = ((unsigned short) sdu_length >> 8) & 0x7f; header->L2 = (unsigned short) sdu_length & 0xff; -#ifdef ENABLE_MAC_PAYLOAD_DEBUG + + #ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: dumping MAC sub-header with length %d: \n", __FUNCTION__, sh_size); log_dump(NR_MAC, header, sh_size, LOG_DUMP_CHAR, "\n"); LOG_I(NR_MAC, "In %s: dumping MAC SDU with length %d \n", __FUNCTION__, sdu_length); log_dump(NR_MAC, pdu, sdu_length, LOG_DUMP_CHAR, "\n"); -#endif + #endif + pdu += sdu_length; sdu_length_total += sdu_length; total_mac_pdu_header_len += sh_size; + num_sdus++; + } else { pdu -= sh_size; LOG_D(NR_MAC, "In %s: no data to transmit for RB with LCID 0x%02x\n", __FUNCTION__, lcid); @@ -2439,6 +2554,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total + sh_size); + //Update Buffer remain and BSR bytes after transmission mac->scheduling_info.LCID_buffer_remain[lcid] -= sdu_length; mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] -= sdu_length; @@ -2446,7 +2562,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, "[UE %d] Update BSR [%d.%d] num_lcg_id_with_data %d. BSR_bytes for LCG%d=%d\n", module_idP, frameP, subframe, num_lcg_id_with_data, mac->scheduling_info.LCGID[lcid], mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]]); - if (mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] < 0) mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] = 0; @@ -2466,18 +2581,17 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, lcg_id_bsr_trunc = 0; for (lcg_id = 0; lcg_id < NR_MAX_NUM_LCGID; lcg_id++) { - if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { + if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { mac->scheduling_info.BSR[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE, NR_SHORT_BSR_TABLE_SIZE, - mac->scheduling_info. - BSR_bytes[lcg_id]); - } else { + mac->scheduling_info. + BSR_bytes[lcg_id]); + } else { mac->scheduling_info.BSR[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE, NR_LONG_BSR_TABLE_SIZE, - mac->scheduling_info. - BSR_bytes[lcg_id]); - } - + mac->scheduling_info. + BSR_bytes[lcg_id]); + } if (mac->scheduling_info.BSR_bytes[lcg_id]) { num_lcg_id_with_data++; lcg_id_bsr_trunc = lcg_id; @@ -2514,8 +2628,8 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // REPORT SHORT TRUNCATED BSR //Get LCGID of highest priority LCID with data for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { - // if (mac-> - // logicalChannelConfig[lcid] != NULL) { +// if (mac-> +// logicalChannelConfig[lcid] != NULL) { if (1) { // todo lcg_id = mac->scheduling_info. @@ -2525,14 +2639,14 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, && (mac-> scheduling_info.BSR_bytes[lcg_id]) && - // (mac->logicalChannelConfig - // [lcid]->ul_SpecificParameters->priority <= - // highest_priority)) { +// (mac->logicalChannelConfig +// [lcid]->ul_SpecificParameters->priority <= +// highest_priority)) { (1)) { //todo - // highest_priority = - // mac-> - // logicalChannelConfig[lcid]-> - // ul_SpecificParameters->priority; +// highest_priority = +// mac-> +// logicalChannelConfig[lcid]-> +// ul_SpecificParameters->priority; lcg_id_bsr_trunc = lcg_id; } } @@ -2622,26 +2736,32 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } if (tot_mac_ce_len > 0) { + LOG_D(NR_MAC, "In %s copying %d bytes of MAC CEs to the UL PDU \n", __FUNCTION__, tot_mac_ce_len); nr_write_ce_ulsch_pdu(pdu, mac, 0, NULL, bsr_t, bsr_s, bsr_l); pdu += (unsigned char) tot_mac_ce_len; -#ifdef ENABLE_MAC_PAYLOAD_DEBUG + + #ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: dumping MAC CE with length tot_mac_ce_len %d: \n", __FUNCTION__, tot_mac_ce_len); log_dump(NR_MAC, mac_header_control_elements, tot_mac_ce_len, LOG_DUMP_CHAR, "\n"); -#endif + #endif + } buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total); // Compute final offset for padding and fill remainder of ULSCH with 0 if (buflen_remain > 0) { - LOG_D(NR_MAC, "In %s filling remainder %d bytes to the UL PDU \n", __FUNCTION__, buflen_remain); + + LOG_D(NR_MAC, "In %s filling remainder %d bytes to the UL PDU \n", __FUNCTION__, buflen_remain); ((NR_MAC_SUBHEADER_FIXED *) pdu)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) pdu)->LCID = UL_SCH_LCID_PADDING; -#ifdef ENABLE_MAC_PAYLOAD_DEBUG + + #ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: padding MAC sub-header with length %ld bytes \n", __FUNCTION__, sizeof(NR_MAC_SUBHEADER_FIXED)); log_dump(NR_MAC, pdu, sizeof(NR_MAC_SUBHEADER_FIXED), LOG_DUMP_CHAR, "\n"); -#endif + #endif + pdu++; buflen_remain--; @@ -2653,16 +2773,18 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, memset(pdu, 0, buflen_remain); } -#ifdef ENABLE_MAC_PAYLOAD_DEBUG + #ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: MAC padding sub-PDU with length %d bytes \n", __FUNCTION__, buflen_remain); log_dump(NR_MAC, pdu, buflen_remain, LOG_DUMP_CHAR, "\n"); -#endif + #endif + } -#ifdef ENABLE_MAC_PAYLOAD_DEBUG + #ifdef ENABLE_MAC_PAYLOAD_DEBUG LOG_I(NR_MAC, "In %s: dumping MAC PDU with length %d: \n", __FUNCTION__, buflen); log_dump(NR_MAC, ulsch_buffer, buflen, LOG_DUMP_CHAR, "\n"); -#endif + #endif + LOG_D(NR_MAC, "[UE %d][SR] Gave SDU to PHY, clearing any scheduling request\n", module_idP); @@ -2677,7 +2799,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // Reset ReTx BSR Timer mac->scheduling_info.retxBSR_SF = nr_get_sf_retxBSRTimer(mac-> - scheduling_info.retxBSR_Timer); + scheduling_info.retxBSR_Timer); LOG_D(NR_MAC, "[UE %d] MAC ReTx BSR Timer Reset =%d\n", module_idP, mac->scheduling_info.retxBSR_SF); @@ -2687,7 +2809,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity)) { mac->scheduling_info.periodicBSR_SF = nr_get_sf_periodicBSRTimer(mac->scheduling_info. - periodicBSR_Timer); + periodicBSR_Timer); LOG_D(NR_MAC, "[UE %d] MAC Periodic BSR Timer Reset =%d\n", module_idP, mac->scheduling_info.periodicBSR_SF); @@ -2698,4 +2820,5 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } return num_sdus > 0 ? 1 : 0; + } From 5e50a8cc1da8f3fd729661fc2266bb5466d5d83f Mon Sep 17 00:00:00 2001 From: mjoang Date: Sat, 9 Oct 2021 14:37:45 -0400 Subject: [PATCH 057/102] remove newlines, add space after comma, fix identation --- openair2/LAYER2/NR_MAC_UE/mac_proto.h | 2 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 111 +++--------- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 172 +++++-------------- 3 files changed, 74 insertions(+), 211 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index 9e89c34730..428305e4c4 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -236,7 +236,7 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, NR_UE_MAC_INST_t *mac, uint8_t power_headroom, // todo: NR_POWER_HEADROOM_CMD *power_headroom, - uint16_t *crnti, + uint16_t *crnti, NR_BSR_SHORT *truncated_bsr, NR_BSR_SHORT *short_bsr, NR_BSR_LONG *long_bsr diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 8adc552bd2..f26472e0cf 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -142,48 +142,32 @@ void nr_ue_init_mac(module_id_t module_idP) { // default values as deined in 38.331 sec 9.2.2 LOG_I(NR_MAC, "[UE%d] Applying default macMainConfig\n", module_idP); //mac->scheduling_info.macConfig=NULL; - mac->scheduling_info.retxBSR_Timer = - NR_BSR_Config__retxBSR_Timer_sf10240; - mac->scheduling_info.periodicBSR_Timer = - NR_BSR_Config__periodicBSR_Timer_infinity; -// mac->scheduling_info.periodicPHR_Timer = -// NR_MAC_MainConfig__phr_Config__setup__periodicPHR_Timer_sf20; -// mac->scheduling_info.prohibitPHR_Timer = -// NR_MAC_MainConfig__phr_Config__setup__prohibitPHR_Timer_sf20; -// mac->scheduling_info.PathlossChange_db = -// NR_MAC_MainConfig__phr_Config__setup__dl_PathlossChange_dB1; -// mac->PHR_state = -// NR_MAC_MainConfig__phr_Config_PR_setup; + mac->scheduling_info.retxBSR_Timer = NR_BSR_Config__retxBSR_Timer_sf10240; + mac->scheduling_info.periodicBSR_Timer = NR_BSR_Config__periodicBSR_Timer_infinity; +// mac->scheduling_info.periodicPHR_Timer = NR_MAC_MainConfig__phr_Config__setup__periodicPHR_Timer_sf20; +// mac->scheduling_info.prohibitPHR_Timer = NR_MAC_MainConfig__phr_Config__setup__prohibitPHR_Timer_sf20; +// mac->scheduling_info.PathlossChange_db = NR_MAC_MainConfig__phr_Config__setup__dl_PathlossChange_dB1; +// mac->PHR_state = NR_MAC_MainConfig__phr_Config_PR_setup; mac->scheduling_info.SR_COUNTER = 0; mac->scheduling_info.sr_ProhibitTimer = 0; mac->scheduling_info.sr_ProhibitTimer_Running = 0; -// mac->scheduling_info.maxHARQ_Tx = -// NR_MAC_MainConfig__ul_SCH_Config__maxHARQ_Tx_n5; +// mac->scheduling_info.maxHARQ_Tx = NR_MAC_MainConfig__ul_SCH_Config__maxHARQ_Tx_n5; // mac->scheduling_info.ttiBundling = 0; // mac->scheduling_info.extendedBSR_Sizes_r10 = 0; // mac->scheduling_info.extendedPHR_r10 = 0; // mac->scheduling_info.drx_config = NULL; // mac->scheduling_info.phr_config = NULL; // set init value 0xFFFF, make sure periodic timer and retx time counters are NOT active, after bsr transmission set the value configured by the NW. - mac->scheduling_info.periodicBSR_SF = - MAC_UE_BSR_TIMER_NOT_RUNNING; - mac->scheduling_info.retxBSR_SF = - MAC_UE_BSR_TIMER_NOT_RUNNING; + mac->scheduling_info.periodicBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING; + mac->scheduling_info.retxBSR_SF = MAC_UE_BSR_TIMER_NOT_RUNNING; mac->BSR_reporting_active = BSR_TRIGGER_NONE; -// mac->scheduling_info.periodicPHR_SF = -// nr_get_sf_perioidicPHR_Timer(mac-> -// scheduling_info.periodicPHR_Timer); -// mac->scheduling_info.prohibitPHR_SF = -// nr_get_sf_prohibitPHR_Timer(mac-> -// scheduling_info.prohibitPHR_Timer); -// mac->scheduling_info.PathlossChange_db = -// nr_get_db_dl_PathlossChange(mac-> -// scheduling_info.PathlossChange); +// mac->scheduling_info.periodicPHR_SF = nr_get_sf_perioidicPHR_Timer(mac->scheduling_info.periodicPHR_Timer); +// mac->scheduling_info.prohibitPHR_SF = nr_get_sf_prohibitPHR_Timer(mac->scheduling_info.prohibitPHR_Timer); +// mac->scheduling_info.PathlossChange_db = nr_get_db_dl_PathlossChange(mac->scheduling_info.PathlossChange); // mac->PHR_reporting_active = 0; for (i = 0; i < NR_MAX_NUM_LCID; i++) { - LOG_D(NR_MAC, - "[UE%d] Applying default logical channel config for LCGID %d\n", + LOG_D(NR_MAC, "[UE%d] Applying default logical channel config for LCGID %d\n", module_idP, i); mac->scheduling_info.Bj[i] = -1; mac->scheduling_info.bucket_size[i] = -1; @@ -194,8 +178,7 @@ void nr_ue_init_mac(module_id_t module_idP) { mac->scheduling_info.LCGID[i] = 1; } - mac->scheduling_info.LCID_status[i] = - LCID_EMPTY; + mac->scheduling_info.LCID_status[i] = LCID_EMPTY; mac->scheduling_info.LCID_buffer_remain[i] = 0; for (int i=0;ifirst_ul_tx[i]=1; } @@ -2216,52 +2199,18 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){ DevCheck(module_idP < (int) NB_UE_INST, module_idP, NB_NR_UE_MAC_INST, 0); NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); DSR_TRANSMAX_t dsr_TransMax = sr_n64; // todo - LOG_D(NR_MAC, - "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", + LOG_D(NR_MAC, "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n", module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, - (1 << - (2 + -// mac-> -// physicalConfigDedicated->schedulingRequestConfig->choice. -// setup.dsr_TransMax)), - dsr_TransMax)), + (1 << (2 + dsr_TransMax)), mac->scheduling_info.SR_pending); // todo -/* - if ((mac->scheduling_info.sr_ProhibitTimer_Running == 0)) { - mac->scheduling_info.SR_pending = 1; - LOG_D(NR_MAC, - "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n", - module_idP, frameP, slot, - mac->scheduling_info.SR_COUNTER, - (1 << - (2 + -// mac-> -// physicalConfigDedicated->schedulingRequestConfig->choice. -// setup.dsr_TransMax)), - dsr_TransMax)), - mac->scheduling_info.SR_pending); // todo - return (0); - } -*/ // todo + if ((mac->scheduling_info.SR_pending == 1) && - (mac->scheduling_info.SR_COUNTER < - (1 << - (2 + - //mac-> - //physicalConfigDedicated->schedulingRequestConfig->choice.setup. - //dsr_TransMax)))) { - dsr_TransMax)))) { - LOG_D(NR_MAC, - "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n", + (mac->scheduling_info.SR_COUNTER < (1 << (2 + dsr_TransMax)))) { + LOG_D(NR_MAC, "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n", module_idP, frameP, slot, mac->scheduling_info.SR_COUNTER, - (1 << - (2 + - //mac-> - //physicalConfigDedicated->schedulingRequestConfig->choice. - //setup.dsr_TransMax)), - dsr_TransMax)), + (1 << (2 + dsr_TransMax)), mac->scheduling_info.SR_pending); // todo mac->scheduling_info.SR_COUNTER++; @@ -3555,7 +3504,7 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info, int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, NR_UE_MAC_INST_t *mac, uint8_t power_headroom, // todo: NR_POWER_HEADROOM_CMD *power_headroom, - uint16_t *crnti, + uint16_t *crnti, NR_BSR_SHORT *truncated_bsr, NR_BSR_SHORT *short_bsr, NR_BSR_LONG *long_bsr) { @@ -3581,7 +3530,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : power_headroom pdu %p mac_ce %p b\n", - pdu, mac_ce); + pdu, mac_ce); } if (crnti && (!get_softmodem_params()->sa && get_softmodem_params()->do_ra && mac->ra.ra_state != RA_SUCCEEDED)) { @@ -3619,7 +3568,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : truncated_bsr Buffer_size %d LcgID %d pdu %p mac_ce %p\n", - truncated_bsr->Buffer_size, truncated_bsr->LcgID, pdu, mac_ce); + truncated_bsr->Buffer_size, truncated_bsr->LcgID, pdu, mac_ce); } else if (short_bsr) { @@ -3637,7 +3586,7 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, mac_ce += mac_ce_size; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_FIXED); LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : short_bsr Buffer_size %d LcgID %d pdu %p mac_ce %p\n", - short_bsr->Buffer_size, short_bsr->LcgID, pdu, mac_ce); + short_bsr->Buffer_size, short_bsr->LcgID, pdu, mac_ce); } else if (long_bsr) { // MAC CE variable subheader @@ -3657,61 +3606,53 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce, } else { ((NR_BSR_LONG *) mac_ce)->LcgID0 = 1; *Buffer_size_ptr++ = long_bsr->Buffer_size0; - //NR_BSR_LONG_SIZE++; } if (long_bsr->Buffer_size1 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID1 = 0; } else { ((NR_BSR_LONG *) mac_ce)->LcgID1 = 1; *Buffer_size_ptr++ = long_bsr->Buffer_size1; - //NR_BSR_LONG_SIZE++; } if (long_bsr->Buffer_size2 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID2 = 0; } else { ((NR_BSR_LONG *) mac_ce)->LcgID2 = 1; *Buffer_size_ptr++ = long_bsr->Buffer_size2; - //NR_BSR_LONG_SIZE++; } if (long_bsr->Buffer_size3 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID3 = 0; } else { ((NR_BSR_LONG *) mac_ce)->LcgID3 = 1; *Buffer_size_ptr++ = long_bsr->Buffer_size3; - //NR_BSR_LONG_SIZE++; } if (long_bsr->Buffer_size4 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID4 = 0; } else { ((NR_BSR_LONG *) mac_ce)->LcgID4 = 1; *Buffer_size_ptr++ = long_bsr->Buffer_size4; - //NR_BSR_LONG_SIZE++; } if (long_bsr->Buffer_size5 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID5 = 0; } else { ((NR_BSR_LONG *) mac_ce)->LcgID5 = 1; *Buffer_size_ptr++ = long_bsr->Buffer_size5; - //NR_BSR_LONG_SIZE++; } if (long_bsr->Buffer_size6 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID6 = 0; } else { ((NR_BSR_LONG *) mac_ce)->LcgID6 = 1; *Buffer_size_ptr++ = long_bsr->Buffer_size6; - //NR_BSR_LONG_SIZE++; } if (long_bsr->Buffer_size7 == 0) { ((NR_BSR_LONG *) mac_ce)->LcgID7 = 0; } else { ((NR_BSR_LONG *) mac_ce)->LcgID7 = 1; *Buffer_size_ptr++ = long_bsr->Buffer_size7; - //NR_BSR_LONG_SIZE++; } ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_subheader_ptr)->L = mac_ce_size = (uint8_t*) Buffer_size_ptr - (uint8_t*) mac_ce; LOG_D(NR_MAC, "[UE] Generating ULSCH PDU : long_bsr size %d Lcgbit 0x%02x Buffer_size %d %d %d %d %d %d %d %d\n", mac_ce_size, *((uint8_t*) mac_ce), - ((NR_BSR_LONG *) mac_ce)->Buffer_size0, ((NR_BSR_LONG *) mac_ce)->Buffer_size1, ((NR_BSR_LONG *) mac_ce)->Buffer_size2, ((NR_BSR_LONG *) mac_ce)->Buffer_size3, - ((NR_BSR_LONG *) mac_ce)->Buffer_size4, ((NR_BSR_LONG *) mac_ce)->Buffer_size5, ((NR_BSR_LONG *) mac_ce)->Buffer_size6, ((NR_BSR_LONG *) mac_ce)->Buffer_size7); + ((NR_BSR_LONG *) mac_ce)->Buffer_size0, ((NR_BSR_LONG *) mac_ce)->Buffer_size1, ((NR_BSR_LONG *) mac_ce)->Buffer_size2, ((NR_BSR_LONG *) mac_ce)->Buffer_size3, + ((NR_BSR_LONG *) mac_ce)->Buffer_size4, ((NR_BSR_LONG *) mac_ce)->Buffer_size5, ((NR_BSR_LONG *) mac_ce)->Buffer_size6, ((NR_BSR_LONG *) mac_ce)->Buffer_size7); // update pointer and length mac_ce = Buffer_size_ptr; mac_ce_len += mac_ce_size + sizeof(NR_MAC_SUBHEADER_SHORT); diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 4f231b40ca..458f07ab27 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -1002,7 +1002,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in } if (dl_info) { - return (CONNECTION_OK); + return (CONNECTION_OK); } module_id_t mod_id = ul_info->module_id; frame_t txFrameP = ul_info->frame_tx; @@ -1016,16 +1016,12 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in // First check ReTxBSR Timer because it is always configured // Decrement ReTxBSR Timer if it is running and not null - if ((mac->scheduling_info.retxBSR_SF != - MAC_UE_BSR_TIMER_NOT_RUNNING) - && (mac->scheduling_info.retxBSR_SF != 0)) { + if ((mac->scheduling_info.retxBSR_SF != MAC_UE_BSR_TIMER_NOT_RUNNING) && (mac->scheduling_info.retxBSR_SF != 0)) { mac->scheduling_info.retxBSR_SF--; } // Decrement Periodic Timer if it is running and not null - if ((mac->scheduling_info.periodicBSR_SF != - MAC_UE_BSR_TIMER_NOT_RUNNING) - && (mac->scheduling_info.periodicBSR_SF != 0)) { + if ((mac->scheduling_info.periodicBSR_SF != MAC_UE_BSR_TIMER_NOT_RUNNING) && (mac->scheduling_info.periodicBSR_SF != 0)) { mac->scheduling_info.periodicBSR_SF--; } @@ -1035,10 +1031,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in // outlined in Sections 5.4.4 an 5.4.5 of 38.321 mac->scheduling_info.SR_pending = 1; // Regular BSR trigger - mac->BSR_reporting_active |= - NR_BSR_TRIGGER_REGULAR; - LOG_D(NR_MAC, - "[UE %d][BSR] Regular BSR Triggered Frame %d slot %d SR for PUSCH is pending\n", + mac->BSR_reporting_active |= NR_BSR_TRIGGER_REGULAR; + LOG_D(NR_MAC, "[UE %d][BSR] Regular BSR Triggered Frame %d slot %d SR for PUSCH is pending\n", mod_id, txFrameP, txSlotP); } return UE_CONNECTION_OK; @@ -1046,8 +1040,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in } boolean_t -nr_update_bsr(module_id_t module_idP, frame_t frameP, - slot_t slotP, uint8_t gNB_index) { +nr_update_bsr(module_id_t module_idP, frame_t frameP, slot_t slotP, uint8_t gNB_index) { mac_rlc_status_resp_t rlc_status; boolean_t bsr_regular_triggered = FALSE; uint8_t lcid; @@ -1091,10 +1084,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, lcgid_buffer_remain[lcgid] += mac->scheduling_info.LCID_buffer_remain[lcid]; } - rlc_status = mac_rlc_status_ind(module_idP, mac->crnti,gNB_index,frameP,slotP,ENB_FLAG_NO,MBMS_FLAG_NO, - lcid, - 0, 0 - ); + rlc_status = mac_rlc_status_ind(module_idP, mac->crnti,gNB_index,frameP,slotP,ENB_FLAG_NO,MBMS_FLAG_NO, lcid, 0, 0); lcid_bytes_in_buffer[lcid] = rlc_status.bytes_in_buffer; @@ -1132,14 +1122,12 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, // Check whether a regular BSR can be triggered according to the first cases in 38.321 if (num_lcid_with_data) { - LOG_D(NR_MAC, - "[UE %d] PDCCH Tick at frame %d slot %d: NumLCID with data=%d Reordered LCID0=%d LCID1=%d LCID2=%d\n", + LOG_D(NR_MAC, "[UE %d] PDCCH Tick at frame %d slot %d: NumLCID with data=%d Reordered LCID0=%d LCID1=%d LCID2=%d\n", module_idP, frameP, slotP, num_lcid_with_data, lcid_reordered_array[0], lcid_reordered_array[1], lcid_reordered_array[2]); - for (array_index = 0; array_index < num_lcid_with_data; - array_index++) { + for (array_index = 0; array_index < num_lcid_with_data; array_index++) { lcid = lcid_reordered_array[array_index]; /* UL data, for a logical channel which belongs to a LCG, becomes available for transmission in the RLC entity @@ -1148,8 +1136,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, */ { bsr_regular_triggered = TRUE; - LOG_D(NR_MAC, - "[UE %d] PDCCH Tick : MAC BSR Triggered LCID%d LCGID%d data become available at frame %d slot %d\n", + LOG_D(NR_MAC, "[UE %d] PDCCH Tick : MAC BSR Triggered LCID%d LCGID%d data become available at frame %d slot %d\n", module_idP, lcid, mac->scheduling_info.LCGID[lcid], frameP, slotP); @@ -1161,10 +1148,8 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, if (mac->scheduling_info.retxBSR_SF == 0) { bsr_regular_triggered = TRUE; - if ((mac->BSR_reporting_active & - NR_BSR_TRIGGER_REGULAR) == 0) { - LOG_I(NR_MAC, - "[UE %d] PDCCH Tick : MAC BSR Triggered ReTxBSR Timer expiry at frame %d slot %d\n", + if ((mac->BSR_reporting_active & NR_BSR_TRIGGER_REGULAR) == 0) { + LOG_I(NR_MAC, "[UE %d] PDCCH Tick : MAC BSR Triggered ReTxBSR Timer expiry at frame %d slot %d\n", module_idP, frameP, slotP); } } @@ -1172,8 +1157,7 @@ nr_update_bsr(module_id_t module_idP, frame_t frameP, //Store Buffer Occupancy in remain buffers for next TTI for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { - mac->scheduling_info.LCID_buffer_remain[lcid] = - lcid_bytes_in_buffer[lcid]; + mac->scheduling_info.LCID_buffer_remain[lcid] = lcid_bytes_in_buffer[lcid]; } return bsr_regular_triggered; @@ -1203,8 +1187,7 @@ nr_locate_BsrIndexByBufferSize(const uint32_t *table, int size, int value) { ju = jm; //replace the upper limit } - LOG_T(NR_MAC, - "[UE] searching BSR index %d for (BSR TABLE %d < value %d)\n", + LOG_T(NR_MAC, "[UE] searching BSR index %d for (BSR TABLE %d < value %d)\n", jm, table[jm], value); } @@ -2404,7 +2387,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, NR_BSR_SHORT *bsr_t = &bsr_truncated; //NR_POWER_HEADROOM_CMD phr; //NR_POWER_HEADROOM_CMD *phr_p = &phr; - //unsigned short short_padding = 0, post_padding = 0, padding_len = 0; unsigned short padding_len = 0; NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); // Compute header length @@ -2430,30 +2412,23 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } //Restart ReTxBSR Timer at new grant indication (38.321) - if (mac->scheduling_info.retxBSR_SF != - MAC_UE_BSR_TIMER_NOT_RUNNING) { - mac->scheduling_info.retxBSR_SF = - nr_get_sf_retxBSRTimer(mac-> - scheduling_info.retxBSR_Timer); + if (mac->scheduling_info.retxBSR_SF != MAC_UE_BSR_TIMER_NOT_RUNNING) { + mac->scheduling_info.retxBSR_SF = nr_get_sf_retxBSRTimer(mac->scheduling_info.retxBSR_Timer); } // periodicBSR-Timer expires, trigger BSR - if ((mac->scheduling_info.periodicBSR_Timer != - NR_BSR_Config__periodicBSR_Timer_infinity) + if ((mac->scheduling_info.periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity) && (mac->scheduling_info.periodicBSR_SF == 0)) { // Trigger BSR Periodic - mac->BSR_reporting_active |= - NR_BSR_TRIGGER_PERIODIC; - LOG_D(NR_MAC, - "[UE %d] MAC BSR Triggered PeriodicBSR Timer expiry at frame%d subframe %d TBS=%d\n", + mac->BSR_reporting_active |= NR_BSR_TRIGGER_PERIODIC; + LOG_D(NR_MAC, "[UE %d] MAC BSR Triggered PeriodicBSR Timer expiry at frame%d subframe %d TBS=%d\n", module_idP, frameP, subframe, buflen); } //Compute BSR Length if Regular or Periodic BSR is triggered //WARNING: if BSR long is computed, it may be changed to BSR short during or after multiplexing if there remains less than 1 LCGROUP with data after Tx if (mac->BSR_reporting_active) { - AssertFatal((mac->BSR_reporting_active & - NR_BSR_TRIGGER_PADDING) == 0, + AssertFatal((mac->BSR_reporting_active & NR_BSR_TRIGGER_PADDING) == 0, "Inconsistent BSR Trigger=%d !\n", mac->BSR_reporting_active); @@ -2479,8 +2454,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // Check for DCCH first // TO DO: Multiplex in the order defined by the logical channel prioritization - for (lcid = UL_SCH_LCID_SRB1; - lcid < MAX_LCID; lcid++) { + for (lcid = UL_SCH_LCID_SRB1; lcid < MAX_LCID; lcid++) { buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total + sh_size); @@ -2558,19 +2532,14 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, //Update Buffer remain and BSR bytes after transmission mac->scheduling_info.LCID_buffer_remain[lcid] -= sdu_length; mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] -= sdu_length; - LOG_D(NR_MAC, - "[UE %d] Update BSR [%d.%d] num_lcg_id_with_data %d. BSR_bytes for LCG%d=%d\n", + LOG_D(NR_MAC, "[UE %d] Update BSR [%d.%d] num_lcg_id_with_data %d. BSR_bytes for LCG%d=%d\n", module_idP, frameP, subframe, num_lcg_id_with_data, mac->scheduling_info.LCGID[lcid], mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]]); if (mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] < 0) mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] = 0; //Update the number of LCGID with data as BSR shall reflect status after BSR transmission - if ((num_lcg_id_with_data > 1) - && (mac-> - scheduling_info.BSR_bytes[mac-> - scheduling_info.LCGID[lcid]] - == 0)) { + if ((num_lcg_id_with_data > 1) && (mac-> scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] == 0)) { num_lcg_id_with_data--; } } @@ -2582,15 +2551,10 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, for (lcg_id = 0; lcg_id < NR_MAX_NUM_LCGID; lcg_id++) { if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { - mac->scheduling_info.BSR[lcg_id] = - nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE, NR_SHORT_BSR_TABLE_SIZE, - mac->scheduling_info. - BSR_bytes[lcg_id]); + mac->scheduling_info.BSR[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE, NR_SHORT_BSR_TABLE_SIZE, mac->scheduling_info.BSR_bytes[lcg_id]); } else { mac->scheduling_info.BSR[lcg_id] = - nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE, NR_LONG_BSR_TABLE_SIZE, - mac->scheduling_info. - BSR_bytes[lcg_id]); + nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE, NR_LONG_BSR_TABLE_SIZE, mac->scheduling_info.BSR_bytes[lcg_id]); } if (mac->scheduling_info.BSR_bytes[lcg_id]) { num_lcg_id_with_data++; @@ -2608,8 +2572,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, - else if the number of padding bits is equal to or larger than the size of the Long BSR plus its subheader, report Long BSR. */ if (sdu_length_total) { - padding_len = - buflen - (total_mac_pdu_header_len + sdu_length_total); + padding_len = buflen - (total_mac_pdu_header_len + sdu_length_total); } if ((padding_len) && (bsr_len == 0)) { @@ -2618,37 +2581,18 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, bsr_ce_len = num_lcg_id_with_data + 1; //variable size bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); //2 bytes // Trigger BSR Padding - mac->BSR_reporting_active |= - NR_BSR_TRIGGER_PADDING; + mac->BSR_reporting_active |= NR_BSR_TRIGGER_PADDING; } else if (padding_len >= (sizeof(NR_BSR_SHORT)+sizeof(NR_MAC_SUBHEADER_FIXED))) { bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); //1 byte if (num_lcg_id_with_data > 1) { // REPORT SHORT TRUNCATED BSR - //Get LCGID of highest priority LCID with data + //Get LCGID of highest priority LCID with data (todo) for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { -// if (mac-> -// logicalChannelConfig[lcid] != NULL) { - if (1) { // todo - lcg_id = - mac->scheduling_info. - LCGID[lcid]; - - if ((lcg_id < NR_MAX_NUM_LCGID) - && (mac-> - scheduling_info.BSR_bytes[lcg_id]) - && -// (mac->logicalChannelConfig -// [lcid]->ul_SpecificParameters->priority <= -// highest_priority)) { - (1)) { //todo -// highest_priority = -// mac-> -// logicalChannelConfig[lcid]-> -// ul_SpecificParameters->priority; - lcg_id_bsr_trunc = lcg_id; - } + lcg_id = mac->scheduling_info.LCGID[lcid]; + if ((lcg_id < NR_MAX_NUM_LCGID) && (mac->scheduling_info.BSR_bytes[lcg_id])) { + lcg_id_bsr_trunc = lcg_id; } } } else { @@ -2657,8 +2601,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } // Trigger BSR Padding - mac->BSR_reporting_active |= - NR_BSR_TRIGGER_PADDING; + mac->BSR_reporting_active |= NR_BSR_TRIGGER_PADDING; } bsr_len = bsr_header_len + bsr_ce_len; @@ -2690,8 +2633,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, mac->scheduling_info.BSR[6]; bsr_l->Buffer_size7 = mac->scheduling_info.BSR[7]; - LOG_D(NR_MAC, - "[UE %d] Frame %d subframe %d BSR Trig=%d report LONG BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n", + LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report LONG BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n", module_idP, frameP, subframe, mac->BSR_reporting_active, mac->scheduling_info.BSR[0], @@ -2705,33 +2647,23 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, } else if (bsr_header_len == sizeof(NR_MAC_SUBHEADER_FIXED)) { bsr_l = NULL; - if ((bsr_t != NULL) - && (mac->BSR_reporting_active & - NR_BSR_TRIGGER_PADDING)) { + if ((bsr_t != NULL) && (mac->BSR_reporting_active & NR_BSR_TRIGGER_PADDING)) { //Truncated BSR bsr_s = NULL; bsr_t->LcgID = lcg_id_bsr_trunc; - bsr_t->Buffer_size = - mac->scheduling_info. - BSR[lcg_id_bsr_trunc]; - LOG_D(NR_MAC, - "[UE %d] Frame %d subframe %d BSR Trig=%d report TRUNCATED BSR with level %d for LCGID %d\n", + bsr_t->Buffer_size = mac->scheduling_info.BSR[lcg_id_bsr_trunc]; + LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report TRUNCATED BSR with level %d for LCGID %d\n", module_idP, frameP, subframe, mac->BSR_reporting_active, - mac-> - scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); + mac->scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); } else { bsr_t = NULL; bsr_s->LcgID = lcg_id_bsr_trunc; - bsr_s->Buffer_size = - mac->scheduling_info. - BSR[lcg_id_bsr_trunc]; - LOG_D(NR_MAC, - "[UE %d] Frame %d subframe %d BSR Trig=%d report SHORT BSR with level %d for LCGID %d\n", + bsr_s->Buffer_size = mac->scheduling_info.BSR[lcg_id_bsr_trunc]; + LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report SHORT BSR with level %d for LCGID %d\n", module_idP, frameP, subframe, mac->BSR_reporting_active, - mac-> - scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); + mac->scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); } } @@ -2753,7 +2685,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // Compute final offset for padding and fill remainder of ULSCH with 0 if (buflen_remain > 0) { - LOG_D(NR_MAC, "In %s filling remainder %d bytes to the UL PDU \n", __FUNCTION__, buflen_remain); + LOG_D(NR_MAC, "In %s filling remainder %d bytes to the UL PDU \n", __FUNCTION__, buflen_remain); ((NR_MAC_SUBHEADER_FIXED *) pdu)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) pdu)->LCID = UL_SCH_LCID_PADDING; @@ -2785,31 +2717,21 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, log_dump(NR_MAC, ulsch_buffer, buflen, LOG_DUMP_CHAR, "\n"); #endif - LOG_D(NR_MAC, - "[UE %d][SR] Gave SDU to PHY, clearing any scheduling request\n", - module_idP); + LOG_D(NR_MAC, "[UE %d][SR] Gave SDU to PHY, clearing any scheduling request\n", module_idP); mac->scheduling_info.SR_pending = 0; mac->scheduling_info.SR_COUNTER = 0; /* Actions when a BSR is sent */ if (bsr_ce_len) { - LOG_D(NR_MAC, - "[UE %d] MAC BSR Sent !! bsr (ce%d,hdr%d) buff_len %d\n", + LOG_D(NR_MAC, "[UE %d] MAC BSR Sent !! bsr (ce%d,hdr%d) buff_len %d\n", module_idP, bsr_ce_len, bsr_header_len, buflen); // Reset ReTx BSR Timer - mac->scheduling_info.retxBSR_SF = - nr_get_sf_retxBSRTimer(mac-> - scheduling_info.retxBSR_Timer); - LOG_D(NR_MAC, "[UE %d] MAC ReTx BSR Timer Reset =%d\n", module_idP, - mac->scheduling_info.retxBSR_SF); + mac->scheduling_info.retxBSR_SF = nr_get_sf_retxBSRTimer(mac->scheduling_info.retxBSR_Timer); + LOG_D(NR_MAC, "[UE %d] MAC ReTx BSR Timer Reset =%d\n", module_idP, mac->scheduling_info.retxBSR_SF); // Reset Periodic Timer except when BSR is truncated - if ((bsr_t == NULL) - && (mac->scheduling_info. - periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity)) { - mac->scheduling_info.periodicBSR_SF = - nr_get_sf_periodicBSRTimer(mac->scheduling_info. - periodicBSR_Timer); + if ((bsr_t == NULL) && (mac->scheduling_info.periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity)) { + mac->scheduling_info.periodicBSR_SF = nr_get_sf_periodicBSRTimer(mac->scheduling_info.periodicBSR_Timer); LOG_D(NR_MAC, "[UE %d] MAC Periodic BSR Timer Reset =%d\n", module_idP, mac->scheduling_info.periodicBSR_SF); From b17a5189b7a40faf033df690e6b5ad057bdf7201 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Tue, 12 Oct 2021 10:27:15 -0700 Subject: [PATCH 058/102] Adding timing informtion to rx'd slot indictions Ensuring in the NRUE that the slot indications we process are 500us apart. --- executables/nr-ue.c | 20 ++++++++++++---- openair2/LAYER2/NR_MAC_UE/mac_defs.h | 5 ++++ openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 26 +++++++++++++++------ 3 files changed, 40 insertions(+), 11 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 2ac77f66b2..493fdf5deb 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -391,8 +391,9 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) NR_UL_TIME_ALIGNMENT_t ul_time_alignment; memset(&ul_time_alignment, 0, sizeof(ul_time_alignment)); int last_sfn_slot = -1; - uint16_t *sfn_slot_p; int sfn_slot; + uint64_t last_time_stamp = 0; + sfn_slot_info_t *sfn_slot_info; while (!oai_exit) { @@ -401,14 +402,14 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) LOG_E(NR_MAC, "sem_wait() error\n"); abort(); } - sfn_slot_p = get_queue(&nr_sfn_slot_queue); - if (sfn_slot_p == NULL) + sfn_slot_info = get_queue(&nr_sfn_slot_queue); + if (sfn_slot_info == NULL) { LOG_D(MAC, "get_queue(&nr_sfn_slot_queue) == NULL!\n"); continue; } - sfn_slot = *sfn_slot_p; + sfn_slot = sfn_slot_info->sfn_slot; if (sfn_slot == last_sfn_slot) { LOG_D(NR_MAC, "repeated sfn_sf = %d.%d\n", @@ -416,6 +417,17 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) continue; } last_sfn_slot = sfn_slot; + LOG_D(NR_MAC, "The received sfn/slot [%d %d], last time stamp %ld, current time stamp %ld\n", + NFAPI_SFNSLOT2SFN(sfn_slot), NFAPI_SFNSLOT2SLOT(sfn_slot), last_time_stamp, sfn_slot_info->time_stamp); + + uint64_t delta = sfn_slot_info->time_stamp - last_time_stamp; + if (delta < 500) + { + LOG_D(NR_MAC, "sfn/slot [%d %d] has been received too quickly! Delta = %ld. Will sleep for %ld us\n", + NFAPI_SFNSLOT2SFN(sfn_slot), NFAPI_SFNSLOT2SLOT(sfn_slot), delta, 500 - delta); + usleep(500 - delta); + } + last_time_stamp = sfn_slot_info->time_stamp; module_id_t mod_id = 0; NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index 8aa1be3e59..4873b0027c 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -443,6 +443,11 @@ typedef struct { } NR_UE_MAC_INST_t; +typedef struct sfn_slot_info { + uint16_t sfn_slot; + uint64_t time_stamp; +} sfn_slot_info_t; + typedef enum seach_space_mask_e { type0_pdcch = 0x1, type0a_pdcch = 0x2, diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index c1d5a04a2d..64182330ff 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -748,7 +748,17 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea return; } -uint16_t sfn_slot_pool[512]; +static uint64_t clock_usec() +{ + struct timespec t; + if (clock_gettime(CLOCK_MONOTONIC, &t) == -1) + { + abort(); + } + return (uint64_t)t.tv_sec * 1000000 + (t.tv_nsec / 1000); +} + +sfn_slot_info_t sfn_slot_pool[512]; uint16_t sfn_slot_id; void *nrue_standalone_pnf_task(void *context) { @@ -783,7 +793,12 @@ void *nrue_standalone_pnf_task(void *context) memcpy((void *)&sfn_slot, buffer, sizeof(sfn_slot)); current_sfn_slot = sfn_slot; - sfn_slot_pool[sfn_slot_id] = sfn_slot; + sfn_slot_pool[sfn_slot_id].sfn_slot = sfn_slot; + sfn_slot_pool[sfn_slot_id].time_stamp = clock_usec(); + sfn = NFAPI_SFNSLOT2SFN(sfn_slot); + slot = NFAPI_SFNSLOT2SLOT(sfn_slot); + LOG_I(NR_PHY, "Received from proxy sfn %d slot %d and time_stamp = %ld\n", + sfn, slot, sfn_slot_pool[sfn_slot_id].time_stamp); if (!put_queue(&nr_sfn_slot_queue, &sfn_slot_pool[sfn_slot_id])) { @@ -797,10 +812,6 @@ void *nrue_standalone_pnf_task(void *context) LOG_E(NR_PHY, "sem_post() error\n"); abort(); } - - sfn = NFAPI_SFNSLOT2SFN(sfn_slot); - slot = NFAPI_SFNSLOT2SLOT(sfn_slot); - LOG_I(NR_PHY, "Received from proxy sfn %d slot %d\n", sfn, slot); } else if (len == sizeof(nr_phy_channel_params_t)) { @@ -808,7 +819,8 @@ void *nrue_standalone_pnf_task(void *context) memcpy(&ch_info, buffer, sizeof(nr_phy_channel_params_t)); current_sfn_slot = ch_info.sfn_slot; - sfn_slot_pool[sfn_slot_id] = ch_info.sfn_slot; + sfn_slot_pool[sfn_slot_id].sfn_slot = ch_info.sfn_slot; + sfn_slot_pool[sfn_slot_id].time_stamp = clock_usec(); if (!put_queue(&nr_sfn_slot_queue, &sfn_slot_pool[sfn_slot_id])) { From ea2495ea0a9b5c3ecc7ec1f529f87279a611e3eb Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Tue, 12 Oct 2021 17:06:00 -0700 Subject: [PATCH 059/102] Attemping to stop filling UL_TTI_REQ queue This is sort of hacky, but it stops the gNB from crashing for 2 UEs with the proxy and 4 UEs with our internal proxy. --- executables/nr-ue.c | 9 +++------ openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 19 ++++++++++++++----- 2 files changed, 17 insertions(+), 11 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 493fdf5deb..ede6ff3fc2 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -309,12 +309,9 @@ static void process_queued_nr_nfapi_msgs(NR_UE_MAC_INST_t *mac, int sfn_slot) { LOG_E(NR_MAC, "[%d %d] No corresponding tx_data_request for given dl_tti_request sfn/slot\n", NFAPI_SFNSLOT2SFN(dl_tti_sfn_slot), NFAPI_SFNSLOT2SLOT(dl_tti_sfn_slot)); - if (!put_queue(&nr_dl_tti_req_queue, dl_tti_request)) - { - LOG_E(NR_PHY, "put_queue failed for dl_tti_request.\n"); - free(dl_tti_request); - dl_tti_request = NULL; - } + save_nr_measurement_info(dl_tti_request); + free(dl_tti_request); + dl_tti_request = NULL; } else if (dl_tti_request->dl_tti_request_body.nPDUs > 0 && tx_data_request->Number_of_PDUs > 0) { diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 64182330ff..47e8ae8b12 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -729,13 +729,22 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea LOG_E(NR_PHY, "Message ul_tti_request failed to unpack\n"); break; } - LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST message in SFN/slot %d %d. \n", + LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST message in SFN/slot %d %d.\n", ul_tti_request->SFN, ul_tti_request->Slot); - if (!put_queue(&nr_ul_tti_req_queue, ul_tti_request)) + if (nr_uci_ind_queue.num_items > 0) { - LOG_E(NR_PHY, "put_queue failed for ul_tti_request.\n"); - free(ul_tti_request); - ul_tti_request = NULL; + LOG_I(NR_MAC, "Melissa, we added UL_TTI_REQ to queue for sfn slot %d %d\n", + ul_tti_request->SFN, ul_tti_request->Slot); + if (!put_queue(&nr_ul_tti_req_queue, ul_tti_request)) + { + reset_queue(&nr_ul_tti_req_queue); + if (!put_queue(&nr_ul_tti_req_queue, ul_tti_request)) + { + LOG_E(NR_PHY, "put_queue failed for ul_tti_request.\n"); + free(ul_tti_request); + ul_tti_request = NULL; + } + } } break; } From e630bf1c5231255bad3afd94f66281290c04293c Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Mon, 18 Oct 2021 18:50:12 -0700 Subject: [PATCH 060/102] tx_data_request len field is a uint16_t In the pusharray32, used exclusively by the tx_data_request, the len argument passed in is defined as a uint32_t. This update fixes the passed in argument to be defined as a uint16_t instead. --- nfapi/open-nFAPI/nfapi/inc/nfapi.h | 2 +- nfapi/open-nFAPI/nfapi/src/nfapi.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/inc/nfapi.h b/nfapi/open-nFAPI/nfapi/inc/nfapi.h index 0f09efa78a..05db920035 100644 --- a/nfapi/open-nFAPI/nfapi/inc/nfapi.h +++ b/nfapi/open-nFAPI/nfapi/inc/nfapi.h @@ -50,7 +50,7 @@ uint32_t pullarrays32(uint8_t **in, int32_t out[], uint32_t max_len, uint32_t le uint32_t pusharray8(uint8_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharray16(uint16_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharrays16(int16_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); -uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); +uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint16_t len, uint8_t **out, uint8_t *end); uint32_t pusharrays32(int32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); typedef uint8_t (*pack_array_elem_fn)(void* elem, uint8_t **ppWritePackedMsg, uint8_t *end); diff --git a/nfapi/open-nFAPI/nfapi/src/nfapi.c b/nfapi/open-nFAPI/nfapi/src/nfapi.c index 2783781e2c..37bb648e2b 100644 --- a/nfapi/open-nFAPI/nfapi/src/nfapi.c +++ b/nfapi/open-nFAPI/nfapi/src/nfapi.c @@ -363,7 +363,7 @@ uint32_t pullarrays32(uint8_t **in, int32_t out[], uint32_t max_len, uint32_t le return 0; } } -uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end) { +uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint16_t len, uint8_t **out, uint8_t *end) { if(len == 0) return 1; From 58eb8d2af49db520fece069f518cd0bcc3275dfa Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Tue, 19 Oct 2021 07:59:55 -0700 Subject: [PATCH 061/102] Creating new queue for ul_ttis if dl_tti is late Also, this commit changes the len argument in the pusharray32 to match the actual field type (uint16_t). There is also simple name change from sf -> slot. The new queueing system is not a permanent solution. It was simply a way for us to try to handle late dl_tti_requests. If we queue every single ul_tti_req that we get, the queue gets full very quickly becasue we only remove ul_ttis from the queue when a uci has been populated with a matching sfn/sf. Because of this, we only queue ul_ttis if we have a uci_indication prepared already. Rarely, a dl_tti_req will arrive at the NRUE too late, and the NRUE does not have time to create the uci_ind so we dont process the corresponding ul_tti. A seprate queue was made to hold all other ul_ttis the arrive in the NRUE (this queue will continuously get full and then emptied) but will occasionally hold a ul_tti that corresponds to a uci that hasnt been populated yet. --- executables/nr-ue.c | 10 ++++++-- nfapi/open-nFAPI/nfapi/inc/nfapi.h | 2 +- nfapi/open-nFAPI/nfapi/src/nfapi.c | 2 +- openair2/LAYER2/NR_MAC_UE/mac_defs.h | 2 +- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 2 +- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 24 +++++++++++++++++++- openair2/RRC/NR_UE/rrc_UE.c | 1 + openair2/RRC/NR_UE/rrc_proto.h | 1 + 8 files changed, 37 insertions(+), 7 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index ede6ff3fc2..fd094770ea 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -266,8 +266,13 @@ static void process_queued_nr_nfapi_msgs(NR_UE_MAC_INST_t *mac, int sfn_slot) nfapi_nr_ul_dci_request_t *ul_dci_request = get_queue(&nr_ul_dci_req_queue); LOG_D(NR_MAC, "Try to get a ul_tti_req for sfn/slot %d %d from queue with %d items\n", - NFAPI_SFNSLOT2SFN(mac->active_harq_sfn_sf),NFAPI_SFNSLOT2SLOT(mac->active_harq_sfn_sf), nr_ul_tti_req_queue.num_items); - nfapi_nr_ul_tti_request_t *ul_tti_request = unqueue_matching(&nr_ul_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &mac->active_harq_sfn_sf); + NFAPI_SFNSLOT2SFN(mac->active_harq_sfn_slot),NFAPI_SFNSLOT2SLOT(mac->active_harq_sfn_slot), nr_ul_tti_req_queue.num_items); + nfapi_nr_ul_tti_request_t *ul_tti_request = unqueue_matching(&nr_ul_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &mac->active_harq_sfn_slot); + if (!ul_tti_request) + { + LOG_D(NR_MAC, "Try to get a ul_tti_req from seprate queue because dl_tti_req was late\n"); + ul_tti_request = unqueue_matching(&nr_wait_ul_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &mac->active_harq_sfn_slot); + } if (rach_ind && rach_ind->number_of_pdus > 0) { @@ -382,6 +387,7 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) reset_queue(&nr_tx_req_queue); reset_queue(&nr_ul_dci_req_queue); reset_queue(&nr_ul_tti_req_queue); + reset_queue(&nr_wait_ul_tti_req_queue); NR_PRACH_RESOURCES_t prach_resources; memset(&prach_resources, 0, sizeof(prach_resources)); diff --git a/nfapi/open-nFAPI/nfapi/inc/nfapi.h b/nfapi/open-nFAPI/nfapi/inc/nfapi.h index 0f09efa78a..05db920035 100644 --- a/nfapi/open-nFAPI/nfapi/inc/nfapi.h +++ b/nfapi/open-nFAPI/nfapi/inc/nfapi.h @@ -50,7 +50,7 @@ uint32_t pullarrays32(uint8_t **in, int32_t out[], uint32_t max_len, uint32_t le uint32_t pusharray8(uint8_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharray16(uint16_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharrays16(int16_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); -uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); +uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint16_t len, uint8_t **out, uint8_t *end); uint32_t pusharrays32(int32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); typedef uint8_t (*pack_array_elem_fn)(void* elem, uint8_t **ppWritePackedMsg, uint8_t *end); diff --git a/nfapi/open-nFAPI/nfapi/src/nfapi.c b/nfapi/open-nFAPI/nfapi/src/nfapi.c index 2783781e2c..37bb648e2b 100644 --- a/nfapi/open-nFAPI/nfapi/src/nfapi.c +++ b/nfapi/open-nFAPI/nfapi/src/nfapi.c @@ -363,7 +363,7 @@ uint32_t pullarrays32(uint8_t **in, int32_t out[], uint32_t max_len, uint32_t le return 0; } } -uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end) { +uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint16_t len, uint8_t **out, uint8_t *end) { if(len == 0) return 1; diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index 4873b0027c..bd612c81cd 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -437,7 +437,7 @@ typedef struct { bool expected_dci; bool index_has_dci[16]; - int active_harq_sfn_sf; + int active_harq_sfn_slot; pthread_mutex_t mutex_dl_info; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index 4cd398c1f2..7e76e58d61 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -1283,7 +1283,7 @@ void set_harq_status(NR_UE_MAC_INST_t *mac, // FIXME k0 != 0 currently not taken into consideration current_harq->dl_frame = frame; current_harq->dl_slot = slot; - mac->active_harq_sfn_sf = NFAPI_SFNSLOT2HEX(frame, (slot + data_toul_fb)); + mac->active_harq_sfn_slot = NFAPI_SFNSLOT2HEX(frame, (slot + data_toul_fb)); LOG_D(NR_PHY,"Setting harq_status for harq_id %d, dl %d.%d, sched ul %d.%d\n", harq_id, frame, slot, frame, (slot + data_toul_fb)); diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 47e8ae8b12..00d17d81bd 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -60,6 +60,7 @@ queue_t nr_dl_tti_req_queue; queue_t nr_tx_req_queue; queue_t nr_ul_dci_req_queue; queue_t nr_ul_tti_req_queue; +queue_t nr_wait_ul_tti_req_queue; void nrue_init_standalone_socket(int tx_port, int rx_port) { @@ -731,7 +732,7 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea } LOG_I(NR_PHY, "Received an NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST message in SFN/slot %d %d.\n", ul_tti_request->SFN, ul_tti_request->Slot); - if (nr_uci_ind_queue.num_items > 0) + if (nr_uci_ind_queue.num_items > 0) //TODO: In the future UL_TTIs can be for ULSCH and SRS. { LOG_I(NR_MAC, "Melissa, we added UL_TTI_REQ to queue for sfn slot %d %d\n", ul_tti_request->SFN, ul_tti_request->Slot); @@ -746,6 +747,27 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea } } } + /* TODO: This indicates that dl_tti_req was late or never arrived. If there are + not any prepared uci indications, the NRUE likely never had time to + populate the message is the dl_tti_req came in late and we received a + ul_tti_req immediately after the dl_tti_request. This is an attempt to + mitigate proxy timing issues. */ + else if (nr_uci_ind_queue.num_items == 0) + { + LOG_I(NR_MAC, "Melissa, we added UL_TTI_REQ to queue for sfn slot %d %d\n", + ul_tti_request->SFN, ul_tti_request->Slot); + if (!put_queue(&nr_wait_ul_tti_req_queue, ul_tti_request)) + { + reset_queue(&nr_wait_ul_tti_req_queue); + if (!put_queue(&nr_wait_ul_tti_req_queue, ul_tti_request)) + { + LOG_E(NR_PHY, "put_queue failed for nr_wait_ul_tti_req_queue.\n"); + free(ul_tti_request); + ul_tti_request = NULL; + } + } + } + break; } diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index a5ce7c926d..8fec4c002e 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -2894,6 +2894,7 @@ static void start_oai_nrue_threads() init_queue(&nr_tx_req_queue); init_queue(&nr_ul_dci_req_queue); init_queue(&nr_ul_tti_req_queue); + init_queue(&nr_wait_ul_tti_req_queue); if (sem_init(&sfn_slot_semaphore, 0, 0) != 0) { diff --git a/openair2/RRC/NR_UE/rrc_proto.h b/openair2/RRC/NR_UE/rrc_proto.h index f5178f469f..2abc680943 100644 --- a/openair2/RRC/NR_UE/rrc_proto.h +++ b/openair2/RRC/NR_UE/rrc_proto.h @@ -50,6 +50,7 @@ extern queue_t nr_dl_tti_req_queue; extern queue_t nr_tx_req_queue; extern queue_t nr_ul_dci_req_queue; extern queue_t nr_ul_tti_req_queue; +extern queue_t nr_wait_ul_tti_req_queue; // // main_rrc.c // From bcca4aad812ee90caa2924412f0b62e40843a7df Mon Sep 17 00:00:00 2001 From: Melissa Date: Tue, 19 Oct 2021 21:08:14 +0000 Subject: [PATCH 062/102] Revert "tx_data_request len field is a uint16_t" This reverts commit e630bf1c5231255bad3afd94f66281290c04293c --- nfapi/open-nFAPI/nfapi/inc/nfapi.h | 2 +- nfapi/open-nFAPI/nfapi/src/nfapi.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/inc/nfapi.h b/nfapi/open-nFAPI/nfapi/inc/nfapi.h index 05db920035..0f09efa78a 100644 --- a/nfapi/open-nFAPI/nfapi/inc/nfapi.h +++ b/nfapi/open-nFAPI/nfapi/inc/nfapi.h @@ -50,7 +50,7 @@ uint32_t pullarrays32(uint8_t **in, int32_t out[], uint32_t max_len, uint32_t le uint32_t pusharray8(uint8_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharray16(uint16_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharrays16(int16_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); -uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint16_t len, uint8_t **out, uint8_t *end); +uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharrays32(int32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); typedef uint8_t (*pack_array_elem_fn)(void* elem, uint8_t **ppWritePackedMsg, uint8_t *end); diff --git a/nfapi/open-nFAPI/nfapi/src/nfapi.c b/nfapi/open-nFAPI/nfapi/src/nfapi.c index 37bb648e2b..2783781e2c 100644 --- a/nfapi/open-nFAPI/nfapi/src/nfapi.c +++ b/nfapi/open-nFAPI/nfapi/src/nfapi.c @@ -363,7 +363,7 @@ uint32_t pullarrays32(uint8_t **in, int32_t out[], uint32_t max_len, uint32_t le return 0; } } -uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint16_t len, uint8_t **out, uint8_t *end) { +uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end) { if(len == 0) return 1; From b69c4465439b56c898a1ee95d49c00515e9416f3 Mon Sep 17 00:00:00 2001 From: Laurent THOMAS Date: Fri, 22 Oct 2021 14:22:51 +0200 Subject: [PATCH 063/102] hotfix SEGV and divide by 0 --- cmake_targets/CMakeLists.txt | 4 +-- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 28 +++++++++---------- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 19 +++++++++++-- .../LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 1 + 4 files changed, 32 insertions(+), 20 deletions(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 9592334125..fc09419f35 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -332,11 +332,11 @@ endif () add_definitions("-DASN_DISABLE_OER_SUPPORT") ######################### -set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -ggdb3 -Wl,-rpath -Wl,${CMAKE_CURRENT_BINARY_DIR}") +set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -ggdb2 -Wl,-rpath -Wl,${CMAKE_CURRENT_BINARY_DIR}") ######################### # set a flag for changes in the source code # these changes are related to hardcoded path to include .h files -set(debugOpt "-ggdb3 -DMALLOC_CHECK_=3 -fno-delete-null-pointer-checks") +set(debugOpt "-ggdb2 -DMALLOC_CHECK_=3 -fno-delete-null-pointer-checks") set(CMAKE_C_FLAGS_DEBUG "${debugOpt} -O0") set(CMAKE_C_FLAGS_RELWITHDEBINFO "${debugOpt} -O2") set(CMAKE_C_FLAGS_RELEASE "-O3") diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 96842426f5..80bd37dac1 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -238,7 +238,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, // x_n contains the sequence r_u_v_alpha_delta(n) - int n,i,l; + int n,i; int prb_offset[2] = {pucch_pdu->bwp_start+pucch_pdu->prb_start, pucch_pdu->bwp_start+pucch_pdu->prb_start}; nr_group_sequence_hopping(pucch_GroupHopping,pucch_pdu->hopping_id,0,slot,&u[0],&v[0]); // calculating u and v value first hop @@ -266,14 +266,14 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, int64_t xrtmag=0,xrtmag_next=0; uint8_t maxpos=0; uint8_t index=0; - for (l=0; lnr_of_symbols; l++) { + for (int l=0; lnr_of_symbols; l++) { for (int aarx=0;aarxnb_antennas_rx;aarx++) { memset((void*)xr[aarx][l],0,24*sizeof(int16_t)); } } int n2; - for (l=0; lnr_of_symbols; l++) { + for (int l=0; lnr_of_symbols; l++) { l2 = l+pucch_pdu->start_symbol_index; re_offset[l] = (12*prb_offset[l]) + frame_parms->first_carrier_offset; if (re_offset[l]>= frame_parms->ofdm_symbol_size) @@ -300,11 +300,10 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, //int32_t no_corr = 0; int seq_index; int64_t temp; - int64_t av_corr=0; for(i=0;inr_of_symbols;l++) { + for (int l=0;lnr_of_symbols;l++) { seq_index = (pucch_pdu->initial_cyclic_shift+ mcs[i]+ gNB->pucch0_lut.lut[cs_ind][slot][l+pucch_pdu->start_symbol_index])%12; @@ -323,14 +322,14 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, } } LOG_D(PHY,"PUCCH IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[0][0],corr_im[0][0],10*log10((double)corr_re[0][0]*corr_re[0][0] + (double)corr_im[0][0]*corr_im[0][0])); - if (l>1) LOG_D(PHY,"PUCCH 2nd symbol IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[0][1],corr_im[0][1],10*log10((double)corr_re[0][1]*corr_re[0][1] + (double)corr_im[0][1]*corr_im[0][1])); - if (pucch_pdu->freq_hop_flag == 0 && l==1) {// non-coherent correlation + if (pucch_pdu->nr_of_symbols) LOG_D(PHY,"PUCCH 2nd symbol IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[0][1],corr_im[0][1],10*log10((double)corr_re[0][1]*corr_re[0][1] + (double)corr_im[0][1]*corr_im[0][1])); + if (pucch_pdu->freq_hop_flag == 0 && pucch_pdu->nr_of_symbols==1) {// non-coherent correlation temp=0; for (int aa=0;aanb_antennas_rx;aa++) temp+=(int64_t)corr_re[aa][0]*corr_re[aa][0] + (int64_t)corr_im[aa][0]*corr_im[aa][0]; } - else if (pucch_pdu->freq_hop_flag == 0 && l==2) { + else if (pucch_pdu->freq_hop_flag == 0 && pucch_pdu->nr_of_symbols==2) { int64_t corr_re2=0; int64_t corr_im2=0; temp=0; @@ -349,7 +348,6 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, } else AssertFatal(1==0,"shouldn't happen\n"); - av_corr+=temp; if (temp>xrtmag) { xrtmag_next = xrtmag; xrtmag=temp; @@ -359,19 +357,19 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, int64_t temp2=0,temp3=0;; for (int aa=0;aanb_antennas_rx;aa++) { temp2 += ((int64_t)corr_re[aa][0]*corr_re[aa][0] + (int64_t)corr_im[aa][0]*corr_im[aa][0]); - if (l==2) temp3 += ((int64_t)corr_re[aa][1]*corr_re[aa][1] + (int64_t)corr_im[aa][1]*corr_im[aa][1]); + if (pucch_pdu->nr_of_symbols==2) + temp3 += ((int64_t)corr_re[aa][1]*corr_re[aa][1] + (int64_t)corr_im[aa][1]*corr_im[aa][1]); } uci_stats->current_pucch0_stat0= dB_fixed64(temp2); - if (l==2) uci_stats->current_pucch0_stat1= dB_fixed64(temp3); + if ( pucch_pdu->nr_of_symbols==2) + uci_stats->current_pucch0_stat1= dB_fixed64(temp3); } else if (temp>xrtmag_next) xrtmag_next = temp; } - av_corr/=nr_sequences/l; - - int xrtmag_dBtimes10 = 10*(int)dB_fixed64(xrtmag/(12*l)); - int xrtmag_next_dBtimes10 = 10*(int)dB_fixed64(xrtmag_next/(12*l)); + int xrtmag_dBtimes10 = 10*(int)dB_fixed64(xrtmag/(12*pucch_pdu->nr_of_symbols)); + int xrtmag_next_dBtimes10 = 10*(int)dB_fixed64(xrtmag_next/(12*pucch_pdu->nr_of_symbols)); #ifdef DEBUG_NR_PUCCH_RX printf("PUCCH 0 : maxpos %d\n",maxpos); #endif diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 145b24f00e..a4008b34c4 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -164,13 +164,26 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { NR_ServingCellConfigCommon_t *scc = mac->scc; - NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup; + NR_BWP_UplinkDedicated_t *ubwpd=NULL; + + if (mac->cg && + mac->cg->spCellConfig && + mac->cg->spCellConfig->spCellConfigDedicated && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && + mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) + ubwpd = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP; + + NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0] ? + mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup : + (ubwpd? + ubwpd->pusch_Config->choice.setup: + NULL); long transformPrecoder; - if (pusch_Config->transformPrecoder) + if (pusch_Config && pusch_Config->transformPrecoder) transformPrecoder = *pusch_Config->transformPrecoder; else { - if(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder) + if(scc && scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder) transformPrecoder = NR_PUSCH_Config__transformPrecoder_enabled; else transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index f2ce8498fd..67b26a79e9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -294,6 +294,7 @@ uint8_t compute_ri_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig, } else AssertFatal(1==0,"Other configurations not yet implemented\n"); + return -1; } void compute_li_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig, From eef2a58282d3792b6b1c98708fa9b240ea317511 Mon Sep 17 00:00:00 2001 From: Laurent Thomas Date: Sun, 24 Oct 2021 14:31:42 +0200 Subject: [PATCH 064/102] fix bug introduced by thisbranch --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 44 +++++++++++++++------------- 1 file changed, 24 insertions(+), 20 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 80bd37dac1..cdc6825d4c 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -321,26 +321,30 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, } } } - LOG_D(PHY,"PUCCH IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[0][0],corr_im[0][0],10*log10((double)corr_re[0][0]*corr_re[0][0] + (double)corr_im[0][0]*corr_im[0][0])); - if (pucch_pdu->nr_of_symbols) LOG_D(PHY,"PUCCH 2nd symbol IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[0][1],corr_im[0][1],10*log10((double)corr_re[0][1]*corr_re[0][1] + (double)corr_im[0][1]*corr_im[0][1])); - if (pucch_pdu->freq_hop_flag == 0 && pucch_pdu->nr_of_symbols==1) {// non-coherent correlation - temp=0; - for (int aa=0;aanb_antennas_rx;aa++) - temp+=(int64_t)corr_re[aa][0]*corr_re[aa][0] + (int64_t)corr_im[aa][0]*corr_im[aa][0]; - } - - else if (pucch_pdu->freq_hop_flag == 0 && pucch_pdu->nr_of_symbols==2) { - int64_t corr_re2=0; - int64_t corr_im2=0; - temp=0; - for (int aa=0;aanb_antennas_rx;aa++) { - corr_re2 = (int64_t)corr_re[aa][0]+corr_re[aa][1]; - corr_im2 = (int64_t)corr_im[aa][0]+corr_im[aa][1]; - // coherent combining of 2 symbols and then complex modulus for single-frequency case - temp+=corr_re2*corr_re2 + corr_im2*corr_im2; - } - } - else if (pucch_pdu->freq_hop_flag == 1) { + LOG_D(PHY,"PUCCH IDFT[%d/%d] = (%d,%d)=>%f\n", + mcs[i],seq_index,corr_re[0][0],corr_im[0][0], + 10*log10((double)corr_re[0][0]*corr_re[0][0] + (double)corr_im[0][0]*corr_im[0][0])); + if (pucch_pdu->nr_of_symbols==2) + LOG_D(PHY,"PUCCH 2nd symbol IDFT[%d/%d] = (%d,%d)=>%f\n", + mcs[i],seq_index,corr_re[0][1],corr_im[0][1], + 10*log10((double)corr_re[0][1]*corr_re[0][1] + (double)corr_im[0][1]*corr_im[0][1])); + if (pucch_pdu->freq_hop_flag == 0) { + if (pucch_pdu->nr_of_symbols==1) {// non-coherent correlation + temp=0; + for (int aa=0;aanb_antennas_rx;aa++) + temp+=(int64_t)corr_re[aa][0]*corr_re[aa][0] + (int64_t)corr_im[aa][0]*corr_im[aa][0]; + } else { + int64_t corr_re2=0; + int64_t corr_im2=0; + temp=0; + for (int aa=0;aanb_antennas_rx;aa++) { + corr_re2 = (int64_t)corr_re[aa][0]+corr_re[aa][1]; + corr_im2 = (int64_t)corr_im[aa][0]+corr_im[aa][1]; + // coherent combining of 2 symbols and then complex modulus for single-frequency case + temp+=corr_re2*corr_re2 + corr_im2*corr_im2; + } + } + } else if (pucch_pdu->freq_hop_flag == 1) { // full non-coherent combining of 2 symbols for frequency-hopping case temp=0; for (int aa=0;aanb_antennas_rx;aa++) From f0c98e2b74ac7770d9719e136c3d21cfe4c99ca6 Mon Sep 17 00:00:00 2001 From: mjoang Date: Mon, 25 Oct 2021 09:37:20 -0400 Subject: [PATCH 065/102] encapsulate mac_ce related logic into separate functionsin nr_ue_get_sdu. --- openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 491 +++++++++++--------- 1 file changed, 276 insertions(+), 215 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index 54fd535d58..a3071bfd7a 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -2349,58 +2349,48 @@ void nr_ue_sib1_scheduler(module_id_t module_idP, #define MAX_LCID 8 // NR_MAX_NUM_LCID shall be used but the mac_rlc_data_req function can fetch data for max 8 LCID +typedef struct { + uint8_t bsr_len; + uint8_t bsr_ce_len; + uint8_t bsr_header_len; + uint8_t phr_len; + uint8_t phr_ce_len; + uint8_t phr_header_len; + uint16_t sdu_length_total; + NR_BSR_SHORT *bsr_s; + NR_BSR_LONG *bsr_l; + NR_BSR_SHORT *bsr_t; + //NR_POWER_HEADROOM_CMD *phr_pr; + int tot_mac_ce_len; + uint8_t total_mac_pdu_header_len; +} NR_UE_MAC_CE_INFO; -/** - * Function: to fetch data to be transmitted from RLC, place it in the ULSCH PDU buffer - to generate the complete MAC PDU with sub-headers and MAC CEs according to ULSCH MAC PDU generation (6.1.2 TS 38.321) - the selected sub-header for the payload sub-PDUs is NR_MAC_SUBHEADER_LONG - * @module_idP Module ID - * @CC_id Component Carrier index - * @frameP current UL frame - * @subframe current UL slot - * @gNB_index gNB index - * @ulsch_buffer Pointer to ULSCH PDU - * @buflen TBS - */ -uint8_t nr_ue_get_sdu(module_id_t module_idP, +/* +nr_ue_get_sdu_mac_ce_pre finds length in various mac_ce field +Need nothing from mac_ce_p: +Update the following in mac_ce_p: + bsr_len; + bsr_ce_len; + bsr_header_len; + phr_len; TBD + phr_ce_len; TBD + phr_header_len; TBD +*/ +int nr_ue_get_sdu_mac_ce_pre(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t subframe, uint8_t gNB_index, uint8_t *ulsch_buffer, - uint16_t buflen) { - - int16_t buflen_remain = 0; - uint8_t bsr_len = 0, bsr_ce_len = 0, bsr_header_len = 0; - //uint8_t phr_header_len = 0, phr_ce_len = 0, phr_len = 0; - uint8_t phr_len = 0; - uint8_t lcid = 0; - uint16_t sdu_length = 0; - uint16_t num_sdus = 0; - uint16_t sdu_length_total = 0; - NR_BSR_SHORT bsr_short, bsr_truncated; - NR_BSR_LONG bsr_long; - NR_BSR_SHORT *bsr_s = &bsr_short; - NR_BSR_LONG *bsr_l = &bsr_long; - NR_BSR_SHORT *bsr_t = &bsr_truncated; - //NR_POWER_HEADROOM_CMD phr; - //NR_POWER_HEADROOM_CMD *phr_p = &phr; - unsigned short padding_len = 0; + uint16_t buflen, + NR_UE_MAC_CE_INFO *mac_ce_p) { NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); - // Compute header length - int lcg_id = 0; - int lcg_id_bsr_trunc = 0; - //int highest_priority = 16; + int num_lcg_id_with_data = 0; - const uint8_t sh_size = sizeof(NR_MAC_SUBHEADER_LONG); - - // Pointer used to build the MAC PDU by placing the RLC SDUs in the ULSCH buffer - uint8_t *pdu = ulsch_buffer; - // Preparing the MAC CEs sub-PDUs and get the total size - bsr_header_len = 0; - //phr_header_len = 1; //sizeof(SCH_SUBHEADER_FIXED); - + mac_ce_p->bsr_header_len = 0; + mac_ce_p->phr_header_len = 0; //sizeof(SCH_SUBHEADER_FIXED); + int lcg_id = 0; while (lcg_id < NR_MAX_NUM_LCGID) { if (mac->scheduling_info.BSR_bytes[lcg_id]) { num_lcg_id_with_data++; @@ -2433,20 +2423,238 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, //A Regular or Periodic BSR can only be sent if TBS is sufficient as transmitting only a BSR is not allowed if UE has data to transmit if (num_lcg_id_with_data <= 1) { if (buflen >= (sizeof(NR_BSR_SHORT)+sizeof(NR_MAC_SUBHEADER_FIXED)+1)) { - bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte - bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); //1 byte + mac_ce_p->bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte + mac_ce_p->bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); //1 byte } } else { if (buflen >= (num_lcg_id_with_data+1+sizeof(NR_MAC_SUBHEADER_SHORT)+1)) { - bsr_ce_len = num_lcg_id_with_data + 1; //variable size - bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); //2 bytes + mac_ce_p->bsr_ce_len = num_lcg_id_with_data + 1; //variable size + mac_ce_p->bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); //2 bytes } } } - bsr_len = bsr_ce_len + bsr_header_len; - int tot_mac_ce_len = bsr_len + phr_len; - uint8_t total_mac_pdu_header_len = tot_mac_ce_len; + mac_ce_p->bsr_len = mac_ce_p->bsr_ce_len + mac_ce_p->bsr_header_len; + return (mac_ce_p->bsr_len + mac_ce_p->phr_len); +} + +/* +nr_ue_get_sdu_mac_ce_post recalculates length and prepares the mac_ce field +Need the following from mac_ce_p: + bsr_ce_len + bsr_len + sdu_length_total + total_mac_pdu_header_len +Update the following in mac_ce_p: + bsr_ce_len + bsr_header_len + bsr_len + tot_mac_ce_len + total_mac_pdu_header_len + bsr_s + bsr_l + bsr_t +*/ +void nr_ue_get_sdu_mac_ce_post(module_id_t module_idP, + int CC_id, + frame_t frameP, + sub_frame_t subframe, + uint8_t gNB_index, + uint8_t *ulsch_buffer, + uint16_t buflen, + NR_UE_MAC_CE_INFO *mac_ce_p) { + NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); + + // Compute BSR Values and update Nb LCGID with data after multiplexing + unsigned short padding_len = 0; + uint8_t lcid = 0; + int lcg_id = 0; + int num_lcg_id_with_data = 0; + int lcg_id_bsr_trunc = 0; + for (lcg_id = 0; lcg_id < NR_MAX_NUM_LCGID; lcg_id++) { + if (mac_ce_p->bsr_ce_len == sizeof(NR_BSR_SHORT)) { + mac->scheduling_info.BSR[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE, NR_SHORT_BSR_TABLE_SIZE, mac->scheduling_info.BSR_bytes[lcg_id]); + } else { + mac->scheduling_info.BSR[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE, NR_LONG_BSR_TABLE_SIZE, mac->scheduling_info.BSR_bytes[lcg_id]); + } + if (mac->scheduling_info.BSR_bytes[lcg_id]) { + num_lcg_id_with_data++; + lcg_id_bsr_trunc = lcg_id; + } + } + + // TS 38.321 Section 5.4.5 + // Check BSR padding: it is done after PHR according to Logical Channel Prioritization order + // Check for max padding size, ie MAC Hdr for last RLC PDU = 1 + /* For Padding BSR: + - if the number of padding bits is equal to or larger than the size of the Short BSR plus its subheader but smaller than the size of the Long BSR plus its subheader: + - if more than one LCG has data available for transmission in the TTI where the BSR is transmitted: report Truncated BSR of the LCG with the highest priority logical channel with data available for transmission; + - else report Short BSR. + - else if the number of padding bits is equal to or larger than the size of the Long BSR plus its subheader, report Long BSR. + */ + if (mac_ce_p->sdu_length_total) { + padding_len = buflen - (mac_ce_p->total_mac_pdu_header_len + mac_ce_p->sdu_length_total); + } + + if ((padding_len) && (mac_ce_p->bsr_len == 0)) { + /* if the number of padding bits is equal to or larger than the size of the Long BSR plus its subheader, report Long BSR */ + if (padding_len >= (num_lcg_id_with_data+1+sizeof(NR_MAC_SUBHEADER_SHORT))) { + mac_ce_p->bsr_ce_len = num_lcg_id_with_data + 1; //variable size + mac_ce_p->bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); //2 bytes + // Trigger BSR Padding + mac->BSR_reporting_active |= NR_BSR_TRIGGER_PADDING; + } else if (padding_len >= (sizeof(NR_BSR_SHORT)+sizeof(NR_MAC_SUBHEADER_FIXED))) { + mac_ce_p->bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte + mac_ce_p->bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); //1 byte + + if (num_lcg_id_with_data > 1) { + // REPORT SHORT TRUNCATED BSR + //Get LCGID of highest priority LCID with data (todo) + for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { + lcg_id = mac->scheduling_info.LCGID[lcid]; + if ((lcg_id < NR_MAX_NUM_LCGID) && (mac->scheduling_info.BSR_bytes[lcg_id])) { + lcg_id_bsr_trunc = lcg_id; + } + } + } else { + //Report SHORT BSR, clear bsr_t + mac_ce_p->bsr_t = NULL; + } + + // Trigger BSR Padding + mac->BSR_reporting_active |= NR_BSR_TRIGGER_PADDING; + } + + mac_ce_p->bsr_len = mac_ce_p->bsr_header_len + mac_ce_p->bsr_ce_len; + mac_ce_p->tot_mac_ce_len += mac_ce_p->bsr_len; + mac_ce_p->total_mac_pdu_header_len += mac_ce_p->bsr_len; + } + + //Fill BSR Infos + if (mac_ce_p->bsr_ce_len == 0) { + mac_ce_p->bsr_s = NULL; + mac_ce_p->bsr_l = NULL; + mac_ce_p->bsr_t = NULL; + } else if (mac_ce_p->bsr_header_len == sizeof(NR_MAC_SUBHEADER_SHORT)) { + mac_ce_p->bsr_s = NULL; + mac_ce_p->bsr_t = NULL; + mac_ce_p->bsr_l->Buffer_size0 = mac->scheduling_info.BSR[0]; + mac_ce_p->bsr_l->Buffer_size1 = mac->scheduling_info.BSR[1]; + mac_ce_p->bsr_l->Buffer_size2 = mac->scheduling_info.BSR[2]; + mac_ce_p->bsr_l->Buffer_size3 = mac->scheduling_info.BSR[3]; + mac_ce_p->bsr_l->Buffer_size4 = mac->scheduling_info.BSR[4]; + mac_ce_p->bsr_l->Buffer_size5 = mac->scheduling_info.BSR[5]; + mac_ce_p->bsr_l->Buffer_size6 = mac->scheduling_info.BSR[6]; + mac_ce_p->bsr_l->Buffer_size7 = mac->scheduling_info.BSR[7]; + LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report LONG BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n", + module_idP, frameP, subframe, + mac->BSR_reporting_active, + mac->scheduling_info.BSR[0], + mac->scheduling_info.BSR[1], + mac->scheduling_info.BSR[2], + mac->scheduling_info.BSR[3], + mac->scheduling_info.BSR[4], + mac->scheduling_info.BSR[5], + mac->scheduling_info.BSR[6], + mac->scheduling_info.BSR[7]); + } else if (mac_ce_p->bsr_header_len == sizeof(NR_MAC_SUBHEADER_FIXED)) { + mac_ce_p->bsr_l = NULL; + + if ((mac_ce_p->bsr_t != NULL) && (mac->BSR_reporting_active & NR_BSR_TRIGGER_PADDING)) { + //Truncated BSR + mac_ce_p->bsr_s = NULL; + mac_ce_p->bsr_t->LcgID = lcg_id_bsr_trunc; + mac_ce_p->bsr_t->Buffer_size = mac->scheduling_info.BSR[lcg_id_bsr_trunc]; + LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report TRUNCATED BSR with level %d for LCGID %d\n", + module_idP, frameP, subframe, + mac->BSR_reporting_active, + mac->scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); + } else { + mac_ce_p->bsr_t = NULL; + mac_ce_p->bsr_s->LcgID = lcg_id_bsr_trunc; + mac_ce_p->bsr_s->Buffer_size = mac->scheduling_info.BSR[lcg_id_bsr_trunc]; + LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report SHORT BSR with level %d for LCGID %d\n", + module_idP, frameP, subframe, + mac->BSR_reporting_active, + mac->scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); + } + } + + LOG_D(NR_MAC, "[UE %d][SR] Gave SDU to PHY, clearing any scheduling request\n", module_idP); + mac->scheduling_info.SR_pending = 0; + mac->scheduling_info.SR_COUNTER = 0; + + /* Actions when a BSR is sent */ + if (mac_ce_p->bsr_ce_len) { + LOG_D(NR_MAC, "[UE %d] MAC BSR Sent !! bsr (ce%d,hdr%d) buff_len %d\n", + module_idP, mac_ce_p->bsr_ce_len, mac_ce_p->bsr_header_len, buflen); + // Reset ReTx BSR Timer + mac->scheduling_info.retxBSR_SF = nr_get_sf_retxBSRTimer(mac->scheduling_info.retxBSR_Timer); + LOG_D(NR_MAC, "[UE %d] MAC ReTx BSR Timer Reset =%d\n", module_idP, mac->scheduling_info.retxBSR_SF); + + // Reset Periodic Timer except when BSR is truncated + if ((mac_ce_p->bsr_t == NULL) && (mac->scheduling_info.periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity)) { + mac->scheduling_info.periodicBSR_SF = nr_get_sf_periodicBSRTimer(mac->scheduling_info.periodicBSR_Timer); + LOG_D(NR_MAC, "[UE %d] MAC Periodic BSR Timer Reset =%d\n", + module_idP, + mac->scheduling_info.periodicBSR_SF); + } + + // Reset BSR Trigger flags + mac->BSR_reporting_active = BSR_TRIGGER_NONE; + } +} + +/** + * Function: to fetch data to be transmitted from RLC, place it in the ULSCH PDU buffer + to generate the complete MAC PDU with sub-headers and MAC CEs according to ULSCH MAC PDU generation (6.1.2 TS 38.321) + the selected sub-header for the payload sub-PDUs is NR_MAC_SUBHEADER_LONG + * @module_idP Module ID + * @CC_id Component Carrier index + * @frameP current UL frame + * @subframe current UL slot + * @gNB_index gNB index + * @ulsch_buffer Pointer to ULSCH PDU + * @buflen TBS + */ +uint8_t nr_ue_get_sdu(module_id_t module_idP, + int CC_id, + frame_t frameP, + sub_frame_t subframe, + uint8_t gNB_index, + uint8_t *ulsch_buffer, + uint16_t buflen) { + NR_UE_MAC_CE_INFO mac_ce_info; + NR_UE_MAC_CE_INFO *mac_ce_p=&mac_ce_info; + int16_t buflen_remain = 0; + mac_ce_p->bsr_len = 0; + mac_ce_p->bsr_ce_len = 0; + mac_ce_p->bsr_header_len = 0; + mac_ce_p->phr_len = 0; + //mac_ce_p->phr_ce_len = 0; + //mac_ce_p->phr_header_len = 0; + + uint8_t lcid = 0; + uint16_t sdu_length = 0; + uint16_t num_sdus = 0; + mac_ce_p->sdu_length_total = 0; + NR_BSR_SHORT bsr_short, bsr_truncated; + NR_BSR_LONG bsr_long; + mac_ce_p->bsr_s = &bsr_short; + mac_ce_p->bsr_l = &bsr_long; + mac_ce_p->bsr_t = &bsr_truncated; + //NR_POWER_HEADROOM_CMD phr; + //mac_ce_p->phr_p = &phr; + NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); + //int highest_priority = 16; + const uint8_t sh_size = sizeof(NR_MAC_SUBHEADER_LONG); + + // Pointer used to build the MAC PDU by placing the RLC SDUs in the ULSCH buffer + uint8_t *pdu = ulsch_buffer; + + //nr_ue_get_sdu_mac_ce_pre updates all mac_ce related header field related to length + mac_ce_p->tot_mac_ce_len = nr_ue_get_sdu_mac_ce_pre(module_idP, CC_id, frameP, subframe, gNB_index, ulsch_buffer, buflen, mac_ce_p); + mac_ce_p->total_mac_pdu_header_len = mac_ce_p->tot_mac_ce_len; LOG_D(NR_MAC, "In %s: [UE %d] [%d.%d] process UL transport block at with size TBS = %d bytes \n", __FUNCTION__, module_idP, frameP, subframe, buflen); @@ -2454,7 +2662,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, // TO DO: Multiplex in the order defined by the logical channel prioritization for (lcid = UL_SCH_LCID_SRB1; lcid < MAX_LCID; lcid++) { - buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total + sh_size); + buflen_remain = buflen - (mac_ce_p->total_mac_pdu_header_len + mac_ce_p->sdu_length_total + sh_size); LOG_D(NR_MAC, "In %s: [UE %d] [%d.%d] UL-DXCH -> ULSCH, RLC with LCID 0x%02x (TBS %d bytes, sdu_length_total %d bytes, MAC header len %d bytes, buflen_remain %d bytes)\n", __FUNCTION__, @@ -2463,8 +2671,8 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, subframe, lcid, buflen, - sdu_length_total, - tot_mac_ce_len, + mac_ce_p->sdu_length_total, + mac_ce_p->tot_mac_ce_len, buflen_remain); while (buflen_remain > 0){ @@ -2514,8 +2722,8 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, #endif pdu += sdu_length; - sdu_length_total += sdu_length; - total_mac_pdu_header_len += sh_size; + mac_ce_p->sdu_length_total += sdu_length; + mac_ce_p->total_mac_pdu_header_len += sh_size; num_sdus++; @@ -2525,160 +2733,37 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, break; } - buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total + sh_size); + buflen_remain = buflen - (mac_ce_p->total_mac_pdu_header_len + mac_ce_p->sdu_length_total + sh_size); //Update Buffer remain and BSR bytes after transmission mac->scheduling_info.LCID_buffer_remain[lcid] -= sdu_length; mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] -= sdu_length; - LOG_D(NR_MAC, "[UE %d] Update BSR [%d.%d] num_lcg_id_with_data %d. BSR_bytes for LCG%d=%d\n", - module_idP, frameP, subframe, num_lcg_id_with_data, mac->scheduling_info.LCGID[lcid], + LOG_D(NR_MAC, "[UE %d] Update BSR [%d.%d] BSR_bytes for LCG%d=%d\n", + module_idP, frameP, subframe, mac->scheduling_info.LCGID[lcid], mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]]); if (mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] < 0) mac->scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] = 0; - - //Update the number of LCGID with data as BSR shall reflect status after BSR transmission - if ((num_lcg_id_with_data > 1) && (mac-> scheduling_info.BSR_bytes[mac->scheduling_info.LCGID[lcid]] == 0)) { - num_lcg_id_with_data--; - } } } - // Compute BSR Values and update Nb LCGID with data after multiplexing - num_lcg_id_with_data = 0; - lcg_id_bsr_trunc = 0; + //nr_ue_get_sdu_mac_ce_post recalculates all mac_ce related header fields since buffer has been changed after mac_rlc_data_req. + //Also, BSR padding is handled here after knowing mac_ce_p->sdu_length_total. + nr_ue_get_sdu_mac_ce_post(module_idP, CC_id, frameP, subframe, gNB_index, ulsch_buffer, buflen, mac_ce_p); - for (lcg_id = 0; lcg_id < NR_MAX_NUM_LCGID; lcg_id++) { - if (bsr_ce_len == sizeof(NR_BSR_SHORT)) { - mac->scheduling_info.BSR[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE, NR_SHORT_BSR_TABLE_SIZE, mac->scheduling_info.BSR_bytes[lcg_id]); - } else { - mac->scheduling_info.BSR[lcg_id] = - nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE, NR_LONG_BSR_TABLE_SIZE, mac->scheduling_info.BSR_bytes[lcg_id]); - } - if (mac->scheduling_info.BSR_bytes[lcg_id]) { - num_lcg_id_with_data++; - lcg_id_bsr_trunc = lcg_id; - } - } + if (mac_ce_p->tot_mac_ce_len > 0) { - // TS 38.321 Section 5.4.5 - // Check BSR padding: it is done after PHR according to Logical Channel Prioritization order - // Check for max padding size, ie MAC Hdr for last RLC PDU = 1 - /* For Padding BSR: - - if the number of padding bits is equal to or larger than the size of the Short BSR plus its subheader but smaller than the size of the Long BSR plus its subheader: - - if more than one LCG has data available for transmission in the TTI where the BSR is transmitted: report Truncated BSR of the LCG with the highest priority logical channel with data available for transmission; - - else report Short BSR. - - else if the number of padding bits is equal to or larger than the size of the Long BSR plus its subheader, report Long BSR. - */ - if (sdu_length_total) { - padding_len = buflen - (total_mac_pdu_header_len + sdu_length_total); - } - - if ((padding_len) && (bsr_len == 0)) { - /* if the number of padding bits is equal to or larger than the size of the Long BSR plus its subheader, report Long BSR */ - if (padding_len >= (num_lcg_id_with_data+1+sizeof(NR_MAC_SUBHEADER_SHORT))) { - bsr_ce_len = num_lcg_id_with_data + 1; //variable size - bsr_header_len = sizeof(NR_MAC_SUBHEADER_SHORT); //2 bytes - // Trigger BSR Padding - mac->BSR_reporting_active |= NR_BSR_TRIGGER_PADDING; - } else if (padding_len >= (sizeof(NR_BSR_SHORT)+sizeof(NR_MAC_SUBHEADER_FIXED))) { - bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte - bsr_header_len = sizeof(NR_MAC_SUBHEADER_FIXED); //1 byte - - if (num_lcg_id_with_data > 1) { - // REPORT SHORT TRUNCATED BSR - //Get LCGID of highest priority LCID with data (todo) - for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) { - lcg_id = mac->scheduling_info.LCGID[lcid]; - if ((lcg_id < NR_MAX_NUM_LCGID) && (mac->scheduling_info.BSR_bytes[lcg_id])) { - lcg_id_bsr_trunc = lcg_id; - } - } - } else { - //Report SHORT BSR, clear bsr_t - bsr_t = NULL; - } - - // Trigger BSR Padding - mac->BSR_reporting_active |= NR_BSR_TRIGGER_PADDING; - } - - bsr_len = bsr_header_len + bsr_ce_len; - tot_mac_ce_len += bsr_len; - total_mac_pdu_header_len += bsr_len; - } - - //Fill BSR Infos - if (bsr_ce_len == 0) { - bsr_s = NULL; - bsr_l = NULL; - bsr_t = NULL; - } else if (bsr_header_len == sizeof(NR_MAC_SUBHEADER_SHORT)) { - bsr_s = NULL; - bsr_t = NULL; - bsr_l->Buffer_size0 = - mac->scheduling_info.BSR[0]; - bsr_l->Buffer_size1 = - mac->scheduling_info.BSR[1]; - bsr_l->Buffer_size2 = - mac->scheduling_info.BSR[2]; - bsr_l->Buffer_size3 = - mac->scheduling_info.BSR[3]; - bsr_l->Buffer_size4 = - mac->scheduling_info.BSR[4]; - bsr_l->Buffer_size5 = - mac->scheduling_info.BSR[5]; - bsr_l->Buffer_size6 = - mac->scheduling_info.BSR[6]; - bsr_l->Buffer_size7 = - mac->scheduling_info.BSR[7]; - LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report LONG BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n", - module_idP, frameP, subframe, - mac->BSR_reporting_active, - mac->scheduling_info.BSR[0], - mac->scheduling_info.BSR[1], - mac->scheduling_info.BSR[2], - mac->scheduling_info.BSR[3], - mac->scheduling_info.BSR[4], - mac->scheduling_info.BSR[5], - mac->scheduling_info.BSR[6], - mac->scheduling_info.BSR[7]); - } else if (bsr_header_len == sizeof(NR_MAC_SUBHEADER_FIXED)) { - bsr_l = NULL; - - if ((bsr_t != NULL) && (mac->BSR_reporting_active & NR_BSR_TRIGGER_PADDING)) { - //Truncated BSR - bsr_s = NULL; - bsr_t->LcgID = lcg_id_bsr_trunc; - bsr_t->Buffer_size = mac->scheduling_info.BSR[lcg_id_bsr_trunc]; - LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report TRUNCATED BSR with level %d for LCGID %d\n", - module_idP, frameP, subframe, - mac->BSR_reporting_active, - mac->scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); - } else { - bsr_t = NULL; - bsr_s->LcgID = lcg_id_bsr_trunc; - bsr_s->Buffer_size = mac->scheduling_info.BSR[lcg_id_bsr_trunc]; - LOG_D(NR_MAC, "[UE %d] Frame %d subframe %d BSR Trig=%d report SHORT BSR with level %d for LCGID %d\n", - module_idP, frameP, subframe, - mac->BSR_reporting_active, - mac->scheduling_info.BSR[lcg_id_bsr_trunc], lcg_id_bsr_trunc); - } - } - - if (tot_mac_ce_len > 0) { - - LOG_D(NR_MAC, "In %s copying %d bytes of MAC CEs to the UL PDU \n", __FUNCTION__, tot_mac_ce_len); - nr_write_ce_ulsch_pdu(pdu, mac, 0, NULL, bsr_t, bsr_s, bsr_l); - pdu += (unsigned char) tot_mac_ce_len; + LOG_D(NR_MAC, "In %s copying %d bytes of MAC CEs to the UL PDU \n", __FUNCTION__, mac_ce_p->tot_mac_ce_len); + nr_write_ce_ulsch_pdu(pdu, mac, 0, NULL, mac_ce_p->bsr_t, mac_ce_p->bsr_s, mac_ce_p->bsr_l); + pdu += (unsigned char) mac_ce_p->tot_mac_ce_len; #ifdef ENABLE_MAC_PAYLOAD_DEBUG - LOG_I(NR_MAC, "In %s: dumping MAC CE with length tot_mac_ce_len %d: \n", __FUNCTION__, tot_mac_ce_len); - log_dump(NR_MAC, mac_header_control_elements, tot_mac_ce_len, LOG_DUMP_CHAR, "\n"); + LOG_I(NR_MAC, "In %s: dumping MAC CE with length tot_mac_ce_len %d: \n", __FUNCTION__, mac_ce_p->tot_mac_ce_len); + log_dump(NR_MAC, mac_header_control_elements, mac_ce_p->tot_mac_ce_len, LOG_DUMP_CHAR, "\n"); #endif } - buflen_remain = buflen - (total_mac_pdu_header_len + sdu_length_total); + buflen_remain = buflen - (mac_ce_p->total_mac_pdu_header_len + mac_ce_p->sdu_length_total); // Compute final offset for padding and fill remainder of ULSCH with 0 if (buflen_remain > 0) { @@ -2715,30 +2800,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, log_dump(NR_MAC, ulsch_buffer, buflen, LOG_DUMP_CHAR, "\n"); #endif - LOG_D(NR_MAC, "[UE %d][SR] Gave SDU to PHY, clearing any scheduling request\n", module_idP); - mac->scheduling_info.SR_pending = 0; - mac->scheduling_info.SR_COUNTER = 0; - - /* Actions when a BSR is sent */ - if (bsr_ce_len) { - LOG_D(NR_MAC, "[UE %d] MAC BSR Sent !! bsr (ce%d,hdr%d) buff_len %d\n", - module_idP, bsr_ce_len, bsr_header_len, buflen); - // Reset ReTx BSR Timer - mac->scheduling_info.retxBSR_SF = nr_get_sf_retxBSRTimer(mac->scheduling_info.retxBSR_Timer); - LOG_D(NR_MAC, "[UE %d] MAC ReTx BSR Timer Reset =%d\n", module_idP, mac->scheduling_info.retxBSR_SF); - - // Reset Periodic Timer except when BSR is truncated - if ((bsr_t == NULL) && (mac->scheduling_info.periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity)) { - mac->scheduling_info.periodicBSR_SF = nr_get_sf_periodicBSRTimer(mac->scheduling_info.periodicBSR_Timer); - LOG_D(NR_MAC, "[UE %d] MAC Periodic BSR Timer Reset =%d\n", - module_idP, - mac->scheduling_info.periodicBSR_SF); - } - - // Reset BSR Trigger flags - mac->BSR_reporting_active = BSR_TRIGGER_NONE; - } - return num_sdus > 0 ? 1 : 0; } From a13ed80cb79684f289c3d9f5cd2a9b68d9b39626 Mon Sep 17 00:00:00 2001 From: "Deokseong \"David\" Kim" Date: Mon, 25 Oct 2021 21:46:27 +0000 Subject: [PATCH 066/102] Added one more condition for valid cell config --- openair2/LAYER2/NR_MAC_UE/config_ue.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index 25b4100577..d223b9ddd7 100755 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -689,7 +689,7 @@ int nr_rrc_mac_config_req_ue( } config_control_ue(mac); if (get_softmodem_params()->nsa) { - if (cell_group_config->spCellConfig->reconfigurationWithSync) { + if (cell_group_config->spCellConfig && cell_group_config->spCellConfig->reconfigurationWithSync) { if (cell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated) { ra->rach_ConfigDedicated = cell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink; } From 68fef918160b79b2d19ab4a6b08c2d2ef2ea4d8e Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Tue, 26 Oct 2021 19:04:03 +0100 Subject: [PATCH 067/102] Apply the NSA t_Reordering value also for SA --- openair2/RRC/NR/rrc_gNB.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index 655e6973a1..ee924c7a58 100755 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -1043,7 +1043,7 @@ rrc_gNB_generate_dedicatedRRCReconfiguration( DRB_config->pdcp_Config->moreThanOneRLC = NULL; DRB_config->pdcp_Config->t_Reordering = calloc(1, sizeof(*DRB_config->pdcp_Config->t_Reordering)); - *DRB_config->pdcp_Config->t_Reordering = NR_PDCP_Config__t_Reordering_ms750; + *DRB_config->pdcp_Config->t_Reordering = NR_PDCP_Config__t_Reordering_ms0; DRB_config->pdcp_Config->ext1 = NULL; if (rrc->security.do_drb_integrity) { From 7cf75d1ffcc7a56c6f44a4f2d59276c8839bdbcf Mon Sep 17 00:00:00 2001 From: hardy Date: Tue, 26 Oct 2021 13:58:19 +0200 Subject: [PATCH 068/102] change eNB ID for the different test config --- .../enb.band38.lte_2x2.100PRB.usrpn310.conf | 281 ++++++++++++++++++ .../enb.band38.nsa_2x2.100PRB.usrpn310.conf | 2 +- ci-scripts/xml_files/fr1_lte_2x2_quectel.xml | 2 +- 3 files changed, 283 insertions(+), 2 deletions(-) create mode 100644 ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf diff --git a/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf b/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf new file mode 100644 index 0000000000..d2e91fb872 --- /dev/null +++ b/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf @@ -0,0 +1,281 @@ +Active_eNBs = ( "eNB-Eurecom-B38"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +eNBs = +( + { + ////////// Identification parameters: + eNB_ID = 0xe02; + + cell_type = "CELL_MACRO_ENB"; + + eNB_name = "eNB-Eurecom-B38"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + plmn_list = ( { mcc = 208; mnc = 97; mnc_length = 2; } ); + + tr_s_preference = "local_mac" + + ////////// Physical parameters: + + component_carriers = ( + { + node_function = "3GPP_eNODEB"; + node_timing = "synch_to_ext_device"; + node_synch_ref = 0; + frame_type = "TDD"; + tdd_config = 1; + tdd_config_s = 0; + prefix_type = "NORMAL"; + eutra_band = 38; + downlink_frequency = 2605000000L; + nr_scg_ssb_freq = 624608; + uplink_frequency_offset = 0; + Nid_cell = 0; + N_RB_DL = 100; + Nid_cell_mbsfn = 0; + nb_antenna_ports = 1; + nb_antennas_tx = 2; + nb_antennas_rx = 2; + tx_gain = 90; + rx_gain = 125; + pbch_repetition = "FALSE"; + prach_root = 0; + prach_config_index = 0; + prach_high_speed = "DISABLE"; + prach_zero_correlation = 1; + prach_freq_offset = 2; + pucch_delta_shift = 1; + pucch_nRB_CQI = 0; + pucch_nCS_AN = 0; + pucch_n1_AN = 0; + pdsch_referenceSignalPower = -29; + pdsch_p_b = 0; + pusch_n_SB = 1; + pusch_enable64QAM = "DISABLE"; + pusch_hoppingMode = "interSubFrame"; + pusch_hoppingOffset = 0; + pusch_groupHoppingEnabled = "ENABLE"; + pusch_groupAssignment = 0; + pusch_sequenceHoppingEnabled = "DISABLE"; + pusch_nDMRS1 = 1; + phich_duration = "NORMAL"; + phich_resource = "ONESIXTH"; + srs_enable = "DISABLE"; + /* srs_BandwidthConfig =; + srs_SubframeConfig =; + srs_ackNackST =; + srs_MaxUpPts =;*/ + + pusch_p0_Nominal = -96; + pusch_alpha = "AL1"; + pucch_p0_Nominal = -104; + msg3_delta_Preamble = 6; + pucch_deltaF_Format1 = "deltaF2"; + pucch_deltaF_Format1b = "deltaF3"; + pucch_deltaF_Format2 = "deltaF0"; + pucch_deltaF_Format2a = "deltaF0"; + pucch_deltaF_Format2b = "deltaF0"; + + rach_numberOfRA_Preambles = 64; + rach_preamblesGroupAConfig = "DISABLE"; + /* + rach_sizeOfRA_PreamblesGroupA = ; + rach_messageSizeGroupA = ; + rach_messagePowerOffsetGroupB = ; + */ + rach_powerRampingStep = 4; + rach_preambleInitialReceivedTargetPower = -108; + rach_preambleTransMax = 10; + rach_raResponseWindowSize = 10; + rach_macContentionResolutionTimer = 48; + rach_maxHARQ_Msg3Tx = 4; + + pcch_default_PagingCycle = 128; + pcch_nB = "oneT"; + bcch_modificationPeriodCoeff = 2; + ue_TimersAndConstants_t300 = 1000; + ue_TimersAndConstants_t301 = 1000; + ue_TimersAndConstants_t310 = 1000; + ue_TimersAndConstants_t311 = 10000; + ue_TimersAndConstants_n310 = 20; + ue_TimersAndConstants_n311 = 1; + ue_TransmissionMode = 1; + + //Parameters for SIB18 + rxPool_sc_CP_Len = "normal"; + rxPool_sc_Period = "sf40"; + rxPool_data_CP_Len = "normal"; + rxPool_ResourceConfig_prb_Num = 20; + rxPool_ResourceConfig_prb_Start = 5; + rxPool_ResourceConfig_prb_End = 44; + rxPool_ResourceConfig_offsetIndicator_present = "prSmall"; + rxPool_ResourceConfig_offsetIndicator_choice = 0; + rxPool_ResourceConfig_subframeBitmap_present = "prBs40"; + rxPool_ResourceConfig_subframeBitmap_choice_bs_buf = "00000000000000000000"; + rxPool_ResourceConfig_subframeBitmap_choice_bs_size = 5; + rxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0; +/* rxPool_dataHoppingConfig_hoppingParameter = 0; + rxPool_dataHoppingConfig_numSubbands = "ns1"; + rxPool_dataHoppingConfig_rbOffset = 0; + rxPool_commTxResourceUC-ReqAllowed = "TRUE"; +*/ + // Parameters for SIB19 + discRxPool_cp_Len = "normal" + discRxPool_discPeriod = "rf32" + discRxPool_numRetx = 1; + discRxPool_numRepetition = 2; + discRxPool_ResourceConfig_prb_Num = 5; + discRxPool_ResourceConfig_prb_Start = 3; + discRxPool_ResourceConfig_prb_End = 21; + discRxPool_ResourceConfig_offsetIndicator_present = "prSmall"; + discRxPool_ResourceConfig_offsetIndicator_choice = 0; + discRxPool_ResourceConfig_subframeBitmap_present = "prBs40"; + discRxPool_ResourceConfig_subframeBitmap_choice_bs_buf = "f0ffffffff"; + discRxPool_ResourceConfig_subframeBitmap_choice_bs_size = 5; + discRxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0; + + } + ); + + + srb1_parameters : + { + # timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500] + timer_poll_retransmit = 80; + + # timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200] + timer_reordering = 35; + + # timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500] + timer_status_prohibit = 0; + + # poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)] + poll_pdu = 4; + + # poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)] + poll_byte = 99999; + + # max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32] + max_retx_threshold = 4; + } + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// MME parameters: + mme_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + + enable_measurement_reports = "no"; + + ///X2 + enable_x2 = "yes"; + t_reloc_prep = 1000; /* unit: millisecond */ + tx2_reloc_overall = 2000; /* unit: millisecond */ + t_dc_prep = 1000; /* unit: millisecond */ + t_dc_overall = 2000; /* unit: millisecond */ + + NETWORK_INTERFACES : + { + ENB_INTERFACE_NAME_FOR_S1_MME = "eno1"; + ENB_IPV4_ADDRESS_FOR_S1_MME = "CI_ENB_IP_ADDR"; + ENB_INTERFACE_NAME_FOR_S1U = "eno1"; + ENB_IPV4_ADDRESS_FOR_S1U = "CI_ENB_IP_ADDR"; + ENB_PORT_FOR_S1U = 2152; # Spec 2152 + ENB_IPV4_ADDRESS_FOR_X2C = "CI_ENB_IP_ADDR"; + ENB_PORT_FOR_X2C = 36422; # Spec 36422 + }; + } +); + +MACRLCs = ( + { + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + phy_test_mode = 0; + scheduler_mode = "fairRR"; + bler_target_upper = 20.0; + bler_target_lower = 10.0; + max_ul_rb_index = 27; + puSch10xSnr = 200; + puCch10xSnr = 150; + } +); + +L1s = ( + { + num_cc = 1; + tr_n_preference = "local_mac"; + prach_dtx_threshold = 200; + pucch1_dtx_threshold = 5 + pucch1ab_dtx_threshold =0; + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 2 + nb_rx = 2 + att_tx = 0 + att_rx = 0; + bands = [38]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + eNB_instances = [0]; + sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2"; + + } +); + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_SINGLE_THREAD"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +NETWORK_CONTROLLER : +{ + FLEXRAN_ENABLED = "no"; + FLEXRAN_INTERFACE_NAME = "lo"; + FLEXRAN_IPV4_ADDRESS = "127.0.0.1"; + FLEXRAN_PORT = 2210; + FLEXRAN_CACHE = "/mnt/oai_agent_cache"; + FLEXRAN_AWAIT_RECONF = "no"; +}; + + log_config : + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + }; + diff --git a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf index 3460b82ac5..7a9df04996 100644 --- a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf +++ b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf @@ -6,7 +6,7 @@ eNBs = ( { ////////// Identification parameters: - eNB_ID = 0xe00; + eNB_ID = 0xe05; cell_type = "CELL_MACRO_ENB"; diff --git a/ci-scripts/xml_files/fr1_lte_2x2_quectel.xml b/ci-scripts/xml_files/fr1_lte_2x2_quectel.xml index 86d9e5d5f0..03d474aef0 100644 --- a/ci-scripts/xml_files/fr1_lte_2x2_quectel.xml +++ b/ci-scripts/xml_files/fr1_lte_2x2_quectel.xml @@ -59,7 +59,7 @@ Initialize_eNB Initialize eNB - -O ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf --usrp-tx-thread-config 1 --thread-pool 0,2,4,6 + -O ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf --usrp-tx-thread-config 1 --thread-pool 0,2,4,6 0 0 lte From 0cccbced2827a024e05a8e1f47e7b46363a26c87 Mon Sep 17 00:00:00 2001 From: frtabu Date: Tue, 10 Aug 2021 19:51:08 +0200 Subject: [PATCH 069/102] Move cuda ldpc code in a shared lib --- cmake_targets/CMakeLists.txt | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 9592334125..32980c9b75 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1590,6 +1590,11 @@ set(PHY_LDPC_OPTIM8SEGMULTI_SRC ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c ) +set(PHY_LDPC_CUDA_SRC + ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder.cu + ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c +) + set(PHY_NR_CODINGIF ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_load.c; ) @@ -1597,8 +1602,13 @@ set(PHY_NR_CODINGIF add_library(ldpc_orig MODULE ${PHY_LDPC_ORIG_SRC} ) add_library(ldpc_optim MODULE ${PHY_LDPC_OPTIM_SRC} ) add_library(ldpc_optim8seg MODULE ${PHY_LDPC_OPTIM8SEG_SRC} ) +if (CUDA_FOUND) + add_library(ldpc_cuda MODULE ${PHY_LDPC_CUDA_SRC} ) + CUDA_ADD_CUFFT_TO_TARGET(ldpc_cuda) +endif (CUDA_FOUND) add_library(ldpc MODULE ${PHY_LDPC_OPTIM8SEGMULTI_SRC} ) + add_library(coding MODULE ${PHY_TURBOSRC} ) add_library(dfts MODULE ${OPENAIR1_DIR}/PHY/TOOLS/oai_dfts.c ) @@ -3178,10 +3188,7 @@ if (CUDA_FOUND) # For CUDA library ################################################### - CUDA_ADD_LIBRARY(LDPC_CU - ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu - ) - CUDA_ADD_CUFFT_TO_TARGET(LDPC_CU) + cuda_add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c ${T_SOURCE} @@ -3189,7 +3196,7 @@ if (CUDA_FOUND) ) target_link_libraries(ldpctest -ldl -Wl,--start-group - LDPC_CU UTIL SIMU PHY_NR CONFIG_LIB + UTIL SIMU PHY_NR CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} dl ) From 9fcda4500aa4f6e4e3a3edcc890c34165edc7410 Mon Sep 17 00:00:00 2001 From: frtabu Date: Tue, 10 Aug 2021 19:51:08 +0200 Subject: [PATCH 070/102] Move cuda ldpc code in a shared lib --- cmake_targets/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 32980c9b75..d154910828 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1591,7 +1591,7 @@ set(PHY_LDPC_OPTIM8SEGMULTI_SRC ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c ) set(PHY_LDPC_CUDA_SRC - ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder.cu + ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c ) From 46a1b0725b494e65dc4967b3a1309f48cf003722 Mon Sep 17 00:00:00 2001 From: frtabu Date: Wed, 8 Sep 2021 22:33:13 +0200 Subject: [PATCH 071/102] adapt ldcp calls to spport new interface required by cuda decoder in shared lib --- cmake_targets/CMakeLists.txt | 52 +++++-------------- .../nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu | 46 ++++++++++++++++ openair1/PHY/CODING/nrLDPC_load.c | 17 ++++-- .../PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c | 5 +- 4 files changed, 76 insertions(+), 44 deletions(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index d154910828..cf7b1543d3 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -309,6 +309,7 @@ endif() # # add autotools definitions that were maybe used! + add_definitions("-DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_FCNTL_H=1 -DHAVE_ARPA_INET_H=1 -DHAVE_SYS_TIME_H=1 -DHAVE_SYS_SOCKET_H=1 -DHAVE_STRERROR=1 -DHAVE_SOCKET=1 -DHAVE_MEMSET=1 -DHAVE_GETTIMEOFDAY=1 -DHAVE_STDLIB_H=1 -DHAVE_MALLOC=1 -DHAVE_LIBSCTP") set(commonOpts "-pipe -Wno-packed-bitfield-compat -fPIC -Wall -fno-strict-aliasing -rdynamic") @@ -318,11 +319,7 @@ set(CMAKE_C_FLAGS set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${C_FLAGS_PROCESSOR} ${commonOpts} -std=c++11") -# cuda compiler bug (limitation) on complex macro definition -if (CUDA_FOUND) - set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCUDA_FLAG") - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -DCUDA_FLAG") -endif() + if (SANITIZE_ADDRESS) set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fsanitize=address -fno-common") @@ -3123,7 +3120,11 @@ target_link_libraries (nr-uesoftmodem ${LIB_LMS_LIBRARIES}) target_link_libraries (nr-uesoftmodem ${T_LIB}) add_dependencies( nr-uesoftmodem ldpc_orig ldpc_optim ldpc_optim8seg ldpc ) - +if (CUDA_FOUND) + add_dependencies( nr-uesoftmodem ldpc_cuda) + add_dependencies( nr-softmodem ldpc_cuda) + add_dependencies( ocp-gnb ldpc_cuda) +endif (CUDA_FOUND) ###################################" # Addexecutables for tests #################################### @@ -3183,41 +3184,14 @@ target_link_libraries(smallblocktest m pthread ${ATLAS_LIBRARIES} dl ) -if (CUDA_FOUND) -################################################### -# For CUDA library -################################################### +add_executable(ldpctest + ${PHY_NR_CODINGIF} + ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c + ${T_SOURCE} + ${SHLIB_LOADER_SOURCES} + ) - cuda_add_executable(ldpctest - ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c - ${T_SOURCE} - ${SHLIB_LOADER_SOURCES} - ) - target_link_libraries(ldpctest -ldl - -Wl,--start-group - UTIL SIMU PHY_NR CONFIG_LIB - -Wl,--end-group - m pthread ${ATLAS_LIBRARIES} dl - ) - -else (CUDA_FOUND) - add_executable(ldpctest - ${PHY_NR_CODINGIF} - ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c - ${T_SOURCE} - ${SHLIB_LOADER_SOURCES} - ) - -endif () - - -# add_executable(ldpctest - # ${PHY_NR_CODINGIF} - # ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c - # ${T_SOURCE} - # ${SHLIB_LOADER_SOURCES} - # ) add_dependencies( ldpctest ldpc_orig ldpc_optim ldpc_optim8seg ldpc ) target_link_libraries(ldpctest diff --git a/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu b/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu index 931d500338..42faa1e27a 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu +++ b/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu @@ -483,6 +483,52 @@ void init_LLR_DMA_for_CUDA(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8 } +using namespace std ; + +/* from here: entry points in decoder shared lib */ +extern "C" +int ldpc_autoinit(void) { // called by the library loader +int devices = 0; + + cudaError_t err = cudaGetDeviceCount(&devices); + AssertFatal(devices>0,"\nNo cuda GPU found\n\n"); + + const int kb = 1024; + const int mb = kb * kb; + wcout << "NBody.GPU" << endl << "=========" << endl << endl; + + wcout << "CUDA version: v" << CUDART_VERSION << endl; + + + wcout << "CUDA Devices: " << endl << endl; + + for(int i = 0; i < devices; ++i) + { + cudaDeviceProp props; + cudaGetDeviceProperties(&props, i); + wcout << i << ": " << props.name << ": " << props.major << "." << props.minor << endl; + wcout << " Global memory: " << props.totalGlobalMem / mb << "mb" << endl; + wcout << " Shared memory: " << props.sharedMemPerBlock / kb << "kb" << endl; + wcout << " Constant memory: " << props.totalConstMem / kb << "kb" << endl; + wcout << " Block registers: " << props.regsPerBlock << endl << endl; + + wcout << " Warp size: " << props.warpSize << endl; + wcout << " Threads per block: " << props.maxThreadsPerBlock << endl; + wcout << " Max block dimensions: [ " << props.maxThreadsDim[0] << ", " << props.maxThreadsDim[1] << ", " << props.maxThreadsDim[2] << " ]" << endl; + wcout << " Max grid dimensions: [ " << props.maxGridSize[0] << ", " << props.maxGridSize[1] << ", " << props.maxGridSize[2] << " ]" << endl; + wcout << endl; + } + warmup_for_GPU(); + return 0; +} + +extern "C" +void nrLDPC_initcall(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out) { + set_compact_BG(p_decParams->Z,p_decParams->BG); + init_LLR_DMA(p_decParams, p_llr, p_out); +} + + extern "C" int32_t nrLDPC_decoder_LYC(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out, int block_length, time_stats_t *time_decoder) { diff --git a/openair1/PHY/CODING/nrLDPC_load.c b/openair1/PHY/CODING/nrLDPC_load.c index a74bdf7bd1..677c5d53b0 100644 --- a/openair1/PHY/CODING/nrLDPC_load.c +++ b/openair1/PHY/CODING/nrLDPC_load.c @@ -42,14 +42,25 @@ /* function description array, to be used when loading the encoding/decoding shared lib */ -static loader_shlibfunc_t shlib_fdesc[2]; -char *arg[64]={"ldpctest","-O","cmdlineonly::dbgl0"}; +static loader_shlibfunc_t shlib_fdesc[3]; + +/* arguments used when called from phy simulators exec's which do not use the config module */ +/* arg is used to initialize the config module so that the loader works as expected */ +char *arg[64]={"ldpctest","-O","cmdlineonly::dbgl0",NULL,NULL}; int load_nrLDPClib(void) { char *ptr = (char*)config_get_if(); + char libname[64]="ldpc"; + int argc=3; + if (run_cuda) { + arg[3]="--loader.ldpc.shlibversion"; + argc++; + arg[4]="_cuda"; + argc++; + } if ( ptr==NULL ) {// phy simulators, config module possibly not loaded - load_configmodule(3,(char **)arg,CONFIG_ENABLECMDLINEONLY) ; + load_configmodule(argc,(char **)arg,CONFIG_ENABLECMDLINEONLY) ; logInit(); } shlib_fdesc[0].fname = "nrLDPC_decod"; diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c index 509e42d663..816b025d34 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c @@ -497,6 +497,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, } VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_LDPC, VCD_FUNCTION_IN); + nrLDPC_initcall(p_decParams, (int8_t*)&pl[0], llrProcBuf); no_iteration_ldpc = nrLDPC_decoder(p_decParams, (int8_t *)&pl[0], llrProcBuf, @@ -956,7 +957,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue, for (i=0, j=0; j < ((kc*harq_process->Z)>>4)+1; i+=2, j++) { pl[j] = _mm_packs_epi16(pv[i],pv[i+1]); } - + nrLDPC_initcall(p_decParams, (int8_t*)&pl[0], llrProcBuf); no_iteration_ldpc = nrLDPC_decoder(p_decParams, (int8_t *)&pl[0], llrProcBuf, @@ -1340,7 +1341,7 @@ void nr_dlsch_decoding_process(void *arg) { for (i=0, j=0; j < ((kc*harq_process->Z)>>4)+1; i+=2, j++) { pl[j] = _mm_packs_epi16(pv[i],pv[i+1]); } - + nrLDPC_initcall(p_decParams, (int8_t*)&pl[0], llrProcBuf); no_iteration_ldpc = nrLDPC_decoder(p_decParams, (int8_t *)&pl[0], llrProcBuf, From 41ba9a5afb02b4f8393c6d6da755390594e421fd Mon Sep 17 00:00:00 2001 From: frtabu Date: Thu, 9 Sep 2021 02:56:05 +0200 Subject: [PATCH 072/102] Fix rebasing problems --- cmake_targets/CMakeLists.txt | 12 ++++--- executables/nr-uesoftmodem.c | 2 +- openair1/PHY/CODING/TESTBENCH/ldpctest.c | 34 +++++-------------- .../CODING/nrLDPC_decoder/nrLDPC_decoder.c | 3 +- .../PHY/CODING/nrLDPC_decoder/nrLDPC_types.h | 1 + .../nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu | 12 +++---- openair1/PHY/CODING/nrLDPC_defs.h | 3 +- openair1/PHY/CODING/nrLDPC_extern.h | 7 ++-- openair1/PHY/CODING/nrLDPC_load.c | 7 ++-- openair1/PHY/INIT/nr_init.c | 2 +- 10 files changed, 38 insertions(+), 45 deletions(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index cf7b1543d3..48612ee457 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -166,7 +166,7 @@ if (CUDA_FOUND) add_definitions("-L/usr/local/cuda/lib64") SET(CUDA_NVCC_FLAGS - "${CUDA_NVCC_FLAGS};-arch=sm_60;") + "${CUDA_NVCC_FLAGS};--gpu-architecture=compute_60") # Disable warnings for CUDA SET(CUDA_NVCC_FLAGS "${CUDA_NVCC_FLAGS};-lpthread;-w;-O3;--default-stream;per-thread;-I/usr/local/cuda/inc;-L/usr/local/cuda/lib -lcutil;-rdc=true;-lcudadevrt") @@ -1600,9 +1600,11 @@ add_library(ldpc_orig MODULE ${PHY_LDPC_ORIG_SRC} ) add_library(ldpc_optim MODULE ${PHY_LDPC_OPTIM_SRC} ) add_library(ldpc_optim8seg MODULE ${PHY_LDPC_OPTIM8SEG_SRC} ) if (CUDA_FOUND) - add_library(ldpc_cuda MODULE ${PHY_LDPC_CUDA_SRC} ) - CUDA_ADD_CUFFT_TO_TARGET(ldpc_cuda) + cuda_add_library(ldpc_cuda MODULE ${PHY_LDPC_CUDA_SRC} ) + set_target_properties(ldpc_cuda PROPERTIES CUDA_SEPARABLE_COMPILATION ON) +# CUDA_ADD_CUFFT_TO_TARGET(ldpc_cuda) endif (CUDA_FOUND) + add_library(ldpc MODULE ${PHY_LDPC_OPTIM8SEGMULTI_SRC} ) @@ -3193,7 +3195,9 @@ add_executable(ldpctest ) add_dependencies( ldpctest ldpc_orig ldpc_optim ldpc_optim8seg ldpc ) - +if (CUDA_FOUND) + add_dependencies( ldpctest ldpc_cuda) +endif (CUDA_FOUND) target_link_libraries(ldpctest -Wl,--start-group UTIL SIMU_COMMON SIMU PHY_NR PHY_COMMON PHY_NR_COMMON CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} dl diff --git a/executables/nr-uesoftmodem.c b/executables/nr-uesoftmodem.c index 5a8b381206..f9088dcc74 100644 --- a/executables/nr-uesoftmodem.c +++ b/executables/nr-uesoftmodem.c @@ -436,7 +436,7 @@ int main( int argc, char **argv ) { itti_init(TASK_MAX, tasks_info); init_opt() ; - load_nrLDPClib(); + load_nrLDPClib(0); if (ouput_vcd) { vcd_signal_dumper_init("/tmp/openair_dump_nrUE.vcd"); diff --git a/openair1/PHY/CODING/TESTBENCH/ldpctest.c b/openair1/PHY/CODING/TESTBENCH/ldpctest.c index 91c5d59611..af38c22cfc 100644 --- a/openair1/PHY/CODING/TESTBENCH/ldpctest.c +++ b/openair1/PHY/CODING/TESTBENCH/ldpctest.c @@ -101,8 +101,8 @@ int test_ldpc(short No_iteration, unsigned int *crc_misses, time_stats_t *time_optim, time_stats_t *time_decoder, - n_iter_stats_t *dec_iter, - short run_cuda) + n_iter_stats_t *dec_iter + ) { //clock initiate //time_stats_t time,time_optim,tinput,tprep,tparity,toutput, time_decoder; @@ -393,28 +393,13 @@ int test_ldpc(short No_iteration, decParams.R=code_rate_vec[R_ind];//13; decParams.numMaxIter=No_iteration; decParams.outMode = nrLDPC_outMode_BIT; + decParams.block_length=block_length; //decParams.outMode =nrLDPC_outMode_LLRINT8; -#ifdef CUDA_FLAG - set_compact_BG(Zc,BG); - init_LLR_DMA_for_CUDA(&decParams, (int8_t*)channel_output_fixed[j], (int8_t*)estimated_output[j], block_length); -#endif + nrLDPC_initcall(&decParams, (int8_t*)channel_output_fixed[j], (int8_t*)estimated_output[j]); for(j=0;j 1280, 2401 -> 2560 @@ -619,7 +602,7 @@ int main(int argc, char *argv[]) printf("SNR0 %f: \n", SNR0); - load_nrLDPClib(); + load_nrLDPClib(run_cuda); load_nrLDPClib_ref("_orig", &encoder_orig); //for (block_length=8;block_length<=MAX_BLOCK_LENGTH;block_length+=8) @@ -691,8 +674,7 @@ int main(int argc, char *argv[]) &crc_misses, time_optim, time_decoder, - dec_iter, - run_cuda); + dec_iter); printf("SNR %f, BLER %f (%u/%d)\n", SNR, (float)decoded_errors[i]/(float)n_trials, decoded_errors[i], n_trials); printf("SNR %f, BER %f (%u/%d)\n", SNR, (float)errors_bit/(float)n_trials/(float)block_length/(double)n_segments, decoded_errors[i], n_trials); diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c index 587b2bceaa..166cd9a5a3 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c @@ -46,7 +46,8 @@ #endif static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, t_nrLDPC_procBuf* p_procBuf, uint32_t numLLR, t_nrLDPC_lut* p_lut, t_nrLDPC_dec_params* p_decParams, t_nrLDPC_time_stats* p_profiler); - +void nrLDPC_initcall(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out) { +} int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out, t_nrLDPC_procBuf* p_procBuf, t_nrLDPC_time_stats* p_profiler) { uint32_t numLLR; diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h index e5b99246d5..99b6f75f93 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h @@ -70,6 +70,7 @@ typedef struct nrLDPC_dec_params { uint16_t Z; /**< Lifting size */ uint8_t R; /**< Decoding rate: Format 15,13,... for code rates 1/5, 1/3,... */ uint8_t numMaxIter; /**< Maximum number of iterations */ + int block_length; e_nrLDPC_outMode outMode; /**< Output format */ } t_nrLDPC_dec_params; diff --git a/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu b/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu index 42faa1e27a..d47b21e90e 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu +++ b/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu @@ -7,14 +7,14 @@ * \note * \warning */ - +#include #include #include #include #include #include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h" #include "PHY/CODING/nrLDPC_decoder/nrLDPCdecoder_defs.h" - +#include "assertions.h" #include "bgs/BG1_I0" #include "bgs/BG1_I1" #include "bgs/BG1_I2" @@ -462,10 +462,11 @@ void read_BG(int BG, int *h, int row, int col) } extern "C" -void init_LLR_DMA_for_CUDA(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out, int block_length){ +void init_LLR_DMA(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out){ uint16_t Zc = p_decParams->Z; uint8_t BG = p_decParams->BG; + int block_length = p_decParams->block_length; uint8_t row,col; if(BG == 1){ row = 46; @@ -530,13 +531,12 @@ void nrLDPC_initcall(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_ extern "C" -int32_t nrLDPC_decoder_LYC(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out, int block_length, time_stats_t *time_decoder) +int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out,t_nrLDPC_procBuf* p_procBuf, t_nrLDPC_time_stats *time_decoder) { - - uint16_t Zc = p_decParams->Z; uint8_t BG = p_decParams->BG; uint8_t numMaxIter = p_decParams->numMaxIter; + int block_length = p_decParams->block_length; e_nrLDPC_outMode outMode = p_decParams->outMode; cudaError_t cudaStatus; uint8_t row,col; diff --git a/openair1/PHY/CODING/nrLDPC_defs.h b/openair1/PHY/CODING/nrLDPC_defs.h index b96067f4b6..321ecaab7d 100644 --- a/openair1/PHY/CODING/nrLDPC_defs.h +++ b/openair1/PHY/CODING/nrLDPC_defs.h @@ -45,6 +45,7 @@ typedef struct { time_stats_t *toutput; }encoder_implemparams_t; #define INIT0_LDPCIMPLEMPARAMS {0,0,0,NULL,NULL,NULL,NULL} +typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out); typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t*); //============================================================================================================================ // decoder interface @@ -56,4 +57,4 @@ typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,sho \param p_profiler LDPC profiler statistics */ typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params* , int8_t*, int8_t* , t_nrLDPC_procBuf* , t_nrLDPC_time_stats* ); -#endif \ No newline at end of file +#endif diff --git a/openair1/PHY/CODING/nrLDPC_extern.h b/openair1/PHY/CODING/nrLDPC_extern.h index c0bfa0fdd8..5d4c6aebb9 100644 --- a/openair1/PHY/CODING/nrLDPC_extern.h +++ b/openair1/PHY/CODING/nrLDPC_extern.h @@ -23,13 +23,16 @@ #ifdef LDPC_LOADER nrLDPC_decoderfunc_t nrLDPC_decoder; nrLDPC_encoderfunc_t nrLDPC_encoder; +nrLDPC_initcallfunc_t nrLDPC_initcall; #else /* functions to load the LDPC shared lib, implemented in openair1/PHY/CODING/nrLDPC_load.c */ -extern int load_nrLDPClib(void) ; +extern int load_nrLDPClib(int) ; extern int load_nrLDPClib_ref(char *libversion, nrLDPC_encoderfunc_t * nrLDPC_encoder_ptr); // for ldpctest /* ldpc coder/decoder functions, as loaded by load_nrLDPClib(). */ +extern nrLDPC_initcallfunc_t nrLDPC_initcall; + extern nrLDPC_decoderfunc_t nrLDPC_decoder; extern nrLDPC_encoderfunc_t nrLDPC_encoder; // inline functions: #include "openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_init_mem.h" -#endif \ No newline at end of file +#endif diff --git a/openair1/PHY/CODING/nrLDPC_load.c b/openair1/PHY/CODING/nrLDPC_load.c index 677c5d53b0..295368c459 100644 --- a/openair1/PHY/CODING/nrLDPC_load.c +++ b/openair1/PHY/CODING/nrLDPC_load.c @@ -42,14 +42,13 @@ /* function description array, to be used when loading the encoding/decoding shared lib */ - static loader_shlibfunc_t shlib_fdesc[3]; /* arguments used when called from phy simulators exec's which do not use the config module */ /* arg is used to initialize the config module so that the loader works as expected */ char *arg[64]={"ldpctest","-O","cmdlineonly::dbgl0",NULL,NULL}; -int load_nrLDPClib(void) { +int load_nrLDPClib(int run_cuda) { char *ptr = (char*)config_get_if(); char libname[64]="ldpc"; int argc=3; @@ -65,10 +64,12 @@ int load_nrLDPClib(void) { } shlib_fdesc[0].fname = "nrLDPC_decod"; shlib_fdesc[1].fname = "nrLDPC_encod"; - int ret=load_module_shlib("ldpc",shlib_fdesc,sizeof(shlib_fdesc)/sizeof(loader_shlibfunc_t),NULL); + shlib_fdesc[2].fname = "nrLDPC_initcall"; + int ret=load_module_shlib(libname,shlib_fdesc,sizeof(shlib_fdesc)/sizeof(loader_shlibfunc_t),NULL); AssertFatal( (ret >= 0),"Error loading ldpc decoder"); nrLDPC_decoder = (nrLDPC_decoderfunc_t)shlib_fdesc[0].fptr; nrLDPC_encoder = (nrLDPC_encoderfunc_t)shlib_fdesc[1].fptr; + nrLDPC_initcall = (nrLDPC_initcallfunc_t)shlib_fdesc[2].fptr; return 0; } diff --git a/openair1/PHY/INIT/nr_init.c b/openair1/PHY/INIT/nr_init.c index cf0cd23817..8dc0fa6e11 100644 --- a/openair1/PHY/INIT/nr_init.c +++ b/openair1/PHY/INIT/nr_init.c @@ -108,7 +108,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, crcTableInit(); init_scrambling_luts(); init_pucch2_luts(); - load_nrLDPClib(); + load_nrLDPClib(0); // PBCH DMRS gold sequences generation nr_init_pbch_dmrs(gNB); //PDCCH DMRS init From a6dd62a50fbae5b75e294eb0f0180f99a0f295af Mon Sep 17 00:00:00 2001 From: frtabu Date: Fri, 10 Sep 2021 17:17:31 +0200 Subject: [PATCH 073/102] Enhance loader to allow library version selection for executables, as ldcptest which do not use the config module. --- common/utils/DOC/loader/devusage/api.md | 4 ++++ common/utils/load_module_shlib.c | 11 +++++---- common/utils/load_module_shlib.h | 5 ++-- executables/nr-uesoftmodem.c | 2 +- openair1/PHY/CODING/TESTBENCH/ldpctest.c | 6 +++-- openair1/PHY/CODING/nrLDPC_extern.h | 2 +- openair1/PHY/CODING/nrLDPC_load.c | 24 ++++++++----------- openair1/PHY/INIT/nr_init.c | 2 +- .../PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c | 3 +++ 9 files changed, 34 insertions(+), 25 deletions(-) diff --git a/common/utils/DOC/loader/devusage/api.md b/common/utils/DOC/loader/devusage/api.md index a6e59c5938..41a0807a24 100644 --- a/common/utils/DOC/loader/devusage/api.md +++ b/common/utils/DOC/loader/devusage/api.md @@ -10,6 +10,10 @@ int load_module_shlib(char *modname,loader_shlibfunc_t *farray, int numf) * If the farray pointer is null, looks for `< modname >_getfarray` symbol, calls the corresponding function when the symbol is found. `< modname >_getfarray` takes one argument, a pointer to a `loader_shlibfunc_t` array, and returns the number of items in this array, as defined by the `getfarrayfunc_t` type. The `loader_shlibfunc_t` array returned by the shared library must be fully filled (both `fname` and `fptr` fields). * looks for the `numf` function symbols listed in the `farray[i].fname` arguments and set the corresponding `farray[i].fptr`function pointers +```c +int load_module_version_shlib(char *modname, char *version, loader_shlibfunc_t *farray, int numf) +``` +Allows loading a specific library version, as specified by the `version` parameter. When version is not NULL the version that is possibly specified as a config module parameter is ignored. This call has been introduced for phy simulators executables which do not use the config module. It is used, for example, by the ldcp initialization (`load_nrLDPClib` function in [nrLDPC_load.c](../../../../../openair1/PHY/CODING/nrLDPC_load.c) to allow the `ldpctest` simulator to select the cuda accelerated ldcp implementation. `load_module_shlib` is just a define macro to switch to a `load_module_version_shlib` call, adding a NULL pointer for the version parameter. ```c void * get_shlibmodule_fptr(char *modname, char *fname) diff --git a/common/utils/load_module_shlib.c b/common/utils/load_module_shlib.c index a4b4742c94..2b0d339358 100644 --- a/common/utils/load_module_shlib.c +++ b/common/utils/load_module_shlib.c @@ -63,7 +63,7 @@ void loader_init(void) { } /* build the full shared lib name from the module name */ -char *loader_format_shlibpath(char *modname) +char *loader_format_shlibpath(char *modname, char *version) { char *tmpstr; @@ -97,7 +97,10 @@ int ret; shlibpath = loader_data.shlibpath ; } /* no specific shared lib version */ - if (shlibversion == NULL) { + if (version != NULL) { // version specified as a function parameter + shlibversion=version; + } + if (shlibversion == NULL) { // no specific version specified, neither as a config param or as a function param shlibversion = "" ; } /* alloc memory for full module shared lib file name */ @@ -118,7 +121,7 @@ int ret; return tmpstr; } -int load_module_shlib(char *modname,loader_shlibfunc_t *farray, int numf, void *autoinit_arg) +int load_module_version_shlib(char *modname, char *version, loader_shlibfunc_t *farray, int numf, void *autoinit_arg) { void *lib_handle = NULL; initfunc_t fpi; @@ -138,7 +141,7 @@ int load_module_shlib(char *modname,loader_shlibfunc_t *farray, int numf, void * loader_init(); } - shlib_path = loader_format_shlibpath(modname); + shlib_path = loader_format_shlibpath(modname, version); for (int i = 0; i < loader_data.numshlibs; i++) { if (strcmp(loader_data.shlibs[i].name, modname) == 0) { diff --git a/common/utils/load_module_shlib.h b/common/utils/load_module_shlib.h index 685b3d1b65..0e80a5353c 100644 --- a/common/utils/load_module_shlib.h +++ b/common/utils/load_module_shlib.h @@ -84,10 +84,11 @@ loader_data_t loader_data; /*-------------------------------------------------------------------------------------------------------------*/ #else /* LOAD_MODULE_SHLIB_MAIN */ -extern int load_module_shlib(char *modname, loader_shlibfunc_t *farray, int numf, void *initfunc_arg); + +extern int load_module_version_shlib(char *modname, char *version, loader_shlibfunc_t *farray, int numf, void *initfunc_arg); extern void * get_shlibmodule_fptr(char *modname, char *fname); extern loader_data_t loader_data; #endif /* LOAD_MODULE_SHLIB_MAIN */ - +#define load_module_shlib(M, F, N, I) load_module_version_shlib(M, NULL, F, N, I) #endif diff --git a/executables/nr-uesoftmodem.c b/executables/nr-uesoftmodem.c index f9088dcc74..fca9c72f42 100644 --- a/executables/nr-uesoftmodem.c +++ b/executables/nr-uesoftmodem.c @@ -436,7 +436,7 @@ int main( int argc, char **argv ) { itti_init(TASK_MAX, tasks_info); init_opt() ; - load_nrLDPClib(0); + load_nrLDPClib(NULL); if (ouput_vcd) { vcd_signal_dumper_init("/tmp/openair_dump_nrUE.vcd"); diff --git a/openair1/PHY/CODING/TESTBENCH/ldpctest.c b/openair1/PHY/CODING/TESTBENCH/ldpctest.c index af38c22cfc..17dcc1d0c9 100644 --- a/openair1/PHY/CODING/TESTBENCH/ldpctest.c +++ b/openair1/PHY/CODING/TESTBENCH/ldpctest.c @@ -601,8 +601,10 @@ int main(int argc, char *argv[]) printf("n_trials %d: \n", n_trials); printf("SNR0 %f: \n", SNR0); - - load_nrLDPClib(run_cuda); + if(run_cuda) + load_nrLDPClib("_cuda"); + else + load_nrLDPClib(NULL); load_nrLDPClib_ref("_orig", &encoder_orig); //for (block_length=8;block_length<=MAX_BLOCK_LENGTH;block_length+=8) diff --git a/openair1/PHY/CODING/nrLDPC_extern.h b/openair1/PHY/CODING/nrLDPC_extern.h index 5d4c6aebb9..b75b38fc76 100644 --- a/openair1/PHY/CODING/nrLDPC_extern.h +++ b/openair1/PHY/CODING/nrLDPC_extern.h @@ -26,7 +26,7 @@ nrLDPC_encoderfunc_t nrLDPC_encoder; nrLDPC_initcallfunc_t nrLDPC_initcall; #else /* functions to load the LDPC shared lib, implemented in openair1/PHY/CODING/nrLDPC_load.c */ -extern int load_nrLDPClib(int) ; +extern int load_nrLDPClib(char *version) ; extern int load_nrLDPClib_ref(char *libversion, nrLDPC_encoderfunc_t * nrLDPC_encoder_ptr); // for ldpctest /* ldpc coder/decoder functions, as loaded by load_nrLDPClib(). */ extern nrLDPC_initcallfunc_t nrLDPC_initcall; diff --git a/openair1/PHY/CODING/nrLDPC_load.c b/openair1/PHY/CODING/nrLDPC_load.c index 295368c459..23e5032bad 100644 --- a/openair1/PHY/CODING/nrLDPC_load.c +++ b/openair1/PHY/CODING/nrLDPC_load.c @@ -48,24 +48,22 @@ static loader_shlibfunc_t shlib_fdesc[3]; /* arg is used to initialize the config module so that the loader works as expected */ char *arg[64]={"ldpctest","-O","cmdlineonly::dbgl0",NULL,NULL}; -int load_nrLDPClib(int run_cuda) { +int load_nrLDPClib(char *version) { char *ptr = (char*)config_get_if(); char libname[64]="ldpc"; - int argc=3; - if (run_cuda) { - arg[3]="--loader.ldpc.shlibversion"; - argc++; - arg[4]="_cuda"; - argc++; - } + if ( ptr==NULL ) {// phy simulators, config module possibly not loaded - load_configmodule(argc,(char **)arg,CONFIG_ENABLECMDLINEONLY) ; + load_configmodule(0,(char **)NULL,CONFIG_ENABLECMDLINEONLY) ; logInit(); } shlib_fdesc[0].fname = "nrLDPC_decod"; shlib_fdesc[1].fname = "nrLDPC_encod"; shlib_fdesc[2].fname = "nrLDPC_initcall"; - int ret=load_module_shlib(libname,shlib_fdesc,sizeof(shlib_fdesc)/sizeof(loader_shlibfunc_t),NULL); + int ret; + if (version) + ret=load_module_version_shlib(libname,version,shlib_fdesc,sizeof(shlib_fdesc)/sizeof(loader_shlibfunc_t),NULL); + else + ret=load_module_shlib(libname,shlib_fdesc,sizeof(shlib_fdesc)/sizeof(loader_shlibfunc_t),NULL); AssertFatal( (ret >= 0),"Error loading ldpc decoder"); nrLDPC_decoder = (nrLDPC_decoderfunc_t)shlib_fdesc[0].fptr; nrLDPC_encoder = (nrLDPC_encoderfunc_t)shlib_fdesc[1].fptr; @@ -77,10 +75,8 @@ int load_nrLDPClib_ref(char *libversion, nrLDPC_encoderfunc_t * nrLDPC_encoder_p loader_shlibfunc_t shlib_encoder_fdesc; shlib_encoder_fdesc.fname = "nrLDPC_encod"; - char libpath[64]; - sprintf(libpath,"ldpc%s",libversion); - int ret=load_module_shlib(libpath,&shlib_encoder_fdesc,1,NULL); - AssertFatal( (ret >= 0),"Error loading ldpc encoder %s\n",libpath); + int ret=load_module_version_shlib("ldpc",libversion,&shlib_encoder_fdesc,1,NULL); + AssertFatal( (ret >= 0),"Error loading ldpc encoder %s\n",(libversion==NULL)?"":libversion); *nrLDPC_encoder_ptr = (nrLDPC_encoderfunc_t)shlib_encoder_fdesc.fptr; return 0; } diff --git a/openair1/PHY/INIT/nr_init.c b/openair1/PHY/INIT/nr_init.c index 8dc0fa6e11..cd4848ea8c 100644 --- a/openair1/PHY/INIT/nr_init.c +++ b/openair1/PHY/INIT/nr_init.c @@ -108,7 +108,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, crcTableInit(); init_scrambling_luts(); init_pucch2_luts(); - load_nrLDPClib(0); + load_nrLDPClib(NULL); // PBCH DMRS gold sequences generation nr_init_pbch_dmrs(gNB); //PDCCH DMRS init diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c index 816b025d34..975d7077a0 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c @@ -497,6 +497,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, } VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_LDPC, VCD_FUNCTION_IN); + p_decParams->block_length=length_dec; nrLDPC_initcall(p_decParams, (int8_t*)&pl[0], llrProcBuf); no_iteration_ldpc = nrLDPC_decoder(p_decParams, (int8_t *)&pl[0], @@ -957,6 +958,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue, for (i=0, j=0; j < ((kc*harq_process->Z)>>4)+1; i+=2, j++) { pl[j] = _mm_packs_epi16(pv[i],pv[i+1]); } + p_decParams->block_length=length_dec; nrLDPC_initcall(p_decParams, (int8_t*)&pl[0], llrProcBuf); no_iteration_ldpc = nrLDPC_decoder(p_decParams, (int8_t *)&pl[0], @@ -1341,6 +1343,7 @@ void nr_dlsch_decoding_process(void *arg) { for (i=0, j=0; j < ((kc*harq_process->Z)>>4)+1; i+=2, j++) { pl[j] = _mm_packs_epi16(pv[i],pv[i+1]); } + p_decParams->block_length=length_dec; nrLDPC_initcall(p_decParams, (int8_t*)&pl[0], llrProcBuf); no_iteration_ldpc = nrLDPC_decoder(p_decParams, (int8_t *)&pl[0], From 00ea49b859e898a9eb1e66d1c2e800148f82085f Mon Sep 17 00:00:00 2001 From: frtabu Date: Wed, 15 Sep 2021 16:05:34 +0200 Subject: [PATCH 074/102] revert cuda compil flags and init code to initial version --- cmake_targets/CMakeLists.txt | 2 +- openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 48612ee457..5448c97be2 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -166,7 +166,7 @@ if (CUDA_FOUND) add_definitions("-L/usr/local/cuda/lib64") SET(CUDA_NVCC_FLAGS - "${CUDA_NVCC_FLAGS};--gpu-architecture=compute_60") + "${CUDA_NVCC_FLAGS};-arch=sm_60;") # Disable warnings for CUDA SET(CUDA_NVCC_FLAGS "${CUDA_NVCC_FLAGS};-lpthread;-w;-O3;--default-stream;per-thread;-I/usr/local/cuda/inc;-L/usr/local/cuda/lib -lcutil;-rdc=true;-lcudadevrt") diff --git a/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu b/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu index d47b21e90e..72517edcdd 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu +++ b/openair1/PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu @@ -489,7 +489,7 @@ using namespace std ; /* from here: entry points in decoder shared lib */ extern "C" int ldpc_autoinit(void) { // called by the library loader -int devices = 0; +/*int devices = 0; cudaError_t err = cudaGetDeviceCount(&devices); AssertFatal(devices>0,"\nNo cuda GPU found\n\n"); @@ -519,6 +519,7 @@ int devices = 0; wcout << " Max grid dimensions: [ " << props.maxGridSize[0] << ", " << props.maxGridSize[1] << ", " << props.maxGridSize[2] << " ]" << endl; wcout << endl; } +*/ warmup_for_GPU(); return 0; } From 29c7a3aa19e492b5f0a52792ea081f37b3213a48 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Tue, 21 Sep 2021 18:38:06 +0200 Subject: [PATCH 075/102] Add dummy open CL ldpc library --- cmake_targets/CMakeLists.txt | 8 + .../CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c | 155 ++++++++++++++++++ 2 files changed, 163 insertions(+) create mode 100644 openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 5448c97be2..22550b381d 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1592,6 +1592,11 @@ set(PHY_LDPC_CUDA_SRC ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c ) +set(PHY_LDPC_CL_SRC + ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c + ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c +) + set(PHY_NR_CODINGIF ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_load.c; ) @@ -1599,6 +1604,9 @@ set(PHY_NR_CODINGIF add_library(ldpc_orig MODULE ${PHY_LDPC_ORIG_SRC} ) add_library(ldpc_optim MODULE ${PHY_LDPC_OPTIM_SRC} ) add_library(ldpc_optim8seg MODULE ${PHY_LDPC_OPTIM8SEG_SRC} ) +add_library(ldpc_cl MODULE ${PHY_LDPC_CL_SRC} ) +target_link_libraries(ldpc_cl OpenCL) + if (CUDA_FOUND) cuda_add_library(ldpc_cuda MODULE ${PHY_LDPC_CUDA_SRC} ) set_target_properties(ldpc_cuda PROPERTIES CUDA_SEPARABLE_COMPILATION ON) diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c new file mode 100644 index 0000000000..96a405f2a0 --- /dev/null +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c @@ -0,0 +1,155 @@ +/*! \file PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu + * \brief LDPC cuda support BG1 all length + * \author NCTU OpinConnect Terng-Yin Hsu,WEI-YING,LIN + * \email tyhsu@cs.nctu.edu.tw + * \date 13-05-2020 + * \version + * \note + * \warning + */ + +#include +#include +#include +#include +#include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h" +#include "PHY/CODING/nrLDPC_decoder/nrLDPCdecoder_defs.h" +#include "assertions.h" +#include "common/utils/LOG/log.h" + +#define MAX_ITERATION 2 +#define MC 1 + + + +typedef struct{ + char x; + char y; + short value; +} h_element; + + + + + + + + + +void init_LLR_DMA(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out){ + + uint16_t Zc = p_decParams->Z; + uint8_t BG = p_decParams->BG; + int block_length = p_decParams->block_length; + uint8_t row,col; + if(BG == 1){ + row = 46; + col = 68; + } + else{ + row = 42; + col = 52; + } + unsigned char *hard_decision = (unsigned char*)p_out; + int memorySize_llr_cuda = col * Zc * sizeof(char) * MC; +// cudaCheck( cudaMemcpyToSymbol(dev_const_llr, p_llr, memorySize_llr_cuda) ); +// cudaCheck( cudaMemcpyToSymbol(dev_llr, p_llr, memorySize_llr_cuda) ); +// cudaDeviceSynchronize(); + +} + + +/* from here: entry points in decoder shared lib */ +int ldpc_autoinit(void) { // called by the library loader + cl_platform_id platforms[10]; + cl_int num_platforms_found; + + cl_int rt = clGetPlatformIDs( sizeof(platforms)/sizeof(cl_platform_id), platforms, &num_platforms_found ); + AssertFatal(rt == CL_SUCCESS, "clGetPlatformIDs error %d\n" , (int)rt); + AssertFatal( num_platforms_found>0 , "clGetPlatformIDs: no cl compatible platform found\n"); + for (int i=0 ; i<(int)num_platforms_found ; i++) { + cl_device_id devices[20]; + cl_int num_devices_found; + rt = clGetDeviceIDs(platforms[i],CL_DEVICE_TYPE_ALL, sizeof(devices)/sizeof(cl_device_id),devices,&num_devices_found); + AssertFatal(rt == CL_SUCCESS, "clGetDeviceIDs error %d\n" , (int)rt); + for (int j=0; jZ; + uint8_t BG = p_decParams->BG; + uint8_t numMaxIter = p_decParams->numMaxIter; + int block_length = p_decParams->block_length; + e_nrLDPC_outMode outMode = p_decParams->outMode; + cudaError_t cudaStatus; + uint8_t row,col; + if(BG == 1){ + row = 46; + col = 68; + } + else{ + row = 42; + col = 52; + } + +// alloc memory + unsigned char *hard_decision = (unsigned char*)p_out; +// gpu + int memorySize_llr_cuda = col * Zc * sizeof(char) * MC; +// cudaCheck( cudaMemcpyToSymbol(dev_const_llr, p_llr, memorySize_llr_cuda) ); +// cudaCheck( cudaMemcpyToSymbol(dev_llr, p_llr, memorySize_llr_cuda) ); + +// Define CUDA kernel dimension + int blockSizeX = Zc; +// dim3 dimGridKernel1(row, MC, 1); // dim of the thread blocks +// dim3 dimBlockKernel1(blockSizeX, 1, 1); + +// dim3 dimGridKernel2(col, MC, 1); +// dim3 dimBlockKernel2(blockSizeX, 1, 1); +// cudaDeviceSynchronize(); + +// lauch kernel +/* + for(int ii = 0; ii < MAX_ITERATION; ii++){ + // first kernel + if(ii == 0){ + ldpc_cnp_kernel_1st_iter + <<>> + ( BG, row, col, Zc); + }else{ + ldpc_cnp_kernel + <<>> + ( BG, row, col, Zc); + } + // second kernel + ldpc_vnp_kernel_normal + <<>> + // (dev_llr, dev_const_llr,BG, row, col, Zc); + (BG, row, col, Zc); + } + + int pack = (block_length/128)+1; + dim3 pack_block(pack, MC, 1); + pack_decoded_bit<<>>( col, Zc); + + cudaCheck( cudaMemcpyFromSymbol((void*)hard_decision, (const void*)dev_tmp, (block_length/8)*sizeof(unsigned char)) ); + cudaDeviceSynchronize(); +*/ + + return MAX_ITERATION; + +} From d31ac5805e562ae598870d41e90d249dbd0a15ba Mon Sep 17 00:00:00 2001 From: frtabu Date: Mon, 27 Sep 2021 16:21:32 +0200 Subject: [PATCH 076/102] add openCL board detection --- .../CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c | 105 ++++++++++++++---- 1 file changed, 86 insertions(+), 19 deletions(-) diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c index 96a405f2a0..ce08a07830 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c @@ -1,13 +1,32 @@ -/*! \file PHY/CODING/nrLDPC_decoder_LYC/nrLDPC_decoder_LYC.cu - * \brief LDPC cuda support BG1 all length - * \author NCTU OpinConnect Terng-Yin Hsu,WEI-YING,LIN - * \email tyhsu@cs.nctu.edu.tw - * \date 13-05-2020 - * \version - * \note - * \warning +/* + * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The OpenAirInterface Software Alliance licenses this file to You under + * the OAI Public License, Version 1.0 (the "License"); you may not use this file + * except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.openairinterface.org/?page_id=698 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + *------------------------------------------------------------------------------- + * For more information about the OpenAirInterface (OAI) Software Alliance: + * contact@openairinterface.org */ + /*! \file nrLDPC_decoder_CL.c +* \brief ldpc decoder, openCL implementaion +* \author +* \date 2021 +* \version 1.0 +* @ingroup +*/ +/* uses HW component id for log messages ( --log_config.hw_log_level ) */ #include #include #include @@ -20,7 +39,7 @@ #define MAX_ITERATION 2 #define MC 1 - +#define MAX_OCLDEV 10 typedef struct{ char x; @@ -28,13 +47,23 @@ typedef struct{ short value; } h_element; +typedef struct{ + cl_uint max_CU; + cl_uint max_WID; + size_t *max_WIS; + cl_context context; + cl_program program; + cl_kernel kernel; + cl_command_queue queue; +} ocldev_t; + +typedef struct{ + ocldev_t ocldev[MAX_OCLDEV]; +} ocl_t; - - - - +ocl_t ocl; void init_LLR_DMA(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out){ @@ -57,26 +86,64 @@ void init_LLR_DMA(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out // cudaDeviceSynchronize(); } +cl_error_callback(const char* errinfo, const void* private_info, size_t cb, void* user_data) { + LOG_E(HW,"OpenCL accelerator error %s\n", errinfo ); +} +char *clutil_getstrdev(int intdev) { + static char retstring[255]=""; + char *retptr=retstring; + retptr+=sprintf(retptr,"0x%08x: ",(uint32_t)intdev); + if (intdev & CL_DEVICE_TYPE_CPU) + retptr+=sprintf(retptr,"%s","cpu "); + if (intdev & CL_DEVICE_TYPE_GPU) + retptr+=sprintf(retptr,"%s","gpu "); + if (intdev & CL_DEVICE_TYPE_ACCELERATOR) + retptr+=sprintf(retptr,"%s","acc "); + return retstring; +} /* from here: entry points in decoder shared lib */ int ldpc_autoinit(void) { // called by the library loader cl_platform_id platforms[10]; - cl_int num_platforms_found; + cl_uint num_platforms_found; - cl_int rt = clGetPlatformIDs( sizeof(platforms)/sizeof(cl_platform_id), platforms, &num_platforms_found ); + cl_uint rt = clGetPlatformIDs( sizeof(platforms)/sizeof(cl_platform_id), platforms, &num_platforms_found ); AssertFatal(rt == CL_SUCCESS, "clGetPlatformIDs error %d\n" , (int)rt); AssertFatal( num_platforms_found>0 , "clGetPlatformIDs: no cl compatible platform found\n"); for (int i=0 ; i<(int)num_platforms_found ; i++) { + char stringval[255]; + rt = clGetPlatformInfo(platforms[i],CL_PLATFORM_PROFILE, sizeof(stringval),stringval,NULL); + AssertFatal(rt == CL_SUCCESS, "clGetPlatformInfo PROFILE error %d\n" , (int)rt); + LOG_I(HW,"Platform %i, OpenCL profile %s\n", i,stringval ); + rt = clGetPlatformInfo(platforms[i],CL_PLATFORM_VERSION, sizeof(stringval),stringval,NULL); + AssertFatal(rt == CL_SUCCESS, "clGetPlatformInfo VERSION error %d\n" , (int)rt); + LOG_I(HW,"Platform %i, OpenCL version %s\n", i,stringval ); cl_device_id devices[20]; - cl_int num_devices_found; + cl_uint num_devices_found; rt = clGetDeviceIDs(platforms[i],CL_DEVICE_TYPE_ALL, sizeof(devices)/sizeof(cl_device_id),devices,&num_devices_found); AssertFatal(rt == CL_SUCCESS, "clGetDeviceIDs error %d\n" , (int)rt); for (int j=0; j Date: Tue, 5 Oct 2021 19:23:06 +0200 Subject: [PATCH 077/102] opencl implementation of ldpc decoder (platform query) --- .../CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c | 84 ++++-- .../nrLDPC_decoder_kernels_CL.cl | 261 ++++++++++++++++++ 2 files changed, 322 insertions(+), 23 deletions(-) create mode 100644 openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c index ce08a07830..01bcbbd68f 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c @@ -39,8 +39,8 @@ #define MAX_ITERATION 2 #define MC 1 -#define MAX_OCLDEV 10 - +#define MAX_OCLDEV 10 +#define MAX_OCLRUNTIME 5 typedef struct{ char x; char y; @@ -51,14 +51,20 @@ typedef struct{ cl_uint max_CU; cl_uint max_WID; size_t *max_WIS; - cl_context context; - cl_program program; - cl_kernel kernel; - cl_command_queue queue; } ocldev_t; typedef struct{ + cl_uint num_devices; + cl_device_id devices[MAX_OCLDEV]; ocldev_t ocldev[MAX_OCLDEV]; + cl_context context; + cl_program program; + cl_kernel kernel; + cl_command_queue queue[MAX_OCLDEV]; +} oclruntime_t; + +typedef struct{ + oclruntime_t runtime[MAX_OCLRUNTIME]; } ocl_t; @@ -86,7 +92,8 @@ void init_LLR_DMA(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out // cudaDeviceSynchronize(); } -cl_error_callback(const char* errinfo, const void* private_info, size_t cb, void* user_data) { +void cl_error_callback(const char* errinfo, const void* private_info, size_t cb, void* user_data) { + oclruntime_t *runtime = (oclruntime_t *)user_data; LOG_E(HW,"OpenCL accelerator error %s\n", errinfo ); } @@ -103,11 +110,25 @@ char *clutil_getstrdev(int intdev) { return retstring; } +size_t load_source(char **source_str) { + int MAX_SOURCE_SIZE=(500*132); + FILE *fp; + size_t source_size; + + fp = fopen("nrLDPC_decoder_kernels_CL.cl", "r"); + AssertFatal(fp,"failed to open cl source: %s\n",strerror(errno)); + + *source_str = (char*)malloc(MAX_SOURCE_SIZE); + source_size = fread( *source_str, 1, MAX_SOURCE_SIZE, fp); + fclose( fp ); + return source_size; +} + /* from here: entry points in decoder shared lib */ int ldpc_autoinit(void) { // called by the library loader cl_platform_id platforms[10]; cl_uint num_platforms_found; - + int context_ok=0; cl_uint rt = clGetPlatformIDs( sizeof(platforms)/sizeof(cl_platform_id), platforms, &num_platforms_found ); AssertFatal(rt == CL_SUCCESS, "clGetPlatformIDs error %d\n" , (int)rt); AssertFatal( num_platforms_found>0 , "clGetPlatformIDs: no cl compatible platform found\n"); @@ -119,33 +140,50 @@ int ldpc_autoinit(void) { // called by the library loader rt = clGetPlatformInfo(platforms[i],CL_PLATFORM_VERSION, sizeof(stringval),stringval,NULL); AssertFatal(rt == CL_SUCCESS, "clGetPlatformInfo VERSION error %d\n" , (int)rt); LOG_I(HW,"Platform %i, OpenCL version %s\n", i,stringval ); - cl_device_id devices[20]; - cl_uint num_devices_found; - rt = clGetDeviceIDs(platforms[i],CL_DEVICE_TYPE_ALL, sizeof(devices)/sizeof(cl_device_id),devices,&num_devices_found); + rt = clGetDeviceIDs(platforms[i],CL_DEVICE_TYPE_ALL, sizeof(ocl.runtime[i].devices)/sizeof(cl_device_id),ocl.runtime[i].devices,&(ocl.runtime[i].num_devices)); AssertFatal(rt == CL_SUCCESS, "clGetDeviceIDs error %d\n" , (int)rt); - for (int j=0; j0) { + ocl.runtime[i].context = clCreateContext(NULL, ocl.runtime[i].num_devices, ocl.runtime[i].devices, cl_error_callback, &(ocl.runtime[i]), (cl_int *)&rt); + AssertFatal(rt == CL_SUCCESS, "Error %d creating context for platform %i\n" , (int)rt, i); + for(int dev=0; dev0, "No openCL device available to accelerate ldpc\n"); return 0; } diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl new file mode 100644 index 0000000000..fd1d46c454 --- /dev/null +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl @@ -0,0 +1,261 @@ + +define MAX_ITERATION 2 +#define MC 1 + + + +typedef struct{ + char x; + char y; + short value; +} h_element; + +char dev_const_llr[68*384]; +char dev_dt [46*68*384]; +char dev_llr[68*384]; +unsigned char dev_tmp[68*384]; + +h_element h_compact1 [46*19] = {}; +h_element h_compact2 [68*30] = {}; + +h_element dev_h_compact1[46*19]; // used in kernel 1 +h_element dev_h_compact2[68*30]; // used in kernel 2 + +// __device__ __constant__ h_element dev_h_compact1[46*19]; // used in kernel 1 +// __device__ __constant__ h_element dev_h_compact2[68*30]; // used in kernel 2 + +// row and col element count +const char h_ele_row_bg1_count[46] = { + 19, 19, 19, 19, 3, 8, 9, 7, 10, 9, + 7, 8, 7, 6, 7, 7, 6, 6, 6, 6, + 6, 6, 5, 5, 6, 5, 5, 4, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 4, 5, 5, + 4, 5, 4, 5, 5, 4}; +const char h_ele_col_bg1_count[68] = { + 30, 28, 7, 11, 9, 4, 8, 12, 8, 7, + 12, 10, 12, 11, 10, 7, 10, 10, 13, 7, + 8, 11, 12, 5, 6, 6, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1}; +const char h_ele_row_bg2_count[42] = { + 8, 10, 8, 10, 4, 6, 6, 6, 4, 5, + 5, 5, 4, 5, 5, 4, 5, 5, 4, 4, + 4, 4, 3, 4, 4, 3, 5, 3, 4, 3, + 5, 3, 4, 4, 4, 4, 4, 3, 4, 4, + 4, 4}; +const char h_ele_col_bg2_count[52] = { + 22, 23, 10, 5, 5, 14, 7, 13, 6, 8, + 9, 16, 9, 12, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1}; + + + +// Kernel 1 +__kernel void ldpc_cnp_kernel_1st_iter(/*char * dev_llr,*/ int BG, int row, int col, int Zc) +{ +// if(blockIdx.x == 0 && threadIdx.x == 1) printf("cnp %d\n", threadIdx.x); + int iMCW = blockIdx.y; // codeword id + int iBlkRow = blockIdx.x; // block row in h_base + int iBlkCol; // block col in h_base + int iSubRow = threadIdx.x; // row index in sub_block of h_base + int iCol; // overall col index in h_base + int offsetR; + int shift_t; + +// For 2-min algorithm. + int Q_sign = 0; + int sq; + int Q, Q_abs; + int R_temp; + + int sign = 1; + int rmin1 = INT32_MAX; + int rmin2 = INT32_MAX; + char idx_min = 0; + + h_element h_element_t; + int s = (BG==1)? h_ele_row_bg1_count[iBlkRow]:h_ele_row_bg2_count[iBlkRow]; + offsetR = (iMCW * row*col*Zc) + iBlkRow * Zc + iSubRow; // row*col*Zc = size of dev_dt +// if(blockIdx.x == 0 && threadIdx.x == 1) printf("s: %d, offset %d\n", s, offsetR); +// The 1st recursion + for(int i = 0; i < s; i++) // loop through all the ZxZ sub-blocks in a row + { + h_element_t = dev_h_compact1[i*row+iBlkRow]; // compact_col == row + + iBlkCol = h_element_t.y; + shift_t = h_element_t.value; + + shift_t = (iSubRow + shift_t) % Zc; + iCol = (iMCW * col*Zc) + iBlkCol * Zc + shift_t; // col*Zc = size of llr + Q = dev_llr[iCol]; + Q_abs = (Q>0)? Q : -Q; + sq = Q < 0; +// if(blockIdx.x == 0 && threadIdx.x == 1) printf("i %d, icol %d, Q: %d\n", i, iCol, Q); + // quick version + sign = sign * (1 - sq * 2); + Q_sign |= sq << i; + + if (Q_abs < rmin1){ + rmin2 = rmin1; + rmin1 = Q_abs; + idx_min = i; + } else if (Q_abs < rmin2){ + rmin2 = Q_abs; + } + } + +// if(blockIdx.x == 0 && threadIdx.x == 1)printf("min1 %d, min2 %d, min1_idx %d\n", rmin1, rmin2, idx_min); + +// The 2nd recursion + for(int i = 0; i < s; i++){ + // v0: Best performance so far. 0.75f is the value of alpha. + sq = 1 - 2 * ((Q_sign >> i) & 0x01); + R_temp = 0.75f * sign * sq * (i != idx_min ? rmin1 : rmin2); + // write results to global memory + h_element_t = dev_h_compact1[i*row+iBlkRow]; + int addr_temp = offsetR + h_element_t.y * row * Zc; + dev_dt[addr_temp] = R_temp; +// if(blockIdx.x == 0 && threadIdx.x == 1)printf("R_temp %d, temp_addr %d\n", R_temp, addr_temp); + } +} + +// Kernel_1 +__kernel void ldpc_cnp_kernel(/*char * dev_llr, char * dev_dt,*/ int BG, int row, int col, int Zc) +{ +// if(blockIdx.x == 0 && threadIdx.x == 1) printf("cnp\n"); + int iMCW = blockIdx.y; + int iBlkRow = blockIdx.x; // block row in h_base + int iBlkCol; // block col in h_base + int iSubRow = threadIdx.x; // row index in sub_block of h_base + int iCol; // overall col index in h_base + int offsetR; + int shift_t; + +// For 2-min algorithm. + int Q_sign = 0; + int sq; + int Q, Q_abs; + int R_temp; + + int sign = 1; + int rmin1 = INT32_MAX; + int rmin2 = INT32_MAX; + char idx_min = 0; + + h_element h_element_t; + int s = (BG==1)? h_ele_row_bg1_count[iBlkRow]: h_ele_row_bg2_count[iBlkRow]; + offsetR = (iMCW *row*col*Zc) + iBlkRow * Zc + iSubRow; // row * col * Zc = size of dev_dt +// if(blockIdx.x == 0 && threadIdx.x == 1) printf("s: %d, offset %d\n", s, offsetR); +// The 1st recursion + for(int i = 0; i < s; i++) // loop through all the ZxZ sub-blocks in a row + { + h_element_t = dev_h_compact1[i*row+iBlkRow]; + + iBlkCol = h_element_t.y; + shift_t = h_element_t.value; + shift_t = (iSubRow + shift_t) % Zc; + iCol = iBlkCol * Zc + shift_t; + + R_temp = dev_dt[offsetR + iBlkCol * row * Zc]; + + Q = dev_llr[iMCW * (col*Zc) + iCol] - R_temp; + Q_abs = (Q>0)? Q : -Q; +// if(blockIdx.x == 0 && threadIdx.x == 1) printf("i %d, icol %d, Q: %d\n", i, iCol, Q); + sq = Q < 0; + sign = sign * (1 - sq * 2); + Q_sign |= sq << i; + + if (Q_abs < rmin1){ + rmin2 = rmin1; + rmin1 = Q_abs; + idx_min = i; + } else if (Q_abs < rmin2){ + rmin2 = Q_abs; + } + + } + +// if(blockIdx.x == 0 && threadIdx.x == 1)printf("min1 %d, min2 %d, min1_idx %d\n", rmin1, rmin2, idx_min); + +// The 2nd recursion + for(int i = 0; i < s; i ++){ + sq = 1 - 2 * ((Q_sign >> i) & 0x01); + R_temp = 0.75f * sign * sq * (i != idx_min ? rmin1 : rmin2); + + + // write results to global memory + h_element_t = dev_h_compact1[i*row+iBlkRow]; + int addr_temp = h_element_t.y * row * Zc + offsetR; + dev_dt[addr_temp] = R_temp; +// if(blockIdx.x == 0 && threadIdx.x == 1)printf("R_temp %d, temp_addr %d\n", R_temp, addr_temp); + } +} + +// Kernel 2: VNP processing +__kernel void +ldpc_vnp_kernel_normal(/*char * dev_llr, char * dev_dt, char * dev_const_llr,*/ int BG, int row, int col, int Zc) +{ + int iMCW = blockIdx.y; + int iBlkCol = blockIdx.x; + int iBlkRow; + int iSubCol = threadIdx.x; + int iRow; + int iCol; + + int shift_t, sf; + int APP; + + h_element h_element_t; + + // update all the llr values + iCol = iBlkCol * Zc + iSubCol; + APP = dev_const_llr[iMCW *col*Zc + iCol]; + int offsetDt = iMCW *row*col*Zc + iBlkCol * row * Zc; + int s = (BG==1)? h_ele_col_bg1_count[iBlkCol]:h_ele_col_bg2_count[iBlkCol]; + + for(int i = 0; i < s; i++) + { + h_element_t = dev_h_compact2[i*col+iBlkCol]; + + shift_t = h_element_t.value%Zc; + iBlkRow = h_element_t.x; + + sf = iSubCol - shift_t; + sf = (sf + Zc) % Zc; + + iRow = iBlkRow * Zc + sf; + APP = APP + dev_dt[offsetDt + iRow]; + } + if(APP > SCHAR_MAX) APP = SCHAR_MAX; + if(APP < SCHAR_MIN) APP = SCHAR_MIN; + // write back to device global memory + dev_llr[iMCW *col*Zc + iCol] = APP; +} + + +__kernel void pack_decoded_bit(/*char *dev, unsigned char *host,*/ int col, int Zc) +{ + __shared__ unsigned char tmp[128]; + int iMCW = blockIdx.y; + int tid = iMCW * col*Zc + blockIdx.x*128 + threadIdx.x; + int btid = threadIdx.x; + tmp[btid] = 0; + + if(dev_llr[tid] < 0){ + tmp[btid] = 1 << (7-(btid&7)); + } + __syncthreads(); + + if(threadIdx.x < 16){ + dev_tmp[iMCW * col*Zc + blockIdx.x*16+threadIdx.x] = 0; + for(int i = 0; i < 8; i++){ + dev_tmp[iMCW * col*Zc + blockIdx.x*16+threadIdx.x] += tmp[threadIdx.x*8+i]; + } + } +} + From 3586e83fdea8f11fb1cec3cdb811125d91fd76e9 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Thu, 7 Oct 2021 19:24:01 +0200 Subject: [PATCH 078/102] start translating cuda ldpc sources to opencl --- .../CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c | 22 +++++- .../nrLDPC_decoder_kernels_CL.cl | 75 ++++++++++--------- 2 files changed, 59 insertions(+), 38 deletions(-) diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c index 01bcbbd68f..ebc792b8ba 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c @@ -110,6 +110,23 @@ char *clutil_getstrdev(int intdev) { return retstring; } +void get_CompilErr(cl_program program, int pltf) { + + // Determine the size of the log + size_t log_size; + for(int i=0; i Date: Thu, 14 Oct 2021 18:17:14 +0200 Subject: [PATCH 079/102] Add -v option in ldpctest to select ldpc shared lib version going on with openCL ldpc implem --- openair1/PHY/CODING/TESTBENCH/ldpctest.c | 19 +++-- .../CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c | 76 +++++++++++++++---- .../nrLDPC_decoder_kernels_CL.cl | 5 +- 3 files changed, 74 insertions(+), 26 deletions(-) diff --git a/openair1/PHY/CODING/TESTBENCH/ldpctest.c b/openair1/PHY/CODING/TESTBENCH/ldpctest.c index 17dcc1d0c9..aff707a1d5 100644 --- a/openair1/PHY/CODING/TESTBENCH/ldpctest.c +++ b/openair1/PHY/CODING/TESTBENCH/ldpctest.c @@ -503,11 +503,10 @@ int main(int argc, char *argv[]) unsigned int errors, errors_bit, crc_misses; double errors_bit_uncoded; short block_length=8448; // decoder supports length: 1201 -> 1280, 2401 -> 2560 - + char *ldpc_version=NULL; /* version of the ldpc decoder library to use (XXX suffix to use when loading libldpc_XXX.so */ short No_iteration=5; int n_segments=1; //double rate=0.333; - short run_cuda = 0; int nom_rate=1; int denom_rate=3; @@ -527,7 +526,7 @@ int main(int argc, char *argv[]) short BG=0,Zc,Kb=0; - while ((c = getopt (argc, argv, "q:r:s:S:l:G:n:d:i:t:u:h")) != -1) + while ((c = getopt (argc, argv, "q:r:s:S:l:G:n:d:i:t:u:hv:")) != -1) switch (c) { case 'q': @@ -547,7 +546,7 @@ int main(int argc, char *argv[]) break; case 'G': - run_cuda = atoi(optarg); + ldpc_version="_cuda"; break; case 'n': @@ -573,9 +572,11 @@ int main(int argc, char *argv[]) case 'u': test_uncoded = atoi(optarg); break; - + case 'v': + ldpc_version=strdup(optarg); + break; case 'h': - default: + default: printf("CURRENTLY SUPPORTED CODE RATES: \n"); printf("BG1 (blocklength > 3840): 1/3, 2/3, 22/25 (8/9) \n"); printf("BG2 (blocklength <= 3840): 1/5, 1/3, 2/3 \n\n"); @@ -592,6 +593,7 @@ int main(int argc, char *argv[]) printf("-t SNR simulation step, Default: 0.1\n"); printf("-i Max decoder iterations, Default: 5\n"); printf("-u Set SNR per coded bit, Default: 0\n"); + printf("-v XXX Set ldpc shared library version. libldpc_XXX.so will be used \n"); exit(1); break; } @@ -601,8 +603,9 @@ int main(int argc, char *argv[]) printf("n_trials %d: \n", n_trials); printf("SNR0 %f: \n", SNR0); - if(run_cuda) - load_nrLDPClib("_cuda"); + + if (ldpc_version != NULL) + load_nrLDPClib(ldpc_version); else load_nrLDPClib(NULL); load_nrLDPClib_ref("_orig", &encoder_orig); diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c index ebc792b8ba..eb03a22fe3 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c @@ -53,13 +53,24 @@ typedef struct{ size_t *max_WIS; } ocldev_t; +typedef struct { + cl_kernel cnp_kernel_1st; + cl_kernel cnp_kernel; + cl_kernel vnp_kernel_normal; + cl_kernel pack_decoded_bit; +} oclkernels_t; + typedef struct{ cl_uint num_devices; cl_device_id devices[MAX_OCLDEV]; ocldev_t ocldev[MAX_OCLDEV]; cl_context context; cl_program program; - cl_kernel kernel; + cl_mem dev_const_llr; + cl_mem dev_llr; + cl_mem dev_dt; + cl_mem dev_tmp; + oclkernels_t kernels[MAX_OCLDEV]; cl_command_queue queue[MAX_OCLDEV]; } oclruntime_t; @@ -189,16 +200,35 @@ int ldpc_autoinit(void) { // called by the library loader ocl.runtime[i].queue[dev] = clCreateCommandQueueWithProperties(ocl.runtime[i].context,ocl.runtime[i].devices[dev] , 0, (cl_int *)&rt); AssertFatal(rt == CL_SUCCESS, "Error %d creating command queue for platform %i device %i\n" , (int)rt, i,dev); } + ocl.runtime[i].dev_const_llr = clCreateBuffer(ocl.runtime[i].context, CL_MEM_READ_ONLY|CL_MEM_HOST_WRITE_ONLY, 68*384, NULL, (cl_int *)&rt); + AssertFatal(rt == CL_SUCCESS, "Error %d creating buffer dev_const_llr for platform %i \n" , (int)rt, i); + ocl.runtime[i].dev_llr = clCreateBuffer(ocl.runtime[i].context, CL_MEM_READ_WRITE|CL_MEM_HOST_WRITE_ONLY, 68*384, NULL, (cl_int *)&rt); + AssertFatal(rt == CL_SUCCESS, "Error %d creating buffer dev_llr for platform %i \n" , (int)rt, i); + ocl.runtime[i].dev_dt = clCreateBuffer(ocl.runtime[i].context, CL_MEM_READ_WRITE|CL_MEM_HOST_NO_ACCESS, 46*68*384, NULL, (cl_int *)&rt); + AssertFatal(rt == CL_SUCCESS, "Error %d creating buffer dev_dt for platform %i \n" , (int)rt, i); + ocl.runtime[i].dev_tmp = clCreateBuffer(ocl.runtime[i].context, CL_MEM_READ_ONLY|CL_MEM_HOST_WRITE_ONLY, 68*384, NULL, (cl_int *)&rt); + AssertFatal(rt == CL_SUCCESS, "Error %d creating buffer dev_tmp for platform %i \n" , (int)rt, i); char *source_str; - size_t source_size=load_source(&source_str); + size_t source_size=load_source(&source_str); cl_program program = clCreateProgramWithSource(ocl.runtime[i].context, 1, (const char **)&source_str, (const size_t *)&source_size, (cl_int *)&rt); AssertFatal(rt == CL_SUCCESS, "Error %d creating program for platform %i \n" , (int)rt, i); rt = clBuildProgram(program, ocl.runtime[i].num_devices,ocl.runtime[i].devices, NULL, NULL, NULL); if (rt == CL_BUILD_PROGRAM_FAILURE) { - get_CompilErr(program,i); - } - AssertFatal(rt == CL_SUCCESS, "Error %d buildding program for platform %i \n" , rt, i); + get_CompilErr(program,i); + } + AssertFatal(rt == CL_SUCCESS, "Error %d buildding program for platform %i \n" , rt, i); + + for(int dev=0; dev>>( col, Zc); - - cudaCheck( cudaMemcpyFromSymbol((void*)hard_decision, (const void*)dev_tmp, (block_length/8)*sizeof(unsigned char)) ); - cudaDeviceSynchronize(); */ - +// int pack = (block_length/128)+1; +// dim3 pack_block(pack, MC, 1); +// pack_decoded_bit<<>>( col, Zc); + rt = clSetKernelArg(ocl.runtime[0].kernels[0].pack_decoded_bit, 0, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_llr)); + rt = clSetKernelArg(ocl.runtime[0].kernels[0].pack_decoded_bit, 1, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_tmp)); + rt = clSetKernelArg(ocl.runtime[0].kernels[0].pack_decoded_bit, 2, sizeof(int), (void *)&(col)); + rt = clSetKernelArg(ocl.runtime[0].kernels[0].pack_decoded_bit, 3, sizeof(int), (void *)&(Zc)); + + // Execute the OpenCL kernel on the list + size_t global_item_size = block_length; // Process the entire lists + size_t local_item_size = 128; // Divide work items into groups of 128 + rt = clEnqueueNDRangeKernel(ocl.runtime[0].queue[0], ocl.runtime[0].kernels[0].pack_decoded_bit, 2, NULL, + &global_item_size, &local_item_size, 0, NULL, NULL); +// cudaCheck( cudaMemcpyFromSymbol((void*)hard_decision, (const void*)dev_tmp, (block_length/8)*sizeof(unsigned char)) ); +// cudaDeviceSynchronize(); + + rt = clEnqueueReadBuffer(ocl.runtime[0].queue[0], ocl.runtime[0].dev_tmp, CL_TRUE, 0, + (block_length/8)*sizeof(unsigned char) , p_llr, 0, NULL, NULL); + AssertFatal(rt == CL_SUCCESS, "Error %d moving p_llr data to pltf %i dev %i\n" , (int)rt, 0,0); return MAX_ITERATION; } diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl index f1f336d5e8..8bed6d6ebf 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl @@ -10,7 +10,6 @@ typedef struct{ short value; } h_element; -__constant char dev_const_llr[68*384]= {}; //__global char dev_dt [46*68*384]; //__local char *dev_t; //__global char dev_llr[68*384]; @@ -239,9 +238,9 @@ ldpc_vnp_kernel_normal(__local char * dev_llr, __local char * dev_dt, /* char * } -__kernel void pack_decoded_bit(__local unsigned char * dev_llr, __local unsigned char * dev_tmp, int col, int Zc) +__kernel void pack_decoded_bit(__global unsigned char * dev_llr, __global unsigned char * dev_tmp, int col, int Zc) { - __local unsigned char tmp[128]; + unsigned char tmp[128]; int iMCW = get_group_id(1); int btid = get_local_id(0); int tid = iMCW * col*Zc + get_group_id(0)*128 + btid; From 03ed2c35c4c3bb3912c50915294cce71a1865cb5 Mon Sep 17 00:00:00 2001 From: frtabu Date: Tue, 19 Oct 2021 17:53:09 +0200 Subject: [PATCH 080/102] Update licensing comments --- .../CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c | 5 ++-- .../nrLDPC_decoder_kernels_CL.cl | 30 +++++++++++++++++++ 2 files changed, 32 insertions(+), 3 deletions(-) diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c index eb03a22fe3..daca1d4237 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c @@ -20,11 +20,10 @@ */ /*! \file nrLDPC_decoder_CL.c * \brief ldpc decoder, openCL implementaion -* \author +* \author Francois TABURET * \date 2021 * \version 1.0 -* @ingroup - +* \note initial implem - translation of cuda version */ /* uses HW component id for log messages ( --log_config.hw_log_level ) */ #include diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl index 8bed6d6ebf..6dce6a752e 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl @@ -1,4 +1,34 @@ +/* + * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. + * The OpenAirInterface Software Alliance licenses this file to You under + * the OAI Public License, Version 1.0 (the "License"); you may not use this file + * except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.openairinterface.org/?page_id=698 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + *------------------------------------------------------------------------------- + * For more information about the OpenAirInterface (OAI) Software Alliance: + * contact@openairinterface.org + */ +/*! \file PHY/CODING/nrLDPC_decoder_kernels_CL.cl +* \brief kernel functions for ldpc decoder accelerated via openCL +* \author Francois TABURET +* \date 2021 +* \version 1.0 +* \company Nokia BellLabs France +* \email: francois.taburet@nokia-bell-labs.com +* \note initial implem - translation of cuda version +* \warning +*/ #define define MAX_ITERATION 2 #define MC 1 From 2e8013546b996480bb8e9525ff8af1e183bc43ca Mon Sep 17 00:00:00 2001 From: frtabu Date: Tue, 19 Oct 2021 20:07:10 +0200 Subject: [PATCH 081/102] documentation update --- doc/RUNMODEM.md | 5 +- openair1/PHY/CODING/DOC/LDPCImplementation.md | 163 +++++++++++++++++- 2 files changed, 159 insertions(+), 9 deletions(-) diff --git a/doc/RUNMODEM.md b/doc/RUNMODEM.md index dc7a982310..d063afd5d9 100644 --- a/doc/RUNMODEM.md +++ b/doc/RUNMODEM.md @@ -203,10 +203,7 @@ UE on machine 2: - - - - +[Selecting an alternative ldpc implementation at run time](../openair1/PHY/CODING/DOC/LDPCImplementation.md) [oai wiki home](https://gitlab.eurecom.fr/oai/openairinterface5g/wikis/home) diff --git a/openair1/PHY/CODING/DOC/LDPCImplementation.md b/openair1/PHY/CODING/DOC/LDPCImplementation.md index 89ae6b4dbb..c5411540b6 100644 --- a/openair1/PHY/CODING/DOC/LDPCImplementation.md +++ b/openair1/PHY/CODING/DOC/LDPCImplementation.md @@ -1,11 +1,13 @@ -#LDPC coder/decoder implementation +# LDPC coder/decoder implementation The LDPC coder and decoder are implemented in a shared library, dynamically loaded at run-time using the [oai shared library loader](file://../../../../common/utils/DOC/loader.md). The code loading the LDPC library is in [nrLDPC_load.c](file://../nrLDPC_load.c), in function `load_nrLDPClib`, which must be called at init time. ## Selecting the LDPC library at run time By default the function `int load_nrLDPClib(void)` looks for `libldpc.so`, this default behavior can be changed using the oai loader configuration options in the configuration file or from the command line as shown below: ->loading `libldpc_optim8seg.so` instead of `libldpc.so` +#### Examples of ldpc shared lib selection when running nr softmodem's: + +loading `libldpc_optim8seg.so` instead of `libldpc.so`: ``` ./nr-softmodem -O libconfig:gnb.band78.tm1.106PRB.usrpx300.conf:dbgl5 --loader.ldpc.shlibversion _optim8seg @@ -18,9 +20,160 @@ By default the function `int load_nrLDPClib(void)` looks for `libldpc.so`, this ........................ ``` -Today, this mechanism is not available in the `ldpctest` phy simulator which doesn't initialize the [configuration module](file://../../../../common/config/DOC/config.md). loads `libldpc.so` and `libldpc_orig.so` to compare the performance of the two implementations. +loading `libldpc_cl.so` instead of `libldpc.so`: -###LDPC libraries -Libraries implementing the LDPC algorithms must be named `libldpc<_version>.so`, they must implement two functions: `nrLDPC_decod` and `nrLDPC_encod`. The prototypes for these functions is defined in [nrLDPC_defs.h](file://nrLDPC_defs.h). +`make ldpc_cl` + +`cp ../../../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl` + +`./nr-softmodem -O libconfig:gnb.band78.sa.fr1.106PRB.usrpb210.conf:dbgl5 --rfsim --rfsimulator.serveraddr server --sa --log_config.gtpu_log_level info --loader.ldpc.shlibversion _cl` + +``` [LOADER] library libldpc_cl.so successfully loaded +------------------------------------------------ +[HW] Platform 0, OpenCL profile FULL_PROFILE +[HW] Platform 0, OpenCL version OpenCL 2.1 LINUX +[HW] Device 0 is available +[HW] Device 0, type 2 = 0x00000002: cpu +[HW] Device 0, number of Compute Units: 8 +[HW] Device 0, max Work Items dimension: 3 +[HW] Device 0, max Work Items size for dimension: 0 8192 +[HW] Device 0, max Work Items size for dimension: 1 8192 +[HW] Device 0, max Work Items size for dimension: 2 8192 +[New Thread 0x7fffcc258700 (LWP 3945123)] +[New Thread 0x7fffc3e57700 (LWP 3945124)] +[New Thread 0x7fffcbe57700 (LWP 3945125)] +[New Thread 0x7fffcba56700 (LWP 3945126)] +[New Thread 0x7fffcb254700 (LWP 3945128)] +[New Thread 0x7fffcb655700 (LWP 3945127)] +[New Thread 0x7fffcae53700 (LWP 3945129)] +[HW] Platform 1, OpenCL profile FULL_PROFILE +[HW] Platform 1, OpenCL version OpenCL 2.0 beignet 1.3 +[New Thread 0x7fffc965a700 (LWP 3945130)] +[Thread 0x7fffc965a700 (LWP 3945130) exited] +[HW] Device 0 is available +[HW] Device 0, type 4 = 0x00000004: gpu +[HW] Device 0, number of Compute Units: 20 +[HW] Device 0, max Work Items dimension: 3 +[HW] Device 0, max Work Items size for dimension: 0 512 +[HW] Device 0, max Work Items size for dimension: 1 512 +[HW] Device 0, max Work Items size for dimension: 2 512 +----------------------------------------------------------------- +``` + +`./nr-uesoftmodem -r 106 --numerology 1 --band 78 -C 3619200000 --rfsim --sa -O libconfig:/usr/local/oai/conf/nrue_sim.conf:dbgl5 --nokrnmod --loader.ldpc.shlibversion _cl --log_config.hw_log_level info` + +```[CONFIG] shlibversion set to _cl from command line +............................................................ +[CONFIG] loader.ldpc 1 options set from command line +[LOADER] library libldpc_cl.so successfully loaded +[HW] Platform 0, OpenCL profile FULL_PROFILE +[HW] Platform 0, OpenCL version OpenCL 2.1 LINUX +[HW] Device 0 is available +[HW] Device 0, type 2 = 0x00000002: cpu +[HW] Device 0, number of Compute Units: 8 +[HW] Device 0, max Work Items dimension: 3 +[HW] Device 0, max Work Items size for dimension: 0 8192 +[HW] Device 0, max Work Items size for dimension: 1 8192 +[HW] Device 0, max Work Items size for dimension: 2 8192 +[New Thread 0x7fffecccc700 (LWP 3945413)] +[New Thread 0x7fffec8cb700 (LWP 3945415)] +[New Thread 0x7fffec4ca700 (LWP 3945414)] +[New Thread 0x7fffdf7fd700 (LWP 3945417)] +[New Thread 0x7fffdfbfe700 (LWP 3945418)] +[New Thread 0x7fffdffff700 (LWP 3945416)] +[New Thread 0x7fffd73fc700 (LWP 3945419)] +[HW] Platform 1, OpenCL profile FULL_PROFILE +[HW] Platform 1, OpenCL version OpenCL 2.0 beignet 1.3 +[New Thread 0x7fffde105700 (LWP 3945420)] +[Thread 0x7fffde105700 (LWP 3945420) exited] +[HW] Device 0 is available +[HW] Device 0, type 4 = 0x00000004: gpu +[HW] Device 0, number of Compute Units: 20 +[HW] Device 0, max Work Items dimension: 3 +[HW] Device 0, max Work Items size for dimension: 0 512 +[HW] Device 0, max Work Items size for dimension: 1 512 +[HW] Device 0, max Work Items size for dimension: 2 512 +------------------------------------------------------------ +​``` +``` + +A mechanism to select ldpc implementation is also available in the `ldpctest` phy simulator via the `-v`option, which can be used to specify the version of the ldpc shared library to be used. + +#### Examples of ldpc shared lib selection when running ldpctest: + +Loading libldpc_cuda.so, the cuda implementation of the ldpc decoder: + +```$ ./ldpctest -v _cuda +Initializing random number generator, seed 0 +block length 8448: +n_trials 1: +SNR0 -2.000000: +[CONFIG] get parameters from cmdline , debug flags: 0x00400000 +[CONFIG] log_config: 2/3 parameters successfully set +[CONFIG] log_config: 53/53 parameters successfully set +[CONFIG] log_config: 53/53 parameters successfully set +[CONFIG] log_config: 16/16 parameters successfully set +[CONFIG] log_config: 16/16 parameters successfully set +log init done +[CONFIG] loader: 2/2 parameters successfully set +[CONFIG] loader.ldpc: 1/2 parameters successfully set +[LOADER] library libldpc_cuda.so successfully loaded +................................... +​``` +``` + +Loading libldpc_cl.so, the opencl implementation of the ldpc decoder: + +`make ldpc_cl` + +`cp ../../../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl` + +`./ldpctest -v _cl` + +```$ ./ldpctest -v _cl +Initializing random number generator, seed 0 +block length 8448: +n_trials 1: +SNR0 -2.000000: +[CONFIG] get parameters from cmdline , debug flags: 0x00400000 +[CONFIG] log_config: 2/3 parameters successfully set +[CONFIG] log_config: 53/53 parameters successfully set +[CONFIG] log_config: 53/53 parameters successfully set +[CONFIG] log_config: 16/16 parameters successfully set +[CONFIG] log_config: 16/16 parameters successfully set +log init done +[CONFIG] loader: 2/2 parameters successfully set +[CONFIG] loader.ldpc: 1/2 parameters successfully set +[LOADER] library libldpc_cl.so successfully loaded +[HW] Platform 0, OpenCL profile FULL_PROFILE +[HW] Platform 0, OpenCL version OpenCL 2.1 LINUX +[HW] Device 0 is available +[HW] Device 0, type 2 = 0x00000002: cpu +[HW] Device 0, number of Compute Units: 8 +[HW] Device 0, max Work Items dimension: 3 +[HW] Device 0, max Work Items size for dimension: 0 8192 +[HW] Device 0, max Work Items size for dimension: 1 8192 +[HW] Device 0, max Work Items size for dimension: 2 8192 +[HW] Platform 1, OpenCL profile FULL_PROFILE +[HW] Platform 1, OpenCL version OpenCL 2.0 beignet 1.3 +[HW] Device 0 is available +[HW] Device 0, type 4 = 0x00000004: gpu +[HW] Device 0, number of Compute Units: 20 +[HW] Device 0, max Work Items dimension: 3 +[HW] Device 0, max Work Items size for dimension: 0 512 +[HW] Device 0, max Work Items size for dimension: 1 512 +[HW] Device 0, max Work Items size for dimension: 2 512 +................................ +​``` +``` + + + +### LDPC libraries +Libraries implementing the LDPC algorithms must be named `libldpc<_version>.so`, they must implement three functions: `nrLDPC_initcall` `nrLDPC_decod` and `nrLDPC_encod`. The prototypes for these functions is defined in [nrLDPC_defs.h](file://nrLDPC_defs.h). + +`libldpc_cuda.so`has been tested with the `ldpctest` executable, usage from the softmodem's has to be tested. + +`libldpc_cl`is under development. [oai Wikis home](https://gitlab.eurecom.fr/oai/openairinterface5g/wikis/home) From 68d415fd85b0fee370905a2ad32e28bac3366f18 Mon Sep 17 00:00:00 2001 From: frtabu Date: Wed, 27 Oct 2021 14:35:27 +0200 Subject: [PATCH 082/102] go on with openCL implementation --- .../PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c | 14 ++++++++++---- .../nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl | 8 ++++++++ 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c index daca1d4237..7fb1640ec4 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c @@ -40,6 +40,12 @@ #define MAX_OCLDEV 10 #define MAX_OCLRUNTIME 5 + + +#define CLSETKERNELARG(A,B,C,D) \ +rt=clSetKernelArg(A,B,C,D) ;\ +AssertFatal(rt == CL_SUCCESS, "Error %d setting kernel argument index %d\n" , (int)rt, B); + typedef struct{ char x; char y; @@ -304,10 +310,10 @@ int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_ // int pack = (block_length/128)+1; // dim3 pack_block(pack, MC, 1); // pack_decoded_bit<<>>( col, Zc); - rt = clSetKernelArg(ocl.runtime[0].kernels[0].pack_decoded_bit, 0, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_llr)); - rt = clSetKernelArg(ocl.runtime[0].kernels[0].pack_decoded_bit, 1, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_tmp)); - rt = clSetKernelArg(ocl.runtime[0].kernels[0].pack_decoded_bit, 2, sizeof(int), (void *)&(col)); - rt = clSetKernelArg(ocl.runtime[0].kernels[0].pack_decoded_bit, 3, sizeof(int), (void *)&(Zc)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].pack_decoded_bit, 0, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_llr)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].pack_decoded_bit, 1, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_tmp)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].pack_decoded_bit, 2, sizeof(int), (void *)&(col)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].pack_decoded_bit, 3, sizeof(int), (void *)&(Zc)); // Execute the OpenCL kernel on the list size_t global_item_size = block_length; // Process the entire lists diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl index 6dce6a752e..33596a2466 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl @@ -88,6 +88,9 @@ __constant char h_ele_col_bg2_count[52] = { // Kernel 1 __kernel void ldpc_cnp_kernel_1st_iter( __local char * dev_llr, __local char * dev_dt, int BG, int row, int col, int Zc) { +// int iMCW = blockIdx.y; // codeword id +// int iBlkRow = blockIdx.x; // block row in h_base +// int iSubRow = threadIdx.x; // row index in sub_block of h_base // if(blockIdx.x == 0 && threadIdx.x == 1) printf("cnp %d\n", threadIdx.x); int iMCW = get_group_id(1); // codeword id int iBlkRow = get_group_id(0); // block row in h_base @@ -158,6 +161,9 @@ __kernel void ldpc_cnp_kernel_1st_iter( __local char * dev_llr, __local char * d __kernel void ldpc_cnp_kernel( __local char * dev_llr, __local char * dev_dt, int BG, int row, int col, int Zc) { // if(blockIdx.x == 0 && threadIdx.x == 1) printf("cnp\n"); +// int iMCW = blockIdx.y; +// int iBlkRow = blockIdx.x; // block row in h_base // block col in h_base +// int iSubRow = threadIdx.x; // row index in sub_block of h_base int iMCW = get_group_id(1); int iBlkRow = get_group_id(0); // block row in h_base int iBlkCol; // block col in h_base @@ -270,6 +276,8 @@ ldpc_vnp_kernel_normal(__local char * dev_llr, __local char * dev_dt, /* char * __kernel void pack_decoded_bit(__global unsigned char * dev_llr, __global unsigned char * dev_tmp, int col, int Zc) { +// int iMCW = blockIdx.y; +// int btid = threadIdx.x; unsigned char tmp[128]; int iMCW = get_group_id(1); int btid = get_local_id(0); From 8dd5346e2c75509f5c0e2167389a1c8682d5afcd Mon Sep 17 00:00:00 2001 From: frtabu Date: Wed, 27 Oct 2021 16:13:53 +0200 Subject: [PATCH 083/102] fixes after rebase --- .../CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c | 171 ++++++++++++++---- .../nrLDPC_decoder_kernels_CL.cl | 19 +- 2 files changed, 149 insertions(+), 41 deletions(-) diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c index 7fb1640ec4..58e6b507af 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c @@ -51,6 +51,7 @@ typedef struct{ char y; short value; } h_element; +#include "../nrLDPC_decoder_LYC/bgs/BG1_compact_in_C.h" typedef struct{ cl_uint max_CU; @@ -71,6 +72,8 @@ typedef struct{ ocldev_t ocldev[MAX_OCLDEV]; cl_context context; cl_program program; + cl_mem dev_h_compact1; + cl_mem dev_h_compact2; cl_mem dev_const_llr; cl_mem dev_llr; cl_mem dev_dt; @@ -87,12 +90,10 @@ typedef struct{ ocl_t ocl; -void init_LLR_DMA(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out){ - - uint16_t Zc = p_decParams->Z; - uint8_t BG = p_decParams->BG; - int block_length = p_decParams->block_length; - uint8_t row,col; + +void set_compact_BG(int Zc,short BG){ + cl_uint rt; + int row,col; if(BG == 1){ row = 46; col = 68; @@ -101,12 +102,81 @@ void init_LLR_DMA(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out row = 42; col = 52; } - unsigned char *hard_decision = (unsigned char*)p_out; - int memorySize_llr_cuda = col * Zc * sizeof(char) * MC; -// cudaCheck( cudaMemcpyToSymbol(dev_const_llr, p_llr, memorySize_llr_cuda) ); -// cudaCheck( cudaMemcpyToSymbol(dev_llr, p_llr, memorySize_llr_cuda) ); -// cudaDeviceSynchronize(); + int compact_row = 30; + int compact_col = 19; + if(BG==2){compact_row = 10, compact_col = 23;} + int memorySize_h_compact1 = row * compact_col * sizeof(h_element); + int memorySize_h_compact2 = compact_row * col * sizeof(h_element); + int lift_index = 0; + short lift_set[][9] = { + {2,4,8,16,32,64,128,256}, + {3,6,12,24,48,96,192,384}, + {5,10,20,40,80,160,320}, + {7,14,28,56,112,224}, + {9,18,36,72,144,288}, + {11,22,44,88,176,352}, + {13,26,52,104,208}, + {15,30,60,120,240}, + {0} + }; + for(int i = 0; lift_set[i][0] != 0; i++){ + for(int j = 0; lift_set[i][j] != 0; j++){ + if(Zc == lift_set[i][j]){ + lift_index = i; + break; + } + } + } + printf("\nZc = %d BG = %d\n",Zc,BG); + ocl.runtime[0].dev_h_compact1 = clCreateBuffer(ocl.runtime[0].context, CL_MEM_READ_ONLY|CL_MEM_HOST_WRITE_ONLY, memorySize_h_compact1, NULL, (cl_int *)&rt); + AssertFatal(rt == CL_SUCCESS, "Error %d creating buffer dev_h_compact1 for platform %i \n" , (int)rt, 0); + ocl.runtime[0].dev_h_compact2 = clCreateBuffer(ocl.runtime[0].context, CL_MEM_READ_ONLY|CL_MEM_HOST_WRITE_ONLY, memorySize_h_compact2, NULL, (cl_int *)&rt); + AssertFatal(rt == CL_SUCCESS, "Error %d creating buffer dev_h_compact2 for platform %i \n" , (int)rt, 0); + h_element *h1; + h_element *h2; + switch(lift_index){ + case 0: + h1 = host_h_compact1_I0; + h2 = host_h_compact2_I0; + break; + case 1: + h1 = host_h_compact1_I1; + h2 = host_h_compact2_I1; + break; + case 2: + h1 = host_h_compact1_I2; + h2 = host_h_compact2_I2; + break; + case 3: + h1 = host_h_compact1_I3; + h2 = host_h_compact2_I3; + break; + case 4: + h1 = host_h_compact1_I4; + h2 = host_h_compact2_I4; + break; + case 5: + h1 = host_h_compact1_I5; + h2 = host_h_compact2_I5; + break; + case 6: + h1 = host_h_compact1_I6; + h2 = host_h_compact2_I6; + break; + case 7: + h1 = host_h_compact1_I7; + h2 = host_h_compact2_I7; + break; + default: + AssertFatal(0, "Invalid lift_index value %i\n" , lift_index); + break; + } + rt = clEnqueueWriteBuffer(ocl.runtime[0].queue[0], ocl.runtime[0].dev_h_compact1, CL_TRUE, 0,memorySize_h_compact1, h1, 0, NULL, NULL); + AssertFatal(rt == CL_SUCCESS, "Error %d moving h_compact1 memory to pltf %i dev %i\n" , (int)rt, 0,0); + rt = clEnqueueWriteBuffer(ocl.runtime[0].queue[0], ocl.runtime[0].dev_h_compact2, CL_TRUE, 0,memorySize_h_compact2, h2, 0, NULL, NULL); + AssertFatal(rt == CL_SUCCESS, "Error %d moving h_compact2 memory to pltf %i dev %i\n" , (int)rt, 0,0); + // return 0; } void cl_error_callback(const char* errinfo, const void* private_info, size_t cb, void* user_data) { oclruntime_t *runtime = (oclruntime_t *)user_data; @@ -244,7 +314,8 @@ int ldpc_autoinit(void) { // called by the library loader void nrLDPC_initcall(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out) { - + set_compact_BG(p_decParams->Z,p_decParams->BG); +// init_LLR_DMA(p_decParams, p_llr, p_out); } @@ -252,10 +323,9 @@ int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_ { uint16_t Zc = p_decParams->Z; uint8_t BG = p_decParams->BG; - uint8_t numMaxIter = p_decParams->numMaxIter; +// uint8_t numMaxIter = p_decParams->numMaxIter; int block_length = p_decParams->block_length; - e_nrLDPC_outMode outMode = p_decParams->outMode; - cudaError_t cudaStatus; +// e_nrLDPC_outMode outMode = p_decParams->outMode; uint8_t row,col; if(BG == 1){ row = 46; @@ -267,7 +337,7 @@ int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_ } // alloc memory - unsigned char *hard_decision = (unsigned char*)p_out; +// unsigned char *hard_decision = (unsigned char*)p_out; // gpu int memorySize_llr = col * Zc * sizeof(char) * MC; // cudaCheck( cudaMemcpyToSymbol(dev_const_llr, p_llr, memorySize_llr_cuda) ); @@ -279,7 +349,7 @@ int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_ memorySize_llr, p_llr, 0, NULL, NULL); AssertFatal(rt == CL_SUCCESS, "Error %d moving p_llr data to read-write memory in pltf %i dev %i\n" , (int)rt, 0,0); // Define CUDA kernel dimension - int blockSizeX = Zc; +// int blockSizeX = Zc; // dim3 dimGridKernel1(row, MC, 1); // dim of the thread blocks // dim3 dimBlockKernel1(blockSizeX, 1, 1); @@ -288,26 +358,60 @@ int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_ // cudaDeviceSynchronize(); // lauch kernel -/* + size_t global_item_sizek0[2] = {row*Zc,MC}; // Process the entire lists + size_t global_item_sizek1[2] = {col*Zc,MC}; // Process the entire lists + size_t local_item_sizek[2] = {128,1}; // Divide work items into groups of 128 + for(int ii = 0; ii < MAX_ITERATION; ii++){ // first kernel if(ii == 0){ - ldpc_cnp_kernel_1st_iter - <<>> - ( BG, row, col, Zc); +// ldpc_cnp_kernel_1st_iter +// <<>> +// ( BG, row, col, Zc); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel_1st, 0, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_llr)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel_1st, 1, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_dt)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel_1st, 2, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_h_compact1)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel_1st, 3, sizeof(int), (void *)&(BG)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel_1st, 4, sizeof(int), (void *)&(row)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel_1st, 5, sizeof(int), (void *)&(col)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel_1st, 6, sizeof(int), (void *)&(Zc)); + rt = clEnqueueNDRangeKernel(ocl.runtime[0].queue[0], ocl.runtime[0].kernels[0].cnp_kernel_1st, 2, NULL, + global_item_sizek0, local_item_sizek, 0, NULL, NULL); + AssertFatal(rt == CL_SUCCESS, "Error %d enqueing cnp_kernel_1st \n" , (int)rt); }else{ - ldpc_cnp_kernel - <<>> - ( BG, row, col, Zc); +// ldpc_cnp_kernel +// <<>> +// ( BG, row, col, Zc); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel, 0, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_llr)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel, 1, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_dt)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel, 2, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_h_compact1)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel, 3, sizeof(int), (void *)&(BG)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel, 4, sizeof(int), (void *)&(row)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel, 5, sizeof(int), (void *)&(col)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].cnp_kernel, 6, sizeof(int), (void *)&(Zc)); + rt = clEnqueueNDRangeKernel(ocl.runtime[0].queue[0], ocl.runtime[0].kernels[0].cnp_kernel, 2, NULL, + global_item_sizek0, local_item_sizek, 0, NULL, NULL); + AssertFatal(rt == CL_SUCCESS, "Error %d enqueing cnp_kernel\n" , (int)rt); } // second kernel - ldpc_vnp_kernel_normal - <<>> - // (dev_llr, dev_const_llr,BG, row, col, Zc); - (BG, row, col, Zc); +// ldpc_vnp_kernel_normal +// <<>> +// // (dev_llr, dev_const_llr,BG, row, col, Zc); +// (BG, row, col, Zc); + CLSETKERNELARG(ocl.runtime[0].kernels[0].vnp_kernel_normal, 0, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_llr)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].vnp_kernel_normal, 1, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_dt)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].vnp_kernel_normal, 2, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_const_llr)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].vnp_kernel_normal, 3, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_h_compact2)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].vnp_kernel_normal, 4, sizeof(int), (void *)&(BG)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].vnp_kernel_normal, 5, sizeof(int), (void *)&(row)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].vnp_kernel_normal, 6, sizeof(int), (void *)&(col)); + CLSETKERNELARG(ocl.runtime[0].kernels[0].vnp_kernel_normal, 7, sizeof(int), (void *)&(Zc)); + rt = clEnqueueNDRangeKernel(ocl.runtime[0].queue[0], ocl.runtime[0].kernels[0].vnp_kernel_normal, 2, NULL, + global_item_sizek1, local_item_sizek, 0, NULL, NULL); + AssertFatal(rt == CL_SUCCESS, "Error %d enqueing vnp_kernel_normal \n" , (int)rt); } -*/ -// int pack = (block_length/128)+1; + +// int pack = (block_length/128)+1; // dim3 pack_block(pack, MC, 1); // pack_decoded_bit<<>>( col, Zc); CLSETKERNELARG(ocl.runtime[0].kernels[0].pack_decoded_bit, 0, sizeof(cl_mem), (void *)&(ocl.runtime[0].dev_llr)); @@ -316,10 +420,11 @@ int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_ CLSETKERNELARG(ocl.runtime[0].kernels[0].pack_decoded_bit, 3, sizeof(int), (void *)&(Zc)); // Execute the OpenCL kernel on the list - size_t global_item_size = block_length; // Process the entire lists - size_t local_item_size = 128; // Divide work items into groups of 128 + size_t global_item_size[2] = {block_length,MC}; // Process the entire lists + size_t local_item_size[2] = {128,1}; // Divide work items into groups of 128 rt = clEnqueueNDRangeKernel(ocl.runtime[0].queue[0], ocl.runtime[0].kernels[0].pack_decoded_bit, 2, NULL, - &global_item_size, &local_item_size, 0, NULL, NULL); + global_item_size, local_item_size, 0, NULL, NULL); + AssertFatal(rt == CL_SUCCESS, "Error %d enqueing pack_decoded_bit \n" , (int)rt); // cudaCheck( cudaMemcpyFromSymbol((void*)hard_decision, (const void*)dev_tmp, (block_length/8)*sizeof(unsigned char)) ); // cudaDeviceSynchronize(); diff --git a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl index 33596a2466..d5e2fa5695 100644 --- a/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl +++ b/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl @@ -45,11 +45,11 @@ typedef struct{ //__global char dev_llr[68*384]; //__global unsigned char dev_tmp[68*384]; -__constant h_element h_compact1 [46*19] = {}; -__constant h_element h_compact2 [68*30] = {}; -__constant h_element dev_h_compact1[46*19] = {}; // used in kernel 1 -__constant h_element dev_h_compact2[68*30] = {}; // used in kernel 2 + + +//__constant h_element dev_h_compact1[46*19] = {}; // used in kernel 1 +//__constant h_element dev_h_compact2[68*30] = {}; // used in kernel 2 // __device__ __constantant__ h_element dev_h_compact1[46*19]; // used in kernel 1 // __device__ __constantant__ h_element dev_h_compact2[68*30]; // used in kernel 2 @@ -86,7 +86,7 @@ __constant char h_ele_col_bg2_count[52] = { // Kernel 1 -__kernel void ldpc_cnp_kernel_1st_iter( __local char * dev_llr, __local char * dev_dt, int BG, int row, int col, int Zc) +__kernel void ldpc_cnp_kernel_1st_iter( __global char * dev_llr, __global char * dev_dt, __local h_element *dev_h_compact1, int BG, int row, int col, int Zc) { // int iMCW = blockIdx.y; // codeword id // int iBlkRow = blockIdx.x; // block row in h_base @@ -158,7 +158,7 @@ __kernel void ldpc_cnp_kernel_1st_iter( __local char * dev_llr, __local char * d } // Kernel_1 -__kernel void ldpc_cnp_kernel( __local char * dev_llr, __local char * dev_dt, int BG, int row, int col, int Zc) +__kernel void ldpc_cnp_kernel( __global char * dev_llr, __global char * dev_dt, __local h_element *dev_h_compact1, int BG, int row, int col, int Zc) { // if(blockIdx.x == 0 && threadIdx.x == 1) printf("cnp\n"); // int iMCW = blockIdx.y; @@ -234,8 +234,11 @@ __kernel void ldpc_cnp_kernel( __local char * dev_llr, __local char * dev_dt, in // Kernel 2: VNP processing __kernel void -ldpc_vnp_kernel_normal(__local char * dev_llr, __local char * dev_dt, /* char * dev_const_llr,*/ int BG, int row, int col, int Zc) -{ +ldpc_vnp_kernel_normal(__global char * dev_llr, __global char * dev_dt, __global char * dev_const_llr, __local h_element *dev_h_compact2, int BG, int row, int col, int Zc) +{ +// int iMCW = blockIdx.y; +// int iBlkCol = blockIdx.x; +// int iSubCol = threadIdx.x; int iMCW = get_group_id(1); int iBlkCol = get_group_id(0); int iBlkRow; From 534a8bbf10bba379a51fea8f803ec02031a0ce11 Mon Sep 17 00:00:00 2001 From: Melissa Date: Wed, 27 Oct 2021 22:28:25 +0000 Subject: [PATCH 084/102] Update README.txt for LTE L2 Emulator --- doc/episys/lte_mode_l2_emulator/README.txt | 34 +++++++++++----------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/doc/episys/lte_mode_l2_emulator/README.txt b/doc/episys/lte_mode_l2_emulator/README.txt index 2b35ce6f99..7b555b8442 100644 --- a/doc/episys/lte_mode_l2_emulator/README.txt +++ b/doc/episys/lte_mode_l2_emulator/README.txt @@ -1,35 +1,35 @@ There are fundamental changes to the L2 emulation mechanism; these changes allow the user to run multiple UEs in separate Linux processes/machines/VMs/etc. They use a separate -entity between the UE(s) and eNB; where the UEs use nFAPI to communicate with the eNB. The -nFAPI interface allows us to run in an emulated L2 mode, meaning that we are bypassing -the layer 1 (PHY) layer functionality. Becasue we are bypassing the PHY layer, special -channel modelling capabilty has been added in the LTE UE phy_stub_ue.c file. To understand +entity between the UE(s) and eNB. The UEs use nFAPI to communicate with the eNB. The +nFAPI interface allows us to run in an emulated layer 2 mode, meaning that we are bypassing +the layer 1 (PHY) functionality. Because we are bypassing the PHY layer, +channel modeling capabilties have been added in the LTE UE phy_stub_ue.c file. To understand the interfaces between the different components associated with LTE mode, the image functional_diagram_proxy_lte.png has been provided. -This functionality allows the user to plug in their own channel model and emulator the packet dropping procedure -in real time. The channel modelling has not been provided by EpiSci, but the OAI code -base already has some BLER curves available for use. The channle modelling functionality -that is included in the phy_stub_ue.c file only includes the downlink channel modelling. -Any uplink channel modelling must be conducted in some sort of proxy, which would sit -between the UEs and eNB. (A description of the downlink channel modelling is shown in the +This functionality allows the user to plug in their own channel model and emulate the packet dropping procedure +in real time. The channel modeling has not been provided by EpiSci, but the OAI code +base already has some BLER curves available for use. The channel modeling functionality +that is included in the phy_stub_ue.c file only includes the downlink channel modeling. +Any uplink channel modeling must be conducted in some sort of proxy, which would sit +between the UEs and eNB. (A description of the downlink channel modeling is shown in the Channel_Abstraction_UE_Handling_LTE.PNG image). The updates to the OAI code base removed some latent bugs, added multi-UE scalability, and were tested with a standard bypass proxy between the UE(s) and eNB. The bypass proxy is -publicly available on GitHub. With this package, +publicly available on GitHub (https://github.com/EpiSci/oai-lte-multi-ue-proxy). With this package, various multi-UE scenarios can be tested without the overhead of PHY-layer features -of underlying radios. +of underlying radios. The features added in the L2 Emulator Mode for LTE are: - Ease of use of gprof and address sanitizer for debugging purposes - Updated json files to allow for GDB, real-time debugging capabilities - Updated logging features to minimally log only key connection milestones. This improves scalability of multiple UEs. The logging mechanism described here is located in the log.c and log.h files. The LOG_MINIMAL -function allows us to remove all OAI logging and only include LOG_A(...) logs. The LOG_A +function allows us to remove most OAI logging and includes LOG_A(...) logs and above. The LOG_A logs were chosen as analysis logs to meet EpiSci's internal testing procedure. The LOG_As -only include logs that are considered to be critical milestones in a particular procedure. (i.e. a -log indicating that the RACH procedure has been completed for LTE.) To revert to the original logging -mechanism, simply set LOG_MINIMAL = 0 in the log.h file. +only include logs that are considered to be milestones in a given test. For example, a +log indicating that the RACH procedure has been completed for LTE. To select full logging, +set LOG_MINIMAL = 0 in the log.h file. - Updated logging to include time stamp for timing analysis - Updated memory allocation procedures to correct size requirements - Added debugging features to handle signal terminations @@ -46,4 +46,4 @@ mechanism, simply set LOG_MINIMAL = 0 in the log.h file. - Incorporated semaphores to control timing of incoming downlink packets - Implemented new queuing system to handle message exchange from UE to eNB and vice versa - Updated global value in nFAPI for size of subframe - - Updated global value to increase scalability in system \ No newline at end of file + - Updated global value to increase scalability in system From 957c79e5eb04ff1a1aec20a1bf24c659ce37897b Mon Sep 17 00:00:00 2001 From: Melissa Date: Wed, 27 Oct 2021 22:36:33 +0000 Subject: [PATCH 085/102] Update README.txt for NSA mode --- doc/episys/nsa_mode_l2_emulator/README.txt | 32 +++++++++++----------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/doc/episys/nsa_mode_l2_emulator/README.txt b/doc/episys/nsa_mode_l2_emulator/README.txt index 0fde5d0e3e..fefaf63f44 100644 --- a/doc/episys/nsa_mode_l2_emulator/README.txt +++ b/doc/episys/nsa_mode_l2_emulator/README.txt @@ -1,35 +1,35 @@ There are fundamental changes to the L2 emulation mechanism; these changes allow the user to run multiple UEs in separate Linux processes/machines/VMs/etc. They use a separate -entity between the UE(s) and eNB; where the UEs use nFAPI to communicate with the eNB. The +entity between the UE(s) and eNB/gNB. The UEs use nFAPI to communicate with the eNB/gNB. The nFAPI interface allows us to run in an emulated L2 mode, meaning that we are bypassing the layer 1 (PHY) layer functionality. Becasue we are bypassing the PHY layer, special -channel modelling capabilty has been added in the LTE UE phy_stub_ue.c file. To understand +channel modeling capabilty has been added in the LTE UE phy_stub_ue.c file. To understand the interfaces between the different components associated with NSA mode, the image functional_diagram_proxy_nsa.png has been provided. -This functionality allows the user to plug in their own channel model and emulator the packet dropping procedure -in real time. The channel modelling has not been provided by EpiSci, but the OAI code -base already has some BLER curves available for use. The channle modelling functionality -that is included in the phy_stub_ue.c file only includes the downlink channel modelling. -Any uplink channel modelling must be conducted in some sort of proxy, which would sit -between the UEs and eNB. (A description of the downlink channel modelling is shown in the +This functionality allows the user to plug in their own channel model and emulate the packet dropping procedure +in real time. The channel modeling has not been provided by EpiSci, but the OAI code +base already has some BLER curves available for use. The chanel modeling functionality +that is included in the phy_stub_ue.c file only includes the downlink channel modeling. +Any uplink channel modeling must be conducted in some sort of proxy, which would sit +between the UEs and eNB/gNB. (A description of the downlink channel modeling is shown in the Channel_Abstraction_UE_Handling_LTE.PNG image). The updates to the OAI code base removed some latent bugs, added multi-UE scalability, -and were tested with a standard bypass proxy between the UE(s) and eNB. The bypass proxy is -publicly available on GitHub. With this package, +and were tested with a standard bypass proxy between the UE(s) and eNB/gNB. The bypass proxy is +publicly available on GitHub (https://github.com/EpiSci/oai-lte-multi-ue-proxy). With this package, various multi-UE scenarios can be tested without the overhead of PHY-layer features -of underlying radios. +of underlying radios. The added features to the OAI code base are listed below. - Ease of use of gprof and address sanitizer for debugging purposes - Updated json files to allow for GDB, real-time debugging capabilities - Updated logging features to minimally log only key connection milestones. This improves scalability of multiple UEs. The logging mechanism described here is located in the log.c and log.h files. The LOG_MINIMAL -function allows us to remove all OAI logging and only include LOG_A(...) logs. The LOG_A +function allows us to remove most logs and include LOG_A(...) logs and above. The LOG_A logs were chosen as analysis logs to meet EpiSci's internal testing procedure. The LOG_As -only include logs that are considered to be critical milestones in a particular procedure. (i.e. a -log indicating that the RACH procedure has been completed for LTE.) To revert to the original logging -mechanism, simply set LOG_MINIMAL = 0 in the log.h file. +only include logs that are considered to be milestones in a given test. For example, a +log indicating that the CFRA procedure has been completed for NSA mode. To revert to full logging, +set LOG_MINIMAL = 0 in the log.h file. - Updated logging to include time stamp for timing analysis - Updated memory allocation procedures to correct size requirements - Added debugging features to handle signal terminations @@ -52,7 +52,7 @@ mechanism, simply set LOG_MINIMAL = 0 in the log.h file. Additionally, NSA mode includes the establishment between an NR UE and the gNB via the LTE UE and eNB connection. For NSA mode, the downlink channel abstraction has not been added to the feature set yet. NSA mode has been tested and is fully functional with EpiSci's public version of the nFAPI proxy -located at https://github.com/EpiSci/oai-lte-multi-ue-proxy/blob/master/README.md +located at https://github.com/EpiSci/oai-lte-multi-ue-proxy NSA mode establishment includes the following steps: - First UE capability enquiry is sent to NR UE From 455e3d83439ed4f48a174ae34363aa7a86057af2 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 28 Oct 2021 08:14:20 -0700 Subject: [PATCH 086/102] This commit gets rid of sfn_slot sleep In the previous commit, the NRUE would record the time it received a slot and compare this rx time to the next slot. If the next slot came in before it had been 500us, the NRUE would sleep a delta amount to make the duration between the two slot indications 500 us. This change complicated the code and did not improve the performance so it was removed. Furthermore, this commit removes the old queueing mechanism of the slot indications and uses calloc rather than an array. --- executables/nr-ue.c | 37 ++++++---------- openair2/LAYER2/NR_MAC_UE/mac_defs.h | 5 --- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 49 +++++---------------- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h | 1 - 4 files changed, 24 insertions(+), 68 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 2782f874c2..cca7c4d9cd 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -265,7 +265,7 @@ static void process_queued_nr_nfapi_msgs(NR_UE_MAC_INST_t *mac, int sfn_slot) nfapi_nr_dl_tti_request_t *dl_tti_request = get_queue(&nr_dl_tti_req_queue); nfapi_nr_ul_dci_request_t *ul_dci_request = get_queue(&nr_ul_dci_req_queue); - LOG_D(NR_MAC, "Try to get a ul_tti_req for sfn/slot %d %d from queue with %d items\n", + LOG_D(NR_MAC, "Try to get a ul_tti_req for sfn/slot %d %d from queue with %lu items\n", NFAPI_SFNSLOT2SFN(mac->active_harq_sfn_slot),NFAPI_SFNSLOT2SLOT(mac->active_harq_sfn_slot), nr_ul_tti_req_queue.num_items); nfapi_nr_ul_tti_request_t *ul_tti_request = unqueue_matching(&nr_ul_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &mac->active_harq_sfn_slot); if (!ul_tti_request) @@ -394,9 +394,6 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) NR_UL_TIME_ALIGNMENT_t ul_time_alignment; memset(&ul_time_alignment, 0, sizeof(ul_time_alignment)); int last_sfn_slot = -1; - int sfn_slot; - uint64_t last_time_stamp = 0; - sfn_slot_info_t *sfn_slot_info; while (!oai_exit) { @@ -405,32 +402,26 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) LOG_E(NR_MAC, "sem_wait() error\n"); abort(); } - sfn_slot_info = get_queue(&nr_sfn_slot_queue); - if (sfn_slot_info == NULL) + + uint16_t *sfn_slot = get_queue(&nr_sfn_slot_queue); + if (sfn_slot == NULL) { LOG_D(MAC, "get_queue(&nr_sfn_slot_queue) == NULL!\n"); continue; } - sfn_slot = sfn_slot_info->sfn_slot; - if (sfn_slot == last_sfn_slot) + frame_t frame = NFAPI_SFNSLOT2SFN(*sfn_slot); + int slot = NFAPI_SFNSLOT2SLOT(*sfn_slot); + if (*sfn_slot == last_sfn_slot) { LOG_D(NR_MAC, "repeated sfn_sf = %d.%d\n", - sfn_slot >> 6, sfn_slot & 0x3F); + frame, slot); continue; } - last_sfn_slot = sfn_slot; - LOG_D(NR_MAC, "The received sfn/slot [%d %d], last time stamp %ld, current time stamp %ld\n", - NFAPI_SFNSLOT2SFN(sfn_slot), NFAPI_SFNSLOT2SLOT(sfn_slot), last_time_stamp, sfn_slot_info->time_stamp); + last_sfn_slot = *sfn_slot; - uint64_t delta = sfn_slot_info->time_stamp - last_time_stamp; - if (delta < 500) - { - LOG_D(NR_MAC, "sfn/slot [%d %d] has been received too quickly! Delta = %ld. Will sleep for %ld us\n", - NFAPI_SFNSLOT2SFN(sfn_slot), NFAPI_SFNSLOT2SLOT(sfn_slot), delta, 500 - delta); - usleep(500 - delta); - } - last_time_stamp = sfn_slot_info->time_stamp; + LOG_D(NR_MAC, "The received sfn/slot [%d %d] from proxy\n", + frame, slot); module_id_t mod_id = 0; NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); @@ -443,8 +434,6 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) mac->ra.generate_nr_prach = 0; int CC_id = 0; uint8_t gNB_id = 0; - frame_t frame = NFAPI_SFNSLOT2SFN(sfn_slot); - int slot = NFAPI_SFNSLOT2SLOT(sfn_slot); nr_uplink_indication_t ul_info; int slots_per_frame = 20; //30 kHZ subcarrier spacing int slot_ahead = 2; // TODO: Make this dynamic @@ -479,7 +468,9 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) nr_ue_ul_indication(&ul_info); check_nr_prach(mac, &ul_info, &prach_resources); } - process_queued_nr_nfapi_msgs(mac, sfn_slot); + process_queued_nr_nfapi_msgs(mac, *sfn_slot); + free(sfn_slot); + sfn_slot = NULL; } return NULL; } diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index bd612c81cd..8f3c1526e5 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -443,11 +443,6 @@ typedef struct { } NR_UE_MAC_INST_t; -typedef struct sfn_slot_info { - uint16_t sfn_slot; - uint64_t time_stamp; -} sfn_slot_info_t; - typedef enum seach_space_mask_e { type0_pdcch = 0x1, type0a_pdcch = 0x2, diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index dafffbc9cc..681c72a1ae 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -52,7 +52,6 @@ static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES]; static int ue_tx_sock_descriptor = -1; static int ue_rx_sock_descriptor = -1; static int g_harq_pid; -int current_sfn_slot; sem_t sfn_slot_semaphore; queue_t nr_sfn_slot_queue; @@ -789,18 +788,6 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea return; } -static uint64_t clock_usec() -{ - struct timespec t; - if (clock_gettime(CLOCK_MONOTONIC, &t) == -1) - { - abort(); - } - return (uint64_t)t.tv_sec * 1000000 + (t.tv_nsec / 1000); -} - -sfn_slot_info_t sfn_slot_pool[512]; -uint16_t sfn_slot_id; void *nrue_standalone_pnf_task(void *context) { struct sockaddr_in server_address; @@ -809,9 +796,6 @@ void *nrue_standalone_pnf_task(void *context) assert(sd > 0); char buffer[NFAPI_MAX_PACKED_MESSAGE_SIZE]; - int sfn = 0; - int slot = 0; - LOG_I(NR_RRC, "Successfully started %s.\n", __FUNCTION__); @@ -830,24 +814,17 @@ void *nrue_standalone_pnf_task(void *context) } if (len == sizeof(uint16_t)) { - uint16_t sfn_slot = 0; - memcpy((void *)&sfn_slot, buffer, sizeof(sfn_slot)); - current_sfn_slot = sfn_slot; + uint16_t *sfn_slot = CALLOC(1, sizeof(*sfn_slot)); + memcpy(sfn_slot, buffer, sizeof(*sfn_slot)); - sfn_slot_pool[sfn_slot_id].sfn_slot = sfn_slot; - sfn_slot_pool[sfn_slot_id].time_stamp = clock_usec(); - sfn = NFAPI_SFNSLOT2SFN(sfn_slot); - slot = NFAPI_SFNSLOT2SLOT(sfn_slot); - LOG_I(NR_PHY, "Received from proxy sfn %d slot %d and time_stamp = %ld\n", - sfn, slot, sfn_slot_pool[sfn_slot_id].time_stamp); + LOG_I(NR_PHY, "Received from proxy sfn %d slot %d\n", + NFAPI_SFNSLOT2SFN(*sfn_slot), NFAPI_SFNSLOT2SLOT(*sfn_slot)); - if (!put_queue(&nr_sfn_slot_queue, &sfn_slot_pool[sfn_slot_id])) + if (!put_queue(&nr_sfn_slot_queue, sfn_slot)) { LOG_E(NR_PHY, "put_queue failed for sfn slot.\n"); } - sfn_slot_id = (sfn_slot_id + 1) % 512; - if (sem_post(&sfn_slot_semaphore) != 0) { LOG_E(NR_PHY, "sem_post() error\n"); @@ -856,28 +833,22 @@ void *nrue_standalone_pnf_task(void *context) } else if (len == sizeof(nr_phy_channel_params_t)) { - nr_phy_channel_params_t ch_info; - memcpy(&ch_info, buffer, sizeof(nr_phy_channel_params_t)); - current_sfn_slot = ch_info.sfn_slot; + nr_phy_channel_params_t *ch_info = CALLOC(1, sizeof(*ch_info)); + memcpy(ch_info, buffer, sizeof(*ch_info)); - sfn_slot_pool[sfn_slot_id].sfn_slot = ch_info.sfn_slot; - sfn_slot_pool[sfn_slot_id].time_stamp = clock_usec(); + LOG_I(NR_PHY, "Received_SINR = %f, sfn:slot %d:%d\n", + ch_info->sinr, NFAPI_SFNSLOT2SFN(ch_info->sfn_slot), NFAPI_SFNSLOT2SLOT(ch_info->sfn_slot)); - if (!put_queue(&nr_sfn_slot_queue, &sfn_slot_pool[sfn_slot_id])) + if (!put_queue(&nr_sfn_slot_queue, ch_info)) { LOG_E(NR_PHY, "put_queue failed for sfn slot.\n"); } - sfn_slot_id = (sfn_slot_id + 1) % 512; - if (sem_post(&sfn_slot_semaphore) != 0) { LOG_E(MAC, "sem_post() error\n"); abort(); } - sfn = NFAPI_SFNSLOT2SFN(ch_info.sfn_slot); - slot = NFAPI_SFNSLOT2SLOT(ch_info.sfn_slot); - LOG_I(NR_PHY, "Received_SINR = %f, sfn:slot %d:%d\n", ch_info.sinr, sfn, slot); } else { diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h index 2bd1888c18..37771282c0 100755 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h @@ -223,7 +223,6 @@ nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id); void nrue_init_standalone_socket(int tx_port, int rx_port); void *nrue_standalone_pnf_task(void *context); -extern int current_sfn_slot; extern sem_t sfn_slot_semaphore; typedef struct nfapi_dl_tti_config_req_tx_data_req_t From 66144698c78e1930a0dd3c10a3b3d575b765e243 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 28 Oct 2021 08:51:09 -0700 Subject: [PATCH 087/102] Reverting log and white space changes for MR --- nfapi/open-nFAPI/nfapi/inc/nfapi.h | 2 +- nfapi/open-nFAPI/nfapi/src/nfapi.c | 2 +- nfapi/open-nFAPI/nfapi/src/nfapi_p7.c | 1 + openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c | 4 ++-- openair1/SCHED_NR/fapi_nr_l1.c | 10 +++++----- openair1/SCHED_NR_UE/fapi_nr_ue_l1.c | 2 +- openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h | 2 ++ openair2/LAYER2/NR_MAC_UE/mac_extern.h | 2 ++ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 2 +- 9 files changed, 16 insertions(+), 11 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/inc/nfapi.h b/nfapi/open-nFAPI/nfapi/inc/nfapi.h index 05db920035..0f09efa78a 100644 --- a/nfapi/open-nFAPI/nfapi/inc/nfapi.h +++ b/nfapi/open-nFAPI/nfapi/inc/nfapi.h @@ -50,7 +50,7 @@ uint32_t pullarrays32(uint8_t **in, int32_t out[], uint32_t max_len, uint32_t le uint32_t pusharray8(uint8_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharray16(uint16_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharrays16(int16_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); -uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint16_t len, uint8_t **out, uint8_t *end); +uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); uint32_t pusharrays32(int32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end); typedef uint8_t (*pack_array_elem_fn)(void* elem, uint8_t **ppWritePackedMsg, uint8_t *end); diff --git a/nfapi/open-nFAPI/nfapi/src/nfapi.c b/nfapi/open-nFAPI/nfapi/src/nfapi.c index 37bb648e2b..2783781e2c 100644 --- a/nfapi/open-nFAPI/nfapi/src/nfapi.c +++ b/nfapi/open-nFAPI/nfapi/src/nfapi.c @@ -363,7 +363,7 @@ uint32_t pullarrays32(uint8_t **in, int32_t out[], uint32_t max_len, uint32_t le return 0; } } -uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint16_t len, uint8_t **out, uint8_t *end) { +uint32_t pusharray32(uint32_t in[], uint32_t max_len, uint32_t len, uint8_t **out, uint8_t *end) { if(len == 0) return 1; diff --git a/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c b/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c index b0ff94e684..15ac90aae2 100644 --- a/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c +++ b/nfapi/open-nFAPI/nfapi/src/nfapi_p7.c @@ -3303,6 +3303,7 @@ static uint8_t pack_nr_uci_indication(void *msg, uint8_t **ppWritePackedMsg, uin { if (!pack_nr_uci_indication_body(&pNfapiMsg->uci_list[i], ppWritePackedMsg, end)) return 0; + } return 1; diff --git a/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c b/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c index 80eb274812..8bbf569814 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c +++ b/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c @@ -429,7 +429,7 @@ void nr_processULSegment(void* arg) { if (check_crc((uint8_t*)llrProcBuf,length_dec,ulsch_harq->F,crc_type)) { #ifdef PRINT_CRC_CHECK - LOG_I(PHY, "Segment %d CRC OK\n",r); + LOG_I(PHY, "Segment %d CRC OK, iterations %d/%d\n",r,no_iteration_ldpc,max_ldpc_iterations); #endif rdata->decodeIterations = no_iteration_ldpc; if (rdata->decodeIterations > p_decoderParms->numMaxIter) rdata->decodeIterations--; @@ -522,7 +522,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB, A = (harq_process->TBS)<<3; - LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d\n",harq_pid,A,G, mcs, n_layers, nb_rb, Qm, n_layers); + LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d, Coderate %d\n",harq_pid,A,G, mcs, n_layers, nb_rb, Qm, n_layers, R); if (R<1024) Coderate = (float) R /(float) 1024; diff --git a/openair1/SCHED_NR/fapi_nr_l1.c b/openair1/SCHED_NR/fapi_nr_l1.c index accff2fba4..782c707857 100644 --- a/openair1/SCHED_NR/fapi_nr_l1.c +++ b/openair1/SCHED_NR/fapi_nr_l1.c @@ -159,11 +159,11 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ res = pullTpool(gNB->resp_L1_tx, gNB->threadPool); processingData_L1tx_t *msgTx = (processingData_L1tx_t *)NotifiedFifoData(res); if (DL_req != NULL && TX_req!=NULL && (number_dl_pdu > 0 || number_ul_dci_pdu > 0 || number_ul_tti_pdu > 0)) - LOG_D(NR_PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d/%d DL_req:SFN/SLO:%04d/%d:dl_pdu:%d tx_req:SFN/SLOT:%04d/%d:pdus:%d;ul_dci %d ul_tti %d\n", - frame,slot, - DL_req->SFN,DL_req->Slot,number_dl_pdu, - TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs, - number_ul_dci_pdu,number_ul_tti_pdu); + LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d/%d DL_req:SFN/SLO:%04d/%d:dl_pdu:%d tx_req:SFN/SLOT:%04d/%d:pdus:%d;ul_dci %d ul_tti %d\n", + frame,slot, + DL_req->SFN,DL_req->Slot,number_dl_pdu, + TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs, + number_ul_dci_pdu,number_ul_tti_pdu); int pdcch_received=0; msgTx->num_pdsch_slot=0; diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c index c402884ff9..c2ae84963b 100644 --- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c +++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c @@ -91,7 +91,7 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response memcpy(rx_ind->pdu_list[j].pdu, tx_req_body->pdu, tx_req_body->pdu_length * sizeof(*rx_ind->pdu_list[j].pdu)); rx_ind->pdu_list[j].rnti = pusch_config_pdu->rnti; rx_ind->pdu_list[j].timing_advance = scheduled_response->tx_request->tx_config.timing_advance; - rx_ind->pdu_list[j].ul_cqi = 255; // scheduled_response->tx_request->tx_config.ul_cqi; + rx_ind->pdu_list[j].ul_cqi = scheduled_response->tx_request->tx_config.ul_cqi; char buffer[1024]; hexdump(rx_ind->pdu_list[j].pdu, rx_ind->pdu_list[j].pdu_length, buffer, sizeof(buffer)); LOG_D(NR_MAC, "Hexdump of pdu %s before queuing rx_ind\n", diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h index 5b4ebe2397..f81e15d5fd 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h @@ -39,6 +39,8 @@ extern const uint8_t nr_slots_per_frame[5]; +extern dci_pdu_rel15_t *def_dci_pdu_rel15; + /* extern const uint32_t BSR_TABLE[BSR_TABLE_SIZE]; extern const uint32_t Extended_BSR_TABLE[BSR_TABLE_SIZE]; extern const uint8_t cqi2fmt0_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE]; diff --git a/openair2/LAYER2/NR_MAC_UE/mac_extern.h b/openair2/LAYER2/NR_MAC_UE/mac_extern.h index 7959b07694..7fd63666f0 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_extern.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_extern.h @@ -66,6 +66,8 @@ extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10]; extern const uint16_t table_7_2_1[16]; +extern dci_pdu_rel15_t *def_dci_pdu_rel15; + extern void mac_rlc_data_ind(const module_id_t module_idP, const rnti_t rntiP, const eNB_index_t eNB_index, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 86524afe29..5df7e3d707 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1315,7 +1315,7 @@ int nr_acknack_scheduling(int mod_id, while (i < 8) { LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot); - if (pdsch_to_harq_feedback[i] == (pucch->ul_slot - slot) % n_slots_frame) { + if (pdsch_to_harq_feedback[i] == pucch->ul_slot - slot) { ind_found = i; break; } From fa810fab70329524ecd791d073cde6c84c12ad4a Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 28 Oct 2021 08:58:36 -0700 Subject: [PATCH 088/102] Accounting for wrap in slot comparison in gNB --- executables/nr-ue.c | 5 ++++- openair2/LAYER2/NR_MAC_UE/mac_defs.h | 1 - openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 4 ++-- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index cca7c4d9cd..d409ec0d4a 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -458,7 +458,10 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) mac->dl_info.dci_ind = NULL; mac->dl_info.rx_ind = NULL; - nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment); + if (is_nr_DL_slot(mac->scc->tdd_UL_DL_ConfigurationCommon, ul_info.slot_rx)) + { + nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment); + } if (pthread_mutex_unlock(&mac->mutex_dl_info)) abort(); diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index 8f3c1526e5..ce1f5fe1af 100755 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -434,7 +434,6 @@ typedef struct { // Defined for abstracted mode nr_downlink_indication_t dl_info; NR_UE_HARQ_STATUS_t dl_harq_info[16]; - bool expected_dci; bool index_has_dci[16]; int active_harq_sfn_slot; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 5df7e3d707..932a49418e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1268,7 +1268,7 @@ int nr_acknack_scheduling(int mod_id, // Find the right timing_indicator value. int i = 0; while (i < 8) { - if (pdsch_to_harq_feedback[i] == pucch->ul_slot - slot) + if (pdsch_to_harq_feedback[i] == (pucch->ul_slot - slot) % n_slots_frame) break; ++i; } @@ -1315,7 +1315,7 @@ int nr_acknack_scheduling(int mod_id, while (i < 8) { LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot); - if (pdsch_to_harq_feedback[i] == pucch->ul_slot - slot) { + if (pdsch_to_harq_feedback[i] == (pucch->ul_slot - slot) % n_slots_frame) { ind_found = i; break; } From cfb49c17d2974aff98119059cdbcc09998537469 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 28 Oct 2021 10:32:28 -0700 Subject: [PATCH 089/102] Added a seprate queue for chan_params --- executables/nr-ue.c | 33 +++++++++++++-------- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 3 +- openair2/RRC/NR_UE/rrc_UE.c | 1 + openair2/RRC/NR_UE/rrc_proto.h | 1 + 4 files changed, 25 insertions(+), 13 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index d409ec0d4a..889fa55058 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -394,6 +394,7 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) NR_UL_TIME_ALIGNMENT_t ul_time_alignment; memset(&ul_time_alignment, 0, sizeof(ul_time_alignment)); int last_sfn_slot = -1; + uint16_t sfn_slot = 0; while (!oai_exit) { @@ -402,23 +403,29 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) LOG_E(NR_MAC, "sem_wait() error\n"); abort(); } - - uint16_t *sfn_slot = get_queue(&nr_sfn_slot_queue); - if (sfn_slot == NULL) + uint16_t *slot_ind = get_queue(&nr_sfn_slot_queue); + nr_phy_channel_params_t *ch_info = get_queue(&nr_chan_param_queue); + if (!slot_ind && !ch_info) { - LOG_D(MAC, "get_queue(&nr_sfn_slot_queue) == NULL!\n"); - continue; + LOG_D(MAC, "get nr_sfn_slot_queue and nr_chan_param_queue == NULL!\n"); + continue; + } + if (slot_ind) { + sfn_slot = *slot_ind; + } + else if (ch_info) { + sfn_slot = ch_info->sfn_slot; } - frame_t frame = NFAPI_SFNSLOT2SFN(*sfn_slot); - int slot = NFAPI_SFNSLOT2SLOT(*sfn_slot); - if (*sfn_slot == last_sfn_slot) + frame_t frame = NFAPI_SFNSLOT2SFN(sfn_slot); + int slot = NFAPI_SFNSLOT2SLOT(sfn_slot); + if (sfn_slot == last_sfn_slot) { LOG_D(NR_MAC, "repeated sfn_sf = %d.%d\n", frame, slot); continue; } - last_sfn_slot = *sfn_slot; + last_sfn_slot = sfn_slot; LOG_D(NR_MAC, "The received sfn/slot [%d %d] from proxy\n", frame, slot); @@ -471,9 +478,11 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) nr_ue_ul_indication(&ul_info); check_nr_prach(mac, &ul_info, &prach_resources); } - process_queued_nr_nfapi_msgs(mac, *sfn_slot); - free(sfn_slot); - sfn_slot = NULL; + process_queued_nr_nfapi_msgs(mac, sfn_slot); + free(slot_ind); + slot_ind = NULL; + free(ch_info); + ch_info = NULL; } return NULL; } diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index 681c72a1ae..bd452b6513 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -55,6 +55,7 @@ static int g_harq_pid; sem_t sfn_slot_semaphore; queue_t nr_sfn_slot_queue; +queue_t nr_chan_param_queue; queue_t nr_dl_tti_req_queue; queue_t nr_tx_req_queue; queue_t nr_ul_dci_req_queue; @@ -839,7 +840,7 @@ void *nrue_standalone_pnf_task(void *context) LOG_I(NR_PHY, "Received_SINR = %f, sfn:slot %d:%d\n", ch_info->sinr, NFAPI_SFNSLOT2SFN(ch_info->sfn_slot), NFAPI_SFNSLOT2SLOT(ch_info->sfn_slot)); - if (!put_queue(&nr_sfn_slot_queue, ch_info)) + if (!put_queue(&nr_chan_param_queue, ch_info)) { LOG_E(NR_PHY, "put_queue failed for sfn slot.\n"); } diff --git a/openair2/RRC/NR_UE/rrc_UE.c b/openair2/RRC/NR_UE/rrc_UE.c index 1636ee5b24..6a45794e16 100644 --- a/openair2/RRC/NR_UE/rrc_UE.c +++ b/openair2/RRC/NR_UE/rrc_UE.c @@ -2774,6 +2774,7 @@ static void start_oai_nrue_threads() init_queue(&nr_crc_ind_queue); init_queue(&nr_uci_ind_queue); init_queue(&nr_sfn_slot_queue); + init_queue(&nr_chan_param_queue); init_queue(&nr_dl_tti_req_queue); init_queue(&nr_tx_req_queue); init_queue(&nr_ul_dci_req_queue); diff --git a/openair2/RRC/NR_UE/rrc_proto.h b/openair2/RRC/NR_UE/rrc_proto.h index 6b3e81a3a9..3c074b04ef 100644 --- a/openair2/RRC/NR_UE/rrc_proto.h +++ b/openair2/RRC/NR_UE/rrc_proto.h @@ -46,6 +46,7 @@ extern queue_t nr_rx_ind_queue; extern queue_t nr_crc_ind_queue; extern queue_t nr_uci_ind_queue; extern queue_t nr_sfn_slot_queue; +extern queue_t nr_chan_param_queue; extern queue_t nr_dl_tti_req_queue; extern queue_t nr_tx_req_queue; extern queue_t nr_ul_dci_req_queue; From 30075501502b121a213dffa184fe81eb5e4e26dc Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 28 Oct 2021 11:14:47 -0700 Subject: [PATCH 090/102] Updating DCI configuration to avoid seg fault --- openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c | 8 +++----- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 10 ---------- 2 files changed, 3 insertions(+), 15 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c index c3aaf87844..a1056a2f71 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c @@ -259,6 +259,9 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl //NR_ServingCellConfig_t *scd = mac->scg->spCellConfig->spCellConfigDedicated; NR_BWP_DownlinkDedicated_t *bwpd = (bwp_id>0) ? mac->DLbwp[bwp_id-1]->bwp_Dedicated : mac->cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP; NR_BWP_DownlinkCommon_t *bwp_Common = (bwp_id>0) ? mac->DLbwp[bwp_id-1]->bwp_Common : &mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP; + fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; + NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon; + struct NR_PhysicalCellGroupConfig *phy_cgc = (mac->cg) ? mac->cg->physicalCellGroupConfig : NULL; LOG_D(NR_MAC, "[DCI_CONFIG] ra_rnti %p (%x) crnti %p (%x) t_crnti %p (%x)\n", &ra->ra_rnti, ra->ra_rnti, &mac->crnti, mac->crnti, &ra->t_crnti, ra->t_crnti); @@ -267,9 +270,6 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl for (ss_id = 0; ss_id < FAPI_NR_MAX_SS_PER_CORESET && mac->SSpace[bwp_id][coreset_id - 1][ss_id] != NULL; ss_id++){ LOG_D(NR_MAC, "[DCI_CONFIG] ss_id %d\n",ss_id); NR_SearchSpace_t *ss = mac->SSpace[bwp_id][coreset_id - 1][ss_id]; - fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; - NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon; - struct NR_PhysicalCellGroupConfig *phy_cgc = mac->cg->physicalCellGroupConfig; switch (ss->searchSpaceType->present){ case NR_SearchSpace__searchSpaceType_PR_common: // this is for CSSs, we use BWP common and pdcch_ConfigCommon @@ -414,8 +414,6 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl } // Search space 0, CORESET ID 0 - NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon; - if (pdcch_ConfigCommon && pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 && !get_softmodem_params()->nsa) { diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index bd452b6513..ed33aa58f9 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -617,16 +617,6 @@ void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, { nr_ue_ul_indication(&ul_info); } - - - #if 0 // TODO: Heap use after free caught by sanitizer - free(dl_info.dci_ind); - dl_info.dci_ind = NULL; - - free(dl_info.rx_ind); - dl_info.rx_ind = NULL; - #endif - } void save_nr_measurement_info(nfapi_nr_dl_tti_request_t *dl_tti_request) From 26ddb9eabe3a3168c1b917b3056211eed7ad74ee Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 28 Oct 2021 11:58:01 -0700 Subject: [PATCH 091/102] Only do LTE channel modelling in LTE mode, not NSA --- openair2/PHY_INTERFACE/phy_stub_UE.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/openair2/PHY_INTERFACE/phy_stub_UE.c b/openair2/PHY_INTERFACE/phy_stub_UE.c index 9876f4a4a7..b70745464e 100644 --- a/openair2/PHY_INTERFACE/phy_stub_UE.c +++ b/openair2/PHY_INTERFACE/phy_stub_UE.c @@ -37,6 +37,7 @@ #include "openair1/PHY/defs_gNB.h" #include "nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h" #include "openair1/PHY/LTE_TRANSPORT/transport_common.h" +#include "softmodem-common.h" extern int oai_nfapi_rach_ind(nfapi_rach_indication_t *rach_ind); void configure_nfapi_pnf(char *vnf_ip_addr, @@ -2061,7 +2062,7 @@ static inline bool is_channel_modeling(void) { /* TODO: For now we enable channel modeling based on the node_number. Replace with a command line option to enable/disable channel modeling. */ - return node_number == 0; + return node_number == 0 && !get_softmodem_params()->nsa; } static bool should_drop_transport_block(int sf, uint16_t rnti) From 733279689f5d119f5cb7dacd9cc0da9440bc799b Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Thu, 28 Oct 2021 15:02:14 -0700 Subject: [PATCH 092/102] Fixing white space and added a TODO comment --- executables/nr-ue.c | 4 ++-- openair2/PHY_INTERFACE/phy_stub_UE.c | 6 +++++- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 889fa55058..fc69cf2722 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -407,8 +407,8 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg) nr_phy_channel_params_t *ch_info = get_queue(&nr_chan_param_queue); if (!slot_ind && !ch_info) { - LOG_D(MAC, "get nr_sfn_slot_queue and nr_chan_param_queue == NULL!\n"); - continue; + LOG_D(MAC, "get nr_sfn_slot_queue and nr_chan_param_queue == NULL!\n"); + continue; } if (slot_ind) { sfn_slot = *slot_ind; diff --git a/openair2/PHY_INTERFACE/phy_stub_UE.c b/openair2/PHY_INTERFACE/phy_stub_UE.c index b70745464e..1598e3d620 100644 --- a/openair2/PHY_INTERFACE/phy_stub_UE.c +++ b/openair2/PHY_INTERFACE/phy_stub_UE.c @@ -2061,7 +2061,11 @@ static float get_bler_val(uint8_t mcs, int sinr) static inline bool is_channel_modeling(void) { /* TODO: For now we enable channel modeling based on the node_number. - Replace with a command line option to enable/disable channel modeling. */ + Replace with a command line option to enable/disable channel modeling. + The LTE UE will crash when channel modeling is conducted for NSA + mode. It does not crash for LTE mode. We have not implemented channel + modeling for NSA mode yet. For now, we ensure only do do chanel modeling + in LTE mode. */ return node_number == 0 && !get_softmodem_params()->nsa; } From 03599d3d75fdb0c4f8c6026d68f159b2d52d96fd Mon Sep 17 00:00:00 2001 From: hardy Date: Thu, 28 Oct 2021 11:09:52 +0200 Subject: [PATCH 093/102] change eNB ID to prevent TAU issue --- ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf index 7a9df04996..6c8d5ba6f0 100644 --- a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf +++ b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf @@ -6,7 +6,7 @@ eNBs = ( { ////////// Identification parameters: - eNB_ID = 0xe05; + eNB_ID = 0xe04; cell_type = "CELL_MACRO_ENB"; From 0238f49baf733e10c27f029c2a722115bf345cfb Mon Sep 17 00:00:00 2001 From: Raphael Defosseux Date: Fri, 29 Oct 2021 14:52:47 +0200 Subject: [PATCH 094/102] feat(ci): adding a MAGMA-MME-based EPC deployment Signed-off-by: Raphael Defosseux --- .../magma_nsa_20897/docker-compose.yml | 198 ++++++++++++++++++ .../yaml_files/magma_nsa_20897/entrypoint.sh | 36 ++++ .../yaml_files/magma_nsa_20897/mme.conf | 136 ++++++++++++ .../magma_nsa_20897/mme_fd.sprint.conf | 169 +++++++++++++++ .../magma_nsa_20897/redis_extern.conf | 33 +++ 5 files changed, 572 insertions(+) create mode 100644 ci-scripts/yaml_files/magma_nsa_20897/docker-compose.yml create mode 100755 ci-scripts/yaml_files/magma_nsa_20897/entrypoint.sh create mode 100644 ci-scripts/yaml_files/magma_nsa_20897/mme.conf create mode 100644 ci-scripts/yaml_files/magma_nsa_20897/mme_fd.sprint.conf create mode 100644 ci-scripts/yaml_files/magma_nsa_20897/redis_extern.conf diff --git a/ci-scripts/yaml_files/magma_nsa_20897/docker-compose.yml b/ci-scripts/yaml_files/magma_nsa_20897/docker-compose.yml new file mode 100644 index 0000000000..df14e900e7 --- /dev/null +++ b/ci-scripts/yaml_files/magma_nsa_20897/docker-compose.yml @@ -0,0 +1,198 @@ +version: '3.8' + +services: + cassandra: + image: cassandra:2.1 + container_name: prod-cassandra + networks: + private_net: + ipv4_address: 192.168.68.2 + environment: + CASSANDRA_CLUSTER_NAME: "OAI HSS Cluster" + CASSANDRA_ENDPOINT_SNITCH: GossipingPropertyFileSnitch + healthcheck: + test: /bin/bash -c "nodetool status" + interval: 10s + timeout: 5s + retries: 5 + + db_init: + image: cassandra:2.1 + container_name: prod-db-init + depends_on: [cassandra] + deploy: + restart_policy: + condition: on-failure + max_attempts: 10 + networks: + private_net: + ipv4_address: 192.168.68.4 + volumes: + - ./oai_db.cql:/home/oai_db.cql + entrypoint: /bin/bash -c "cqlsh --file /home/oai_db.cql 192.168.68.2 && echo 'OK'" + + oai_hss: + image: oai-hss:production + container_name: prod-oai-hss + privileged: true + depends_on: [cassandra] + networks: + private_net: + ipv4_address: 192.168.68.3 + public_net: + ipv4_address: 192.168.61.194 + environment: + TZ: Europe/Paris + REALM: openairinterface.org + HSS_FQDN: hss.openairinterface.org + PREFIX: /openair-hss/etc + cassandra_Server_IP: 192.168.68.2 + OP_KEY: 1006020f0a478bf6b699f15c062e42b3 + LTE_K: FEC86BA6EB707ED08905757B1BB44B8F + APN1: oai.ipv4 + APN2: oai2.ipv4 + FIRST_IMSI: 208970100001127 + NB_USERS: 10 + healthcheck: + test: /bin/bash -c "pgrep oai_hss" + interval: 10s + timeout: 5s + retries: 5 + + redis: + image: redis:6.0.5 + container_name: prod-redis + privileged: true + networks: + public_net: + ipv4_address: 192.168.61.198 + volumes: + - ./redis_extern.conf:/usr/local/etc/redis/redis.conf + entrypoint: /bin/bash -c "redis-server /usr/local/etc/redis/redis.conf" + healthcheck: + test: /bin/bash -c "redis-cli -h 192.168.61.198 -p 6380 ping" + interval: 10s + timeout: 5s + retries: 5 + + magma_mme: + image: magma-mme:production + container_name: prod-magma-mme + hostname: mme + privileged: true + depends_on: [oai_hss, redis] + networks: + public_net: + ipv4_address: 192.168.61.195 + environment: + TZ: Europe/Paris + REALM: openairinterface.org + PREFIX: /openair-mme/etc + HSS_HOSTNAME: hss + HSS_FQDN: hss.openairinterface.org + HSS_REALM: openairinterface.org + MME_FQDN: mme.openairinterface.org + FEATURES: mme_oai + volumes: + - ./mme_fd.sprint.conf:/magma-mme/etc/mme_fd.conf.tmplt + - ./mme.conf:/magma-mme/etc/mme.conf + - ./entrypoint.sh:/magma-mme/bin/entrypoint.sh + entrypoint: /bin/bash -c "/magma-mme/bin/entrypoint.sh" + healthcheck: + test: /bin/bash -c "pgrep oai_mme" + interval: 10s + timeout: 5s + retries: 5 + + oai_spgwc: + image: oai-spgwc:production + privileged: true + depends_on: [magma_mme] + container_name: prod-oai-spgwc + networks: + public_net: + ipv4_address: 192.168.61.196 + environment: + TZ: Europe/Paris + SGW_INTERFACE_NAME_FOR_S11: eth0 + PGW_INTERFACE_NAME_FOR_SX: eth0 + DEFAULT_DNS_IPV4_ADDRESS: 192.168.18.129 + DEFAULT_DNS_SEC_IPV4_ADDRESS: 8.8.4.4 + PUSH_PROTOCOL_OPTION: 'true' + APN_NI_1: oai.ipv4 + APN_NI_2: oai2.ipv4 + DEFAULT_APN_NI_1: oai.ipv4 + UE_IP_ADDRESS_POOL_1: '12.1.1.2 - 12.1.1.254' + UE_IP_ADDRESS_POOL_2: '12.0.0.2 - 12.0.0.254' + MCC: '208' + MNC: '97' + MNC03: '097' + TAC: 1 + GW_ID: 1 + REALM: openairinterface.org + UE_MTU_IPV4: 1500 + healthcheck: + test: /bin/bash -c "pgrep oai_spgwc" + interval: 10s + timeout: 5s + retries: 5 + + oai_spgwu: + image: oai-spgwu-tiny:production + privileged: true + container_name: prod-oai-spgwu-tiny + depends_on: [oai_spgwc] + networks: + public_net: + ipv4_address: 192.168.61.197 + environment: + TZ: Europe/Paris + PID_DIRECTORY: /var/run + INSTANCE: 1 + SGW_INTERFACE_NAME_FOR_S1U_S12_S4_UP: eth0 + PGW_INTERFACE_NAME_FOR_SGI: eth0 + SGW_INTERFACE_NAME_FOR_SX: eth0 + SPGWC0_IP_ADDRESS: 192.168.61.196 + NETWORK_UE_IP: '12.1.1.0/24' + NETWORK_UE_NAT_OPTION: 'yes' + MCC: '208' + MNC: '97' + MNC03: '097' + TAC: 1 + GW_ID: 1 + REALM: openairinterface.org + healthcheck: + test: /bin/bash -c "pgrep oai_spgwu" + interval: 10s + timeout: 5s + retries: 5 + + trf_gen: + image: trf-gen:production + privileged: true + container_name: prod-trf-gen + networks: + public_net: + ipv4_address: 192.168.61.200 + entrypoint: /bin/bash -c "ip route add 12.1.1.0/24 via 192.168.61.197 dev eth0; sleep infinity" + healthcheck: + test: /bin/bash -c "ip route | grep '12.1.1.0'" + interval: 10s + timeout: 5s + retries: 5 + +networks: + private_net: + name: prod-oai-private-net + ipam: + config: + - subnet: 192.168.68.0/26 + driver_opts: + com.docker.network.bridge.name: "oai-priv-net" + public_net: + name: prod-oai-public-net + ipam: + config: + - subnet: 192.168.61.192/26 + driver_opts: + com.docker.network.bridge.name: "oai-pub-net" diff --git a/ci-scripts/yaml_files/magma_nsa_20897/entrypoint.sh b/ci-scripts/yaml_files/magma_nsa_20897/entrypoint.sh new file mode 100755 index 0000000000..859ff7d98f --- /dev/null +++ b/ci-scripts/yaml_files/magma_nsa_20897/entrypoint.sh @@ -0,0 +1,36 @@ +#!/bin/bash + +INSTANCE=1 +PREFIX='/magma-mme/etc' +MY_REALM='openairinterface.org' + +declare -A MME_CONF + +pushd $PREFIX +MME_CONF[@MME_S6A_IP_ADDR@]="192.168.61.195" +MME_CONF[@INSTANCE@]=$INSTANCE +MME_CONF[@PREFIX@]=$PREFIX +MME_CONF[@REALM@]=$MY_REALM +MME_CONF[@MME_FQDN@]="mme.${MME_CONF[@REALM@]}" +MME_CONF[@HSS_HOSTNAME@]='hss' +MME_CONF[@HSS_FQDN@]="${MME_CONF[@HSS_HOSTNAME@]}.${MME_CONF[@REALM@]}" +MME_CONF[@HSS_IP_ADDR@]="192.168.61.194" + +cp mme_fd.conf.tmplt $PREFIX/mme_fd.conf + +for K in "${!MME_CONF[@]}"; do + egrep -lRZ "$K" $PREFIX/mme_fd.conf | xargs -0 -l sed -i -e "s|$K|${MME_CONF[$K]}|g" + ret=$?;[[ ret -ne 0 ]] && echo "Tried to replace $K with ${MME_CONF[$K]}" +done + +sed -i -e "s@etc/freeDiameter@etc@" /magma-mme/etc/mme_fd.conf +sed -i -e "s@bind: 127.0.0.1@bind: 192.168.61.198@" /etc/magma/redis.yml +# Generate freeDiameter certificate +popd +cd /magma-mme/scripts +./check_mme_s6a_certificate $PREFIX mme.${MME_CONF[@REALM@]} + +cd /magma-mme +nohup /magma-mme/bin/sctpd > /var/log/sctpd.log 2>&1 & +sleep 5 +/magma-mme/bin/oai_mme -c /magma-mme/etc/mme.conf diff --git a/ci-scripts/yaml_files/magma_nsa_20897/mme.conf b/ci-scripts/yaml_files/magma_nsa_20897/mme.conf new file mode 100644 index 0000000000..e41fbe6304 --- /dev/null +++ b/ci-scripts/yaml_files/magma_nsa_20897/mme.conf @@ -0,0 +1,136 @@ +# generated by generate_mme_config_script.py +MME : +{ + REALM = "openairinterface.org" + PID_DIRECTORY = "/var/run"; + MAXENB = 8; # power of 2 + MAXUE = 16; # power of 2 + RELATIVE_CAPACITY = 10; + + EMERGENCY_ATTACH_SUPPORTED = "no"; + UNAUTHENTICATED_IMSI_SUPPORTED = "no"; + + # EPS network feature support + EPS_NETWORK_FEATURE_SUPPORT_IMS_VOICE_OVER_PS_SESSION_IN_S1 = "no"; # DO NOT CHANGE + EPS_NETWORK_FEATURE_SUPPORT_EMERGENCY_BEARER_SERVICES_IN_S1_MODE = "no"; # DO NOT CHANGE + EPS_NETWORK_FEATURE_SUPPORT_LOCATION_SERVICES_VIA_EPC = "no"; # DO NOT CHANGE + EPS_NETWORK_FEATURE_SUPPORT_EXTENDED_SERVICE_REQUEST = "no"; # DO NOT CHANGE + + # Display statistics about whole system (expressed in seconds) + MME_STATISTIC_TIMER = 10; + IP_CAPABILITY = "IPV4"; # UE PDN_TYPE + USE_STATELESS = ""; + + INTERTASK_INTERFACE : + { + # max queue size per task + ITTI_QUEUE_SIZE = 2000000; + }; + + S6A : + { + S6A_CONF = "/magma-mme/etc/mme_fd.conf"; # YOUR MME freeDiameter config file path + HSS_HOSTNAME = "hss.openairinterface.org"; + HSS_REALM = "openairinterface.org"; + }; + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 8; + SCTP_OUTSTREAMS = 8; + }; + + # ------- S1AP definitions + S1AP : + { + # outcome drop timer value (seconds) + S1AP_OUTCOME_TIMER = 10; + }; + + # ------- MME served GUMMEIs + GUMMEI_LIST = ( + { MCC="208" ; MNC="97"; MME_GID="32768" ; MME_CODE="3"; } + ); + + # ------- MME served TAIs + TAI_LIST = ( + {MCC="208" ; MNC="97"; TAC = "1"; }, + {MCC="208" ; MNC="97"; TAC = "2"; }, + {MCC="208" ; MNC="97"; TAC = "3"; } + ); + + TAC_LIST = ( + {MCC="208" ; MNC="97"; TAC = "1"; } + ); + + CSFB : + { + NON_EPS_SERVICE_CONTROL = "OFF"; + CSFB_MCC = "208"; + CSFB_MNC = "97"; + LAC = "1"; + }; + NAS : + { + ORDERED_SUPPORTED_INTEGRITY_ALGORITHM_LIST = [ "EIA2" , "EIA1" , "EIA0" ]; + ORDERED_SUPPORTED_CIPHERING_ALGORITHM_LIST = [ "EEA0" , "EEA1" , "EEA2" ]; + T3402 = 1 # in minutes (default is 12 minutes) + T3412 = 54 # in minutes (default is 54 minutes, network dependent) + T3422 = 6 # in seconds (default is 6s) + T3450 = 6 # in seconds (default is 6s) + T3460 = 6 # in seconds (default is 6s) + T3470 = 6 # in seconds (default is 6s) + T3485 = 8 # UNUSED in seconds (default is 8s) + T3486 = 8 # UNUSED in seconds (default is 8s) + T3489 = 4 # UNUSED in seconds (default is 4s) + T3495 = 8 # UNUSED in seconds (default is 8s) + }; + + SGS : + { + TS6_1 = 10 # in seconds (default is 10s) + TS8 = 4 # in seconds (default is 4s) + TS9 = 2 # in seconds (default is 4s) + TS10 = 4 # in seconds (default is 4s) + TS13 = 4 # in seconds (default is 4s) + }; + + NETWORK_INTERFACES : + { + MME_INTERFACE_NAME_FOR_S1_MME = "eth0"; + MME_IPV4_ADDRESS_FOR_S1_MME = "192.168.61.195/24"; + MME_INTERFACE_NAME_FOR_S11_MME = "eth0"; + MME_IPV4_ADDRESS_FOR_S11_MME = "192.168.61.195/24"; + MME_PORT_FOR_S11_MME = 2123; + }; + + LOGGING : + { + OUTPUT = "CONSOLE"; + THREAD_SAFE = "no"; + COLOR = "no"; + + SCTP_LOG_LEVEL = "ERROR"; + GTPV1U_LOG_LEVEL = "INFO"; + SPGW_APP_LOG_LEVEL = "INFO"; + UDP_LOG_LEVEL = "INFO"; + S1AP_LOG_LEVEL = "DEBUG"; + NAS_LOG_LEVEL = "INFO"; + MME_APP_LOG_LEVEL = "DEBUG"; + GTPV2C_LOG_LEVEL = "INFO"; + S11_LOG_LEVEL = "DEBUG"; + S6A_LOG_LEVEL = "DEBUG"; + UTIL_LOG_LEVEL = "INFO"; + MSC_LOG_LEVEL = "ERROR"; + ITTI_LOG_LEVEL = "ERROR"; + MME_SCENARIO_PLAYER_LOG_LEVEL = "ERROR"; + ASN1_VERBOSITY = "INFO"; + }; + + S-GW : + { + SGW_IPV4_ADDRESS_FOR_S11 = "192.168.61.196"; + }; +}; diff --git a/ci-scripts/yaml_files/magma_nsa_20897/mme_fd.sprint.conf b/ci-scripts/yaml_files/magma_nsa_20897/mme_fd.sprint.conf new file mode 100644 index 0000000000..6f87ed8c2b --- /dev/null +++ b/ci-scripts/yaml_files/magma_nsa_20897/mme_fd.sprint.conf @@ -0,0 +1,169 @@ +# -------- Local --------- + +# Uncomment if the framework cannot resolv it. +Identity = "@MME_FQDN@"; +Realm = "@REALM@"; + +# TLS configuration (see previous section) +TLS_Cred = "@PREFIX@/freeDiameter/mme.cert.pem", + "@PREFIX@/freeDiameter/mme.key.pem"; +TLS_CA = "@PREFIX@/freeDiameter/mme.cacert.pem"; + +# Disable use of TCP protocol (only listen and connect in SCTP) +# Default : TCP enabled +No_SCTP; + +# This option is ignored if freeDiameter is compiled with DISABLE_SCTP option. +# Prefer TCP instead of SCTP for establishing new connections. +# This setting may be overwritten per peer in peer configuration blocs. +# Default : SCTP is attempted first. +Prefer_TCP; + + +No_IPv6; + +# Overwrite the number of SCTP streams. This value should be kept low, +# especially if you are using TLS over SCTP, because it consumes a lot of +# resources in that case. See tickets 19 and 27 for some additional details on +# this. +# Limit the number of SCTP streams +SCTP_streams = 3; + + +# By default, freeDiameter acts as a Diameter Relay Agent by forwarding all +# messages it cannot handle locally. This parameter disables this behavior. +NoRelay; + +# Use RFC3588 method for TLS protection, where TLS is negociated after CER/CEA exchange is completed +# on the unsecure connection. The alternative is RFC6733 mechanism, where TLS protects also the +# CER/CEA exchange on a dedicated secure port. +# This parameter only affects outgoing connections. +# The setting can be also defined per-peer (see Peers configuration section). +# Default: use RFC6733 method with separate port for TLS. + +#TLS_old_method; + +AppServThreads = 4; + +# Specify the addresses on which to bind the listening server. This must be +# specified if the framework is unable to auto-detect these addresses, or if the +# auto-detected values are incorrect. Note that the list of addresses is sent +# in CER or CEA message, so one should pay attention to this parameter if some +# adresses should be kept hidden. +ListenOn = "@MME_S6A_IP_ADDR@"; + +Port = 3870; +SecPort = 5870; + +# -------- Extensions --------- + +# Uncomment (and create rtd.conf) to specify routing table for this peer. +#LoadExtension = "/usr/local/lib/freeDiameter/rt_default.fdx" : "rtd.conf"; + +#LoadExtension = "/usr/local/lib/freeDiameter/_sample.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/app_acct.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/app_diameap.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/app_radgw.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/app_redirect.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/app_sip.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dbg_interactive.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dbg_monitor.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dbg_msg_dumps.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dbg_msg_timings.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dbg_rt.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_3gpp2_avps.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_CreditControl.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_CxDx.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_Gx.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_NAS.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_Ro.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_Rx.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_S6mS6n.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_SGd.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_SLh.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_Sd.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_Sh.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_T4.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_T6aT6bT7.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_Tsp.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_dcca.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_dcca_3gpp.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_dcca_starent.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_draftload_avps.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_eap.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_etsi283034_avps.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_legacy_xml.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_mip6a.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_mip6i.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_nas_mipv6.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_nasreq.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc4004_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc4006bis_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc4072_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc4590_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc5447_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc5580_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc5777_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc5778_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc6734_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc6942_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc7155_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc7683_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_rfc7944_avps.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_sip.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29061_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29128_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29154_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29173_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29212_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29214_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29215_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29217_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29229_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29272_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29273_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29329_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29336_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29337_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29338_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29343_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29344_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29345_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29368_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts29468_avps.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_ts32299_avps.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/rt_busypeers.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/rt_default.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/rt_ereg.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/rt_ignore_dh.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/rt_load_balance.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/rt_randomize.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/rt_redirect.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/test_acct.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/test_app.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/test_hss.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/test_netemul.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/test_rt_any.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/test_sip.fdx"; +#LoadExtension = "/usr/local/lib/freeDiameter/dict_Rf.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_S6as6d.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_S6t.fdx"; +LoadExtension = "/usr/local/lib/freeDiameter/dict_S6c.fdx"; + + +# -------- Peers --------- + +# The framework will actively attempt to establish and maintain a connection +# with the peers listed here. +# For only accepting incoming connections, see the acl_wl.fx extension. + +# ConnectPeer +# Declare a remote peer to which this peer must maintain a connection. +# In addition, this allows specifying non-default parameters for this peer only +# (for example disable SCTP with this peer, or use RFC3588-flavour TLS). +# Note that by default, if a peer is not listed as a ConnectPeer entry, an +# incoming connection from this peer will be rejected. If you want to accept +# incoming connections from other peers, see the acl_wl.fdx? extension which +# allows exactly this. + +ConnectPeer= "@HSS_FQDN@" { ConnectTo = "@HSS_IP_ADDR@"; No_SCTP ; No_IPv6; Prefer_TCP; No_TLS; port = 3868;}; diff --git a/ci-scripts/yaml_files/magma_nsa_20897/redis_extern.conf b/ci-scripts/yaml_files/magma_nsa_20897/redis_extern.conf new file mode 100644 index 0000000000..565524080a --- /dev/null +++ b/ci-scripts/yaml_files/magma_nsa_20897/redis_extern.conf @@ -0,0 +1,33 @@ +# +# Copyright (c) 2016-present, Facebook, Inc. +# All rights reserved. +# +# This source code is licensed under the BSD-style license found in the +# LICENSE file in the root directory of this source tree. An additional grant +# of patent rights can be found in the PATENTS file in the same directory. + +# Jinja template for Redis configuration +# See the default config file for options and explanations: +# https://github.com/antirez/redis/blob/unstable/redis.conf + +# TODO: make sensible, production-aware config decisions + +bind 192.168.61.198 +port 6380 + +daemonize no +loglevel notice + +timeout 0 +databases 1 + +dbfilename redis_dump.rdb +dir /data + +# Save the DB on disk + +save 900 1 + +save 300 10 + +save 60 1000 From 96b60545141706d3e8bd86db0c73a2f4dfa07c9f Mon Sep 17 00:00:00 2001 From: hardy Date: Fri, 29 Oct 2021 15:01:23 +0200 Subject: [PATCH 095/102] add attach-detach testcase for NSA --- .../fr1_nsa_2x2_quectel_attach_detach.xml | 145 ++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml new file mode 100644 index 0000000000..371164fe67 --- /dev/null +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml @@ -0,0 +1,145 @@ + + + TEST-NSA-FR1-TM2 + NSA 2x2 Attach-Detach with QUECTEL + tasks + 1 + + 031000 + 041000 + 000002 + 010000 + 000001 + 050000 + 000001 + 010004 + 000001 + 010003 + 000001 + 050000 + 000001 + 010004 + 000001 + 010003 + 000001 + 050000 + 000001 + 010002 + 080001 + 080000 + + + + + Initialize_UE + Initialize Quectel + nrmodule2_quectel + yes + + + + + Terminate_UE + Terminate Quectel + nrmodule2_quectel + + + + Attach_UE + Attach Quectel + nrmodule2_quectel + + + + Detach_UE + Detach Quectel + nrmodule2_quectel + + + + + Initialize_eNB + Initialize eNB + -O ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf --usrp-tx-thread-config 1 --thread-pool 0,2,4,6 + 0 + 0 + lte + yes + yes + 192.168.18.241 + + + + + Initialize_eNB + Initialize gNB + -O ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf -q --usrp-tx-thread-config 1 --thread-pool 0,2,4,6 + 1 + 1 + nr + yes + 192.168.18.240 + + + + IdleSleep + Sleep + 5 + + + + IdleSleep + Sleep + 20 + + + + + Ping + Ping: 20pings in 20sec + nrmodule2_quectel + -c 20 + 5 + + + + + + Terminate_eNB + Terminate eNB + 0 + 0 + lte + + + + Terminate_eNB + Terminate gNB + 1 + 1 + nr + + + + From a443a5b45e214f7fe6fcee05df936c34eed3b97a Mon Sep 17 00:00:00 2001 From: Raphael Defosseux Date: Fri, 29 Oct 2021 15:33:39 +0200 Subject: [PATCH 096/102] feat(ci): adding support to deploy a MAGMA-MME-based container-based EPC Signed-off-by: Raphael Defosseux --- ci-scripts/epc.py | 58 ++++++++++++++++++---- ci-scripts/xml_files/fr1_oai_cn_deploy.xml | 2 +- 2 files changed, 50 insertions(+), 10 deletions(-) diff --git a/ci-scripts/epc.py b/ci-scripts/epc.py index baae5644a1..e6728aeb53 100644 --- a/ci-scripts/epc.py +++ b/ci-scripts/epc.py @@ -66,6 +66,7 @@ class EPCManagement(): self.containerPrefix = 'prod' self.mmeConfFile = 'mme.conf' self.yamlPath = '' + self.isMagmaUsed = False #----------------------------------------------------------- @@ -489,6 +490,12 @@ class EPCManagement(): HTML.CreateHtmlTabFooter(False) sys.exit('docker-compose not installed on ' + self.IPAddress) + # Checking if it is a MAGMA deployment + self.isMagmaUsed = False + if os.path.isfile('./' + self.yamlPath + '/redis_extern.conf'): + self.isMagmaUsed = True + logging.debug('MAGMA MME is used!') + mySSH.command('if [ -d ' + self.SourceCodePath + '/scripts ]; then echo ' + self.Password + ' | sudo -S rm -Rf ' + self.SourceCodePath + '/scripts ; fi', '\$', 5) mySSH.command('if [ -d ' + self.SourceCodePath + '/logs ]; then echo ' + self.Password + ' | sudo -S rm -Rf ' + self.SourceCodePath + '/logs ; fi', '\$', 5) mySSH.command('mkdir -p ' + self.SourceCodePath + '/scripts ' + self.SourceCodePath + '/logs', '\$', 5) @@ -500,10 +507,15 @@ class EPCManagement(): # - docker-compose config | grep container_name mySSH.command('cd ' + self.SourceCodePath + '/scripts', '\$', 5) mySSH.copyout(self.IPAddress, self.UserName, self.Password, './' + self.yamlPath + '/docker-compose.yml', self.SourceCodePath + '/scripts') + if self.isMagmaUsed: + mySSH.copyout(self.IPAddress, self.UserName, self.Password, './' + self.yamlPath + '/entrypoint.sh', self.SourceCodePath + '/scripts') + mySSH.copyout(self.IPAddress, self.UserName, self.Password, './' + self.yamlPath + '/mme.conf', self.SourceCodePath + '/scripts') + mySSH.copyout(self.IPAddress, self.UserName, self.Password, './' + self.yamlPath + '/mme_fd.sprint.conf', self.SourceCodePath + '/scripts') + mySSH.copyout(self.IPAddress, self.UserName, self.Password, './' + self.yamlPath + '/redis_extern.conf', self.SourceCodePath + '/scripts') + mySSH.command('chmod a+x ' + self.SourceCodePath + '/scripts/entrypoint.sh', '\$', 5) mySSH.command('wget --quiet --tries=3 --retry-connrefused https://raw.githubusercontent.com/OPENAIRINTERFACE/openair-hss/develop/src/hss_rel14/db/oai_db.cql', '\$', 30) mySSH.command('docker-compose down', '\$', 60) mySSH.command('docker-compose up -d db_init', '\$', 60) - # databases take time... time.sleep(10) cnt = 0 @@ -525,8 +537,12 @@ class EPCManagement(): # deploying EPC cNFs mySSH.command('docker-compose up -d oai_spgwu', '\$', 60) - listOfContainers = 'prod-cassandra prod-oai-hss prod-oai-mme prod-oai-spgwc prod-oai-spgwu-tiny' - expectedHealthyContainers = 5 + if self.isMagmaUsed: + listOfContainers = 'prod-cassandra prod-oai-hss prod-magma-mme prod-oai-spgwc prod-oai-spgwu-tiny prod-redis' + expectedHealthyContainers = 6 + else: + listOfContainers = 'prod-cassandra prod-oai-hss prod-oai-mme prod-oai-spgwc prod-oai-spgwu-tiny' + expectedHealthyContainers = 5 # Checking for additional services mySSH.command('docker-compose config', '\$', 5) @@ -557,7 +573,10 @@ class EPCManagement(): logging.debug(' -- ' + str(startingNb) + ' still starting container(s)') if healthyNb == expectedHealthyContainers: mySSH.command('docker exec -d prod-oai-hss /bin/bash -c "nohup tshark -i any -f \'port 9042 or port 3868\' -w /tmp/hss_check_run.pcap 2>&1 > /dev/null"', '\$', 5) - mySSH.command('docker exec -d prod-oai-mme /bin/bash -c "nohup tshark -i any -f \'port 3868 or port 2123 or port 36412\' -w /tmp/mme_check_run.pcap 2>&1 > /dev/null"', '\$', 10) + if self.isMagmaUsed: + mySSH.command('docker exec -d prod-magma-mme /bin/bash -c "nohup tshark -i any -f \'port 3868 or port 2123 or port 36412\' -w /tmp/mme_check_run.pcap 2>&1 > /dev/null"', '\$', 10) + else: + mySSH.command('docker exec -d prod-oai-mme /bin/bash -c "nohup tshark -i any -f \'port 3868 or port 2123 or port 36412\' -w /tmp/mme_check_run.pcap 2>&1 > /dev/null"', '\$', 10) mySSH.command('docker exec -d prod-oai-spgwc /bin/bash -c "nohup tshark -i any -f \'port 2123 or port 8805\' -w /tmp/spgwc_check_run.pcap 2>&1 > /dev/null"', '\$', 10) # on SPGW-U, not capturing on SGI to avoid huge file mySSH.command('docker exec -d prod-oai-spgwu-tiny /bin/bash -c "nohup tshark -i any -f \'port 8805\' -w /tmp/spgwu_check_run.pcap 2>&1 > /dev/null"', '\$', 10) @@ -575,24 +594,45 @@ class EPCManagement(): mySSH = SSH.SSHConnection() mySSH.open(self.IPAddress, self.UserName, self.Password) + # Checking if it is a MAGMA deployment. + mySSH.command('cd ' + self.SourceCodePath + '/scripts', '\$', 5) + mySSH.command('docker-compose ps -a', '\$', 5) + self.isMagmaUsed = False + result = re.search('magma', mySSH.getBefore()) + if result is not None: + self.isMagmaUsed = True + logging.debug('MAGMA MME is used!') # Recovering logs and pcap files mySSH.command('cd ' + self.SourceCodePath + '/logs', '\$', 5) mySSH.command('docker exec -it prod-oai-hss /bin/bash -c "killall --signal SIGINT oai_hss tshark"', '\$', 5) - mySSH.command('docker exec -it prod-oai-mme /bin/bash -c "killall --signal SIGINT tshark"', '\$', 5) + if self.isMagmaUsed: + mySSH.command('docker exec -it prod-magma-mme /bin/bash -c "killall --signal SIGINT tshark"', '\$', 5) + else: + mySSH.command('docker exec -it prod-oai-mme /bin/bash -c "killall --signal SIGINT tshark"', '\$', 5) mySSH.command('docker exec -it prod-oai-spgwc /bin/bash -c "killall --signal SIGINT oai_spgwc tshark"', '\$', 5) mySSH.command('docker exec -it prod-oai-spgwu-tiny /bin/bash -c "killall --signal SIGINT tshark"', '\$', 5) mySSH.command('docker logs prod-oai-hss > hss_' + self.testCase_id + '.log', '\$', 5) - mySSH.command('docker logs prod-oai-mme > mme_' + self.testCase_id + '.log', '\$', 5) + if self.isMagmaUsed: + mySSH.command('docker cp --follow-link prod-magma-mme:/var/log/mme.log mme_' + self.testCase_id + '.log', '\$', 15) + else: + mySSH.command('docker logs prod-oai-mme > mme_' + self.testCase_id + '.log', '\$', 5) mySSH.command('docker logs prod-oai-spgwc > spgwc_' + self.testCase_id + '.log', '\$', 5) mySSH.command('docker logs prod-oai-spgwu-tiny > spgwu_' + self.testCase_id + '.log', '\$', 5) mySSH.command('docker cp prod-oai-hss:/tmp/hss_check_run.pcap hss_' + self.testCase_id + '.pcap', '\$', 60) - mySSH.command('docker cp prod-oai-mme:/tmp/mme_check_run.pcap mme_' + self.testCase_id + '.pcap', '\$', 60) + if self.isMagmaUsed: + mySSH.command('docker cp prod-magma-mme:/tmp/mme_check_run.pcap mme_' + self.testCase_id + '.pcap', '\$', 60) + else: + mySSH.command('docker cp prod-oai-mme:/tmp/mme_check_run.pcap mme_' + self.testCase_id + '.pcap', '\$', 60) mySSH.command('docker cp prod-oai-spgwc:/tmp/spgwc_check_run.pcap spgwc_' + self.testCase_id + '.pcap', '\$', 60) mySSH.command('docker cp prod-oai-spgwu-tiny:/tmp/spgwu_check_run.pcap spgwu_' + self.testCase_id + '.pcap', '\$', 60) # Remove all mySSH.command('cd ' + self.SourceCodePath + '/scripts', '\$', 5) - listOfContainers = 'prod-cassandra prod-oai-hss prod-oai-mme prod-oai-spgwc prod-oai-spgwu-tiny' - nbContainers = 5 + if self.isMagmaUsed: + listOfContainers = 'prod-cassandra prod-oai-hss prod-magma-mme prod-oai-spgwc prod-oai-spgwu-tiny prod-redis' + nbContainers = 6 + else: + listOfContainers = 'prod-cassandra prod-oai-hss prod-oai-mme prod-oai-spgwc prod-oai-spgwu-tiny' + nbContainers = 5 # Checking for additional services mySSH.command('docker-compose config', '\$', 5) configResponse = mySSH.getBefore() diff --git a/ci-scripts/xml_files/fr1_oai_cn_deploy.xml b/ci-scripts/xml_files/fr1_oai_cn_deploy.xml index 1ccc952c56..26dbebc329 100644 --- a/ci-scripts/xml_files/fr1_oai_cn_deploy.xml +++ b/ci-scripts/xml_files/fr1_oai_cn_deploy.xml @@ -33,7 +33,7 @@ Deploy_EPC Deploy all EPC containers - yaml_files/fr1_epc_20897 + yaml_files/magma_nsa_20897 From c89f2dbd0b14b00218a8479ccde8c3cb1fd8f500 Mon Sep 17 00:00:00 2001 From: Raphael Defosseux Date: Fri, 29 Oct 2021 15:45:48 +0200 Subject: [PATCH 097/102] fix(ci): some typos on the container name of MME Signed-off-by: Raphael Defosseux --- ci-scripts/epc.py | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/ci-scripts/epc.py b/ci-scripts/epc.py index e6728aeb53..8376e07fd5 100644 --- a/ci-scripts/epc.py +++ b/ci-scripts/epc.py @@ -165,7 +165,15 @@ class EPCManagement(): if re.match('OAI-Rel14-Docker', self.Type, re.IGNORECASE): mySSH = SSH.SSHConnection() mySSH.open(self.IPAddress, self.UserName, self.Password) - mySSH.command('docker inspect --format="MME_IP_ADDR = {{range .NetworkSettings.Networks}}{{.IPAddress}}{{end}}" ' + self.containerPrefix + '-oai-mme', '\$', 5) + self.isMagmaUsed = False + mySSH.command('docker ps -a', '\$', 5) + result = re.search('magma', mySSH.getBefore()) + if result is not None: + self.isMagmaUsed = True + if self.isMagmaUsed: + mySSH.command('docker inspect --format="MME_IP_ADDR = {{range .NetworkSettings.Networks}}{{.IPAddress}}{{end}}" ' + self.containerPrefix + '-magma-mme', '\$', 5) + else: + mySSH.command('docker inspect --format="MME_IP_ADDR = {{range .NetworkSettings.Networks}}{{.IPAddress}}{{end}}" ' + self.containerPrefix + '-oai-mme', '\$', 5) result = re.search('MME_IP_ADDR = (?P[0-9\.]+)', mySSH.getBefore()) if result is not None: self.MmeIPAddress = result.group('mme_ip_addr') @@ -290,7 +298,15 @@ class EPCManagement(): mySSH = SSH.SSHConnection() mySSH.open(self.IPAddress, self.UserName, self.Password) if re.match('OAI-Rel14-Docker', self.Type, re.IGNORECASE): - mySSH.command('docker top ' + self.containerPrefix + '-oai-mme', '\$', 5) + self.isMagmaUsed = False + mySSH.command('docker ps -a', '\$', 5) + result = re.search('magma', mySSH.getBefore()) + if result is not None: + self.isMagmaUsed = True + if self.isMagmaUsed: + mySSH.command('docker top ' + self.containerPrefix + '-magma-mme', '\$', 5) + else: + mySSH.command('docker top ' + self.containerPrefix + '-oai-mme', '\$', 5) else: mySSH.command('stdbuf -o0 ps -aux | grep --color=never mme | grep -v grep', '\$', 5) if re.match('OAI-Rel14-Docker', self.Type, re.IGNORECASE): From 9468442ff9ca8b6dfd10dd5fd2a0078380f17335 Mon Sep 17 00:00:00 2001 From: hardy Date: Fri, 29 Oct 2021 16:51:20 +0200 Subject: [PATCH 098/102] fix HTML rendering --- ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml | 2 +- ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml index 12a6186403..fdd3cdfe14 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml @@ -21,7 +21,7 @@ --> - TEST-NSA-FR1-TM2 + TEST-NSA-FR1-TM2-Tab1 NSA 2x2 Ping DL UL with QUECTEL tasks 1 diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml index 371164fe67..299bbc6ca6 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml @@ -21,7 +21,7 @@ --> - TEST-NSA-FR1-TM2 + TEST-NSA-FR1-TM2-Tab2 NSA 2x2 Attach-Detach with QUECTEL tasks 1 From 04251e84bed0c9138f118e7b483c4b879ea1cddf Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Fri, 29 Oct 2021 13:51:58 -0700 Subject: [PATCH 099/102] Removing name from log and demoting log --- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index ed33aa58f9..cab2cc4863 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -734,7 +734,7 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea ul_tti_request->SFN, ul_tti_request->Slot); if (nr_uci_ind_queue.num_items > 0) //TODO: In the future UL_TTIs can be for ULSCH and SRS. { - LOG_I(NR_MAC, "Melissa, we added UL_TTI_REQ to queue for sfn slot %d %d\n", + LOG_D(NR_MAC, "We added UL_TTI_REQ to queue for sfn slot %d %d\n", ul_tti_request->SFN, ul_tti_request->Slot); if (!put_queue(&nr_ul_tti_req_queue, ul_tti_request)) { @@ -754,7 +754,7 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea mitigate proxy timing issues. */ else if (nr_uci_ind_queue.num_items == 0) { - LOG_I(NR_MAC, "Melissa, we added UL_TTI_REQ to queue for sfn slot %d %d\n", + LOG_D(NR_MAC, "We added UL_TTI_REQ to queue for sfn slot %d %d\n", ul_tti_request->SFN, ul_tti_request->Slot); if (!put_queue(&nr_wait_ul_tti_req_queue, ul_tti_request)) { From 7825350905997b3e9412cfd4b048b3d10c1c0f94 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Mon, 1 Nov 2021 16:24:59 -0700 Subject: [PATCH 100/102] Fixing merge request comments --- openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c | 8 +++++--- openair2/NR_PHY_INTERFACE/NR_IF_Module.c | 12 +++++------- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 10 +++------- 3 files changed, 13 insertions(+), 17 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c index a1056a2f71..c3aaf87844 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c @@ -259,9 +259,6 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl //NR_ServingCellConfig_t *scd = mac->scg->spCellConfig->spCellConfigDedicated; NR_BWP_DownlinkDedicated_t *bwpd = (bwp_id>0) ? mac->DLbwp[bwp_id-1]->bwp_Dedicated : mac->cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP; NR_BWP_DownlinkCommon_t *bwp_Common = (bwp_id>0) ? mac->DLbwp[bwp_id-1]->bwp_Common : &mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP; - fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; - NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon; - struct NR_PhysicalCellGroupConfig *phy_cgc = (mac->cg) ? mac->cg->physicalCellGroupConfig : NULL; LOG_D(NR_MAC, "[DCI_CONFIG] ra_rnti %p (%x) crnti %p (%x) t_crnti %p (%x)\n", &ra->ra_rnti, ra->ra_rnti, &mac->crnti, mac->crnti, &ra->t_crnti, ra->t_crnti); @@ -270,6 +267,9 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl for (ss_id = 0; ss_id < FAPI_NR_MAX_SS_PER_CORESET && mac->SSpace[bwp_id][coreset_id - 1][ss_id] != NULL; ss_id++){ LOG_D(NR_MAC, "[DCI_CONFIG] ss_id %d\n",ss_id); NR_SearchSpace_t *ss = mac->SSpace[bwp_id][coreset_id - 1][ss_id]; + fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; + NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon; + struct NR_PhysicalCellGroupConfig *phy_cgc = mac->cg->physicalCellGroupConfig; switch (ss->searchSpaceType->present){ case NR_SearchSpace__searchSpaceType_PR_common: // this is for CSSs, we use BWP common and pdcch_ConfigCommon @@ -414,6 +414,8 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl } // Search space 0, CORESET ID 0 + NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon; + if (pdcch_ConfigCommon && pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 && !get_softmodem_params()->nsa) { diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c index 50d1bd6c92..f5a7e8b0cd 100644 --- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c @@ -153,15 +153,13 @@ void handle_nr_uci(NR_UL_IND_t *UL_info) switch (uci_list[i].pdu_type) { case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: if (uci_list[i].pucch_pdu_format_0_1.harq) { - free(uci_list[i].pucch_pdu_format_0_1.harq->harq_list); - uci_list[i].pucch_pdu_format_0_1.harq->harq_list = NULL; + free(uci_list[i].pucch_pdu_format_0_1.harq->harq_list); + uci_list[i].pucch_pdu_format_0_1.harq->harq_list = NULL; + } free(uci_list[i].pucch_pdu_format_0_1.harq); uci_list[i].pucch_pdu_format_0_1.harq = NULL; - } - if (uci_list[i].pucch_pdu_format_0_1.sr) { - free(uci_list[i].pucch_pdu_format_0_1.sr); - uci_list[i].pucch_pdu_format_0_1.sr = NULL; - } + free(uci_list[i].pucch_pdu_format_0_1.sr); + uci_list[i].pucch_pdu_format_0_1.sr = NULL; break; case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index cab2cc4863..c2d7e341bf 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -738,13 +738,9 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea ul_tti_request->SFN, ul_tti_request->Slot); if (!put_queue(&nr_ul_tti_req_queue, ul_tti_request)) { - reset_queue(&nr_ul_tti_req_queue); - if (!put_queue(&nr_ul_tti_req_queue, ul_tti_request)) - { - LOG_E(NR_PHY, "put_queue failed for ul_tti_request.\n"); - free(ul_tti_request); - ul_tti_request = NULL; - } + LOG_E(NR_PHY, "put_queue failed for ul_tti_request.\n"); + free(ul_tti_request); + ul_tti_request = NULL; } } /* TODO: This indicates that dl_tti_req was late or never arrived. If there are From 9d246a012d651a8d9db66b988d6918fc32ee124d Mon Sep 17 00:00:00 2001 From: hardy Date: Tue, 2 Nov 2021 17:22:55 +0100 Subject: [PATCH 101/102] update NSA 2x2 testcase --- ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml | 4 ++-- .../fr1_nsa_2x2_quectel_attach_detach.xml | 14 +++++++------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml index fdd3cdfe14..16dfd1e377 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml @@ -24,7 +24,7 @@ TEST-NSA-FR1-TM2-Tab1 NSA 2x2 Ping DL UL with QUECTEL tasks - 1 + 5 030000 040000 @@ -85,7 +85,7 @@ IdleSleep Sleep - 5 + 60 diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml index 299bbc6ca6..ebb5c880d5 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml @@ -24,7 +24,7 @@ TEST-NSA-FR1-TM2-Tab2 NSA 2x2 Attach-Detach with QUECTEL tasks - 1 + 5 031000 041000 @@ -32,19 +32,19 @@ 010000 000001 050000 - 000001 + 000002 010004 - 000001 + 000002 010003 000001 050000 - 000001 + 000002 010004 - 000001 + 000002 010003 000001 050000 - 000001 + 000002 010002 080001 080000 @@ -105,7 +105,7 @@ IdleSleep Sleep - 5 + 60 From b29fd449d0fa231c87a3c353adc89ed31e631521 Mon Sep 17 00:00:00 2001 From: Melissa Elkadi Date: Tue, 2 Nov 2021 14:35:32 -0700 Subject: [PATCH 102/102] Changed ul_tti_req queueing mechanism: Instead of resetting queue when full, take last item out. --- openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c | 13 ++-------- openair2/PHY_INTERFACE/queue.c | 28 +++++++++++++++++++++ openair2/PHY_INTERFACE/queue.h | 1 + 3 files changed, 31 insertions(+), 11 deletions(-) diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c index c2d7e341bf..9dc6cf918f 100644 --- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c +++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c @@ -752,18 +752,9 @@ static void enqueue_nr_nfapi_msg(void *buffer, ssize_t len, nfapi_p7_message_hea { LOG_D(NR_MAC, "We added UL_TTI_REQ to queue for sfn slot %d %d\n", ul_tti_request->SFN, ul_tti_request->Slot); - if (!put_queue(&nr_wait_ul_tti_req_queue, ul_tti_request)) - { - reset_queue(&nr_wait_ul_tti_req_queue); - if (!put_queue(&nr_wait_ul_tti_req_queue, ul_tti_request)) - { - LOG_E(NR_PHY, "put_queue failed for nr_wait_ul_tti_req_queue.\n"); - free(ul_tti_request); - ul_tti_request = NULL; - } - } + nfapi_nr_ul_tti_request_t *evicted_ul_tti_req = put_queue_replace(&nr_wait_ul_tti_req_queue, ul_tti_request); + free(evicted_ul_tti_req); } - break; } diff --git a/openair2/PHY_INTERFACE/queue.c b/openair2/PHY_INTERFACE/queue.c index c6e1fb6d2f..d837857ac7 100644 --- a/openair2/PHY_INTERFACE/queue.c +++ b/openair2/PHY_INTERFACE/queue.c @@ -25,6 +25,34 @@ void reset_queue(queue_t *q) } } +void *put_queue_replace(queue_t *q, void *item) +{ + assert(item != NULL); + if (pthread_mutex_lock(&q->mutex) != 0) + { + LOG_ERROR("put_queue: mutex_lock failed"); + return false; + } + + void *evicted = NULL; + if (q->num_items >= MAX_QUEUE_SIZE) + { + evicted = q->items[q->read_index]; + assert(evicted != NULL); + q->items[q->read_index] = NULL; + q->read_index = (q->read_index + 1) % MAX_QUEUE_SIZE; + q->num_items--; + } + assert(q->items[q->write_index] == NULL); + q->items[q->write_index] = item; + q->write_index = (q->write_index + 1) % MAX_QUEUE_SIZE; + q->num_items++; + + pthread_mutex_unlock(&q->mutex); + return evicted; +} + + bool put_queue(queue_t *q, void *item) { assert(item != NULL); diff --git a/openair2/PHY_INTERFACE/queue.h b/openair2/PHY_INTERFACE/queue.h index d274f7b0cd..4678e31030 100644 --- a/openair2/PHY_INTERFACE/queue.h +++ b/openair2/PHY_INTERFACE/queue.h @@ -42,6 +42,7 @@ typedef struct queue_t void init_queue(queue_t *q); void reset_queue(queue_t *q); +void *put_queue_replace(queue_t *q, void *item); bool put_queue(queue_t *q, void *item); void *get_queue(queue_t *q);