From 31e306abdc894ffd09642f875e600d1561297ac5 Mon Sep 17 00:00:00 2001 From: francescomani Date: Fri, 17 Sep 2021 17:10:22 +0200 Subject: [PATCH 01/13] adding logs --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 2 +- openair1/SCHED_NR/fapi_nr_l1.c | 3 ++- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 9 +++++---- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 2 +- 4 files changed, 9 insertions(+), 7 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index db905039d7..2a1556f432 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -429,7 +429,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->harq_confidence_level = no_conf ? 1 : 0; uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(1); uci_pdu->harq->harq_list[0].harq_value = index&0x01; - LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ value %d with confidence level (0 is good, 1 is bad) %d xrt_mag %d srt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n", + LOG_I(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ value %d with confidence level (0 is good, 1 is bad) %d xrt_mag %d srt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n", frame,slot,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10); if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); diff --git a/openair1/SCHED_NR/fapi_nr_l1.c b/openair1/SCHED_NR/fapi_nr_l1.c index b2a802ab08..ad78dbf355 100644 --- a/openair1/SCHED_NR/fapi_nr_l1.c +++ b/openair1/SCHED_NR/fapi_nr_l1.c @@ -104,7 +104,8 @@ void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB, int frame, int slot, nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu) { - LOG_D(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci); + if(pdcch_pdu->pdcch_pdu_rel15.CoreSetType==1) + LOG_I(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci); // copy dci configuration into gNB structure // gNB->pdcch_pdu = pdcch_pdu; diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index b98c8c9c7b..9b78bdf57c 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -164,10 +164,11 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB->Mod_id,frame,slot,pdcch_pdu_id,ul_pdcch_pdu_id); if (pdcch_pdu_id >= 0 || ul_pdcch_pdu_id >= 0) { - LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", - gNB->Mod_id, frame, slot, - gNB->ul_pdcch_pdu[ul_pdcch_pdu_id].pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci, - gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.numDlDci); + if(gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.CoreSetType==1) + LOG_I(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", + gNB->Mod_id, frame, slot, + gNB->ul_pdcch_pdu[ul_pdcch_pdu_id].pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci, + gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.numDlDci); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 8ae2a5d6dc..5a7e5c2260 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -1074,7 +1074,7 @@ void nr_schedule_ue_spec(module_id_t module_id, dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch->timing_indicator; // PDSCH to HARQ TI dci_payload.antenna_ports.val = ps->dmrs_ports_id; dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID; - LOG_D(NR_MAC, + LOG_I(NR_MAC, "%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), " "time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d\n", frame, From 85a03cd3c14f8f213fd6ef3b90dd336b481a1029 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Mon, 20 Sep 2021 13:03:44 +0100 Subject: [PATCH 02/13] Intermediate backup commit --- .../conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf | 4 ++-- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 6 +++--- openair1/SCHED_NR/fapi_nr_l1.c | 3 +-- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 9 ++++----- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 9 +++++---- openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c | 2 +- .../CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf | 12 +++++++++--- 7 files changed, 25 insertions(+), 20 deletions(-) diff --git a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf index 29c6c6aa03..9866498e98 100644 --- a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf @@ -157,12 +157,12 @@ gNBs = restrictedSetConfig = 0, # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; + initialULBWPk2_0 = 2; initialULBWPmappingType_0 = 1 # this is SS=2 L=13 initialULBWPstartSymbolAndLength_0 = 41; - initialULBWPk2_1 = 6; + initialULBWPk2_1 = 2; initialULBWPmappingType_1 = 1; # this is SS=0 L=4 initialULBWPstartSymbolAndLength_1 = 52; diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 2a1556f432..f5c75dfc23 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -399,7 +399,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_stats->pucch0_thres = gNB->pucch0_thres; /* + (10*max_n0);*/ bool no_conf=false; if (nr_sequences>1) { - if (xrtmag_dBtimes10 < uci_stats->pucch0_thres+xrtmag_next_dBtimes10) + if (xrtmag_dBtimes10 < (50+xrtmag_next_dBtimes10) || SNRtimes10 < uci_stats->pucch0_thres) no_conf=true; } gNB->bad_pucch += no_conf; @@ -446,8 +446,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2); uci_pdu->harq->harq_list[1].harq_value = index&0x01; uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01; - LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d\n", - frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10); + LOG_I(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n", + frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10, max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10); if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); uci_pdu->sr->sr_indication = (index>3) ? 1 : 0; diff --git a/openair1/SCHED_NR/fapi_nr_l1.c b/openair1/SCHED_NR/fapi_nr_l1.c index ad78dbf355..b2a802ab08 100644 --- a/openair1/SCHED_NR/fapi_nr_l1.c +++ b/openair1/SCHED_NR/fapi_nr_l1.c @@ -104,8 +104,7 @@ void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB, int frame, int slot, nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu) { - if(pdcch_pdu->pdcch_pdu_rel15.CoreSetType==1) - LOG_I(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci); + LOG_D(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci); // copy dci configuration into gNB structure // gNB->pdcch_pdu = pdcch_pdu; diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 9b78bdf57c..b98c8c9c7b 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -164,11 +164,10 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB->Mod_id,frame,slot,pdcch_pdu_id,ul_pdcch_pdu_id); if (pdcch_pdu_id >= 0 || ul_pdcch_pdu_id >= 0) { - if(gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.CoreSetType==1) - LOG_I(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", - gNB->Mod_id, frame, slot, - gNB->ul_pdcch_pdu[ul_pdcch_pdu_id].pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci, - gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.numDlDci); + LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", + gNB->Mod_id, frame, slot, + gNB->ul_pdcch_pdu[ul_pdcch_pdu_id].pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci, + gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.numDlDci); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 5a7e5c2260..e5820f0795 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -452,7 +452,7 @@ void nr_store_dlsch_buffer(module_id_t module_id, && !sched_ctrl->ta_apply) /* If TA should be applied, give at least one RB */ return; - LOG_I(NR_MAC, + LOG_D(NR_MAC, "[%s][%d.%d], %s%d->DLSCH, RLC status %d bytes TA %d\n", __func__, frame, @@ -899,7 +899,7 @@ void nr_schedule_ue_spec(module_id_t module_id, harq->is_waiting = true; UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++; - LOG_D(NR_MAC, + LOG_I(NR_MAC, "%4d.%2d [DLSCH/PDSCH/PUCCH] UE %d RNTI %04x DCI L %d start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) TPC %d\n", frame, slot, @@ -1076,7 +1076,7 @@ void nr_schedule_ue_spec(module_id_t module_id, dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID; LOG_I(NR_MAC, "%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), " - "time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d\n", + "time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d ti %d\n", frame, slot, dci_payload.frequency_domain_assignment.val, @@ -1089,7 +1089,8 @@ void nr_schedule_ue_spec(module_id_t module_id, dci_payload.tb_scaling, dci_payload.ndi, dci_payload.rv, - dci_payload.tpc); + dci_payload.tpc, + pucch->timing_indicator); const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats; int dci_format; diff --git a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c index b59deb440c..8bf65835dc 100644 --- a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c +++ b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c @@ -460,7 +460,7 @@ static void deliver_sdu(void *_ue, nr_rlc_entity_t *entity, char *buf, int size) exit(1); rb_found: - LOG_I(RLC, "%s:%d:%s: delivering SDU (rnti %d is_srb %d rb_id %d) size %d\n", + LOG_D(RLC, "%s:%d:%s: delivering SDU (rnti %d is_srb %d rb_id %d) size %d\n", __FILE__, __LINE__, __FUNCTION__, ue->rnti, is_srb, rb_id, size); memblock = get_free_mem_block(size, __func__); diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index e58fec043b..c9bffb895b 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -231,8 +231,12 @@ MACRLCs = ( tr_s_preference = "local_L1"; tr_n_preference = "local_RRC"; ulsch_max_slots_inactivity = 10; - pusch_TargetSNRx10 = 200; + pusch_TargetSNRx10 = 150; pucch_TargetSNRx10 = 200; + + #pusch_TargetSNRx10 = 200; + #pucch_TargetSNRx10 = 150; + #ulsch_max_slots_inactivity=20; } ); @@ -240,8 +244,10 @@ L1s = ( { num_cc = 1; tr_n_preference = "local_mac"; - pusch_proc_threads = 8; - ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 + pusch_proc_threads = 2; + prach_dtx_threshold = 120; + pucch0_dtx_threshold = 200; + ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0 } ); From 90e6f5dd257bc2239e40722cbb772c7ad66f0bb5 Mon Sep 17 00:00:00 2001 From: luis_pereira87 Date: Mon, 20 Sep 2021 13:38:02 +0100 Subject: [PATCH 03/13] Add more pucch_acknak logs --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index c17641b2fb..a92f9a65f9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1285,7 +1285,7 @@ int nr_acknack_scheduling(int mod_id, pucch->timing_indicator = i; pucch->dai_c++; // retain old resource indicator, and we are good - LOG_D(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d\n",frame,slot,pucch->frame,pucch->ul_slot); + LOG_I(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d timing_indicator %d\n",frame,slot,pucch->frame,pucch->ul_slot, pucch->timing_indicator); return 0; } @@ -1353,7 +1353,7 @@ int nr_acknack_scheduling(int mod_id, pucch->timing_indicator = ind_found; // index in the list of timing indicators - LOG_D(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,ind_found); + LOG_I(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,ind_found); pucch->dai_c++; pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources From bfd9671626b11150a880e4855d5ebe52d9b6516e Mon Sep 17 00:00:00 2001 From: francescomani Date: Mon, 20 Sep 2021 19:32:19 +0200 Subject: [PATCH 04/13] fixes in acknack scheduling --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 4 +- openair1/SCHED_NR/fapi_nr_l1.c | 3 +- openair1/SCHED_NR/phy_procedures_nr_gNB.c | 9 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 2 +- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 16 ++- .../LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 105 +++++++++++------- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 1 + 7 files changed, 84 insertions(+), 56 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 2a1556f432..34c0f6cdbf 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -446,8 +446,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2); uci_pdu->harq->harq_list[1].harq_value = index&0x01; uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01; - LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d\n", - frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10); + LOG_I(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n", + frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10); if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); uci_pdu->sr->sr_indication = (index>3) ? 1 : 0; diff --git a/openair1/SCHED_NR/fapi_nr_l1.c b/openair1/SCHED_NR/fapi_nr_l1.c index ad78dbf355..b2a802ab08 100644 --- a/openair1/SCHED_NR/fapi_nr_l1.c +++ b/openair1/SCHED_NR/fapi_nr_l1.c @@ -104,8 +104,7 @@ void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB, int frame, int slot, nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu) { - if(pdcch_pdu->pdcch_pdu_rel15.CoreSetType==1) - LOG_I(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci); + LOG_D(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci); // copy dci configuration into gNB structure // gNB->pdcch_pdu = pdcch_pdu; diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 9b78bdf57c..e779f5eab6 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -164,11 +164,10 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB->Mod_id,frame,slot,pdcch_pdu_id,ul_pdcch_pdu_id); if (pdcch_pdu_id >= 0 || ul_pdcch_pdu_id >= 0) { - if(gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.CoreSetType==1) - LOG_I(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", - gNB->Mod_id, frame, slot, - gNB->ul_pdcch_pdu[ul_pdcch_pdu_id].pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci, - gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.numDlDci); + LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", + gNB->Mod_id, frame, slot, + gNB->ul_pdcch_pdu[ul_pdcch_pdu_id].pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci, + gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.numDlDci); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 5a7e5c2260..8ae2a5d6dc 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -1074,7 +1074,7 @@ void nr_schedule_ue_spec(module_id_t module_id, dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch->timing_indicator; // PDSCH to HARQ TI dci_payload.antenna_ports.val = ps->dmrs_ports_id; dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID; - LOG_I(NR_MAC, + LOG_D(NR_MAC, "%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), " "time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d\n", frame, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index ac017f6a67..0fb06dfb4e 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -2090,6 +2090,7 @@ void get_pdsch_to_harq_feedback(int Mod_idP, int UE_id, int bwp_id, NR_SearchSpace__searchSpaceType_PR ss_type, + int *max_fb_time, uint8_t *pdsch_to_harq_feedback) { NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; @@ -2127,8 +2128,11 @@ void get_pdsch_to_harq_feedback(int Mod_idP, // common search type uses DCI format 1_0 if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) { - for (int i=0; i<8; i++) + for (int i=0; i<8; i++) { pdsch_to_harq_feedback[i] = i+1; + if(pdsch_to_harq_feedback[i]>*max_fb_time) + *max_fb_time = pdsch_to_harq_feedback[i]; + } } else { @@ -2150,14 +2154,20 @@ void get_pdsch_to_harq_feedback(int Mod_idP, if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) { - for (int i=0; i<8; i++) + for (int i=0; i<8; i++) { pdsch_to_harq_feedback[i] = i+1; + if(pdsch_to_harq_feedback[i]>*max_fb_time) + *max_fb_time = pdsch_to_harq_feedback[i]; + } } else { AssertFatal(ubwpd!=NULL,"ubwpd shouldn't be null here\n"); if(ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK != NULL) { - for (int i=0; i<8; i++) + for (int i=0; i<8; i++) { pdsch_to_harq_feedback[i] = *ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[i]; + if(pdsch_to_harq_feedback[i]>*max_fb_time) + *max_fb_time = pdsch_to_harq_feedback[i]; + } } else AssertFatal(0==1,"There is no allocated dl_DataToUL_ACK for pdsch to harq feedback\n"); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index c17641b2fb..3710c25af2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1169,12 +1169,11 @@ int nr_acknack_scheduling(int mod_id, frame_t frame, sub_frame_t slot, int r_pucch, - int is_common) -{ + int is_common) { + const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon; const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1; - const int nr_ulmix_slots = tdd->nrofUplinkSlots + (tdd->nrofUplinkSymbols != 0); const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots; const int first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period); @@ -1195,7 +1194,7 @@ int nr_acknack_scheduling(int mod_id, * * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */ NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id]; NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0]; - LOG_D(NR_MAC,"pucch_acknak %d.%d Trying to allocate pucch, current DAI %d\n",frame,slot,pucch->dai_c); + LOG_I(NR_MAC,"pucch_acknak %d.%d Trying to allocate pucch, current DAI %d\n",frame,slot,pucch->dai_c); pucch->r_pucch=r_pucch; AssertFatal(pucch->csi_bits == 0, "%s(): csi_bits %d in sched_pucch[0]\n", @@ -1207,11 +1206,14 @@ int nr_acknack_scheduling(int mod_id, * the same slot again */ const int f = pucch->frame; const int s = pucch->ul_slot; - LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI = 2 pucch currently in %d.%d, advancing by 1 slot\n",frame,slot,f,s); + LOG_I(NR_MAC,"pucch_acknak : %d.%d DAI = 2 pucch currently in %d.%d, advancing by 1 slot\n",frame,slot,f,s); nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id); memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - pucch->ul_slot = (s + 1) % n_slots_frame; + if((s + 1) == nr_slots_period) + pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + else + pucch->ul_slot = (s + 1) % n_slots_frame; // we assume that only two indices over the array sched_pucch exist csi_pucch = &sched_ctrl->sched_pucch[1]; // skip the CSI PUCCH if it is present and if in the next frame/slot @@ -1223,19 +1225,15 @@ int nr_acknack_scheduling(int mod_id, && !csi_pucch->simultaneous_harqcsi) { nr_fill_nfapi_pucch(mod_id, frame, slot, csi_pucch, UE_id); memset(csi_pucch, 0, sizeof(*csi_pucch)); - pucch->frame = s >= n_slots_frame - 2 ? (f + 1) % 1024 : f; - pucch->ul_slot = (s + 2) % n_slots_frame; + pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; + if((s + 1) == nr_slots_period) + pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + else + pucch->ul_slot = (s + 1) % n_slots_frame; } } LOG_D(NR_MAC,"pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c); - /* if the UE's next PUCCH occasion is after the possible UL slots (within the - * same frame) or wrapped around to the next frame, then we assume there is - * no possible PUCCH allocation anymore */ - if ((pucch->frame == frame - && (pucch->ul_slot >= first_ul_slot_tdd + nr_ulmix_slots)) - || (pucch->frame == frame + 1)) - return -1; // this is hardcoded for now as ue specific only if we are not on the initialBWP (to be fixed to allow ue_Specific also on initialBWP NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]; @@ -1253,15 +1251,14 @@ int nr_acknack_scheduling(int mod_id, int bwp_Id = 0; if (sched_ctrl->active_ubwp) bwp_Id = sched_ctrl->active_ubwp->bwp_Id; - get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, pdsch_to_harq_feedback); - + int max_fb_time = 0; + get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, pdsch_to_harq_feedback); + int max_absslot = frame*n_slots_frame + slot + max_fb_time; LOG_D(NR_MAC,"pucch_acknak 1b. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c); /* there is a HARQ. Check whether we can use it for this ACKNACK */ if (pucch->dai_c > 0) { /* this UE already has a PUCCH occasion */ - DevAssert(pucch->frame == frame); - // Find the right timing_indicator value. int i = 0; while (i < 8) { @@ -1278,48 +1275,67 @@ int nr_acknack_scheduling(int mod_id, nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id); memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - pucch->ul_slot = (s + 1) % n_slots_frame; + if((s + 1) == nr_slots_period) + pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + else + pucch->ul_slot = (s + 1) % n_slots_frame; return nr_acknack_scheduling(mod_id, UE_id, frame, slot, r_pucch,is_common); } pucch->timing_indicator = i; pucch->dai_c++; // retain old resource indicator, and we are good - LOG_D(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d\n",frame,slot,pucch->frame,pucch->ul_slot); + LOG_D(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); return 0; } LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI = 0, looking for new pucch occasion\n",frame,slot); /* we need to find a new PUCCH occasion */ - /* if time information is outdated (e.g., last PUCCH occasion in last frame), - * set to first possible UL occasion in this frame. Note that if such UE is - * scheduled a lot and used all AckNacks, pucch->frame might have been - * wrapped around to next frame */ - if (frame != pucch->frame || pucch->ul_slot < first_ul_slot_tdd) { + /*Inizialization of timing information*/ + if (pucch->frame == 0 && pucch->ul_slot == 0) { AssertFatal(pucch->sr_flag + pucch->dai_c == 0, "expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n", UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot); - AssertFatal(frame + 1 != pucch->frame, - "frame wrap around not handled in %s() yet\n", - __func__); pucch->frame = frame; - pucch->ul_slot = first_ul_slot_tdd; + pucch->ul_slot = first_ul_slot_tdd + (slot/nr_slots_period); } - // advance ul_slot if it is not reachable by UE - int pucch_slot,ind_found=-1; - for (int i=0;i<8;i++) { - pucch_slot = slot + pdsch_to_harq_feedback[i]; - if ((pucch_slot%nr_slots_period) >= tdd->nrofDownlinkSlots) { - pucch->ul_slot = max(pucch->ul_slot, pucch_slot); - ind_found=i; - break; + // Find the right timing_indicator value. + int ind_found = -1; + // while we are within the feedback limits and it has not been + while ((pucch->frame*n_slots_frame + pucch->ul_slot) <= max_absslot) { + if (ind_found!=-1) + break; + int i = 0; + while (i < 8) { + LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", + i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot); + if (pdsch_to_harq_feedback[i] == pucch->ul_slot - slot) { + ind_found = i; + break; + } + ++i; } + // advance to the next ul slot + const int f = pucch->frame; + const int s = pucch->ul_slot; + pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; + if((s + 1) == nr_slots_period) + pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + else + pucch->ul_slot = (s + 1) % n_slots_frame; + } + if (ind_found==-1) { + LOG_W(NR_MAC, + "%4d.%2d could not find pdsch_to_harq_feedback for UE %d: earliest " + "ack slot %d\n", + frame, + slot, + UE_id, + pucch->ul_slot); + return -1; } - if (pucch->ul_slot >= n_slots_frame) pucch->frame++; - pucch->ul_slot = pucch->ul_slot % n_slots_frame; - AssertFatal(ind_found!=-1,"couldn't find a valid UL_ACK slot for PUCCH, shouldn't happen\n"); // is there already CSI in this slot? csi_pucch = &sched_ctrl->sched_pucch[1]; @@ -1340,7 +1356,10 @@ int nr_acknack_scheduling(int mod_id, const int s = pucch->ul_slot; memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - pucch->ul_slot = (s + 1) % n_slots_frame; + if((s + 1) == nr_slots_period) + pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + else + pucch->ul_slot = (s + 1) % n_slots_frame; return nr_acknack_scheduling(mod_id, UE_id, frame, slot, r_pucch,is_common); } // multiplexing harq and csi in a pucch @@ -1353,7 +1372,7 @@ int nr_acknack_scheduling(int mod_id, pucch->timing_indicator = ind_found; // index in the list of timing indicators - LOG_D(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,ind_found); + LOG_D(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); pucch->dai_c++; pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index ea5bed9ca9..321476d513 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -212,6 +212,7 @@ void get_pdsch_to_harq_feedback(int Mod_idP, int UE_id, int bwp_id, NR_SearchSpace__searchSpaceType_PR ss_type, + int *max_fb_time, uint8_t *pdsch_to_harq_feedback); void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, From 7ceef76ba5bc77aeebc71239833e0946db7ba744 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Mon, 20 Sep 2021 23:28:13 +0200 Subject: [PATCH 05/13] switchpoint advance for X300 --- executables/nr-ru.c | 15 ++++++++------- openair1/PHY/INIT/nr_init_ru.c | 14 ++++++++++---- openair1/PHY/NR_TRANSPORT/nr_dci.c | 6 +++--- openair2/ENB_APP/enb_paramdef.h | 2 +- targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp | 2 +- 5 files changed, 23 insertions(+), 16 deletions(-) diff --git a/executables/nr-ru.c b/executables/nr-ru.c index 13a16d4187..28a72061ae 100644 --- a/executables/nr-ru.c +++ b/executables/nr-ru.c @@ -712,7 +712,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { int slot_type = nr_slot_select(cfg,frame,slot%fp->slots_per_frame); int prevslot_type = nr_slot_select(cfg,frame,(slot+(fp->slots_per_frame-1))%fp->slots_per_frame); int nextslot_type = nr_slot_select(cfg,frame,(slot+1)%fp->slots_per_frame); - int sf_extension = 0; //sf_extension = ru->sf_extension; + int sf_extension = 0; int siglen=fp->get_samples_per_slot(slot,fp); int flags=1; @@ -738,9 +738,10 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { flags = 3; // end of burst } - if (slot_type == NR_DOWNLINK_SLOT && prevslot_type == NR_UPLINK_SLOT) + if (slot_type == NR_DOWNLINK_SLOT && prevslot_type == NR_UPLINK_SLOT) { flags = 2; // start of burst - + sf_extension = ru->sf_extension; + } if (slot_type == NR_DOWNLINK_SLOT && nextslot_type == NR_UPLINK_SLOT) flags = 3; // end of burst } @@ -773,7 +774,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot ); for (i=0; inb_tx; i++) - txp[i] = (void *)&ru->common.txdata[i][fp->get_samples_slot_timestamp(slot,fp,0)-sf_extension]; + txp[i] = (void *)&ru->common.txdata[i][fp->get_samples_slot_timestamp(slot,fp,0)]-sf_extension*sizeof(int32_t); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp+ru->ts_offset-ru->openair0_cfg.tx_sample_advance)&0xffffffff ); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 ); @@ -784,8 +785,8 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { siglen+sf_extension, ru->nb_tx, flags); - LOG_D(PHY,"[TXPATH] RU %d aa %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, slot %d, flags %d, siglen+sf_extension %d, returned %d, E %f\n",ru->idx,i, - (long long unsigned int)(timestamp+ru->ts_offset-ru->openair0_cfg.tx_sample_advance-sf_extension),frame,proc->frame_tx_unwrap,slot, flags, siglen+sf_extension, txs,10*log10((double)signal_energy(txp[0],siglen+sf_extension))); + LOG_D(PHY,"[TXPATH] RU %d aa %d tx_rf, writing to TS %llu, %d.%d, unwrapped_frame %d, slot %d, flags %d, siglen+sf_extension %d, returned %d, E %f\n",ru->idx,i, + (long long unsigned int)(timestamp+ru->ts_offset-ru->openair0_cfg.tx_sample_advance-sf_extension),frame,slot,proc->frame_tx_unwrap,slot, flags, siglen+sf_extension, txs,10*log10((double)signal_energy(txp[0],siglen+sf_extension))); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 ); //AssertFatal(txs == 0,"trx write function error %d\n", txs); } @@ -2068,7 +2069,7 @@ static void NRRCconfig_RU(void) { RC.ru[j]->max_pdschReferenceSignalPower = *(RUParamList.paramarray[j][RU_MAX_RS_EPRE_IDX].uptr);; RC.ru[j]->max_rxgain = *(RUParamList.paramarray[j][RU_MAX_RXGAIN_IDX].uptr); RC.ru[j]->num_bands = RUParamList.paramarray[j][RU_BAND_LIST_IDX].numelt; - + RC.ru[j]->sf_extension = *(RUParamList.paramarray[j][RU_SF_EXTENSION_IDX].uptr); for (i=0; inum_bands; i++) RC.ru[j]->band[i] = RUParamList.paramarray[j][RU_BAND_LIST_IDX].iptr[i]; } //strcmp(local_rf, "yes") == 0 else { diff --git a/openair1/PHY/INIT/nr_init_ru.c b/openair1/PHY/INIT/nr_init_ru.c index 5aff52d63e..4024ed1617 100644 --- a/openair1/PHY/INIT/nr_init_ru.c +++ b/openair1/PHY/INIT/nr_init_ru.c @@ -60,10 +60,12 @@ int nr_phy_init_RU(RU_t *ru) { for (i=0; inb_tx; i++) { // Allocate 10 subframes of I/Q TX signal data (time) if not - ru->common.txdata[i] = (int32_t*)malloc16_clear( fp->samples_per_frame*sizeof(int32_t) ); + ru->common.txdata[i] = (int32_t*)malloc16_clear( ru->sf_extension + (fp->samples_per_frame*sizeof(int32_t) )); + LOG_I(PHY,"[INIT] common.txdata[%d] = %p (%lu bytes,sf_extension %d)\n",i,ru->common.txdata[i], + (ru->sf_extension + fp->samples_per_frame)*sizeof(int32_t),ru->sf_extension); + ru->common.txdata[i] = &ru->common.txdata[i][ru->sf_extension]; - LOG_I(PHY,"[INIT] common.txdata[%d] = %p (%lu bytes)\n",i,ru->common.txdata[i], - fp->samples_per_frame*sizeof(int32_t)); + LOG_I(PHY,"[INIT] common.txdata[%d] = %p \n",i,ru->common.txdata[i]); } for (i=0;inb_rx;i++) { @@ -176,7 +178,11 @@ void nr_phy_free_RU(RU_t *ru) free_and_zero(ru->frame_parms); if (ru->if_south <= REMOTE_IF5) { // this means REMOTE_IF5 or LOCAL_RF, so free memory for time-domain signals - for (i = 0; i < ru->nb_tx; i++) free_and_zero(ru->common.txdata[i]); + int32_t *ptr; + for (i = 0; i < ru->nb_tx; i++) { + ptr=&ru->common.txdata[i][-ru->sf_extension]; + free_and_zero(ptr); + } for (i = 0; i < ru->nb_rx; i++) free_and_zero(ru->common.rxdata[i]); free_and_zero(ru->common.txdata); free_and_zero(ru->common.rxdata); diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index b07f3eb2a8..194c7c0c56 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -97,12 +97,12 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex; cset_nsymb = pdcch_pdu_rel15->DurationSymbols; dci_idx = 0; - LOG_I(PHY, "Coreset rb_offset %d, nb_rb %d BWP Start %d\n",rb_offset,n_rb,pdcch_pdu_rel15->BWPStart); - LOG_I(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb); + LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d BWP Start %d\n",rb_offset,n_rb,pdcch_pdu_rel15->BWPStart); + LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb); // DMRS length is per OFDM symbol uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE) uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE) - if (1/*dci_pdu->RNTI!=0xFFFF*/) LOG_I(PHY, "DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n", + if (dci_pdu->RNTI!=0xFFFF) LOG_D(PHY, "DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n", rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType, dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits); dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset diff --git a/openair2/ENB_APP/enb_paramdef.h b/openair2/ENB_APP/enb_paramdef.h index 79e66881b5..22af2a6de0 100644 --- a/openair2/ENB_APP/enb_paramdef.h +++ b/openair2/ENB_APP/enb_paramdef.h @@ -156,7 +156,7 @@ typedef enum { {CONFIG_STRING_RU_SDR_ADDRS, NULL, 0, strptr:NULL, defstrval:"type=b200", TYPE_STRING, 0}, \ {CONFIG_STRING_RU_SDR_CLK_SRC, NULL, 0, strptr:NULL, defstrval:"internal", TYPE_STRING, 0}, \ {CONFIG_STRING_RU_SDR_TME_SRC, NULL, 0, strptr:NULL, defstrval:"internal", TYPE_STRING, 0}, \ - {CONFIG_STRING_RU_SF_EXTENSION, NULL, 0, uptr:NULL, defuintval:312, TYPE_UINT, 0}, \ + {CONFIG_STRING_RU_SF_EXTENSION, NULL, 0, uptr:NULL, defuintval:320, TYPE_UINT, 0}, \ {CONFIG_STRING_RU_END_OF_BURST_DELAY, NULL, 0, uptr:NULL, defuintval:400, TYPE_UINT, 0}, \ {CONFIG_STRING_RU_OTA_SYNC_ENABLE, NULL, 0, strptr:NULL, defstrval:"no", TYPE_STRING, 0}, \ {CONFIG_STRING_RU_BF_WEIGHTS_LIST, NULL, 0, iptr:NULL, defintarrayval:DEFBFW, TYPE_INTARRAY, 0}, \ diff --git a/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp b/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp index e7a3c61c51..67ca6b9169 100644 --- a/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp +++ b/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp @@ -942,7 +942,7 @@ extern "C" { LOG_I(HW, "openair0_cfg[0].sdr_addrs == '%s'\n", openair0_cfg[0].sdr_addrs); LOG_I(HW, "openair0_cfg[0].clock_source == '%d' (internal = %d, external = %d)\n", openair0_cfg[0].clock_source,internal,external); usrp_state_t *s ; - int choffset = 1; + int choffset = 0; if ( device->priv == NULL) { s=(usrp_state_t *)calloc(sizeof(usrp_state_t),1); From 398d81e736ad3012d9d1afcb888d313016626195 Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 21 Sep 2021 13:08:43 +0200 Subject: [PATCH 06/13] bugfix in acknack scheduling --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 3710c25af2..c60df380e3 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1305,8 +1305,6 @@ int nr_acknack_scheduling(int mod_id, int ind_found = -1; // while we are within the feedback limits and it has not been while ((pucch->frame*n_slots_frame + pucch->ul_slot) <= max_absslot) { - if (ind_found!=-1) - break; int i = 0; while (i < 8) { LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", @@ -1317,6 +1315,8 @@ int nr_acknack_scheduling(int mod_id, } ++i; } + if (ind_found!=-1) + break; // advance to the next ul slot const int f = pucch->frame; const int s = pucch->ul_slot; From 06ad8f6a28364da634b6e47c28b82cfabd70a36a Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 21 Sep 2021 14:34:42 +0200 Subject: [PATCH 07/13] remove added code in msg4 retransmission --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 0ae37d752d..27037446d2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -1771,8 +1771,6 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram ra->Msg4_frame = (frame + 1) % 1024; ra->Msg4_slot = 1; ra->state = Msg4; - UE_info->active[UE_id] = false; - UE_info->Msg4_ACKed[UE_id] = false; } } } From 40427889343ae1c258fee819437f6cd06a9a3a95 Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 21 Sep 2021 14:48:25 +0200 Subject: [PATCH 08/13] log for xrtmag debug --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 0e1c58c515..0898ce9108 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -359,6 +359,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, if (temp>xrtmag) { xrtmag_next = xrtmag; xrtmag=temp; + LOG_I(PHY,"Sequence %d xrtmag %ld xrtmag_next %ld\n", i, xrtmag, xrtmag_next); maxpos=i; uci_stats->current_pucch0_stat0 = 0; int64_t temp2=0,temp3=0;; From 1ca995f97a4d13dc4f20d610fe855f1ccb169a10 Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 21 Sep 2021 15:58:37 +0200 Subject: [PATCH 09/13] improve xrtmag_next --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 0898ce9108..06ce1c2668 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -370,6 +370,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_stats->current_pucch0_stat0= dB_fixed64(temp2); if (l==2) uci_stats->current_pucch0_stat1= dB_fixed64(temp3); } + else if (temp>xrtmag_next) + xrtmag_next = temp; } av_corr/=nr_sequences/l; From 5b976712a3777a867ae24c5474cbe4b04062de33 Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 21 Sep 2021 17:02:31 +0200 Subject: [PATCH 10/13] another bugfix in acknack scheduling --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index c60df380e3..e48fa53420 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1210,7 +1210,7 @@ int nr_acknack_scheduling(int mod_id, nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id); memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if((s + 1) == nr_slots_period) + if(((s + 1)%nr_slots_period) == nr_slots_period) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; @@ -1226,7 +1226,7 @@ int nr_acknack_scheduling(int mod_id, nr_fill_nfapi_pucch(mod_id, frame, slot, csi_pucch, UE_id); memset(csi_pucch, 0, sizeof(*csi_pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if((s + 1) == nr_slots_period) + if(((s + 1)%nr_slots_period) == nr_slots_period) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; @@ -1275,7 +1275,7 @@ int nr_acknack_scheduling(int mod_id, nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id); memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if((s + 1) == nr_slots_period) + if(((s + 1)%nr_slots_period) == nr_slots_period) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; @@ -1321,7 +1321,7 @@ int nr_acknack_scheduling(int mod_id, const int f = pucch->frame; const int s = pucch->ul_slot; pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if((s + 1) == nr_slots_period) + if(((s + 1)%nr_slots_period) == nr_slots_period) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; @@ -1356,7 +1356,7 @@ int nr_acknack_scheduling(int mod_id, const int s = pucch->ul_slot; memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if((s + 1) == nr_slots_period) + if(((s + 1)%nr_slots_period) == nr_slots_period) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; From 730128073640ec89ab9f6978665bfa49be43277b Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 21 Sep 2021 17:29:21 +0200 Subject: [PATCH 11/13] bugfix of the bugfix --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 2 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 20 +++++++++---------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 06ce1c2668..385041876d 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -359,7 +359,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, if (temp>xrtmag) { xrtmag_next = xrtmag; xrtmag=temp; - LOG_I(PHY,"Sequence %d xrtmag %ld xrtmag_next %ld\n", i, xrtmag, xrtmag_next); + LOG_D(PHY,"Sequence %d xrtmag %ld xrtmag_next %ld\n", i, xrtmag, xrtmag_next); maxpos=i; uci_stats->current_pucch0_stat0 = 0; int64_t temp2=0,temp3=0;; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index e48fa53420..09f3d562f9 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1194,7 +1194,7 @@ int nr_acknack_scheduling(int mod_id, * * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */ NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id]; NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0]; - LOG_I(NR_MAC,"pucch_acknak %d.%d Trying to allocate pucch, current DAI %d\n",frame,slot,pucch->dai_c); + LOG_D(NR_MAC,"pucch_acknak %d.%d Trying to allocate pucch, current DAI %d\n",frame,slot,pucch->dai_c); pucch->r_pucch=r_pucch; AssertFatal(pucch->csi_bits == 0, "%s(): csi_bits %d in sched_pucch[0]\n", @@ -1206,11 +1206,11 @@ int nr_acknack_scheduling(int mod_id, * the same slot again */ const int f = pucch->frame; const int s = pucch->ul_slot; - LOG_I(NR_MAC,"pucch_acknak : %d.%d DAI = 2 pucch currently in %d.%d, advancing by 1 slot\n",frame,slot,f,s); + LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI = 2 pucch currently in %d.%d, advancing by 1 slot\n",frame,slot,f,s); nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id); memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if(((s + 1)%nr_slots_period) == nr_slots_period) + if(((s + 1)%nr_slots_period) == 0) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; @@ -1226,14 +1226,14 @@ int nr_acknack_scheduling(int mod_id, nr_fill_nfapi_pucch(mod_id, frame, slot, csi_pucch, UE_id); memset(csi_pucch, 0, sizeof(*csi_pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if(((s + 1)%nr_slots_period) == nr_slots_period) + if(((s + 1)%nr_slots_period) == 0) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; } } - LOG_D(NR_MAC,"pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c); + LOG_I(NR_MAC,"pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c); // this is hardcoded for now as ue specific only if we are not on the initialBWP (to be fixed to allow ue_Specific also on initialBWP NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]; @@ -1275,7 +1275,7 @@ int nr_acknack_scheduling(int mod_id, nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id); memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if(((s + 1)%nr_slots_period) == nr_slots_period) + if(((s + 1)%nr_slots_period) == 0) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; @@ -1285,7 +1285,7 @@ int nr_acknack_scheduling(int mod_id, pucch->timing_indicator = i; pucch->dai_c++; // retain old resource indicator, and we are good - LOG_D(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); + LOG_I(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); return 0; } @@ -1321,7 +1321,7 @@ int nr_acknack_scheduling(int mod_id, const int f = pucch->frame; const int s = pucch->ul_slot; pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if(((s + 1)%nr_slots_period) == nr_slots_period) + if(((s + 1)%nr_slots_period) == 0) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; @@ -1356,7 +1356,7 @@ int nr_acknack_scheduling(int mod_id, const int s = pucch->ul_slot; memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; - if(((s + 1)%nr_slots_period) == nr_slots_period) + if(((s + 1)%nr_slots_period) == 0) pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; @@ -1372,7 +1372,7 @@ int nr_acknack_scheduling(int mod_id, pucch->timing_indicator = ind_found; // index in the list of timing indicators - LOG_D(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); + LOG_I(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator); pucch->dai_c++; pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources From 06cfa4e934322c0a0e67d11a953418e652102d33 Mon Sep 17 00:00:00 2001 From: francescomani Date: Tue, 21 Sep 2021 18:45:36 +0200 Subject: [PATCH 12/13] yet another bugfix --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 09f3d562f9..469f7bb3a1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1177,6 +1177,7 @@ int nr_acknack_scheduling(int mod_id, const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0; const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots; const int first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period); + const int first_ul_slot_period = first_ul_slot_tdd%nr_slots_period; const int CC_id = 0; NR_sched_pucch_t *csi_pucch; @@ -1211,7 +1212,7 @@ int nr_acknack_scheduling(int mod_id, memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; if(((s + 1)%nr_slots_period) == 0) - pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; // we assume that only two indices over the array sched_pucch exist @@ -1227,7 +1228,7 @@ int nr_acknack_scheduling(int mod_id, memset(csi_pucch, 0, sizeof(*csi_pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; if(((s + 1)%nr_slots_period) == 0) - pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; } @@ -1276,7 +1277,7 @@ int nr_acknack_scheduling(int mod_id, memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; if(((s + 1)%nr_slots_period) == 0) - pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; return nr_acknack_scheduling(mod_id, UE_id, frame, slot, r_pucch,is_common); @@ -1298,7 +1299,7 @@ int nr_acknack_scheduling(int mod_id, "expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n", UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot); pucch->frame = frame; - pucch->ul_slot = first_ul_slot_tdd + (slot/nr_slots_period); + pucch->ul_slot = first_ul_slot_tdd; } // Find the right timing_indicator value. @@ -1322,7 +1323,7 @@ int nr_acknack_scheduling(int mod_id, const int s = pucch->ul_slot; pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; if(((s + 1)%nr_slots_period) == 0) - pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; } @@ -1357,7 +1358,7 @@ int nr_acknack_scheduling(int mod_id, memset(pucch, 0, sizeof(*pucch)); pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; if(((s + 1)%nr_slots_period) == 0) - pucch->ul_slot = (s + 1 + first_ul_slot_tdd) % n_slots_frame; + pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame; else pucch->ul_slot = (s + 1) % n_slots_frame; return nr_acknack_scheduling(mod_id, UE_id, frame, slot, r_pucch,is_common); From 0270bf032132b2a426c2309645b5a49aa0de0996 Mon Sep 17 00:00:00 2001 From: Raymond Knopp Date: Wed, 22 Sep 2021 14:08:06 +0200 Subject: [PATCH 13/13] commit before merge --- openair1/PHY/NR_TRANSPORT/pucch_rx.c | 4 ++-- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 6 +++--- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 4 ++-- openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c | 2 +- targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp | 2 ++ 5 files changed, 10 insertions(+), 8 deletions(-) diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c index 51bb5d7b21..1e92b6ba01 100644 --- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c +++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c @@ -429,7 +429,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->harq_confidence_level = no_conf ? 1 : 0; uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(1); uci_pdu->harq->harq_list[0].harq_value = index&0x01; - LOG_I(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ value %d with confidence level (0 is good, 1 is bad) %d xrt_mag %d srt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n", + LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ value %d with confidence level (0 is good, 1 is bad) %d xrt_mag %d srt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n", frame,slot,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10); if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); @@ -446,7 +446,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2); uci_pdu->harq->harq_list[1].harq_value = index&0x01; uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01; - LOG_I(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d\n", + LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d\n", frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10); if (pucch_pdu->sr_flag == 1) { uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr)); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 63ba327f96..c8bbfd2bbe 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -452,7 +452,7 @@ void nr_store_dlsch_buffer(module_id_t module_id, && !sched_ctrl->ta_apply) /* If TA should be applied, give at least one RB */ return; - LOG_I(NR_MAC, + LOG_D(NR_MAC, "[%s][%d.%d], %s%d->DLSCH, RLC status %d bytes TA %d\n", __func__, frame, @@ -899,7 +899,7 @@ void nr_schedule_ue_spec(module_id_t module_id, harq->is_waiting = true; UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++; - LOG_I(NR_MAC, + LOG_D(NR_MAC, "%4d.%2d [DLSCH/PDSCH/PUCCH] UE %d RNTI %04x DCI L %d start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) TPC %d\n", frame, slot, @@ -1180,7 +1180,7 @@ void nr_schedule_ue_spec(module_id_t module_id, 0, 0); - LOG_I(NR_MAC, + LOG_D(NR_MAC, "%4d.%2d RNTI %04x: %d bytes from %s %d (ndata %d, remaining size %d)\n", frame, slot, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 9c0fb0f328..d864810404 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -1044,7 +1044,7 @@ void pf_ul(module_id_t module_id, gNB_MAC_INST *nrmac = RC.nrmac[module_id]; NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon; NR_UE_info_t *UE_info = &nrmac->UE_info; - const int min_rb = 5; + const int min_rb = 52; float coeff_ue[MAX_MOBILES_PER_GNB]; // UEs that could be scheduled int ue_array[MAX_MOBILES_PER_GNB]; @@ -1247,7 +1247,7 @@ void pf_ul(module_id_t module_id, &rbSize); sched_pusch->rbSize = rbSize; sched_pusch->tb_size = TBS; - LOG_D(NR_MAC,"rbSize %d, TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n", + LOG_I(NR_MAC,"rbSize %d, TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n", rbSize, sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,ps->num_dmrs_symb,ps->N_PRB_DMRS); /* Mark the corresponding RBs as used */ diff --git a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c index b59deb440c..8bf65835dc 100644 --- a/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c +++ b/openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c @@ -460,7 +460,7 @@ static void deliver_sdu(void *_ue, nr_rlc_entity_t *entity, char *buf, int size) exit(1); rb_found: - LOG_I(RLC, "%s:%d:%s: delivering SDU (rnti %d is_srb %d rb_id %d) size %d\n", + LOG_D(RLC, "%s:%d:%s: delivering SDU (rnti %d is_srb %d rb_id %d) size %d\n", __FILE__, __LINE__, __FUNCTION__, ue->rnti, is_srb, rb_id, size); memblock = get_free_mem_block(size, __func__); diff --git a/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp b/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp index 67ca6b9169..b1608b09ea 100644 --- a/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp +++ b/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp @@ -1025,6 +1025,7 @@ extern "C" { // USRP recommended: https://files.ettus.com/manual/page_usrp_x3x0_config.html if ( 0 != system("sysctl -w net.core.rmem_max=33554432 net.core.wmem_max=33554432") ) LOG_W(HW,"Can't set kernel parameters for X3xx\n"); + } s->usrp = uhd::usrp::multi_usrp::make(args); @@ -1097,6 +1098,7 @@ extern "C" { if (device->type==USRP_X300_DEV) { openair0_cfg[0].rx_gain_calib_table = calib_table_x310; std::cerr << "-- Using calibration table: calib_table_x310" << std::endl; + s->usrp->set_rx_dc_offset(true); } if (device->type==USRP_N300_DEV) {