Merge remote-tracking branch 'origin/develop' into NR_FAPI_beamindex_SSB_RO

This commit is contained in:
Florian Kaltenberger
2020-11-19 16:26:42 +01:00
123 changed files with 2038 additions and 1434 deletions
+1
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@@ -386,6 +386,7 @@ typedef struct s1ap_register_enb_req_s {
uint8_t nb_mme;
/* List of MME to connect to */
net_ip_address_t mme_ip_address[S1AP_MAX_NB_MME_IP_ADDRESS];
uint16_t mme_port[S1AP_MAX_NB_MME_IP_ADDRESS];
uint8_t broadcast_plmn_num[S1AP_MAX_NB_MME_IP_ADDRESS];
uint8_t broadcast_plmn_index[S1AP_MAX_NB_MME_IP_ADDRESS][PLMN_LIST_MAX_SIZE];
+3
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@@ -2511,6 +2511,9 @@ int RCconfig_S1(
S1AP_REGISTER_ENB_REQ(msg_p).broadcast_plmn_num[l] = 0;
}
/* set S1-mme port (sctp) */
S1AP_REGISTER_ENB_REQ(msg_p).mme_port[l] = *S1ParamList.paramarray[l][ENB_MME_PORT_IDX].u16ptr;
AssertFatal(S1AP_REGISTER_ENB_REQ(msg_p).broadcast_plmn_num[l] <= S1AP_REGISTER_ENB_REQ(msg_p).num_plmn,
"List of broadcast PLMN to be sent to MME can not be longer than actual "
"PLMN list (max %d, but is %d)\n",
+12 -1
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@@ -34,6 +34,7 @@
#define ENB_PARAMDEF_H_
#include "common/config/config_paramdesc.h"
#include "RRC_paramsvalues.h"
#include "s1ap_eNB_default_values.h"
#define ENB_CONFIG_STRING_CC_NODE_FUNCTION "node_function"
#define ENB_CONFIG_STRING_CC_NODE_TIMING "node_timing"
@@ -96,6 +97,7 @@ typedef enum {
#define CONFIG_STRING_RU_OTA_SYNC_ENABLE "ota_sync_enabled"
#define CONFIG_STRING_RU_BF_WEIGHTS_LIST "bf_weights"
#define CONFIG_STRING_RU_IF_FREQUENCY "if_freq"
#define CONFIG_STRING_RU_IF_FREQ_OFFSET "if_offset"
#define RU_LOCAL_IF_NAME_IDX 0
#define RU_LOCAL_ADDRESS_IDX 1
@@ -124,6 +126,7 @@ typedef enum {
#define RU_OTA_SYNC_ENABLE_IDX 24
#define RU_BF_WEIGHTS_LIST_IDX 25
#define RU_IF_FREQUENCY 26
#define RU_IF_FREQ_OFFSET 27
/*-----------------------------------------------------------------------------------------------------------------------------------------*/
/* RU configuration parameters */
@@ -157,6 +160,7 @@ typedef enum {
{CONFIG_STRING_RU_OTA_SYNC_ENABLE, NULL, 0, strptr:NULL, defstrval:"no", TYPE_STRING, 0}, \
{CONFIG_STRING_RU_BF_WEIGHTS_LIST, NULL, 0, iptr:NULL, defintarrayval:DEFBFW, TYPE_INTARRAY, 0}, \
{CONFIG_STRING_RU_IF_FREQUENCY, NULL, 0, u64ptr:NULL, defuintval:0, TYPE_UINT64, 0}, \
{CONFIG_STRING_RU_IF_FREQ_OFFSET, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
}
/*---------------------------------------------------------------------------------------------------------------------------------------*/
@@ -907,6 +911,7 @@ typedef struct srb1_params_s {
#define ENB_CONFIG_STRING_MME_IPV4_ADDRESS "ipv4"
#define ENB_CONFIG_STRING_MME_IPV6_ADDRESS "ipv6"
#define ENB_CONFIG_STRING_MME_PORT "port"
#define ENB_CONFIG_STRING_MME_IP_ADDRESS_ACTIVE "active"
#define ENB_CONFIG_STRING_MME_IP_ADDRESS_PREFERENCE "preference"
#define ENB_CONFIG_STRING_MME_BROADCAST_PLMN_INDEX "broadcast_plmn_index"
@@ -921,14 +926,20 @@ typedef struct srb1_params_s {
{ENB_CONFIG_STRING_MME_IPV6_ADDRESS, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_IP_ADDRESS_ACTIVE, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_IP_ADDRESS_PREFERENCE, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_BROADCAST_PLMN_INDEX, NULL, 0, uptr:NULL, defintarrayval:NULL, TYPE_UINTARRAY, 6} \
{ENB_CONFIG_STRING_MME_BROADCAST_PLMN_INDEX, NULL, 0, uptr:NULL, defintarrayval:NULL, TYPE_UINTARRAY, 6}, \
{ENB_CONFIG_STRING_MME_PORT, NULL, 0, u16ptr:NULL, defuintval:S1AP_PORT_NUMBER, TYPE_UINT16, 0}, \
}
#define ENB_MME_IPV4_ADDRESS_IDX 0
#define ENB_MME_IPV6_ADDRESS_IDX 1
#define ENB_MME_IP_ADDRESS_ACTIVE_IDX 2
#define ENB_MME_IP_ADDRESS_PREFERENCE_IDX 3
#define ENB_MME_BROADCAST_PLMN_INDEX 4
#define ENB_MME_PORT_IDX 5
/*---------------------------------------------------------------------------------------------------------------------------------------*/
/* X2 configuration parameters section name */
+304 -258
View File
@@ -49,6 +49,7 @@ uint16_t NCS_restricted_TypeB_delta_f_RA_5[14] = {36,57,60,63,65,68,71,77,81,8
uint16_t NCS_unrestricted_delta_f_RA_15[16] = {0,2,4,6,8,10,12,13,15,17,19,23,27,34,46,69};
const char *prachfmt[]={"0","1","2","3", "A1","A2","A3","B1","B4","C0","C2","A1/B1","A2/B2","A3/B3"};
const char *duplex_mode[]={"FDD","TDD"};
uint16_t get_NCS(uint8_t index, uint16_t format0, uint8_t restricted_set_config) {
@@ -156,93 +157,93 @@ int16_t get_N_RA_RB (int delta_f_RA_PRACH,int delta_f_PUSCH) {
// E.g. in row 20 and column 5 we have set value 66 ('0001000010') which means RACH can be sent at subframe 1 or 6
int64_t table_6_3_3_2_2_prachConfig_Index [256][9] = {
//format, format, x, y, SFN_nbr, star_symb, slots_sfn, occ_slot, duration
{0, -1, 16, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 16, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 16, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 16, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{0, -1, 8, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 8, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 8, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 8, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{0, -1, 4, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 4, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 4, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 4, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{0, -1, 2, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 2, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 2, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 2, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{0, -1, 1, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{0, -1, 1, 0, 16, 0, -1, -1, 0}, // (subframe number) 4
{0, -1, 1, 0, 128, 0, -1, -1, 0}, // (subframe number) 7
{0, -1, 1, 0, 66, 0, -1, -1, 0}, // (subframe number) 1,6
{0, -1, 1, 0, 132, 0, -1, -1, 0}, // (subframe number) 2,7
{0, -1, 1, 0, 264, 0, -1, -1, 0}, // (subframe number) 3,8
{0, -1, 1, 0, 146, 0, -1, -1, 0}, // (subframe number) 1,4,7
{0, -1, 1, 0, 292, 0, -1, -1, 0}, // (subframe number) 2,5,8
{0, -1, 1, 0, 584, 0, -1, -1, 0}, // (subframe number) 3, 6, 9
{0, -1, 1, 0, 341, 0, -1, -1, 0}, // (subframe number) 0,2,4,6,8
{0, -1, 1, 0, 682, 0, -1, -1, 0}, // (subframe number) 1,3,5,7,9
{0, -1, 1, 0, 1023, 0, -1, -1, 0}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{1, -1, 16, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 16, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 16, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 16, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{1, -1, 8, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 8, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 8, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 8, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{1, -1, 4, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 4, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 4, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 4, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{1, -1, 2, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 2, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 2, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 2, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{1, -1, 1, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{1, -1, 1, 0, 16, 0, -1, -1, 0}, // (subframe number) 4
{1, -1, 1, 0, 128, 0, -1, -1, 0}, // (subframe number) 7
{1, -1, 1, 0, 66, 0, -1, -1, 0}, // (subframe number) 1,6
{1, -1, 1, 0, 132, 0, -1, -1, 0}, // (subframe number) 2,7
{1, -1, 1, 0, 264, 0, -1, -1, 0}, // (subframe number) 3,8
{1, -1, 1, 0, 146, 0, -1, -1, 0}, // (subframe number) 1,4,7
{1, -1, 1, 0, 292, 0, -1, -1, 0}, // (subframe number) 2,5,8
{1, -1, 1, 0, 584, 0, -1, -1, 0}, // (subframe number) 3,6,9
{2, -1, 16, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 8, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 4, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 2, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 2, 0, 32, 0, -1, -1, 0}, // (subframe number) 5
{2, -1, 1, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{2, -1, 1, 0, 32, 0, -1, -1, 0}, // (subframe number) 5
{3, -1, 16, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 16, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 16, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 16, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{3, -1, 8, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 8, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 8, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 4, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 4, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 4, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 4, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{3, -1, 2, 1, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 2, 1, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 2, 1, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 2, 1, 512, 0, -1, -1, 0}, // (subframe number) 9
{3, -1, 1, 0, 2, 0, -1, -1, 0}, // (subframe number) 1
{3, -1, 1, 0, 16, 0, -1, -1, 0}, // (subframe number) 4
{3, -1, 1, 0, 128, 0, -1, -1, 0}, // (subframe number) 7
{3, -1, 1, 0, 66, 0, -1, -1, 0}, // (subframe number) 1,6
{3, -1, 1, 0, 132, 0, -1, -1, 0}, // (subframe number) 2,7
{3, -1, 1, 0, 264, 0, -1, -1, 0}, // (subframe number) 3,8
{3, -1, 1, 0, 146, 0, -1, -1, 0}, // (subframe number) 1,4,7
{3, -1, 1, 0, 292, 0, -1, -1, 0}, // (subframe number) 2,5,8
{3, -1, 1, 0, 584, 0, -1, -1, 0}, // (subframe number) 3, 6, 9
{3, -1, 1, 0, 341, 0, -1, -1, 0}, // (subframe number) 0,2,4,6,8
{3, -1, 1, 0, 682, 0, -1, -1, 0}, // (subframe number) 1,3,5,7,9
{3, -1, 1, 0, 1023, 0, -1, -1, 0}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0, -1, 16, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{0, -1, 16, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{0, -1, 16, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{0, -1, 16, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{0, -1, 8, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{0, -1, 8, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{0, -1, 8, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{0, -1, 8, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{0, -1, 4, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{0, -1, 4, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{0, -1, 4, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{0, -1, 4, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{0, -1, 2, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{0, -1, 2, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{0, -1, 2, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{0, -1, 2, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{0, -1, 1, 0, 2, 0, 1, 1, 0}, // (subframe number) 1
{0, -1, 1, 0, 16, 0, 1, 1, 0}, // (subframe number) 4
{0, -1, 1, 0, 128, 0, 1, 1, 0}, // (subframe number) 7
{0, -1, 1, 0, 66, 0, 1, 1, 0}, // (subframe number) 1,6
{0, -1, 1, 0, 132, 0, 1, 1, 0}, // (subframe number) 2,7
{0, -1, 1, 0, 264, 0, 1, 1, 0}, // (subframe number) 3,8
{0, -1, 1, 0, 146, 0, 1, 1, 0}, // (subframe number) 1,4,7
{0, -1, 1, 0, 292, 0, 1, 1, 0}, // (subframe number) 2,5,8
{0, -1, 1, 0, 584, 0, 1, 1, 0}, // (subframe number) 3, 6, 9
{0, -1, 1, 0, 341, 0, 1, 1, 0}, // (subframe number) 0,2,4,6,8
{0, -1, 1, 0, 682, 0, 1, 1, 0}, // (subframe number) 1,3,5,7,9
{0, -1, 1, 0, 1023, 0, 1, 1, 0}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{1, -1, 16, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{1, -1, 16, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{1, -1, 16, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{1, -1, 16, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{1, -1, 8, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{1, -1, 8, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{1, -1, 8, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{1, -1, 8, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{1, -1, 4, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{1, -1, 4, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{1, -1, 4, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{1, -1, 4, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{1, -1, 2, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{1, -1, 2, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{1, -1, 2, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{1, -1, 2, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{1, -1, 1, 0, 2, 0, 1, 1, 0}, // (subframe number) 1
{1, -1, 1, 0, 16, 0, 1, 1, 0}, // (subframe number) 4
{1, -1, 1, 0, 128, 0, 1, 1, 0}, // (subframe number) 7
{1, -1, 1, 0, 66, 0, 1, 1, 0}, // (subframe number) 1,6
{1, -1, 1, 0, 132, 0, 1, 1, 0}, // (subframe number) 2,7
{1, -1, 1, 0, 264, 0, 1, 1, 0}, // (subframe number) 3,8
{1, -1, 1, 0, 146, 0, 1, 1, 0}, // (subframe number) 1,4,7
{1, -1, 1, 0, 292, 0, 1, 1, 0}, // (subframe number) 2,5,8
{1, -1, 1, 0, 584, 0, 1, 1, 0}, // (subframe number) 3,6,9
{2, -1, 16, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{2, -1, 8, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{2, -1, 4, 0, 2, 0, 1, 1, 0}, // (subframe number) 1
{2, -1, 2, 0, 2, 0, 1, 1, 0}, // (subframe number) 1
{2, -1, 2, 0, 32, 0, 1, 1, 0}, // (subframe number) 5
{2, -1, 1, 0, 2, 0, 1, 1, 0}, // (subframe number) 1
{2, -1, 1, 0, 32, 0, 1, 1, 0}, // (subframe number) 5
{3, -1, 16, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{3, -1, 16, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{3, -1, 16, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{3, -1, 16, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{3, -1, 8, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{3, -1, 8, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{3, -1, 8, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{3, -1, 4, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{3, -1, 4, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{3, -1, 4, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{3, -1, 4, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{3, -1, 2, 1, 2, 0, 1, 1, 0}, // (subframe number) 1
{3, -1, 2, 1, 16, 0, 1, 1, 0}, // (subframe number) 4
{3, -1, 2, 1, 128, 0, 1, 1, 0}, // (subframe number) 7
{3, -1, 2, 1, 512, 0, 1, 1, 0}, // (subframe number) 9
{3, -1, 1, 0, 2, 0, 1, 1, 0}, // (subframe number) 1
{3, -1, 1, 0, 16, 0, 1, 1, 0}, // (subframe number) 4
{3, -1, 1, 0, 128, 0, 1, 1, 0}, // (subframe number) 7
{3, -1, 1, 0, 66, 0, 1, 1, 0}, // (subframe number) 1,6
{3, -1, 1, 0, 132, 0, 1, 1, 0}, // (subframe number) 2,7
{3, -1, 1, 0, 264, 0, 1, 1, 0}, // (subframe number) 3,8
{3, -1, 1, 0, 146, 0, 1, 1, 0}, // (subframe number) 1,4,7
{3, -1, 1, 0, 292, 0, 1, 1, 0}, // (subframe number) 2,5,8
{3, -1, 1, 0, 584, 0, 1, 1, 0}, // (subframe number) 3, 6, 9
{3, -1, 1, 0, 341, 0, 1, 1, 0}, // (subframe number) 0,2,4,6,8
{3, -1, 1, 0, 682, 0, 1, 1, 0}, // (subframe number) 1,3,5,7,9
{3, -1, 1, 0, 1023, 0, 1, 1, 0}, // (subframe number) 0,1,2,3,4,5,6,7,8,9
{0xa1, -1, 16, 0, 528, 0, 1, 6, 2}, // (subframe number) 4,9
{0xa1, -1, 16, 1, 16, 0, 2, 6, 2}, // (subframe number) 4
{0xa1, -1, 8, 0, 528, 0, 1, 6, 2}, // (subframe number) 4,9
@@ -416,73 +417,73 @@ int64_t table_6_3_3_2_2_prachConfig_Index [256][9] = {
// Table 6.3.3.2-3: Random access configurations for FR1 and unpaired spectrum
int64_t table_6_3_3_2_3_prachConfig_Index [256][9] = {
//format, format, x, y, SFN_nbr, star_symb, slots_sfn, occ_slot, duration
{0, -1, 16, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 8, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 4, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 2, 0, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 2, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 2, 0, 16, 0, -1, -1, 0}, // (subrame number 4)
{0, -1, 2, 1, 16, 0, -1, -1, 0}, // (subrame number 4)
{0, -1, 1, 0, 512, 0, -1, -1, 0}, // (subrame number 9)
{0, -1, 1, 0, 256, 0, -1, -1, 0}, // (subrame number 8)
{0, -1, 1, 0, 128, 0, -1, -1, 0}, // (subrame number 7)
{0, -1, 1, 0, 64, 0, -1, -1, 0}, // (subrame number 6)
{0, -1, 1, 0, 32, 0, -1, -1, 0}, // (subrame number 5)
{0, -1, 1, 0, 16, 0, -1, -1, 0}, // (subrame number 4)
{0, -1, 1, 0, 8, 0, -1, -1, 0}, // (subrame number 3)
{0, -1, 1, 0, 4, 0, -1, -1, 0}, // (subrame number 2)
{0, -1, 1, 0, 66, 0, -1, -1, 0}, // (subrame number 1,6)
{0, -1, 1, 0, 66, 7, -1, -1, 0}, // (subrame number 1,6)
{0, -1, 1, 0, 528, 0, -1, -1, 0}, // (subrame number 4,9)
{0, -1, 1, 0, 264, 0, -1, -1, 0}, // (subrame number 3,8)
{0, -1, 1, 0, 132, 0, -1, -1, 0}, // (subrame number 2,7)
{0, -1, 1, 0, 768, 0, -1, -1, 0}, // (subrame number 8,9)
{0, -1, 1, 0, 784, 0, -1, -1, 0}, // (subrame number 4,8,9)
{0, -1, 1, 0, 536, 0, -1, -1, 0}, // (subrame number 3,4,9)
{0, -1, 1, 0, 896, 0, -1, -1, 0}, // (subrame number 7,8,9)
{0, -1, 1, 0, 792, 0, -1, -1, 0}, // (subrame number 3,4,8,9)
{0, -1, 1, 0, 960, 0, -1, -1, 0}, // (subrame number 6,7,8,9)
{0, -1, 1, 0, 594, 0, -1, -1, 0}, // (subrame number 1,4,6,9)
{0, -1, 1, 0, 682, 0, -1, -1, 0}, // (subrame number 1,3,5,7,9)
{1, -1, 16, 1, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 8, 1, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 4, 1, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 2, 0, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 2, 1, 128, 0, -1, -1, 0}, // (subrame number 7)
{1, -1, 1, 0, 128, 0, -1, -1, 0}, // (subrame number 7)
{2, -1, 16, 1, 64, 0, -1, -1, 0}, // (subrame number 6)
{2, -1, 8, 1, 64, 0, -1, -1, 0}, // (subrame number 6)
{2, -1, 4, 1, 64, 0, -1, -1, 0}, // (subrame number 6)
{2, -1, 2, 0, 64, 7, -1, -1, 0}, // (subrame number 6)
{2, -1, 2, 1, 64, 7, -1, -1, 0}, // (subrame number 6)
{2, -1, 1, 0, 64, 7, -1, -1, 0}, // (subrame number 6)
{3, -1, 16, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 8, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 4, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 2, 0, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 2, 1, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 2, 0, 16, 0, -1, -1, 0}, // (subrame number 4)
{3, -1, 2, 1, 16, 0, -1, -1, 0}, // (subrame number 4)
{3, -1, 1, 0, 512, 0, -1, -1, 0}, // (subrame number 9)
{3, -1, 1, 0, 256, 0, -1, -1, 0}, // (subrame number 8)
{3, -1, 1, 0, 128, 0, -1, -1, 0}, // (subrame number 7)
{3, -1, 1, 0, 64, 0, -1, -1, 0}, // (subrame number 6)
{3, -1, 1, 0, 32, 0, -1, -1, 0}, // (subrame number 5)
{3, -1, 1, 0, 16, 0, -1, -1, 0}, // (subrame number 4)
{3, -1, 1, 0, 8, 0, -1, -1, 0}, // (subrame number 3)
{3, -1, 1, 0, 4, 0, -1, -1, 0}, // (subrame number 2)
{3, -1, 1, 0, 66, 0, -1, -1, 0}, // (subrame number 1,6)
{3, -1, 1, 0, 66, 7, -1, -1, 0}, // (subrame number 1,6)
{3, -1, 1, 0, 528, 0, -1, -1, 0}, // (subrame number 4,9)
{3, -1, 1, 0, 264, 0, -1, -1, 0}, // (subrame number 3,8)
{3, -1, 1, 0, 132, 0, -1, -1, 0}, // (subrame number 2,7)
{3, -1, 1, 0, 768, 0, -1, -1, 0}, // (subrame number 8,9)
{3, -1, 1, 0, 784, 0, -1, -1, 0}, // (subrame number 4,8,9)
{3, -1, 1, 0, 536, 0, -1, -1, 0}, // (subrame number 3,4,9)
{3, -1, 1, 0, 896, 0, -1, -1, 0}, // (subrame number 7,8,9)
{3, -1, 1, 0, 792, 0, -1, -1, 0}, // (subrame number 3,4,8,9)
{3, -1, 1, 0, 594, 0, -1, -1, 0}, // (subrame number 1,4,6,9)
{3, -1, 1, 0, 682, 0, -1, -1, 0}, // (subrame number 1,3,5,7,9)
{0, -1, 16, 1, 512, 0, 1, 1, 0}, // (subrame number 9)
{0, -1, 8, 1, 512, 0, 1, 1, 0}, // (subrame number 9)
{0, -1, 4, 1, 512, 0, 1, 1, 0}, // (subrame number 9)
{0, -1, 2, 0, 512, 0, 1, 1, 0}, // (subrame number 9)
{0, -1, 2, 1, 512, 0, 1, 1, 0}, // (subrame number 9)
{0, -1, 2, 0, 16, 0, 1, 1, 0}, // (subrame number 4)
{0, -1, 2, 1, 16, 0, 1, 1, 0}, // (subrame number 4)
{0, -1, 1, 0, 512, 0, 1, 1, 0}, // (subrame number 9)
{0, -1, 1, 0, 256, 0, 1, 1, 0}, // (subrame number 8)
{0, -1, 1, 0, 128, 0, 1, 1, 0}, // (subrame number 7)
{0, -1, 1, 0, 64, 0, 1, 1, 0}, // (subrame number 6)
{0, -1, 1, 0, 32, 0, 1, 1, 0}, // (subrame number 5)
{0, -1, 1, 0, 16, 0, 1, 1, 0}, // (subrame number 4)
{0, -1, 1, 0, 8, 0, 1, 1, 0}, // (subrame number 3)
{0, -1, 1, 0, 4, 0, 1, 1, 0}, // (subrame number 2)
{0, -1, 1, 0, 66, 0, 1, 1, 0}, // (subrame number 1,6)
{0, -1, 1, 0, 66, 7, 1, 1, 0}, // (subrame number 1,6)
{0, -1, 1, 0, 528, 0, 1, 1, 0}, // (subrame number 4,9)
{0, -1, 1, 0, 264, 0, 1, 1, 0}, // (subrame number 3,8)
{0, -1, 1, 0, 132, 0, 1, 1, 0}, // (subrame number 2,7)
{0, -1, 1, 0, 768, 0, 1, 1, 0}, // (subrame number 8,9)
{0, -1, 1, 0, 784, 0, 1, 1, 0}, // (subrame number 4,8,9)
{0, -1, 1, 0, 536, 0, 1, 1, 0}, // (subrame number 3,4,9)
{0, -1, 1, 0, 896, 0, 1, 1, 0}, // (subrame number 7,8,9)
{0, -1, 1, 0, 792, 0, 1, 1, 0}, // (subrame number 3,4,8,9)
{0, -1, 1, 0, 960, 0, 1, 1, 0}, // (subrame number 6,7,8,9)
{0, -1, 1, 0, 594, 0, 1, 1, 0}, // (subrame number 1,4,6,9)
{0, -1, 1, 0, 682, 0, 1, 1, 0}, // (subrame number 1,3,5,7,9)
{1, -1, 16, 1, 128, 0, 1, 1, 0}, // (subrame number 7)
{1, -1, 8, 1, 128, 0, 1, 1, 0}, // (subrame number 7)
{1, -1, 4, 1, 128, 0, 1, 1, 0}, // (subrame number 7)
{1, -1, 2, 0, 128, 0, 1, 1, 0}, // (subrame number 7)
{1, -1, 2, 1, 128, 0, 1, 1, 0}, // (subrame number 7)
{1, -1, 1, 0, 128, 0, 1, 1, 0}, // (subrame number 7)
{2, -1, 16, 1, 64, 0, 1, 1, 0}, // (subrame number 6)
{2, -1, 8, 1, 64, 0, 1, 1, 0}, // (subrame number 6)
{2, -1, 4, 1, 64, 0, 1, 1, 0}, // (subrame number 6)
{2, -1, 2, 0, 64, 7, 1, 1, 0}, // (subrame number 6)
{2, -1, 2, 1, 64, 7, 1, 1, 0}, // (subrame number 6)
{2, -1, 1, 0, 64, 7, 1, 1, 0}, // (subrame number 6)
{3, -1, 16, 1, 512, 0, 1, 1, 0}, // (subrame number 9)
{3, -1, 8, 1, 512, 0, 1, 1, 0}, // (subrame number 9)
{3, -1, 4, 1, 512, 0, 1, 1, 0}, // (subrame number 9)
{3, -1, 2, 0, 512, 0, 1, 1, 0}, // (subrame number 9)
{3, -1, 2, 1, 512, 0, 1, 1, 0}, // (subrame number 9)
{3, -1, 2, 0, 16, 0, 1, 1, 0}, // (subrame number 4)
{3, -1, 2, 1, 16, 0, 1, 1, 0}, // (subrame number 4)
{3, -1, 1, 0, 512, 0, 1, 1, 0}, // (subrame number 9)
{3, -1, 1, 0, 256, 0, 1, 1, 0}, // (subrame number 8)
{3, -1, 1, 0, 128, 0, 1, 1, 0}, // (subrame number 7)
{3, -1, 1, 0, 64, 0, 1, 1, 0}, // (subrame number 6)
{3, -1, 1, 0, 32, 0, 1, 1, 0}, // (subrame number 5)
{3, -1, 1, 0, 16, 0, 1, 1, 0}, // (subrame number 4)
{3, -1, 1, 0, 8, 0, 1, 1, 0}, // (subrame number 3)
{3, -1, 1, 0, 4, 0, 1, 1, 0}, // (subrame number 2)
{3, -1, 1, 0, 66, 0, 1, 1, 0}, // (subrame number 1,6)
{3, -1, 1, 0, 66, 7, 1, 1, 0}, // (subrame number 1,6)
{3, -1, 1, 0, 528, 0, 1, 1, 0}, // (subrame number 4,9)
{3, -1, 1, 0, 264, 0, 1, 1, 0}, // (subrame number 3,8)
{3, -1, 1, 0, 132, 0, 1, 1, 0}, // (subrame number 2,7)
{3, -1, 1, 0, 768, 0, 1, 1, 0}, // (subrame number 8,9)
{3, -1, 1, 0, 784, 0, 1, 1, 0}, // (subrame number 4,8,9)
{3, -1, 1, 0, 536, 0, 1, 1, 0}, // (subrame number 3,4,9)
{3, -1, 1, 0, 896, 0, 1, 1, 0}, // (subrame number 7,8,9)
{3, -1, 1, 0, 792, 0, 1, 1, 0}, // (subrame number 3,4,8,9)
{3, -1, 1, 0, 594, 0, 1, 1, 0}, // (subrame number 1,4,6,9)
{3, -1, 1, 0, 682, 0, 1, 1, 0}, // (subrame number 1,3,5,7,9)
{0xa1, -1, 16, 1, 512, 0, 2, 6, 2}, // (subrame number 9)
{0xa1, -1, 8, 1, 512, 0, 2, 6, 2}, // (subrame number 9)
{0xa1, -1, 4, 1, 512, 0, 1, 6, 2}, // (subrame number 9)
@@ -1418,7 +1419,7 @@ uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
else {
r = L_ra/NCS;
found_sequences = (nb_preambles/r) + (nb_preambles%r!=0); //ceil(nb_preambles/r)
printf(" found_sequences %u\n", found_sequences);
LOG_D(MAC, "Computing NR root sequences: found %u sequences\n", found_sequences);
return (found_sequences);
}
}
@@ -1456,12 +1457,17 @@ uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
AssertFatal(1==0,"Procedure to find nb of sequences for restricted type B not implemented yet");
}
}
printf(" found_sequences %u\n", found_sequences);
LOG_D(MAC, "Computing NR root sequences: found %u sequences\n", found_sequences);
return found_sequences;
}
}
// Table 5.2-1 NR operating bands in FR1 & FR2 (3GPP TS 38.101)
// Table 5.4.2.3-1 Applicable NR-ARFCN per operating band in FR1 & FR2 (3GPP TS 38.101)
// Notes:
// - N_OFFs for bands from 80 to 89 and band 95 is referred to UL
// - Frequencies are expressed in KHz
// - col: NR_band ul_min ul_max dl_min dl_max step N_OFFs_DL deltaf_raster
nr_bandentry_t nr_bandtable[] = {
{1, 1920000, 1980000, 2110000, 2170000, 20, 422000, 100},
{2, 1850000, 1910000, 1930000, 1990000, 20, 386000, 100},
@@ -1470,17 +1476,27 @@ nr_bandentry_t nr_bandtable[] = {
{7, 2500000, 2570000, 2620000, 2690000, 20, 524000, 100},
{8, 880000, 915000, 925000, 960000, 20, 185000, 100},
{12, 698000, 716000, 729000, 746000, 20, 145800, 100},
{14, 788000, 798000, 758000, 768000, 20, 151600, 100},
{18, 815000, 830000, 860000, 875000, 20, 172000, 100},
{20, 832000, 862000, 791000, 821000, 20, 158200, 100},
{25, 1850000, 1915000, 1930000, 1995000, 20, 386000, 100},
{26, 814000, 849000, 859000, 894000, 20, 171800, 100},
{28, 703000, 758000, 758000, 813000, 20, 151600, 100},
{29, 000, 000, 717000, 728000, 20, 143400, 100},
{30, 2305000, 2315000, 2350000, 2360000, 20, 470000, 100},
{34, 2010000, 2025000, 2010000, 2025000, 20, 402000, 100},
{38, 2570000, 2620000, 2570000, 2630000, 20, 514000, 100},
{39, 1880000, 1920000, 1880000, 1920000, 20, 376000, 100},
{40, 2300000, 2400000, 2300000, 2400000, 20, 460000, 100},
{41, 2496000, 2690000, 2496000, 2690000, 3, 499200, 15},
{41, 2496000, 2690000, 2496000, 2690000, 6, 499200, 30},
{47, 5855000, 5925000, 5855000, 5925000, 1, 790334, 15},
//{48, 3550000, 3700000, 3550000, 3700000, 1, 636667, 15},
//{48, 3550000, 3700000, 3550000, 3700000, 2, 636668, 30},
{50, 1432000, 1517000, 1432000, 1517000, 20, 286400, 100},
{51, 1427000, 1432000, 1427000, 1432000, 20, 285400, 100},
{53, 2483500, 2495000, 2483500, 2495000, 20, 496700, 100},
{65, 1920000, 2010000, 2110000, 2200000, 20, 422000, 100},
{66, 1710000, 1780000, 2110000, 2200000, 20, 422000, 100},
{70, 1695000, 1710000, 1995000, 2020000, 20, 399000, 100},
{71, 663000, 698000, 617000, 652000, 20, 123400, 100},
@@ -1499,6 +1515,15 @@ nr_bandentry_t nr_bandtable[] = {
{83, 703000, 748000, 000, 000, 20, 140600, 100},
{84, 1920000, 1980000, 000, 000, 20, 384000, 100},
{86, 1710000, 1785000, 000, 000, 20, 342000, 100},
{89, 824000, 849000, 000, 000, 20, 342000, 100},
{90, 2496000, 2690000, 2496000, 2690000, 3, 499200, 15},
{90, 2496000, 2690000, 2496000, 2690000, 6, 499200, 30},
{90, 2496000, 2690000, 2496000, 2690000, 20, 499200, 100},
{91, 832000, 862000, 1427000, 1432000, 20, 285400, 100},
{92, 832000, 862000, 1432000, 1517000, 20, 286400, 100},
{93, 880000, 915000, 1427000, 1432000, 20, 285400, 100},
{94, 880000, 915000, 1432000, 1517000, 20, 286400, 100},
{95, 2010000, 2025000, 000, 000, 20, 402000, 100},
{257,26500020,29500000,26500020,29500000, 1,2054166, 60},
{257,26500080,29500000,26500080,29500000, 2,2054167, 120},
{258,24250080,27500000,24250080,27500000, 1,2016667, 60},
@@ -1552,46 +1577,58 @@ int32_t table_6_4_1_1_3_4_pusch_dmrs_positions_l [12][8] = {
#define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t))
void get_band(uint64_t downlink_frequency,
uint16_t *current_band,
int32_t *current_offset,
lte_frame_type_t *current_type)
{
int ind;
uint64_t center_frequency_khz;
uint64_t center_freq_diff_khz;
uint64_t dl_freq_khz = downlink_frequency/1000;
// Returns the corresponding row index of the NR table
int get_nr_table_idx(int nr_bandP, uint8_t scs_index){
center_freq_diff_khz = 999999999999999999; // 2^64
*current_band = 0;
int i, j;
int scs_khz = 15 << scs_index;
int supplementary_bands[] = {29,75,76,80,81,82,83,84,86,89,95};
size_t s = sizeof(supplementary_bands)/sizeof(supplementary_bands[0]);
for ( ind=0;
ind < sizeof(nr_bandtable) / sizeof(nr_bandtable[0]);
ind++) {
for(j = 0; j < s; j++){
if (nr_bandP == supplementary_bands[j])
AssertFatal(0 == 1, "Band %d is a supplementary band (%d). This is not supported yet.\n", nr_bandP, supplementary_bands[j]);
}
LOG_I(PHY, "Scanning band %d, dl_min %"PRIu64", ul_min %"PRIu64"\n", nr_bandtable[ind].band, nr_bandtable[ind].dl_min,nr_bandtable[ind].ul_min);
AssertFatal(nr_bandP <= nr_bandtable[NR_BANDTABLE_SIZE-1].band, "NR band %d exceeds NR bands table maximum limit %d\n", nr_bandP, nr_bandtable[NR_BANDTABLE_SIZE-1].band);
for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
if ( nr_bandtable[ind].dl_min <= dl_freq_khz && nr_bandtable[ind].dl_max >= dl_freq_khz ) {
// selection of correct Deltaf raster according to SCS
if ((nr_bandtable[i].deltaf_raster != 100) && (nr_bandtable[i].deltaf_raster != scs_khz))
i++;
center_frequency_khz = (nr_bandtable[ind].dl_max + nr_bandtable[ind].dl_min)/2;
if (abs(dl_freq_khz - center_frequency_khz) < center_freq_diff_khz){
*current_band = nr_bandtable[ind].band;
*current_offset = (nr_bandtable[ind].ul_min - nr_bandtable[ind].dl_min)*1000;
center_freq_diff_khz = abs(dl_freq_khz - center_frequency_khz);
LOG_D(PHY, "NR band table index %d (Band %d, dl_min %lu, ul_min %lu)\n", i, nr_bandtable[i].band, nr_bandtable[i].dl_min,nr_bandtable[i].ul_min);
if (*current_offset == 0)
*current_type = TDD;
else
*current_type = FDD;
}
}
}
return i;
LOG_I( PHY, "DL frequency %"PRIu64": band %d, frame_type %d, UL frequency %"PRIu64"\n",
downlink_frequency, *current_band, *current_type, downlink_frequency+*current_offset);
}
// Computes the duplex spacing (either positive or negative) in KHz
void get_delta_duplex(int nr_bandP, uint8_t scs_index, int32_t *delta_duplex){
int nr_table_idx = get_nr_table_idx(nr_bandP, scs_index);
*delta_duplex = (nr_bandtable[nr_table_idx].ul_min - nr_bandtable[nr_table_idx].dl_min);
LOG_D(PHY, "NR band duplex spacing is %d KHz (nr_bandtable[%d].band = %d)\n", *delta_duplex, nr_table_idx, nr_bandtable[nr_table_idx].band);
}
void get_frame_type(uint16_t current_band,
uint8_t scs_index,
lte_frame_type_t *current_type){
int32_t current_offset;
get_delta_duplex(current_band, scs_index, &current_offset);
current_offset *= 1000;
if (current_offset == 0)
*current_type = TDD;
else
*current_type = FDD;
LOG_I(MAC, "NR band %d, duplex mode %s, duplex spacing = %d KHz\n", current_band, duplex_mode[*current_type], current_offset);
AssertFatal(*current_band != 0,
"Can't find EUTRA band for frequency %lu\n", downlink_frequency);
}
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band)
@@ -1707,6 +1744,15 @@ uint16_t config_bandwidth(int mu, int nb_rb, int nr_band)
}
void get_delta_arfcn(int i, uint32_t nrarfcn, uint64_t N_OFFs){
uint32_t delta_arfcn = nrarfcn - N_OFFs;
if(delta_arfcn%(nr_bandtable[i].step_size)!=0)
AssertFatal(1 == 0, "nrarfcn %u is not on the channel raster for step size %lu", nrarfcn, nr_bandtable[i].step_size);
}
uint32_t to_nrarfcn(int nr_bandP,
uint64_t dl_CarrierFreq,
uint8_t scs_index,
@@ -1714,17 +1760,10 @@ uint32_t to_nrarfcn(int nr_bandP,
{
uint64_t dl_CarrierFreq_by_1k = dl_CarrierFreq / 1000;
int bw_kHz = bw / 1000;
int scs_khz = 15<<scs_index;
int i;
uint32_t nrarfcn, delta_arfcn;
uint32_t nrarfcn;
int i = get_nr_table_idx(nr_bandP, scs_index);
LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
AssertFatal(nr_bandP <= 261, "nr_band %d > 260\n", nr_bandP);
for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
// selection of correct Deltaf raster according to SCS
if ( (nr_bandtable[i].deltaf_raster != 100) && (nr_bandtable[i].deltaf_raster != scs_khz))
i++;
AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min,
"Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n",
@@ -1753,70 +1792,73 @@ uint32_t to_nrarfcn(int nr_bandP,
// This is equation before Table 5.4.2.1-1 in 38101-1-f30
// F_REF=F_REF_Offs + deltaF_Global(N_REF-NREF_REF_Offs)
nrarfcn = (((dl_CarrierFreq_by_1k - F_REF_Offs_khz)/deltaFglobal)+N_REF_Offs);
delta_arfcn = nrarfcn - nr_bandtable[i].N_OFFs_DL;
if(delta_arfcn%(nr_bandtable[i].step_size)!=0)
AssertFatal(1==0,"dl_CarrierFreq %lu corresponds to %u which is not on the raster for step size %lu",
dl_CarrierFreq,nrarfcn,nr_bandtable[i].step_size);
get_delta_arfcn(i, nrarfcn, nr_bandtable[i].N_OFFs_DL);
return nrarfcn;
}
// This function computes the RF reference frequency from the NR-ARFCN according to 5.4.2.1 of 3GPP TS 38.104
// this function applies to both DL and UL
uint64_t from_nrarfcn(int nr_bandP,
uint8_t scs_index,
uint32_t dl_nrarfcn)
uint32_t nrarfcn)
{
int i;
int deltaFglobal = 5;
uint32_t N_REF_Offs = 0;
uint64_t F_REF_Offs_khz = 0;
int scs_khz = 15<<scs_index;
uint32_t delta_arfcn;
int32_t delta_duplex;
uint64_t N_OFFs, frequency, freq_min;
int i = get_nr_table_idx(nr_bandP, scs_index);
if (dl_nrarfcn > 599999 && dl_nrarfcn < 2016667) {
if (nrarfcn > 599999 && nrarfcn < 2016667) {
deltaFglobal = 15;
N_REF_Offs = 600000;
F_REF_Offs_khz = 3000000;
}
if (dl_nrarfcn > 2016666 && dl_nrarfcn < 3279166) {
if (nrarfcn > 2016666 && nrarfcn < 3279166) {
deltaFglobal = 60;
N_REF_Offs = 2016667;
F_REF_Offs_khz = 24250080;
}
AssertFatal(nr_bandP <= 261, "nr_band %d > 260\n", nr_bandP);
for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL[%d] %llu\n",dl_nrarfcn, nr_bandtable[i].band,(long long unsigned int)nr_bandtable[i].N_OFFs_DL);
// selection of correct Deltaf raster according to SCS
if ( (nr_bandtable[i].deltaf_raster != 100) && (nr_bandtable[i].deltaf_raster != scs_khz))
i++;
delta_arfcn = dl_nrarfcn - nr_bandtable[i].N_OFFs_DL;
if(delta_arfcn%(nr_bandtable[i].step_size)!=0)
AssertFatal(1==0,"dl_nrarfcn %u is not on the raster for step size %lu",dl_nrarfcn,nr_bandtable[i].step_size);
get_delta_duplex(nr_bandP, scs_index, &delta_duplex);
LOG_I(PHY,"Computing dl_frequency (arfcn %llu => %llu)\n",
(unsigned long long)dl_nrarfcn,
(unsigned long long)(1000*(F_REF_Offs_khz + (dl_nrarfcn - N_REF_Offs) * deltaFglobal)));
if (delta_duplex <= 0){ // DL band >= UL band
if (nrarfcn >= nr_bandtable[i].N_OFFs_DL){ // is TDD of FDD DL
N_OFFs = nr_bandtable[i].N_OFFs_DL;
freq_min = nr_bandtable[i].dl_min;
} else {// is FDD UL
N_OFFs = nr_bandtable[i].N_OFFs_DL + delta_duplex/deltaFglobal;
freq_min = nr_bandtable[i].ul_min;
}
} else { // UL band > DL band
if (nrarfcn >= nr_bandtable[i].N_OFFs_DL + delta_duplex/deltaFglobal){ // is FDD UL
N_OFFs = nr_bandtable[i].N_OFFs_DL + delta_duplex/deltaFglobal;
freq_min = nr_bandtable[i].ul_min;
} else { // is FDD DL
N_OFFs = nr_bandtable[i].N_OFFs_DL;
freq_min = nr_bandtable[i].dl_min;
}
}
LOG_D(MAC, "Frequency from NR-ARFCN for N_OFFs %lu, duplex spacing %d KHz, deltaFglobal %d KHz\n", N_OFFs, delta_duplex, deltaFglobal);
AssertFatal(nrarfcn >= N_OFFs,"nrarfcn %u < N_OFFs[%d] %llu\n", nrarfcn, nr_bandtable[i].band, (long long unsigned int)N_OFFs);
get_delta_arfcn(i, nrarfcn, N_OFFs);
frequency = 1000*(F_REF_Offs_khz + (nrarfcn - N_REF_Offs) * deltaFglobal);
LOG_I(MAC, "Computing frequency (pointA %llu => %llu KHz (freq_min %llu KHz, NR band %d N_OFFs %llu))\n",
(unsigned long long)nrarfcn,
(unsigned long long)frequency/1000,
(unsigned long long)freq_min,
nr_bandP,
(unsigned long long)N_OFFs);
return frequency;
return 1000*(F_REF_Offs_khz + (dl_nrarfcn - N_REF_Offs) * deltaFglobal);
}
int32_t get_nr_uldl_offset(int nr_bandP)
{
int i;
for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(i < NR_BANDTABLE_SIZE, "i %d >= BANDTABLE_SIZE %ld\n", i, NR_BANDTABLE_SIZE);
return (nr_bandtable[i].dl_min - nr_bandtable[i].ul_min);
}
void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
int x_overhead,
uint8_t numdmrscdmgroupnodata,
@@ -1897,7 +1939,7 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51311[Imcs][0]);
break;
@@ -1905,7 +1947,7 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_51312[Imcs][0]);
break;
@@ -1913,13 +1955,14 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51313[Imcs][0]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [0,2])\n", table_idx);
LOG_E(MAC, "Invalid MCS table index %d (expected in range [0,2])\n", table_idx);
return 0;
}
}
@@ -1928,7 +1971,7 @@ uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51311[Imcs][1]);
break;
@@ -1936,7 +1979,7 @@ uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_51312[Imcs][1]);
break;
@@ -1944,13 +1987,14 @@ uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51313[Imcs][1]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [0,2])\n", table_idx);
LOG_E(MAC, "Invalid MCS table index %d (expected in range [0,2])\n", table_idx);
return 0;
}
}
@@ -1959,7 +2003,7 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51311[Imcs][0]);
break;
@@ -1967,7 +2011,7 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_51312[Imcs][0]);
break;
@@ -1975,7 +2019,7 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51313[Imcs][0]);
break;
@@ -1983,7 +2027,7 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 3:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_61411[Imcs][0]);
break;
@@ -1991,13 +2035,14 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 4:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_61412[Imcs][0]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [0,4])\n", table_idx);
LOG_E(MAC, "Invalid MCS table index %d (expected in range [0,4])\n", table_idx);
return 0;
}
}
@@ -2006,7 +2051,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51311[Imcs][1]);
break;
@@ -2014,7 +2059,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_51312[Imcs][1]);
break;
@@ -2022,7 +2067,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51313[Imcs][1]);
break;
@@ -2030,7 +2075,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 3:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_61411[Imcs][1]);
break;
@@ -2038,13 +2083,14 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 4:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_61412[Imcs][1]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [0,4])\n", table_idx);
LOG_E(MAC, "Invalid MCS table index %d (expected in range [0,4])\n", table_idx);
return 0;
}
}
@@ -96,7 +96,9 @@ typedef enum {
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
void get_band(uint64_t downlink_frequency, uint16_t *current_band, int32_t *current_offset, lte_frame_type_t *current_type);
void get_frame_type(uint16_t nr_bandP, uint8_t scs_index, lte_frame_type_t *current_type);
void get_delta_duplex(int nr_bandP, uint8_t scs_index, int32_t *delta_duplex);
uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
+4 -11
View File
@@ -147,13 +147,14 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
fapi_nr_config_request_t *cfg = &mac->phy_config.config_req;
NR_ServingCellConfigCommon_t *scc = mac->scc;
int i;
lte_frame_type_t frame_type;
mac->phy_config.Mod_id = module_id;
mac->phy_config.CC_id = cc_idP;
// carrier config
LOG_I(MAC,"UE Config Common\n");
LOG_I(MAC, "Entering UE Config Common\n");
cfg->carrier_config.dl_bandwidth = config_bandwidth(scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
@@ -200,15 +201,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
}
}
lte_frame_type_t frame_type;
uint16_t band;
int32_t offset;
get_band((uint64_t)(cfg->carrier_config.dl_frequency)*1000,
&band,
&offset,
&frame_type);
get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing, &frame_type);
// cell config
@@ -259,8 +252,8 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
"scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n");
cfg->tdd_table.tdd_period = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
}
LOG_I(MAC,"Setting TDD configuration period to %d\n",cfg->tdd_table.tdd_period);
if(cfg->cell_config.frame_duplex_type == TDD){
LOG_I(MAC,"Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period);
int return_tdd = set_tdd_config_nr_ue(cfg,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
+1 -1
View File
@@ -252,7 +252,7 @@ typedef struct {
uint8_t generate_nr_prach;
//// FAPI-like interface message
fapi_nr_ul_config_request_t ul_config_request;
fapi_nr_ul_config_request_t *ul_config_request;
fapi_nr_dl_config_request_t dl_config_request;
/// Interface module instances
+2 -2
View File
@@ -119,8 +119,8 @@ uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format);
int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index,fapi_nr_dci_indication_pdu_t *dci);
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format);
int nr_ue_process_dci_indication_pdu(module_id_t module_id, int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci);
uint32_t get_ssb_frame(uint32_t test);
uint32_t get_ssb_slot(uint32_t ssb_index);
+15 -4
View File
@@ -57,10 +57,21 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst)
if (IS_SOFTMODEM_NOS1){
if (rlc_module_init(0) != 0) {
LOG_I(RLC, "Problem at RLC initiation \n");
}
pdcp_layer_init();
nr_DRB_preconfiguration();
LOG_I(RLC, "Problem at RLC initiation \n");
}
pdcp_layer_init();
nr_DRB_preconfiguration();
}
// Allocate memory for ul_config_request in the mac instance. This is now a pointer and will
// point to a list of structures (one for each UL slot) to store PUSCH scheduling parameters
// received from UL DCI.
if (nr_ue_mac_inst->scc) {
int num_slots_ul = nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0)
num_slots_ul++;
LOG_D(MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul);
nr_ue_mac_inst->ul_config_request = (fapi_nr_ul_config_request_t *)calloc(num_slots_ul, sizeof(fapi_nr_ul_config_request_t));
}
}
else LOG_I(MAC,"Running without RRC instance\n");
+243 -154
View File
@@ -1346,6 +1346,61 @@ uint32_t get_ssb_frame(uint32_t test){
return test;
}
/*
* This function returns the slot offset K2 corresponding to a given time domain
* indication value from RRC configuration.
*/
long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
long k2 = -1;
// Get K2 from RRC configuration
NR_PUSCH_Config_t *pusch_config=mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (pusch_config->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = pusch_config->pusch_TimeDomainAllocationList->choice.setup;
}
else if (mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
if (pusch_TimeDomainAllocationList) {
if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) {
LOG_E(MAC, "time_domain_ind %d >= pusch->TimeDomainAllocationList->list.count %d\n",
time_domain_ind, pusch_TimeDomainAllocationList->list.count);
return -1;
}
k2 = *pusch_TimeDomainAllocationList->list.array[time_domain_ind]->k2;
}
LOG_D(MAC, "get_k2(): k2 is %ld\n", k2);
return k2;
}
/*
* This function returns the UL config corresponding to a given UL slot
* from MAC instance .
*/
fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot) {
//Check if request to access ul_config is for a UL slot
if (is_nr_UL_slot(mac->scc, slot) == 0) {
LOG_W(MAC, "Slot %d is not a UL slot. get_ul_config_request() called for wrong slot!!!\n", slot);
return NULL;
}
// Calculate the index of the UL slot in mac->ul_config_request list. This is
// based on the TDD pattern (slot configuration period) and number of UL+mixed
// slots in the period. TS 38.213 Sec 11.1
int mu = mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
NR_TDD_UL_DL_Pattern_t *tdd_pattern = &mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0);
int index = slot + num_slots_ul - num_slots_per_tdd;
LOG_D(MAC, "nr_ue_procedures: get_ul_config_request() slots per tdd %d, num_slots_ul %d, index %d\n",
num_slots_per_tdd,
num_slots_ul,
index);
return &mac->ul_config_request[index];
}
// Performs :
// 1. TODO: Call RRC for link status return to PHY
// 2. TODO: Perform SR/BSR procedures for scheduling feedback
@@ -1451,7 +1506,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
}
} else if (ul_info) {
if (get_softmodem_params()->phy_test && ul_info->slot_tx == 8) { // ULSCH is handled only in phy-test mode (consistently with OAI gNB)
// ULSCH is handled only in phy-test mode (consistently with OAI gNB)
if (get_softmodem_params()->phy_test) {
uint8_t nb_dmrs_re_per_rb;
uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES];
@@ -1470,168 +1526,141 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
uint8_t access_mode = SCHEDULED_ACCESS;
// program PUSCH with UL DCI parameters
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
fapi_nr_tx_request_t tx_req;
fapi_nr_tx_request_body_t tx_req_body;
fapi_nr_ul_config_request_t *ul_config = &dcireq.ul_config_req;
nfapi_nr_ue_ptrs_ports_t ptrs_ports_list;
fapi_nr_ul_config_request_t *ul_config_req = get_ul_config_request(mac, slot_tx);
fapi_nr_ul_config_request_pdu_t *ulcfg_pdu = &mac->ul_config_request.ul_config_list[0];
// Schedule ULSCH only if the current frame and slot match those in ul_config_req
// AND if a UL DCI has been received (as indicated by num_pdus).
if ((frame_tx == ul_config_req->sfn && slot_tx == ul_config_req->slot) &&
ul_config_req->number_pdus > 0) {
// program PUSCH with UL DCI parameters
nr_scheduled_response_t scheduled_response;
fapi_nr_tx_request_t tx_req;
nfapi_nr_ue_ptrs_ports_t ptrs_ports_list;
uint16_t rnti = ulcfg_pdu->pusch_config_pdu.rnti;
uint32_t rb_size = ulcfg_pdu->pusch_config_pdu.rb_size;
uint32_t rb_start = ulcfg_pdu->pusch_config_pdu.rb_start;
uint8_t nr_of_symbols = ulcfg_pdu->pusch_config_pdu.nr_of_symbols;
uint8_t start_symbol_index = ulcfg_pdu->pusch_config_pdu.start_symbol_index;
uint8_t nrOfLayers = 1;
uint8_t mcs_index = ulcfg_pdu->pusch_config_pdu.mcs_index;
uint8_t mcs_table = ulcfg_pdu->pusch_config_pdu.mcs_table;
uint8_t harq_process_id = ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id;
uint8_t rv_index = ulcfg_pdu->pusch_config_pdu.pusch_data.rv_index;
uint16_t l_prime_mask = get_l_prime(nr_of_symbols, typeB, pusch_dmrs_pos0, pusch_len1);
uint8_t dmrs_config_type = 0;
uint16_t pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
// These should come from RRC config!!!
uint8_t ptrs_mcs1 = 2;
uint8_t ptrs_mcs2 = 4;
uint8_t ptrs_mcs3 = 10;
uint16_t n_rb0 = 25;
uint16_t n_rb1 = 75;
uint8_t ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, mcs_index, mcs_table);
uint8_t ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, rb_size);
uint16_t number_dmrs_symbols = 0;
uint16_t ul_dmrs_symb_pos = l_prime_mask << start_symbol_index;
for (int j = 0; j < ul_config_req->number_pdus; j++) {
fapi_nr_ul_config_request_pdu_t *ulcfg_pdu = &ul_config_req->ul_config_list[j];
#ifdef DEBUG_DCI
LOG_I(MAC, " UL config params \n rnti: %x \n rb_size: %d \n",
rnti, rb_size);
LOG_I(MAC, "rb_start: %x \n nr_of_symbols: %d \n start_symbol_index: %d \n nrOfLayers: %d \n mcs_index: %d \n \
mcs_table: %d \n harq_process_id: %d \n ndi: %d \n num_cb: %d \n rv_index: %d \n",
rb_start, nr_of_symbols, start_symbol_index, nrOfLayers, mcs_index,
mcs_table, harq_process_id, ndi, num_cb, rv_index);
#endif
if (ulcfg_pdu->pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) {
// PTRS ports configuration
// TbD: ptrs_dmrs_port and ptrs_port_index are not initialised!
ptrs_ports_list.ptrs_re_offset = 0;
// These should come from RRC config!!!
uint8_t ptrs_mcs1 = 2;
uint8_t ptrs_mcs2 = 4;
uint8_t ptrs_mcs3 = 10;
uint16_t n_rb0 = 25;
uint16_t n_rb1 = 75;
uint8_t ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, ulcfg_pdu->pusch_config_pdu.mcs_index, ulcfg_pdu->pusch_config_pdu.mcs_table);
uint8_t ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, ulcfg_pdu->pusch_config_pdu.rb_size);
uint16_t l_prime_mask = get_l_prime(ulcfg_pdu->pusch_config_pdu.nr_of_symbols, typeB, pusch_dmrs_pos0, pusch_len1);
uint16_t ul_dmrs_symb_pos = l_prime_mask << ulcfg_pdu->pusch_config_pdu.start_symbol_index;
// Num PRB Overhead from PUSCH-ServingCellConfig
if (mac->scg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead == NULL)
N_PRB_oh = 0;
else
N_PRB_oh = *mac->scg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead;
uint8_t dmrs_config_type = 0;
uint16_t number_dmrs_symbols = 0;
ul_config->slot = ul_info->slot_tx;
ul_config->number_pdus = 1;
ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config->ul_config_list[0].pusch_config_pdu.rnti = rnti;
ul_config->ul_config_list[0].pusch_config_pdu.rb_size = rb_size;
ul_config->ul_config_list[0].pusch_config_pdu.rb_start = rb_start;
ul_config->ul_config_list[0].pusch_config_pdu.nr_of_symbols = nr_of_symbols;
ul_config->ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol_index;
ul_config->ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = ul_dmrs_symb_pos;
ul_config->ul_config_list[0].pusch_config_pdu.dmrs_config_type = dmrs_config_type;
ul_config->ul_config_list[0].pusch_config_pdu.mcs_index = mcs_index;
ul_config->ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
ul_config->ul_config_list[0].pusch_config_pdu.num_dmrs_cdm_grps_no_data = 1;
ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0;
ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = rv_index;
ul_config->ul_config_list[0].pusch_config_pdu.nrOfLayers = nrOfLayers;
ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.harq_process_id = harq_process_id;
ul_config->ul_config_list[0].pusch_config_pdu.pdu_bit_map = pdu_bit_map;
ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_time_density = ptrs_time_density;
ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_freq_density = ptrs_freq_density;
ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_ports_list = &ptrs_ports_list;
ul_config->ul_config_list[0].pusch_config_pdu.target_code_rate = nr_get_code_rate_ul(mcs_index, mcs_table);
ul_config->ul_config_list[0].pusch_config_pdu.qam_mod_order = nr_get_Qm_ul(mcs_index, mcs_table);
// PTRS ports configuration
// TbD: ptrs_dmrs_port and ptrs_port_index are not initialised!
ptrs_ports_list.ptrs_re_offset = 0;
if (1 << ptrs_time_density >= nr_of_symbols) {
ul_config->ul_config_list[0].pusch_config_pdu.pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
}
// Num PRB Overhead from PUSCH-ServingCellConfig
if (mac->scg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead == NULL)
N_PRB_oh = 0;
else
N_PRB_oh = *mac->scg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead;
get_num_re_dmrs(&ul_config->ul_config_list[0].pusch_config_pdu,
&nb_dmrs_re_per_rb,
&number_dmrs_symbols);
ulcfg_pdu->pusch_config_pdu.ul_dmrs_symb_pos = ul_dmrs_symb_pos;
ulcfg_pdu->pusch_config_pdu.dmrs_config_type = dmrs_config_type;
ulcfg_pdu->pusch_config_pdu.num_dmrs_cdm_grps_no_data = 1;
ulcfg_pdu->pusch_config_pdu.nrOfLayers = 1;
ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator = 0;
ulcfg_pdu->pusch_config_pdu.pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
ulcfg_pdu->pusch_config_pdu.pusch_ptrs.ptrs_time_density = ptrs_time_density;
ulcfg_pdu->pusch_config_pdu.pusch_ptrs.ptrs_freq_density = ptrs_freq_density;
ulcfg_pdu->pusch_config_pdu.pusch_ptrs.ptrs_ports_list = &ptrs_ports_list;
//ulcfg_pdu->pusch_config_pdu.target_code_rate = nr_get_code_rate_ul(ulcfg_pdu->pusch_config_pdu.mcs_index, ulcfg_pdu->pusch_config_pdu.mcs_table);
//ulcfg_pdu->pusch_config_pdu.qam_mod_order = nr_get_Qm_ul(ulcfg_pdu->pusch_config_pdu.mcs_index, ulcfg_pdu->pusch_config_pdu.mcs_table);
TBS = nr_compute_tbs(ul_config->ul_config_list[0].pusch_config_pdu.qam_mod_order,
ul_config->ul_config_list[0].pusch_config_pdu.target_code_rate,
rb_size,
nr_of_symbols,
nb_dmrs_re_per_rb*number_dmrs_symbols,
N_PRB_oh,
0,
nrOfLayers);
TBS_bytes = TBS/8;
ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.tb_size = TBS_bytes;
if (1 << ulcfg_pdu->pusch_config_pdu.pusch_ptrs.ptrs_time_density >= ulcfg_pdu->pusch_config_pdu.nr_of_symbols) {
ulcfg_pdu->pusch_config_pdu.pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
}
if (IS_SOFTMODEM_NOS1){
// Getting IP traffic to be transmitted
data_existing = nr_ue_get_sdu(mod_id,
cc_id,
frame_tx,
slot_tx,
0,
ulsch_input_buffer,
TBS_bytes,
&access_mode);
}
get_num_re_dmrs(&ulcfg_pdu->pusch_config_pdu,
&nb_dmrs_re_per_rb,
&number_dmrs_symbols);
//Random traffic to be transmitted if there is no IP traffic available for this Tx opportunity
if (!IS_SOFTMODEM_NOS1 || !data_existing) {
//Use zeros for the header bytes in noS1 mode, in order to make sure that the LCID is not valid
//and block this traffic from being forwarded to the upper layers at the gNB
LOG_D(PHY, "Random data to be tranmsitted: \n");
TBS = nr_compute_tbs(ulcfg_pdu->pusch_config_pdu.qam_mod_order,
ulcfg_pdu->pusch_config_pdu.target_code_rate,
ulcfg_pdu->pusch_config_pdu.rb_size,
ulcfg_pdu->pusch_config_pdu.nr_of_symbols,
nb_dmrs_re_per_rb*number_dmrs_symbols,
N_PRB_oh,
0,
ulcfg_pdu->pusch_config_pdu.nrOfLayers);
TBS_bytes = TBS/8;
ulcfg_pdu->pusch_config_pdu.pusch_data.tb_size = TBS_bytes;
//Give the first byte a dummy value (a value not corresponding to any valid LCID based on 38.321, Table 6.2.1-2)
//in order to distinguish the PHY random packets at the MAC layer of the gNB receiver from the normal packets that should
//have a valid LCID (nr_process_mac_pdu function)
ulsch_input_buffer[0] = 0x31;
if (IS_SOFTMODEM_NOS1){
// Getting IP traffic to be transmitted
data_existing = nr_ue_get_sdu(mod_id,
cc_id,
frame_tx,
slot_tx,
0,
ulsch_input_buffer,
TBS_bytes,
&access_mode);
}
for (i = 1; i < TBS_bytes; i++) {
ulsch_input_buffer[i] = (unsigned char) rand();
//printf(" input encoder a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
//Random traffic to be transmitted if there is no IP traffic available for this Tx opportunity
if (!IS_SOFTMODEM_NOS1 || !data_existing) {
//Use zeros for the header bytes in noS1 mode, in order to make sure that the LCID is not valid
//and block this traffic from being forwarded to the upper layers at the gNB
LOG_D(PHY, "Random data to be tranmsitted: \n");
//Give the first byte a dummy value (a value not corresponding to any valid LCID based on 38.321, Table 6.2.1-2)
//in order to distinguish the PHY random packets at the MAC layer of the gNB receiver from the normal packets that should
//have a valid LCID (nr_process_mac_pdu function)
ulsch_input_buffer[0] = 0x31;
for (i = 1; i < TBS_bytes; i++) {
ulsch_input_buffer[i] = (unsigned char) rand();
//printf(" input encoder a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
}
}
#ifdef DEBUG_MAC_PDU
LOG_D(PHY, "Is data existing ?: %d \n", data_existing);
LOG_I(PHY, "Printing MAC PDU to be encoded, TBS is: %d \n", TBS_bytes);
for (i = 0; i < TBS_bytes; i++) {
printf("%02x", ulsch_input_buffer[i]);
}
printf("\n");
#endif
// Config UL TX PDU
tx_req.slot = slot_tx;
tx_req.sfn = frame_tx;
// tx_req->tx_config // TbD
tx_req.number_of_pdus++;
tx_req.tx_request_body[j].pdu_length = TBS_bytes;
tx_req.tx_request_body[j].pdu_index = j;
tx_req.tx_request_body[j].pdu = ulsch_input_buffer;
}
}
#ifdef DEBUG_MAC_PDU
LOG_D(PHY, "Is data existing ?: %d \n", data_existing);
LOG_I(PHY, "Printing MAC PDU to be encoded, TBS is: %d \n", TBS_bytes);
for (i = 0; i < TBS_bytes; i++) {
printf("%02x", ulsch_input_buffer[i]);
fill_scheduled_response(&scheduled_response, NULL, ul_config_req, &tx_req, mod_id, cc_id, rx_frame, rx_slot);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response);
}
printf("\n");
#endif
// TODO: expand
// Note: Contention resolution is currently not active
if (mac->RA_contention_resolution_timer_active == 1)
ue_contention_resolution(mod_id, gNB_index, cc_id, ul_info->frame_tx);
dcireq.module_id = mod_id;
dcireq.gNB_index = gNB_index;
dcireq.cc_id = cc_id;
dcireq.frame = rx_frame;
dcireq.slot = rx_slot;
// Config UL TX PDU
tx_req.slot = slot_tx;
tx_req.sfn = frame_tx;
// tx_req->tx_config // TbD
tx_req.number_of_pdus = 1;
tx_req_body.pdu_length = TBS_bytes;
tx_req_body.pdu_index = 0;
tx_req_body.pdu = ulsch_input_buffer;
tx_req.tx_request_body = &tx_req_body;
fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, mod_id, cc_id, rx_frame, rx_slot);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response);
}
// TODO: expand
// Note: Contention resolution is currently not active
if (mac->RA_contention_resolution_timer_active == 1)
ue_contention_resolution(mod_id, gNB_index, cc_id, ul_info->frame_tx);
} else if (get_softmodem_params()->do_ra){
NR_UE_MAC_INST_t *mac = get_mac_inst(ul_info->module_id);
@@ -1641,8 +1670,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES];
nr_scheduled_response_t scheduled_response;
fapi_nr_tx_request_t tx_req;
fapi_nr_tx_request_body_t tx_req_body;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
//fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, ul_info->slot_tx);
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request[0];
fapi_nr_ul_config_request_pdu_t *ul_config_list = &ul_config->ul_config_list[ul_config->number_pdus];
uint16_t TBS_bytes = ul_config_list->pusch_config_pdu.pusch_data.tb_size;
@@ -1683,10 +1712,9 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
tx_req.slot = ul_info->slot_tx;
tx_req.sfn = ul_info->frame_tx;
tx_req.number_of_pdus = 1;
tx_req_body.pdu_length = TBS_bytes;
tx_req_body.pdu_index = 0;
tx_req_body.pdu = ulsch_input_buffer;
tx_req.tx_request_body = &tx_req_body;
tx_req.tx_request_body[0].pdu_length = TBS_bytes;
tx_req.tx_request_body[0].pdu_index = 0;
tx_req.tx_request_body[0].pdu = ulsch_input_buffer;
ul_config_list->pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config->number_pdus++;
// scheduled_response
@@ -1753,7 +1781,8 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
//fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slotP);
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request[0];
fapi_nr_ul_config_prach_pdu *prach_config_pdu;
fapi_nr_config_request_t *cfg = &mac->phy_config.config_req;
fapi_nr_prach_config_t *prach_config = &cfg->prach_config;
@@ -3087,7 +3116,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
return 0;
}
//////////////
int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index,fapi_nr_dci_indication_pdu_t *dci) {
int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci) {
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
@@ -3095,16 +3124,19 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in
dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits);
int dci_format = nr_extract_dci_info(mac,dci->dci_format,dci->payloadSize,dci->rnti,(uint64_t *)dci->payloadBits,def_dci_pdu_rel15);
return (nr_ue_process_dci(module_id, cc_id, gNB_index, def_dci_pdu_rel15, dci->rnti, dci_format));
return (nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci->rnti, dci_format));
}
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format){
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format){
int bwp_id = 1;
int mu = 0;
long k2 = 0;
uint16_t frame_tx = 0, slot_tx = 0;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
fapi_nr_ul_config_request_t *ul_config = NULL;
//const uint16_t n_RB_DLBWP = dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP; //make sure this has been set
AssertFatal(mac->DLbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n");
@@ -3134,6 +3166,28 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
* 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
* 50 SUL_IND_0_0:
*/
// Calculate the slot in which ULSCH should be scheduled. This is current slot + K2,
// where K2 is the offset between the slot in which UL DCI is received and the slot
// in which ULSCH should be scheduled. K2 is configured in RRC configuration.
// Get the numerology to calculate the Tx frame and slot
mu = mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
// Get slot offset K2 which will be used to calculate TX slot
k2 = get_k2(mac, dci->time_domain_assignment.val);
if (k2 < 0) // This can happen when a false DCI is received
return -1;
// Calculate TX slot and frame
slot_tx = (slot + k2) % nr_slots_per_frame[mu];
frame_tx = ((slot + k2) > nr_slots_per_frame[mu]) ? (frame + 1) % 1024 : frame;
// Get UL config request corresponding slot_tx
ul_config = get_ul_config_request(mac, slot_tx);
//AssertFatal(ul_config != NULL, "nr_ue_process_dci(): ul_config is NULL\n");
if (!ul_config) {
LOG_W(MAC, "nr_ue_process_dci(): ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n",frame,slot);
return -1;
}
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.rnti = rnti;
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu;
@@ -3172,7 +3226,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
}
/* SUL_IND_0_0 */ // To be implemented, FIXME!!!
ul_config->slot = slot_tx;
ul_config->sfn = frame_tx;
ul_config->number_pdus = ul_config->number_pdus + 1;
LOG_D(MAC, "nr_ue_process_dci(): Calculated frame and slot for pusch Tx: %d.%d, number of pdus %d\n", ul_config->sfn, ul_config->slot, ul_config->number_pdus);
break;
case NR_UL_DCI_FORMAT_0_1:
@@ -3204,6 +3261,28 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
* 48 UL_SCH_IND
* 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
*/
// Calculate the slot in which ULSCH should be scheduled. This is current slot + K2,
// where K2 is the offset between the slot in which UL DCI is received and the slot
// in which ULSCH should be scheduled. K2 is configured in RRC configuration.
// Get the numerology to calculate the Tx frame and slot
mu = mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
// Get slot offset K2 which will be used to calculate TX slot
k2 = get_k2(mac, dci->time_domain_assignment.val);
if (k2 < 0) // This can happen when a false DCI is received
return -1;
// Calculate TX slot and frame
slot_tx = (slot + k2) % nr_slots_per_frame[mu];
frame_tx = ((slot + k2) > nr_slots_per_frame[mu]) ? (frame + 1) % 1024 : frame;
// Get UL config request corresponding slot_tx
ul_config = get_ul_config_request(mac, slot_tx);
//AssertFatal(ul_config != NULL, "nr_ue_process_dci(): ul_config is NULL\n");
if (!ul_config) {
LOG_W(MAC, "nr_ue_process_dci(): ul_config request is NULL. Probably due to unexpected UL DCI in frame.slot %d.%d. Ignoring DCI!\n",frame,slot);
return -1;
}
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.rnti = rnti;
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu_0_1 = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu;
@@ -3240,6 +3319,13 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
pusch_config_pdu_0_1->mcs_table = get_pusch_mcs_table(pusch_config->mcs_TableTransformPrecoder, 1,
dci_format, NR_RNTI_C, NR_SearchSpace__searchSpaceType_PR_ue_Specific, false);
pusch_config_pdu_0_1->target_code_rate = nr_get_code_rate_ul(pusch_config_pdu_0_1->mcs_index, pusch_config_pdu_0_1->mcs_table);
pusch_config_pdu_0_1->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu_0_1->mcs_index, pusch_config_pdu_0_1->mcs_table);
if (pusch_config_pdu_0_1->target_code_rate == 0 || pusch_config_pdu_0_1->qam_mod_order == 0) {
LOG_W(MAC, "Invalid code rate or Mod order, likely due to unexpected UL DCI. Ignoring DCI! \n");
return -1;
}
/* NDI */
pusch_config_pdu_0_1->pusch_data.new_data_indicator = dci->ndi;
/* RV */
@@ -3497,8 +3583,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
/* UL_SCH_IND */
// A value of "1" indicates UL-SCH shall be transmitted on the PUSCH and
// a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
ul_config->slot = slot_tx;
ul_config->sfn = frame_tx;
ul_config->number_pdus = ul_config->number_pdus + 1;
LOG_D(MAC, "nr_ue_process_dci(): Calculated frame and slot for pusch Tx: %d.%d, number of pdus %d\n", ul_config->sfn, ul_config->slot, ul_config->number_pdus);
break;
case NR_DL_DCI_FORMAT_1_0:
+1 -1
View File
@@ -77,7 +77,7 @@ void nr_config_Msg3_pdu(NR_UE_MAC_INST_t *mac,
uint8_t nb_dmrs_re_per_rb;
uint16_t number_dmrs_symbols = 0;
int N_PRB_oh;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request[0];
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_Uplink_t *ubwp = mac->ULbwp[0];
+6 -13
View File
@@ -125,14 +125,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
}
lte_frame_type_t frame_type;
uint16_t band;
int32_t offset;
get_band(((uint64_t)cfg->carrier_config.dl_frequency.value)*1000,
&band,
&offset,
&frame_type);
get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing, &frame_type);
RC.nrmac[Mod_idP]->common_channels[0].frame_type = frame_type;
// Cell configuration
@@ -311,8 +304,8 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
"scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n");
cfg->tdd_table.tdd_period.value = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
}
LOG_I(MAC,"Setting TDD configuration period to %d\n",cfg->tdd_table.tdd_period.value);
if(cfg->cell_config.frame_duplex_type.value == TDD){
LOG_I(MAC,"Setting TDD configuration period to %d\n",cfg->tdd_table.tdd_period.value);
int return_tdd = set_tdd_config_nr(cfg,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
@@ -320,10 +313,10 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols);
if (return_tdd !=0){
LOG_E(PHY,"TDD configuration can not be done\n");
}
else LOG_I(PHY,"TDD has been properly configurated\n");
if (return_tdd != 0)
LOG_E(MAC,"TDD configuration can not be done\n");
else
LOG_I(MAC,"TDD has been properly configurated\n");
}
}
+2 -2
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@@ -372,7 +372,7 @@ void nr_schedule_pucch(int Mod_idP,
memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t));
UL_tti_req->n_pdus+=1;
LOG_I(MAC,"Scheduling pucch reception for frame %d slot %d with (%d, %d, %d) (SR ACK, CSI) bits\n",
LOG_D(MAC,"Scheduling pucch reception for frame %d slot %d with (%d, %d, %d) (SR ACK, CSI) bits\n",
frameP,slotP,O_sr,O_ack,curr_pucch->csi_bits);
nr_configure_pucch(pucch_pdu,
@@ -449,7 +449,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
break;
default:
AssertFatal(1==0,"Undefined tdd period %d\n", scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
AssertFatal(1==0,"Undefined tdd period %ld\n", scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
}
int num_slots_per_tdd = (slots_per_frame[*scc->ssbSubcarrierSpacing])/nb_periods_per_frame;
+14 -4
View File
@@ -70,7 +70,7 @@ int16_t ssb_index_from_prach(module_id_t module_idP,
float num_ssb_per_RO = ssb_per_rach_occasion[cfg->prach_config.ssb_per_rach.value];
uint16_t start_symbol_index = 0;
uint8_t mu,N_dur,N_t_slot,start_symbol = 0, temp_start_symbol = 0, N_RA_slot;
uint8_t mu,N_dur=0,N_t_slot=0,start_symbol = 0, temp_start_symbol = 0, N_RA_slot=0;
uint16_t format,RA_sfn_index = -1;
uint8_t config_period = 1;
uint16_t prach_occasion_id = -1;
@@ -139,7 +139,7 @@ void find_SSB_and_RO_available(module_id_t module_idP) {
nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0];
uint8_t config_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
uint8_t mu,N_dur,N_t_slot,start_symbol,N_RA_slot = 0;
uint8_t mu,N_dur=0,N_t_slot=0,start_symbol=0,N_RA_slot = 0;
uint16_t format,N_RA_sfn = 0,unused_RA_occasion,repetition = 0;
uint8_t num_active_ssb = 0;
uint8_t max_association_period = 1;
@@ -434,14 +434,24 @@ void nr_initiate_ra_proc(module_id_t module_idP,
uint8_t ul_carrier_id = 0; // 0 for NUL 1 for SUL
NR_SearchSpace_t *ss;
// ra_rnti from 5.1.3 in 38.321
uint16_t ra_rnti=1+symbol+(slotP*14)+(freq_index*14*80)+(ul_carrier_id*14*80*8);
int UE_id = 0;
uint16_t msg2_frame, msg2_slot,monitoring_slot_period,monitoring_offset;
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_RA_t *ra = &cc->ra[0];
uint16_t ra_rnti;
// ra_rnti from 5.1.3 in 38.321
// FK: in case of long PRACH the phone seems to expect the subframe number instead of the slot number here.
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present==NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l839)
ra_rnti=1+symbol+(9/*slotP*/*14)+(freq_index*14*80)+(ul_carrier_id*14*80*8);
else
ra_rnti=1+symbol+(slotP*14)+(freq_index*14*80)+(ul_carrier_id*14*80*8);
// if the preamble received correspond to one of the listed
// the UE sent a RACH either for starting RA procedure or RA procedure failed and UE retries
int pr_found=0;
@@ -641,8 +641,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
* Possible improvement: take the periodicity from input file.
* If such UE is not scheduled now, it will be by the preprocessor later.
* If we add the CE, ta_apply will be reset */
if (frame >= (sched_ctrl->ta_frame + 10) % 1023)
sched_ctrl->ta_apply = true; /* the timer is reset once TA CE is scheduled */
if (frame == (sched_ctrl->ta_frame + 10) % 1024)
sched_ctrl->ta_apply = false; /* the timer is reset once TA CE is scheduled */
if (sched_ctrl->rbSize <= 0)
continue;
-2
View File
@@ -334,8 +334,6 @@ int get_ulscs(nfapi_nr_config_request_t *cfg);
int get_symbolsperslot(nfapi_nr_config_request_t *cfg);
int32_t get_nr_uldl_offset(int nr_bandP);
void config_nr_mib(int Mod_idP,
int CC_idP,
int p_gNBP,
+1 -1
View File
@@ -1285,7 +1285,7 @@ static int missing_size(nr_rlc_entity_am_t *entity, missing_data_t *m,
missing_data_t m_nack;
/* be careful to limit a range to 255 SNs, that is: cut if needed */
sn_count = m->sn_end - m->sn_start;
sn_count = m->sn_end - m->sn_start + 1;
if (sn_count < 0)
sn_count += entity->sn_modulus;
+4 -1
View File
@@ -917,6 +917,9 @@ rlc_op_status_t rrc_rlc_remove_ue (const protocol_ctxt_t* const x)
void nr_rlc_tick(int frame, int subframe)
{
if (frame != nr_rlc_current_time_last_frame ||
subframe != nr_rlc_current_time_last_subframe)
subframe != nr_rlc_current_time_last_subframe) {
nr_rlc_current_time_last_frame = frame;
nr_rlc_current_time_last_subframe = subframe;
nr_rlc_current_time++;
}
}
+1 -1
View File
@@ -1,6 +1,6 @@
#!/bin/sh
test_count=13
test_count=14
for i in `seq $test_count`
do
+46
View File
@@ -0,0 +1,46 @@
/*
* am test (SN field size 18):
* test status reporting with missing packet
* at time 1, UE receives an SDU of 50 bytes
* at time 2, UE receives an SDU of 50 bytes
* at time 3, UE receives an SDU of 50 bytes
* at time 4, UE receives an SDU of 50 bytes
* transmission fails for first SDU, okay for the others
* then some time with transmission failing
* then at time 49, UE receives an SDU, transmission okay
* then at time 50, transmission failing again (we had a bug triggered by this)
* finally at time 55, transmission okay again to clear buffers
*/
TIME, 1,
GNB_AM, 100000, 100000, 45, 35, 0, -1, -1, 8, 18,
UE_AM, 100000, 100000, 45, 35, 0, -1, -1, 8, 18,
GNB_RECV_FAILS, 1,
GNB_PDU_SIZE, 80,
UE_PDU_SIZE, 80,
UE_SDU, 0, 50,
TIME, 2,
GNB_RECV_FAILS, 0,
UE_SDU, 1, 50,
TIME, 3,
GNB_BUFFER_STATUS,
UE_SDU, 2, 50,
TIME, 4,
GNB_BUFFER_STATUS,
UE_SDU, 3, 50,
TIME, 5,
GNB_BUFFER_STATUS,
GNB_RECV_FAILS, 1,
TIME, 6,
GNB_BUFFER_STATUS,
UE_BUFFER_STATUS,
TIME, 49,
GNB_RECV_FAILS, 0,
UE_SDU, 4, 50,
TIME, 50,
GNB_RECV_FAILS, 1,
GNB_BUFFER_STATUS,
UE_BUFFER_STATUS,
TIME, 55,
GNB_RECV_FAILS, 0,
TIME, -1
Binary file not shown.
+6 -5
View File
@@ -64,10 +64,10 @@ int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index,
return 0;
}
// L2 Abstraction Layer
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr_dci_indication_pdu_t *dci){
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci){
//printf("handle_dci: rnti %x,dci_type %d\n",rnti,dci_type);
return nr_ue_process_dci_indication_pdu(module_id, cc_id, gNB_index, dci);
return nr_ue_process_dci_indication_pdu(module_id, cc_id, gNB_index, frame, slot, dci);
}
// L2 Abstraction Layer
@@ -135,8 +135,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
module_id_t module_id = dl_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
if (!dl_info->dci_ind && !dl_info->rx_ind) {
// UL indication to schedule DCI reception
nr_ue_scheduler(dl_info, NULL);
@@ -150,13 +149,15 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
int8_t ret = handle_dci(dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dl_info->frame,
dl_info->slot,
dl_info->dci_ind->dci_list+i);
ret_mask |= (ret << FAPI_NR_DCI_IND);
if (ret >= 0) {
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is NULL!\n" );
AssertFatal( nr_ue_if_module_inst[module_id]->scheduled_response != NULL, "scheduled_response is NULL!\n" );
fill_scheduled_response(&scheduled_response, dl_config, ul_config, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot);
nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response);
}
}
+1 -1
View File
@@ -224,7 +224,7 @@ int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, ui
\param pduP pointer to pdu*/
int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len);
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr_dci_indication_pdu_t *dci);
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci);
#endif